membar_ops.S revision 1.12 
11.12Sriastrad/*	$NetBSD: membar_ops.S,v 1.12 2022/04/09 23:32:51 riastradh Exp $	*/
21.1Sad
31.1Sad/*-
41.1Sad * Copyright (c) 2006, 2007 The NetBSD Foundation, Inc.
51.1Sad * All rights reserved.
61.1Sad *
71.1Sad * This code is derived from software contributed to The NetBSD Foundation
81.1Sad * by Jason R. Thorpe, and by Andrew Doran.
91.1Sad *
101.1Sad * Redistribution and use in source and binary forms, with or without
111.1Sad * modification, are permitted provided that the following conditions
121.1Sad * are met:
131.1Sad * 1. Redistributions of source code must retain the above copyright
141.1Sad *    notice, this list of conditions and the following disclaimer.
151.1Sad * 2. Redistributions in binary form must reproduce the above copyright
161.1Sad *    notice, this list of conditions and the following disclaimer in the
171.1Sad *    documentation and/or other materials provided with the distribution.
181.9Sskrll *
191.1Sad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
201.1Sad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
211.1Sad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
221.1Sad * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
231.1Sad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
241.1Sad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
251.1Sad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
261.1Sad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
271.1Sad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
281.1Sad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
291.1Sad * POSSIBILITY OF SUCH DAMAGE.
301.1Sad */
311.1Sad
321.1Sad#include "atomic_op_asm.h"
331.1Sad
341.1Sad	.text
351.5Smatt	.set noreorder
361.1Sad
371.3SchsLEAF(_membar_sync)
381.4Smatt	j	ra
391.10Sskrll	 BDSYNC
401.1SadEND(_membar_sync)
411.1Sad
421.6Smatt#ifdef __OCTEON__
431.12SriastradLEAF(_membar_release)
441.12Sriastrad	/*
451.12Sriastrad	 * syncw is documented as ordering store-before-store in
461.12Sriastrad	 *
471.12Sriastrad	 *	Cavium OCTEON III CN78XX Hardware Reference Manual,
481.12Sriastrad	 *	CN78XX-HM-0.99E, September 2014.
491.12Sriastrad	 *
501.12Sriastrad	 * It's unclear from the documentation the architecture
511.12Sriastrad	 * guarantees load-before-store ordering without barriers, but
521.12Sriastrad	 * this code assumes it does.  If that assumption is wrong, we
531.12Sriastrad	 * can only use syncw for membar_producer -- membar_release has
541.12Sriastrad	 * to use the full sync.
551.12Sriastrad	 */
561.6Smatt	j	ra
571.6Smatt	 syncw
581.12SriastradEND(_membar_release)
591.6Smatt#endif
601.6Smatt
611.1SadATOMIC_OP_ALIAS(membar_sync,_membar_sync)
621.12SriastradATOMIC_OP_ALIAS(membar_acquire,_membar_sync)
631.12SriastradSTRONG_ALIAS(_membar_acquire,_membar_sync)
641.1SadATOMIC_OP_ALIAS(membar_enter,_membar_sync)
651.1SadSTRONG_ALIAS(_membar_enter,_membar_sync)
661.6Smatt#ifdef __OCTEON__
671.12SriastradATOMIC_OP_ALIAS(membar_exit,_membar_release)
681.12SriastradSTRONG_ALIAS(_membar_exit,_membar_release)
691.12SriastradATOMIC_OP_ALIAS(membar_release,_membar_release)
701.12SriastradATOMIC_OP_ALIAS(membar_producer,_membar_release)
711.12SriastradSTRONG_ALIAS(_membar_producer,_membar_release)
721.6Smatt#else
731.1SadATOMIC_OP_ALIAS(membar_exit,_membar_sync)
741.1SadSTRONG_ALIAS(_membar_exit,_membar_sync)
751.12SriastradATOMIC_OP_ALIAS(membar_release,_membar_sync)
761.12SriastradSTRONG_ALIAS(_membar_release,_membar_sync)
771.1SadATOMIC_OP_ALIAS(membar_producer,_membar_sync)
781.1SadSTRONG_ALIAS(_membar_producer,_membar_sync)
791.6Smatt#endif
801.1SadATOMIC_OP_ALIAS(membar_consumer,_membar_sync)
811.1SadSTRONG_ALIAS(_membar_consumer,_membar_sync)
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