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atomic_cas.S revision 1.6.2.1
      1  1.6.2.1  wrstuden /*	$NetBSD: atomic_cas.S,v 1.6.2.1 2008/06/23 04:26:45 wrstuden Exp $	*/
      2      1.2        ad 
      3      1.2        ad /*-
      4      1.5        ad  * Copyright (c) 2007, 2008 The NetBSD Foundation, Inc.
      5      1.2        ad  * All rights reserved.
      6      1.2        ad  *
      7      1.2        ad  * This code is derived from software contributed to The NetBSD Foundation
      8      1.2        ad  * by Andrew Doran and Jason R. Thorpe.
      9      1.2        ad  *
     10      1.2        ad  * Redistribution and use in source and binary forms, with or without
     11      1.2        ad  * modification, are permitted provided that the following conditions
     12      1.2        ad  * are met:
     13      1.2        ad  * 1. Redistributions of source code must retain the above copyright
     14      1.2        ad  *    notice, this list of conditions and the following disclaimer.
     15      1.2        ad  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.2        ad  *    notice, this list of conditions and the following disclaimer in the
     17      1.2        ad  *    documentation and/or other materials provided with the distribution.
     18      1.2        ad  *
     19      1.2        ad  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20      1.2        ad  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21      1.2        ad  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22      1.2        ad  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23      1.2        ad  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24      1.2        ad  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25      1.2        ad  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26      1.2        ad  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27      1.2        ad  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28      1.2        ad  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29      1.2        ad  * POSSIBILITY OF SUCH DAMAGE.
     30      1.2        ad  */
     31      1.2        ad 
     32      1.2        ad #include "atomic_op_asm.h"
     33      1.2        ad 
     34      1.2        ad #if defined(_KERNEL)
     35      1.2        ad 
     36      1.3        ad #include <machine/psl.h>
     37      1.3        ad 
     38      1.2        ad #include "opt_multiprocessor.h"
     39      1.2        ad 
     40      1.2        ad #define	DISABLE_INTERRUPTS						 \
     41      1.3        ad 	rd	%psr, %o4			/* disable interrupts */;\
     42      1.3        ad 	or	%o4, PSR_PIL, %o5					;\
     43      1.2        ad 	wr	%o5, 0, %psr						;\
     44      1.2        ad 	nop								;\
     45      1.2        ad 	nop								;\
     46      1.2        ad 	nop
     47      1.2        ad 
     48      1.2        ad #define	RESTORE_INTERRUPTS						 \
     49      1.3        ad 	wr	%o4, 0, %psr			/* enable interrupts */	;\
     50      1.2        ad 	nop								;\
     51      1.2        ad 	nop								;\
     52      1.2        ad 	nop
     53      1.2        ad 
     54      1.4        ad #else	/* _KERNEL */
     55      1.4        ad 
     56      1.4        ad #define	MULTIPROCESSOR	1
     57      1.4        ad #define	DISABLE_INTERRUPTS		/* nothing */
     58      1.4        ad #define	RESTORE_INTERRUPTS		/* nothing */
     59      1.4        ad 
     60      1.4        ad #endif	/* _KERNEL */
     61      1.4        ad 
     62      1.2        ad #if defined(MULTIPROCESSOR)
     63      1.2        ad 	.section .bss
     64      1.2        ad 	.align	1024
     65      1.2        ad OTYPE(_C_LABEL(_atomic_cas_locktab))
     66      1.2        ad _C_LABEL(_atomic_cas_locktab):
     67      1.2        ad 	.space	1024
     68      1.2        ad 
     69      1.2        ad #define	ACQUIRE_INTERLOCK						 \
     70      1.2        ad 	DISABLE_INTERRUPTS						;\
     71      1.3        ad 	srl	%o0, 3, %o5			/* get lock address */	;\
     72      1.2        ad 	and	%o5, 1023, %o5						;\
     73      1.3        ad 	sethi	%hi(_C_LABEL(_atomic_cas_locktab)), %o3			;\
     74      1.2        ad 	add	%o5, %o3, %o5						;\
     75      1.2        ad 									;\
     76      1.3        ad 	/* %o5 has interlock address */					;\
     77      1.2        ad 									;\
     78      1.3        ad 1:	ldstub	[%o5], %o3			/* acquire lock */	;\
     79      1.2        ad 	tst	%o3							;\
     80      1.2        ad 	bz,a	2f							;\
     81      1.2        ad 	 nop								;\
     82      1.2        ad 	nop								;\
     83      1.2        ad 	nop								;\
     84      1.3        ad 	b,a	1b				/* spin	*/		;\
     85      1.2        ad 	 nop								;\
     86      1.3        ad 	/* We now hold the interlock */					;\
     87      1.2        ad 2:
     88      1.2        ad 
     89      1.2        ad #define	RELEASE_INTERLOCK						 \
     90      1.3        ad 	stb	%g0, [%o5]			/* release interlock */	;\
     91      1.2        ad 	RESTORE_INTERRUPTS
     92      1.2        ad 
     93      1.2        ad #else /* ! MULTIPROCESSOR */
     94      1.2        ad 
     95      1.2        ad #define	ACQUIRE_INTERLOCK	DISABLE_INTERRUPTS
     96      1.2        ad 
     97      1.2        ad #define	RELEASE_INTERLOCK	RESTORE_INTERRUPTS
     98      1.2        ad 
     99      1.2        ad #endif /* MULTIPROCESSOR */
    100      1.2        ad 
    101      1.2        ad 	.text
    102      1.2        ad 
    103      1.2        ad /*
    104      1.2        ad  * The v7 and v8 SPARC doesn't have compare-and-swap, so we block interrupts
    105      1.2        ad  * and use an interlock.
    106      1.2        ad  *
    107      1.2        ad  * XXX On single CPU systems, this should use a restartable sequence:
    108      1.2        ad  * XXX there we don't need the overhead of interlocking.
    109      1.2        ad  *
    110      1.2        ad  * XXX NOTE!  The interlock trick only works if EVERYTHING writes to
    111      1.2        ad  * XXX the memory cell through this code path!
    112      1.2        ad  */
    113  1.6.2.1  wrstuden ENTRY(_atomic_cas_32)
    114      1.2        ad 	ACQUIRE_INTERLOCK
    115      1.2        ad 	! %o4 has saved PSR value
    116      1.2        ad 	! %o5 has interlock address
    117      1.2        ad 
    118      1.2        ad 	ld	[%o0], %o3			! get old value
    119      1.2        ad 	cmp	%o1, %o3			! old == new?
    120      1.2        ad 	beq,a	3f				! yes, do the store
    121      1.2        ad 	 st	%o2, [%o0]			! (in the delay slot)
    122      1.2        ad 
    123      1.2        ad 3:	RELEASE_INTERLOCK
    124      1.2        ad 
    125      1.2        ad 	retl
    126      1.2        ad 	 mov	%o3, %o0			! return old value
    127      1.2        ad 
    128      1.2        ad ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32)
    129      1.2        ad ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32)
    130      1.2        ad STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32)
    131      1.2        ad ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32)
    132      1.2        ad STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32)
    133      1.2        ad ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32)
    134      1.2        ad STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32)
    135      1.5        ad 
    136      1.5        ad ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32)
    137      1.5        ad STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32)
    138      1.5        ad ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32)
    139      1.5        ad STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_32)
    140      1.5        ad ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32)
    141      1.5        ad STRONG_ALIAS(_atomic_cas_ulong_ni,_atomic_cas_32)
    142      1.5        ad ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32)
    143      1.5        ad STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_32)
    144