atomic_cas.S revision 1.8 1 1.8 pooka /* $NetBSD: atomic_cas.S,v 1.8 2009/01/10 23:36:22 pooka Exp $ */
2 1.2 ad
3 1.2 ad /*-
4 1.5 ad * Copyright (c) 2007, 2008 The NetBSD Foundation, Inc.
5 1.2 ad * All rights reserved.
6 1.2 ad *
7 1.2 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.2 ad * by Andrew Doran and Jason R. Thorpe.
9 1.2 ad *
10 1.2 ad * Redistribution and use in source and binary forms, with or without
11 1.2 ad * modification, are permitted provided that the following conditions
12 1.2 ad * are met:
13 1.2 ad * 1. Redistributions of source code must retain the above copyright
14 1.2 ad * notice, this list of conditions and the following disclaimer.
15 1.2 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.2 ad * notice, this list of conditions and the following disclaimer in the
17 1.2 ad * documentation and/or other materials provided with the distribution.
18 1.2 ad *
19 1.2 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.2 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.2 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.2 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.2 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.2 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 ad * POSSIBILITY OF SUCH DAMAGE.
30 1.2 ad */
31 1.2 ad
32 1.2 ad #include "atomic_op_asm.h"
33 1.2 ad
34 1.8 pooka #if defined(_KERNEL) && !defined(_RUMPKERNEL)
35 1.8 pooka #define _HARDKERNEL
36 1.8 pooka #endif
37 1.8 pooka
38 1.8 pooka #if defined(_HARKDERNEL)
39 1.2 ad
40 1.3 ad #include <machine/psl.h>
41 1.3 ad
42 1.2 ad #include "opt_multiprocessor.h"
43 1.2 ad
44 1.2 ad #define DISABLE_INTERRUPTS \
45 1.3 ad rd %psr, %o4 /* disable interrupts */;\
46 1.3 ad or %o4, PSR_PIL, %o5 ;\
47 1.2 ad wr %o5, 0, %psr ;\
48 1.2 ad nop ;\
49 1.2 ad nop ;\
50 1.2 ad nop
51 1.2 ad
52 1.2 ad #define RESTORE_INTERRUPTS \
53 1.3 ad wr %o4, 0, %psr /* enable interrupts */ ;\
54 1.2 ad nop ;\
55 1.2 ad nop ;\
56 1.2 ad nop
57 1.2 ad
58 1.8 pooka #else /* _HARDKERNEL */
59 1.4 ad
60 1.4 ad #define MULTIPROCESSOR 1
61 1.4 ad #define DISABLE_INTERRUPTS /* nothing */
62 1.4 ad #define RESTORE_INTERRUPTS /* nothing */
63 1.4 ad
64 1.8 pooka #endif /* _HARDKERNEL */
65 1.4 ad
66 1.2 ad #if defined(MULTIPROCESSOR)
67 1.2 ad .section .bss
68 1.2 ad .align 1024
69 1.2 ad OTYPE(_C_LABEL(_atomic_cas_locktab))
70 1.2 ad _C_LABEL(_atomic_cas_locktab):
71 1.2 ad .space 1024
72 1.2 ad
73 1.2 ad #define ACQUIRE_INTERLOCK \
74 1.2 ad DISABLE_INTERRUPTS ;\
75 1.3 ad srl %o0, 3, %o5 /* get lock address */ ;\
76 1.2 ad and %o5, 1023, %o5 ;\
77 1.3 ad sethi %hi(_C_LABEL(_atomic_cas_locktab)), %o3 ;\
78 1.2 ad add %o5, %o3, %o5 ;\
79 1.2 ad ;\
80 1.3 ad /* %o5 has interlock address */ ;\
81 1.2 ad ;\
82 1.3 ad 1: ldstub [%o5], %o3 /* acquire lock */ ;\
83 1.2 ad tst %o3 ;\
84 1.2 ad bz,a 2f ;\
85 1.2 ad nop ;\
86 1.2 ad nop ;\
87 1.2 ad nop ;\
88 1.3 ad b,a 1b /* spin */ ;\
89 1.2 ad nop ;\
90 1.3 ad /* We now hold the interlock */ ;\
91 1.2 ad 2:
92 1.2 ad
93 1.2 ad #define RELEASE_INTERLOCK \
94 1.3 ad stb %g0, [%o5] /* release interlock */ ;\
95 1.2 ad RESTORE_INTERRUPTS
96 1.2 ad
97 1.2 ad #else /* ! MULTIPROCESSOR */
98 1.2 ad
99 1.2 ad #define ACQUIRE_INTERLOCK DISABLE_INTERRUPTS
100 1.2 ad
101 1.2 ad #define RELEASE_INTERLOCK RESTORE_INTERRUPTS
102 1.2 ad
103 1.2 ad #endif /* MULTIPROCESSOR */
104 1.2 ad
105 1.2 ad .text
106 1.2 ad
107 1.2 ad /*
108 1.2 ad * The v7 and v8 SPARC doesn't have compare-and-swap, so we block interrupts
109 1.2 ad * and use an interlock.
110 1.2 ad *
111 1.2 ad * XXX On single CPU systems, this should use a restartable sequence:
112 1.2 ad * XXX there we don't need the overhead of interlocking.
113 1.2 ad *
114 1.2 ad * XXX NOTE! The interlock trick only works if EVERYTHING writes to
115 1.2 ad * XXX the memory cell through this code path!
116 1.2 ad */
117 1.7 chs ENTRY(_atomic_cas_32)
118 1.2 ad ACQUIRE_INTERLOCK
119 1.2 ad ! %o4 has saved PSR value
120 1.2 ad ! %o5 has interlock address
121 1.2 ad
122 1.2 ad ld [%o0], %o3 ! get old value
123 1.2 ad cmp %o1, %o3 ! old == new?
124 1.2 ad beq,a 3f ! yes, do the store
125 1.2 ad st %o2, [%o0] ! (in the delay slot)
126 1.2 ad
127 1.2 ad 3: RELEASE_INTERLOCK
128 1.2 ad
129 1.2 ad retl
130 1.2 ad mov %o3, %o0 ! return old value
131 1.2 ad
132 1.2 ad ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32)
133 1.2 ad ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32)
134 1.2 ad STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32)
135 1.2 ad ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32)
136 1.2 ad STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32)
137 1.2 ad ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32)
138 1.2 ad STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32)
139 1.5 ad
140 1.5 ad ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32)
141 1.5 ad STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32)
142 1.5 ad ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32)
143 1.5 ad STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_32)
144 1.5 ad ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32)
145 1.5 ad STRONG_ALIAS(_atomic_cas_ulong_ni,_atomic_cas_32)
146 1.5 ad ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32)
147 1.5 ad STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_32)
148