coff-arm.c revision 1.1 1 /* BFD back-end for ARM COFF files.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2012
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
6
7 This file is part of BFD, the Binary File Descriptor library.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
23
24 #include "sysdep.h"
25 #include "bfd.h"
26 #include "libbfd.h"
27 #include "coff/arm.h"
28 #include "coff/internal.h"
29
30 #ifdef COFF_WITH_PE
31 #include "coff/pe.h"
32 #endif
33
34 #include "libcoff.h"
35
36 /* Macros for manipulation the bits in the flags field of the coff data
37 structure. */
38 #define APCS_26_FLAG(abfd) \
39 (coff_data (abfd)->flags & F_APCS_26)
40
41 #define APCS_FLOAT_FLAG(abfd) \
42 (coff_data (abfd)->flags & F_APCS_FLOAT)
43
44 #define PIC_FLAG(abfd) \
45 (coff_data (abfd)->flags & F_PIC)
46
47 #define APCS_SET(abfd) \
48 (coff_data (abfd)->flags & F_APCS_SET)
49
50 #define SET_APCS_FLAGS(abfd, flgs) \
51 do \
52 { \
53 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \
54 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \
55 } \
56 while (0)
57
58 #define INTERWORK_FLAG(abfd) \
59 (coff_data (abfd)->flags & F_INTERWORK)
60
61 #define INTERWORK_SET(abfd) \
62 (coff_data (abfd)->flags & F_INTERWORK_SET)
63
64 #define SET_INTERWORK_FLAG(abfd, flg) \
65 do \
66 { \
67 coff_data (abfd)->flags &= ~F_INTERWORK; \
68 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \
69 } \
70 while (0)
71
72 #ifndef NUM_ELEM
73 #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
74 #endif
75
76 typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
77 /* Some typedefs for holding instructions. */
78 typedef unsigned long int insn32;
79 typedef unsigned short int insn16;
80
81 /* The linker script knows the section names for placement.
82 The entry_names are used to do simple name mangling on the stubs.
83 Given a function name, and its type, the stub can be found. The
84 name can be changed. The only requirement is the %s be present. */
85
86 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
87 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
88
89 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
90 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
91
92 /* Used by the assembler. */
93
94 static bfd_reloc_status_type
95 coff_arm_reloc (bfd *abfd,
96 arelent *reloc_entry,
97 asymbol *symbol ATTRIBUTE_UNUSED,
98 void * data,
99 asection *input_section ATTRIBUTE_UNUSED,
100 bfd *output_bfd,
101 char **error_message ATTRIBUTE_UNUSED)
102 {
103 symvalue diff;
104
105 if (output_bfd == NULL)
106 return bfd_reloc_continue;
107
108 diff = reloc_entry->addend;
109
110 #define DOIT(x) \
111 x = ((x & ~howto->dst_mask) \
112 | (((x & howto->src_mask) + diff) & howto->dst_mask))
113
114 if (diff != 0)
115 {
116 reloc_howto_type *howto = reloc_entry->howto;
117 unsigned char *addr = (unsigned char *) data + reloc_entry->address;
118
119 switch (howto->size)
120 {
121 case 0:
122 {
123 char x = bfd_get_8 (abfd, addr);
124 DOIT (x);
125 bfd_put_8 (abfd, x, addr);
126 }
127 break;
128
129 case 1:
130 {
131 short x = bfd_get_16 (abfd, addr);
132 DOIT (x);
133 bfd_put_16 (abfd, (bfd_vma) x, addr);
134 }
135 break;
136
137 case 2:
138 {
139 long x = bfd_get_32 (abfd, addr);
140 DOIT (x);
141 bfd_put_32 (abfd, (bfd_vma) x, addr);
142 }
143 break;
144
145 default:
146 abort ();
147 }
148 }
149
150 /* Now let bfd_perform_relocation finish everything up. */
151 return bfd_reloc_continue;
152 }
153
154 /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
155 in this file), then TARGET_UNDERSCORE should be defined, otherwise it
156 should not. */
157 #ifndef TARGET_UNDERSCORE
158 #define TARGET_UNDERSCORE '_'
159 #endif
160
161 #ifndef PCRELOFFSET
162 #define PCRELOFFSET TRUE
163 #endif
164
165 /* These most certainly belong somewhere else. Just had to get rid of
166 the manifest constants in the code. */
167
168 #ifdef ARM_WINCE
169
170 #define ARM_26D 0
171 #define ARM_32 1
172 #define ARM_RVA32 2
173 #define ARM_26 3
174 #define ARM_THUMB12 4
175 #define ARM_SECTION 14
176 #define ARM_SECREL 15
177
178 #else
179
180 #define ARM_8 0
181 #define ARM_16 1
182 #define ARM_32 2
183 #define ARM_26 3
184 #define ARM_DISP8 4
185 #define ARM_DISP16 5
186 #define ARM_DISP32 6
187 #define ARM_26D 7
188 /* 8 is unused. */
189 #define ARM_NEG16 9
190 #define ARM_NEG32 10
191 #define ARM_RVA32 11
192 #define ARM_THUMB9 12
193 #define ARM_THUMB12 13
194 #define ARM_THUMB23 14
195
196 #endif
197
198 static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
199 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
200 static bfd_reloc_status_type aoutarm_fix_pcrel_26
201 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
202 static bfd_reloc_status_type coff_thumb_pcrel_12
203 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
204 #ifndef ARM_WINCE
205 static bfd_reloc_status_type coff_thumb_pcrel_9
206 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
207 static bfd_reloc_status_type coff_thumb_pcrel_23
208 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
209 #endif
210
211 static reloc_howto_type aoutarm_std_reloc_howto[] =
212 {
213 #ifdef ARM_WINCE
214 HOWTO (ARM_26D,
215 2,
216 2,
217 24,
218 TRUE,
219 0,
220 complain_overflow_dont,
221 aoutarm_fix_pcrel_26_done,
222 "ARM_26D",
223 TRUE, /* partial_inplace. */
224 0x00ffffff,
225 0x0,
226 PCRELOFFSET),
227 HOWTO (ARM_32,
228 0,
229 2,
230 32,
231 FALSE,
232 0,
233 complain_overflow_bitfield,
234 coff_arm_reloc,
235 "ARM_32",
236 TRUE, /* partial_inplace. */
237 0xffffffff,
238 0xffffffff,
239 PCRELOFFSET),
240 HOWTO (ARM_RVA32,
241 0,
242 2,
243 32,
244 FALSE,
245 0,
246 complain_overflow_bitfield,
247 coff_arm_reloc,
248 "ARM_RVA32",
249 TRUE, /* partial_inplace. */
250 0xffffffff,
251 0xffffffff,
252 PCRELOFFSET),
253 HOWTO (ARM_26,
254 2,
255 2,
256 24,
257 TRUE,
258 0,
259 complain_overflow_signed,
260 aoutarm_fix_pcrel_26 ,
261 "ARM_26",
262 FALSE,
263 0x00ffffff,
264 0x00ffffff,
265 PCRELOFFSET),
266 HOWTO (ARM_THUMB12,
267 1,
268 1,
269 11,
270 TRUE,
271 0,
272 complain_overflow_signed,
273 coff_thumb_pcrel_12 ,
274 "ARM_THUMB12",
275 FALSE,
276 0x000007ff,
277 0x000007ff,
278 PCRELOFFSET),
279 EMPTY_HOWTO (-1),
280 EMPTY_HOWTO (-1),
281 EMPTY_HOWTO (-1),
282 EMPTY_HOWTO (-1),
283 EMPTY_HOWTO (-1),
284 EMPTY_HOWTO (-1),
285 EMPTY_HOWTO (-1),
286 EMPTY_HOWTO (-1),
287 EMPTY_HOWTO (-1),
288 HOWTO (ARM_SECTION,
289 0,
290 1,
291 16,
292 FALSE,
293 0,
294 complain_overflow_bitfield,
295 coff_arm_reloc,
296 "ARM_SECTION",
297 TRUE, /* partial_inplace. */
298 0x0000ffff,
299 0x0000ffff,
300 PCRELOFFSET),
301 HOWTO (ARM_SECREL,
302 0,
303 2,
304 32,
305 FALSE,
306 0,
307 complain_overflow_bitfield,
308 coff_arm_reloc,
309 "ARM_SECREL",
310 TRUE, /* partial_inplace. */
311 0xffffffff,
312 0xffffffff,
313 PCRELOFFSET),
314 #else /* not ARM_WINCE */
315 HOWTO (ARM_8,
316 0,
317 0,
318 8,
319 FALSE,
320 0,
321 complain_overflow_bitfield,
322 coff_arm_reloc,
323 "ARM_8",
324 TRUE,
325 0x000000ff,
326 0x000000ff,
327 PCRELOFFSET),
328 HOWTO (ARM_16,
329 0,
330 1,
331 16,
332 FALSE,
333 0,
334 complain_overflow_bitfield,
335 coff_arm_reloc,
336 "ARM_16",
337 TRUE,
338 0x0000ffff,
339 0x0000ffff,
340 PCRELOFFSET),
341 HOWTO (ARM_32,
342 0,
343 2,
344 32,
345 FALSE,
346 0,
347 complain_overflow_bitfield,
348 coff_arm_reloc,
349 "ARM_32",
350 TRUE,
351 0xffffffff,
352 0xffffffff,
353 PCRELOFFSET),
354 HOWTO (ARM_26,
355 2,
356 2,
357 24,
358 TRUE,
359 0,
360 complain_overflow_signed,
361 aoutarm_fix_pcrel_26 ,
362 "ARM_26",
363 FALSE,
364 0x00ffffff,
365 0x00ffffff,
366 PCRELOFFSET),
367 HOWTO (ARM_DISP8,
368 0,
369 0,
370 8,
371 TRUE,
372 0,
373 complain_overflow_signed,
374 coff_arm_reloc,
375 "ARM_DISP8",
376 TRUE,
377 0x000000ff,
378 0x000000ff,
379 TRUE),
380 HOWTO (ARM_DISP16,
381 0,
382 1,
383 16,
384 TRUE,
385 0,
386 complain_overflow_signed,
387 coff_arm_reloc,
388 "ARM_DISP16",
389 TRUE,
390 0x0000ffff,
391 0x0000ffff,
392 TRUE),
393 HOWTO (ARM_DISP32,
394 0,
395 2,
396 32,
397 TRUE,
398 0,
399 complain_overflow_signed,
400 coff_arm_reloc,
401 "ARM_DISP32",
402 TRUE,
403 0xffffffff,
404 0xffffffff,
405 TRUE),
406 HOWTO (ARM_26D,
407 2,
408 2,
409 24,
410 FALSE,
411 0,
412 complain_overflow_dont,
413 aoutarm_fix_pcrel_26_done,
414 "ARM_26D",
415 TRUE,
416 0x00ffffff,
417 0x0,
418 FALSE),
419 /* 8 is unused */
420 EMPTY_HOWTO (-1),
421 HOWTO (ARM_NEG16,
422 0,
423 -1,
424 16,
425 FALSE,
426 0,
427 complain_overflow_bitfield,
428 coff_arm_reloc,
429 "ARM_NEG16",
430 TRUE,
431 0x0000ffff,
432 0x0000ffff,
433 FALSE),
434 HOWTO (ARM_NEG32,
435 0,
436 -2,
437 32,
438 FALSE,
439 0,
440 complain_overflow_bitfield,
441 coff_arm_reloc,
442 "ARM_NEG32",
443 TRUE,
444 0xffffffff,
445 0xffffffff,
446 FALSE),
447 HOWTO (ARM_RVA32,
448 0,
449 2,
450 32,
451 FALSE,
452 0,
453 complain_overflow_bitfield,
454 coff_arm_reloc,
455 "ARM_RVA32",
456 TRUE,
457 0xffffffff,
458 0xffffffff,
459 PCRELOFFSET),
460 HOWTO (ARM_THUMB9,
461 1,
462 1,
463 8,
464 TRUE,
465 0,
466 complain_overflow_signed,
467 coff_thumb_pcrel_9 ,
468 "ARM_THUMB9",
469 FALSE,
470 0x000000ff,
471 0x000000ff,
472 PCRELOFFSET),
473 HOWTO (ARM_THUMB12,
474 1,
475 1,
476 11,
477 TRUE,
478 0,
479 complain_overflow_signed,
480 coff_thumb_pcrel_12 ,
481 "ARM_THUMB12",
482 FALSE,
483 0x000007ff,
484 0x000007ff,
485 PCRELOFFSET),
486 HOWTO (ARM_THUMB23,
487 1,
488 2,
489 22,
490 TRUE,
491 0,
492 complain_overflow_signed,
493 coff_thumb_pcrel_23 ,
494 "ARM_THUMB23",
495 FALSE,
496 0x07ff07ff,
497 0x07ff07ff,
498 PCRELOFFSET)
499 #endif /* not ARM_WINCE */
500 };
501
502 #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)
503
504 #ifdef COFF_WITH_PE
505 /* Return TRUE if this relocation should
506 appear in the output .reloc section. */
507
508 static bfd_boolean
509 in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
510 reloc_howto_type * howto)
511 {
512 return !howto->pc_relative && howto->type != ARM_RVA32;
513 }
514 #endif
515
516 #define RTYPE2HOWTO(cache_ptr, dst) \
517 (cache_ptr)->howto = \
518 (dst)->r_type < NUM_RELOCS \
519 ? aoutarm_std_reloc_howto + (dst)->r_type \
520 : NULL
521
522 #define coff_rtype_to_howto coff_arm_rtype_to_howto
523
524 static reloc_howto_type *
525 coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
526 asection *sec,
527 struct internal_reloc *rel,
528 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
529 struct internal_syment *sym ATTRIBUTE_UNUSED,
530 bfd_vma *addendp)
531 {
532 reloc_howto_type * howto;
533
534 if (rel->r_type >= NUM_RELOCS)
535 return NULL;
536
537 howto = aoutarm_std_reloc_howto + rel->r_type;
538
539 if (rel->r_type == ARM_RVA32)
540 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
541
542 #if defined COFF_WITH_PE && defined ARM_WINCE
543 if (rel->r_type == ARM_SECREL)
544 {
545 bfd_vma osect_vma;
546
547 if (h && (h->type == bfd_link_hash_defined
548 || h->type == bfd_link_hash_defweak))
549 osect_vma = h->root.u.def.section->output_section->vma;
550 else
551 {
552 int i;
553
554 /* Sigh, the only way to get the section to offset against
555 is to find it the hard way. */
556
557 for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
558 sec = sec->next;
559
560 osect_vma = sec->output_section->vma;
561 }
562
563 *addendp -= osect_vma;
564 }
565 #endif
566
567 return howto;
568 }
569
570 /* Used by the assembler. */
571
572 static bfd_reloc_status_type
573 aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
574 arelent *reloc_entry ATTRIBUTE_UNUSED,
575 asymbol *symbol ATTRIBUTE_UNUSED,
576 void * data ATTRIBUTE_UNUSED,
577 asection *input_section ATTRIBUTE_UNUSED,
578 bfd *output_bfd ATTRIBUTE_UNUSED,
579 char **error_message ATTRIBUTE_UNUSED)
580 {
581 /* This is dead simple at present. */
582 return bfd_reloc_ok;
583 }
584
585 /* Used by the assembler. */
586
587 static bfd_reloc_status_type
588 aoutarm_fix_pcrel_26 (bfd *abfd,
589 arelent *reloc_entry,
590 asymbol *symbol,
591 void * data,
592 asection *input_section,
593 bfd *output_bfd,
594 char **error_message ATTRIBUTE_UNUSED)
595 {
596 bfd_vma relocation;
597 bfd_size_type addr = reloc_entry->address;
598 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
599 bfd_reloc_status_type flag = bfd_reloc_ok;
600
601 /* If this is an undefined symbol, return error. */
602 if (bfd_is_und_section (symbol->section)
603 && (symbol->flags & BSF_WEAK) == 0)
604 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
605
606 /* If the sections are different, and we are doing a partial relocation,
607 just ignore it for now. */
608 if (symbol->section->name != input_section->name
609 && output_bfd != (bfd *)NULL)
610 return bfd_reloc_continue;
611
612 relocation = (target & 0x00ffffff) << 2;
613 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
614 relocation += symbol->value;
615 relocation += symbol->section->output_section->vma;
616 relocation += symbol->section->output_offset;
617 relocation += reloc_entry->addend;
618 relocation -= input_section->output_section->vma;
619 relocation -= input_section->output_offset;
620 relocation -= addr;
621
622 if (relocation & 3)
623 return bfd_reloc_overflow;
624
625 /* Check for overflow. */
626 if (relocation & 0x02000000)
627 {
628 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
629 flag = bfd_reloc_overflow;
630 }
631 else if (relocation & ~(bfd_vma) 0x03ffffff)
632 flag = bfd_reloc_overflow;
633
634 target &= ~0x00ffffff;
635 target |= (relocation >> 2) & 0x00ffffff;
636 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
637
638 /* Now the ARM magic... Change the reloc type so that it is marked as done.
639 Strictly this is only necessary if we are doing a partial relocation. */
640 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
641
642 return flag;
643 }
644
645 static bfd_reloc_status_type
646 coff_thumb_pcrel_common (bfd *abfd,
647 arelent *reloc_entry,
648 asymbol *symbol,
649 void * data,
650 asection *input_section,
651 bfd *output_bfd,
652 char **error_message ATTRIBUTE_UNUSED,
653 thumb_pcrel_branchtype btype)
654 {
655 bfd_vma relocation = 0;
656 bfd_size_type addr = reloc_entry->address;
657 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
658 bfd_reloc_status_type flag = bfd_reloc_ok;
659 bfd_vma dstmsk;
660 bfd_vma offmsk;
661 bfd_vma signbit;
662
663 /* NOTE: This routine is currently used by GAS, but not by the link
664 phase. */
665 switch (btype)
666 {
667 case b9:
668 dstmsk = 0x000000ff;
669 offmsk = 0x000001fe;
670 signbit = 0x00000100;
671 break;
672
673 case b12:
674 dstmsk = 0x000007ff;
675 offmsk = 0x00000ffe;
676 signbit = 0x00000800;
677 break;
678
679 case b23:
680 dstmsk = 0x07ff07ff;
681 offmsk = 0x007fffff;
682 signbit = 0x00400000;
683 break;
684
685 default:
686 abort ();
687 }
688
689 /* If this is an undefined symbol, return error. */
690 if (bfd_is_und_section (symbol->section)
691 && (symbol->flags & BSF_WEAK) == 0)
692 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
693
694 /* If the sections are different, and we are doing a partial relocation,
695 just ignore it for now. */
696 if (symbol->section->name != input_section->name
697 && output_bfd != (bfd *)NULL)
698 return bfd_reloc_continue;
699
700 switch (btype)
701 {
702 case b9:
703 case b12:
704 relocation = ((target & dstmsk) << 1);
705 break;
706
707 case b23:
708 if (bfd_big_endian (abfd))
709 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
710 else
711 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
712 break;
713
714 default:
715 abort ();
716 }
717
718 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */
719 relocation += symbol->value;
720 relocation += symbol->section->output_section->vma;
721 relocation += symbol->section->output_offset;
722 relocation += reloc_entry->addend;
723 relocation -= input_section->output_section->vma;
724 relocation -= input_section->output_offset;
725 relocation -= addr;
726
727 if (relocation & 1)
728 return bfd_reloc_overflow;
729
730 /* Check for overflow. */
731 if (relocation & signbit)
732 {
733 if ((relocation & ~offmsk) != ~offmsk)
734 flag = bfd_reloc_overflow;
735 }
736 else if (relocation & ~offmsk)
737 flag = bfd_reloc_overflow;
738
739 target &= ~dstmsk;
740 switch (btype)
741 {
742 case b9:
743 case b12:
744 target |= (relocation >> 1);
745 break;
746
747 case b23:
748 if (bfd_big_endian (abfd))
749 target |= (((relocation & 0xfff) >> 1)
750 | ((relocation << 4) & 0x07ff0000));
751 else
752 target |= (((relocation & 0xffe) << 15)
753 | ((relocation >> 12) & 0x7ff));
754 break;
755
756 default:
757 abort ();
758 }
759
760 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
761
762 /* Now the ARM magic... Change the reloc type so that it is marked as done.
763 Strictly this is only necessary if we are doing a partial relocation. */
764 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
765
766 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */
767 return flag;
768 }
769
770 #ifndef ARM_WINCE
771 static bfd_reloc_status_type
772 coff_thumb_pcrel_23 (bfd *abfd,
773 arelent *reloc_entry,
774 asymbol *symbol,
775 void * data,
776 asection *input_section,
777 bfd *output_bfd,
778 char **error_message)
779 {
780 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
781 input_section, output_bfd, error_message,
782 b23);
783 }
784
785 static bfd_reloc_status_type
786 coff_thumb_pcrel_9 (bfd *abfd,
787 arelent *reloc_entry,
788 asymbol *symbol,
789 void * data,
790 asection *input_section,
791 bfd *output_bfd,
792 char **error_message)
793 {
794 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
795 input_section, output_bfd, error_message,
796 b9);
797 }
798 #endif /* not ARM_WINCE */
799
800 static bfd_reloc_status_type
801 coff_thumb_pcrel_12 (bfd *abfd,
802 arelent *reloc_entry,
803 asymbol *symbol,
804 void * data,
805 asection *input_section,
806 bfd *output_bfd,
807 char **error_message)
808 {
809 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
810 input_section, output_bfd, error_message,
811 b12);
812 }
813
814 static const struct reloc_howto_struct *
815 coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
816 {
817 #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j
818
819 if (code == BFD_RELOC_CTOR)
820 switch (bfd_arch_bits_per_address (abfd))
821 {
822 case 32:
823 code = BFD_RELOC_32;
824 break;
825 default:
826 return NULL;
827 }
828
829 switch (code)
830 {
831 #ifdef ARM_WINCE
832 ASTD (BFD_RELOC_32, ARM_32);
833 ASTD (BFD_RELOC_RVA, ARM_RVA32);
834 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
835 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
836 ASTD (BFD_RELOC_32_SECREL, ARM_SECREL);
837 #else
838 ASTD (BFD_RELOC_8, ARM_8);
839 ASTD (BFD_RELOC_16, ARM_16);
840 ASTD (BFD_RELOC_32, ARM_32);
841 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
842 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26);
843 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
844 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
845 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
846 ASTD (BFD_RELOC_RVA, ARM_RVA32);
847 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
848 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
849 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
850 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23);
851 #endif
852 default: return NULL;
853 }
854 }
855
856 static reloc_howto_type *
857 coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
858 const char *r_name)
859 {
860 unsigned int i;
861
862 for (i = 0;
863 i < (sizeof (aoutarm_std_reloc_howto)
864 / sizeof (aoutarm_std_reloc_howto[0]));
865 i++)
866 if (aoutarm_std_reloc_howto[i].name != NULL
867 && strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0)
868 return &aoutarm_std_reloc_howto[i];
869
870 return NULL;
871 }
872
873 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
874 #define COFF_PAGE_SIZE 0x1000
875
876 /* Turn a howto into a reloc nunmber. */
877 #define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
878 #define BADMAG(x) ARMBADMAG(x)
879 #define ARM 1 /* Customize coffcode.h. */
880
881 #ifndef ARM_WINCE
882 /* Make sure that the 'r_offset' field is copied properly
883 so that identical binaries will compare the same. */
884 #define SWAP_IN_RELOC_OFFSET H_GET_32
885 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
886 #endif
887
888 /* Extend the coff_link_hash_table structure with a few ARM specific fields.
889 This allows us to store global data here without actually creating any
890 global variables, which is a no-no in the BFD world. */
891 struct coff_arm_link_hash_table
892 {
893 /* The original coff_link_hash_table structure. MUST be first field. */
894 struct coff_link_hash_table root;
895
896 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
897 bfd_size_type thumb_glue_size;
898
899 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
900 bfd_size_type arm_glue_size;
901
902 /* An arbitrary input BFD chosen to hold the glue sections. */
903 bfd * bfd_of_glue_owner;
904
905 /* Support interworking with old, non-interworking aware ARM code. */
906 int support_old_code;
907 };
908
909 /* Get the ARM coff linker hash table from a link_info structure. */
910 #define coff_arm_hash_table(info) \
911 ((struct coff_arm_link_hash_table *) ((info)->hash))
912
913 /* Create an ARM coff linker hash table. */
914
915 static struct bfd_link_hash_table *
916 coff_arm_link_hash_table_create (bfd * abfd)
917 {
918 struct coff_arm_link_hash_table * ret;
919 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
920
921 ret = bfd_malloc (amt);
922 if (ret == NULL)
923 return NULL;
924
925 if (!_bfd_coff_link_hash_table_init (&ret->root,
926 abfd,
927 _bfd_coff_link_hash_newfunc,
928 sizeof (struct coff_link_hash_entry)))
929 {
930 free (ret);
931 return NULL;
932 }
933
934 ret->thumb_glue_size = 0;
935 ret->arm_glue_size = 0;
936 ret->bfd_of_glue_owner = NULL;
937
938 return & ret->root.root;
939 }
940
941 static bfd_boolean
942 arm_emit_base_file_entry (struct bfd_link_info *info,
943 bfd *output_bfd,
944 asection *input_section,
945 bfd_vma reloc_offset)
946 {
947 bfd_vma addr = (reloc_offset
948 - input_section->vma
949 + input_section->output_offset
950 + input_section->output_section->vma);
951
952 if (coff_data (output_bfd)->pe)
953 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
954 if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1)
955 return TRUE;
956
957 bfd_set_error (bfd_error_system_call);
958 return FALSE;
959 }
960
961 #ifndef ARM_WINCE
963 /* The thumb form of a long branch is a bit finicky, because the offset
964 encoding is split over two fields, each in it's own instruction. They
965 can occur in any order. So given a thumb form of long branch, and an
966 offset, insert the offset into the thumb branch and return finished
967 instruction.
968
969 It takes two thumb instructions to encode the target address. Each has
970 11 bits to invest. The upper 11 bits are stored in one (identified by
971 H-0.. see below), the lower 11 bits are stored in the other (identified
972 by H-1).
973
974 Combine together and shifted left by 1 (it's a half word address) and
975 there you have it.
976
977 Op: 1111 = F,
978 H-0, upper address-0 = 000
979 Op: 1111 = F,
980 H-1, lower address-0 = 800
981
982 They can be ordered either way, but the arm tools I've seen always put
983 the lower one first. It probably doesn't matter. krk (at) cygnus.com
984
985 XXX: Actually the order does matter. The second instruction (H-1)
986 moves the computed address into the PC, so it must be the second one
987 in the sequence. The problem, however is that whilst little endian code
988 stores the instructions in HI then LOW order, big endian code does the
989 reverse. nickc (at) cygnus.com. */
990
991 #define LOW_HI_ORDER 0xF800F000
992 #define HI_LOW_ORDER 0xF000F800
993
994 static insn32
995 insert_thumb_branch (insn32 br_insn, int rel_off)
996 {
997 unsigned int low_bits;
998 unsigned int high_bits;
999
1000 BFD_ASSERT ((rel_off & 1) != 1);
1001
1002 rel_off >>= 1; /* Half word aligned address. */
1003 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
1004 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
1005
1006 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
1007 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
1008 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
1009 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
1010 else
1011 /* FIXME: the BFD library should never abort except for internal errors
1012 - it should return an error status. */
1013 abort (); /* Error - not a valid branch instruction form. */
1014
1015 return br_insn;
1016 }
1017
1018
1019 static struct coff_link_hash_entry *
1021 find_thumb_glue (struct bfd_link_info *info,
1022 const char *name,
1023 bfd *input_bfd)
1024 {
1025 char *tmp_name;
1026 struct coff_link_hash_entry *myh;
1027 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1028
1029 tmp_name = bfd_malloc (amt);
1030
1031 BFD_ASSERT (tmp_name);
1032
1033 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1034
1035 myh = coff_link_hash_lookup
1036 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1037
1038 if (myh == NULL)
1039 /* xgettext:c-format */
1040 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"),
1041 input_bfd, tmp_name, name);
1042
1043 free (tmp_name);
1044
1045 return myh;
1046 }
1047 #endif /* not ARM_WINCE */
1048
1049 static struct coff_link_hash_entry *
1050 find_arm_glue (struct bfd_link_info *info,
1051 const char *name,
1052 bfd *input_bfd)
1053 {
1054 char *tmp_name;
1055 struct coff_link_hash_entry * myh;
1056 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1057
1058 tmp_name = bfd_malloc (amt);
1059
1060 BFD_ASSERT (tmp_name);
1061
1062 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1063
1064 myh = coff_link_hash_lookup
1065 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1066
1067 if (myh == NULL)
1068 /* xgettext:c-format */
1069 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"),
1070 input_bfd, tmp_name, name);
1071
1072 free (tmp_name);
1073
1074 return myh;
1075 }
1076
1077 /*
1078 ARM->Thumb glue:
1079
1080 .arm
1081 __func_from_arm:
1082 ldr r12, __func_addr
1083 bx r12
1084 __func_addr:
1085 .word func @ behave as if you saw a ARM_32 reloc
1086 */
1087
1088 #define ARM2THUMB_GLUE_SIZE 12
1089 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1090 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1091 static const insn32 a2t3_func_addr_insn = 0x00000001;
1092
1093 /*
1094 Thumb->ARM: Thumb->(non-interworking aware) ARM
1095
1096 .thumb .thumb
1097 .align 2 .align 2
1098 __func_from_thumb: __func_from_thumb:
1099 bx pc push {r6, lr}
1100 nop ldr r6, __func_addr
1101 .arm mov lr, pc
1102 __func_change_to_arm: bx r6
1103 b func .arm
1104 __func_back_to_thumb:
1105 ldmia r13! {r6, lr}
1106 bx lr
1107 __func_addr:
1108 .word func
1109 */
1110
1111 #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8)
1112 #ifndef ARM_WINCE
1113 static const insn16 t2a1_bx_pc_insn = 0x4778;
1114 static const insn16 t2a2_noop_insn = 0x46c0;
1115 static const insn32 t2a3_b_insn = 0xea000000;
1116
1117 static const insn16 t2a1_push_insn = 0xb540;
1118 static const insn16 t2a2_ldr_insn = 0x4e03;
1119 static const insn16 t2a3_mov_insn = 0x46fe;
1120 static const insn16 t2a4_bx_insn = 0x4730;
1121 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1122 static const insn32 t2a6_bx_insn = 0xe12fff1e;
1123 #endif
1124
1125 /* TODO:
1126 We should really create new local (static) symbols in destination
1127 object for each stub we create. We should also create local
1128 (static) symbols within the stubs when switching between ARM and
1129 Thumb code. This will ensure that the debugger and disassembler
1130 can present a better view of stubs.
1131
1132 We can treat stubs like literal sections, and for the THUMB9 ones
1133 (short addressing range) we should be able to insert the stubs
1134 between sections. i.e. the simplest approach (since relocations
1135 are done on a section basis) is to dump the stubs at the end of
1136 processing a section. That way we can always try and minimise the
1137 offset to and from a stub. However, this does not map well onto
1138 the way that the linker/BFD does its work: mapping all input
1139 sections to output sections via the linker script before doing
1140 all the processing.
1141
1142 Unfortunately it may be easier to just to disallow short range
1143 Thumb->ARM stubs (i.e. no conditional inter-working branches,
1144 only branch-and-link (BL) calls. This will simplify the processing
1145 since we can then put all of the stubs into their own section.
1146
1147 TODO:
1148 On a different subject, rather than complaining when a
1149 branch cannot fit in the number of bits available for the
1150 instruction we should generate a trampoline stub (needed to
1151 address the complete 32bit address space). */
1152
1153 /* The standard COFF backend linker does not cope with the special
1154 Thumb BRANCH23 relocation. The alternative would be to split the
1155 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
1156 bit simpler simply providing our own relocation driver. */
1157
1158 /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
1159 This code is a very slightly modified copy of
1160 _bfd_coff_generic_relocate_section. It would be a much more
1161 maintainable solution to have a MACRO that could be expanded within
1162 _bfd_coff_generic_relocate_section that would only be provided for
1163 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that
1164 is different from the original. */
1165
1166 static bfd_boolean
1167 coff_arm_relocate_section (bfd *output_bfd,
1168 struct bfd_link_info *info,
1169 bfd *input_bfd,
1170 asection *input_section,
1171 bfd_byte *contents,
1172 struct internal_reloc *relocs,
1173 struct internal_syment *syms,
1174 asection **sections)
1175 {
1176 struct internal_reloc * rel;
1177 struct internal_reloc * relend;
1178 #ifndef ARM_WINCE
1179 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section);
1180 #endif
1181
1182 rel = relocs;
1183 relend = rel + input_section->reloc_count;
1184
1185 for (; rel < relend; rel++)
1186 {
1187 int done = 0;
1188 long symndx;
1189 struct coff_link_hash_entry * h;
1190 struct internal_syment * sym;
1191 bfd_vma addend;
1192 bfd_vma val;
1193 reloc_howto_type * howto;
1194 bfd_reloc_status_type rstat;
1195 bfd_vma h_val;
1196
1197 symndx = rel->r_symndx;
1198
1199 if (symndx == -1)
1200 {
1201 h = NULL;
1202 sym = NULL;
1203 }
1204 else
1205 {
1206 h = obj_coff_sym_hashes (input_bfd)[symndx];
1207 sym = syms + symndx;
1208 }
1209
1210 /* COFF treats common symbols in one of two ways. Either the
1211 size of the symbol is included in the section contents, or it
1212 is not. We assume that the size is not included, and force
1213 the rtype_to_howto function to adjust the addend as needed. */
1214
1215 if (sym != NULL && sym->n_scnum != 0)
1216 addend = - sym->n_value;
1217 else
1218 addend = 0;
1219
1220 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h,
1221 sym, &addend);
1222 if (howto == NULL)
1223 return FALSE;
1224
1225 /* The relocation_section function will skip pcrel_offset relocs
1226 when doing a relocatable link. However, we want to convert
1227 ARM_26 to ARM_26D relocs if possible. We return a fake howto in
1228 this case without pcrel_offset set, and adjust the addend to
1229 compensate. 'partial_inplace' is also set, since we want 'done'
1230 relocations to be reflected in section's data. */
1231 if (rel->r_type == ARM_26
1232 && h != NULL
1233 && info->relocatable
1234 && (h->root.type == bfd_link_hash_defined
1235 || h->root.type == bfd_link_hash_defweak)
1236 && (h->root.u.def.section->output_section
1237 == input_section->output_section))
1238 {
1239 static reloc_howto_type fake_arm26_reloc =
1240 HOWTO (ARM_26,
1241 2,
1242 2,
1243 24,
1244 TRUE,
1245 0,
1246 complain_overflow_signed,
1247 aoutarm_fix_pcrel_26 ,
1248 "ARM_26",
1249 TRUE,
1250 0x00ffffff,
1251 0x00ffffff,
1252 FALSE);
1253
1254 addend -= rel->r_vaddr - input_section->vma;
1255 #ifdef ARM_WINCE
1256 /* FIXME: I don't know why, but the hack is necessary for correct
1257 generation of bl's instruction offset. */
1258 addend -= 8;
1259 #endif
1260 howto = & fake_arm26_reloc;
1261 }
1262
1263 #ifdef ARM_WINCE
1264 /* MS ARM-CE makes the reloc relative to the opcode's pc, not
1265 the next opcode's pc, so is off by one. */
1266 if (howto->pc_relative && !info->relocatable)
1267 addend -= 8;
1268 #endif
1269
1270 /* If we are doing a relocatable link, then we can just ignore
1271 a PC relative reloc that is pcrel_offset. It will already
1272 have the correct value. If this is not a relocatable link,
1273 then we should ignore the symbol value. */
1274 if (howto->pc_relative && howto->pcrel_offset)
1275 {
1276 if (info->relocatable)
1277 continue;
1278 /* FIXME - it is not clear which targets need this next test
1279 and which do not. It is known that it is needed for the
1280 VxWorks and EPOC-PE targets, but it is also known that it
1281 was suppressed for other ARM targets. This ought to be
1282 sorted out one day. */
1283 #ifdef ARM_COFF_BUGFIX
1284 /* We must not ignore the symbol value. If the symbol is
1285 within the same section, the relocation should have already
1286 been fixed, but if it is not, we'll be handed a reloc into
1287 the beginning of the symbol's section, so we must not cancel
1288 out the symbol's value, otherwise we'll be adding it in
1289 twice. */
1290 if (sym != NULL && sym->n_scnum != 0)
1291 addend += sym->n_value;
1292 #endif
1293 }
1294
1295 val = 0;
1296
1297 if (h == NULL)
1298 {
1299 asection *sec;
1300
1301 if (symndx == -1)
1302 {
1303 sec = bfd_abs_section_ptr;
1304 val = 0;
1305 }
1306 else
1307 {
1308 sec = sections[symndx];
1309 val = (sec->output_section->vma
1310 + sec->output_offset
1311 + sym->n_value
1312 - sec->vma);
1313 }
1314 }
1315 else
1316 {
1317 /* We don't output the stubs if we are generating a
1318 relocatable output file, since we may as well leave the
1319 stub generation to the final linker pass. If we fail to
1320 verify that the name is defined, we'll try to build stubs
1321 for an undefined name... */
1322 if (! info->relocatable
1323 && ( h->root.type == bfd_link_hash_defined
1324 || h->root.type == bfd_link_hash_defweak))
1325 {
1326 asection * h_sec = h->root.u.def.section;
1327 const char * name = h->root.root.string;
1328
1329 /* h locates the symbol referenced in the reloc. */
1330 h_val = (h->root.u.def.value
1331 + h_sec->output_section->vma
1332 + h_sec->output_offset);
1333
1334 if (howto->type == ARM_26)
1335 {
1336 if ( h->symbol_class == C_THUMBSTATFUNC
1337 || h->symbol_class == C_THUMBEXTFUNC)
1338 {
1339 /* Arm code calling a Thumb function. */
1340 unsigned long int tmp;
1341 bfd_vma my_offset;
1342 asection * s;
1343 long int ret_offset;
1344 struct coff_link_hash_entry * myh;
1345 struct coff_arm_link_hash_table * globals;
1346
1347 myh = find_arm_glue (info, name, input_bfd);
1348 if (myh == NULL)
1349 return FALSE;
1350
1351 globals = coff_arm_hash_table (info);
1352
1353 BFD_ASSERT (globals != NULL);
1354 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1355
1356 my_offset = myh->root.u.def.value;
1357
1358 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1359 ARM2THUMB_GLUE_SECTION_NAME);
1360 BFD_ASSERT (s != NULL);
1361 BFD_ASSERT (s->contents != NULL);
1362 BFD_ASSERT (s->output_section != NULL);
1363
1364 if ((my_offset & 0x01) == 0x01)
1365 {
1366 if (h_sec->owner != NULL
1367 && INTERWORK_SET (h_sec->owner)
1368 && ! INTERWORK_FLAG (h_sec->owner))
1369 _bfd_error_handler
1370 /* xgettext:c-format */
1371 (_("%B(%s): warning: interworking not enabled.\n"
1372 " first occurrence: %B: arm call to thumb"),
1373 h_sec->owner, input_bfd, name);
1374
1375 --my_offset;
1376 myh->root.u.def.value = my_offset;
1377
1378 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn,
1379 s->contents + my_offset);
1380
1381 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn,
1382 s->contents + my_offset + 4);
1383
1384 /* It's a thumb address. Add the low order bit. */
1385 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn,
1386 s->contents + my_offset + 8);
1387
1388 if (info->base_file
1389 && !arm_emit_base_file_entry (info, output_bfd,
1390 s, my_offset + 8))
1391 return FALSE;
1392 }
1393
1394 BFD_ASSERT (my_offset <= globals->arm_glue_size);
1395
1396 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1397 - input_section->vma);
1398
1399 tmp = tmp & 0xFF000000;
1400
1401 /* Somehow these are both 4 too far, so subtract 8. */
1402 ret_offset =
1403 s->output_offset
1404 + my_offset
1405 + s->output_section->vma
1406 - (input_section->output_offset
1407 + input_section->output_section->vma
1408 + rel->r_vaddr)
1409 - 8;
1410
1411 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
1412
1413 bfd_put_32 (output_bfd, (bfd_vma) tmp,
1414 contents + rel->r_vaddr - input_section->vma);
1415 done = 1;
1416 }
1417 }
1418
1419 #ifndef ARM_WINCE
1420 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */
1421 else if (howto->type == ARM_THUMB23)
1422 {
1423 if ( h->symbol_class == C_EXT
1424 || h->symbol_class == C_STAT
1425 || h->symbol_class == C_LABEL)
1426 {
1427 /* Thumb code calling an ARM function. */
1428 asection * s = 0;
1429 bfd_vma my_offset;
1430 unsigned long int tmp;
1431 long int ret_offset;
1432 struct coff_link_hash_entry * myh;
1433 struct coff_arm_link_hash_table * globals;
1434
1435 myh = find_thumb_glue (info, name, input_bfd);
1436 if (myh == NULL)
1437 return FALSE;
1438
1439 globals = coff_arm_hash_table (info);
1440
1441 BFD_ASSERT (globals != NULL);
1442 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1443
1444 my_offset = myh->root.u.def.value;
1445
1446 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
1447 THUMB2ARM_GLUE_SECTION_NAME);
1448
1449 BFD_ASSERT (s != NULL);
1450 BFD_ASSERT (s->contents != NULL);
1451 BFD_ASSERT (s->output_section != NULL);
1452
1453 if ((my_offset & 0x01) == 0x01)
1454 {
1455 if (h_sec->owner != NULL
1456 && INTERWORK_SET (h_sec->owner)
1457 && ! INTERWORK_FLAG (h_sec->owner)
1458 && ! globals->support_old_code)
1459 _bfd_error_handler
1460 /* xgettext:c-format */
1461 (_("%B(%s): warning: interworking not enabled.\n"
1462 " first occurrence: %B: thumb call to arm\n"
1463 " consider relinking with --support-old-code enabled"),
1464 h_sec->owner, input_bfd, name);
1465
1466 -- my_offset;
1467 myh->root.u.def.value = my_offset;
1468
1469 if (globals->support_old_code)
1470 {
1471 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn,
1472 s->contents + my_offset);
1473
1474 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn,
1475 s->contents + my_offset + 2);
1476
1477 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn,
1478 s->contents + my_offset + 4);
1479
1480 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn,
1481 s->contents + my_offset + 6);
1482
1483 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn,
1484 s->contents + my_offset + 8);
1485
1486 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn,
1487 s->contents + my_offset + 12);
1488
1489 /* Store the address of the function in the last word of the stub. */
1490 bfd_put_32 (output_bfd, h_val,
1491 s->contents + my_offset + 16);
1492
1493 if (info->base_file
1494 && !arm_emit_base_file_entry (info,
1495 output_bfd, s,
1496 my_offset + 16))
1497 return FALSE;
1498 }
1499 else
1500 {
1501 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn,
1502 s->contents + my_offset);
1503
1504 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn,
1505 s->contents + my_offset + 2);
1506
1507 ret_offset =
1508 /* Address of destination of the stub. */
1509 ((bfd_signed_vma) h_val)
1510 - ((bfd_signed_vma)
1511 /* Offset from the start of the current section to the start of the stubs. */
1512 (s->output_offset
1513 /* Offset of the start of this stub from the start of the stubs. */
1514 + my_offset
1515 /* Address of the start of the current section. */
1516 + s->output_section->vma)
1517 /* The branch instruction is 4 bytes into the stub. */
1518 + 4
1519 /* ARM branches work from the pc of the instruction + 8. */
1520 + 8);
1521
1522 bfd_put_32 (output_bfd,
1523 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
1524 s->contents + my_offset + 4);
1525
1526 }
1527 }
1528
1529 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
1530
1531 /* Now go back and fix up the original BL insn to point
1532 to here. */
1533 ret_offset =
1534 s->output_offset
1535 + my_offset
1536 - (input_section->output_offset
1537 + rel->r_vaddr)
1538 -4;
1539
1540 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1541 - input_section->vma);
1542
1543 bfd_put_32 (output_bfd,
1544 (bfd_vma) insert_thumb_branch (tmp,
1545 ret_offset),
1546 contents + rel->r_vaddr - input_section->vma);
1547
1548 done = 1;
1549 }
1550 }
1551 #endif
1552 }
1553
1554 /* If the relocation type and destination symbol does not
1555 fall into one of the above categories, then we can just
1556 perform a direct link. */
1557
1558 if (done)
1559 rstat = bfd_reloc_ok;
1560 else
1561 if ( h->root.type == bfd_link_hash_defined
1562 || h->root.type == bfd_link_hash_defweak)
1563 {
1564 asection *sec;
1565
1566 sec = h->root.u.def.section;
1567 val = (h->root.u.def.value
1568 + sec->output_section->vma
1569 + sec->output_offset);
1570 }
1571
1572 else if (! info->relocatable)
1573 {
1574 if (! ((*info->callbacks->undefined_symbol)
1575 (info, h->root.root.string, input_bfd, input_section,
1576 rel->r_vaddr - input_section->vma, TRUE)))
1577 return FALSE;
1578 }
1579 }
1580
1581 /* Emit a reloc if the backend thinks it needs it. */
1582 if (info->base_file
1583 && sym
1584 && pe_data(output_bfd)->in_reloc_p(output_bfd, howto)
1585 && !arm_emit_base_file_entry (info, output_bfd, input_section,
1586 rel->r_vaddr))
1587 return FALSE;
1588
1589 if (done)
1590 rstat = bfd_reloc_ok;
1591 #ifndef ARM_WINCE
1592 /* Only perform this fix during the final link, not a relocatable link. */
1593 else if (! info->relocatable
1594 && howto->type == ARM_THUMB23)
1595 {
1596 /* This is pretty much a copy of what the default
1597 _bfd_final_link_relocate and _bfd_relocate_contents
1598 routines do to perform a relocation, with special
1599 processing for the split addressing of the Thumb BL
1600 instruction. Again, it would probably be simpler adding a
1601 ThumbBRANCH23 specific macro expansion into the default
1602 code. */
1603
1604 bfd_vma address = rel->r_vaddr - input_section->vma;
1605
1606 if (address > high_address)
1607 rstat = bfd_reloc_outofrange;
1608 else
1609 {
1610 bfd_vma relocation = val + addend;
1611 int size = bfd_get_reloc_size (howto);
1612 bfd_boolean overflow = FALSE;
1613 bfd_byte *location = contents + address;
1614 bfd_vma x = bfd_get_32 (input_bfd, location);
1615 bfd_vma src_mask = 0x007FFFFE;
1616 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
1617 bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
1618 bfd_vma check;
1619 bfd_signed_vma signed_check;
1620 bfd_vma add;
1621 bfd_signed_vma signed_add;
1622
1623 BFD_ASSERT (size == 4);
1624
1625 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */
1626 relocation -= (input_section->output_section->vma
1627 + input_section->output_offset);
1628
1629 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */
1630 relocation -= address;
1631
1632 /* No need to negate the relocation with BRANCH23. */
1633 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */
1634 /* howto->rightshift == 1 */
1635
1636 /* Drop unwanted bits from the value we are relocating to. */
1637 check = relocation >> howto->rightshift;
1638
1639 /* If this is a signed value, the rightshift just dropped
1640 leading 1 bits (assuming twos complement). */
1641 if ((bfd_signed_vma) relocation >= 0)
1642 signed_check = check;
1643 else
1644 signed_check = (check
1645 | ((bfd_vma) - 1
1646 & ~((bfd_vma) - 1 >> howto->rightshift)));
1647
1648 /* Get the value from the object file. */
1649 if (bfd_big_endian (input_bfd))
1650 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
1651 else
1652 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));
1653
1654 /* Get the value from the object file with an appropriate sign.
1655 The expression involving howto->src_mask isolates the upper
1656 bit of src_mask. If that bit is set in the value we are
1657 adding, it is negative, and we subtract out that number times
1658 two. If src_mask includes the highest possible bit, then we
1659 can not get the upper bit, but that does not matter since
1660 signed_add needs no adjustment to become negative in that
1661 case. */
1662 signed_add = add;
1663
1664 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
1665 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;
1666
1667 /* howto->bitpos == 0 */
1668 /* Add the value from the object file, shifted so that it is a
1669 straight number. */
1670 signed_check += signed_add;
1671 relocation += signed_add;
1672
1673 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);
1674
1675 /* Assumes two's complement. */
1676 if ( signed_check > reloc_signed_max
1677 || signed_check < reloc_signed_min)
1678 overflow = TRUE;
1679
1680 /* Put the relocation into the correct bits.
1681 For a BLX instruction, make sure that the relocation is rounded up
1682 to a word boundary. This follows the semantics of the instruction
1683 which specifies that bit 1 of the target address will come from bit
1684 1 of the base address. */
1685 if (bfd_big_endian (input_bfd))
1686 {
1687 if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
1688 relocation += 2;
1689 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
1690 }
1691 else
1692 {
1693 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
1694 relocation += 2;
1695 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
1696 }
1697
1698 /* Add the relocation to the correct bits of X. */
1699 x = ((x & ~howto->dst_mask) | relocation);
1700
1701 /* Put the relocated value back in the object file. */
1702 bfd_put_32 (input_bfd, x, location);
1703
1704 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
1705 }
1706 }
1707 #endif
1708 else
1709 if (info->relocatable && ! howto->partial_inplace)
1710 rstat = bfd_reloc_ok;
1711 else
1712 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
1713 contents,
1714 rel->r_vaddr - input_section->vma,
1715 val, addend);
1716 /* Only perform this fix during the final link, not a relocatable link. */
1717 if (! info->relocatable
1718 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32))
1719 {
1720 /* Determine if we need to set the bottom bit of a relocated address
1721 because the address is the address of a Thumb code symbol. */
1722 int patchit = FALSE;
1723
1724 if (h != NULL
1725 && ( h->symbol_class == C_THUMBSTATFUNC
1726 || h->symbol_class == C_THUMBEXTFUNC))
1727 {
1728 patchit = TRUE;
1729 }
1730 else if (sym != NULL
1731 && sym->n_scnum > N_UNDEF)
1732 {
1733 /* No hash entry - use the symbol instead. */
1734 if ( sym->n_sclass == C_THUMBSTATFUNC
1735 || sym->n_sclass == C_THUMBEXTFUNC)
1736 patchit = TRUE;
1737 }
1738
1739 if (patchit)
1740 {
1741 bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
1742 bfd_vma x = bfd_get_32 (input_bfd, location);
1743
1744 bfd_put_32 (input_bfd, x | 1, location);
1745 }
1746 }
1747
1748 switch (rstat)
1749 {
1750 default:
1751 abort ();
1752 case bfd_reloc_ok:
1753 break;
1754 case bfd_reloc_outofrange:
1755 (*_bfd_error_handler)
1756 (_("%B: bad reloc address 0x%lx in section `%A'"),
1757 input_bfd, input_section, (unsigned long) rel->r_vaddr);
1758 return FALSE;
1759 case bfd_reloc_overflow:
1760 {
1761 const char *name;
1762 char buf[SYMNMLEN + 1];
1763
1764 if (symndx == -1)
1765 name = "*ABS*";
1766 else if (h != NULL)
1767 name = NULL;
1768 else
1769 {
1770 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
1771 if (name == NULL)
1772 return FALSE;
1773 }
1774
1775 if (! ((*info->callbacks->reloc_overflow)
1776 (info, (h ? &h->root : NULL), name, howto->name,
1777 (bfd_vma) 0, input_bfd, input_section,
1778 rel->r_vaddr - input_section->vma)))
1779 return FALSE;
1780 }
1781 }
1782 }
1783
1784 return TRUE;
1785 }
1786
1787 #ifndef COFF_IMAGE_WITH_PE
1788
1789 bfd_boolean
1790 bfd_arm_allocate_interworking_sections (struct bfd_link_info * info)
1791 {
1792 asection * s;
1793 bfd_byte * foo;
1794 struct coff_arm_link_hash_table * globals;
1795
1796 globals = coff_arm_hash_table (info);
1797
1798 BFD_ASSERT (globals != NULL);
1799
1800 if (globals->arm_glue_size != 0)
1801 {
1802 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1803
1804 s = bfd_get_section_by_name
1805 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1806
1807 BFD_ASSERT (s != NULL);
1808
1809 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
1810
1811 s->size = globals->arm_glue_size;
1812 s->contents = foo;
1813 }
1814
1815 if (globals->thumb_glue_size != 0)
1816 {
1817 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1818
1819 s = bfd_get_section_by_name
1820 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1821
1822 BFD_ASSERT (s != NULL);
1823
1824 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
1825
1826 s->size = globals->thumb_glue_size;
1827 s->contents = foo;
1828 }
1829
1830 return TRUE;
1831 }
1832
1833 static void
1834 record_arm_to_thumb_glue (struct bfd_link_info * info,
1835 struct coff_link_hash_entry * h)
1836 {
1837 const char * name = h->root.root.string;
1838 register asection * s;
1839 char * tmp_name;
1840 struct coff_link_hash_entry * myh;
1841 struct bfd_link_hash_entry * bh;
1842 struct coff_arm_link_hash_table * globals;
1843 bfd_vma val;
1844 bfd_size_type amt;
1845
1846 globals = coff_arm_hash_table (info);
1847
1848 BFD_ASSERT (globals != NULL);
1849 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1850
1851 s = bfd_get_section_by_name
1852 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1853
1854 BFD_ASSERT (s != NULL);
1855
1856 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1857 tmp_name = bfd_malloc (amt);
1858
1859 BFD_ASSERT (tmp_name);
1860
1861 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1862
1863 myh = coff_link_hash_lookup
1864 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1865
1866 if (myh != NULL)
1867 {
1868 free (tmp_name);
1869 /* We've already seen this guy. */
1870 return;
1871 }
1872
1873 /* The only trick here is using globals->arm_glue_size as the value. Even
1874 though the section isn't allocated yet, this is where we will be putting
1875 it. */
1876 bh = NULL;
1877 val = globals->arm_glue_size + 1;
1878 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1879 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1880
1881 free (tmp_name);
1882
1883 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE;
1884
1885 return;
1886 }
1887
1888 #ifndef ARM_WINCE
1889 static void
1890 record_thumb_to_arm_glue (struct bfd_link_info * info,
1891 struct coff_link_hash_entry * h)
1892 {
1893 const char * name = h->root.root.string;
1894 asection * s;
1895 char * tmp_name;
1896 struct coff_link_hash_entry * myh;
1897 struct bfd_link_hash_entry * bh;
1898 struct coff_arm_link_hash_table * globals;
1899 bfd_vma val;
1900 bfd_size_type amt;
1901
1902 globals = coff_arm_hash_table (info);
1903
1904 BFD_ASSERT (globals != NULL);
1905 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1906
1907 s = bfd_get_section_by_name
1908 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1909
1910 BFD_ASSERT (s != NULL);
1911
1912 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1913 tmp_name = bfd_malloc (amt);
1914
1915 BFD_ASSERT (tmp_name);
1916
1917 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1918
1919 myh = coff_link_hash_lookup
1920 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
1921
1922 if (myh != NULL)
1923 {
1924 free (tmp_name);
1925 /* We've already seen this guy. */
1926 return;
1927 }
1928
1929 bh = NULL;
1930 val = globals->thumb_glue_size + 1;
1931 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1932 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
1933
1934 /* If we mark it 'thumb', the disassembler will do a better job. */
1935 myh = (struct coff_link_hash_entry *) bh;
1936 myh->symbol_class = C_THUMBEXTFUNC;
1937
1938 free (tmp_name);
1939
1940 /* Allocate another symbol to mark where we switch to arm mode. */
1941
1942 #define CHANGE_TO_ARM "__%s_change_to_arm"
1943 #define BACK_FROM_ARM "__%s_back_from_arm"
1944
1945 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1;
1946 tmp_name = bfd_malloc (amt);
1947
1948 BFD_ASSERT (tmp_name);
1949
1950 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);
1951
1952 bh = NULL;
1953 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
1954 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
1955 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh);
1956
1957 free (tmp_name);
1958
1959 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
1960
1961 return;
1962 }
1963 #endif /* not ARM_WINCE */
1964
1965 /* Select a BFD to be used to hold the sections used by the glue code.
1966 This function is called from the linker scripts in ld/emultempl/
1967 {armcoff/pe}.em */
1968
1969 bfd_boolean
1970 bfd_arm_get_bfd_for_interworking (bfd * abfd,
1971 struct bfd_link_info * info)
1972 {
1973 struct coff_arm_link_hash_table * globals;
1974 flagword flags;
1975 asection * sec;
1976
1977 /* If we are only performing a partial link do not bother
1978 getting a bfd to hold the glue. */
1979 if (info->relocatable)
1980 return TRUE;
1981
1982 globals = coff_arm_hash_table (info);
1983
1984 BFD_ASSERT (globals != NULL);
1985
1986 if (globals->bfd_of_glue_owner != NULL)
1987 return TRUE;
1988
1989 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
1990
1991 if (sec == NULL)
1992 {
1993 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
1994 | SEC_CODE | SEC_READONLY);
1995 sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME,
1996 flags);
1997 if (sec == NULL
1998 || ! bfd_set_section_alignment (abfd, sec, 2))
1999 return FALSE;
2000 }
2001
2002 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
2003
2004 if (sec == NULL)
2005 {
2006 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
2007 | SEC_CODE | SEC_READONLY);
2008 sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME,
2009 flags);
2010
2011 if (sec == NULL
2012 || ! bfd_set_section_alignment (abfd, sec, 2))
2013 return FALSE;
2014 }
2015
2016 /* Save the bfd for later use. */
2017 globals->bfd_of_glue_owner = abfd;
2018
2019 return TRUE;
2020 }
2021
2022 bfd_boolean
2023 bfd_arm_process_before_allocation (bfd * abfd,
2024 struct bfd_link_info * info,
2025 int support_old_code)
2026 {
2027 asection * sec;
2028 struct coff_arm_link_hash_table * globals;
2029
2030 /* If we are only performing a partial link do not bother
2031 to construct any glue. */
2032 if (info->relocatable)
2033 return TRUE;
2034
2035 /* Here we have a bfd that is to be included on the link. We have a hook
2036 to do reloc rummaging, before section sizes are nailed down. */
2037 _bfd_coff_get_external_symbols (abfd);
2038
2039 globals = coff_arm_hash_table (info);
2040
2041 BFD_ASSERT (globals != NULL);
2042 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2043
2044 globals->support_old_code = support_old_code;
2045
2046 /* Rummage around all the relocs and map the glue vectors. */
2047 sec = abfd->sections;
2048
2049 if (sec == NULL)
2050 return TRUE;
2051
2052 for (; sec != NULL; sec = sec->next)
2053 {
2054 struct internal_reloc * i;
2055 struct internal_reloc * rel;
2056
2057 if (sec->reloc_count == 0)
2058 continue;
2059
2060 /* Load the relocs. */
2061 /* FIXME: there may be a storage leak here. */
2062 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);
2063
2064 BFD_ASSERT (i != 0);
2065
2066 for (rel = i; rel < i + sec->reloc_count; ++rel)
2067 {
2068 unsigned short r_type = rel->r_type;
2069 long symndx;
2070 struct coff_link_hash_entry * h;
2071
2072 symndx = rel->r_symndx;
2073
2074 /* If the relocation is not against a symbol it cannot concern us. */
2075 if (symndx == -1)
2076 continue;
2077
2078 /* If the index is outside of the range of our table, something has gone wrong. */
2079 if (symndx >= obj_conv_table_size (abfd))
2080 {
2081 _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"),
2082 abfd, symndx);
2083 continue;
2084 }
2085
2086 h = obj_coff_sym_hashes (abfd)[symndx];
2087
2088 /* If the relocation is against a static symbol it must be within
2089 the current section and so cannot be a cross ARM/Thumb relocation. */
2090 if (h == NULL)
2091 continue;
2092
2093 switch (r_type)
2094 {
2095 case ARM_26:
2096 /* This one is a call from arm code. We need to look up
2097 the target of the call. If it is a thumb target, we
2098 insert glue. */
2099
2100 if (h->symbol_class == C_THUMBEXTFUNC)
2101 record_arm_to_thumb_glue (info, h);
2102 break;
2103
2104 #ifndef ARM_WINCE
2105 case ARM_THUMB23:
2106 /* This one is a call from thumb code. We used to look
2107 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look
2108 up the target of the call. If it is an arm target, we
2109 insert glue. If the symbol does not exist it will be
2110 given a class of C_EXT and so we will generate a stub
2111 for it. This is not really a problem, since the link
2112 is doomed anyway. */
2113
2114 switch (h->symbol_class)
2115 {
2116 case C_EXT:
2117 case C_STAT:
2118 case C_LABEL:
2119 record_thumb_to_arm_glue (info, h);
2120 break;
2121 default:
2122 ;
2123 }
2124 break;
2125 #endif
2126
2127 default:
2128 break;
2129 }
2130 }
2131 }
2132
2133 return TRUE;
2134 }
2135
2136 #endif /* ! defined (COFF_IMAGE_WITH_PE) */
2137
2138 #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup
2139 #define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup
2140 #define coff_relocate_section coff_arm_relocate_section
2141 #define coff_bfd_is_local_label_name coff_arm_is_local_label_name
2142 #define coff_adjust_symndx coff_arm_adjust_symndx
2143 #define coff_link_output_has_begun coff_arm_link_output_has_begun
2144 #define coff_final_link_postscript coff_arm_final_link_postscript
2145 #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data
2146 #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data
2147 #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags
2148 #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data
2149 #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create
2150
2151 /* When doing a relocatable link, we want to convert ARM_26 relocs
2152 into ARM_26D relocs. */
2153
2154 static bfd_boolean
2155 coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED,
2156 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2157 bfd *ibfd,
2158 asection *sec,
2159 struct internal_reloc *irel,
2160 bfd_boolean *adjustedp)
2161 {
2162 if (irel->r_type == ARM_26)
2163 {
2164 struct coff_link_hash_entry *h;
2165
2166 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
2167 if (h != NULL
2168 && (h->root.type == bfd_link_hash_defined
2169 || h->root.type == bfd_link_hash_defweak)
2170 && h->root.u.def.section->output_section == sec->output_section)
2171 irel->r_type = ARM_26D;
2172 }
2173 *adjustedp = FALSE;
2174 return TRUE;
2175 }
2176
2177 /* Called when merging the private data areas of two BFDs.
2178 This is important as it allows us to detect if we are
2179 attempting to merge binaries compiled for different ARM
2180 targets, eg different CPUs or different APCS's. */
2181
2182 static bfd_boolean
2183 coff_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
2184 {
2185 BFD_ASSERT (ibfd != NULL && obfd != NULL);
2186
2187 if (ibfd == obfd)
2188 return TRUE;
2189
2190 /* If the two formats are different we cannot merge anything.
2191 This is not an error, since it is permissable to change the
2192 input and output formats. */
2193 if ( ibfd->xvec->flavour != bfd_target_coff_flavour
2194 || obfd->xvec->flavour != bfd_target_coff_flavour)
2195 return TRUE;
2196
2197 /* Determine what should happen if the input ARM architecture
2198 does not match the output ARM architecture. */
2199 if (! bfd_arm_merge_machines (ibfd, obfd))
2200 return FALSE;
2201
2202 /* Verify that the APCS is the same for the two BFDs. */
2203 if (APCS_SET (ibfd))
2204 {
2205 if (APCS_SET (obfd))
2206 {
2207 /* If the src and dest have different APCS flag bits set, fail. */
2208 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
2209 {
2210 _bfd_error_handler
2211 /* xgettext: c-format */
2212 (_("error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
2213 ibfd, obfd,
2214 APCS_26_FLAG (ibfd) ? 26 : 32,
2215 APCS_26_FLAG (obfd) ? 26 : 32
2216 );
2217
2218 bfd_set_error (bfd_error_wrong_format);
2219 return FALSE;
2220 }
2221
2222 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
2223 {
2224 const char *msg;
2225
2226 if (APCS_FLOAT_FLAG (ibfd))
2227 /* xgettext: c-format */
2228 msg = _("error: %B passes floats in float registers, whereas %B passes them in integer registers");
2229 else
2230 /* xgettext: c-format */
2231 msg = _("error: %B passes floats in integer registers, whereas %B passes them in float registers");
2232
2233 _bfd_error_handler (msg, ibfd, obfd);
2234
2235 bfd_set_error (bfd_error_wrong_format);
2236 return FALSE;
2237 }
2238
2239 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
2240 {
2241 const char * msg;
2242
2243 if (PIC_FLAG (ibfd))
2244 /* xgettext: c-format */
2245 msg = _("error: %B is compiled as position independent code, whereas target %B is absolute position");
2246 else
2247 /* xgettext: c-format */
2248 msg = _("error: %B is compiled as absolute position code, whereas target %B is position independent");
2249 _bfd_error_handler (msg, ibfd, obfd);
2250
2251 bfd_set_error (bfd_error_wrong_format);
2252 return FALSE;
2253 }
2254 }
2255 else
2256 {
2257 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));
2258
2259 /* Set up the arch and fields as well as these are probably wrong. */
2260 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2261 }
2262 }
2263
2264 /* Check the interworking support. */
2265 if (INTERWORK_SET (ibfd))
2266 {
2267 if (INTERWORK_SET (obfd))
2268 {
2269 /* If the src and dest differ in their interworking issue a warning. */
2270 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
2271 {
2272 const char * msg;
2273
2274 if (INTERWORK_FLAG (ibfd))
2275 /* xgettext: c-format */
2276 msg = _("Warning: %B supports interworking, whereas %B does not");
2277 else
2278 /* xgettext: c-format */
2279 msg = _("Warning: %B does not support interworking, whereas %B does");
2280
2281 _bfd_error_handler (msg, ibfd, obfd);
2282 }
2283 }
2284 else
2285 {
2286 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
2287 }
2288 }
2289
2290 return TRUE;
2291 }
2292
2293 /* Display the flags field. */
2294
2295 static bfd_boolean
2296 coff_arm_print_private_bfd_data (bfd * abfd, void * ptr)
2297 {
2298 FILE * file = (FILE *) ptr;
2299
2300 BFD_ASSERT (abfd != NULL && ptr != NULL);
2301
2302 /* xgettext:c-format */
2303 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags);
2304
2305 if (APCS_SET (abfd))
2306 {
2307 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */
2308 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);
2309
2310 if (APCS_FLOAT_FLAG (abfd))
2311 fprintf (file, _(" [floats passed in float registers]"));
2312 else
2313 fprintf (file, _(" [floats passed in integer registers]"));
2314
2315 if (PIC_FLAG (abfd))
2316 fprintf (file, _(" [position independent]"));
2317 else
2318 fprintf (file, _(" [absolute position]"));
2319 }
2320
2321 if (! INTERWORK_SET (abfd))
2322 fprintf (file, _(" [interworking flag not initialised]"));
2323 else if (INTERWORK_FLAG (abfd))
2324 fprintf (file, _(" [interworking supported]"));
2325 else
2326 fprintf (file, _(" [interworking not supported]"));
2327
2328 fputc ('\n', file);
2329
2330 return TRUE;
2331 }
2332
2333 /* Copies the given flags into the coff_tdata.flags field.
2334 Typically these flags come from the f_flags[] field of
2335 the COFF filehdr structure, which contains important,
2336 target specific information.
2337 Note: Although this function is static, it is explicitly
2338 called from both coffcode.h and peicode.h. */
2339
2340 static bfd_boolean
2341 _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags)
2342 {
2343 flagword flag;
2344
2345 BFD_ASSERT (abfd != NULL);
2346
2347 flag = (flags & F_APCS26) ? F_APCS_26 : 0;
2348
2349 /* Make sure that the APCS field has not been initialised to the opposite
2350 value. */
2351 if (APCS_SET (abfd)
2352 && ( (APCS_26_FLAG (abfd) != flag)
2353 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
2354 || (PIC_FLAG (abfd) != (flags & F_PIC))
2355 ))
2356 return FALSE;
2357
2358 flag |= (flags & (F_APCS_FLOAT | F_PIC));
2359
2360 SET_APCS_FLAGS (abfd, flag);
2361
2362 flag = (flags & F_INTERWORK);
2363
2364 /* If the BFD has already had its interworking flag set, but it
2365 is different from the value that we have been asked to set,
2366 then assume that that merged code will not support interworking
2367 and set the flag accordingly. */
2368 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
2369 {
2370 if (flag)
2371 /* xgettext: c-format */
2372 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
2373 abfd);
2374 else
2375 /* xgettext: c-format */
2376 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"),
2377 abfd);
2378 flag = 0;
2379 }
2380
2381 SET_INTERWORK_FLAG (abfd, flag);
2382
2383 return TRUE;
2384 }
2385
2386 /* Copy the important parts of the target specific data
2387 from one instance of a BFD to another. */
2388
2389 static bfd_boolean
2390 coff_arm_copy_private_bfd_data (bfd * src, bfd * dest)
2391 {
2392 BFD_ASSERT (src != NULL && dest != NULL);
2393
2394 if (src == dest)
2395 return TRUE;
2396
2397 /* If the destination is not in the same format as the source, do not do
2398 the copy. */
2399 if (src->xvec != dest->xvec)
2400 return TRUE;
2401
2402 /* Copy the flags field. */
2403 if (APCS_SET (src))
2404 {
2405 if (APCS_SET (dest))
2406 {
2407 /* If the src and dest have different APCS flag bits set, fail. */
2408 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
2409 return FALSE;
2410
2411 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
2412 return FALSE;
2413
2414 if (PIC_FLAG (dest) != PIC_FLAG (src))
2415 return FALSE;
2416 }
2417 else
2418 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src)
2419 | PIC_FLAG (src));
2420 }
2421
2422 if (INTERWORK_SET (src))
2423 {
2424 if (INTERWORK_SET (dest))
2425 {
2426 /* If the src and dest have different interworking flags then turn
2427 off the interworking bit. */
2428 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
2429 {
2430 if (INTERWORK_FLAG (dest))
2431 {
2432 /* xgettext:c-format */
2433 _bfd_error_handler (("\
2434 Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
2435 dest, src);
2436 }
2437
2438 SET_INTERWORK_FLAG (dest, 0);
2439 }
2440 }
2441 else
2442 {
2443 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
2444 }
2445 }
2446
2447 return TRUE;
2448 }
2449
2450 /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
2451 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */
2452 #ifndef LOCAL_LABEL_PREFIX
2453 #define LOCAL_LABEL_PREFIX ""
2454 #endif
2455 #ifndef USER_LABEL_PREFIX
2456 #define USER_LABEL_PREFIX "_"
2457 #endif
2458
2459 /* Like _bfd_coff_is_local_label_name, but
2460 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be
2461 non-local.
2462 b) Allow other prefixes than ".", e.g. an empty prefix would cause all
2463 labels of the form Lxxx to be stripped. */
2464
2465 static bfd_boolean
2466 coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED,
2467 const char * name)
2468 {
2469 #ifdef USER_LABEL_PREFIX
2470 if (USER_LABEL_PREFIX[0] != 0)
2471 {
2472 size_t len = strlen (USER_LABEL_PREFIX);
2473
2474 if (strncmp (name, USER_LABEL_PREFIX, len) == 0)
2475 return FALSE;
2476 }
2477 #endif
2478
2479 #ifdef LOCAL_LABEL_PREFIX
2480 /* If there is a prefix for local labels then look for this.
2481 If the prefix exists, but it is empty, then ignore the test. */
2482
2483 if (LOCAL_LABEL_PREFIX[0] != 0)
2484 {
2485 size_t len = strlen (LOCAL_LABEL_PREFIX);
2486
2487 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0)
2488 return FALSE;
2489
2490 /* Perform the checks below for the rest of the name. */
2491 name += len;
2492 }
2493 #endif
2494
2495 return name[0] == 'L';
2496 }
2497
2498 /* This piece of machinery exists only to guarantee that the bfd that holds
2499 the glue section is written last.
2500
2501 This does depend on bfd_make_section attaching a new section to the
2502 end of the section list for the bfd. */
2503
2504 static bfd_boolean
2505 coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info)
2506 {
2507 return (sub->output_has_begun
2508 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner);
2509 }
2510
2511 static bfd_boolean
2512 coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED,
2513 struct coff_final_link_info * pfinfo)
2514 {
2515 struct coff_arm_link_hash_table * globals;
2516
2517 globals = coff_arm_hash_table (pfinfo->info);
2518
2519 BFD_ASSERT (globals != NULL);
2520
2521 if (globals->bfd_of_glue_owner != NULL)
2522 {
2523 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner))
2524 return FALSE;
2525
2526 globals->bfd_of_glue_owner->output_has_begun = TRUE;
2527 }
2528
2529 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
2530 }
2531
2532 #ifndef bfd_pe_print_pdata
2533 #define bfd_pe_print_pdata NULL
2534 #endif
2535
2536 #include "coffcode.h"
2537
2538 #ifndef TARGET_LITTLE_SYM
2539 #define TARGET_LITTLE_SYM armcoff_little_vec
2540 #endif
2541 #ifndef TARGET_LITTLE_NAME
2542 #define TARGET_LITTLE_NAME "coff-arm-little"
2543 #endif
2544 #ifndef TARGET_BIG_SYM
2545 #define TARGET_BIG_SYM armcoff_big_vec
2546 #endif
2547 #ifndef TARGET_BIG_NAME
2548 #define TARGET_BIG_NAME "coff-arm-big"
2549 #endif
2550
2551 #ifndef TARGET_UNDERSCORE
2552 #define TARGET_UNDERSCORE 0
2553 #endif
2554
2555 #ifndef EXTRA_S_FLAGS
2556 #ifdef COFF_WITH_PE
2557 #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES)
2558 #else
2559 #define EXTRA_S_FLAGS SEC_CODE
2560 #endif
2561 #endif
2562
2563 /* Forward declaration for use initialising alternative_target field. */
2564 extern const bfd_target TARGET_BIG_SYM ;
2565
2566 /* Target vectors. */
2567 CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE)
2568 CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE)
2569