coff-arm.c revision 1.1.1.3
1 /* BFD back-end for ARM COFF files. 2 Copyright (C) 1990-2016 Free Software Foundation, Inc. 3 Written by Cygnus Support. 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 20 MA 02110-1301, USA. */ 21 22 #include "sysdep.h" 23 #include "bfd.h" 24 #include "libbfd.h" 25 #include "coff/arm.h" 26 #include "coff/internal.h" 27 28 #ifdef COFF_WITH_PE 29 #include "coff/pe.h" 30 #endif 31 32 #include "libcoff.h" 33 34 /* Macros for manipulation the bits in the flags field of the coff data 35 structure. */ 36 #define APCS_26_FLAG(abfd) \ 37 (coff_data (abfd)->flags & F_APCS_26) 38 39 #define APCS_FLOAT_FLAG(abfd) \ 40 (coff_data (abfd)->flags & F_APCS_FLOAT) 41 42 #define PIC_FLAG(abfd) \ 43 (coff_data (abfd)->flags & F_PIC) 44 45 #define APCS_SET(abfd) \ 46 (coff_data (abfd)->flags & F_APCS_SET) 47 48 #define SET_APCS_FLAGS(abfd, flgs) \ 49 do \ 50 { \ 51 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \ 52 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \ 53 } \ 54 while (0) 55 56 #define INTERWORK_FLAG(abfd) \ 57 (coff_data (abfd)->flags & F_INTERWORK) 58 59 #define INTERWORK_SET(abfd) \ 60 (coff_data (abfd)->flags & F_INTERWORK_SET) 61 62 #define SET_INTERWORK_FLAG(abfd, flg) \ 63 do \ 64 { \ 65 coff_data (abfd)->flags &= ~F_INTERWORK; \ 66 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \ 67 } \ 68 while (0) 69 70 #ifndef NUM_ELEM 71 #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0])) 72 #endif 73 74 typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype; 75 /* Some typedefs for holding instructions. */ 76 typedef unsigned long int insn32; 77 typedef unsigned short int insn16; 78 79 /* The linker script knows the section names for placement. 80 The entry_names are used to do simple name mangling on the stubs. 81 Given a function name, and its type, the stub can be found. The 82 name can be changed. The only requirement is the %s be present. */ 83 84 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" 85 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" 86 87 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" 88 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" 89 90 /* Used by the assembler. */ 91 92 static bfd_reloc_status_type 93 coff_arm_reloc (bfd *abfd, 94 arelent *reloc_entry, 95 asymbol *symbol ATTRIBUTE_UNUSED, 96 void * data, 97 asection *input_section ATTRIBUTE_UNUSED, 98 bfd *output_bfd, 99 char **error_message ATTRIBUTE_UNUSED) 100 { 101 symvalue diff; 102 103 if (output_bfd == NULL) 104 return bfd_reloc_continue; 105 106 diff = reloc_entry->addend; 107 108 #define DOIT(x) \ 109 x = ((x & ~howto->dst_mask) \ 110 | (((x & howto->src_mask) + diff) & howto->dst_mask)) 111 112 if (diff != 0) 113 { 114 reloc_howto_type *howto = reloc_entry->howto; 115 unsigned char *addr = (unsigned char *) data + reloc_entry->address; 116 117 switch (howto->size) 118 { 119 case 0: 120 { 121 char x = bfd_get_8 (abfd, addr); 122 DOIT (x); 123 bfd_put_8 (abfd, x, addr); 124 } 125 break; 126 127 case 1: 128 { 129 short x = bfd_get_16 (abfd, addr); 130 DOIT (x); 131 bfd_put_16 (abfd, (bfd_vma) x, addr); 132 } 133 break; 134 135 case 2: 136 { 137 long x = bfd_get_32 (abfd, addr); 138 DOIT (x); 139 bfd_put_32 (abfd, (bfd_vma) x, addr); 140 } 141 break; 142 143 default: 144 abort (); 145 } 146 } 147 148 /* Now let bfd_perform_relocation finish everything up. */ 149 return bfd_reloc_continue; 150 } 151 152 /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name() 153 in this file), then TARGET_UNDERSCORE should be defined, otherwise it 154 should not. */ 155 #ifndef TARGET_UNDERSCORE 156 #define TARGET_UNDERSCORE '_' 157 #endif 158 159 #ifndef PCRELOFFSET 160 #define PCRELOFFSET TRUE 161 #endif 162 163 /* These most certainly belong somewhere else. Just had to get rid of 164 the manifest constants in the code. */ 165 166 #ifdef ARM_WINCE 167 168 #define ARM_26D 0 169 #define ARM_32 1 170 #define ARM_RVA32 2 171 #define ARM_26 3 172 #define ARM_THUMB12 4 173 #define ARM_SECTION 14 174 #define ARM_SECREL 15 175 176 #else 177 178 #define ARM_8 0 179 #define ARM_16 1 180 #define ARM_32 2 181 #define ARM_26 3 182 #define ARM_DISP8 4 183 #define ARM_DISP16 5 184 #define ARM_DISP32 6 185 #define ARM_26D 7 186 /* 8 is unused. */ 187 #define ARM_NEG16 9 188 #define ARM_NEG32 10 189 #define ARM_RVA32 11 190 #define ARM_THUMB9 12 191 #define ARM_THUMB12 13 192 #define ARM_THUMB23 14 193 194 #endif 195 196 static bfd_reloc_status_type aoutarm_fix_pcrel_26_done 197 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 198 static bfd_reloc_status_type aoutarm_fix_pcrel_26 199 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 200 static bfd_reloc_status_type coff_thumb_pcrel_12 201 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 202 #ifndef ARM_WINCE 203 static bfd_reloc_status_type coff_thumb_pcrel_9 204 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 205 static bfd_reloc_status_type coff_thumb_pcrel_23 206 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); 207 #endif 208 209 static reloc_howto_type aoutarm_std_reloc_howto[] = 210 { 211 #ifdef ARM_WINCE 212 HOWTO (ARM_26D, 213 2, 214 2, 215 24, 216 TRUE, 217 0, 218 complain_overflow_dont, 219 aoutarm_fix_pcrel_26_done, 220 "ARM_26D", 221 TRUE, /* partial_inplace. */ 222 0x00ffffff, 223 0x0, 224 PCRELOFFSET), 225 HOWTO (ARM_32, 226 0, 227 2, 228 32, 229 FALSE, 230 0, 231 complain_overflow_bitfield, 232 coff_arm_reloc, 233 "ARM_32", 234 TRUE, /* partial_inplace. */ 235 0xffffffff, 236 0xffffffff, 237 PCRELOFFSET), 238 HOWTO (ARM_RVA32, 239 0, 240 2, 241 32, 242 FALSE, 243 0, 244 complain_overflow_bitfield, 245 coff_arm_reloc, 246 "ARM_RVA32", 247 TRUE, /* partial_inplace. */ 248 0xffffffff, 249 0xffffffff, 250 PCRELOFFSET), 251 HOWTO (ARM_26, 252 2, 253 2, 254 24, 255 TRUE, 256 0, 257 complain_overflow_signed, 258 aoutarm_fix_pcrel_26 , 259 "ARM_26", 260 FALSE, 261 0x00ffffff, 262 0x00ffffff, 263 PCRELOFFSET), 264 HOWTO (ARM_THUMB12, 265 1, 266 1, 267 11, 268 TRUE, 269 0, 270 complain_overflow_signed, 271 coff_thumb_pcrel_12 , 272 "ARM_THUMB12", 273 FALSE, 274 0x000007ff, 275 0x000007ff, 276 PCRELOFFSET), 277 EMPTY_HOWTO (-1), 278 EMPTY_HOWTO (-1), 279 EMPTY_HOWTO (-1), 280 EMPTY_HOWTO (-1), 281 EMPTY_HOWTO (-1), 282 EMPTY_HOWTO (-1), 283 EMPTY_HOWTO (-1), 284 EMPTY_HOWTO (-1), 285 EMPTY_HOWTO (-1), 286 HOWTO (ARM_SECTION, 287 0, 288 1, 289 16, 290 FALSE, 291 0, 292 complain_overflow_bitfield, 293 coff_arm_reloc, 294 "ARM_SECTION", 295 TRUE, /* partial_inplace. */ 296 0x0000ffff, 297 0x0000ffff, 298 PCRELOFFSET), 299 HOWTO (ARM_SECREL, 300 0, 301 2, 302 32, 303 FALSE, 304 0, 305 complain_overflow_bitfield, 306 coff_arm_reloc, 307 "ARM_SECREL", 308 TRUE, /* partial_inplace. */ 309 0xffffffff, 310 0xffffffff, 311 PCRELOFFSET), 312 #else /* not ARM_WINCE */ 313 HOWTO (ARM_8, 314 0, 315 0, 316 8, 317 FALSE, 318 0, 319 complain_overflow_bitfield, 320 coff_arm_reloc, 321 "ARM_8", 322 TRUE, 323 0x000000ff, 324 0x000000ff, 325 PCRELOFFSET), 326 HOWTO (ARM_16, 327 0, 328 1, 329 16, 330 FALSE, 331 0, 332 complain_overflow_bitfield, 333 coff_arm_reloc, 334 "ARM_16", 335 TRUE, 336 0x0000ffff, 337 0x0000ffff, 338 PCRELOFFSET), 339 HOWTO (ARM_32, 340 0, 341 2, 342 32, 343 FALSE, 344 0, 345 complain_overflow_bitfield, 346 coff_arm_reloc, 347 "ARM_32", 348 TRUE, 349 0xffffffff, 350 0xffffffff, 351 PCRELOFFSET), 352 HOWTO (ARM_26, 353 2, 354 2, 355 24, 356 TRUE, 357 0, 358 complain_overflow_signed, 359 aoutarm_fix_pcrel_26 , 360 "ARM_26", 361 FALSE, 362 0x00ffffff, 363 0x00ffffff, 364 PCRELOFFSET), 365 HOWTO (ARM_DISP8, 366 0, 367 0, 368 8, 369 TRUE, 370 0, 371 complain_overflow_signed, 372 coff_arm_reloc, 373 "ARM_DISP8", 374 TRUE, 375 0x000000ff, 376 0x000000ff, 377 TRUE), 378 HOWTO (ARM_DISP16, 379 0, 380 1, 381 16, 382 TRUE, 383 0, 384 complain_overflow_signed, 385 coff_arm_reloc, 386 "ARM_DISP16", 387 TRUE, 388 0x0000ffff, 389 0x0000ffff, 390 TRUE), 391 HOWTO (ARM_DISP32, 392 0, 393 2, 394 32, 395 TRUE, 396 0, 397 complain_overflow_signed, 398 coff_arm_reloc, 399 "ARM_DISP32", 400 TRUE, 401 0xffffffff, 402 0xffffffff, 403 TRUE), 404 HOWTO (ARM_26D, 405 2, 406 2, 407 24, 408 FALSE, 409 0, 410 complain_overflow_dont, 411 aoutarm_fix_pcrel_26_done, 412 "ARM_26D", 413 TRUE, 414 0x00ffffff, 415 0x0, 416 FALSE), 417 /* 8 is unused */ 418 EMPTY_HOWTO (-1), 419 HOWTO (ARM_NEG16, 420 0, 421 -1, 422 16, 423 FALSE, 424 0, 425 complain_overflow_bitfield, 426 coff_arm_reloc, 427 "ARM_NEG16", 428 TRUE, 429 0x0000ffff, 430 0x0000ffff, 431 FALSE), 432 HOWTO (ARM_NEG32, 433 0, 434 -2, 435 32, 436 FALSE, 437 0, 438 complain_overflow_bitfield, 439 coff_arm_reloc, 440 "ARM_NEG32", 441 TRUE, 442 0xffffffff, 443 0xffffffff, 444 FALSE), 445 HOWTO (ARM_RVA32, 446 0, 447 2, 448 32, 449 FALSE, 450 0, 451 complain_overflow_bitfield, 452 coff_arm_reloc, 453 "ARM_RVA32", 454 TRUE, 455 0xffffffff, 456 0xffffffff, 457 PCRELOFFSET), 458 HOWTO (ARM_THUMB9, 459 1, 460 1, 461 8, 462 TRUE, 463 0, 464 complain_overflow_signed, 465 coff_thumb_pcrel_9 , 466 "ARM_THUMB9", 467 FALSE, 468 0x000000ff, 469 0x000000ff, 470 PCRELOFFSET), 471 HOWTO (ARM_THUMB12, 472 1, 473 1, 474 11, 475 TRUE, 476 0, 477 complain_overflow_signed, 478 coff_thumb_pcrel_12 , 479 "ARM_THUMB12", 480 FALSE, 481 0x000007ff, 482 0x000007ff, 483 PCRELOFFSET), 484 HOWTO (ARM_THUMB23, 485 1, 486 2, 487 22, 488 TRUE, 489 0, 490 complain_overflow_signed, 491 coff_thumb_pcrel_23 , 492 "ARM_THUMB23", 493 FALSE, 494 0x07ff07ff, 495 0x07ff07ff, 496 PCRELOFFSET) 497 #endif /* not ARM_WINCE */ 498 }; 499 500 #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto) 501 502 #ifdef COFF_WITH_PE 503 /* Return TRUE if this relocation should 504 appear in the output .reloc section. */ 505 506 static bfd_boolean 507 in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED, 508 reloc_howto_type * howto) 509 { 510 return !howto->pc_relative && howto->type != ARM_RVA32; 511 } 512 #endif 513 514 #define RTYPE2HOWTO(cache_ptr, dst) \ 515 (cache_ptr)->howto = \ 516 (dst)->r_type < NUM_RELOCS \ 517 ? aoutarm_std_reloc_howto + (dst)->r_type \ 518 : NULL 519 520 #define coff_rtype_to_howto coff_arm_rtype_to_howto 521 522 static reloc_howto_type * 523 coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED, 524 asection *sec, 525 struct internal_reloc *rel, 526 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED, 527 struct internal_syment *sym ATTRIBUTE_UNUSED, 528 bfd_vma *addendp) 529 { 530 reloc_howto_type * howto; 531 532 if (rel->r_type >= NUM_RELOCS) 533 return NULL; 534 535 howto = aoutarm_std_reloc_howto + rel->r_type; 536 537 if (rel->r_type == ARM_RVA32) 538 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase; 539 540 #if defined COFF_WITH_PE && defined ARM_WINCE 541 if (rel->r_type == ARM_SECREL) 542 { 543 bfd_vma osect_vma; 544 545 if (h && (h->type == bfd_link_hash_defined 546 || h->type == bfd_link_hash_defweak)) 547 osect_vma = h->root.u.def.section->output_section->vma; 548 else 549 { 550 int i; 551 552 /* Sigh, the only way to get the section to offset against 553 is to find it the hard way. */ 554 555 for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++) 556 sec = sec->next; 557 558 osect_vma = sec->output_section->vma; 559 } 560 561 *addendp -= osect_vma; 562 } 563 #endif 564 565 return howto; 566 } 567 568 /* Used by the assembler. */ 569 570 static bfd_reloc_status_type 571 aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED, 572 arelent *reloc_entry ATTRIBUTE_UNUSED, 573 asymbol *symbol ATTRIBUTE_UNUSED, 574 void * data ATTRIBUTE_UNUSED, 575 asection *input_section ATTRIBUTE_UNUSED, 576 bfd *output_bfd ATTRIBUTE_UNUSED, 577 char **error_message ATTRIBUTE_UNUSED) 578 { 579 /* This is dead simple at present. */ 580 return bfd_reloc_ok; 581 } 582 583 /* Used by the assembler. */ 584 585 static bfd_reloc_status_type 586 aoutarm_fix_pcrel_26 (bfd *abfd, 587 arelent *reloc_entry, 588 asymbol *symbol, 589 void * data, 590 asection *input_section, 591 bfd *output_bfd, 592 char **error_message ATTRIBUTE_UNUSED) 593 { 594 bfd_vma relocation; 595 bfd_size_type addr = reloc_entry->address; 596 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); 597 bfd_reloc_status_type flag = bfd_reloc_ok; 598 599 /* If this is an undefined symbol, return error. */ 600 if (bfd_is_und_section (symbol->section) 601 && (symbol->flags & BSF_WEAK) == 0) 602 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; 603 604 /* If the sections are different, and we are doing a partial relocation, 605 just ignore it for now. */ 606 if (symbol->section->name != input_section->name 607 && output_bfd != (bfd *)NULL) 608 return bfd_reloc_continue; 609 610 relocation = (target & 0x00ffffff) << 2; 611 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */ 612 relocation += symbol->value; 613 relocation += symbol->section->output_section->vma; 614 relocation += symbol->section->output_offset; 615 relocation += reloc_entry->addend; 616 relocation -= input_section->output_section->vma; 617 relocation -= input_section->output_offset; 618 relocation -= addr; 619 620 if (relocation & 3) 621 return bfd_reloc_overflow; 622 623 /* Check for overflow. */ 624 if (relocation & 0x02000000) 625 { 626 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff) 627 flag = bfd_reloc_overflow; 628 } 629 else if (relocation & ~(bfd_vma) 0x03ffffff) 630 flag = bfd_reloc_overflow; 631 632 target &= ~0x00ffffff; 633 target |= (relocation >> 2) & 0x00ffffff; 634 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); 635 636 /* Now the ARM magic... Change the reloc type so that it is marked as done. 637 Strictly this is only necessary if we are doing a partial relocation. */ 638 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D]; 639 640 return flag; 641 } 642 643 static bfd_reloc_status_type 644 coff_thumb_pcrel_common (bfd *abfd, 645 arelent *reloc_entry, 646 asymbol *symbol, 647 void * data, 648 asection *input_section, 649 bfd *output_bfd, 650 char **error_message ATTRIBUTE_UNUSED, 651 thumb_pcrel_branchtype btype) 652 { 653 bfd_vma relocation = 0; 654 bfd_size_type addr = reloc_entry->address; 655 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); 656 bfd_reloc_status_type flag = bfd_reloc_ok; 657 bfd_vma dstmsk; 658 bfd_vma offmsk; 659 bfd_vma signbit; 660 661 /* NOTE: This routine is currently used by GAS, but not by the link 662 phase. */ 663 switch (btype) 664 { 665 case b9: 666 dstmsk = 0x000000ff; 667 offmsk = 0x000001fe; 668 signbit = 0x00000100; 669 break; 670 671 case b12: 672 dstmsk = 0x000007ff; 673 offmsk = 0x00000ffe; 674 signbit = 0x00000800; 675 break; 676 677 case b23: 678 dstmsk = 0x07ff07ff; 679 offmsk = 0x007fffff; 680 signbit = 0x00400000; 681 break; 682 683 default: 684 abort (); 685 } 686 687 /* If this is an undefined symbol, return error. */ 688 if (bfd_is_und_section (symbol->section) 689 && (symbol->flags & BSF_WEAK) == 0) 690 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; 691 692 /* If the sections are different, and we are doing a partial relocation, 693 just ignore it for now. */ 694 if (symbol->section->name != input_section->name 695 && output_bfd != (bfd *)NULL) 696 return bfd_reloc_continue; 697 698 switch (btype) 699 { 700 case b9: 701 case b12: 702 relocation = ((target & dstmsk) << 1); 703 break; 704 705 case b23: 706 if (bfd_big_endian (abfd)) 707 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4); 708 else 709 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15); 710 break; 711 712 default: 713 abort (); 714 } 715 716 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */ 717 relocation += symbol->value; 718 relocation += symbol->section->output_section->vma; 719 relocation += symbol->section->output_offset; 720 relocation += reloc_entry->addend; 721 relocation -= input_section->output_section->vma; 722 relocation -= input_section->output_offset; 723 relocation -= addr; 724 725 if (relocation & 1) 726 return bfd_reloc_overflow; 727 728 /* Check for overflow. */ 729 if (relocation & signbit) 730 { 731 if ((relocation & ~offmsk) != ~offmsk) 732 flag = bfd_reloc_overflow; 733 } 734 else if (relocation & ~offmsk) 735 flag = bfd_reloc_overflow; 736 737 target &= ~dstmsk; 738 switch (btype) 739 { 740 case b9: 741 case b12: 742 target |= (relocation >> 1); 743 break; 744 745 case b23: 746 if (bfd_big_endian (abfd)) 747 target |= (((relocation & 0xfff) >> 1) 748 | ((relocation << 4) & 0x07ff0000)); 749 else 750 target |= (((relocation & 0xffe) << 15) 751 | ((relocation >> 12) & 0x7ff)); 752 break; 753 754 default: 755 abort (); 756 } 757 758 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); 759 760 /* Now the ARM magic... Change the reloc type so that it is marked as done. 761 Strictly this is only necessary if we are doing a partial relocation. */ 762 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D]; 763 764 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */ 765 return flag; 766 } 767 768 #ifndef ARM_WINCE 769 static bfd_reloc_status_type 770 coff_thumb_pcrel_23 (bfd *abfd, 771 arelent *reloc_entry, 772 asymbol *symbol, 773 void * data, 774 asection *input_section, 775 bfd *output_bfd, 776 char **error_message) 777 { 778 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, 779 input_section, output_bfd, error_message, 780 b23); 781 } 782 783 static bfd_reloc_status_type 784 coff_thumb_pcrel_9 (bfd *abfd, 785 arelent *reloc_entry, 786 asymbol *symbol, 787 void * data, 788 asection *input_section, 789 bfd *output_bfd, 790 char **error_message) 791 { 792 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, 793 input_section, output_bfd, error_message, 794 b9); 795 } 796 #endif /* not ARM_WINCE */ 797 798 static bfd_reloc_status_type 799 coff_thumb_pcrel_12 (bfd *abfd, 800 arelent *reloc_entry, 801 asymbol *symbol, 802 void * data, 803 asection *input_section, 804 bfd *output_bfd, 805 char **error_message) 806 { 807 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, 808 input_section, output_bfd, error_message, 809 b12); 810 } 811 812 static const struct reloc_howto_struct * 813 coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) 814 { 815 #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j 816 817 if (code == BFD_RELOC_CTOR) 818 switch (bfd_arch_bits_per_address (abfd)) 819 { 820 case 32: 821 code = BFD_RELOC_32; 822 break; 823 default: 824 return NULL; 825 } 826 827 switch (code) 828 { 829 #ifdef ARM_WINCE 830 ASTD (BFD_RELOC_32, ARM_32); 831 ASTD (BFD_RELOC_RVA, ARM_RVA32); 832 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); 833 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); 834 ASTD (BFD_RELOC_32_SECREL, ARM_SECREL); 835 #else 836 ASTD (BFD_RELOC_8, ARM_8); 837 ASTD (BFD_RELOC_16, ARM_16); 838 ASTD (BFD_RELOC_32, ARM_32); 839 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); 840 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26); 841 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8); 842 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16); 843 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32); 844 ASTD (BFD_RELOC_RVA, ARM_RVA32); 845 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9); 846 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); 847 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23); 848 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23); 849 #endif 850 default: return NULL; 851 } 852 } 853 854 static reloc_howto_type * 855 coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, 856 const char *r_name) 857 { 858 unsigned int i; 859 860 for (i = 0; 861 i < (sizeof (aoutarm_std_reloc_howto) 862 / sizeof (aoutarm_std_reloc_howto[0])); 863 i++) 864 if (aoutarm_std_reloc_howto[i].name != NULL 865 && strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0) 866 return &aoutarm_std_reloc_howto[i]; 867 868 return NULL; 869 } 870 871 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2 872 #define COFF_PAGE_SIZE 0x1000 873 874 /* Turn a howto into a reloc nunmber. */ 875 #define SELECT_RELOC(x,howto) { x.r_type = howto->type; } 876 #define BADMAG(x) ARMBADMAG(x) 877 #define ARM 1 /* Customize coffcode.h. */ 878 879 #ifndef ARM_WINCE 880 /* Make sure that the 'r_offset' field is copied properly 881 so that identical binaries will compare the same. */ 882 #define SWAP_IN_RELOC_OFFSET H_GET_32 883 #define SWAP_OUT_RELOC_OFFSET H_PUT_32 884 #endif 885 886 /* Extend the coff_link_hash_table structure with a few ARM specific fields. 887 This allows us to store global data here without actually creating any 888 global variables, which is a no-no in the BFD world. */ 889 struct coff_arm_link_hash_table 890 { 891 /* The original coff_link_hash_table structure. MUST be first field. */ 892 struct coff_link_hash_table root; 893 894 /* The size in bytes of the section containing the Thumb-to-ARM glue. */ 895 bfd_size_type thumb_glue_size; 896 897 /* The size in bytes of the section containing the ARM-to-Thumb glue. */ 898 bfd_size_type arm_glue_size; 899 900 /* An arbitrary input BFD chosen to hold the glue sections. */ 901 bfd * bfd_of_glue_owner; 902 903 /* Support interworking with old, non-interworking aware ARM code. */ 904 int support_old_code; 905 }; 906 907 /* Get the ARM coff linker hash table from a link_info structure. */ 908 #define coff_arm_hash_table(info) \ 909 ((struct coff_arm_link_hash_table *) ((info)->hash)) 910 911 /* Create an ARM coff linker hash table. */ 912 913 static struct bfd_link_hash_table * 914 coff_arm_link_hash_table_create (bfd * abfd) 915 { 916 struct coff_arm_link_hash_table * ret; 917 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table); 918 919 ret = bfd_zmalloc (amt); 920 if (ret == NULL) 921 return NULL; 922 923 if (!_bfd_coff_link_hash_table_init (&ret->root, 924 abfd, 925 _bfd_coff_link_hash_newfunc, 926 sizeof (struct coff_link_hash_entry))) 927 { 928 free (ret); 929 return NULL; 930 } 931 932 return & ret->root.root; 933 } 934 935 static bfd_boolean 936 arm_emit_base_file_entry (struct bfd_link_info *info, 937 bfd *output_bfd, 938 asection *input_section, 939 bfd_vma reloc_offset) 940 { 941 bfd_vma addr = (reloc_offset 942 - input_section->vma 943 + input_section->output_offset 944 + input_section->output_section->vma); 945 946 if (coff_data (output_bfd)->pe) 947 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase; 948 if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1) 949 return TRUE; 950 951 bfd_set_error (bfd_error_system_call); 952 return FALSE; 953 } 954 955 #ifndef ARM_WINCE 957 /* The thumb form of a long branch is a bit finicky, because the offset 958 encoding is split over two fields, each in it's own instruction. They 959 can occur in any order. So given a thumb form of long branch, and an 960 offset, insert the offset into the thumb branch and return finished 961 instruction. 962 963 It takes two thumb instructions to encode the target address. Each has 964 11 bits to invest. The upper 11 bits are stored in one (identified by 965 H-0.. see below), the lower 11 bits are stored in the other (identified 966 by H-1). 967 968 Combine together and shifted left by 1 (it's a half word address) and 969 there you have it. 970 971 Op: 1111 = F, 972 H-0, upper address-0 = 000 973 Op: 1111 = F, 974 H-1, lower address-0 = 800 975 976 They can be ordered either way, but the arm tools I've seen always put 977 the lower one first. It probably doesn't matter. krk (at) cygnus.com 978 979 XXX: Actually the order does matter. The second instruction (H-1) 980 moves the computed address into the PC, so it must be the second one 981 in the sequence. The problem, however is that whilst little endian code 982 stores the instructions in HI then LOW order, big endian code does the 983 reverse. nickc (at) cygnus.com. */ 984 985 #define LOW_HI_ORDER 0xF800F000 986 #define HI_LOW_ORDER 0xF000F800 987 988 static insn32 989 insert_thumb_branch (insn32 br_insn, int rel_off) 990 { 991 unsigned int low_bits; 992 unsigned int high_bits; 993 994 BFD_ASSERT ((rel_off & 1) != 1); 995 996 rel_off >>= 1; /* Half word aligned address. */ 997 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */ 998 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */ 999 1000 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER) 1001 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits; 1002 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER) 1003 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits; 1004 else 1005 /* FIXME: the BFD library should never abort except for internal errors 1006 - it should return an error status. */ 1007 abort (); /* Error - not a valid branch instruction form. */ 1008 1009 return br_insn; 1010 } 1011 1012 1013 static struct coff_link_hash_entry * 1015 find_thumb_glue (struct bfd_link_info *info, 1016 const char *name, 1017 bfd *input_bfd) 1018 { 1019 char *tmp_name; 1020 struct coff_link_hash_entry *myh; 1021 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; 1022 1023 tmp_name = bfd_malloc (amt); 1024 1025 BFD_ASSERT (tmp_name); 1026 1027 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); 1028 1029 myh = coff_link_hash_lookup 1030 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1031 1032 if (myh == NULL) 1033 /* xgettext:c-format */ 1034 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"), 1035 input_bfd, tmp_name, name); 1036 1037 free (tmp_name); 1038 1039 return myh; 1040 } 1041 #endif /* not ARM_WINCE */ 1042 1043 static struct coff_link_hash_entry * 1044 find_arm_glue (struct bfd_link_info *info, 1045 const char *name, 1046 bfd *input_bfd) 1047 { 1048 char *tmp_name; 1049 struct coff_link_hash_entry * myh; 1050 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; 1051 1052 tmp_name = bfd_malloc (amt); 1053 1054 BFD_ASSERT (tmp_name); 1055 1056 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); 1057 1058 myh = coff_link_hash_lookup 1059 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1060 1061 if (myh == NULL) 1062 /* xgettext:c-format */ 1063 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"), 1064 input_bfd, tmp_name, name); 1065 1066 free (tmp_name); 1067 1068 return myh; 1069 } 1070 1071 /* 1072 ARM->Thumb glue: 1073 1074 .arm 1075 __func_from_arm: 1076 ldr r12, __func_addr 1077 bx r12 1078 __func_addr: 1079 .word func @ behave as if you saw a ARM_32 reloc 1080 */ 1081 1082 #define ARM2THUMB_GLUE_SIZE 12 1083 static const insn32 a2t1_ldr_insn = 0xe59fc000; 1084 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; 1085 static const insn32 a2t3_func_addr_insn = 0x00000001; 1086 1087 /* 1088 Thumb->ARM: Thumb->(non-interworking aware) ARM 1089 1090 .thumb .thumb 1091 .align 2 .align 2 1092 __func_from_thumb: __func_from_thumb: 1093 bx pc push {r6, lr} 1094 nop ldr r6, __func_addr 1095 .arm mov lr, pc 1096 __func_change_to_arm: bx r6 1097 b func .arm 1098 __func_back_to_thumb: 1099 ldmia r13! {r6, lr} 1100 bx lr 1101 __func_addr: 1102 .word func 1103 */ 1104 1105 #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8) 1106 #ifndef ARM_WINCE 1107 static const insn16 t2a1_bx_pc_insn = 0x4778; 1108 static const insn16 t2a2_noop_insn = 0x46c0; 1109 static const insn32 t2a3_b_insn = 0xea000000; 1110 1111 static const insn16 t2a1_push_insn = 0xb540; 1112 static const insn16 t2a2_ldr_insn = 0x4e03; 1113 static const insn16 t2a3_mov_insn = 0x46fe; 1114 static const insn16 t2a4_bx_insn = 0x4730; 1115 static const insn32 t2a5_pop_insn = 0xe8bd4040; 1116 static const insn32 t2a6_bx_insn = 0xe12fff1e; 1117 #endif 1118 1119 /* TODO: 1120 We should really create new local (static) symbols in destination 1121 object for each stub we create. We should also create local 1122 (static) symbols within the stubs when switching between ARM and 1123 Thumb code. This will ensure that the debugger and disassembler 1124 can present a better view of stubs. 1125 1126 We can treat stubs like literal sections, and for the THUMB9 ones 1127 (short addressing range) we should be able to insert the stubs 1128 between sections. i.e. the simplest approach (since relocations 1129 are done on a section basis) is to dump the stubs at the end of 1130 processing a section. That way we can always try and minimise the 1131 offset to and from a stub. However, this does not map well onto 1132 the way that the linker/BFD does its work: mapping all input 1133 sections to output sections via the linker script before doing 1134 all the processing. 1135 1136 Unfortunately it may be easier to just to disallow short range 1137 Thumb->ARM stubs (i.e. no conditional inter-working branches, 1138 only branch-and-link (BL) calls. This will simplify the processing 1139 since we can then put all of the stubs into their own section. 1140 1141 TODO: 1142 On a different subject, rather than complaining when a 1143 branch cannot fit in the number of bits available for the 1144 instruction we should generate a trampoline stub (needed to 1145 address the complete 32bit address space). */ 1146 1147 /* The standard COFF backend linker does not cope with the special 1148 Thumb BRANCH23 relocation. The alternative would be to split the 1149 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a 1150 bit simpler simply providing our own relocation driver. */ 1151 1152 /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE: 1153 This code is a very slightly modified copy of 1154 _bfd_coff_generic_relocate_section. It would be a much more 1155 maintainable solution to have a MACRO that could be expanded within 1156 _bfd_coff_generic_relocate_section that would only be provided for 1157 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that 1158 is different from the original. */ 1159 1160 static bfd_boolean 1161 coff_arm_relocate_section (bfd *output_bfd, 1162 struct bfd_link_info *info, 1163 bfd *input_bfd, 1164 asection *input_section, 1165 bfd_byte *contents, 1166 struct internal_reloc *relocs, 1167 struct internal_syment *syms, 1168 asection **sections) 1169 { 1170 struct internal_reloc * rel; 1171 struct internal_reloc * relend; 1172 #ifndef ARM_WINCE 1173 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section); 1174 #endif 1175 1176 rel = relocs; 1177 relend = rel + input_section->reloc_count; 1178 1179 for (; rel < relend; rel++) 1180 { 1181 int done = 0; 1182 long symndx; 1183 struct coff_link_hash_entry * h; 1184 struct internal_syment * sym; 1185 bfd_vma addend; 1186 bfd_vma val; 1187 reloc_howto_type * howto; 1188 bfd_reloc_status_type rstat; 1189 bfd_vma h_val; 1190 1191 symndx = rel->r_symndx; 1192 1193 if (symndx == -1) 1194 { 1195 h = NULL; 1196 sym = NULL; 1197 } 1198 else 1199 { 1200 h = obj_coff_sym_hashes (input_bfd)[symndx]; 1201 sym = syms + symndx; 1202 } 1203 1204 /* COFF treats common symbols in one of two ways. Either the 1205 size of the symbol is included in the section contents, or it 1206 is not. We assume that the size is not included, and force 1207 the rtype_to_howto function to adjust the addend as needed. */ 1208 1209 if (sym != NULL && sym->n_scnum != 0) 1210 addend = - sym->n_value; 1211 else 1212 addend = 0; 1213 1214 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h, 1215 sym, &addend); 1216 if (howto == NULL) 1217 return FALSE; 1218 1219 /* The relocation_section function will skip pcrel_offset relocs 1220 when doing a relocatable link. However, we want to convert 1221 ARM_26 to ARM_26D relocs if possible. We return a fake howto in 1222 this case without pcrel_offset set, and adjust the addend to 1223 compensate. 'partial_inplace' is also set, since we want 'done' 1224 relocations to be reflected in section's data. */ 1225 if (rel->r_type == ARM_26 1226 && h != NULL 1227 && bfd_link_relocatable (info) 1228 && (h->root.type == bfd_link_hash_defined 1229 || h->root.type == bfd_link_hash_defweak) 1230 && (h->root.u.def.section->output_section 1231 == input_section->output_section)) 1232 { 1233 static reloc_howto_type fake_arm26_reloc = 1234 HOWTO (ARM_26, 1235 2, 1236 2, 1237 24, 1238 TRUE, 1239 0, 1240 complain_overflow_signed, 1241 aoutarm_fix_pcrel_26 , 1242 "ARM_26", 1243 TRUE, 1244 0x00ffffff, 1245 0x00ffffff, 1246 FALSE); 1247 1248 addend -= rel->r_vaddr - input_section->vma; 1249 #ifdef ARM_WINCE 1250 /* FIXME: I don't know why, but the hack is necessary for correct 1251 generation of bl's instruction offset. */ 1252 addend -= 8; 1253 #endif 1254 howto = & fake_arm26_reloc; 1255 } 1256 1257 #ifdef ARM_WINCE 1258 /* MS ARM-CE makes the reloc relative to the opcode's pc, not 1259 the next opcode's pc, so is off by one. */ 1260 if (howto->pc_relative && !bfd_link_relocatable (info)) 1261 addend -= 8; 1262 #endif 1263 1264 /* If we are doing a relocatable link, then we can just ignore 1265 a PC relative reloc that is pcrel_offset. It will already 1266 have the correct value. If this is not a relocatable link, 1267 then we should ignore the symbol value. */ 1268 if (howto->pc_relative && howto->pcrel_offset) 1269 { 1270 if (bfd_link_relocatable (info)) 1271 continue; 1272 /* FIXME - it is not clear which targets need this next test 1273 and which do not. It is known that it is needed for the 1274 VxWorks and EPOC-PE targets, but it is also known that it 1275 was suppressed for other ARM targets. This ought to be 1276 sorted out one day. */ 1277 #ifdef ARM_COFF_BUGFIX 1278 /* We must not ignore the symbol value. If the symbol is 1279 within the same section, the relocation should have already 1280 been fixed, but if it is not, we'll be handed a reloc into 1281 the beginning of the symbol's section, so we must not cancel 1282 out the symbol's value, otherwise we'll be adding it in 1283 twice. */ 1284 if (sym != NULL && sym->n_scnum != 0) 1285 addend += sym->n_value; 1286 #endif 1287 } 1288 1289 val = 0; 1290 1291 if (h == NULL) 1292 { 1293 asection *sec; 1294 1295 if (symndx == -1) 1296 { 1297 sec = bfd_abs_section_ptr; 1298 val = 0; 1299 } 1300 else 1301 { 1302 sec = sections[symndx]; 1303 val = (sec->output_section->vma 1304 + sec->output_offset 1305 + sym->n_value 1306 - sec->vma); 1307 } 1308 } 1309 else 1310 { 1311 /* We don't output the stubs if we are generating a 1312 relocatable output file, since we may as well leave the 1313 stub generation to the final linker pass. If we fail to 1314 verify that the name is defined, we'll try to build stubs 1315 for an undefined name... */ 1316 if (! bfd_link_relocatable (info) 1317 && ( h->root.type == bfd_link_hash_defined 1318 || h->root.type == bfd_link_hash_defweak)) 1319 { 1320 asection * h_sec = h->root.u.def.section; 1321 const char * name = h->root.root.string; 1322 1323 /* h locates the symbol referenced in the reloc. */ 1324 h_val = (h->root.u.def.value 1325 + h_sec->output_section->vma 1326 + h_sec->output_offset); 1327 1328 if (howto->type == ARM_26) 1329 { 1330 if ( h->symbol_class == C_THUMBSTATFUNC 1331 || h->symbol_class == C_THUMBEXTFUNC) 1332 { 1333 /* Arm code calling a Thumb function. */ 1334 unsigned long int tmp; 1335 bfd_vma my_offset; 1336 asection * s; 1337 long int ret_offset; 1338 struct coff_link_hash_entry * myh; 1339 struct coff_arm_link_hash_table * globals; 1340 1341 myh = find_arm_glue (info, name, input_bfd); 1342 if (myh == NULL) 1343 return FALSE; 1344 1345 globals = coff_arm_hash_table (info); 1346 1347 BFD_ASSERT (globals != NULL); 1348 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1349 1350 my_offset = myh->root.u.def.value; 1351 1352 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 1353 ARM2THUMB_GLUE_SECTION_NAME); 1354 BFD_ASSERT (s != NULL); 1355 BFD_ASSERT (s->contents != NULL); 1356 BFD_ASSERT (s->output_section != NULL); 1357 1358 if ((my_offset & 0x01) == 0x01) 1359 { 1360 if (h_sec->owner != NULL 1361 && INTERWORK_SET (h_sec->owner) 1362 && ! INTERWORK_FLAG (h_sec->owner)) 1363 _bfd_error_handler 1364 /* xgettext:c-format */ 1365 (_("%B(%s): warning: interworking not enabled.\n" 1366 " first occurrence: %B: arm call to thumb"), 1367 h_sec->owner, input_bfd, name); 1368 1369 --my_offset; 1370 myh->root.u.def.value = my_offset; 1371 1372 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn, 1373 s->contents + my_offset); 1374 1375 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn, 1376 s->contents + my_offset + 4); 1377 1378 /* It's a thumb address. Add the low order bit. */ 1379 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn, 1380 s->contents + my_offset + 8); 1381 1382 if (info->base_file 1383 && !arm_emit_base_file_entry (info, output_bfd, 1384 s, my_offset + 8)) 1385 return FALSE; 1386 } 1387 1388 BFD_ASSERT (my_offset <= globals->arm_glue_size); 1389 1390 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr 1391 - input_section->vma); 1392 1393 tmp = tmp & 0xFF000000; 1394 1395 /* Somehow these are both 4 too far, so subtract 8. */ 1396 ret_offset = 1397 s->output_offset 1398 + my_offset 1399 + s->output_section->vma 1400 - (input_section->output_offset 1401 + input_section->output_section->vma 1402 + rel->r_vaddr) 1403 - 8; 1404 1405 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); 1406 1407 bfd_put_32 (output_bfd, (bfd_vma) tmp, 1408 contents + rel->r_vaddr - input_section->vma); 1409 done = 1; 1410 } 1411 } 1412 1413 #ifndef ARM_WINCE 1414 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */ 1415 else if (howto->type == ARM_THUMB23) 1416 { 1417 if ( h->symbol_class == C_EXT 1418 || h->symbol_class == C_STAT 1419 || h->symbol_class == C_LABEL) 1420 { 1421 /* Thumb code calling an ARM function. */ 1422 asection * s = 0; 1423 bfd_vma my_offset; 1424 unsigned long int tmp; 1425 long int ret_offset; 1426 struct coff_link_hash_entry * myh; 1427 struct coff_arm_link_hash_table * globals; 1428 1429 myh = find_thumb_glue (info, name, input_bfd); 1430 if (myh == NULL) 1431 return FALSE; 1432 1433 globals = coff_arm_hash_table (info); 1434 1435 BFD_ASSERT (globals != NULL); 1436 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1437 1438 my_offset = myh->root.u.def.value; 1439 1440 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 1441 THUMB2ARM_GLUE_SECTION_NAME); 1442 1443 BFD_ASSERT (s != NULL); 1444 BFD_ASSERT (s->contents != NULL); 1445 BFD_ASSERT (s->output_section != NULL); 1446 1447 if ((my_offset & 0x01) == 0x01) 1448 { 1449 if (h_sec->owner != NULL 1450 && INTERWORK_SET (h_sec->owner) 1451 && ! INTERWORK_FLAG (h_sec->owner) 1452 && ! globals->support_old_code) 1453 _bfd_error_handler 1454 /* xgettext:c-format */ 1455 (_("%B(%s): warning: interworking not enabled.\n" 1456 " first occurrence: %B: thumb call to arm\n" 1457 " consider relinking with --support-old-code enabled"), 1458 h_sec->owner, input_bfd, name); 1459 1460 -- my_offset; 1461 myh->root.u.def.value = my_offset; 1462 1463 if (globals->support_old_code) 1464 { 1465 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn, 1466 s->contents + my_offset); 1467 1468 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn, 1469 s->contents + my_offset + 2); 1470 1471 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn, 1472 s->contents + my_offset + 4); 1473 1474 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn, 1475 s->contents + my_offset + 6); 1476 1477 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn, 1478 s->contents + my_offset + 8); 1479 1480 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn, 1481 s->contents + my_offset + 12); 1482 1483 /* Store the address of the function in the last word of the stub. */ 1484 bfd_put_32 (output_bfd, h_val, 1485 s->contents + my_offset + 16); 1486 1487 if (info->base_file 1488 && !arm_emit_base_file_entry (info, 1489 output_bfd, s, 1490 my_offset + 16)) 1491 return FALSE; 1492 } 1493 else 1494 { 1495 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn, 1496 s->contents + my_offset); 1497 1498 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn, 1499 s->contents + my_offset + 2); 1500 1501 ret_offset = 1502 /* Address of destination of the stub. */ 1503 ((bfd_signed_vma) h_val) 1504 - ((bfd_signed_vma) 1505 /* Offset from the start of the current section to the start of the stubs. */ 1506 (s->output_offset 1507 /* Offset of the start of this stub from the start of the stubs. */ 1508 + my_offset 1509 /* Address of the start of the current section. */ 1510 + s->output_section->vma) 1511 /* The branch instruction is 4 bytes into the stub. */ 1512 + 4 1513 /* ARM branches work from the pc of the instruction + 8. */ 1514 + 8); 1515 1516 bfd_put_32 (output_bfd, 1517 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), 1518 s->contents + my_offset + 4); 1519 1520 } 1521 } 1522 1523 BFD_ASSERT (my_offset <= globals->thumb_glue_size); 1524 1525 /* Now go back and fix up the original BL insn to point 1526 to here. */ 1527 ret_offset = 1528 s->output_offset 1529 + my_offset 1530 - (input_section->output_offset 1531 + rel->r_vaddr) 1532 -4; 1533 1534 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr 1535 - input_section->vma); 1536 1537 bfd_put_32 (output_bfd, 1538 (bfd_vma) insert_thumb_branch (tmp, 1539 ret_offset), 1540 contents + rel->r_vaddr - input_section->vma); 1541 1542 done = 1; 1543 } 1544 } 1545 #endif 1546 } 1547 1548 /* If the relocation type and destination symbol does not 1549 fall into one of the above categories, then we can just 1550 perform a direct link. */ 1551 1552 if (done) 1553 rstat = bfd_reloc_ok; 1554 else 1555 if ( h->root.type == bfd_link_hash_defined 1556 || h->root.type == bfd_link_hash_defweak) 1557 { 1558 asection *sec; 1559 1560 sec = h->root.u.def.section; 1561 val = (h->root.u.def.value 1562 + sec->output_section->vma 1563 + sec->output_offset); 1564 } 1565 1566 else if (! bfd_link_relocatable (info)) 1567 (*info->callbacks->undefined_symbol) 1568 (info, h->root.root.string, input_bfd, input_section, 1569 rel->r_vaddr - input_section->vma, TRUE); 1570 } 1571 1572 /* Emit a reloc if the backend thinks it needs it. */ 1573 if (info->base_file 1574 && sym 1575 && pe_data(output_bfd)->in_reloc_p(output_bfd, howto) 1576 && !arm_emit_base_file_entry (info, output_bfd, input_section, 1577 rel->r_vaddr)) 1578 return FALSE; 1579 1580 if (done) 1581 rstat = bfd_reloc_ok; 1582 #ifndef ARM_WINCE 1583 /* Only perform this fix during the final link, not a relocatable link. */ 1584 else if (! bfd_link_relocatable (info) 1585 && howto->type == ARM_THUMB23) 1586 { 1587 /* This is pretty much a copy of what the default 1588 _bfd_final_link_relocate and _bfd_relocate_contents 1589 routines do to perform a relocation, with special 1590 processing for the split addressing of the Thumb BL 1591 instruction. Again, it would probably be simpler adding a 1592 ThumbBRANCH23 specific macro expansion into the default 1593 code. */ 1594 1595 bfd_vma address = rel->r_vaddr - input_section->vma; 1596 1597 if (address > high_address) 1598 rstat = bfd_reloc_outofrange; 1599 else 1600 { 1601 bfd_vma relocation = val + addend; 1602 int size = bfd_get_reloc_size (howto); 1603 bfd_boolean overflow = FALSE; 1604 bfd_byte *location = contents + address; 1605 bfd_vma x = bfd_get_32 (input_bfd, location); 1606 bfd_vma src_mask = 0x007FFFFE; 1607 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; 1608 bfd_signed_vma reloc_signed_min = ~reloc_signed_max; 1609 bfd_vma check; 1610 bfd_signed_vma signed_check; 1611 bfd_vma add; 1612 bfd_signed_vma signed_add; 1613 1614 BFD_ASSERT (size == 4); 1615 1616 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */ 1617 relocation -= (input_section->output_section->vma 1618 + input_section->output_offset); 1619 1620 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */ 1621 relocation -= address; 1622 1623 /* No need to negate the relocation with BRANCH23. */ 1624 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */ 1625 /* howto->rightshift == 1 */ 1626 1627 /* Drop unwanted bits from the value we are relocating to. */ 1628 check = relocation >> howto->rightshift; 1629 1630 /* If this is a signed value, the rightshift just dropped 1631 leading 1 bits (assuming twos complement). */ 1632 if ((bfd_signed_vma) relocation >= 0) 1633 signed_check = check; 1634 else 1635 signed_check = (check 1636 | ((bfd_vma) - 1 1637 & ~((bfd_vma) - 1 >> howto->rightshift))); 1638 1639 /* Get the value from the object file. */ 1640 if (bfd_big_endian (input_bfd)) 1641 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1); 1642 else 1643 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15)); 1644 1645 /* Get the value from the object file with an appropriate sign. 1646 The expression involving howto->src_mask isolates the upper 1647 bit of src_mask. If that bit is set in the value we are 1648 adding, it is negative, and we subtract out that number times 1649 two. If src_mask includes the highest possible bit, then we 1650 can not get the upper bit, but that does not matter since 1651 signed_add needs no adjustment to become negative in that 1652 case. */ 1653 signed_add = add; 1654 1655 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0) 1656 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1; 1657 1658 /* howto->bitpos == 0 */ 1659 /* Add the value from the object file, shifted so that it is a 1660 straight number. */ 1661 signed_check += signed_add; 1662 relocation += signed_add; 1663 1664 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed); 1665 1666 /* Assumes two's complement. */ 1667 if ( signed_check > reloc_signed_max 1668 || signed_check < reloc_signed_min) 1669 overflow = TRUE; 1670 1671 /* Put the relocation into the correct bits. 1672 For a BLX instruction, make sure that the relocation is rounded up 1673 to a word boundary. This follows the semantics of the instruction 1674 which specifies that bit 1 of the target address will come from bit 1675 1 of the base address. */ 1676 if (bfd_big_endian (input_bfd)) 1677 { 1678 if ((x & 0x1800) == 0x0800 && (relocation & 0x02)) 1679 relocation += 2; 1680 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000)); 1681 } 1682 else 1683 { 1684 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02)) 1685 relocation += 2; 1686 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff)); 1687 } 1688 1689 /* Add the relocation to the correct bits of X. */ 1690 x = ((x & ~howto->dst_mask) | relocation); 1691 1692 /* Put the relocated value back in the object file. */ 1693 bfd_put_32 (input_bfd, x, location); 1694 1695 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok; 1696 } 1697 } 1698 #endif 1699 else 1700 if (bfd_link_relocatable (info) && ! howto->partial_inplace) 1701 rstat = bfd_reloc_ok; 1702 else 1703 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section, 1704 contents, 1705 rel->r_vaddr - input_section->vma, 1706 val, addend); 1707 /* Only perform this fix during the final link, not a relocatable link. */ 1708 if (! bfd_link_relocatable (info) 1709 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32)) 1710 { 1711 /* Determine if we need to set the bottom bit of a relocated address 1712 because the address is the address of a Thumb code symbol. */ 1713 int patchit = FALSE; 1714 1715 if (h != NULL 1716 && ( h->symbol_class == C_THUMBSTATFUNC 1717 || h->symbol_class == C_THUMBEXTFUNC)) 1718 { 1719 patchit = TRUE; 1720 } 1721 else if (sym != NULL 1722 && sym->n_scnum > N_UNDEF) 1723 { 1724 /* No hash entry - use the symbol instead. */ 1725 if ( sym->n_sclass == C_THUMBSTATFUNC 1726 || sym->n_sclass == C_THUMBEXTFUNC) 1727 patchit = TRUE; 1728 } 1729 1730 if (patchit) 1731 { 1732 bfd_byte * location = contents + rel->r_vaddr - input_section->vma; 1733 bfd_vma x = bfd_get_32 (input_bfd, location); 1734 1735 bfd_put_32 (input_bfd, x | 1, location); 1736 } 1737 } 1738 1739 switch (rstat) 1740 { 1741 default: 1742 abort (); 1743 case bfd_reloc_ok: 1744 break; 1745 case bfd_reloc_outofrange: 1746 (*_bfd_error_handler) 1747 (_("%B: bad reloc address 0x%lx in section `%A'"), 1748 input_bfd, input_section, (unsigned long) rel->r_vaddr); 1749 return FALSE; 1750 case bfd_reloc_overflow: 1751 { 1752 const char *name; 1753 char buf[SYMNMLEN + 1]; 1754 1755 if (symndx == -1) 1756 name = "*ABS*"; 1757 else if (h != NULL) 1758 name = NULL; 1759 else 1760 { 1761 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf); 1762 if (name == NULL) 1763 return FALSE; 1764 } 1765 1766 (*info->callbacks->reloc_overflow) 1767 (info, (h ? &h->root : NULL), name, howto->name, 1768 (bfd_vma) 0, input_bfd, input_section, 1769 rel->r_vaddr - input_section->vma); 1770 } 1771 } 1772 } 1773 1774 return TRUE; 1775 } 1776 1777 #ifndef COFF_IMAGE_WITH_PE 1778 1779 bfd_boolean 1780 bfd_arm_allocate_interworking_sections (struct bfd_link_info * info) 1781 { 1782 asection * s; 1783 bfd_byte * foo; 1784 struct coff_arm_link_hash_table * globals; 1785 1786 globals = coff_arm_hash_table (info); 1787 1788 BFD_ASSERT (globals != NULL); 1789 1790 if (globals->arm_glue_size != 0) 1791 { 1792 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1793 1794 s = bfd_get_section_by_name 1795 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); 1796 1797 BFD_ASSERT (s != NULL); 1798 1799 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size); 1800 1801 s->size = globals->arm_glue_size; 1802 s->contents = foo; 1803 } 1804 1805 if (globals->thumb_glue_size != 0) 1806 { 1807 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1808 1809 s = bfd_get_section_by_name 1810 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); 1811 1812 BFD_ASSERT (s != NULL); 1813 1814 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size); 1815 1816 s->size = globals->thumb_glue_size; 1817 s->contents = foo; 1818 } 1819 1820 return TRUE; 1821 } 1822 1823 static void 1824 record_arm_to_thumb_glue (struct bfd_link_info * info, 1825 struct coff_link_hash_entry * h) 1826 { 1827 const char * name = h->root.root.string; 1828 register asection * s; 1829 char * tmp_name; 1830 struct coff_link_hash_entry * myh; 1831 struct bfd_link_hash_entry * bh; 1832 struct coff_arm_link_hash_table * globals; 1833 bfd_vma val; 1834 bfd_size_type amt; 1835 1836 globals = coff_arm_hash_table (info); 1837 1838 BFD_ASSERT (globals != NULL); 1839 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1840 1841 s = bfd_get_section_by_name 1842 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); 1843 1844 BFD_ASSERT (s != NULL); 1845 1846 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; 1847 tmp_name = bfd_malloc (amt); 1848 1849 BFD_ASSERT (tmp_name); 1850 1851 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); 1852 1853 myh = coff_link_hash_lookup 1854 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1855 1856 if (myh != NULL) 1857 { 1858 free (tmp_name); 1859 /* We've already seen this guy. */ 1860 return; 1861 } 1862 1863 /* The only trick here is using globals->arm_glue_size as the value. Even 1864 though the section isn't allocated yet, this is where we will be putting 1865 it. */ 1866 bh = NULL; 1867 val = globals->arm_glue_size + 1; 1868 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, 1869 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); 1870 1871 free (tmp_name); 1872 1873 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE; 1874 1875 return; 1876 } 1877 1878 #ifndef ARM_WINCE 1879 static void 1880 record_thumb_to_arm_glue (struct bfd_link_info * info, 1881 struct coff_link_hash_entry * h) 1882 { 1883 const char * name = h->root.root.string; 1884 asection * s; 1885 char * tmp_name; 1886 struct coff_link_hash_entry * myh; 1887 struct bfd_link_hash_entry * bh; 1888 struct coff_arm_link_hash_table * globals; 1889 bfd_vma val; 1890 bfd_size_type amt; 1891 1892 globals = coff_arm_hash_table (info); 1893 1894 BFD_ASSERT (globals != NULL); 1895 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 1896 1897 s = bfd_get_section_by_name 1898 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); 1899 1900 BFD_ASSERT (s != NULL); 1901 1902 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; 1903 tmp_name = bfd_malloc (amt); 1904 1905 BFD_ASSERT (tmp_name); 1906 1907 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); 1908 1909 myh = coff_link_hash_lookup 1910 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); 1911 1912 if (myh != NULL) 1913 { 1914 free (tmp_name); 1915 /* We've already seen this guy. */ 1916 return; 1917 } 1918 1919 bh = NULL; 1920 val = globals->thumb_glue_size + 1; 1921 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, 1922 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); 1923 1924 /* If we mark it 'thumb', the disassembler will do a better job. */ 1925 myh = (struct coff_link_hash_entry *) bh; 1926 myh->symbol_class = C_THUMBEXTFUNC; 1927 1928 free (tmp_name); 1929 1930 /* Allocate another symbol to mark where we switch to arm mode. */ 1931 1932 #define CHANGE_TO_ARM "__%s_change_to_arm" 1933 #define BACK_FROM_ARM "__%s_back_from_arm" 1934 1935 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1; 1936 tmp_name = bfd_malloc (amt); 1937 1938 BFD_ASSERT (tmp_name); 1939 1940 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name); 1941 1942 bh = NULL; 1943 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4); 1944 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, 1945 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh); 1946 1947 free (tmp_name); 1948 1949 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE; 1950 1951 return; 1952 } 1953 #endif /* not ARM_WINCE */ 1954 1955 /* Select a BFD to be used to hold the sections used by the glue code. 1956 This function is called from the linker scripts in ld/emultempl/ 1957 {armcoff/pe}.em */ 1958 1959 bfd_boolean 1960 bfd_arm_get_bfd_for_interworking (bfd * abfd, 1961 struct bfd_link_info * info) 1962 { 1963 struct coff_arm_link_hash_table * globals; 1964 flagword flags; 1965 asection * sec; 1966 1967 /* If we are only performing a partial link do not bother 1968 getting a bfd to hold the glue. */ 1969 if (bfd_link_relocatable (info)) 1970 return TRUE; 1971 1972 globals = coff_arm_hash_table (info); 1973 1974 BFD_ASSERT (globals != NULL); 1975 1976 if (globals->bfd_of_glue_owner != NULL) 1977 return TRUE; 1978 1979 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME); 1980 1981 if (sec == NULL) 1982 { 1983 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY 1984 | SEC_CODE | SEC_READONLY); 1985 sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME, 1986 flags); 1987 if (sec == NULL 1988 || ! bfd_set_section_alignment (abfd, sec, 2)) 1989 return FALSE; 1990 } 1991 1992 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME); 1993 1994 if (sec == NULL) 1995 { 1996 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY 1997 | SEC_CODE | SEC_READONLY); 1998 sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME, 1999 flags); 2000 2001 if (sec == NULL 2002 || ! bfd_set_section_alignment (abfd, sec, 2)) 2003 return FALSE; 2004 } 2005 2006 /* Save the bfd for later use. */ 2007 globals->bfd_of_glue_owner = abfd; 2008 2009 return TRUE; 2010 } 2011 2012 bfd_boolean 2013 bfd_arm_process_before_allocation (bfd * abfd, 2014 struct bfd_link_info * info, 2015 int support_old_code) 2016 { 2017 asection * sec; 2018 struct coff_arm_link_hash_table * globals; 2019 2020 /* If we are only performing a partial link do not bother 2021 to construct any glue. */ 2022 if (bfd_link_relocatable (info)) 2023 return TRUE; 2024 2025 /* Here we have a bfd that is to be included on the link. We have a hook 2026 to do reloc rummaging, before section sizes are nailed down. */ 2027 _bfd_coff_get_external_symbols (abfd); 2028 2029 globals = coff_arm_hash_table (info); 2030 2031 BFD_ASSERT (globals != NULL); 2032 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 2033 2034 globals->support_old_code = support_old_code; 2035 2036 /* Rummage around all the relocs and map the glue vectors. */ 2037 sec = abfd->sections; 2038 2039 if (sec == NULL) 2040 return TRUE; 2041 2042 for (; sec != NULL; sec = sec->next) 2043 { 2044 struct internal_reloc * i; 2045 struct internal_reloc * rel; 2046 2047 if (sec->reloc_count == 0) 2048 continue; 2049 2050 /* Load the relocs. */ 2051 /* FIXME: there may be a storage leak here. */ 2052 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0); 2053 2054 BFD_ASSERT (i != 0); 2055 2056 for (rel = i; rel < i + sec->reloc_count; ++rel) 2057 { 2058 unsigned short r_type = rel->r_type; 2059 long symndx; 2060 struct coff_link_hash_entry * h; 2061 2062 symndx = rel->r_symndx; 2063 2064 /* If the relocation is not against a symbol it cannot concern us. */ 2065 if (symndx == -1) 2066 continue; 2067 2068 /* If the index is outside of the range of our table, something has gone wrong. */ 2069 if (symndx >= obj_conv_table_size (abfd)) 2070 { 2071 _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"), 2072 abfd, symndx); 2073 continue; 2074 } 2075 2076 h = obj_coff_sym_hashes (abfd)[symndx]; 2077 2078 /* If the relocation is against a static symbol it must be within 2079 the current section and so cannot be a cross ARM/Thumb relocation. */ 2080 if (h == NULL) 2081 continue; 2082 2083 switch (r_type) 2084 { 2085 case ARM_26: 2086 /* This one is a call from arm code. We need to look up 2087 the target of the call. If it is a thumb target, we 2088 insert glue. */ 2089 2090 if (h->symbol_class == C_THUMBEXTFUNC) 2091 record_arm_to_thumb_glue (info, h); 2092 break; 2093 2094 #ifndef ARM_WINCE 2095 case ARM_THUMB23: 2096 /* This one is a call from thumb code. We used to look 2097 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look 2098 up the target of the call. If it is an arm target, we 2099 insert glue. If the symbol does not exist it will be 2100 given a class of C_EXT and so we will generate a stub 2101 for it. This is not really a problem, since the link 2102 is doomed anyway. */ 2103 2104 switch (h->symbol_class) 2105 { 2106 case C_EXT: 2107 case C_STAT: 2108 case C_LABEL: 2109 record_thumb_to_arm_glue (info, h); 2110 break; 2111 default: 2112 ; 2113 } 2114 break; 2115 #endif 2116 2117 default: 2118 break; 2119 } 2120 } 2121 } 2122 2123 return TRUE; 2124 } 2125 2126 #endif /* ! defined (COFF_IMAGE_WITH_PE) */ 2127 2128 #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup 2129 #define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup 2130 #define coff_relocate_section coff_arm_relocate_section 2131 #define coff_bfd_is_local_label_name coff_arm_is_local_label_name 2132 #define coff_adjust_symndx coff_arm_adjust_symndx 2133 #define coff_link_output_has_begun coff_arm_link_output_has_begun 2134 #define coff_final_link_postscript coff_arm_final_link_postscript 2135 #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data 2136 #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data 2137 #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags 2138 #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data 2139 #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create 2140 2141 /* When doing a relocatable link, we want to convert ARM_26 relocs 2142 into ARM_26D relocs. */ 2143 2144 static bfd_boolean 2145 coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED, 2146 struct bfd_link_info *info ATTRIBUTE_UNUSED, 2147 bfd *ibfd, 2148 asection *sec, 2149 struct internal_reloc *irel, 2150 bfd_boolean *adjustedp) 2151 { 2152 if (irel->r_type == ARM_26) 2153 { 2154 struct coff_link_hash_entry *h; 2155 2156 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx]; 2157 if (h != NULL 2158 && (h->root.type == bfd_link_hash_defined 2159 || h->root.type == bfd_link_hash_defweak) 2160 && h->root.u.def.section->output_section == sec->output_section) 2161 irel->r_type = ARM_26D; 2162 } 2163 *adjustedp = FALSE; 2164 return TRUE; 2165 } 2166 2167 /* Called when merging the private data areas of two BFDs. 2168 This is important as it allows us to detect if we are 2169 attempting to merge binaries compiled for different ARM 2170 targets, eg different CPUs or different APCS's. */ 2171 2172 static bfd_boolean 2173 coff_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) 2174 { 2175 BFD_ASSERT (ibfd != NULL && obfd != NULL); 2176 2177 if (ibfd == obfd) 2178 return TRUE; 2179 2180 /* If the two formats are different we cannot merge anything. 2181 This is not an error, since it is permissable to change the 2182 input and output formats. */ 2183 if ( ibfd->xvec->flavour != bfd_target_coff_flavour 2184 || obfd->xvec->flavour != bfd_target_coff_flavour) 2185 return TRUE; 2186 2187 /* Determine what should happen if the input ARM architecture 2188 does not match the output ARM architecture. */ 2189 if (! bfd_arm_merge_machines (ibfd, obfd)) 2190 return FALSE; 2191 2192 /* Verify that the APCS is the same for the two BFDs. */ 2193 if (APCS_SET (ibfd)) 2194 { 2195 if (APCS_SET (obfd)) 2196 { 2197 /* If the src and dest have different APCS flag bits set, fail. */ 2198 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd)) 2199 { 2200 _bfd_error_handler 2201 /* xgettext: c-format */ 2202 (_("error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"), 2203 ibfd, obfd, 2204 APCS_26_FLAG (ibfd) ? 26 : 32, 2205 APCS_26_FLAG (obfd) ? 26 : 32 2206 ); 2207 2208 bfd_set_error (bfd_error_wrong_format); 2209 return FALSE; 2210 } 2211 2212 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd)) 2213 { 2214 const char *msg; 2215 2216 if (APCS_FLOAT_FLAG (ibfd)) 2217 /* xgettext: c-format */ 2218 msg = _("error: %B passes floats in float registers, whereas %B passes them in integer registers"); 2219 else 2220 /* xgettext: c-format */ 2221 msg = _("error: %B passes floats in integer registers, whereas %B passes them in float registers"); 2222 2223 _bfd_error_handler (msg, ibfd, obfd); 2224 2225 bfd_set_error (bfd_error_wrong_format); 2226 return FALSE; 2227 } 2228 2229 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd)) 2230 { 2231 const char * msg; 2232 2233 if (PIC_FLAG (ibfd)) 2234 /* xgettext: c-format */ 2235 msg = _("error: %B is compiled as position independent code, whereas target %B is absolute position"); 2236 else 2237 /* xgettext: c-format */ 2238 msg = _("error: %B is compiled as absolute position code, whereas target %B is position independent"); 2239 _bfd_error_handler (msg, ibfd, obfd); 2240 2241 bfd_set_error (bfd_error_wrong_format); 2242 return FALSE; 2243 } 2244 } 2245 else 2246 { 2247 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd)); 2248 2249 /* Set up the arch and fields as well as these are probably wrong. */ 2250 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); 2251 } 2252 } 2253 2254 /* Check the interworking support. */ 2255 if (INTERWORK_SET (ibfd)) 2256 { 2257 if (INTERWORK_SET (obfd)) 2258 { 2259 /* If the src and dest differ in their interworking issue a warning. */ 2260 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd)) 2261 { 2262 const char * msg; 2263 2264 if (INTERWORK_FLAG (ibfd)) 2265 /* xgettext: c-format */ 2266 msg = _("Warning: %B supports interworking, whereas %B does not"); 2267 else 2268 /* xgettext: c-format */ 2269 msg = _("Warning: %B does not support interworking, whereas %B does"); 2270 2271 _bfd_error_handler (msg, ibfd, obfd); 2272 } 2273 } 2274 else 2275 { 2276 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd)); 2277 } 2278 } 2279 2280 return TRUE; 2281 } 2282 2283 /* Display the flags field. */ 2284 2285 static bfd_boolean 2286 coff_arm_print_private_bfd_data (bfd * abfd, void * ptr) 2287 { 2288 FILE * file = (FILE *) ptr; 2289 2290 BFD_ASSERT (abfd != NULL && ptr != NULL); 2291 2292 /* xgettext:c-format */ 2293 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags); 2294 2295 if (APCS_SET (abfd)) 2296 { 2297 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */ 2298 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32); 2299 2300 if (APCS_FLOAT_FLAG (abfd)) 2301 fprintf (file, _(" [floats passed in float registers]")); 2302 else 2303 fprintf (file, _(" [floats passed in integer registers]")); 2304 2305 if (PIC_FLAG (abfd)) 2306 fprintf (file, _(" [position independent]")); 2307 else 2308 fprintf (file, _(" [absolute position]")); 2309 } 2310 2311 if (! INTERWORK_SET (abfd)) 2312 fprintf (file, _(" [interworking flag not initialised]")); 2313 else if (INTERWORK_FLAG (abfd)) 2314 fprintf (file, _(" [interworking supported]")); 2315 else 2316 fprintf (file, _(" [interworking not supported]")); 2317 2318 fputc ('\n', file); 2319 2320 return TRUE; 2321 } 2322 2323 /* Copies the given flags into the coff_tdata.flags field. 2324 Typically these flags come from the f_flags[] field of 2325 the COFF filehdr structure, which contains important, 2326 target specific information. 2327 Note: Although this function is static, it is explicitly 2328 called from both coffcode.h and peicode.h. */ 2329 2330 static bfd_boolean 2331 _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags) 2332 { 2333 flagword flag; 2334 2335 BFD_ASSERT (abfd != NULL); 2336 2337 flag = (flags & F_APCS26) ? F_APCS_26 : 0; 2338 2339 /* Make sure that the APCS field has not been initialised to the opposite 2340 value. */ 2341 if (APCS_SET (abfd) 2342 && ( (APCS_26_FLAG (abfd) != flag) 2343 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT)) 2344 || (PIC_FLAG (abfd) != (flags & F_PIC)) 2345 )) 2346 return FALSE; 2347 2348 flag |= (flags & (F_APCS_FLOAT | F_PIC)); 2349 2350 SET_APCS_FLAGS (abfd, flag); 2351 2352 flag = (flags & F_INTERWORK); 2353 2354 /* If the BFD has already had its interworking flag set, but it 2355 is different from the value that we have been asked to set, 2356 then assume that that merged code will not support interworking 2357 and set the flag accordingly. */ 2358 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag)) 2359 { 2360 if (flag) 2361 /* xgettext: c-format */ 2362 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), 2363 abfd); 2364 else 2365 /* xgettext: c-format */ 2366 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"), 2367 abfd); 2368 flag = 0; 2369 } 2370 2371 SET_INTERWORK_FLAG (abfd, flag); 2372 2373 return TRUE; 2374 } 2375 2376 /* Copy the important parts of the target specific data 2377 from one instance of a BFD to another. */ 2378 2379 static bfd_boolean 2380 coff_arm_copy_private_bfd_data (bfd * src, bfd * dest) 2381 { 2382 BFD_ASSERT (src != NULL && dest != NULL); 2383 2384 if (src == dest) 2385 return TRUE; 2386 2387 /* If the destination is not in the same format as the source, do not do 2388 the copy. */ 2389 if (src->xvec != dest->xvec) 2390 return TRUE; 2391 2392 /* Copy the flags field. */ 2393 if (APCS_SET (src)) 2394 { 2395 if (APCS_SET (dest)) 2396 { 2397 /* If the src and dest have different APCS flag bits set, fail. */ 2398 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src)) 2399 return FALSE; 2400 2401 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src)) 2402 return FALSE; 2403 2404 if (PIC_FLAG (dest) != PIC_FLAG (src)) 2405 return FALSE; 2406 } 2407 else 2408 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src) 2409 | PIC_FLAG (src)); 2410 } 2411 2412 if (INTERWORK_SET (src)) 2413 { 2414 if (INTERWORK_SET (dest)) 2415 { 2416 /* If the src and dest have different interworking flags then turn 2417 off the interworking bit. */ 2418 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src)) 2419 { 2420 if (INTERWORK_FLAG (dest)) 2421 { 2422 /* xgettext:c-format */ 2423 _bfd_error_handler (("\ 2424 Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), 2425 dest, src); 2426 } 2427 2428 SET_INTERWORK_FLAG (dest, 0); 2429 } 2430 } 2431 else 2432 { 2433 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src)); 2434 } 2435 } 2436 2437 return TRUE; 2438 } 2439 2440 /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX 2441 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */ 2442 #ifndef LOCAL_LABEL_PREFIX 2443 #define LOCAL_LABEL_PREFIX "" 2444 #endif 2445 #ifndef USER_LABEL_PREFIX 2446 #define USER_LABEL_PREFIX "_" 2447 #endif 2448 2449 /* Like _bfd_coff_is_local_label_name, but 2450 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be 2451 non-local. 2452 b) Allow other prefixes than ".", e.g. an empty prefix would cause all 2453 labels of the form Lxxx to be stripped. */ 2454 2455 static bfd_boolean 2456 coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED, 2457 const char * name) 2458 { 2459 #ifdef USER_LABEL_PREFIX 2460 if (USER_LABEL_PREFIX[0] != 0) 2461 { 2462 size_t len = strlen (USER_LABEL_PREFIX); 2463 2464 if (strncmp (name, USER_LABEL_PREFIX, len) == 0) 2465 return FALSE; 2466 } 2467 #endif 2468 2469 #ifdef LOCAL_LABEL_PREFIX 2470 /* If there is a prefix for local labels then look for this. 2471 If the prefix exists, but it is empty, then ignore the test. */ 2472 2473 if (LOCAL_LABEL_PREFIX[0] != 0) 2474 { 2475 size_t len = strlen (LOCAL_LABEL_PREFIX); 2476 2477 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0) 2478 return FALSE; 2479 2480 /* Perform the checks below for the rest of the name. */ 2481 name += len; 2482 } 2483 #endif 2484 2485 return name[0] == 'L'; 2486 } 2487 2488 /* This piece of machinery exists only to guarantee that the bfd that holds 2489 the glue section is written last. 2490 2491 This does depend on bfd_make_section attaching a new section to the 2492 end of the section list for the bfd. */ 2493 2494 static bfd_boolean 2495 coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info) 2496 { 2497 return (sub->output_has_begun 2498 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner); 2499 } 2500 2501 static bfd_boolean 2502 coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED, 2503 struct coff_final_link_info * pfinfo) 2504 { 2505 struct coff_arm_link_hash_table * globals; 2506 2507 globals = coff_arm_hash_table (pfinfo->info); 2508 2509 BFD_ASSERT (globals != NULL); 2510 2511 if (globals->bfd_of_glue_owner != NULL) 2512 { 2513 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner)) 2514 return FALSE; 2515 2516 globals->bfd_of_glue_owner->output_has_begun = TRUE; 2517 } 2518 2519 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); 2520 } 2521 2522 #ifndef bfd_pe_print_pdata 2523 #define bfd_pe_print_pdata NULL 2524 #endif 2525 2526 #include "coffcode.h" 2527 2528 #ifndef TARGET_LITTLE_SYM 2529 #define TARGET_LITTLE_SYM arm_coff_le_vec 2530 #endif 2531 #ifndef TARGET_LITTLE_NAME 2532 #define TARGET_LITTLE_NAME "coff-arm-little" 2533 #endif 2534 #ifndef TARGET_BIG_SYM 2535 #define TARGET_BIG_SYM arm_coff_be_vec 2536 #endif 2537 #ifndef TARGET_BIG_NAME 2538 #define TARGET_BIG_NAME "coff-arm-big" 2539 #endif 2540 2541 #ifndef TARGET_UNDERSCORE 2542 #define TARGET_UNDERSCORE 0 2543 #endif 2544 2545 #ifndef EXTRA_S_FLAGS 2546 #ifdef COFF_WITH_PE 2547 #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES) 2548 #else 2549 #define EXTRA_S_FLAGS SEC_CODE 2550 #endif 2551 #endif 2552 2553 /* Forward declaration for use initialising alternative_target field. */ 2554 extern const bfd_target TARGET_BIG_SYM ; 2555 2556 /* Target vectors. */ 2557 CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE) 2558 CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE) 2559
Indexes created Mon Apr 20 00:23:12 UTC 2026