elf-m10200.c revision 1.1.1.4
1 /* Matsushita 10200 specific support for 32-bit ELF 2 Copyright (C) 1996-2018 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 #include "sysdep.h" 22 #include "bfd.h" 23 #include "libbfd.h" 24 #include "elf-bfd.h" 25 26 static bfd_boolean 27 mn10200_elf_relax_delete_bytes (bfd *, asection *, bfd_vma, int); 28 static bfd_boolean 29 mn10200_elf_symbol_address_p (bfd *, asection *, Elf_Internal_Sym *, bfd_vma); 30 31 enum reloc_type 32 { 33 R_MN10200_NONE = 0, 34 R_MN10200_32, 35 R_MN10200_16, 36 R_MN10200_8, 37 R_MN10200_24, 38 R_MN10200_PCREL8, 39 R_MN10200_PCREL16, 40 R_MN10200_PCREL24, 41 R_MN10200_MAX 42 }; 43 44 static reloc_howto_type elf_mn10200_howto_table[] = 45 { 46 /* Dummy relocation. Does nothing. */ 47 HOWTO (R_MN10200_NONE, 48 0, 49 3, 50 0, 51 FALSE, 52 0, 53 complain_overflow_dont, 54 bfd_elf_generic_reloc, 55 "R_MN10200_NONE", 56 FALSE, 57 0, 58 0, 59 FALSE), 60 /* Standard 32 bit reloc. */ 61 HOWTO (R_MN10200_32, 62 0, 63 2, 64 32, 65 FALSE, 66 0, 67 complain_overflow_bitfield, 68 bfd_elf_generic_reloc, 69 "R_MN10200_32", 70 FALSE, 71 0xffffffff, 72 0xffffffff, 73 FALSE), 74 /* Standard 16 bit reloc. */ 75 HOWTO (R_MN10200_16, 76 0, 77 1, 78 16, 79 FALSE, 80 0, 81 complain_overflow_bitfield, 82 bfd_elf_generic_reloc, 83 "R_MN10200_16", 84 FALSE, 85 0xffff, 86 0xffff, 87 FALSE), 88 /* Standard 8 bit reloc. */ 89 HOWTO (R_MN10200_8, 90 0, 91 0, 92 8, 93 FALSE, 94 0, 95 complain_overflow_bitfield, 96 bfd_elf_generic_reloc, 97 "R_MN10200_8", 98 FALSE, 99 0xff, 100 0xff, 101 FALSE), 102 /* Standard 24 bit reloc. */ 103 HOWTO (R_MN10200_24, 104 0, 105 2, 106 24, 107 FALSE, 108 0, 109 complain_overflow_bitfield, 110 bfd_elf_generic_reloc, 111 "R_MN10200_24", 112 FALSE, 113 0xffffff, 114 0xffffff, 115 FALSE), 116 /* Simple 8 pc-relative reloc. */ 117 HOWTO (R_MN10200_PCREL8, 118 0, 119 0, 120 8, 121 TRUE, 122 0, 123 complain_overflow_bitfield, 124 bfd_elf_generic_reloc, 125 "R_MN10200_PCREL8", 126 FALSE, 127 0xff, 128 0xff, 129 TRUE), 130 /* Simple 16 pc-relative reloc. */ 131 HOWTO (R_MN10200_PCREL16, 132 0, 133 1, 134 16, 135 TRUE, 136 0, 137 complain_overflow_bitfield, 138 bfd_elf_generic_reloc, 139 "R_MN10200_PCREL16", 140 FALSE, 141 0xffff, 142 0xffff, 143 TRUE), 144 /* Simple 32bit pc-relative reloc with a 1 byte adjustment 145 to get the pc-relative offset correct. */ 146 HOWTO (R_MN10200_PCREL24, 147 0, 148 2, 149 24, 150 TRUE, 151 0, 152 complain_overflow_bitfield, 153 bfd_elf_generic_reloc, 154 "R_MN10200_PCREL24", 155 FALSE, 156 0xffffff, 157 0xffffff, 158 TRUE), 159 }; 160 161 struct mn10200_reloc_map 162 { 163 bfd_reloc_code_real_type bfd_reloc_val; 164 unsigned char elf_reloc_val; 165 }; 166 167 static const struct mn10200_reloc_map mn10200_reloc_map[] = 168 { 169 { BFD_RELOC_NONE , R_MN10200_NONE , }, 170 { BFD_RELOC_32 , R_MN10200_32 , }, 171 { BFD_RELOC_16 , R_MN10200_16 , }, 172 { BFD_RELOC_8 , R_MN10200_8 , }, 173 { BFD_RELOC_24 , R_MN10200_24 , }, 174 { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , }, 175 { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, }, 176 { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, }, 177 }; 178 179 static reloc_howto_type * 180 bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, 181 bfd_reloc_code_real_type code) 182 { 183 unsigned int i; 184 185 for (i = 0; 186 i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map); 187 i++) 188 { 189 if (mn10200_reloc_map[i].bfd_reloc_val == code) 190 return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val]; 191 } 192 193 return NULL; 194 } 195 196 static reloc_howto_type * 197 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, 198 const char *r_name) 199 { 200 unsigned int i; 201 202 for (i = 0; 203 i < (sizeof (elf_mn10200_howto_table) 204 / sizeof (elf_mn10200_howto_table[0])); 205 i++) 206 if (elf_mn10200_howto_table[i].name != NULL 207 && strcasecmp (elf_mn10200_howto_table[i].name, r_name) == 0) 208 return &elf_mn10200_howto_table[i]; 209 210 return NULL; 211 } 212 213 /* Set the howto pointer for an MN10200 ELF reloc. */ 214 215 static bfd_boolean 216 mn10200_info_to_howto (bfd *abfd, 217 arelent *cache_ptr, 218 Elf_Internal_Rela *dst) 219 { 220 unsigned int r_type; 221 222 r_type = ELF32_R_TYPE (dst->r_info); 223 if (r_type >= (unsigned int) R_MN10200_MAX) 224 { 225 /* xgettext:c-format */ 226 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 227 abfd, r_type); 228 bfd_set_error (bfd_error_bad_value); 229 return FALSE; 230 } 231 232 cache_ptr->howto = &elf_mn10200_howto_table[r_type]; 233 return cache_ptr->howto != NULL; 234 } 235 236 /* Perform a relocation as part of a final link. */ 237 238 static bfd_reloc_status_type 239 mn10200_elf_final_link_relocate (reloc_howto_type *howto, 240 bfd *input_bfd, 241 bfd *output_bfd ATTRIBUTE_UNUSED, 242 asection *input_section, 243 bfd_byte *contents, 244 bfd_vma offset, 245 bfd_vma value, 246 bfd_vma addend, 247 struct bfd_link_info *info ATTRIBUTE_UNUSED, 248 asection *sym_sec ATTRIBUTE_UNUSED, 249 int is_local ATTRIBUTE_UNUSED) 250 { 251 unsigned long r_type = howto->type; 252 bfd_byte *hit_data = contents + offset; 253 254 switch (r_type) 255 { 256 257 case R_MN10200_NONE: 258 return bfd_reloc_ok; 259 260 case R_MN10200_32: 261 value += addend; 262 bfd_put_32 (input_bfd, value, hit_data); 263 return bfd_reloc_ok; 264 265 case R_MN10200_16: 266 value += addend; 267 268 if ((long) value > 0x7fff || (long) value < -0x8000) 269 return bfd_reloc_overflow; 270 271 bfd_put_16 (input_bfd, value, hit_data); 272 return bfd_reloc_ok; 273 274 case R_MN10200_8: 275 value += addend; 276 277 if ((long) value > 0x7f || (long) value < -0x80) 278 return bfd_reloc_overflow; 279 280 bfd_put_8 (input_bfd, value, hit_data); 281 return bfd_reloc_ok; 282 283 case R_MN10200_24: 284 value += addend; 285 286 if ((long) value > 0x7fffff || (long) value < -0x800000) 287 return bfd_reloc_overflow; 288 289 value &= 0xffffff; 290 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); 291 bfd_put_32 (input_bfd, value, hit_data); 292 return bfd_reloc_ok; 293 294 case R_MN10200_PCREL8: 295 value -= (input_section->output_section->vma 296 + input_section->output_offset); 297 value -= (offset + 1); 298 value += addend; 299 300 if ((long) value > 0xff || (long) value < -0x100) 301 return bfd_reloc_overflow; 302 303 bfd_put_8 (input_bfd, value, hit_data); 304 return bfd_reloc_ok; 305 306 case R_MN10200_PCREL16: 307 value -= (input_section->output_section->vma 308 + input_section->output_offset); 309 value -= (offset + 2); 310 value += addend; 311 312 if ((long) value > 0xffff || (long) value < -0x10000) 313 return bfd_reloc_overflow; 314 315 bfd_put_16 (input_bfd, value, hit_data); 316 return bfd_reloc_ok; 317 318 case R_MN10200_PCREL24: 319 value -= (input_section->output_section->vma 320 + input_section->output_offset); 321 value -= (offset + 3); 322 value += addend; 323 324 if ((long) value > 0xffffff || (long) value < -0x1000000) 325 return bfd_reloc_overflow; 326 327 value &= 0xffffff; 328 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); 329 bfd_put_32 (input_bfd, value, hit_data); 330 return bfd_reloc_ok; 331 332 default: 333 return bfd_reloc_notsupported; 334 } 335 } 336 337 /* Relocate an MN10200 ELF section. */ 339 static bfd_boolean 340 mn10200_elf_relocate_section (bfd *output_bfd, 341 struct bfd_link_info *info, 342 bfd *input_bfd, 343 asection *input_section, 344 bfd_byte *contents, 345 Elf_Internal_Rela *relocs, 346 Elf_Internal_Sym *local_syms, 347 asection **local_sections) 348 { 349 Elf_Internal_Shdr *symtab_hdr; 350 struct elf_link_hash_entry **sym_hashes; 351 Elf_Internal_Rela *rel, *relend; 352 353 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; 354 sym_hashes = elf_sym_hashes (input_bfd); 355 356 rel = relocs; 357 relend = relocs + input_section->reloc_count; 358 for (; rel < relend; rel++) 359 { 360 int r_type; 361 reloc_howto_type *howto; 362 unsigned long r_symndx; 363 Elf_Internal_Sym *sym; 364 asection *sec; 365 struct elf_link_hash_entry *h; 366 bfd_vma relocation; 367 bfd_reloc_status_type r; 368 369 r_symndx = ELF32_R_SYM (rel->r_info); 370 r_type = ELF32_R_TYPE (rel->r_info); 371 howto = elf_mn10200_howto_table + r_type; 372 373 h = NULL; 374 sym = NULL; 375 sec = NULL; 376 if (r_symndx < symtab_hdr->sh_info) 377 { 378 sym = local_syms + r_symndx; 379 sec = local_sections[r_symndx]; 380 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); 381 } 382 else 383 { 384 bfd_boolean unresolved_reloc, warned, ignored; 385 386 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 387 r_symndx, symtab_hdr, sym_hashes, 388 h, sec, relocation, 389 unresolved_reloc, warned, ignored); 390 } 391 392 if (sec != NULL && discarded_section (sec)) 393 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 394 rel, 1, relend, howto, 0, contents); 395 396 if (bfd_link_relocatable (info)) 397 continue; 398 399 r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, 400 input_section, 401 contents, rel->r_offset, 402 relocation, rel->r_addend, 403 info, sec, h == NULL); 404 405 if (r != bfd_reloc_ok) 406 { 407 const char *name; 408 const char *msg = (const char *) 0; 409 410 if (h != NULL) 411 name = h->root.root.string; 412 else 413 { 414 name = (bfd_elf_string_from_elf_section 415 (input_bfd, symtab_hdr->sh_link, sym->st_name)); 416 if (name == NULL || *name == '\0') 417 name = bfd_section_name (input_bfd, sec); 418 } 419 420 switch (r) 421 { 422 case bfd_reloc_overflow: 423 (*info->callbacks->reloc_overflow) 424 (info, (h ? &h->root : NULL), name, howto->name, 425 (bfd_vma) 0, input_bfd, input_section, rel->r_offset); 426 break; 427 428 case bfd_reloc_undefined: 429 (*info->callbacks->undefined_symbol) (info, name, input_bfd, 430 input_section, 431 rel->r_offset, TRUE); 432 break; 433 434 case bfd_reloc_outofrange: 435 msg = _("internal error: out of range error"); 436 goto common_error; 437 438 case bfd_reloc_notsupported: 439 msg = _("internal error: unsupported relocation error"); 440 goto common_error; 441 442 case bfd_reloc_dangerous: 443 msg = _("internal error: dangerous error"); 444 goto common_error; 445 446 default: 447 msg = _("internal error: unknown error"); 448 /* fall through */ 449 450 common_error: 451 (*info->callbacks->warning) (info, msg, name, input_bfd, 452 input_section, rel->r_offset); 453 break; 454 } 455 } 456 } 457 458 return TRUE; 459 } 460 461 /* Delete some bytes from a section while relaxing. */ 462 463 static bfd_boolean 464 mn10200_elf_relax_delete_bytes (bfd *abfd, asection *sec, 465 bfd_vma addr, int count) 466 { 467 Elf_Internal_Shdr *symtab_hdr; 468 unsigned int sec_shndx; 469 bfd_byte *contents; 470 Elf_Internal_Rela *irel, *irelend; 471 bfd_vma toaddr; 472 Elf_Internal_Sym *isym; 473 Elf_Internal_Sym *isymend; 474 struct elf_link_hash_entry **sym_hashes; 475 struct elf_link_hash_entry **end_hashes; 476 unsigned int symcount; 477 478 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 479 480 contents = elf_section_data (sec)->this_hdr.contents; 481 482 toaddr = sec->size; 483 484 irel = elf_section_data (sec)->relocs; 485 irelend = irel + sec->reloc_count; 486 487 /* Actually delete the bytes. */ 488 memmove (contents + addr, contents + addr + count, 489 (size_t) (toaddr - addr - count)); 490 sec->size -= count; 491 492 /* Adjust all the relocs. */ 493 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) 494 { 495 /* Get the new reloc address. */ 496 if ((irel->r_offset > addr 497 && irel->r_offset < toaddr)) 498 irel->r_offset -= count; 499 } 500 501 /* Adjust the local symbols defined in this section. */ 502 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 503 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 504 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) 505 { 506 if (isym->st_shndx == sec_shndx 507 && isym->st_value > addr 508 && isym->st_value < toaddr) 509 isym->st_value -= count; 510 } 511 512 /* Now adjust the global symbols defined in this section. */ 513 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 514 - symtab_hdr->sh_info); 515 sym_hashes = elf_sym_hashes (abfd); 516 end_hashes = sym_hashes + symcount; 517 for (; sym_hashes < end_hashes; sym_hashes++) 518 { 519 struct elf_link_hash_entry *sym_hash = *sym_hashes; 520 if ((sym_hash->root.type == bfd_link_hash_defined 521 || sym_hash->root.type == bfd_link_hash_defweak) 522 && sym_hash->root.u.def.section == sec 523 && sym_hash->root.u.def.value > addr 524 && sym_hash->root.u.def.value < toaddr) 525 { 526 sym_hash->root.u.def.value -= count; 527 } 528 } 529 530 return TRUE; 531 } 532 533 /* This function handles relaxing for the mn10200. 534 535 There are quite a few relaxing opportunities available on the mn10200: 536 537 * jsr:24 -> jsr:16 2 bytes 538 539 * jmp:24 -> jmp:16 2 bytes 540 * jmp:16 -> bra:8 1 byte 541 542 * If the previous instruction is a conditional branch 543 around the jump/bra, we may be able to reverse its condition 544 and change its target to the jump's target. The jump/bra 545 can then be deleted. 2 bytes 546 547 * mov abs24 -> mov abs16 2 byte savings 548 549 * Most instructions which accept imm24 can relax to imm16 2 bytes 550 - Most instructions which accept imm16 can relax to imm8 1 byte 551 552 * Most instructions which accept d24 can relax to d16 2 bytes 553 - Most instructions which accept d16 can relax to d8 1 byte 554 555 abs24, imm24, d24 all look the same at the reloc level. It 556 might make the code simpler if we had different relocs for 557 the various relaxable operand types. 558 559 We don't handle imm16->imm8 or d16->d8 as they're very rare 560 and somewhat more difficult to support. */ 561 562 static bfd_boolean 563 mn10200_elf_relax_section (bfd *abfd, 564 asection *sec, 565 struct bfd_link_info *link_info, 566 bfd_boolean *again) 567 { 568 Elf_Internal_Shdr *symtab_hdr; 569 Elf_Internal_Rela *internal_relocs; 570 Elf_Internal_Rela *irel, *irelend; 571 bfd_byte *contents = NULL; 572 Elf_Internal_Sym *isymbuf = NULL; 573 574 /* Assume nothing changes. */ 575 *again = FALSE; 576 577 /* We don't have to do anything for a relocatable link, if 578 this section does not have relocs, or if this is not a 579 code section. */ 580 if (bfd_link_relocatable (link_info) 581 || (sec->flags & SEC_RELOC) == 0 582 || sec->reloc_count == 0 583 || (sec->flags & SEC_CODE) == 0) 584 return TRUE; 585 586 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 587 588 /* Get a copy of the native relocations. */ 589 internal_relocs = (_bfd_elf_link_read_relocs 590 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 591 link_info->keep_memory)); 592 if (internal_relocs == NULL) 593 goto error_return; 594 595 /* Walk through them looking for relaxing opportunities. */ 596 irelend = internal_relocs + sec->reloc_count; 597 for (irel = internal_relocs; irel < irelend; irel++) 598 { 599 bfd_vma symval; 600 601 /* If this isn't something that can be relaxed, then ignore 602 this reloc. */ 603 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE 604 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8 605 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX) 606 continue; 607 608 /* Get the section contents if we haven't done so already. */ 609 if (contents == NULL) 610 { 611 /* Get cached copy if it exists. */ 612 if (elf_section_data (sec)->this_hdr.contents != NULL) 613 contents = elf_section_data (sec)->this_hdr.contents; 614 else 615 { 616 /* Go get them off disk. */ 617 if (!bfd_malloc_and_get_section (abfd, sec, &contents)) 618 goto error_return; 619 } 620 } 621 622 /* Read this BFD's local symbols if we haven't done so already. */ 623 if (isymbuf == NULL && symtab_hdr->sh_info != 0) 624 { 625 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 626 if (isymbuf == NULL) 627 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, 628 symtab_hdr->sh_info, 0, 629 NULL, NULL, NULL); 630 if (isymbuf == NULL) 631 goto error_return; 632 } 633 634 /* Get the value of the symbol referred to by the reloc. */ 635 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 636 { 637 /* A local symbol. */ 638 Elf_Internal_Sym *isym; 639 asection *sym_sec; 640 641 isym = isymbuf + ELF32_R_SYM (irel->r_info); 642 if (isym->st_shndx == SHN_UNDEF) 643 sym_sec = bfd_und_section_ptr; 644 else if (isym->st_shndx == SHN_ABS) 645 sym_sec = bfd_abs_section_ptr; 646 else if (isym->st_shndx == SHN_COMMON) 647 sym_sec = bfd_com_section_ptr; 648 else 649 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 650 symval = (isym->st_value 651 + sym_sec->output_section->vma 652 + sym_sec->output_offset); 653 } 654 else 655 { 656 unsigned long indx; 657 struct elf_link_hash_entry *h; 658 659 /* An external symbol. */ 660 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 661 h = elf_sym_hashes (abfd)[indx]; 662 BFD_ASSERT (h != NULL); 663 if (h->root.type != bfd_link_hash_defined 664 && h->root.type != bfd_link_hash_defweak) 665 { 666 /* This appears to be a reference to an undefined 667 symbol. Just ignore it--it will be caught by the 668 regular reloc processing. */ 669 continue; 670 } 671 672 symval = (h->root.u.def.value 673 + h->root.u.def.section->output_section->vma 674 + h->root.u.def.section->output_offset); 675 } 676 677 /* For simplicity of coding, we are going to modify the section 678 contents, the section relocs, and the BFD symbol table. We 679 must tell the rest of the code not to free up this 680 information. It would be possible to instead create a table 681 of changes which have to be made, as is done in coff-mips.c; 682 that would be more work, but would require less memory when 683 the linker is run. */ 684 685 /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative 686 branch/call. */ 687 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24) 688 { 689 bfd_vma value = symval; 690 691 /* Deal with pc-relative gunk. */ 692 value -= (sec->output_section->vma + sec->output_offset); 693 value -= (irel->r_offset + 3); 694 value += irel->r_addend; 695 696 /* See if the value will fit in 16 bits, note the high value is 697 0x7fff + 2 as the target will be two bytes closer if we are 698 able to relax. */ 699 if ((long) value < 0x8001 && (long) value > -0x8000) 700 { 701 unsigned char code; 702 703 /* Get the opcode. */ 704 code = bfd_get_8 (abfd, contents + irel->r_offset - 1); 705 706 if (code != 0xe0 && code != 0xe1) 707 continue; 708 709 /* Note that we've changed the relocs, section contents, etc. */ 710 elf_section_data (sec)->relocs = internal_relocs; 711 elf_section_data (sec)->this_hdr.contents = contents; 712 symtab_hdr->contents = (unsigned char *) isymbuf; 713 714 /* Fix the opcode. */ 715 if (code == 0xe0) 716 bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2); 717 else if (code == 0xe1) 718 bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2); 719 720 /* Fix the relocation's type. */ 721 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 722 R_MN10200_PCREL16); 723 724 /* The opcode got shorter too, so we have to fix the offset. */ 725 irel->r_offset -= 1; 726 727 /* Delete two bytes of data. */ 728 if (!mn10200_elf_relax_delete_bytes (abfd, sec, 729 irel->r_offset + 1, 2)) 730 goto error_return; 731 732 /* That will change things, so, we should relax again. 733 Note that this is not required, and it may be slow. */ 734 *again = TRUE; 735 } 736 } 737 738 /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative 739 branch. */ 740 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16) 741 { 742 bfd_vma value = symval; 743 744 /* Deal with pc-relative gunk. */ 745 value -= (sec->output_section->vma + sec->output_offset); 746 value -= (irel->r_offset + 2); 747 value += irel->r_addend; 748 749 /* See if the value will fit in 8 bits, note the high value is 750 0x7f + 1 as the target will be one bytes closer if we are 751 able to relax. */ 752 if ((long) value < 0x80 && (long) value > -0x80) 753 { 754 unsigned char code; 755 756 /* Get the opcode. */ 757 code = bfd_get_8 (abfd, contents + irel->r_offset - 1); 758 759 if (code != 0xfc) 760 continue; 761 762 /* Note that we've changed the relocs, section contents, etc. */ 763 elf_section_data (sec)->relocs = internal_relocs; 764 elf_section_data (sec)->this_hdr.contents = contents; 765 symtab_hdr->contents = (unsigned char *) isymbuf; 766 767 /* Fix the opcode. */ 768 bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1); 769 770 /* Fix the relocation's type. */ 771 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 772 R_MN10200_PCREL8); 773 774 /* Delete one byte of data. */ 775 if (!mn10200_elf_relax_delete_bytes (abfd, sec, 776 irel->r_offset + 1, 1)) 777 goto error_return; 778 779 /* That will change things, so, we should relax again. 780 Note that this is not required, and it may be slow. */ 781 *again = TRUE; 782 } 783 } 784 785 /* Try to eliminate an unconditional 8 bit pc-relative branch 786 which immediately follows a conditional 8 bit pc-relative 787 branch around the unconditional branch. 788 789 original: new: 790 bCC lab1 bCC' lab2 791 bra lab2 792 lab1: lab1: 793 794 This happens when the bCC can't reach lab2 at assembly time, 795 but due to other relaxations it can reach at link time. */ 796 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8) 797 { 798 Elf_Internal_Rela *nrel; 799 bfd_vma value = symval; 800 unsigned char code; 801 802 /* Deal with pc-relative gunk. */ 803 value -= (sec->output_section->vma + sec->output_offset); 804 value -= (irel->r_offset + 1); 805 value += irel->r_addend; 806 807 /* Do nothing if this reloc is the last byte in the section. */ 808 if (irel->r_offset == sec->size) 809 continue; 810 811 /* See if the next instruction is an unconditional pc-relative 812 branch, more often than not this test will fail, so we 813 test it first to speed things up. */ 814 code = bfd_get_8 (abfd, contents + irel->r_offset + 1); 815 if (code != 0xea) 816 continue; 817 818 /* Also make sure the next relocation applies to the next 819 instruction and that it's a pc-relative 8 bit branch. */ 820 nrel = irel + 1; 821 if (nrel == irelend 822 || irel->r_offset + 2 != nrel->r_offset 823 || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8) 824 continue; 825 826 /* Make sure our destination immediately follows the 827 unconditional branch. */ 828 if (symval != (sec->output_section->vma + sec->output_offset 829 + irel->r_offset + 3)) 830 continue; 831 832 /* Now make sure we are a conditional branch. This may not 833 be necessary, but why take the chance. 834 835 Note these checks assume that R_MN10200_PCREL8 relocs 836 only occur on bCC and bCCx insns. If they occured 837 elsewhere, we'd need to know the start of this insn 838 for this check to be accurate. */ 839 code = bfd_get_8 (abfd, contents + irel->r_offset - 1); 840 if (code != 0xe0 && code != 0xe1 && code != 0xe2 841 && code != 0xe3 && code != 0xe4 && code != 0xe5 842 && code != 0xe6 && code != 0xe7 && code != 0xe8 843 && code != 0xe9 && code != 0xec && code != 0xed 844 && code != 0xee && code != 0xef && code != 0xfc 845 && code != 0xfd && code != 0xfe && code != 0xff) 846 continue; 847 848 /* We also have to be sure there is no symbol/label 849 at the unconditional branch. */ 850 if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf, 851 irel->r_offset + 1)) 852 continue; 853 854 /* Note that we've changed the relocs, section contents, etc. */ 855 elf_section_data (sec)->relocs = internal_relocs; 856 elf_section_data (sec)->this_hdr.contents = contents; 857 symtab_hdr->contents = (unsigned char *) isymbuf; 858 859 /* Reverse the condition of the first branch. */ 860 switch (code) 861 { 862 case 0xfc: 863 code = 0xfd; 864 break; 865 case 0xfd: 866 code = 0xfc; 867 break; 868 case 0xfe: 869 code = 0xff; 870 break; 871 case 0xff: 872 code = 0xfe; 873 break; 874 case 0xe8: 875 code = 0xe9; 876 break; 877 case 0xe9: 878 code = 0xe8; 879 break; 880 case 0xe0: 881 code = 0xe2; 882 break; 883 case 0xe2: 884 code = 0xe0; 885 break; 886 case 0xe3: 887 code = 0xe1; 888 break; 889 case 0xe1: 890 code = 0xe3; 891 break; 892 case 0xe4: 893 code = 0xe6; 894 break; 895 case 0xe6: 896 code = 0xe4; 897 break; 898 case 0xe7: 899 code = 0xe5; 900 break; 901 case 0xe5: 902 code = 0xe7; 903 break; 904 case 0xec: 905 code = 0xed; 906 break; 907 case 0xed: 908 code = 0xec; 909 break; 910 case 0xee: 911 code = 0xef; 912 break; 913 case 0xef: 914 code = 0xee; 915 break; 916 } 917 bfd_put_8 (abfd, code, contents + irel->r_offset - 1); 918 919 /* Set the reloc type and symbol for the first branch 920 from the second branch. */ 921 irel->r_info = nrel->r_info; 922 923 /* Make the reloc for the second branch a null reloc. */ 924 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), 925 R_MN10200_NONE); 926 927 /* Delete two bytes of data. */ 928 if (!mn10200_elf_relax_delete_bytes (abfd, sec, 929 irel->r_offset + 1, 2)) 930 goto error_return; 931 932 /* That will change things, so, we should relax again. 933 Note that this is not required, and it may be slow. */ 934 *again = TRUE; 935 } 936 937 /* Try to turn a 24bit immediate, displacement or absolute address 938 into a 16bit immediate, displacement or absolute address. */ 939 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24) 940 { 941 bfd_vma value = symval; 942 943 /* See if the value will fit in 16 bits. 944 We allow any 16bit match here. We prune those we can't 945 handle below. */ 946 if ((long) value < 0x7fff && (long) value > -0x8000) 947 { 948 unsigned char code; 949 950 /* All insns which have 24bit operands are 5 bytes long, 951 the first byte will always be 0xf4, but we double check 952 it just in case. */ 953 954 /* Get the first opcode. */ 955 code = bfd_get_8 (abfd, contents + irel->r_offset - 2); 956 957 if (code != 0xf4) 958 continue; 959 960 /* Get the second opcode. */ 961 code = bfd_get_8 (abfd, contents + irel->r_offset - 1); 962 963 switch (code & 0xfc) 964 { 965 /* mov imm24,dn -> mov imm16,dn */ 966 case 0x70: 967 /* Not safe if the high bit is on as relaxing may 968 move the value out of high mem and thus not fit 969 in a signed 16bit value. */ 970 if (value & 0x8000) 971 continue; 972 973 /* Note that we've changed the relocation contents, etc. */ 974 elf_section_data (sec)->relocs = internal_relocs; 975 elf_section_data (sec)->this_hdr.contents = contents; 976 symtab_hdr->contents = (unsigned char *) isymbuf; 977 978 /* Fix the opcode. */ 979 bfd_put_8 (abfd, 0xf8 + (code & 0x03), 980 contents + irel->r_offset - 2); 981 982 /* Fix the relocation's type. */ 983 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 984 R_MN10200_16); 985 986 /* The opcode got shorter too, so we have to fix the 987 offset. */ 988 irel->r_offset -= 1; 989 990 /* Delete two bytes of data. */ 991 if (!mn10200_elf_relax_delete_bytes (abfd, sec, 992 irel->r_offset + 1, 2)) 993 goto error_return; 994 995 /* That will change things, so, we should relax again. 996 Note that this is not required, and it may be slow. */ 997 *again = TRUE; 998 break; 999 1000 /* mov imm24,an -> mov imm16,an 1001 cmp imm24,an -> cmp imm16,an 1002 mov (abs24),dn -> mov (abs16),dn 1003 mov dn,(abs24) -> mov dn,(abs16) 1004 movb dn,(abs24) -> movb dn,(abs16) 1005 movbu (abs24),dn -> movbu (abs16),dn */ 1006 case 0x74: 1007 case 0x7c: 1008 case 0xc0: 1009 case 0x40: 1010 case 0x44: 1011 case 0xc8: 1012 /* Note that we've changed the relocation contents, etc. */ 1013 elf_section_data (sec)->relocs = internal_relocs; 1014 elf_section_data (sec)->this_hdr.contents = contents; 1015 symtab_hdr->contents = (unsigned char *) isymbuf; 1016 1017 if ((code & 0xfc) == 0x74) 1018 code = 0xdc + (code & 0x03); 1019 else if ((code & 0xfc) == 0x7c) 1020 code = 0xec + (code & 0x03); 1021 else if ((code & 0xfc) == 0xc0) 1022 code = 0xc8 + (code & 0x03); 1023 else if ((code & 0xfc) == 0x40) 1024 code = 0xc0 + (code & 0x03); 1025 else if ((code & 0xfc) == 0x44) 1026 code = 0xc4 + (code & 0x03); 1027 else if ((code & 0xfc) == 0xc8) 1028 code = 0xcc + (code & 0x03); 1029 1030 /* Fix the opcode. */ 1031 bfd_put_8 (abfd, code, contents + irel->r_offset - 2); 1032 1033 /* Fix the relocation's type. */ 1034 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 1035 R_MN10200_16); 1036 1037 /* The opcode got shorter too, so we have to fix the 1038 offset. */ 1039 irel->r_offset -= 1; 1040 1041 /* Delete two bytes of data. */ 1042 if (!mn10200_elf_relax_delete_bytes (abfd, sec, 1043 irel->r_offset + 1, 2)) 1044 goto error_return; 1045 1046 /* That will change things, so, we should relax again. 1047 Note that this is not required, and it may be slow. */ 1048 *again = TRUE; 1049 break; 1050 1051 /* cmp imm24,dn -> cmp imm16,dn 1052 mov (abs24),an -> mov (abs16),an 1053 mov an,(abs24) -> mov an,(abs16) 1054 add imm24,dn -> add imm16,dn 1055 add imm24,an -> add imm16,an 1056 sub imm24,dn -> sub imm16,dn 1057 sub imm24,an -> sub imm16,an 1058 And all d24->d16 in memory ops. */ 1059 case 0x78: 1060 case 0xd0: 1061 case 0x50: 1062 case 0x60: 1063 case 0x64: 1064 case 0x68: 1065 case 0x6c: 1066 case 0x80: 1067 case 0xf0: 1068 case 0x00: 1069 case 0x10: 1070 case 0xb0: 1071 case 0x30: 1072 case 0xa0: 1073 case 0x20: 1074 case 0x90: 1075 /* Not safe if the high bit is on as relaxing may 1076 move the value out of high mem and thus not fit 1077 in a signed 16bit value. */ 1078 if (((code & 0xfc) == 0x78 1079 || (code & 0xfc) == 0x60 1080 || (code & 0xfc) == 0x64 1081 || (code & 0xfc) == 0x68 1082 || (code & 0xfc) == 0x6c 1083 || (code & 0xfc) == 0x80 1084 || (code & 0xfc) == 0xf0 1085 || (code & 0xfc) == 0x00 1086 || (code & 0xfc) == 0x10 1087 || (code & 0xfc) == 0xb0 1088 || (code & 0xfc) == 0x30 1089 || (code & 0xfc) == 0xa0 1090 || (code & 0xfc) == 0x20 1091 || (code & 0xfc) == 0x90) 1092 && (value & 0x8000) != 0) 1093 continue; 1094 1095 /* Note that we've changed the relocation contents, etc. */ 1096 elf_section_data (sec)->relocs = internal_relocs; 1097 elf_section_data (sec)->this_hdr.contents = contents; 1098 symtab_hdr->contents = (unsigned char *) isymbuf; 1099 1100 /* Fix the opcode. */ 1101 bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2); 1102 1103 if ((code & 0xfc) == 0x78) 1104 code = 0x48 + (code & 0x03); 1105 else if ((code & 0xfc) == 0xd0) 1106 code = 0x30 + (code & 0x03); 1107 else if ((code & 0xfc) == 0x50) 1108 code = 0x20 + (code & 0x03); 1109 else if ((code & 0xfc) == 0x60) 1110 code = 0x18 + (code & 0x03); 1111 else if ((code & 0xfc) == 0x64) 1112 code = 0x08 + (code & 0x03); 1113 else if ((code & 0xfc) == 0x68) 1114 code = 0x1c + (code & 0x03); 1115 else if ((code & 0xfc) == 0x6c) 1116 code = 0x0c + (code & 0x03); 1117 else if ((code & 0xfc) == 0x80) 1118 code = 0xc0 + (code & 0x07); 1119 else if ((code & 0xfc) == 0xf0) 1120 code = 0xb0 + (code & 0x07); 1121 else if ((code & 0xfc) == 0x00) 1122 code = 0x80 + (code & 0x07); 1123 else if ((code & 0xfc) == 0x10) 1124 code = 0xa0 + (code & 0x07); 1125 else if ((code & 0xfc) == 0xb0) 1126 code = 0x70 + (code & 0x07); 1127 else if ((code & 0xfc) == 0x30) 1128 code = 0x60 + (code & 0x07); 1129 else if ((code & 0xfc) == 0xa0) 1130 code = 0xd0 + (code & 0x07); 1131 else if ((code & 0xfc) == 0x20) 1132 code = 0x90 + (code & 0x07); 1133 else if ((code & 0xfc) == 0x90) 1134 code = 0x50 + (code & 0x07); 1135 1136 bfd_put_8 (abfd, code, contents + irel->r_offset - 1); 1137 1138 /* Fix the relocation's type. */ 1139 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 1140 R_MN10200_16); 1141 1142 /* Delete one bytes of data. */ 1143 if (!mn10200_elf_relax_delete_bytes (abfd, sec, 1144 irel->r_offset + 2, 1)) 1145 goto error_return; 1146 1147 /* That will change things, so, we should relax again. 1148 Note that this is not required, and it may be slow. */ 1149 *again = TRUE; 1150 break; 1151 1152 /* movb (abs24),dn ->movbu (abs16),dn extxb bn */ 1153 case 0xc4: 1154 /* Note that we've changed the reldection contents, etc. */ 1155 elf_section_data (sec)->relocs = internal_relocs; 1156 elf_section_data (sec)->this_hdr.contents = contents; 1157 symtab_hdr->contents = (unsigned char *) isymbuf; 1158 1159 bfd_put_8 (abfd, 0xcc + (code & 0x03), 1160 contents + irel->r_offset - 2); 1161 1162 bfd_put_8 (abfd, 0xb8 + (code & 0x03), 1163 contents + irel->r_offset - 1); 1164 1165 /* Fix the relocation's type. */ 1166 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), 1167 R_MN10200_16); 1168 1169 /* The reloc will be applied one byte in front of its 1170 current location. */ 1171 irel->r_offset -= 1; 1172 1173 /* Delete one bytes of data. */ 1174 if (!mn10200_elf_relax_delete_bytes (abfd, sec, 1175 irel->r_offset + 2, 1)) 1176 goto error_return; 1177 1178 /* That will change things, so, we should relax again. 1179 Note that this is not required, and it may be slow. */ 1180 *again = TRUE; 1181 break; 1182 } 1183 } 1184 } 1185 } 1186 1187 if (isymbuf != NULL 1188 && symtab_hdr->contents != (unsigned char *) isymbuf) 1189 { 1190 if (! link_info->keep_memory) 1191 free (isymbuf); 1192 else 1193 { 1194 /* Cache the symbols for elf_link_input_bfd. */ 1195 symtab_hdr->contents = (unsigned char *) isymbuf; 1196 } 1197 } 1198 1199 if (contents != NULL 1200 && elf_section_data (sec)->this_hdr.contents != contents) 1201 { 1202 if (! link_info->keep_memory) 1203 free (contents); 1204 else 1205 { 1206 /* Cache the section contents for elf_link_input_bfd. */ 1207 elf_section_data (sec)->this_hdr.contents = contents; 1208 } 1209 } 1210 1211 if (internal_relocs != NULL 1212 && elf_section_data (sec)->relocs != internal_relocs) 1213 free (internal_relocs); 1214 1215 return TRUE; 1216 1217 error_return: 1218 if (isymbuf != NULL 1219 && symtab_hdr->contents != (unsigned char *) isymbuf) 1220 free (isymbuf); 1221 if (contents != NULL 1222 && elf_section_data (sec)->this_hdr.contents != contents) 1223 free (contents); 1224 if (internal_relocs != NULL 1225 && elf_section_data (sec)->relocs != internal_relocs) 1226 free (internal_relocs); 1227 1228 return FALSE; 1229 } 1230 1231 /* Return TRUE if a symbol exists at the given address, else return 1232 FALSE. */ 1233 static bfd_boolean 1234 mn10200_elf_symbol_address_p (bfd *abfd, 1235 asection *sec, 1236 Elf_Internal_Sym *isym, 1237 bfd_vma addr) 1238 { 1239 Elf_Internal_Shdr *symtab_hdr; 1240 unsigned int sec_shndx; 1241 Elf_Internal_Sym *isymend; 1242 struct elf_link_hash_entry **sym_hashes; 1243 struct elf_link_hash_entry **end_hashes; 1244 unsigned int symcount; 1245 1246 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1247 1248 /* Examine all the local symbols. */ 1249 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1250 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) 1251 { 1252 if (isym->st_shndx == sec_shndx 1253 && isym->st_value == addr) 1254 return TRUE; 1255 } 1256 1257 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1258 - symtab_hdr->sh_info); 1259 sym_hashes = elf_sym_hashes (abfd); 1260 end_hashes = sym_hashes + symcount; 1261 for (; sym_hashes < end_hashes; sym_hashes++) 1262 { 1263 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1264 if ((sym_hash->root.type == bfd_link_hash_defined 1265 || sym_hash->root.type == bfd_link_hash_defweak) 1266 && sym_hash->root.u.def.section == sec 1267 && sym_hash->root.u.def.value == addr) 1268 return TRUE; 1269 } 1270 1271 return FALSE; 1272 } 1273 1274 /* This is a version of bfd_generic_get_relocated_section_contents 1275 which uses mn10200_elf_relocate_section. */ 1276 1277 static bfd_byte * 1278 mn10200_elf_get_relocated_section_contents (bfd *output_bfd, 1279 struct bfd_link_info *link_info, 1280 struct bfd_link_order *link_order, 1281 bfd_byte *data, 1282 bfd_boolean relocatable, 1283 asymbol **symbols) 1284 { 1285 Elf_Internal_Shdr *symtab_hdr; 1286 asection *input_section = link_order->u.indirect.section; 1287 bfd *input_bfd = input_section->owner; 1288 asection **sections = NULL; 1289 Elf_Internal_Rela *internal_relocs = NULL; 1290 Elf_Internal_Sym *isymbuf = NULL; 1291 1292 /* We only need to handle the case of relaxing, or of having a 1293 particular set of section contents, specially. */ 1294 if (relocatable 1295 || elf_section_data (input_section)->this_hdr.contents == NULL) 1296 return bfd_generic_get_relocated_section_contents (output_bfd, link_info, 1297 link_order, data, 1298 relocatable, 1299 symbols); 1300 1301 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; 1302 1303 memcpy (data, elf_section_data (input_section)->this_hdr.contents, 1304 (size_t) input_section->size); 1305 1306 if ((input_section->flags & SEC_RELOC) != 0 1307 && input_section->reloc_count > 0) 1308 { 1309 Elf_Internal_Sym *isym; 1310 Elf_Internal_Sym *isymend; 1311 asection **secpp; 1312 bfd_size_type amt; 1313 1314 internal_relocs = (_bfd_elf_link_read_relocs 1315 (input_bfd, input_section, NULL, 1316 (Elf_Internal_Rela *) NULL, FALSE)); 1317 if (internal_relocs == NULL) 1318 goto error_return; 1319 1320 if (symtab_hdr->sh_info != 0) 1321 { 1322 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1323 if (isymbuf == NULL) 1324 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, 1325 symtab_hdr->sh_info, 0, 1326 NULL, NULL, NULL); 1327 if (isymbuf == NULL) 1328 goto error_return; 1329 } 1330 1331 amt = symtab_hdr->sh_info; 1332 amt *= sizeof (asection *); 1333 sections = (asection **) bfd_malloc (amt); 1334 if (sections == NULL && amt != 0) 1335 goto error_return; 1336 1337 isymend = isymbuf + symtab_hdr->sh_info; 1338 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) 1339 { 1340 asection *isec; 1341 1342 if (isym->st_shndx == SHN_UNDEF) 1343 isec = bfd_und_section_ptr; 1344 else if (isym->st_shndx == SHN_ABS) 1345 isec = bfd_abs_section_ptr; 1346 else if (isym->st_shndx == SHN_COMMON) 1347 isec = bfd_com_section_ptr; 1348 else 1349 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); 1350 1351 *secpp = isec; 1352 } 1353 1354 if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd, 1355 input_section, data, internal_relocs, 1356 isymbuf, sections)) 1357 goto error_return; 1358 1359 if (sections != NULL) 1360 free (sections); 1361 if (isymbuf != NULL 1362 && symtab_hdr->contents != (unsigned char *) isymbuf) 1363 free (isymbuf); 1364 if (elf_section_data (input_section)->relocs != internal_relocs) 1365 free (internal_relocs); 1366 } 1367 1368 return data; 1369 1370 error_return: 1371 if (sections != NULL) 1372 free (sections); 1373 if (isymbuf != NULL 1374 && symtab_hdr->contents != (unsigned char *) isymbuf) 1375 free (isymbuf); 1376 if (internal_relocs != NULL 1377 && elf_section_data (input_section)->relocs != internal_relocs) 1378 free (internal_relocs); 1379 return NULL; 1380 } 1381 1382 #define TARGET_LITTLE_SYM mn10200_elf32_vec 1383 #define TARGET_LITTLE_NAME "elf32-mn10200" 1384 #define ELF_ARCH bfd_arch_mn10200 1385 #define ELF_MACHINE_CODE EM_MN10200 1386 #define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200 1387 #define ELF_MAXPAGESIZE 0x1000 1388 1389 #define elf_backend_rela_normal 1 1390 #define elf_info_to_howto mn10200_info_to_howto 1391 #define elf_info_to_howto_rel NULL 1392 #define elf_backend_relocate_section mn10200_elf_relocate_section 1393 #define bfd_elf32_bfd_relax_section mn10200_elf_relax_section 1394 #define bfd_elf32_bfd_get_relocated_section_contents \ 1395 mn10200_elf_get_relocated_section_contents 1396 1397 #define elf_symbol_leading_char '_' 1398 1399 #include "elf32-target.h" 1400
Indexes created Sun Mar 01 05:31:48 UTC 2026