tc-mn10300.c revision 1.1.1.8
1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300 2 Copyright (C) 1996-2025 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21 #include "as.h" 22 #include "safe-ctype.h" 23 #include "subsegs.h" 24 #include "opcode/mn10300.h" 25 #include "dwarf2dbg.h" 26 #include "libiberty.h" 27 28 /* Structure to hold information about predefined registers. */ 30 struct reg_name 31 { 32 const char *name; 33 int value; 34 }; 35 36 /* Generic assembler global variables which must be defined by all 37 targets. */ 38 39 /* Characters which always start a comment. */ 40 const char comment_chars[] = "#"; 41 42 /* Characters which start a comment at the beginning of a line. */ 43 const char line_comment_chars[] = ";#"; 44 45 /* Characters which may be used to separate multiple commands on a 46 single line. */ 47 const char line_separator_chars[] = ";"; 48 49 /* Characters which are used to indicate an exponent in a floating 50 point number. */ 51 const char EXP_CHARS[] = "eE"; 52 53 /* Characters which mean that a number is a floating point constant, 54 as in 0d1.0. */ 55 const char FLT_CHARS[] = "dD"; 56 57 const relax_typeS md_relax_table[] = 59 { 60 /* The plus values for the bCC and fBCC instructions in the table below 61 are because the branch instruction is translated into a jump 62 instruction that is now +2 or +3 bytes further on in memory, and the 63 correct size of jump instruction must be selected. */ 64 /* bCC relaxing. */ 65 {0x7f, -0x80, 2, 1}, 66 {0x7fff + 2, -0x8000 + 2, 5, 2}, 67 {0x7fffffff, -0x80000000, 7, 0}, 68 69 /* bCC relaxing (uncommon cases for 3byte length instructions) */ 70 {0x7f, -0x80, 3, 4}, 71 {0x7fff + 3, -0x8000 + 3, 6, 5}, 72 {0x7fffffff, -0x80000000, 8, 0}, 73 74 /* call relaxing. */ 75 {0x7fff, -0x8000, 5, 7}, 76 {0x7fffffff, -0x80000000, 7, 0}, 77 78 /* calls relaxing. */ 79 {0x7fff, -0x8000, 4, 9}, 80 {0x7fffffff, -0x80000000, 6, 0}, 81 82 /* jmp relaxing. */ 83 {0x7f, -0x80, 2, 11}, 84 {0x7fff, -0x8000, 3, 12}, 85 {0x7fffffff, -0x80000000, 5, 0}, 86 87 /* fbCC relaxing. */ 88 {0x7f, -0x80, 3, 14}, 89 {0x7fff + 3, -0x8000 + 3, 6, 15}, 90 {0x7fffffff, -0x80000000, 8, 0}, 91 92 }; 93 94 static int current_machine; 95 96 /* Fixups. */ 97 #define MAX_INSN_FIXUPS 5 98 99 struct mn10300_fixup 100 { 101 expressionS exp; 102 int opindex; 103 bfd_reloc_code_real_type reloc; 104 }; 105 struct mn10300_fixup fixups[MAX_INSN_FIXUPS]; 106 static int fc; 107 108 /* We must store the value of each register operand so that we can 109 verify that certain registers do not match. */ 110 int mn10300_reg_operands[MN10300_MAX_OPERANDS]; 111 112 const char md_shortopts[] = ""; 114 115 const struct option md_longopts[] = 116 { 117 {NULL, no_argument, NULL, 0} 118 }; 119 120 const size_t md_longopts_size = sizeof (md_longopts); 121 122 #define HAVE_AM33_2 (current_machine == AM33_2) 123 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2) 124 #define HAVE_AM30 (current_machine == AM30) 125 126 /* Opcode hash table. */ 127 static htab_t mn10300_hash; 128 129 /* This table is sorted. Suitable for searching by a binary search. */ 130 static const struct reg_name data_registers[] = 131 { 132 { "d0", 0 }, 133 { "d1", 1 }, 134 { "d2", 2 }, 135 { "d3", 3 }, 136 }; 137 138 static const struct reg_name address_registers[] = 139 { 140 { "a0", 0 }, 141 { "a1", 1 }, 142 { "a2", 2 }, 143 { "a3", 3 }, 144 }; 145 146 static const struct reg_name r_registers[] = 147 { 148 { "a0", 8 }, 149 { "a1", 9 }, 150 { "a2", 10 }, 151 { "a3", 11 }, 152 { "d0", 12 }, 153 { "d1", 13 }, 154 { "d2", 14 }, 155 { "d3", 15 }, 156 { "e0", 0 }, 157 { "e1", 1 }, 158 { "e10", 10 }, 159 { "e11", 11 }, 160 { "e12", 12 }, 161 { "e13", 13 }, 162 { "e14", 14 }, 163 { "e15", 15 }, 164 { "e2", 2 }, 165 { "e3", 3 }, 166 { "e4", 4 }, 167 { "e5", 5 }, 168 { "e6", 6 }, 169 { "e7", 7 }, 170 { "e8", 8 }, 171 { "e9", 9 }, 172 { "r0", 0 }, 173 { "r1", 1 }, 174 { "r10", 10 }, 175 { "r11", 11 }, 176 { "r12", 12 }, 177 { "r13", 13 }, 178 { "r14", 14 }, 179 { "r15", 15 }, 180 { "r2", 2 }, 181 { "r3", 3 }, 182 { "r4", 4 }, 183 { "r5", 5 }, 184 { "r6", 6 }, 185 { "r7", 7 }, 186 { "r8", 8 }, 187 { "r9", 9 }, 188 }; 189 190 static const struct reg_name xr_registers[] = 191 { 192 { "mcrh", 2 }, 193 { "mcrl", 3 }, 194 { "mcvf", 4 }, 195 { "mdrq", 1 }, 196 { "sp", 0 }, 197 { "xr0", 0 }, 198 { "xr1", 1 }, 199 { "xr10", 10 }, 200 { "xr11", 11 }, 201 { "xr12", 12 }, 202 { "xr13", 13 }, 203 { "xr14", 14 }, 204 { "xr15", 15 }, 205 { "xr2", 2 }, 206 { "xr3", 3 }, 207 { "xr4", 4 }, 208 { "xr5", 5 }, 209 { "xr6", 6 }, 210 { "xr7", 7 }, 211 { "xr8", 8 }, 212 { "xr9", 9 }, 213 }; 214 215 static const struct reg_name float_registers[] = 216 { 217 { "fs0", 0 }, 218 { "fs1", 1 }, 219 { "fs10", 10 }, 220 { "fs11", 11 }, 221 { "fs12", 12 }, 222 { "fs13", 13 }, 223 { "fs14", 14 }, 224 { "fs15", 15 }, 225 { "fs16", 16 }, 226 { "fs17", 17 }, 227 { "fs18", 18 }, 228 { "fs19", 19 }, 229 { "fs2", 2 }, 230 { "fs20", 20 }, 231 { "fs21", 21 }, 232 { "fs22", 22 }, 233 { "fs23", 23 }, 234 { "fs24", 24 }, 235 { "fs25", 25 }, 236 { "fs26", 26 }, 237 { "fs27", 27 }, 238 { "fs28", 28 }, 239 { "fs29", 29 }, 240 { "fs3", 3 }, 241 { "fs30", 30 }, 242 { "fs31", 31 }, 243 { "fs4", 4 }, 244 { "fs5", 5 }, 245 { "fs6", 6 }, 246 { "fs7", 7 }, 247 { "fs8", 8 }, 248 { "fs9", 9 }, 249 }; 250 251 static const struct reg_name double_registers[] = 252 { 253 { "fd0", 0 }, 254 { "fd10", 10 }, 255 { "fd12", 12 }, 256 { "fd14", 14 }, 257 { "fd16", 16 }, 258 { "fd18", 18 }, 259 { "fd2", 2 }, 260 { "fd20", 20 }, 261 { "fd22", 22 }, 262 { "fd24", 24 }, 263 { "fd26", 26 }, 264 { "fd28", 28 }, 265 { "fd30", 30 }, 266 { "fd4", 4 }, 267 { "fd6", 6 }, 268 { "fd8", 8 }, 269 }; 270 271 /* We abuse the `value' field, that would be otherwise unused, to 272 encode the architecture on which (access to) the register was 273 introduced. FIXME: we should probably warn when we encounter a 274 register name when assembling for an architecture that doesn't 275 support it, before parsing it as a symbol name. */ 276 static const struct reg_name other_registers[] = 277 { 278 { "epsw", AM33 }, 279 { "mdr", 0 }, 280 { "pc", AM33 }, 281 { "psw", 0 }, 282 { "sp", 0 }, 283 { "ssp", 0 }, 284 { "usp", 0 }, 285 }; 286 287 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers) 288 289 /* Perform a binary search of the given register table REGS to see 290 if NAME is a valid register name. Returns the register number from 291 the array on success, or -1 on failure. */ 292 293 static int 294 reg_name_search (const struct reg_name *regs, 295 int regcount, 296 const char *name) 297 { 298 int low, high; 299 300 low = 0; 301 high = regcount - 1; 302 303 do 304 { 305 int cmp, middle; 306 307 middle = (low + high) / 2; 308 cmp = strcasecmp (name, regs[middle].name); 309 if (cmp < 0) 310 high = middle - 1; 311 else if (cmp > 0) 312 low = middle + 1; 313 else 314 return regs[middle].value; 315 } 316 while (low <= high); 317 318 return -1; 319 } 320 321 /* Looks at the current position in the input line to see if it is 322 the name of a register in TABLE. If it is, then the name is 323 converted into an expression returned in EXPRESSIONP (with X_op 324 set to O_register and X_add_number set to the register number), the 325 input pointer is left pointing at the first non-blank character after 326 the name and the function returns TRUE. Otherwise the input pointer 327 is left alone and the function returns FALSE. */ 328 329 static bool 330 get_register_name (expressionS * expressionP, 331 const struct reg_name * table, 332 size_t table_length) 333 { 334 int reg_number; 335 char *name; 336 char *start; 337 char c; 338 339 /* Find the spelling of the operand. */ 340 start = input_line_pointer; 341 342 c = get_symbol_name (&name); 343 reg_number = reg_name_search (table, table_length, name); 344 345 /* Put back the delimiting char. */ 346 (void) restore_line_pointer (c); 347 348 /* Look to see if it's in the register table. */ 349 if (reg_number >= 0) 350 { 351 expressionP->X_op = O_register; 352 expressionP->X_add_number = reg_number; 353 354 /* Make the rest nice. */ 355 expressionP->X_add_symbol = NULL; 356 expressionP->X_op_symbol = NULL; 357 358 return true; 359 } 360 361 /* Reset the line as if we had not done anything. */ 362 input_line_pointer = start; 363 return false; 364 } 365 366 static bool 367 r_register_name (expressionS *expressionP) 368 { 369 return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers)); 370 } 371 372 373 static bool 374 xr_register_name (expressionS *expressionP) 375 { 376 return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers)); 377 } 378 379 static bool 380 data_register_name (expressionS *expressionP) 381 { 382 return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers)); 383 } 384 385 static bool 386 address_register_name (expressionS *expressionP) 387 { 388 return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers)); 389 } 390 391 static bool 392 float_register_name (expressionS *expressionP) 393 { 394 return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers)); 395 } 396 397 static bool 398 double_register_name (expressionS *expressionP) 399 { 400 return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers)); 401 } 402 403 static bool 404 other_register_name (expressionS *expressionP) 405 { 406 int reg_number; 407 char *name; 408 char *start; 409 char c; 410 411 /* Find the spelling of the operand. */ 412 start = input_line_pointer; 413 414 c = get_symbol_name (&name); 415 reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name); 416 417 /* Put back the delimiting char. */ 418 (void) restore_line_pointer (c); 419 420 /* Look to see if it's in the register table. */ 421 if (reg_number == 0 422 || (reg_number == AM33 && HAVE_AM33)) 423 { 424 expressionP->X_op = O_register; 425 expressionP->X_add_number = 0; 426 427 /* Make the rest nice. */ 428 expressionP->X_add_symbol = NULL; 429 expressionP->X_op_symbol = NULL; 430 431 return true; 432 } 433 434 /* Reset the line as if we had not done anything. */ 435 input_line_pointer = start; 436 return false; 437 } 438 439 void 440 md_show_usage (FILE *stream) 441 { 442 fprintf (stream, _("MN10300 assembler options:\n\ 443 none yet\n")); 444 } 445 446 int 447 md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED) 448 { 449 return 0; 450 } 451 452 symbolS * 453 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 454 { 455 return 0; 456 } 457 458 const char * 459 md_atof (int type, char *litp, int *sizep) 460 { 461 return ieee_md_atof (type, litp, sizep, false); 462 } 463 464 void 465 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 466 asection *sec, 467 fragS *fragP) 468 { 469 static unsigned long label_count = 0; 470 char buf[40]; 471 472 if (fragP->fr_subtype == 0) 473 { 474 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, 475 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 476 fragP->fr_var = 0; 477 fragP->fr_fix += 2; 478 } 479 else if (fragP->fr_subtype == 1) 480 { 481 /* Reverse the condition of the first branch. */ 482 int offset = fragP->fr_fix; 483 int opcode = fragP->fr_literal[offset] & 0xff; 484 485 switch (opcode) 486 { 487 case 0xc8: 488 opcode = 0xc9; 489 break; 490 case 0xc9: 491 opcode = 0xc8; 492 break; 493 case 0xc0: 494 opcode = 0xc2; 495 break; 496 case 0xc2: 497 opcode = 0xc0; 498 break; 499 case 0xc3: 500 opcode = 0xc1; 501 break; 502 case 0xc1: 503 opcode = 0xc3; 504 break; 505 case 0xc4: 506 opcode = 0xc6; 507 break; 508 case 0xc6: 509 opcode = 0xc4; 510 break; 511 case 0xc7: 512 opcode = 0xc5; 513 break; 514 case 0xc5: 515 opcode = 0xc7; 516 break; 517 default: 518 abort (); 519 } 520 fragP->fr_literal[offset] = opcode; 521 522 /* Create a fixup for the reversed conditional branch. */ 523 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 524 fix_new (fragP, fragP->fr_fix + 1, 1, 525 symbol_new (buf, sec, fragP->fr_next, 0), 526 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 527 528 /* Now create the unconditional branch + fixup to the 529 final target. */ 530 fragP->fr_literal[offset + 2] = 0xcc; 531 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol, 532 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 533 fragP->fr_var = 0; 534 fragP->fr_fix += 5; 535 } 536 else if (fragP->fr_subtype == 2) 537 { 538 /* Reverse the condition of the first branch. */ 539 int offset = fragP->fr_fix; 540 int opcode = fragP->fr_literal[offset] & 0xff; 541 542 switch (opcode) 543 { 544 case 0xc8: 545 opcode = 0xc9; 546 break; 547 case 0xc9: 548 opcode = 0xc8; 549 break; 550 case 0xc0: 551 opcode = 0xc2; 552 break; 553 case 0xc2: 554 opcode = 0xc0; 555 break; 556 case 0xc3: 557 opcode = 0xc1; 558 break; 559 case 0xc1: 560 opcode = 0xc3; 561 break; 562 case 0xc4: 563 opcode = 0xc6; 564 break; 565 case 0xc6: 566 opcode = 0xc4; 567 break; 568 case 0xc7: 569 opcode = 0xc5; 570 break; 571 case 0xc5: 572 opcode = 0xc7; 573 break; 574 default: 575 abort (); 576 } 577 fragP->fr_literal[offset] = opcode; 578 579 /* Create a fixup for the reversed conditional branch. */ 580 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 581 fix_new (fragP, fragP->fr_fix + 1, 1, 582 symbol_new (buf, sec, fragP->fr_next, 0), 583 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 584 585 /* Now create the unconditional branch + fixup to the 586 final target. */ 587 fragP->fr_literal[offset + 2] = 0xdc; 588 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol, 589 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 590 fragP->fr_var = 0; 591 fragP->fr_fix += 7; 592 } 593 else if (fragP->fr_subtype == 3) 594 { 595 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, 596 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 597 fragP->fr_var = 0; 598 fragP->fr_fix += 3; 599 } 600 else if (fragP->fr_subtype == 4) 601 { 602 /* Reverse the condition of the first branch. */ 603 int offset = fragP->fr_fix; 604 int opcode = fragP->fr_literal[offset + 1] & 0xff; 605 606 switch (opcode) 607 { 608 case 0xe8: 609 opcode = 0xe9; 610 break; 611 case 0xe9: 612 opcode = 0xe8; 613 break; 614 case 0xea: 615 opcode = 0xeb; 616 break; 617 case 0xeb: 618 opcode = 0xea; 619 break; 620 default: 621 abort (); 622 } 623 fragP->fr_literal[offset + 1] = opcode; 624 625 /* Create a fixup for the reversed conditional branch. */ 626 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 627 fix_new (fragP, fragP->fr_fix + 2, 1, 628 symbol_new (buf, sec, fragP->fr_next, 0), 629 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 630 631 /* Now create the unconditional branch + fixup to the 632 final target. */ 633 fragP->fr_literal[offset + 3] = 0xcc; 634 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, 635 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 636 fragP->fr_var = 0; 637 fragP->fr_fix += 6; 638 } 639 else if (fragP->fr_subtype == 5) 640 { 641 /* Reverse the condition of the first branch. */ 642 int offset = fragP->fr_fix; 643 int opcode = fragP->fr_literal[offset + 1] & 0xff; 644 645 switch (opcode) 646 { 647 case 0xe8: 648 opcode = 0xe9; 649 break; 650 case 0xea: 651 opcode = 0xeb; 652 break; 653 case 0xeb: 654 opcode = 0xea; 655 break; 656 default: 657 abort (); 658 } 659 fragP->fr_literal[offset + 1] = opcode; 660 661 /* Create a fixup for the reversed conditional branch. */ 662 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 663 fix_new (fragP, fragP->fr_fix + 2, 1, 664 symbol_new (buf, sec, fragP->fr_next, 0), 665 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 666 667 /* Now create the unconditional branch + fixup to the 668 final target. */ 669 fragP->fr_literal[offset + 3] = 0xdc; 670 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, 671 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 672 fragP->fr_var = 0; 673 fragP->fr_fix += 8; 674 } 675 else if (fragP->fr_subtype == 6) 676 { 677 int offset = fragP->fr_fix; 678 679 fragP->fr_literal[offset] = 0xcd; 680 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, 681 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 682 fragP->fr_var = 0; 683 fragP->fr_fix += 5; 684 } 685 else if (fragP->fr_subtype == 7) 686 { 687 int offset = fragP->fr_fix; 688 689 fragP->fr_literal[offset] = 0xdd; 690 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3]; 691 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4]; 692 fragP->fr_literal[offset + 3] = 0; 693 fragP->fr_literal[offset + 4] = 0; 694 695 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, 696 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 697 fragP->fr_var = 0; 698 fragP->fr_fix += 7; 699 } 700 else if (fragP->fr_subtype == 8) 701 { 702 int offset = fragP->fr_fix; 703 704 fragP->fr_literal[offset] = 0xfa; 705 fragP->fr_literal[offset + 1] = 0xff; 706 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 707 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL); 708 fragP->fr_var = 0; 709 fragP->fr_fix += 4; 710 } 711 else if (fragP->fr_subtype == 9) 712 { 713 int offset = fragP->fr_fix; 714 715 fragP->fr_literal[offset] = 0xfc; 716 fragP->fr_literal[offset + 1] = 0xff; 717 718 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, 719 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL); 720 fragP->fr_var = 0; 721 fragP->fr_fix += 6; 722 } 723 else if (fragP->fr_subtype == 10) 724 { 725 fragP->fr_literal[fragP->fr_fix] = 0xca; 726 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, 727 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); 728 fragP->fr_var = 0; 729 fragP->fr_fix += 2; 730 } 731 else if (fragP->fr_subtype == 11) 732 { 733 int offset = fragP->fr_fix; 734 735 fragP->fr_literal[offset] = 0xcc; 736 737 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, 738 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 739 fragP->fr_var = 0; 740 fragP->fr_fix += 3; 741 } 742 else if (fragP->fr_subtype == 12) 743 { 744 int offset = fragP->fr_fix; 745 746 fragP->fr_literal[offset] = 0xdc; 747 748 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, 749 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 750 fragP->fr_var = 0; 751 fragP->fr_fix += 5; 752 } 753 else if (fragP->fr_subtype == 13) 754 { 755 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, 756 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 757 fragP->fr_var = 0; 758 fragP->fr_fix += 3; 759 } 760 else if (fragP->fr_subtype == 14) 761 { 762 /* Reverse the condition of the first branch. */ 763 int offset = fragP->fr_fix; 764 int opcode = fragP->fr_literal[offset + 1] & 0xff; 765 766 switch (opcode) 767 { 768 case 0xd0: 769 opcode = 0xd1; 770 break; 771 case 0xd1: 772 opcode = 0xd0; 773 break; 774 case 0xd2: 775 opcode = 0xdc; 776 break; 777 case 0xd3: 778 opcode = 0xdb; 779 break; 780 case 0xd4: 781 opcode = 0xda; 782 break; 783 case 0xd5: 784 opcode = 0xd9; 785 break; 786 case 0xd6: 787 opcode = 0xd8; 788 break; 789 case 0xd7: 790 opcode = 0xdd; 791 break; 792 case 0xd8: 793 opcode = 0xd6; 794 break; 795 case 0xd9: 796 opcode = 0xd5; 797 break; 798 case 0xda: 799 opcode = 0xd4; 800 break; 801 case 0xdb: 802 opcode = 0xd3; 803 break; 804 case 0xdc: 805 opcode = 0xd2; 806 break; 807 case 0xdd: 808 opcode = 0xd7; 809 break; 810 default: 811 abort (); 812 } 813 fragP->fr_literal[offset + 1] = opcode; 814 815 /* Create a fixup for the reversed conditional branch. */ 816 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 817 fix_new (fragP, fragP->fr_fix + 2, 1, 818 symbol_new (buf, sec, fragP->fr_next, 0), 819 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 820 821 /* Now create the unconditional branch + fixup to the 822 final target. */ 823 fragP->fr_literal[offset + 3] = 0xcc; 824 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, 825 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); 826 fragP->fr_var = 0; 827 fragP->fr_fix += 6; 828 } 829 else if (fragP->fr_subtype == 15) 830 { 831 /* Reverse the condition of the first branch. */ 832 int offset = fragP->fr_fix; 833 int opcode = fragP->fr_literal[offset + 1] & 0xff; 834 835 switch (opcode) 836 { 837 case 0xd0: 838 opcode = 0xd1; 839 break; 840 case 0xd1: 841 opcode = 0xd0; 842 break; 843 case 0xd2: 844 opcode = 0xdc; 845 break; 846 case 0xd3: 847 opcode = 0xdb; 848 break; 849 case 0xd4: 850 opcode = 0xda; 851 break; 852 case 0xd5: 853 opcode = 0xd9; 854 break; 855 case 0xd6: 856 opcode = 0xd8; 857 break; 858 case 0xd7: 859 opcode = 0xdd; 860 break; 861 case 0xd8: 862 opcode = 0xd6; 863 break; 864 case 0xd9: 865 opcode = 0xd5; 866 break; 867 case 0xda: 868 opcode = 0xd4; 869 break; 870 case 0xdb: 871 opcode = 0xd3; 872 break; 873 case 0xdc: 874 opcode = 0xd2; 875 break; 876 case 0xdd: 877 opcode = 0xd7; 878 break; 879 default: 880 abort (); 881 } 882 fragP->fr_literal[offset + 1] = opcode; 883 884 /* Create a fixup for the reversed conditional branch. */ 885 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); 886 fix_new (fragP, fragP->fr_fix + 2, 1, 887 symbol_new (buf, sec, fragP->fr_next, 0), 888 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); 889 890 /* Now create the unconditional branch + fixup to the 891 final target. */ 892 fragP->fr_literal[offset + 3] = 0xdc; 893 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, 894 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); 895 fragP->fr_var = 0; 896 fragP->fr_fix += 8; 897 } 898 else 899 abort (); 900 } 901 902 valueT 903 md_section_align (asection *seg, valueT addr) 904 { 905 int align = bfd_section_alignment (seg); 906 907 return (addr + ((valueT) 1 << align) - 1) & -((valueT) 1 << align); 908 } 909 910 void 911 md_begin (void) 912 { 913 const char *prev_name = ""; 914 const struct mn10300_opcode *op; 915 916 mn10300_hash = str_htab_create (); 917 918 /* Insert unique names into hash table. The MN10300 instruction set 919 has many identical opcode names that have different opcodes based 920 on the operands. This hash table then provides a quick index to 921 the first opcode with a particular name in the opcode table. */ 922 923 op = mn10300_opcodes; 924 while (op->name) 925 { 926 if (strcmp (prev_name, op->name)) 927 { 928 prev_name = op->name; 929 str_hash_insert (mn10300_hash, op->name, op, 0); 930 } 931 op++; 932 } 933 934 /* Set the default machine type. */ 935 #ifdef TE_LINUX 936 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2)) 937 as_warn (_("could not set architecture and machine")); 938 939 current_machine = AM33_2; 940 #else 941 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103)) 942 as_warn (_("could not set architecture and machine")); 943 944 current_machine = MN103; 945 #endif 946 947 /* Set linkrelax here to avoid fixups in most sections. */ 948 linkrelax = 1; 949 } 950 951 static symbolS *GOT_symbol; 952 953 static inline int 954 mn10300_PIC_related_p (symbolS *sym) 955 { 956 expressionS *exp; 957 958 if (! sym) 959 return 0; 960 961 if (sym == GOT_symbol) 962 return 1; 963 964 exp = symbol_get_value_expression (sym); 965 966 return (exp->X_op == O_PIC_reloc 967 || mn10300_PIC_related_p (exp->X_add_symbol) 968 || mn10300_PIC_related_p (exp->X_op_symbol)); 969 } 970 971 static inline int 972 mn10300_check_fixup (struct mn10300_fixup *fixup) 973 { 974 expressionS *exp = &fixup->exp; 975 976 repeat: 977 switch (exp->X_op) 978 { 979 case O_add: 980 case O_subtract: /* If we're sufficiently unlucky that the label 981 and the expression that references it happen 982 to end up in different frags, the subtract 983 won't be simplified within expression(). */ 984 /* The PIC-related operand must be the first operand of a sum. */ 985 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol)) 986 return 1; 987 988 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 989 fixup->reloc = BFD_RELOC_32_GOT_PCREL; 990 991 exp = symbol_get_value_expression (exp->X_add_symbol); 992 goto repeat; 993 994 case O_symbol: 995 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 996 fixup->reloc = BFD_RELOC_32_GOT_PCREL; 997 break; 998 999 case O_PIC_reloc: 1000 fixup->reloc = exp->X_md; 1001 exp->X_op = O_symbol; 1002 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL 1003 && fixup->opindex >= 0 1004 && (mn10300_operands[fixup->opindex].flags 1005 & MN10300_OPERAND_RELAX)) 1006 return 1; 1007 break; 1008 1009 default: 1010 return (mn10300_PIC_related_p (exp->X_add_symbol) 1011 || mn10300_PIC_related_p (exp->X_op_symbol)); 1012 } 1013 1014 return 0; 1015 } 1016 1017 void 1018 mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 1019 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED) 1020 { 1021 struct mn10300_fixup fixup; 1022 1023 fixup.opindex = -1; 1024 fixup.exp = *exp; 1025 fixup.reloc = BFD_RELOC_UNUSED; 1026 1027 mn10300_check_fixup (&fixup); 1028 1029 if (fixup.reloc == BFD_RELOC_MN10300_GOT32) 1030 switch (size) 1031 { 1032 case 2: 1033 fixup.reloc = BFD_RELOC_MN10300_GOT16; 1034 break; 1035 1036 case 3: 1037 fixup.reloc = BFD_RELOC_MN10300_GOT24; 1038 break; 1039 1040 case 4: 1041 break; 1042 1043 default: 1044 goto error; 1045 } 1046 else if (fixup.reloc == BFD_RELOC_UNUSED) 1047 switch (size) 1048 { 1049 case 1: 1050 fixup.reloc = BFD_RELOC_8; 1051 break; 1052 1053 case 2: 1054 fixup.reloc = BFD_RELOC_16; 1055 break; 1056 1057 case 3: 1058 fixup.reloc = BFD_RELOC_24; 1059 break; 1060 1061 case 4: 1062 fixup.reloc = BFD_RELOC_32; 1063 break; 1064 1065 default: 1066 goto error; 1067 } 1068 else if (size != 4) 1069 { 1070 error: 1071 as_bad (_("unsupported BFD relocation size %u"), size); 1072 fixup.reloc = BFD_RELOC_UNUSED; 1073 } 1074 1075 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc); 1076 } 1077 1078 static bool 1079 check_operand (const struct mn10300_operand *operand, 1080 offsetT val) 1081 { 1082 /* No need to check 32bit operands for a bit. Note that 1083 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ 1084 if (operand->bits != 32 1085 && (operand->flags & MN10300_OPERAND_SPLIT) == 0) 1086 { 1087 long min, max; 1088 offsetT test; 1089 int bits; 1090 1091 bits = operand->bits; 1092 if (operand->flags & MN10300_OPERAND_24BIT) 1093 bits = 24; 1094 1095 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) 1096 { 1097 max = (1 << (bits - 1)) - 1; 1098 min = - (1 << (bits - 1)); 1099 } 1100 else 1101 { 1102 max = (1 << bits) - 1; 1103 min = 0; 1104 } 1105 1106 test = val; 1107 1108 if (test < min || test > max) 1109 return false; 1110 } 1111 return true; 1112 } 1113 1114 /* Insert an operand value into an instruction. */ 1115 1116 static void 1117 mn10300_insert_operand (unsigned long *insnp, 1118 unsigned long *extensionp, 1119 const struct mn10300_operand *operand, 1120 offsetT val, 1121 char *file, 1122 unsigned int line, 1123 unsigned int shift) 1124 { 1125 /* No need to check 32bit operands for a bit. Note that 1126 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ 1127 if (operand->bits != 32 1128 && (operand->flags & MN10300_OPERAND_SPLIT) == 0) 1129 { 1130 long min, max; 1131 offsetT test; 1132 int bits; 1133 1134 bits = operand->bits; 1135 if (operand->flags & MN10300_OPERAND_24BIT) 1136 bits = 24; 1137 1138 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) 1139 { 1140 max = (1 << (bits - 1)) - 1; 1141 min = - (1 << (bits - 1)); 1142 } 1143 else 1144 { 1145 max = (1 << bits) - 1; 1146 min = 0; 1147 } 1148 1149 test = val; 1150 1151 if (test < min || test > max) 1152 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, 1153 (offsetT) max, file, line); 1154 } 1155 1156 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) 1157 { 1158 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1); 1159 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1)) 1160 << operand->shift); 1161 } 1162 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) 1163 { 1164 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1); 1165 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1)) 1166 << operand->shift); 1167 } 1168 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG))) 1169 { 1170 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an 1171 explanation of these variables. Note that FMT-implied shifts 1172 are not taken into account for FP registers. */ 1173 unsigned long mask_low, mask_high; 1174 int shl_low, shr_high, shl_high; 1175 1176 switch (operand->bits) 1177 { 1178 case 5: 1179 /* Handle regular FP registers. */ 1180 if (operand->shift >= 0) 1181 { 1182 /* This is an `m' register. */ 1183 shl_low = operand->shift; 1184 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4; 1185 } 1186 else 1187 { 1188 /* This is an `n' register. */ 1189 shl_low = -operand->shift; 1190 shl_high = shl_low / 4; 1191 } 1192 1193 mask_low = 0x0f; 1194 mask_high = 0x10; 1195 shr_high = 4; 1196 break; 1197 1198 case 3: 1199 /* Handle accumulators. */ 1200 shl_low = -operand->shift; 1201 shl_high = 0; 1202 mask_low = 0x03; 1203 mask_high = 0x04; 1204 shr_high = 2; 1205 break; 1206 1207 default: 1208 abort (); 1209 } 1210 *insnp |= ((((val & mask_high) >> shr_high) << shl_high) 1211 | ((val & mask_low) << shl_low)); 1212 } 1213 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0) 1214 { 1215 *insnp |= ((val & ((1 << operand->bits) - 1)) 1216 << (operand->shift + shift)); 1217 1218 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) 1219 *insnp |= ((val & ((1 << operand->bits) - 1)) 1220 << (operand->shift + shift + operand->bits)); 1221 } 1222 else 1223 { 1224 *extensionp |= ((val & ((1 << operand->bits) - 1)) 1225 << (operand->shift + shift)); 1226 1227 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) 1228 *extensionp |= ((val & ((1 << operand->bits) - 1)) 1229 << (operand->shift + shift + operand->bits)); 1230 } 1231 } 1232 1233 void 1234 md_assemble (char *str) 1235 { 1236 char *s; 1237 struct mn10300_opcode *opcode; 1238 struct mn10300_opcode *next_opcode; 1239 const unsigned char *opindex_ptr; 1240 int next_opindex, relaxable; 1241 unsigned long insn, extension, size = 0; 1242 char *f; 1243 int i; 1244 int match; 1245 1246 /* Get the opcode. */ 1247 for (s = str; !is_end_of_stmt (*s) && !is_whitespace (*s); s++) 1248 ; 1249 if (*s != '\0') 1250 *s++ = '\0'; 1251 1252 /* Find the first opcode with the proper name. */ 1253 opcode = str_hash_find (mn10300_hash, str); 1254 if (opcode == NULL) 1255 { 1256 as_bad (_("Unrecognized opcode: `%s'"), str); 1257 return; 1258 } 1259 1260 str = s; 1261 while (is_whitespace (*str)) 1262 ++str; 1263 1264 input_line_pointer = str; 1265 1266 for (;;) 1267 { 1268 const char *errmsg; 1269 int op_idx; 1270 char *hold; 1271 int extra_shift = 0; 1272 1273 errmsg = _("Invalid opcode/operands"); 1274 1275 /* Reset the array of register operands. */ 1276 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands)); 1277 1278 relaxable = 0; 1279 fc = 0; 1280 match = 0; 1281 next_opindex = 0; 1282 insn = opcode->opcode; 1283 extension = 0; 1284 1285 /* If the instruction is not available on the current machine 1286 then it can not possibly match. */ 1287 if (opcode->machine 1288 && !(opcode->machine == AM33_2 && HAVE_AM33_2) 1289 && !(opcode->machine == AM33 && HAVE_AM33) 1290 && !(opcode->machine == AM30 && HAVE_AM30)) 1291 goto error; 1292 1293 for (op_idx = 1, opindex_ptr = opcode->operands; 1294 *opindex_ptr != 0; 1295 opindex_ptr++, op_idx++) 1296 { 1297 const struct mn10300_operand *operand; 1298 expressionS ex; 1299 1300 if (next_opindex == 0) 1301 { 1302 operand = &mn10300_operands[*opindex_ptr]; 1303 } 1304 else 1305 { 1306 operand = &mn10300_operands[next_opindex]; 1307 next_opindex = 0; 1308 } 1309 1310 while (is_whitespace (*str) || *str == ',') 1311 ++str; 1312 1313 if (operand->flags & MN10300_OPERAND_RELAX) 1314 relaxable = 1; 1315 1316 /* Gather the operand. */ 1317 hold = input_line_pointer; 1318 input_line_pointer = str; 1319 1320 if (operand->flags & MN10300_OPERAND_PAREN) 1321 { 1322 if (*input_line_pointer != ')' && *input_line_pointer != '(') 1323 { 1324 input_line_pointer = hold; 1325 str = hold; 1326 goto error; 1327 } 1328 input_line_pointer++; 1329 goto keep_going; 1330 } 1331 /* See if we can match the operands. */ 1332 else if (operand->flags & MN10300_OPERAND_DREG) 1333 { 1334 if (!data_register_name (&ex)) 1335 { 1336 input_line_pointer = hold; 1337 str = hold; 1338 goto error; 1339 } 1340 } 1341 else if (operand->flags & MN10300_OPERAND_AREG) 1342 { 1343 if (!address_register_name (&ex)) 1344 { 1345 input_line_pointer = hold; 1346 str = hold; 1347 goto error; 1348 } 1349 } 1350 else if (operand->flags & MN10300_OPERAND_SP) 1351 { 1352 char *start; 1353 char c = get_symbol_name (&start); 1354 1355 if (strcasecmp (start, "sp") != 0) 1356 { 1357 (void) restore_line_pointer (c); 1358 input_line_pointer = hold; 1359 str = hold; 1360 goto error; 1361 } 1362 (void) restore_line_pointer (c); 1363 goto keep_going; 1364 } 1365 else if (operand->flags & MN10300_OPERAND_RREG) 1366 { 1367 if (!r_register_name (&ex)) 1368 { 1369 input_line_pointer = hold; 1370 str = hold; 1371 goto error; 1372 } 1373 } 1374 else if (operand->flags & MN10300_OPERAND_XRREG) 1375 { 1376 if (!xr_register_name (&ex)) 1377 { 1378 input_line_pointer = hold; 1379 str = hold; 1380 goto error; 1381 } 1382 } 1383 else if (operand->flags & MN10300_OPERAND_FSREG) 1384 { 1385 if (!float_register_name (&ex)) 1386 { 1387 input_line_pointer = hold; 1388 str = hold; 1389 goto error; 1390 } 1391 } 1392 else if (operand->flags & MN10300_OPERAND_FDREG) 1393 { 1394 if (!double_register_name (&ex)) 1395 { 1396 input_line_pointer = hold; 1397 str = hold; 1398 goto error; 1399 } 1400 } 1401 else if (operand->flags & MN10300_OPERAND_FPCR) 1402 { 1403 char *start; 1404 char c = get_symbol_name (&start); 1405 1406 if (strcasecmp (start, "fpcr") != 0) 1407 { 1408 (void) restore_line_pointer (c); 1409 input_line_pointer = hold; 1410 str = hold; 1411 goto error; 1412 } 1413 (void) restore_line_pointer (c); 1414 goto keep_going; 1415 } 1416 else if (operand->flags & MN10300_OPERAND_USP) 1417 { 1418 char *start; 1419 char c = get_symbol_name (&start); 1420 1421 if (strcasecmp (start, "usp") != 0) 1422 { 1423 (void) restore_line_pointer (c); 1424 input_line_pointer = hold; 1425 str = hold; 1426 goto error; 1427 } 1428 (void) restore_line_pointer (c); 1429 goto keep_going; 1430 } 1431 else if (operand->flags & MN10300_OPERAND_SSP) 1432 { 1433 char *start; 1434 char c = get_symbol_name (&start); 1435 1436 if (strcasecmp (start, "ssp") != 0) 1437 { 1438 (void) restore_line_pointer (c); 1439 input_line_pointer = hold; 1440 str = hold; 1441 goto error; 1442 } 1443 (void) restore_line_pointer (c); 1444 goto keep_going; 1445 } 1446 else if (operand->flags & MN10300_OPERAND_MSP) 1447 { 1448 char *start; 1449 char c = get_symbol_name (&start); 1450 1451 if (strcasecmp (start, "msp") != 0) 1452 { 1453 (void) restore_line_pointer (c); 1454 input_line_pointer = hold; 1455 str = hold; 1456 goto error; 1457 } 1458 (void) restore_line_pointer (c); 1459 goto keep_going; 1460 } 1461 else if (operand->flags & MN10300_OPERAND_PC) 1462 { 1463 char *start; 1464 char c = get_symbol_name (&start); 1465 1466 if (strcasecmp (start, "pc") != 0) 1467 { 1468 (void) restore_line_pointer (c); 1469 input_line_pointer = hold; 1470 str = hold; 1471 goto error; 1472 } 1473 (void) restore_line_pointer (c); 1474 goto keep_going; 1475 } 1476 else if (operand->flags & MN10300_OPERAND_EPSW) 1477 { 1478 char *start; 1479 char c = get_symbol_name (&start); 1480 1481 if (strcasecmp (start, "epsw") != 0) 1482 { 1483 (void) restore_line_pointer (c); 1484 input_line_pointer = hold; 1485 str = hold; 1486 goto error; 1487 } 1488 (void) restore_line_pointer (c); 1489 goto keep_going; 1490 } 1491 else if (operand->flags & MN10300_OPERAND_PLUS) 1492 { 1493 if (*input_line_pointer != '+') 1494 { 1495 input_line_pointer = hold; 1496 str = hold; 1497 goto error; 1498 } 1499 input_line_pointer++; 1500 goto keep_going; 1501 } 1502 else if (operand->flags & MN10300_OPERAND_PSW) 1503 { 1504 char *start; 1505 char c = get_symbol_name (&start); 1506 1507 if (strcasecmp (start, "psw") != 0) 1508 { 1509 (void) restore_line_pointer (c); 1510 input_line_pointer = hold; 1511 str = hold; 1512 goto error; 1513 } 1514 (void) restore_line_pointer (c); 1515 goto keep_going; 1516 } 1517 else if (operand->flags & MN10300_OPERAND_MDR) 1518 { 1519 char *start; 1520 char c = get_symbol_name (&start); 1521 1522 if (strcasecmp (start, "mdr") != 0) 1523 { 1524 (void) restore_line_pointer (c); 1525 input_line_pointer = hold; 1526 str = hold; 1527 goto error; 1528 } 1529 (void) restore_line_pointer (c); 1530 goto keep_going; 1531 } 1532 else if (operand->flags & MN10300_OPERAND_REG_LIST) 1533 { 1534 unsigned int value = 0; 1535 if (*input_line_pointer != '[') 1536 { 1537 input_line_pointer = hold; 1538 str = hold; 1539 goto error; 1540 } 1541 1542 /* Eat the '['. */ 1543 input_line_pointer++; 1544 1545 /* We used to reject a null register list here; however, 1546 we accept it now so the compiler can emit "call" 1547 instructions for all calls to named functions. 1548 1549 The linker can then fill in the appropriate bits for the 1550 register list and stack size or change the instruction 1551 into a "calls" if using "call" is not profitable. */ 1552 while (*input_line_pointer != ']') 1553 { 1554 char *start; 1555 char c; 1556 1557 if (*input_line_pointer == ',') 1558 input_line_pointer++; 1559 1560 c = get_symbol_name (&start); 1561 1562 if (strcasecmp (start, "d2") == 0) 1563 { 1564 value |= 0x80; 1565 (void) restore_line_pointer (c); 1566 } 1567 else if (strcasecmp (start, "d3") == 0) 1568 { 1569 value |= 0x40; 1570 (void) restore_line_pointer (c); 1571 } 1572 else if (strcasecmp (start, "a2") == 0) 1573 { 1574 value |= 0x20; 1575 (void) restore_line_pointer (c); 1576 } 1577 else if (strcasecmp (start, "a3") == 0) 1578 { 1579 value |= 0x10; 1580 (void) restore_line_pointer (c); 1581 } 1582 else if (strcasecmp (start, "other") == 0) 1583 { 1584 value |= 0x08; 1585 (void) restore_line_pointer (c); 1586 } 1587 else if (HAVE_AM33 1588 && strcasecmp (start, "exreg0") == 0) 1589 { 1590 value |= 0x04; 1591 (void) restore_line_pointer (c); 1592 } 1593 else if (HAVE_AM33 1594 && strcasecmp (start, "exreg1") == 0) 1595 { 1596 value |= 0x02; 1597 (void) restore_line_pointer (c); 1598 } 1599 else if (HAVE_AM33 1600 && strcasecmp (start, "exother") == 0) 1601 { 1602 value |= 0x01; 1603 (void) restore_line_pointer (c); 1604 } 1605 else if (HAVE_AM33 1606 && strcasecmp (start, "all") == 0) 1607 { 1608 value |= 0xff; 1609 (void) restore_line_pointer (c); 1610 } 1611 else 1612 { 1613 input_line_pointer = hold; 1614 str = hold; 1615 goto error; 1616 } 1617 } 1618 input_line_pointer++; 1619 mn10300_insert_operand (& insn, & extension, operand, 1620 value, NULL, 0, 0); 1621 goto keep_going; 1622 1623 } 1624 else if (data_register_name (&ex)) 1625 { 1626 input_line_pointer = hold; 1627 str = hold; 1628 goto error; 1629 } 1630 else if (address_register_name (&ex)) 1631 { 1632 input_line_pointer = hold; 1633 str = hold; 1634 goto error; 1635 } 1636 else if (other_register_name (&ex)) 1637 { 1638 input_line_pointer = hold; 1639 str = hold; 1640 goto error; 1641 } 1642 else if (HAVE_AM33 && r_register_name (&ex)) 1643 { 1644 input_line_pointer = hold; 1645 str = hold; 1646 goto error; 1647 } 1648 else if (HAVE_AM33 && xr_register_name (&ex)) 1649 { 1650 input_line_pointer = hold; 1651 str = hold; 1652 goto error; 1653 } 1654 else if (HAVE_AM33_2 && float_register_name (&ex)) 1655 { 1656 input_line_pointer = hold; 1657 str = hold; 1658 goto error; 1659 } 1660 else if (HAVE_AM33_2 && double_register_name (&ex)) 1661 { 1662 input_line_pointer = hold; 1663 str = hold; 1664 goto error; 1665 } 1666 else if (*str == ')' || *str == '(') 1667 { 1668 input_line_pointer = hold; 1669 str = hold; 1670 goto error; 1671 } 1672 else 1673 { 1674 expression (&ex); 1675 resolve_register (&ex); 1676 } 1677 1678 switch (ex.X_op) 1679 { 1680 case O_illegal: 1681 errmsg = _("illegal operand"); 1682 goto error; 1683 case O_absent: 1684 errmsg = _("missing operand"); 1685 goto error; 1686 case O_register: 1687 { 1688 int mask; 1689 1690 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG; 1691 if (HAVE_AM33) 1692 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG; 1693 if (HAVE_AM33_2) 1694 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG; 1695 if ((operand->flags & mask) == 0) 1696 { 1697 input_line_pointer = hold; 1698 str = hold; 1699 goto error; 1700 } 1701 1702 if (opcode->format == FMT_D1 || opcode->format == FMT_S1) 1703 extra_shift = 8; 1704 else if (opcode->format == FMT_D2 1705 || opcode->format == FMT_D4 1706 || opcode->format == FMT_S2 1707 || opcode->format == FMT_S4 1708 || opcode->format == FMT_S6 1709 || opcode->format == FMT_D5) 1710 extra_shift = 16; 1711 else if (opcode->format == FMT_D7) 1712 extra_shift = 8; 1713 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9) 1714 extra_shift = 8; 1715 else 1716 extra_shift = 0; 1717 1718 mn10300_insert_operand (& insn, & extension, operand, 1719 ex.X_add_number, NULL, 1720 0, extra_shift); 1721 1722 /* And note the register number in the register array. */ 1723 mn10300_reg_operands[op_idx - 1] = ex.X_add_number; 1724 break; 1725 } 1726 1727 case O_constant: 1728 /* If this operand can be promoted, and it doesn't 1729 fit into the allocated bitfield for this insn, 1730 then promote it (ie this opcode does not match). */ 1731 if (operand->flags 1732 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX) 1733 && !check_operand (operand, ex.X_add_number)) 1734 { 1735 input_line_pointer = hold; 1736 str = hold; 1737 goto error; 1738 } 1739 1740 mn10300_insert_operand (& insn, & extension, operand, 1741 ex.X_add_number, NULL, 0, 0); 1742 break; 1743 1744 default: 1745 /* If this operand can be promoted, then this opcode didn't 1746 match since we can't know if it needed promotion! */ 1747 if (operand->flags & MN10300_OPERAND_PROMOTE) 1748 { 1749 input_line_pointer = hold; 1750 str = hold; 1751 goto error; 1752 } 1753 1754 /* We need to generate a fixup for this expression. */ 1755 if (fc >= MAX_INSN_FIXUPS) 1756 as_fatal (_("too many fixups")); 1757 fixups[fc].exp = ex; 1758 fixups[fc].opindex = *opindex_ptr; 1759 fixups[fc].reloc = BFD_RELOC_UNUSED; 1760 if (mn10300_check_fixup (& fixups[fc])) 1761 goto error; 1762 ++fc; 1763 break; 1764 } 1765 1766 keep_going: 1767 str = input_line_pointer; 1768 input_line_pointer = hold; 1769 1770 while (is_whitespace (*str) || *str == ',') 1771 ++str; 1772 } 1773 1774 /* Make sure we used all the operands! */ 1775 if (*str != ',') 1776 match = 1; 1777 1778 /* If this instruction has registers that must not match, verify 1779 that they do indeed not match. */ 1780 if (opcode->no_match_operands) 1781 { 1782 /* Look at each operand to see if it's marked. */ 1783 for (i = 0; i < MN10300_MAX_OPERANDS; i++) 1784 { 1785 if ((1 << i) & opcode->no_match_operands) 1786 { 1787 int j; 1788 1789 /* operand I is marked. Check that it does not match any 1790 operands > I which are marked. */ 1791 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++) 1792 { 1793 if (((1 << j) & opcode->no_match_operands) 1794 && mn10300_reg_operands[i] == mn10300_reg_operands[j]) 1795 { 1796 errmsg = _("Invalid register specification."); 1797 match = 0; 1798 goto error; 1799 } 1800 } 1801 } 1802 } 1803 } 1804 1805 error: 1806 if (match == 0) 1807 { 1808 next_opcode = opcode + 1; 1809 if (!strcmp (next_opcode->name, opcode->name)) 1810 { 1811 opcode = next_opcode; 1812 continue; 1813 } 1814 1815 as_bad ("%s", errmsg); 1816 return; 1817 } 1818 break; 1819 } 1820 1821 while (is_whitespace (*str)) 1822 ++str; 1823 1824 if (!is_end_of_stmt (*str)) 1825 as_bad (_("junk at end of line: `%s'"), str); 1826 1827 input_line_pointer = str; 1828 1829 /* Determine the size of the instruction. */ 1830 if (opcode->format == FMT_S0) 1831 size = 1; 1832 1833 if (opcode->format == FMT_S1 || opcode->format == FMT_D0) 1834 size = 2; 1835 1836 if (opcode->format == FMT_S2 || opcode->format == FMT_D1) 1837 size = 3; 1838 1839 if (opcode->format == FMT_D6) 1840 size = 3; 1841 1842 if (opcode->format == FMT_D7 || opcode->format == FMT_D10) 1843 size = 4; 1844 1845 if (opcode->format == FMT_D8) 1846 size = 6; 1847 1848 if (opcode->format == FMT_D9) 1849 size = 7; 1850 1851 if (opcode->format == FMT_S4) 1852 size = 5; 1853 1854 if (opcode->format == FMT_S6 || opcode->format == FMT_D5) 1855 size = 7; 1856 1857 if (opcode->format == FMT_D2) 1858 size = 4; 1859 1860 if (opcode->format == FMT_D3) 1861 size = 5; 1862 1863 if (opcode->format == FMT_D4) 1864 size = 6; 1865 1866 if (relaxable && fc > 0) 1867 { 1868 /* On a 64-bit host the size of an 'int' is not the same 1869 as the size of a pointer, so we need a union to convert 1870 the opindex field of the fr_cgen structure into a char * 1871 so that it can be stored in the frag. We do not have 1872 to worry about losing accuracy as we are not going to 1873 be even close to the 32bit limit of the int. */ 1874 union 1875 { 1876 int opindex; 1877 char * ptr; 1878 } 1879 opindex_converter; 1880 int type; 1881 1882 /* We want to anchor the line info to the previous frag (if 1883 there isn't one, create it), so that, when the insn is 1884 resized, we still get the right address for the beginning of 1885 the region. */ 1886 f = frag_more (0); 1887 dwarf2_emit_insn (0); 1888 1889 /* bCC */ 1890 if (size == 2) 1891 { 1892 /* Handle bra specially. Basically treat it like jmp so 1893 that we automatically handle 8, 16 and 32 bit offsets 1894 correctly as well as jumps to an undefined address. 1895 1896 It is also important to not treat it like other bCC 1897 instructions since the long forms of bra is different 1898 from other bCC instructions. */ 1899 if (opcode->opcode == 0xca00) 1900 type = 10; 1901 else 1902 type = 0; 1903 } 1904 /* call */ 1905 else if (size == 5) 1906 type = 6; 1907 /* calls */ 1908 else if (size == 4) 1909 type = 8; 1910 /* jmp */ 1911 else if (size == 3 && opcode->opcode == 0xcc0000) 1912 type = 10; 1913 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000) 1914 type = 13; 1915 /* bCC (uncommon cases) */ 1916 else 1917 type = 3; 1918 1919 opindex_converter.opindex = fixups[0].opindex; 1920 f = frag_var (rs_machine_dependent, 8, 8 - size, type, 1921 fixups[0].exp.X_add_symbol, 1922 fixups[0].exp.X_add_number, 1923 opindex_converter.ptr); 1924 1925 /* This is pretty hokey. We basically just care about the 1926 opcode, so we have to write out the first word big endian. 1927 1928 The exception is "call", which has two operands that we 1929 care about. 1930 1931 The first operand (the register list) happens to be in the 1932 first instruction word, and will be in the right place if 1933 we output the first word in big endian mode. 1934 1935 The second operand (stack size) is in the extension word, 1936 and we want it to appear as the first character in the extension 1937 word (as it appears in memory). Luckily, writing the extension 1938 word in big endian format will do what we want. */ 1939 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size); 1940 if (size > 8) 1941 { 1942 number_to_chars_bigendian (f + 4, extension, 4); 1943 number_to_chars_bigendian (f + 8, 0, size - 8); 1944 } 1945 else if (size > 4) 1946 number_to_chars_bigendian (f + 4, extension, size - 4); 1947 } 1948 else 1949 { 1950 /* Allocate space for the instruction. */ 1951 f = frag_more (size); 1952 1953 /* Fill in bytes for the instruction. Note that opcode fields 1954 are written big-endian, 16 & 32bit immediates are written 1955 little endian. Egad. */ 1956 if (opcode->format == FMT_S0 1957 || opcode->format == FMT_S1 1958 || opcode->format == FMT_D0 1959 || opcode->format == FMT_D6 1960 || opcode->format == FMT_D7 1961 || opcode->format == FMT_D10 1962 || opcode->format == FMT_D1) 1963 { 1964 number_to_chars_bigendian (f, insn, size); 1965 } 1966 else if (opcode->format == FMT_S2 1967 && opcode->opcode != 0xdf0000 1968 && opcode->opcode != 0xde0000) 1969 { 1970 /* A format S2 instruction that is _not_ "ret" and "retf". */ 1971 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1); 1972 number_to_chars_littleendian (f + 1, insn & 0xffff, 2); 1973 } 1974 else if (opcode->format == FMT_S2) 1975 { 1976 /* This must be a ret or retf, which is written entirely in 1977 big-endian format. */ 1978 number_to_chars_bigendian (f, insn, 3); 1979 } 1980 else if (opcode->format == FMT_S4 1981 && opcode->opcode != 0xdc000000) 1982 { 1983 /* This must be a format S4 "call" instruction. What a pain. */ 1984 unsigned long temp = (insn >> 8) & 0xffff; 1985 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); 1986 number_to_chars_littleendian (f + 1, temp, 2); 1987 number_to_chars_bigendian (f + 3, insn & 0xff, 1); 1988 number_to_chars_bigendian (f + 4, extension & 0xff, 1); 1989 } 1990 else if (opcode->format == FMT_S4) 1991 { 1992 /* This must be a format S4 "jmp" instruction. */ 1993 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff); 1994 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); 1995 number_to_chars_littleendian (f + 1, temp, 4); 1996 } 1997 else if (opcode->format == FMT_S6) 1998 { 1999 unsigned long temp = ((insn & 0xffffff) << 8) 2000 | ((extension >> 16) & 0xff); 2001 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); 2002 number_to_chars_littleendian (f + 1, temp, 4); 2003 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1); 2004 number_to_chars_bigendian (f + 6, extension & 0xff, 1); 2005 } 2006 else if (opcode->format == FMT_D2 2007 && opcode->opcode != 0xfaf80000 2008 && opcode->opcode != 0xfaf00000 2009 && opcode->opcode != 0xfaf40000) 2010 { 2011 /* A format D2 instruction where the 16bit immediate is 2012 really a single 16bit value, not two 8bit values. */ 2013 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2014 number_to_chars_littleendian (f + 2, insn & 0xffff, 2); 2015 } 2016 else if (opcode->format == FMT_D2) 2017 { 2018 /* A format D2 instruction where the 16bit immediate 2019 is really two 8bit immediates. */ 2020 number_to_chars_bigendian (f, insn, 4); 2021 } 2022 else if (opcode->format == FMT_D3) 2023 { 2024 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2025 number_to_chars_littleendian (f + 2, insn & 0xffff, 2); 2026 number_to_chars_bigendian (f + 4, extension & 0xff, 1); 2027 } 2028 else if (opcode->format == FMT_D4) 2029 { 2030 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff); 2031 2032 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2033 number_to_chars_littleendian (f + 2, temp, 4); 2034 } 2035 else if (opcode->format == FMT_D5) 2036 { 2037 unsigned long temp = (((insn & 0xffff) << 16) 2038 | ((extension >> 8) & 0xffff)); 2039 2040 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); 2041 number_to_chars_littleendian (f + 2, temp, 4); 2042 number_to_chars_bigendian (f + 6, extension & 0xff, 1); 2043 } 2044 else if (opcode->format == FMT_D8) 2045 { 2046 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff); 2047 2048 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); 2049 number_to_chars_bigendian (f + 3, (temp & 0xff), 1); 2050 number_to_chars_littleendian (f + 4, temp >> 8, 2); 2051 } 2052 else if (opcode->format == FMT_D9) 2053 { 2054 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff); 2055 2056 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); 2057 number_to_chars_littleendian (f + 3, temp, 4); 2058 } 2059 2060 /* Create any fixups. */ 2061 for (i = 0; i < fc; i++) 2062 { 2063 const struct mn10300_operand *operand; 2064 int reloc_size; 2065 2066 operand = &mn10300_operands[fixups[i].opindex]; 2067 if (fixups[i].reloc != BFD_RELOC_UNUSED 2068 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL 2069 && fixups[i].reloc != BFD_RELOC_32_GOTOFF 2070 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL 2071 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GD 2072 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LD 2073 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LDO 2074 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GOTIE 2075 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_IE 2076 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LE 2077 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32) 2078 { 2079 reloc_howto_type *reloc_howto; 2080 int offset; 2081 2082 reloc_howto = bfd_reloc_type_lookup (stdoutput, 2083 fixups[i].reloc); 2084 2085 if (!reloc_howto) 2086 abort (); 2087 2088 reloc_size = bfd_get_reloc_size (reloc_howto); 2089 2090 if (reloc_size < 1 || reloc_size > 4) 2091 abort (); 2092 2093 offset = 4 - size; 2094 fix_new_exp (frag_now, f - frag_now->fr_literal + offset, 2095 reloc_size, &fixups[i].exp, 2096 reloc_howto->pc_relative, 2097 fixups[i].reloc); 2098 } 2099 else 2100 { 2101 int reloc, pcrel, offset; 2102 fixS *fixP; 2103 2104 reloc = BFD_RELOC_NONE; 2105 if (fixups[i].reloc != BFD_RELOC_UNUSED) 2106 reloc = fixups[i].reloc; 2107 /* How big is the reloc? Remember SPLIT relocs are 2108 implicitly 32bits. */ 2109 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) 2110 reloc_size = 32; 2111 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) 2112 reloc_size = 24; 2113 else 2114 reloc_size = operand->bits; 2115 2116 /* Is the reloc pc-relative? */ 2117 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0; 2118 if (reloc != BFD_RELOC_NONE) 2119 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative; 2120 2121 offset = size - (reloc_size + operand->shift) / 8; 2122 2123 /* Choose a proper BFD relocation type. */ 2124 if (reloc != BFD_RELOC_NONE) 2125 ; 2126 else if (pcrel) 2127 { 2128 if (reloc_size == 32) 2129 reloc = BFD_RELOC_32_PCREL; 2130 else if (reloc_size == 16) 2131 reloc = BFD_RELOC_16_PCREL; 2132 else if (reloc_size == 8) 2133 reloc = BFD_RELOC_8_PCREL; 2134 else 2135 abort (); 2136 } 2137 else 2138 { 2139 if (reloc_size == 32) 2140 reloc = BFD_RELOC_32; 2141 else if (reloc_size == 16) 2142 reloc = BFD_RELOC_16; 2143 else if (reloc_size == 8) 2144 reloc = BFD_RELOC_8; 2145 else 2146 abort (); 2147 } 2148 2149 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, 2150 reloc_size / 8, &fixups[i].exp, pcrel, 2151 reloc); 2152 2153 if (pcrel) 2154 fixP->fx_offset += offset; 2155 } 2156 } 2157 2158 dwarf2_emit_insn (size); 2159 } 2160 2161 /* Label this frag as one that contains instructions. */ 2162 frag_now->tc_frag_data = true; 2163 } 2164 2165 /* If while processing a fixup, a reloc really needs to be created 2166 then it is done here. */ 2167 2168 arelent ** 2169 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 2170 { 2171 static arelent * no_relocs = NULL; 2172 static arelent * relocs[MAX_RELOC_EXPANSION + 1]; 2173 arelent *reloc; 2174 2175 reloc = notes_alloc (sizeof (arelent)); 2176 2177 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 2178 if (reloc->howto == NULL) 2179 { 2180 as_bad_where (fixp->fx_file, fixp->fx_line, 2181 _("reloc %d not supported by object file format"), 2182 (int) fixp->fx_r_type); 2183 return &no_relocs; 2184 } 2185 2186 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 2187 relocs[0] = reloc; 2188 relocs[1] = NULL; 2189 2190 if (fixp->fx_subsy 2191 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) 2192 { 2193 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy); 2194 fixp->fx_subsy = NULL; 2195 } 2196 2197 if (fixp->fx_addsy && fixp->fx_subsy) 2198 { 2199 asection *asec, *ssec; 2200 2201 asec = S_GET_SEGMENT (fixp->fx_addsy); 2202 ssec = S_GET_SEGMENT (fixp->fx_subsy); 2203 2204 /* If we have a difference between two (non-absolute) symbols we must 2205 generate two relocs (one for each symbol) and allow the linker to 2206 resolve them - relaxation may change the distances between symbols, 2207 even local symbols defined in the same section. */ 2208 if (ssec != absolute_section || asec != absolute_section) 2209 { 2210 arelent *reloc2 = notes_alloc (sizeof (arelent)); 2211 2212 relocs[0] = reloc2; 2213 relocs[1] = reloc; 2214 2215 reloc2->address = reloc->address; 2216 reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF); 2217 reloc2->addend = - S_GET_VALUE (fixp->fx_subsy); 2218 reloc2->sym_ptr_ptr = notes_alloc (sizeof (asymbol *)); 2219 *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 2220 2221 reloc->addend = fixp->fx_offset; 2222 if (asec == absolute_section) 2223 { 2224 reloc->addend += S_GET_VALUE (fixp->fx_addsy); 2225 reloc->sym_ptr_ptr = &bfd_abs_section_ptr->symbol; 2226 } 2227 else 2228 { 2229 reloc->sym_ptr_ptr = notes_alloc (sizeof (asymbol *)); 2230 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2231 } 2232 2233 fixp->fx_pcrel = 0; 2234 fixp->fx_done = 1; 2235 return relocs; 2236 } 2237 else 2238 { 2239 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal; 2240 2241 reloc->addend = (S_GET_VALUE (fixp->fx_addsy) 2242 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset); 2243 2244 switch (fixp->fx_r_type) 2245 { 2246 case BFD_RELOC_8: 2247 md_number_to_chars (fixpos, reloc->addend, 1); 2248 break; 2249 2250 case BFD_RELOC_16: 2251 md_number_to_chars (fixpos, reloc->addend, 2); 2252 break; 2253 2254 case BFD_RELOC_24: 2255 md_number_to_chars (fixpos, reloc->addend, 3); 2256 break; 2257 2258 case BFD_RELOC_32: 2259 md_number_to_chars (fixpos, reloc->addend, 4); 2260 break; 2261 2262 default: 2263 reloc->sym_ptr_ptr = &bfd_abs_section_ptr->symbol; 2264 return relocs; 2265 } 2266 2267 return &no_relocs; 2268 } 2269 } 2270 else 2271 { 2272 reloc->sym_ptr_ptr = notes_alloc (sizeof (asymbol *)); 2273 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2274 reloc->addend = fixp->fx_offset; 2275 } 2276 return relocs; 2277 } 2278 2279 /* Returns true iff the symbol attached to the frag is at a known location 2280 in the given section, (and hence the relocation to it can be relaxed by 2281 the assembler). */ 2282 static inline bool 2283 has_known_symbol_location (fragS * fragp, asection * sec) 2284 { 2285 symbolS * sym = fragp->fr_symbol; 2286 2287 return sym != NULL 2288 && S_IS_DEFINED (sym) 2289 && ! S_IS_WEAK (sym) 2290 && S_GET_SEGMENT (sym) == sec; 2291 } 2292 2293 int 2294 md_estimate_size_before_relax (fragS *fragp, asection *seg) 2295 { 2296 if (fragp->fr_subtype == 6 2297 && ! has_known_symbol_location (fragp, seg)) 2298 fragp->fr_subtype = 7; 2299 else if (fragp->fr_subtype == 8 2300 && ! has_known_symbol_location (fragp, seg)) 2301 fragp->fr_subtype = 9; 2302 else if (fragp->fr_subtype == 10 2303 && ! has_known_symbol_location (fragp, seg)) 2304 fragp->fr_subtype = 12; 2305 2306 if (fragp->fr_subtype == 13) 2307 return 3; 2308 2309 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0])) 2310 abort (); 2311 2312 return md_relax_table[fragp->fr_subtype].rlx_length; 2313 } 2314 2315 long 2316 md_pcrel_from (fixS *fixp) 2317 { 2318 if (fixp->fx_addsy != NULL 2319 && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))) 2320 /* The symbol is undefined or weak. Let the linker figure it out. */ 2321 return 0; 2322 2323 return fixp->fx_frag->fr_address + fixp->fx_where; 2324 } 2325 2326 void 2327 md_apply_fix (fixS * fixP, valueT * valP, segT seg) 2328 { 2329 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal; 2330 int size = 0; 2331 int value = *valP; 2332 2333 gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED); 2334 2335 /* This should never happen. */ 2336 if (seg->flags & SEC_ALLOC) 2337 abort (); 2338 2339 /* The value we are passed in *valuep includes the symbol values. 2340 If we are doing this relocation the code in write.c is going to 2341 call bfd_install_relocation, which is also going to use the symbol 2342 value. That means that if the reloc is fully resolved we want to 2343 use *valuep since bfd_install_relocation is not being used. 2344 2345 However, if the reloc is not fully resolved we do not want to use 2346 *valuep, and must use fx_offset instead. However, if the reloc 2347 is PC relative, we do want to use *valuep since it includes the 2348 result of md_pcrel_from. */ 2349 if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel) 2350 value = fixP->fx_offset; 2351 2352 /* If the fix is relative to a symbol which is not defined, or not 2353 in the same segment as the fix, we cannot resolve it here. */ 2354 if (fixP->fx_addsy != NULL 2355 && (! S_IS_DEFINED (fixP->fx_addsy) 2356 || (S_GET_SEGMENT (fixP->fx_addsy) != seg))) 2357 { 2358 fixP->fx_done = 0; 2359 return; 2360 } 2361 2362 switch (fixP->fx_r_type) 2363 { 2364 case BFD_RELOC_8: 2365 case BFD_RELOC_8_PCREL: 2366 size = 1; 2367 break; 2368 2369 case BFD_RELOC_16: 2370 case BFD_RELOC_16_PCREL: 2371 size = 2; 2372 break; 2373 2374 case BFD_RELOC_32: 2375 case BFD_RELOC_32_PCREL: 2376 size = 4; 2377 break; 2378 2379 case BFD_RELOC_VTABLE_INHERIT: 2380 case BFD_RELOC_VTABLE_ENTRY: 2381 fixP->fx_done = 0; 2382 return; 2383 2384 case BFD_RELOC_MN10300_ALIGN: 2385 fixP->fx_done = 1; 2386 return; 2387 2388 case BFD_RELOC_NONE: 2389 default: 2390 as_bad_where (fixP->fx_file, fixP->fx_line, 2391 _("Bad relocation fixup type (%d)"), fixP->fx_r_type); 2392 } 2393 2394 md_number_to_chars (fixpos, value, size); 2395 2396 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */ 2397 if (fixP->fx_addsy == NULL) 2398 fixP->fx_done = 1; 2399 } 2400 2401 /* Return zero if the fixup in fixp should be left alone and not 2402 adjusted. */ 2403 2404 bool 2405 mn10300_fix_adjustable (struct fix *fixp) 2406 { 2407 if (fixp->fx_pcrel) 2408 { 2409 if (TC_FORCE_RELOCATION_LOCAL (fixp)) 2410 return false; 2411 } 2412 /* Non-relative relocs can (and must) be adjusted if they do 2413 not meet the criteria below, or the generic criteria. */ 2414 else if (TC_FORCE_RELOCATION (fixp)) 2415 return false; 2416 2417 /* Do not adjust relocations involving symbols in code sections, 2418 because it breaks linker relaxations. This could be fixed in the 2419 linker, but this fix is simpler, and it pretty much only affects 2420 object size a little bit. */ 2421 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE) 2422 return false; 2423 2424 /* Likewise, do not adjust symbols that won't be merged, or debug 2425 symbols, because they too break relaxation. We do want to adjust 2426 other mergeable symbols, like .rodata, because code relaxations 2427 need section-relative symbols to properly relax them. */ 2428 if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)) 2429 return false; 2430 2431 if (startswith (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug")) 2432 return false; 2433 2434 return true; 2435 } 2436 2437 static void 2438 set_arch_mach (int mach) 2439 { 2440 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach)) 2441 as_warn (_("could not set architecture and machine")); 2442 2443 current_machine = mach; 2444 } 2445 2446 static inline char * 2447 mn10300_end_of_match (char *cont, const char *what) 2448 { 2449 int len = strlen (what); 2450 2451 if (startswith (cont, what) 2452 && ! is_part_of_name (cont[len])) 2453 return cont + len; 2454 2455 return NULL; 2456 } 2457 2458 int 2459 mn10300_parse_name (char const *name, 2460 expressionS *exprP, 2461 enum expr_mode mode, 2462 char *nextcharP) 2463 { 2464 char *next = input_line_pointer; 2465 char *next_end; 2466 int reloc_type; 2467 segT segment; 2468 2469 exprP->X_op_symbol = NULL; 2470 2471 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 2472 { 2473 if (! GOT_symbol) 2474 GOT_symbol = symbol_find_or_make (name); 2475 2476 exprP->X_add_symbol = GOT_symbol; 2477 no_suffix: 2478 /* If we have an absolute symbol or a reg, 2479 then we know its value now. */ 2480 segment = S_GET_SEGMENT (exprP->X_add_symbol); 2481 if (!expr_defer_p (mode) && segment == absolute_section) 2482 { 2483 exprP->X_op = O_constant; 2484 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 2485 exprP->X_add_symbol = NULL; 2486 } 2487 else if (!expr_defer_p (mode) && segment == reg_section) 2488 { 2489 exprP->X_op = O_register; 2490 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 2491 exprP->X_add_symbol = NULL; 2492 } 2493 else 2494 { 2495 exprP->X_op = O_symbol; 2496 exprP->X_add_number = 0; 2497 } 2498 2499 return 1; 2500 } 2501 2502 exprP->X_add_symbol = symbol_find_or_make (name); 2503 2504 if (*nextcharP != '@') 2505 goto no_suffix; 2506 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF"))) 2507 reloc_type = BFD_RELOC_32_GOTOFF; 2508 else if ((next_end = mn10300_end_of_match (next + 1, "GOT"))) 2509 reloc_type = BFD_RELOC_MN10300_GOT32; 2510 else if ((next_end = mn10300_end_of_match (next + 1, "PLT"))) 2511 reloc_type = BFD_RELOC_32_PLT_PCREL; 2512 else if ((next_end = mn10300_end_of_match (next + 1, "tlsgd"))) 2513 reloc_type = BFD_RELOC_MN10300_TLS_GD; 2514 else if ((next_end = mn10300_end_of_match (next + 1, "tlsldm"))) 2515 reloc_type = BFD_RELOC_MN10300_TLS_LD; 2516 else if ((next_end = mn10300_end_of_match (next + 1, "dtpoff"))) 2517 reloc_type = BFD_RELOC_MN10300_TLS_LDO; 2518 else if ((next_end = mn10300_end_of_match (next + 1, "gotntpoff"))) 2519 reloc_type = BFD_RELOC_MN10300_TLS_GOTIE; 2520 else if ((next_end = mn10300_end_of_match (next + 1, "indntpoff"))) 2521 reloc_type = BFD_RELOC_MN10300_TLS_IE; 2522 else if ((next_end = mn10300_end_of_match (next + 1, "tpoff"))) 2523 reloc_type = BFD_RELOC_MN10300_TLS_LE; 2524 else 2525 goto no_suffix; 2526 2527 *input_line_pointer = *nextcharP; 2528 input_line_pointer = next_end; 2529 *nextcharP = *input_line_pointer; 2530 *input_line_pointer = '\0'; 2531 2532 exprP->X_op = O_PIC_reloc; 2533 exprP->X_add_number = 0; 2534 exprP->X_md = reloc_type; 2535 2536 return 1; 2537 } 2538 2539 /* The target specific pseudo-ops which we support. */ 2540 const pseudo_typeS md_pseudo_table[] = 2541 { 2542 { "am30", set_arch_mach, AM30 }, 2543 { "am33", set_arch_mach, AM33 }, 2544 { "am33_2", set_arch_mach, AM33_2 }, 2545 { "mn10300", set_arch_mach, MN103 }, 2546 {NULL, 0, 0} 2547 }; 2548 2549 /* Returns FALSE if there is some mn10300 specific reason why the 2550 subtraction of two same-section symbols cannot be computed by 2551 the assembler. */ 2552 2553 bool 2554 mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section) 2555 { 2556 bool result; 2557 fragS * left_frag; 2558 fragS * right_frag; 2559 fragS * frag; 2560 2561 /* If we are not performing linker relaxation then we have nothing 2562 to worry about. */ 2563 if (linkrelax == 0) 2564 return true; 2565 2566 /* If the symbols are not in a code section then they are OK. */ 2567 if ((section->flags & SEC_CODE) == 0) 2568 return true; 2569 2570 /* Otherwise we have to scan the fragments between the two symbols. 2571 If any instructions are found then we have to assume that linker 2572 relaxation may change their size and so we must delay resolving 2573 the subtraction until the final link. */ 2574 left_frag = symbol_get_frag (left->X_add_symbol); 2575 right_frag = symbol_get_frag (right->X_add_symbol); 2576 2577 if (left_frag == right_frag) 2578 return ! left_frag->tc_frag_data; 2579 2580 result = true; 2581 for (frag = left_frag; frag != NULL; frag = frag->fr_next) 2582 { 2583 if (frag->tc_frag_data) 2584 result = false; 2585 if (frag == right_frag) 2586 break; 2587 } 2588 2589 if (frag == NULL) 2590 for (frag = right_frag; frag != NULL; frag = frag->fr_next) 2591 { 2592 if (frag->tc_frag_data) 2593 result = false; 2594 if (frag == left_frag) 2595 break; 2596 } 2597 2598 if (frag == NULL) 2599 /* The two symbols are on disjoint fragment chains 2600 - we cannot possibly compute their difference. */ 2601 return false; 2602 2603 return result; 2604 } 2605 2606 /* When relaxing, we need to output a reloc for any .align directive 2607 that requests alignment to a two byte boundary or larger. */ 2608 2609 void 2610 mn10300_handle_align (fragS *frag) 2611 { 2612 if (linkrelax 2613 && (frag->fr_type == rs_align 2614 || frag->fr_type == rs_align_code) 2615 && frag->fr_address + frag->fr_fix > 0 2616 && frag->fr_offset > 1 2617 && now_seg != bss_section 2618 /* Do not create relocs for the merging sections - such 2619 relocs will prevent the contents from being merged. */ 2620 && (bfd_section_flags (now_seg) & SEC_MERGE) == 0) 2621 /* Create a new fixup to record the alignment request. The symbol is 2622 irrelevant but must be present so we use the absolute section symbol. 2623 The offset from the symbol is used to record the power-of-two alignment 2624 value. The size is set to 0 because the frag may already be aligned, 2625 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */ 2626 fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, false, 2627 BFD_RELOC_MN10300_ALIGN); 2628 } 2629 2630 bool 2631 mn10300_force_relocation (struct fix * fixp) 2632 { 2633 if (linkrelax 2634 && (fixp->fx_pcrel 2635 || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN)) 2636 return true; 2637 2638 return generic_force_reloc (fixp); 2639 } 2640
Indexes created Fri Aug 21 00:24:51 UTC 2026