riscv-dis.c revision 1.10
1 /* RISC-V disassembler 2 Copyright (C) 2011-2025 Free Software Foundation, Inc. 3 4 Contributed by Andrew Waterman (andrew (at) sifive.com). 5 Based on MIPS target. 6 7 This file is part of the GNU opcodes library. 8 9 This library is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; see the file COPYING3. If not, 21 see <http://www.gnu.org/licenses/>. */ 22 23 #include "sysdep.h" 24 #include "disassemble.h" 25 #include "libiberty.h" 26 #include "opcode/riscv.h" 27 #include "opintl.h" 28 #include "elf-bfd.h" 29 #include "elf/riscv.h" 30 #include "elfxx-riscv.h" 31 32 #include <stdint.h> 33 #include <ctype.h> 34 35 /* The RISC-V disassembler produces styled output using 36 disassemble_info::fprintf_styled_func. This define prevents use of 37 disassemble_info::fprintf_func which is for unstyled output. */ 38 #define fprintf_func please_use_fprintf_styled_func_instead 39 40 /* The earliest privilege spec supported by disassembler. */ 41 #define PRIV_SPEC_EARLIEST PRIV_SPEC_CLASS_1P10 42 43 struct riscv_private_data 44 { 45 bfd_vma gp; 46 bfd_vma print_addr; 47 bfd_vma hi_addr[OP_MASK_RD + 1]; 48 bool to_print_addr; 49 bool has_gp; 50 /* Current XLEN for the disassembler. */ 51 unsigned xlen; 52 /* Default ISA specification version. */ 53 enum riscv_spec_class default_isa_spec; 54 /* Default privileged specification. */ 55 enum riscv_spec_class default_priv_spec; 56 /* Used for architecture parser. */ 57 riscv_parse_subset_t riscv_rps_dis; 58 /* Default architecture string for the object file. It will be changed once 59 elf architecture attribute exits. This is used for mapping symbol $x. */ 60 const char* default_arch; 61 /* Used for mapping symbols. */ 62 int last_map_symbol; 63 bfd_vma last_stop_offset; 64 bfd_vma last_map_symbol_boundary; 65 enum riscv_seg_mstate last_map_state; 66 asection *last_map_section; 67 /* Register names as used by the disassembler. */ 68 const char (*riscv_gpr_names)[NRC]; 69 const char (*riscv_fpr_names)[NRC]; 70 /* If set, disassemble as most general instruction. */ 71 bool no_aliases; 72 /* If set, disassemble without checking architecture string, just like what 73 we did at the beginning. */ 74 bool all_ext; 75 }; 76 77 /* Set default RISC-V disassembler options. */ 78 79 static void 80 set_default_riscv_dis_options (struct disassemble_info *info) 81 { 82 struct riscv_private_data *pd = info->private_data; 83 pd->riscv_gpr_names = riscv_gpr_names_abi; 84 pd->riscv_fpr_names = riscv_fpr_names_abi; 85 pd->no_aliases = false; 86 pd->all_ext = false; 87 } 88 89 /* Parse RISC-V disassembler option (without arguments). */ 90 91 static bool 92 parse_riscv_dis_option_without_args (const char *option, 93 struct disassemble_info *info) 94 { 95 struct riscv_private_data *pd = info->private_data; 96 if (strcmp (option, "no-aliases") == 0) 97 pd->no_aliases = true; 98 else if (strcmp (option, "numeric") == 0) 99 { 100 pd->riscv_gpr_names = riscv_gpr_names_numeric; 101 pd->riscv_fpr_names = riscv_fpr_names_numeric; 102 } 103 else if (strcmp (option, "max") == 0) 104 pd->all_ext = true; 105 else 106 return false; 107 return true; 108 } 109 110 /* Parse RISC-V disassembler option (possibly with arguments). */ 111 112 static void 113 parse_riscv_dis_option (const char *option, struct disassemble_info *info) 114 { 115 char *equal, *value; 116 117 if (parse_riscv_dis_option_without_args (option, info)) 118 return; 119 120 equal = strchr (option, '='); 121 if (equal == NULL) 122 { 123 /* The option without '=' should be defined above. */ 124 opcodes_error_handler (_("unrecognized disassembler option: %s"), option); 125 return; 126 } 127 if (equal == option 128 || *(equal + 1) == '\0') 129 { 130 /* Invalid options with '=', no option name before '=', 131 and no value after '='. */ 132 opcodes_error_handler (_("unrecognized disassembler option with '=': %s"), 133 option); 134 return; 135 } 136 137 *equal = '\0'; 138 value = equal + 1; 139 if (strcmp (option, "priv-spec") == 0) 140 { 141 struct riscv_private_data *pd = info->private_data; 142 enum riscv_spec_class priv_spec = PRIV_SPEC_CLASS_NONE; 143 const char *name = NULL; 144 145 RISCV_GET_PRIV_SPEC_CLASS (value, priv_spec); 146 if (priv_spec < PRIV_SPEC_EARLIEST) 147 opcodes_error_handler (_("unknown privileged spec set by %s=%s"), 148 option, value); 149 else if (pd->default_priv_spec == PRIV_SPEC_CLASS_NONE) 150 pd->default_priv_spec = priv_spec; 151 else if (pd->default_priv_spec != priv_spec) 152 { 153 RISCV_GET_PRIV_SPEC_NAME (name, pd->default_priv_spec); 154 opcodes_error_handler (_("mis-matched privilege spec set by %s=%s, " 155 "the elf privilege attribute is %s"), 156 option, value, name); 157 } 158 } 159 else 160 { 161 /* xgettext:c-format */ 162 opcodes_error_handler (_("unrecognized disassembler option: %s"), option); 163 } 164 } 165 166 /* Parse RISC-V disassembler options. */ 167 168 static void 169 parse_riscv_dis_options (const char *opts_in, struct disassemble_info *info) 170 { 171 char *opts = xstrdup (opts_in), *opt = opts, *opt_end = opts; 172 173 set_default_riscv_dis_options (info); 174 175 for ( ; opt_end != NULL; opt = opt_end + 1) 176 { 177 if ((opt_end = strchr (opt, ',')) != NULL) 178 *opt_end = 0; 179 parse_riscv_dis_option (opt, info); 180 } 181 182 free (opts); 183 } 184 185 /* Print one argument from an array. */ 186 187 static void 188 arg_print (struct disassemble_info *info, unsigned long val, 189 const char* const* array, size_t size) 190 { 191 const char *s = val >= size || array[val] == NULL ? "unknown" : array[val]; 192 (*info->fprintf_styled_func) (info->stream, dis_style_text, "%s", s); 193 } 194 195 /* If we need to print an address, set its value and state. */ 196 197 static void 198 maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset, 199 int wide) 200 { 201 if (pd->hi_addr[base_reg] != (bfd_vma)-1) 202 { 203 pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset; 204 pd->hi_addr[base_reg] = -1; 205 } 206 else if (base_reg == X_GP && pd->has_gp) 207 pd->print_addr = pd->gp + offset; 208 else if (base_reg == X_TP || base_reg == 0) 209 pd->print_addr = offset; 210 else 211 return; /* Don't print the address. */ 212 pd->to_print_addr = true; 213 214 /* Sign-extend a 32-bit value to a 64-bit value. */ 215 if (wide) 216 pd->print_addr = (bfd_vma)(int32_t) pd->print_addr; 217 218 /* Fit into a 32-bit value on RV32. */ 219 if (pd->xlen == 32) 220 pd->print_addr = (bfd_vma)(uint32_t)pd->print_addr; 221 } 222 223 /* Get Zcmp reg_list field. */ 224 225 static void 226 print_reg_list (disassemble_info *info, insn_t l) 227 { 228 struct riscv_private_data *pd = info->private_data; 229 bool numeric = pd->riscv_gpr_names == riscv_gpr_names_numeric; 230 unsigned reg_list = (int)EXTRACT_OPERAND (REG_LIST, l); 231 unsigned r_start = numeric ? X_S2 : X_S0; 232 info->fprintf_styled_func (info->stream, dis_style_register, 233 "%s", pd->riscv_gpr_names[X_RA]); 234 235 if (reg_list == 5) 236 { 237 info->fprintf_styled_func (info->stream, dis_style_text, ","); 238 info->fprintf_styled_func (info->stream, dis_style_register, 239 "%s", pd->riscv_gpr_names[X_S0]); 240 } 241 else if (reg_list == 6 || (numeric && reg_list > 6)) 242 { 243 info->fprintf_styled_func (info->stream, dis_style_text, ","); 244 info->fprintf_styled_func (info->stream, dis_style_register, 245 "%s", pd->riscv_gpr_names[X_S0]); 246 info->fprintf_styled_func (info->stream, dis_style_text, "-"); 247 info->fprintf_styled_func (info->stream, dis_style_register, 248 "%s", pd->riscv_gpr_names[X_S1]); 249 } 250 251 if (reg_list == 15) 252 { 253 info->fprintf_styled_func (info->stream, dis_style_text, ","); 254 info->fprintf_styled_func (info->stream, dis_style_register, 255 "%s", pd->riscv_gpr_names[r_start]); 256 info->fprintf_styled_func (info->stream, dis_style_text, "-"); 257 info->fprintf_styled_func (info->stream, dis_style_register, 258 "%s", pd->riscv_gpr_names[X_S11]); 259 } 260 else if (reg_list == 7 && numeric) 261 { 262 info->fprintf_styled_func (info->stream, dis_style_text, ","); 263 info->fprintf_styled_func (info->stream, dis_style_register, 264 "%s", pd->riscv_gpr_names[X_S2]); 265 } 266 else if (reg_list > 6) 267 { 268 info->fprintf_styled_func (info->stream, dis_style_text, ","); 269 info->fprintf_styled_func (info->stream, dis_style_register, 270 "%s", pd->riscv_gpr_names[r_start]); 271 info->fprintf_styled_func (info->stream, dis_style_text, "-"); 272 info->fprintf_styled_func (info->stream, dis_style_register, 273 "%s", pd->riscv_gpr_names[reg_list + 11]); 274 } 275 } 276 277 /* Get Zcmp sp adjustment immediate. */ 278 279 static int 280 riscv_get_spimm (insn_t l, int xlen) 281 { 282 int spimm = riscv_get_sp_base(l, xlen); 283 spimm += EXTRACT_ZCMP_SPIMM (l); 284 if (((l ^ MATCH_CM_PUSH) & MASK_CM_PUSH) == 0) 285 spimm *= -1; 286 return spimm; 287 } 288 289 /* Get s-register regno by using sreg number. 290 e.g. the regno of s0 is 8, so 291 riscv_zcmp_get_sregno (0) equals 8. */ 292 293 static unsigned 294 riscv_zcmp_get_sregno (unsigned sreg_idx) 295 { 296 return sreg_idx > 1 ? 297 sreg_idx + 16 : sreg_idx + 8; 298 } 299 300 /* Print insn arguments for 32/64-bit code. */ 301 302 static void 303 print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info) 304 { 305 struct riscv_private_data *pd = info->private_data; 306 int rs1 = (l >> OP_SH_RS1) & OP_MASK_RS1; 307 int rd = (l >> OP_SH_RD) & OP_MASK_RD; 308 fprintf_styled_ftype print = info->fprintf_styled_func; 309 const char *opargStart; 310 311 if (*oparg != '\0') 312 print (info->stream, dis_style_text, "\t"); 313 314 for (; *oparg != '\0'; oparg++) 315 { 316 opargStart = oparg; 317 switch (*oparg) 318 { 319 case 'C': /* RVC */ 320 switch (*++oparg) 321 { 322 case 's': /* RS1 x8-x15. */ 323 case 'w': /* RS1 x8-x15. */ 324 print (info->stream, dis_style_register, "%s", 325 pd->riscv_gpr_names[EXTRACT_OPERAND (CRS1S, l) + 8]); 326 break; 327 case 't': /* RS2 x8-x15. */ 328 case 'x': /* RS2 x8-x15. */ 329 print (info->stream, dis_style_register, "%s", 330 pd->riscv_gpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]); 331 break; 332 case 'U': /* RS1, constrained to equal RD. */ 333 print (info->stream, dis_style_register, 334 "%s", pd->riscv_gpr_names[rd]); 335 break; 336 case 'c': /* RS1, constrained to equal sp. */ 337 print (info->stream, dis_style_register, "%s", 338 pd->riscv_gpr_names[X_SP]); 339 break; 340 case 'V': /* RS2 */ 341 print (info->stream, dis_style_register, "%s", 342 pd->riscv_gpr_names[EXTRACT_OPERAND (CRS2, l)]); 343 break; 344 case 'o': 345 case 'j': 346 if (((l & MASK_C_ADDI) == MATCH_C_ADDI) && rd != 0) 347 maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 0); 348 if (pd->xlen == 64 349 && ((l & MASK_C_ADDIW) == MATCH_C_ADDIW) && rd != 0) 350 maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 1); 351 print (info->stream, dis_style_immediate, "%d", 352 (int)EXTRACT_CITYPE_IMM (l)); 353 break; 354 case 'k': 355 print (info->stream, dis_style_address_offset, "%d", 356 (int)EXTRACT_CLTYPE_LW_IMM (l)); 357 break; 358 case 'l': 359 print (info->stream, dis_style_address_offset, "%d", 360 (int)EXTRACT_CLTYPE_LD_IMM (l)); 361 break; 362 case 'm': 363 print (info->stream, dis_style_address_offset, "%d", 364 (int)EXTRACT_CITYPE_LWSP_IMM (l)); 365 break; 366 case 'n': 367 print (info->stream, dis_style_address_offset, "%d", 368 (int)EXTRACT_CITYPE_LDSP_IMM (l)); 369 break; 370 case 'K': 371 print (info->stream, dis_style_immediate, "%d", 372 (int)EXTRACT_CIWTYPE_ADDI4SPN_IMM (l)); 373 break; 374 case 'L': 375 print (info->stream, dis_style_immediate, "%d", 376 (int)EXTRACT_CITYPE_ADDI16SP_IMM (l)); 377 break; 378 case 'M': 379 print (info->stream, dis_style_address_offset, "%d", 380 (int)EXTRACT_CSSTYPE_SWSP_IMM (l)); 381 break; 382 case 'N': 383 print (info->stream, dis_style_address_offset, "%d", 384 (int)EXTRACT_CSSTYPE_SDSP_IMM (l)); 385 break; 386 case 'p': 387 info->target = EXTRACT_CBTYPE_IMM (l) + pc; 388 (*info->print_address_func) (info->target, info); 389 break; 390 case 'a': 391 info->target = EXTRACT_CJTYPE_IMM (l) + pc; 392 (*info->print_address_func) (info->target, info); 393 break; 394 case 'u': 395 print (info->stream, dis_style_immediate, "0x%x", 396 (unsigned)(EXTRACT_CITYPE_IMM (l) & (RISCV_BIGIMM_REACH-1))); 397 break; 398 case '>': 399 print (info->stream, dis_style_immediate, "0x%x", 400 (unsigned)EXTRACT_CITYPE_IMM (l) & 0x3f); 401 break; 402 case '<': 403 print (info->stream, dis_style_immediate, "0x%x", 404 (unsigned)EXTRACT_CITYPE_IMM (l) & 0x1f); 405 break; 406 case 'T': /* Floating-point RS2. */ 407 print (info->stream, dis_style_register, "%s", 408 pd->riscv_fpr_names[EXTRACT_OPERAND (CRS2, l)]); 409 break; 410 case 'D': /* Floating-point RS2 x8-x15. */ 411 print (info->stream, dis_style_register, "%s", 412 pd->riscv_fpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]); 413 break; 414 } 415 break; 416 417 case 'V': /* RVV */ 418 switch (*++oparg) 419 { 420 case 'd': 421 case 'f': 422 print (info->stream, dis_style_register, "%s", 423 riscv_vecr_names_numeric[EXTRACT_OPERAND (VD, l)]); 424 break; 425 case 'e': 426 if (!EXTRACT_OPERAND (VWD, l)) 427 print (info->stream, dis_style_register, "%s", 428 pd->riscv_gpr_names[0]); 429 else 430 print (info->stream, dis_style_register, "%s", 431 riscv_vecr_names_numeric[EXTRACT_OPERAND (VD, l)]); 432 break; 433 case 's': 434 print (info->stream, dis_style_register, "%s", 435 riscv_vecr_names_numeric[EXTRACT_OPERAND (VS1, l)]); 436 break; 437 case 't': 438 case 'u': /* VS1 == VS2 already verified at this point. */ 439 case 'v': /* VD == VS1 == VS2 already verified at this point. */ 440 print (info->stream, dis_style_register, "%s", 441 riscv_vecr_names_numeric[EXTRACT_OPERAND (VS2, l)]); 442 break; 443 case '0': 444 print (info->stream, dis_style_register, "%s", 445 riscv_vecr_names_numeric[0]); 446 break; 447 case 'b': 448 case 'c': 449 { 450 int imm = (*oparg == 'b') ? EXTRACT_RVV_VB_IMM (l) 451 : EXTRACT_RVV_VC_IMM (l); 452 unsigned int imm_vlmul = EXTRACT_OPERAND (VLMUL, imm); 453 unsigned int imm_vsew = EXTRACT_OPERAND (VSEW, imm); 454 unsigned int imm_vta = EXTRACT_OPERAND (VTA, imm); 455 unsigned int imm_vma = EXTRACT_OPERAND (VMA, imm); 456 unsigned int imm_vtype_res = (imm >> 8); 457 458 if (imm_vsew < ARRAY_SIZE (riscv_vsew) 459 && imm_vlmul < ARRAY_SIZE (riscv_vlmul) 460 && imm_vta < ARRAY_SIZE (riscv_vta) 461 && imm_vma < ARRAY_SIZE (riscv_vma) 462 && !imm_vtype_res 463 && riscv_vsew[imm_vsew] != NULL 464 && riscv_vlmul[imm_vlmul] != NULL) 465 print (info->stream, dis_style_text, "%s,%s,%s,%s", 466 riscv_vsew[imm_vsew], 467 riscv_vlmul[imm_vlmul], riscv_vta[imm_vta], 468 riscv_vma[imm_vma]); 469 else 470 print (info->stream, dis_style_immediate, "%d", imm); 471 } 472 break; 473 case 'i': 474 print (info->stream, dis_style_immediate, "%d", 475 (int)EXTRACT_RVV_VI_IMM (l)); 476 break; 477 case 'j': 478 print (info->stream, dis_style_immediate, "%d", 479 (int)EXTRACT_RVV_VI_UIMM (l)); 480 break; 481 case 'k': 482 print (info->stream, dis_style_immediate, "%d", 483 (int)EXTRACT_RVV_OFFSET (l)); 484 break; 485 case 'l': 486 print (info->stream, dis_style_immediate, "%d", 487 (int)EXTRACT_RVV_VI_UIMM6 (l)); 488 break; 489 case 'm': 490 if (!EXTRACT_OPERAND (VMASK, l)) 491 { 492 print (info->stream, dis_style_text, ","); 493 print (info->stream, dis_style_register, "%s", 494 riscv_vecm_names_numeric[0]); 495 } 496 break; 497 } 498 break; 499 500 case ',': 501 case '(': 502 case ')': 503 case '[': 504 case ']': 505 case '{': 506 case '}': 507 print (info->stream, dis_style_text, "%c", *oparg); 508 break; 509 510 case '0': 511 /* Only print constant 0 if it is the last argument. */ 512 if (!oparg[1]) 513 print (info->stream, dis_style_immediate, "0"); 514 break; 515 516 case 'r': 517 print (info->stream, dis_style_register, "%s", 518 pd->riscv_gpr_names[EXTRACT_OPERAND (RS3, l)]); 519 break; 520 521 case 's': 522 if ((l & MASK_JALR) == MATCH_JALR) 523 maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0); 524 print (info->stream, dis_style_register, "%s", 525 pd->riscv_gpr_names[rs1]); 526 break; 527 528 case 't': 529 print (info->stream, dis_style_register, "%s", 530 pd->riscv_gpr_names[EXTRACT_OPERAND (RS2, l)]); 531 break; 532 533 case 'u': 534 print (info->stream, dis_style_immediate, "0x%x", 535 (unsigned)EXTRACT_UTYPE_IMM (l) >> RISCV_IMM_BITS); 536 break; 537 538 case 'm': 539 arg_print (info, EXTRACT_OPERAND (RM, l), 540 riscv_rm, ARRAY_SIZE (riscv_rm)); 541 break; 542 543 case 'P': 544 arg_print (info, EXTRACT_OPERAND (PRED, l), 545 riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ)); 546 break; 547 548 case 'Q': 549 arg_print (info, EXTRACT_OPERAND (SUCC, l), 550 riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ)); 551 break; 552 553 case 'o': 554 maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0); 555 /* Fall through. */ 556 case 'j': 557 if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0) 558 || (l & MASK_JALR) == MATCH_JALR) 559 maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0); 560 if (pd->xlen == 64 561 && ((l & MASK_ADDIW) == MATCH_ADDIW) && rs1 != 0) 562 maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 1); 563 print (info->stream, dis_style_immediate, "%d", 564 (int)EXTRACT_ITYPE_IMM (l)); 565 break; 566 567 case 'q': 568 maybe_print_address (pd, rs1, EXTRACT_STYPE_IMM (l), 0); 569 print (info->stream, dis_style_address_offset, "%d", 570 (int)EXTRACT_STYPE_IMM (l)); 571 break; 572 573 case 'a': 574 info->target = EXTRACT_JTYPE_IMM (l) + pc; 575 (*info->print_address_func) (info->target, info); 576 break; 577 578 case 'p': 579 info->target = EXTRACT_BTYPE_IMM (l) + pc; 580 (*info->print_address_func) (info->target, info); 581 break; 582 583 case 'd': 584 if ((l & MASK_AUIPC) == MATCH_AUIPC) 585 pd->hi_addr[rd] = pc + EXTRACT_UTYPE_IMM (l); 586 else if ((l & MASK_LUI) == MATCH_LUI) 587 pd->hi_addr[rd] = EXTRACT_UTYPE_IMM (l); 588 else if ((l & MASK_C_LUI) == MATCH_C_LUI) 589 pd->hi_addr[rd] = EXTRACT_CITYPE_LUI_IMM (l); 590 print (info->stream, dis_style_register, "%s", 591 pd->riscv_gpr_names[rd]); 592 break; 593 594 case 'y': 595 print (info->stream, dis_style_immediate, "0x%x", 596 EXTRACT_OPERAND (BS, l)); 597 break; 598 599 case 'z': 600 print (info->stream, dis_style_register, "%s", 601 pd->riscv_gpr_names[0]); 602 break; 603 604 case '>': 605 print (info->stream, dis_style_immediate, "0x%x", 606 EXTRACT_OPERAND (SHAMT, l)); 607 break; 608 609 case '<': 610 print (info->stream, dis_style_immediate, "0x%x", 611 EXTRACT_OPERAND (SHAMTW, l)); 612 break; 613 614 case 'S': 615 case 'U': 616 print (info->stream, dis_style_register, "%s", 617 pd->riscv_fpr_names[rs1]); 618 break; 619 620 case 'T': 621 print (info->stream, dis_style_register, "%s", 622 pd->riscv_fpr_names[EXTRACT_OPERAND (RS2, l)]); 623 break; 624 625 case 'D': 626 print (info->stream, dis_style_register, "%s", 627 pd->riscv_fpr_names[rd]); 628 break; 629 630 case 'R': 631 print (info->stream, dis_style_register, "%s", 632 pd->riscv_fpr_names[EXTRACT_OPERAND (RS3, l)]); 633 break; 634 635 case 'E': 636 { 637 static const char *riscv_csr_hash[4096]; /* Total 2^12 CSRs. */ 638 static bool init_csr = false; 639 unsigned int csr = EXTRACT_OPERAND (CSR, l); 640 641 if (!init_csr) 642 { 643 unsigned int i; 644 for (i = 0; i < 4096; i++) 645 riscv_csr_hash[i] = NULL; 646 647 /* Set to the newest privileged version. */ 648 if (pd->default_priv_spec == PRIV_SPEC_CLASS_NONE) 649 pd->default_priv_spec = PRIV_SPEC_CLASS_DRAFT - 1; 650 651 #define DECLARE_CSR(name, num, class, define_version, abort_version) \ 652 if (riscv_csr_hash[num] == NULL \ 653 && ((define_version == PRIV_SPEC_CLASS_NONE \ 654 && abort_version == PRIV_SPEC_CLASS_NONE) \ 655 || (pd->default_priv_spec >= define_version \ 656 && pd->default_priv_spec < abort_version))) \ 657 riscv_csr_hash[num] = #name; 658 #define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \ 659 DECLARE_CSR (name, num, class, define_version, abort_version) 660 #include "opcode/riscv-opc.h" 661 #undef DECLARE_CSR 662 } 663 664 if (riscv_csr_hash[csr] != NULL) 665 if (riscv_subset_supports (&pd->riscv_rps_dis, "xtheadvector") 666 && (csr == CSR_VSTART 667 || csr == CSR_VXSAT 668 || csr == CSR_VXRM 669 || csr == CSR_VL 670 || csr == CSR_VTYPE 671 || csr == CSR_VLENB)) 672 print (info->stream, dis_style_register, "%s", 673 concat ("th.", riscv_csr_hash[csr], NULL)); 674 else 675 print (info->stream, dis_style_register, "%s", 676 riscv_csr_hash[csr]); 677 else 678 print (info->stream, dis_style_immediate, "0x%x", csr); 679 break; 680 } 681 682 case 'Y': 683 print (info->stream, dis_style_immediate, "0x%x", 684 EXTRACT_OPERAND (RNUM, l)); 685 break; 686 687 case 'Z': 688 print (info->stream, dis_style_immediate, "%d", rs1); 689 break; 690 691 case 'W': /* Various operands for standard z extensions. */ 692 switch (*++oparg) 693 { 694 case 'i': 695 switch (*++oparg) 696 { 697 case 'f': 698 print (info->stream, dis_style_address_offset, "%d", 699 (int) EXTRACT_STYPE_IMM (l)); 700 break; 701 default: 702 goto undefined_modifier; 703 } 704 break; 705 case 'f': 706 switch (*++oparg) 707 { 708 case 'v': 709 if (riscv_fli_symval[rs1]) 710 print (info->stream, dis_style_text, "%s", 711 riscv_fli_symval[rs1]); 712 else 713 print (info->stream, dis_style_immediate, "%a", 714 riscv_fli_numval[rs1]); 715 break; 716 default: 717 goto undefined_modifier; 718 } 719 break; 720 case 'c': /* Zcb extension 16 bits length instruction fields. */ 721 switch (*++oparg) 722 { 723 case '1': 724 print (info->stream, dis_style_register, "%s", 725 pd->riscv_gpr_names[riscv_zcmp_get_sregno (EXTRACT_OPERAND (SREG1, l))]); 726 break; 727 case '2': 728 print (info->stream, dis_style_register, "%s", 729 pd->riscv_gpr_names[riscv_zcmp_get_sregno (EXTRACT_OPERAND (SREG2, l))]); 730 break; 731 case 'b': 732 print (info->stream, dis_style_immediate, "%d", 733 (int)EXTRACT_ZCB_BYTE_UIMM (l)); 734 break; 735 case 'h': 736 print (info->stream, dis_style_immediate, "%d", 737 (int)EXTRACT_ZCB_HALFWORD_UIMM (l)); 738 break; 739 case 'r': 740 print_reg_list (info, l); 741 break; 742 case 'p': 743 print (info->stream, dis_style_immediate, "%d", 744 riscv_get_spimm (l, pd->xlen)); 745 break; 746 case 'i': 747 case 'I': 748 print (info->stream, dis_style_address_offset, 749 "%" PRIu64, EXTRACT_ZCMT_INDEX (l)); 750 break; 751 default: 752 goto undefined_modifier; 753 } 754 break; 755 default: 756 goto undefined_modifier; 757 } 758 break; 759 760 case 'X': /* Vendor-specific operands. */ 761 switch (*++oparg) 762 { 763 case 't': /* Vendor-specific (T-head) operands. */ 764 { 765 size_t n; 766 size_t s; 767 bool sign; 768 switch (*++oparg) 769 { 770 case 'V': 771 ++oparg; 772 if (*oparg != 'c') 773 goto undefined_modifier; 774 775 int imm = (*oparg == 'b') ? EXTRACT_RVV_VB_IMM (l) 776 : EXTRACT_RVV_VC_IMM (l); 777 unsigned int imm_vediv = EXTRACT_OPERAND (XTHEADVEDIV, imm); 778 unsigned int imm_vlmul = EXTRACT_OPERAND (XTHEADVLMUL, imm); 779 unsigned int imm_vsew = EXTRACT_OPERAND (XTHEADVSEW, imm); 780 unsigned int imm_vtype_res 781 = EXTRACT_OPERAND (XTHEADVTYPE_RES, imm); 782 if (imm_vsew < ARRAY_SIZE (riscv_vsew) 783 && imm_vlmul < ARRAY_SIZE (riscv_th_vlen) 784 && imm_vediv < ARRAY_SIZE (riscv_th_vediv) 785 && ! imm_vtype_res) 786 print (info->stream, dis_style_text, "%s,%s,%s", 787 riscv_vsew[imm_vsew], riscv_th_vlen[imm_vlmul], 788 riscv_th_vediv[imm_vediv]); 789 else 790 print (info->stream, dis_style_immediate, "%d", imm); 791 break; 792 case 'l': /* Integer immediate, literal. */ 793 oparg++; 794 while (*oparg && *oparg != ',') 795 { 796 print (info->stream, dis_style_immediate, "%c", *oparg); 797 oparg++; 798 } 799 oparg--; 800 break; 801 case 's': /* Integer immediate, 'XsN@S' ... N-bit signed immediate at bit S. */ 802 sign = true; 803 goto print_imm; 804 case 'u': /* Integer immediate, 'XuN@S' ... N-bit unsigned immediate at bit S. */ 805 sign = false; 806 goto print_imm; 807 print_imm: 808 n = strtol (oparg + 1, (char **)&oparg, 10); 809 if (*oparg != '@') 810 goto undefined_modifier; 811 s = strtol (oparg + 1, (char **)&oparg, 10); 812 oparg--; 813 814 if (!sign) 815 print (info->stream, dis_style_immediate, "%lu", 816 (unsigned long)EXTRACT_U_IMM (n, s, l)); 817 else 818 print (info->stream, dis_style_immediate, "%li", 819 (signed long)EXTRACT_S_IMM (n, s, l)); 820 break; 821 default: 822 goto undefined_modifier; 823 } 824 } 825 break; 826 case 'c': /* Vendor-specific (CORE-V) operands. */ 827 switch (*++oparg) 828 { 829 case '2': 830 print (info->stream, dis_style_immediate, "%d", 831 ((int) EXTRACT_CV_IS2_UIMM5 (l))); 832 break; 833 case '3': 834 print (info->stream, dis_style_immediate, "%d", 835 ((int) EXTRACT_CV_IS3_UIMM5 (l))); 836 break; 837 case '4': 838 print (info->stream, dis_style_immediate, "%d", 839 ((int) EXTRACT_CV_BI_IMM5 (l))); 840 break; 841 case '5': 842 print (info->stream, dis_style_immediate, "%d", 843 ((int) EXTRACT_CV_SIMD_IMM6 (l))); 844 break; 845 case '6': 846 print (info->stream, dis_style_immediate, "%d", 847 ((int) EXTRACT_CV_BITMANIP_UIMM5 (l))); 848 break; 849 case '7': 850 print (info->stream, dis_style_immediate, "%d", 851 ((int) EXTRACT_CV_BITMANIP_UIMM2 (l))); 852 break; 853 case '8': 854 print (info->stream, dis_style_immediate, "%d", 855 ((int) EXTRACT_CV_SIMD_UIMM6 (l))); 856 ++oparg; 857 break; 858 default: 859 goto undefined_modifier; 860 } 861 break; 862 case 's': /* Vendor-specific (SiFive) operands. */ 863 switch (*++oparg) 864 { 865 /* SiFive vector coprocessor interface. */ 866 case 'd': 867 print (info->stream, dis_style_register, "0x%x", 868 (unsigned) EXTRACT_OPERAND (RD, l)); 869 break; 870 case 't': 871 print (info->stream, dis_style_register, "0x%x", 872 (unsigned) EXTRACT_OPERAND (RS2, l)); 873 break; 874 case 'O': 875 switch (*++oparg) 876 { 877 case '2': 878 print (info->stream, dis_style_register, "0x%x", 879 (unsigned) EXTRACT_OPERAND (XSO2, l)); 880 break; 881 case '1': 882 print (info->stream, dis_style_register, "0x%x", 883 (unsigned) EXTRACT_OPERAND (XSO1, l)); 884 break; 885 } 886 break; 887 } 888 break; 889 case 'm': /* Vendor-specific (MIPS) operands. */ 890 switch (*++oparg) 891 { 892 case '@': 893 print (info->stream, dis_style_register, "0x%x", 894 (unsigned) EXTRACT_OPERAND (MIPS_HINT, l)); 895 break; 896 case '#': 897 print (info->stream, dis_style_register, "0x%x", 898 (unsigned) EXTRACT_OPERAND (MIPS_IMM9, l)); 899 break; 900 case '$': 901 print (info->stream, dis_style_immediate, "%d", 902 (unsigned)EXTRACT_MIPS_LDP_IMM (l)); 903 break; 904 case '%': 905 print (info->stream, dis_style_immediate, "%d", 906 (unsigned)EXTRACT_MIPS_LWP_IMM (l)); 907 break; 908 case '^': 909 print (info->stream, dis_style_immediate, "%d", 910 (unsigned)EXTRACT_MIPS_SDP_IMM (l)); 911 break; 912 case '&': 913 print (info->stream, dis_style_immediate, "%d", 914 (unsigned)EXTRACT_MIPS_SWP_IMM (l)); 915 break; 916 default: 917 goto undefined_modifier; 918 } 919 break; 920 default: 921 goto undefined_modifier; 922 } 923 break; 924 925 default: 926 undefined_modifier: 927 /* xgettext:c-format */ 928 print (info->stream, dis_style_text, 929 _("# internal error, undefined modifier (%c)"), 930 *opargStart); 931 return; 932 } 933 } 934 } 935 936 /* Print the RISC-V instruction at address MEMADDR in debugged memory, 937 on using INFO. Returns length of the instruction, in bytes. 938 BIGENDIAN must be 1 if this is big-endian code, 0 if 939 this is little-endian code. */ 940 941 static int 942 riscv_disassemble_insn (bfd_vma memaddr, 943 insn_t word, 944 const bfd_byte *packet, 945 disassemble_info *info) 946 { 947 const struct riscv_opcode *op; 948 static bool init = false; 949 static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1]; 950 struct riscv_private_data *pd = info->private_data; 951 int insnlen, i; 952 bool printed; 953 954 #define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP)) 955 956 /* Build a hash table to shorten the search time. */ 957 if (! init) 958 { 959 for (op = riscv_opcodes; op->name; op++) 960 if (!riscv_hash[OP_HASH_IDX (op->match)]) 961 riscv_hash[OP_HASH_IDX (op->match)] = op; 962 963 init = true; 964 } 965 966 insnlen = riscv_insn_length (word); 967 968 /* RISC-V instructions are always little-endian. */ 969 info->endian_code = BFD_ENDIAN_LITTLE; 970 971 info->bytes_per_chunk = insnlen % 4 == 0 ? 4 : 2; 972 info->bytes_per_line = 8; 973 /* We don't support constant pools, so this must be code. */ 974 info->display_endian = info->endian_code; 975 info->insn_info_valid = 1; 976 info->branch_delay_insns = 0; 977 info->data_size = 0; 978 info->insn_type = dis_nonbranch; 979 info->target = 0; 980 info->target2 = 0; 981 982 op = riscv_hash[OP_HASH_IDX (word)]; 983 if (op != NULL) 984 { 985 /* If XLEN is not known, get its value from the ELF class. */ 986 if (pd->xlen != 0) 987 ; 988 else if (info->mach == bfd_mach_riscv64) 989 pd->xlen = 64; 990 else if (info->mach == bfd_mach_riscv32) 991 pd->xlen = 32; 992 else if (info->section != NULL) 993 { 994 Elf_Internal_Ehdr *ehdr = elf_elfheader (info->section->owner); 995 pd->xlen = ehdr->e_ident[EI_CLASS] == ELFCLASS64 ? 64 : 32; 996 } 997 998 /* If arch has the Zfinx extension, replace FPR with GPR. */ 999 if (riscv_subset_supports (&pd->riscv_rps_dis, "zfinx")) 1000 pd->riscv_fpr_names = pd->riscv_gpr_names; 1001 else 1002 pd->riscv_fpr_names = pd->riscv_gpr_names == riscv_gpr_names_abi ? 1003 riscv_fpr_names_abi : riscv_fpr_names_numeric; 1004 1005 for (; op->name; op++) 1006 { 1007 /* Ignore macro insns. */ 1008 if (op->pinfo == INSN_MACRO) 1009 continue; 1010 /* Does the opcode match? */ 1011 if (! (op->match_func) (op, word)) 1012 continue; 1013 /* Is this a pseudo-instruction and may we print it as such? */ 1014 if (pd->no_aliases && (op->pinfo & INSN_ALIAS)) 1015 continue; 1016 /* Is this instruction restricted to a certain value of XLEN? */ 1017 if ((op->xlen_requirement != 0) 1018 && (op->xlen_requirement != pd->xlen)) 1019 continue; 1020 /* Is this instruction supported by the current architecture? */ 1021 if (!pd->all_ext 1022 && !riscv_multi_subset_supports (&pd->riscv_rps_dis, 1023 op->insn_class)) 1024 continue; 1025 1026 /* It's a match. */ 1027 (*info->fprintf_styled_func) (info->stream, dis_style_mnemonic, 1028 "%s", op->name); 1029 print_insn_args (op->args, word, memaddr, info); 1030 1031 /* Try to disassemble multi-instruction addressing sequences. */ 1032 if (pd->to_print_addr) 1033 { 1034 info->target = pd->print_addr; 1035 (*info->fprintf_styled_func) 1036 (info->stream, dis_style_comment_start, " # "); 1037 (*info->print_address_func) (info->target, info); 1038 pd->to_print_addr = false; 1039 } 1040 1041 /* Finish filling out insn_info fields. */ 1042 switch (op->pinfo & INSN_TYPE) 1043 { 1044 case INSN_BRANCH: 1045 info->insn_type = dis_branch; 1046 break; 1047 case INSN_CONDBRANCH: 1048 info->insn_type = dis_condbranch; 1049 break; 1050 case INSN_JSR: 1051 info->insn_type = dis_jsr; 1052 break; 1053 case INSN_DREF: 1054 info->insn_type = dis_dref; 1055 break; 1056 default: 1057 break; 1058 } 1059 1060 if (op->pinfo & INSN_DATA_SIZE) 1061 { 1062 int size = ((op->pinfo & INSN_DATA_SIZE) 1063 >> INSN_DATA_SIZE_SHIFT); 1064 info->data_size = 1 << (size - 1); 1065 } 1066 1067 return insnlen; 1068 } 1069 } 1070 1071 /* We did not find a match, so just print the instruction bits in 1072 the shape of an assembler .insn directive. */ 1073 info->insn_type = dis_noninsn; 1074 (*info->fprintf_styled_func) 1075 (info->stream, dis_style_assembler_directive, ".insn"); 1076 (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t"); 1077 (*info->fprintf_styled_func) (info->stream, dis_style_immediate, 1078 "%d", insnlen); 1079 (*info->fprintf_styled_func) (info->stream, dis_style_text, ", "); 1080 (*info->fprintf_styled_func) (info->stream, dis_style_immediate, "0x"); 1081 for (i = insnlen, printed = false; i >= 2; ) 1082 { 1083 i -= 2; 1084 word = bfd_get_bits (packet + i, 16, false); 1085 if (!word && !printed && i) 1086 continue; 1087 1088 (*info->fprintf_styled_func) (info->stream, dis_style_immediate, 1089 "%04x", (unsigned int) word); 1090 printed = true; 1091 } 1092 1093 return insnlen; 1094 } 1095 1096 /* Decide if we need to parse the architecture string again, also record the 1097 string into the current subset list. */ 1098 1099 static void 1100 riscv_dis_parse_subset (struct disassemble_info *info, const char *arch_new) 1101 { 1102 struct riscv_private_data *pd = info->private_data; 1103 const char *arch_subset_list = pd->riscv_rps_dis.subset_list->arch_str; 1104 if (arch_subset_list == NULL || strcmp (arch_subset_list, arch_new) != 0) 1105 { 1106 riscv_release_subset_list (pd->riscv_rps_dis.subset_list); 1107 riscv_parse_subset (&pd->riscv_rps_dis, arch_new); 1108 riscv_arch_str (pd->xlen, pd->riscv_rps_dis.subset_list, 1109 true/* update */); 1110 } 1111 } 1112 1113 /* If we find the suitable mapping symbol update the STATE. 1114 Otherwise, do nothing. */ 1115 1116 static void 1117 riscv_update_map_state (int n, 1118 enum riscv_seg_mstate *state, 1119 struct disassemble_info *info) 1120 { 1121 struct riscv_private_data *pd = info->private_data; 1122 const char *name; 1123 1124 /* If the symbol is in a different section, ignore it. */ 1125 if (info->section != NULL 1126 && info->section != info->symtab[n]->section) 1127 return; 1128 1129 name = bfd_asymbol_name(info->symtab[n]); 1130 if (strcmp (name, "$d") == 0) 1131 *state = MAP_DATA; 1132 else if (strcmp (name, "$x") == 0) 1133 { 1134 *state = MAP_INSN; 1135 riscv_dis_parse_subset (info, pd->default_arch); 1136 } 1137 else if (strncmp (name, "$xrv", 4) == 0) 1138 { 1139 *state = MAP_INSN; 1140 1141 /* ISA mapping string may be numbered, suffixed with '.n'. Do not 1142 consider this as part of the ISA string. */ 1143 char *suffix = strchr (name, '.'); 1144 if (suffix) 1145 { 1146 int suffix_index = (int)(suffix - name); 1147 char *name_substr = xmalloc (suffix_index + 1); 1148 strncpy (name_substr, name, suffix_index); 1149 name_substr[suffix_index] = '\0'; 1150 riscv_dis_parse_subset (info, name_substr + 2); 1151 free (name_substr); 1152 } 1153 else 1154 riscv_dis_parse_subset (info, name + 2); 1155 } 1156 } 1157 1158 /* Return true if we find the suitable mapping symbol. 1159 Otherwise, return false. */ 1160 1161 static bool 1162 riscv_is_valid_mapping_symbol (int n, 1163 struct disassemble_info *info) 1164 { 1165 const char *name; 1166 1167 /* If the symbol is in a different section, ignore it. */ 1168 if (info->section != NULL 1169 && info->section != info->symtab[n]->section) 1170 return false; 1171 1172 name = bfd_asymbol_name(info->symtab[n]); 1173 return riscv_elf_is_mapping_symbols (name); 1174 } 1175 1176 /* Check the sorted symbol table (sorted by the symbol value), find the 1177 suitable mapping symbols. */ 1178 1179 static enum riscv_seg_mstate 1180 riscv_search_mapping_symbol (bfd_vma memaddr, 1181 struct disassemble_info *info) 1182 { 1183 struct riscv_private_data *pd = info->private_data; 1184 enum riscv_seg_mstate mstate; 1185 bool from_last_map_symbol; 1186 bool found = false; 1187 int symbol = -1; 1188 int n; 1189 1190 /* Return the last map state if the address is still within the range of the 1191 last mapping symbol. */ 1192 if (pd->last_map_section == info->section 1193 && (memaddr < pd->last_map_symbol_boundary)) 1194 return pd->last_map_state; 1195 1196 pd->last_map_section = info->section; 1197 1198 /* Decide whether to print the data or instruction by default, in case 1199 we can not find the corresponding mapping symbols. */ 1200 mstate = MAP_DATA; 1201 if ((info->section 1202 && info->section->flags & SEC_CODE) 1203 || !info->section) 1204 mstate = MAP_INSN; 1205 1206 if (info->symtab_size == 0 1207 || bfd_asymbol_flavour (*info->symtab) != bfd_target_elf_flavour) 1208 return mstate; 1209 1210 /* Reset the last_map_symbol if we start to dump a new section. */ 1211 if (memaddr <= 0) 1212 pd->last_map_symbol = -1; 1213 1214 /* If the last stop offset is different from the current one, then 1215 don't use the last_map_symbol to search. We usually reset the 1216 info->stop_offset when handling a new section. */ 1217 from_last_map_symbol = (pd->last_map_symbol >= 0 1218 && info->stop_offset == pd->last_stop_offset); 1219 1220 /* Start scanning from wherever we finished last time, or the start 1221 of the function. */ 1222 n = from_last_map_symbol ? pd->last_map_symbol : info->symtab_pos + 1; 1223 1224 /* Find the suitable mapping symbol to dump. */ 1225 for (; n < info->symtab_size; n++) 1226 { 1227 bfd_vma addr = bfd_asymbol_value (info->symtab[n]); 1228 /* We have searched all possible symbols in the range. */ 1229 if (addr > memaddr) 1230 break; 1231 if (riscv_is_valid_mapping_symbol (n, info)) 1232 { 1233 symbol = n; 1234 found = true; 1235 /* Do not stop searching, in case there are some mapping 1236 symbols have the same value, but have different names. 1237 Use the last one. */ 1238 } 1239 } 1240 1241 /* We can not find the suitable mapping symbol above. Therefore, we 1242 look forwards and try to find it again, but don't go past the start 1243 of the section. Otherwise a data section without mapping symbols 1244 can pick up a text mapping symbol of a preceeding section. */ 1245 if (!found) 1246 { 1247 n = from_last_map_symbol ? pd->last_map_symbol : info->symtab_pos; 1248 1249 for (; n >= 0; n--) 1250 { 1251 bfd_vma addr = bfd_asymbol_value (info->symtab[n]); 1252 /* We have searched all possible symbols in the range. */ 1253 if (addr < (info->section ? info->section->vma : 0)) 1254 break; 1255 /* Stop searching once we find the closed mapping symbol. */ 1256 if (riscv_is_valid_mapping_symbol (n, info)) 1257 { 1258 symbol = n; 1259 found = true; 1260 break; 1261 } 1262 } 1263 } 1264 1265 if (found) 1266 { 1267 riscv_update_map_state (symbol, &mstate, info); 1268 1269 /* Find the next mapping symbol to determine the boundary of this mapping 1270 symbol. */ 1271 1272 bool found_next = false; 1273 /* Try to found next mapping symbol. */ 1274 for (n = symbol + 1; n < info->symtab_size; n++) 1275 { 1276 if (info->symtab[symbol]->section != info->symtab[n]->section) 1277 continue; 1278 1279 bfd_vma addr = bfd_asymbol_value (info->symtab[n]); 1280 const char *sym_name = bfd_asymbol_name(info->symtab[n]); 1281 if (sym_name[0] == '$' && (sym_name[1] == 'x' || sym_name[1] == 'd')) 1282 { 1283 /* The next mapping symbol has been found, and it represents the 1284 boundary of this mapping symbol. */ 1285 found_next = true; 1286 pd->last_map_symbol_boundary = addr; 1287 break; 1288 } 1289 } 1290 1291 /* No further mapping symbol has been found, indicating that the boundary 1292 of the current mapping symbol is the end of this section. */ 1293 if (!found_next) 1294 pd->last_map_symbol_boundary = info->section->vma 1295 + info->section->size; 1296 } 1297 1298 /* Save the information for next use. */ 1299 pd->last_map_symbol = symbol; 1300 pd->last_stop_offset = info->stop_offset; 1301 1302 return mstate; 1303 } 1304 1305 /* Decide which data size we should print. */ 1306 1307 static bfd_vma 1308 riscv_data_length (bfd_vma memaddr, 1309 disassemble_info *info) 1310 { 1311 struct riscv_private_data *pd = info->private_data; 1312 bfd_vma length; 1313 bool found = false; 1314 1315 length = 4; 1316 if (info->symtab_size != 0 1317 && bfd_asymbol_flavour (*info->symtab) == bfd_target_elf_flavour 1318 && pd->last_map_symbol >= 0) 1319 { 1320 int n; 1321 enum riscv_seg_mstate m = MAP_NONE; 1322 for (n = pd->last_map_symbol + 1; n < info->symtab_size; n++) 1323 { 1324 bfd_vma addr = bfd_asymbol_value (info->symtab[n]); 1325 if (addr > memaddr 1326 && riscv_is_valid_mapping_symbol (n, info)) 1327 { 1328 if (addr - memaddr < length) 1329 length = addr - memaddr; 1330 found = true; 1331 riscv_update_map_state (n, &m, info); 1332 break; 1333 } 1334 } 1335 } 1336 if (!found) 1337 { 1338 /* Do not set the length which exceeds the section size. */ 1339 bfd_vma offset = info->section->vma + info->section->size; 1340 offset -= memaddr; 1341 length = (offset < length) ? offset : length; 1342 } 1343 length = length == 3 ? 2 : length; 1344 return length; 1345 } 1346 1347 /* Dump the data contents. */ 1348 1349 static int 1350 riscv_disassemble_data (bfd_vma memaddr ATTRIBUTE_UNUSED, 1351 insn_t data, 1352 const bfd_byte *packet ATTRIBUTE_UNUSED, 1353 disassemble_info *info) 1354 { 1355 info->display_endian = info->endian; 1356 int i; 1357 1358 switch (info->bytes_per_chunk) 1359 { 1360 case 1: 1361 info->bytes_per_line = 6; 1362 (*info->fprintf_styled_func) 1363 (info->stream, dis_style_assembler_directive, ".byte"); 1364 (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t"); 1365 (*info->fprintf_styled_func) (info->stream, dis_style_immediate, 1366 "0x%02x", (unsigned)data); 1367 break; 1368 case 2: 1369 info->bytes_per_line = 8; 1370 (*info->fprintf_styled_func) 1371 (info->stream, dis_style_assembler_directive, ".short"); 1372 (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t"); 1373 (*info->fprintf_styled_func) 1374 (info->stream, dis_style_immediate, "0x%04x", (unsigned) data); 1375 break; 1376 case 4: 1377 info->bytes_per_line = 8; 1378 (*info->fprintf_styled_func) 1379 (info->stream, dis_style_assembler_directive, ".word"); 1380 (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t"); 1381 (*info->fprintf_styled_func) 1382 (info->stream, dis_style_immediate, "0x%08lx", 1383 (unsigned long) data); 1384 break; 1385 case 8: 1386 info->bytes_per_line = 8; 1387 (*info->fprintf_styled_func) 1388 (info->stream, dis_style_assembler_directive, ".dword"); 1389 (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t"); 1390 (*info->fprintf_styled_func) 1391 (info->stream, dis_style_immediate, "0x%016llx", 1392 (unsigned long long) data); 1393 break; 1394 default: 1395 /* Arbitrary data so just print the bits in the shape of an .<N>byte 1396 directive. */ 1397 info->bytes_per_line = info->bytes_per_chunk; 1398 (*info->fprintf_styled_func) 1399 (info->stream, dis_style_assembler_directive, ".%dbyte", info->bytes_per_chunk); 1400 (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t"); 1401 (*info->fprintf_styled_func) (info->stream, dis_style_immediate, "0x"); 1402 for (i = info->bytes_per_line; i > 0;) 1403 { 1404 i--; 1405 data = bfd_get_bits (packet + i, 8, false); 1406 (*info->fprintf_styled_func) 1407 (info->stream, dis_style_immediate, "%02x", 1408 (unsigned) data); 1409 } 1410 break; 1411 } 1412 return info->bytes_per_chunk; 1413 } 1414 1415 static bool 1416 riscv_init_disasm_info (struct disassemble_info *info) 1417 { 1418 int i; 1419 struct riscv_private_data *pd = 1420 xcalloc (1, sizeof (struct riscv_private_data)); 1421 pd->gp = 0; 1422 pd->print_addr = 0; 1423 for (i = 0; i < (int) ARRAY_SIZE (pd->hi_addr); i++) 1424 pd->hi_addr[i] = -1; 1425 pd->to_print_addr = false; 1426 1427 pd->has_gp = false; 1428 for (i = 0; i < info->symtab_size; i++) 1429 { 1430 asymbol *sym = info->symtab[i]; 1431 if (strcmp (bfd_asymbol_name (sym), RISCV_GP_SYMBOL) == 0) 1432 { 1433 pd->gp = bfd_asymbol_value (sym); 1434 pd->has_gp = true; 1435 } 1436 } 1437 1438 pd->xlen = 0; 1439 pd->default_isa_spec = ISA_SPEC_CLASS_DRAFT - 1; 1440 pd->default_priv_spec = PRIV_SPEC_CLASS_NONE; 1441 1442 pd->riscv_rps_dis.subset_list = xcalloc (1, sizeof (riscv_parse_subset_t)); 1443 pd->riscv_rps_dis.error_handler = opcodes_error_handler; 1444 pd->riscv_rps_dis.xlen = &pd->xlen; 1445 pd->riscv_rps_dis.isa_spec = &pd->default_isa_spec; 1446 pd->riscv_rps_dis.check_unknown_prefixed_ext = false; 1447 pd->default_arch = "rv64gc"; 1448 if (info->section != NULL) 1449 { 1450 bfd *abfd = info->section->owner; 1451 if (abfd && bfd_get_flavour (abfd) == bfd_target_elf_flavour) 1452 { 1453 const char *sec_name = 1454 get_elf_backend_data (abfd)->obj_attrs_section; 1455 if (bfd_get_section_by_name (abfd, sec_name) != NULL) 1456 { 1457 obj_attribute *attr = elf_known_obj_attributes_proc (abfd); 1458 unsigned int Tag_a = Tag_RISCV_priv_spec; 1459 unsigned int Tag_b = Tag_RISCV_priv_spec_minor; 1460 unsigned int Tag_c = Tag_RISCV_priv_spec_revision; 1461 riscv_get_priv_spec_class_from_numbers (attr[Tag_a].i, 1462 attr[Tag_b].i, 1463 attr[Tag_c].i, 1464 &pd->default_priv_spec); 1465 pd->default_arch = attr[Tag_RISCV_arch].s; 1466 } 1467 } 1468 } 1469 1470 pd->last_map_symbol = -1; 1471 pd->last_stop_offset = 0; 1472 pd->last_map_symbol_boundary = 0; 1473 pd->last_map_state = MAP_NONE; 1474 pd->last_map_section = NULL; 1475 pd->riscv_gpr_names = NULL; 1476 pd->riscv_fpr_names = NULL; 1477 pd->no_aliases = false; 1478 pd->all_ext = false; 1479 1480 info->private_data = pd; 1481 riscv_dis_parse_subset (info, pd->default_arch); 1482 return true; 1483 } 1484 1485 /* Fetch an instruction. If only a partial instruction is able to be fetched, 1486 return the number of accessible bytes. */ 1487 1488 static bfd_vma 1489 fetch_insn (bfd_vma memaddr, 1490 bfd_byte *packet, 1491 bfd_vma dump_size, 1492 struct disassemble_info *info, 1493 volatile int *status) 1494 { 1495 do 1496 { 1497 *status = (*info->read_memory_func) (memaddr, packet, dump_size, info); 1498 } 1499 while (*status != 0 && dump_size-- > 1); 1500 1501 return dump_size; 1502 } 1503 1504 int 1505 print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info) 1506 { 1507 bfd_byte packet[RISCV_MAX_INSN_LEN]; 1508 insn_t insn = 0; 1509 bfd_vma dump_size, bytes_fetched; 1510 int status; 1511 enum riscv_seg_mstate mstate; 1512 int (*riscv_disassembler) (bfd_vma, insn_t, const bfd_byte *, 1513 struct disassemble_info *); 1514 1515 if (info->private_data == NULL && !riscv_init_disasm_info (info)) 1516 return -1; 1517 1518 if (info->disassembler_options != NULL) 1519 { 1520 parse_riscv_dis_options (info->disassembler_options, info); 1521 /* Avoid repeatedly parsing the options. */ 1522 info->disassembler_options = NULL; 1523 } 1524 else if (((struct riscv_private_data *) info->private_data)->riscv_gpr_names == NULL) 1525 set_default_riscv_dis_options (info); 1526 1527 mstate = riscv_search_mapping_symbol (memaddr, info); 1528 /* Save the last mapping state. */ 1529 ((struct riscv_private_data *) info->private_data)->last_map_state = mstate; 1530 1531 /* Set the size to dump. */ 1532 if (mstate == MAP_DATA 1533 && (info->flags & DISASSEMBLE_DATA) == 0) 1534 { 1535 dump_size = riscv_data_length (memaddr, info); 1536 info->bytes_per_chunk = dump_size; 1537 riscv_disassembler = riscv_disassemble_data; 1538 } 1539 else 1540 { 1541 /* Get the first 2-bytes to check the lenghth of instruction. */ 1542 bytes_fetched = fetch_insn (memaddr, packet, 2, info, &status); 1543 if (status != 0) 1544 { 1545 (*info->memory_error_func) (status, memaddr, info); 1546 return -1; 1547 } 1548 else if (bytes_fetched != 2) 1549 { 1550 /* Only the first byte was able to be read. Dump the partial 1551 instruction. */ 1552 dump_size = bytes_fetched; 1553 info->bytes_per_chunk = dump_size; 1554 riscv_disassembler = riscv_disassemble_data; 1555 goto print; 1556 } 1557 insn = (insn_t) bfd_getl16 (packet); 1558 dump_size = riscv_insn_length (insn); 1559 riscv_disassembler = riscv_disassemble_insn; 1560 } 1561 1562 bytes_fetched = fetch_insn (memaddr, packet, dump_size, info, &status); 1563 1564 if (status != 0) 1565 { 1566 (*info->memory_error_func) (status, memaddr, info); 1567 return -1; 1568 } 1569 else if (bytes_fetched != dump_size) 1570 { 1571 dump_size = bytes_fetched; 1572 info->bytes_per_chunk = dump_size; 1573 riscv_disassembler = riscv_disassemble_data; 1574 } 1575 1576 print: 1577 1578 insn = (insn_t) bfd_get_bits (packet, dump_size * 8, false); 1579 1580 return (*riscv_disassembler) (memaddr, insn, packet, info); 1581 } 1582 1583 /* Prevent use of the fake labels that are generated as part of the DWARF 1584 and for relaxable relocations in the assembler. */ 1585 1586 bool 1587 riscv_symbol_is_valid (asymbol * sym, 1588 struct disassemble_info * info ATTRIBUTE_UNUSED) 1589 { 1590 const char * name; 1591 1592 if (sym == NULL) 1593 return false; 1594 1595 name = bfd_asymbol_name (sym); 1596 1597 return (strcmp (name, RISCV_FAKE_LABEL_NAME) != 0 1598 && !riscv_elf_is_mapping_symbols (name)); 1599 } 1600 1601 1603 /* Indices into option argument vector for options accepting an argument. 1604 Use RISCV_OPTION_ARG_NONE for options accepting no argument. */ 1605 1606 typedef enum 1607 { 1608 RISCV_OPTION_ARG_NONE = -1, 1609 RISCV_OPTION_ARG_PRIV_SPEC, 1610 1611 RISCV_OPTION_ARG_COUNT 1612 } riscv_option_arg_t; 1613 1614 /* Valid RISCV disassembler options. */ 1615 1616 static struct 1617 { 1618 const char *name; 1619 const char *description; 1620 riscv_option_arg_t arg; 1621 } riscv_options[] = 1622 { 1623 { "max", 1624 N_("Disassemble without checking architecture string."), 1625 RISCV_OPTION_ARG_NONE }, 1626 { "numeric", 1627 N_("Print numeric register names, rather than ABI names."), 1628 RISCV_OPTION_ARG_NONE }, 1629 { "no-aliases", 1630 N_("Disassemble only into canonical instructions."), 1631 RISCV_OPTION_ARG_NONE }, 1632 { "priv-spec=", 1633 N_("Print the CSR according to the chosen privilege spec."), 1634 RISCV_OPTION_ARG_PRIV_SPEC } 1635 }; 1636 1637 /* Build the structure representing valid RISCV disassembler options. 1638 This is done dynamically for maintenance ease purpose; a static 1639 initializer would be unreadable. */ 1640 1641 const disasm_options_and_args_t * 1642 disassembler_options_riscv (void) 1643 { 1644 static disasm_options_and_args_t *opts_and_args; 1645 1646 if (opts_and_args == NULL) 1647 { 1648 size_t num_options = ARRAY_SIZE (riscv_options); 1649 size_t num_args = RISCV_OPTION_ARG_COUNT; 1650 disasm_option_arg_t *args; 1651 disasm_options_t *opts; 1652 size_t i, priv_spec_count; 1653 1654 args = XNEWVEC (disasm_option_arg_t, num_args + 1); 1655 1656 args[RISCV_OPTION_ARG_PRIV_SPEC].name = "SPEC"; 1657 priv_spec_count = PRIV_SPEC_CLASS_DRAFT - PRIV_SPEC_EARLIEST; 1658 args[RISCV_OPTION_ARG_PRIV_SPEC].values 1659 = XNEWVEC (const char *, priv_spec_count + 1); 1660 for (i = 0; i < priv_spec_count; i++) 1661 args[RISCV_OPTION_ARG_PRIV_SPEC].values[i] 1662 = riscv_priv_specs[PRIV_SPEC_EARLIEST - PRIV_SPEC_CLASS_NONE - 1 + i].name; 1663 /* The array we return must be NULL terminated. */ 1664 args[RISCV_OPTION_ARG_PRIV_SPEC].values[i] = NULL; 1665 1666 /* The array we return must be NULL terminated. */ 1667 args[num_args].name = NULL; 1668 args[num_args].values = NULL; 1669 1670 opts_and_args = XNEW (disasm_options_and_args_t); 1671 opts_and_args->args = args; 1672 1673 opts = &opts_and_args->options; 1674 opts->name = XNEWVEC (const char *, num_options + 1); 1675 opts->description = XNEWVEC (const char *, num_options + 1); 1676 opts->arg = XNEWVEC (const disasm_option_arg_t *, num_options + 1); 1677 for (i = 0; i < num_options; i++) 1678 { 1679 opts->name[i] = riscv_options[i].name; 1680 opts->description[i] = _(riscv_options[i].description); 1681 if (riscv_options[i].arg != RISCV_OPTION_ARG_NONE) 1682 opts->arg[i] = &args[riscv_options[i].arg]; 1683 else 1684 opts->arg[i] = NULL; 1685 } 1686 /* The array we return must be NULL terminated. */ 1687 opts->name[i] = NULL; 1688 opts->description[i] = NULL; 1689 opts->arg[i] = NULL; 1690 } 1691 1692 return opts_and_args; 1693 } 1694 1695 void 1696 print_riscv_disassembler_options (FILE *stream) 1697 { 1698 const disasm_options_and_args_t *opts_and_args; 1699 const disasm_option_arg_t *args; 1700 const disasm_options_t *opts; 1701 size_t max_len = 0; 1702 size_t i; 1703 size_t j; 1704 1705 opts_and_args = disassembler_options_riscv (); 1706 opts = &opts_and_args->options; 1707 args = opts_and_args->args; 1708 1709 fprintf (stream, _("\n\ 1710 The following RISC-V specific disassembler options are supported for use\n\ 1711 with the -M switch (multiple options should be separated by commas):\n")); 1712 fprintf (stream, "\n"); 1713 1714 /* Compute the length of the longest option name. */ 1715 for (i = 0; opts->name[i] != NULL; i++) 1716 { 1717 size_t len = strlen (opts->name[i]); 1718 1719 if (opts->arg[i] != NULL) 1720 len += strlen (opts->arg[i]->name); 1721 if (max_len < len) 1722 max_len = len; 1723 } 1724 1725 for (i = 0, max_len++; opts->name[i] != NULL; i++) 1726 { 1727 fprintf (stream, " %s", opts->name[i]); 1728 if (opts->arg[i] != NULL) 1729 fprintf (stream, "%s", opts->arg[i]->name); 1730 if (opts->description[i] != NULL) 1731 { 1732 size_t len = strlen (opts->name[i]); 1733 1734 if (opts->arg != NULL && opts->arg[i] != NULL) 1735 len += strlen (opts->arg[i]->name); 1736 fprintf (stream, "%*c %s", (int) (max_len - len), ' ', 1737 opts->description[i]); 1738 } 1739 fprintf (stream, "\n"); 1740 } 1741 1742 for (i = 0; args[i].name != NULL; i++) 1743 { 1744 if (args[i].values == NULL) 1745 continue; 1746 fprintf (stream, _("\n\ 1747 For the options above, the following values are supported for \"%s\":\n "), 1748 args[i].name); 1749 for (j = 0; args[i].values[j] != NULL; j++) 1750 fprintf (stream, " %s", args[i].values[j]); 1751 fprintf (stream, _("\n")); 1752 } 1753 1754 fprintf (stream, _("\n")); 1755 } 1756 1757 void disassemble_free_riscv (struct disassemble_info *info ATTRIBUTE_UNUSED) 1758 { 1759 struct riscv_private_data *pd = info->private_data; 1760 if (pd) 1761 { 1762 riscv_release_subset_list (pd->riscv_rps_dis.subset_list); 1763 free (pd->riscv_rps_dis.subset_list); 1764 } 1765 } 1766
Indexes created Mon Mar 30 00:23:01 UTC 2026