s12z-opc.c revision 1.1
1 /* s12z-decode.c -- Freescale S12Z disassembly 2 Copyright (C) 2018-2020 Free Software Foundation, Inc. 3 4 This file is part of the GNU opcodes library. 5 6 This library is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 It is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 #include "sysdep.h" 22 #include <stdio.h> 23 #include <stdint.h> 24 #include <stdbool.h> 25 #include <assert.h> 26 27 #include "opcode/s12z.h" 28 29 #include "bfd.h" 30 31 #include "s12z-opc.h" 32 33 34 typedef int (* insn_bytes_f) (struct mem_read_abstraction_base *); 35 36 typedef void (*operands_f) (struct mem_read_abstraction_base *, 37 int *n_operands, struct operand **operand); 38 39 typedef enum optr (*discriminator_f) (struct mem_read_abstraction_base *, 40 enum optr hint); 41 42 enum OPR_MODE 43 { 44 OPR_IMMe4, 45 OPR_REG, 46 OPR_OFXYS, 47 OPR_XY_PRE_INC, 48 OPR_XY_POST_INC, 49 OPR_XY_PRE_DEC, 50 OPR_XY_POST_DEC, 51 OPR_S_PRE_DEC, 52 OPR_S_POST_INC, 53 OPR_REG_DIRECT, 54 OPR_REG_INDIRECT, 55 OPR_IDX_DIRECT, 56 OPR_IDX_INDIRECT, 57 OPR_EXT1, 58 OPR_IDX2_REG, 59 OPR_IDX3_DIRECT, 60 OPR_IDX3_INDIRECT, 61 62 OPR_EXT18, 63 OPR_IDX3_DIRECT_REG, 64 OPR_EXT3_DIRECT, 65 OPR_EXT3_INDIRECT 66 }; 67 68 struct opr_pb 69 { 70 uint8_t mask; 71 uint8_t value; 72 int n_operands; 73 enum OPR_MODE mode; 74 }; 75 76 static const struct opr_pb opr_pb[] = { 77 {0xF0, 0x70, 1, OPR_IMMe4}, 78 {0xF8, 0xB8, 1, OPR_REG}, 79 {0xC0, 0x40, 1, OPR_OFXYS}, 80 {0xEF, 0xE3, 1, OPR_XY_PRE_INC}, 81 {0xEF, 0xE7, 1, OPR_XY_POST_INC}, 82 {0xEF, 0xC3, 1, OPR_XY_PRE_DEC}, 83 {0xEF, 0xC7, 1, OPR_XY_POST_DEC}, 84 {0xFF, 0xFB, 1, OPR_S_PRE_DEC}, 85 {0xFF, 0xFF, 1, OPR_S_POST_INC}, 86 {0xC8, 0x88, 1, OPR_REG_DIRECT}, 87 {0xE8, 0xC8, 1, OPR_REG_INDIRECT}, 88 89 {0xCE, 0xC0, 2, OPR_IDX_DIRECT}, 90 {0xCE, 0xC4, 2, OPR_IDX_INDIRECT}, 91 {0xC0, 0x00, 2, OPR_EXT1}, 92 93 {0xC8, 0x80, 3, OPR_IDX2_REG}, 94 {0xFA, 0xF8, 3, OPR_EXT18}, 95 96 {0xCF, 0xC2, 4, OPR_IDX3_DIRECT}, 97 {0xCF, 0xC6, 4, OPR_IDX3_INDIRECT}, 98 99 {0xF8, 0xE8, 4, OPR_IDX3_DIRECT_REG}, 100 {0xFF, 0xFA, 4, OPR_EXT3_DIRECT}, 101 {0xFF, 0xFE, 4, OPR_EXT3_INDIRECT}, 102 }; 103 104 /* Return the number of bytes in a OPR operand, including the XB postbyte. 105 It does not include any preceeding opcodes. */ 106 static int 107 x_opr_n_bytes (struct mem_read_abstraction_base *mra, int offset) 108 { 109 bfd_byte xb; 110 int status = mra->read (mra, offset, 1, &xb); 111 if (status < 0) 112 return status; 113 114 size_t i; 115 for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i) 116 { 117 const struct opr_pb *pb = opr_pb + i; 118 if ((xb & pb->mask) == pb->value) 119 { 120 return pb->n_operands; 121 } 122 } 123 124 return 1; 125 } 126 127 static int 128 opr_n_bytes_p1 (struct mem_read_abstraction_base *mra) 129 { 130 return 1 + x_opr_n_bytes (mra, 0); 131 } 132 133 static int 134 opr_n_bytes2 (struct mem_read_abstraction_base *mra) 135 { 136 int s = x_opr_n_bytes (mra, 0); 137 s += x_opr_n_bytes (mra, s); 138 return s + 1; 139 } 140 141 enum BB_MODE 142 { 143 BB_REG_REG_REG, 144 BB_REG_REG_IMM, 145 BB_REG_OPR_REG, 146 BB_OPR_REG_REG, 147 BB_REG_OPR_IMM, 148 BB_OPR_REG_IMM 149 }; 150 151 struct opr_bb 152 { 153 uint8_t mask; 154 uint8_t value; 155 int n_operands; 156 bool opr; 157 enum BB_MODE mode; 158 }; 159 160 static const struct opr_bb bb_modes[] = 161 { 162 {0x60, 0x00, 2, false, BB_REG_REG_REG}, 163 {0x60, 0x20, 3, false, BB_REG_REG_IMM}, 164 {0x70, 0x40, 2, true, BB_REG_OPR_REG}, 165 {0x70, 0x50, 2, true, BB_OPR_REG_REG}, 166 {0x70, 0x60, 3, true, BB_REG_OPR_IMM}, 167 {0x70, 0x70, 3, true, BB_OPR_REG_IMM} 168 }; 169 170 static int 171 bfextins_n_bytes (struct mem_read_abstraction_base *mra) 172 { 173 bfd_byte bb; 174 int status = mra->read (mra, 0, 1, &bb); 175 if (status < 0) 176 return status; 177 178 size_t i; 179 const struct opr_bb *bbs = 0; 180 for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i) 181 { 182 bbs = bb_modes + i; 183 if ((bb & bbs->mask) == bbs->value) 184 { 185 break; 186 } 187 } 188 189 int n = bbs->n_operands; 190 if (bbs->opr) 191 n += x_opr_n_bytes (mra, n - 1); 192 193 return n; 194 } 195 196 static int 197 single (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 198 { 199 return 1; 200 } 201 202 static int 203 two (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 204 { 205 return 2; 206 } 207 208 static int 209 three (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 210 { 211 return 3; 212 } 213 214 static int 215 four (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 216 { 217 return 4; 218 } 219 220 static int 221 five (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED) 222 { 223 return 5; 224 } 225 226 static int 227 pcrel_15bit (struct mem_read_abstraction_base *mra) 228 { 229 bfd_byte byte; 230 int status = mra->read (mra, 0, 1, &byte); 231 if (status < 0) 232 return status; 233 return (byte & 0x80) ? 3 : 2; 234 } 235 236 237 238 static int 240 xysp_reg_from_postbyte (uint8_t postbyte) 241 { 242 int reg = -1; 243 switch ((postbyte & 0x30) >> 4) 244 { 245 case 0: 246 reg = REG_X; 247 break; 248 case 1: 249 reg = REG_Y; 250 break; 251 case 2: 252 reg = REG_S; 253 break; 254 default: 255 reg = REG_P; 256 } 257 return reg; 258 } 259 260 static struct operand * 261 create_immediate_operand (int value) 262 { 263 struct immediate_operand *op = malloc (sizeof (*op)); 264 265 ((struct operand *)op)->cl = OPND_CL_IMMEDIATE; 266 op->value = value; 267 ((struct operand *)op)->osize = -1; 268 269 return (struct operand *) op; 270 } 271 272 static struct operand * 273 create_bitfield_operand (int width, int offset) 274 { 275 struct bitfield_operand *op = malloc (sizeof (*op)); 276 277 ((struct operand *)op)->cl = OPND_CL_BIT_FIELD; 278 op->width = width; 279 op->offset = offset; 280 ((struct operand *)op)->osize = -1; 281 282 return (struct operand *) op; 283 } 284 285 static struct operand * 286 create_register_operand_with_size (int reg, short osize) 287 { 288 struct register_operand *op = malloc (sizeof (*op)); 289 290 ((struct operand *)op)->cl = OPND_CL_REGISTER; 291 op->reg = reg; 292 ((struct operand *)op)->osize = osize; 293 294 return (struct operand *) op; 295 } 296 297 static struct operand * 298 create_register_operand (int reg) 299 { 300 return create_register_operand_with_size (reg, -1); 301 } 302 303 static struct operand * 304 create_register_all_operand (void) 305 { 306 struct register_operand *op = malloc (sizeof (*op)); 307 308 ((struct operand *)op)->cl = OPND_CL_REGISTER_ALL; 309 ((struct operand *)op)->osize = -1; 310 311 return (struct operand *) op; 312 } 313 314 static struct operand * 315 create_register_all16_operand (void) 316 { 317 struct register_operand *op = malloc (sizeof (*op)); 318 319 ((struct operand *)op)->cl = OPND_CL_REGISTER_ALL16; 320 ((struct operand *)op)->osize = -1; 321 322 return (struct operand *) op; 323 } 324 325 326 static struct operand * 327 create_simple_memory_operand (bfd_vma addr, bfd_vma base, bool relative) 328 { 329 struct simple_memory_operand *op = malloc (sizeof (*op)); 330 331 ((struct operand *)op)->cl = OPND_CL_SIMPLE_MEMORY; 332 op->addr = addr; 333 op->base = base; 334 op->relative = relative; 335 ((struct operand *)op)->osize = -1; 336 337 assert (relative || base == 0); 338 339 return (struct operand *) op; 340 } 341 342 static struct operand * 343 create_memory_operand (bool indirect, int base, int n_regs, int reg0, int reg1) 344 { 345 struct memory_operand *op = malloc (sizeof (*op)); 346 347 ((struct operand *)op)->cl = OPND_CL_MEMORY; 348 op->indirect = indirect; 349 op->base_offset = base; 350 op->mutation = OPND_RM_NONE; 351 op->n_regs = n_regs; 352 op->regs[0] = reg0; 353 op->regs[1] = reg1; 354 ((struct operand *)op)->osize = -1; 355 356 return (struct operand *) op; 357 } 358 359 static struct operand * 360 create_memory_auto_operand (enum op_reg_mutation mutation, int reg) 361 { 362 struct memory_operand *op = malloc (sizeof (*op)); 363 364 ((struct operand *)op)->cl = OPND_CL_MEMORY; 365 op->indirect = false; 366 op->base_offset = 0; 367 op->mutation = mutation; 368 op->n_regs = 1; 369 op->regs[0] = reg; 370 op->regs[1] = -1; 371 ((struct operand *)op)->osize = -1; 372 373 return (struct operand *) op; 374 } 375 376 377 379 static void 380 z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands, 381 struct operand **operand) 382 { 383 uint8_t buffer[3]; 384 int status = mra->read (mra, 0, 3, buffer); 385 if (status < 0) 386 return; 387 388 int i; 389 uint32_t addr = 0; 390 for (i = 0; i < 3; ++i) 391 { 392 addr <<= 8; 393 addr |= buffer[i]; 394 } 395 396 operand[(*n_operands)++] = create_simple_memory_operand (addr, 0, false); 397 } 398 399 400 static uint32_t 401 z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset, 402 short size) 403 { 404 assert (size >0); 405 assert (size <= 4); 406 bfd_byte buffer[4]; 407 if (0 > mra->read (mra, offset, size, buffer)) 408 { 409 return 0; 410 } 411 412 int i; 413 uint32_t value = 0; 414 for (i = 0; i < size; ++i) 415 value = (value << 8) | buffer[i]; 416 417 if (buffer[0] & 0x80) 418 { 419 /* Deal with negative values */ 420 value -= 0x1UL << (size * 8); 421 } 422 return value; 423 } 424 425 static uint32_t 426 decode_signed_value (struct mem_read_abstraction_base *mra, short size) 427 { 428 return z_decode_signed_value (mra, 0, size); 429 } 430 431 static void 432 x_imm1 (struct mem_read_abstraction_base *mra, 433 int offset, 434 int *n_operands, struct operand **operand) 435 { 436 bfd_byte byte; 437 int status = mra->read (mra, offset, 1, &byte); 438 if (status < 0) 439 return; 440 441 operand[(*n_operands)++] = create_immediate_operand (byte); 442 } 443 444 /* An eight bit immediate operand. */ 445 static void 446 imm1_decode (struct mem_read_abstraction_base *mra, 447 int *n_operands, struct operand **operand) 448 { 449 x_imm1 (mra, 0, n_operands, operand); 450 } 451 452 static void 453 trap_decode (struct mem_read_abstraction_base *mra, 454 int *n_operands, struct operand **operand) 455 { 456 x_imm1 (mra, -1, n_operands, operand); 457 } 458 459 460 static struct operand * 461 x_opr_decode_with_size (struct mem_read_abstraction_base *mra, int offset, 462 short osize) 463 { 464 bfd_byte postbyte; 465 int status = mra->read (mra, offset, 1, &postbyte); 466 if (status < 0) 467 return NULL; 468 offset++; 469 470 enum OPR_MODE mode = -1; 471 size_t i; 472 for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i) 473 { 474 const struct opr_pb *pb = opr_pb + i; 475 if ((postbyte & pb->mask) == pb->value) 476 { 477 mode = pb->mode; 478 break; 479 } 480 } 481 482 struct operand *operand = NULL; 483 switch (mode) 484 { 485 case OPR_IMMe4: 486 { 487 int n; 488 uint8_t x = (postbyte & 0x0F); 489 if (x == 0) 490 n = -1; 491 else 492 n = x; 493 494 operand = create_immediate_operand (n); 495 break; 496 } 497 case OPR_REG: 498 { 499 uint8_t x = (postbyte & 0x07); 500 operand = create_register_operand (x); 501 break; 502 } 503 case OPR_OFXYS: 504 { 505 operand = create_memory_operand (false, postbyte & 0x0F, 1, 506 xysp_reg_from_postbyte (postbyte), -1); 507 break; 508 } 509 case OPR_REG_DIRECT: 510 { 511 operand = create_memory_operand (false, 0, 2, postbyte & 0x07, 512 xysp_reg_from_postbyte (postbyte)); 513 break; 514 } 515 case OPR_REG_INDIRECT: 516 { 517 operand = create_memory_operand (true, 0, 2, postbyte & 0x07, 518 (postbyte & 0x10) ? REG_Y : REG_X); 519 break; 520 } 521 522 case OPR_IDX_INDIRECT: 523 { 524 uint8_t x1; 525 mra->read (mra, offset, 1, &x1); 526 int idx = x1; 527 528 if (postbyte & 0x01) 529 { 530 /* Deal with negative values */ 531 idx -= 0x1UL << 8; 532 } 533 534 operand = create_memory_operand (true, idx, 1, 535 xysp_reg_from_postbyte (postbyte), -1); 536 break; 537 } 538 539 case OPR_IDX3_DIRECT: 540 { 541 uint8_t x[3]; 542 mra->read (mra, offset, 3, x); 543 int idx = x[0] << 16 | x[1] << 8 | x[2]; 544 545 if (x[0] & 0x80) 546 { 547 /* Deal with negative values */ 548 idx -= 0x1UL << 24; 549 } 550 551 operand = create_memory_operand (false, idx, 1, 552 xysp_reg_from_postbyte (postbyte), -1); 553 break; 554 } 555 556 case OPR_IDX3_DIRECT_REG: 557 { 558 uint8_t x[3]; 559 mra->read (mra, offset, 3, x); 560 int idx = x[0] << 16 | x[1] << 8 | x[2]; 561 562 if (x[0] & 0x80) 563 { 564 /* Deal with negative values */ 565 idx -= 0x1UL << 24; 566 } 567 568 operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1); 569 break; 570 } 571 572 case OPR_IDX3_INDIRECT: 573 { 574 uint8_t x[3]; 575 mra->read (mra, offset, 3, x); 576 int idx = x[0] << 16 | x[1] << 8 | x[2]; 577 578 if (x[0] & 0x80) 579 { 580 /* Deal with negative values */ 581 idx -= 0x1UL << 24; 582 } 583 584 operand = create_memory_operand (true, idx, 1, 585 xysp_reg_from_postbyte (postbyte), -1); 586 break; 587 } 588 589 case OPR_IDX_DIRECT: 590 { 591 uint8_t x1; 592 mra->read (mra, offset, 1, &x1); 593 int idx = x1; 594 595 if (postbyte & 0x01) 596 { 597 /* Deal with negative values */ 598 idx -= 0x1UL << 8; 599 } 600 601 operand = create_memory_operand (false, idx, 1, 602 xysp_reg_from_postbyte (postbyte), -1); 603 break; 604 } 605 606 case OPR_IDX2_REG: 607 { 608 uint8_t x[2]; 609 mra->read (mra, offset, 2, x); 610 uint32_t idx = x[1] | x[0] << 8 ; 611 idx |= (postbyte & 0x30) << 12; 612 613 operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1); 614 break; 615 } 616 617 case OPR_XY_PRE_INC: 618 { 619 operand = create_memory_auto_operand (OPND_RM_PRE_INC, 620 (postbyte & 0x10) ? REG_Y: REG_X); 621 break; 622 } 623 case OPR_XY_POST_INC: 624 { 625 operand = create_memory_auto_operand (OPND_RM_POST_INC, 626 (postbyte & 0x10) ? REG_Y: REG_X); 627 break; 628 } 629 case OPR_XY_PRE_DEC: 630 { 631 operand = create_memory_auto_operand (OPND_RM_PRE_DEC, 632 (postbyte & 0x10) ? REG_Y: REG_X); 633 break; 634 } 635 case OPR_XY_POST_DEC: 636 { 637 operand = create_memory_auto_operand (OPND_RM_POST_DEC, 638 (postbyte & 0x10) ? REG_Y: REG_X); 639 break; 640 } 641 case OPR_S_PRE_DEC: 642 { 643 operand = create_memory_auto_operand (OPND_RM_PRE_DEC, REG_S); 644 break; 645 } 646 case OPR_S_POST_INC: 647 { 648 operand = create_memory_auto_operand (OPND_RM_POST_INC, REG_S); 649 break; 650 } 651 652 case OPR_EXT18: 653 { 654 const size_t size = 2; 655 bfd_byte buffer[4]; 656 status = mra->read (mra, offset, size, buffer); 657 if (status < 0) 658 operand = NULL; 659 660 uint32_t ext18 = 0; 661 for (i = 0; i < size; ++i) 662 { 663 ext18 <<= 8; 664 ext18 |= buffer[i]; 665 } 666 667 ext18 |= (postbyte & 0x01) << 16; 668 ext18 |= (postbyte & 0x04) << 15; 669 670 operand = create_simple_memory_operand (ext18, 0, false); 671 break; 672 } 673 674 case OPR_EXT1: 675 { 676 uint8_t x1 = 0; 677 mra->read (mra, offset, 1, &x1); 678 int16_t addr; 679 addr = x1; 680 addr |= (postbyte & 0x3f) << 8; 681 682 operand = create_simple_memory_operand (addr, 0, false); 683 break; 684 } 685 686 case OPR_EXT3_DIRECT: 687 { 688 const size_t size = 3; 689 bfd_byte buffer[4]; 690 status = mra->read (mra, offset, size, buffer); 691 if (status < 0) 692 operand = NULL; 693 694 uint32_t ext24 = 0; 695 for (i = 0; i < size; ++i) 696 { 697 ext24 |= buffer[i] << (8 * (size - i - 1)); 698 } 699 700 operand = create_simple_memory_operand (ext24, 0, false); 701 break; 702 } 703 704 case OPR_EXT3_INDIRECT: 705 { 706 const size_t size = 3; 707 bfd_byte buffer[4]; 708 status = mra->read (mra, offset, size, buffer); 709 if (status < 0) 710 operand = NULL; 711 712 uint32_t ext24 = 0; 713 for (i = 0; i < size; ++i) 714 { 715 ext24 |= buffer[i] << (8 * (size - i - 1)); 716 } 717 718 operand = create_memory_operand (true, ext24, 0, -1, -1); 719 break; 720 } 721 722 default: 723 printf ("Unknown OPR mode #0x%x (%d)", postbyte, mode); 724 abort (); 725 } 726 727 operand->osize = osize; 728 729 return operand; 730 } 731 732 static struct operand * 733 x_opr_decode (struct mem_read_abstraction_base *mra, int offset) 734 { 735 return x_opr_decode_with_size (mra, offset, -1); 736 } 737 738 static void 739 z_opr_decode (struct mem_read_abstraction_base *mra, 740 int *n_operands, struct operand **operand) 741 { 742 operand[(*n_operands)++] = x_opr_decode (mra, 0); 743 } 744 745 static void 746 z_opr_decode2 (struct mem_read_abstraction_base *mra, 747 int *n_operands, struct operand **operand) 748 { 749 int n = x_opr_n_bytes (mra, 0); 750 751 operand[(*n_operands)++] = x_opr_decode (mra, 0); 752 operand[(*n_operands)++] = x_opr_decode (mra, n); 753 } 754 755 static void 756 imm1234 (struct mem_read_abstraction_base *mra, int base, 757 int *n_operands, struct operand **operand) 758 { 759 bfd_byte opcode; 760 int status = mra->read (mra, -1, 1, &opcode); 761 if (status < 0) 762 return; 763 764 opcode -= base; 765 766 int size = registers[opcode & 0xF].bytes; 767 768 uint32_t imm = decode_signed_value (mra, size); 769 770 operand[(*n_operands)++] = create_immediate_operand (imm); 771 } 772 773 774 /* Special case of LD and CMP with register S and IMM operand */ 775 static void 776 reg_s_imm (struct mem_read_abstraction_base *mra, int *n_operands, 777 struct operand **operand) 778 { 779 operand[(*n_operands)++] = create_register_operand (REG_S); 780 781 uint32_t imm = decode_signed_value (mra, 3); 782 operand[(*n_operands)++] = create_immediate_operand (imm); 783 } 784 785 /* Special case of LD, CMP and ST with register S and OPR operand */ 786 static void 787 reg_s_opr (struct mem_read_abstraction_base *mra, int *n_operands, 788 struct operand **operand) 789 { 790 operand[(*n_operands)++] = create_register_operand (REG_S); 791 operand[(*n_operands)++] = x_opr_decode (mra, 0); 792 } 793 794 static void 795 z_imm1234_8base (struct mem_read_abstraction_base *mra, int *n_operands, 796 struct operand **operand) 797 { 798 imm1234 (mra, 8, n_operands, operand); 799 } 800 801 static void 802 z_imm1234_0base (struct mem_read_abstraction_base *mra, int *n_operands, 803 struct operand **operand) 804 { 805 imm1234 (mra, 0, n_operands, operand); 806 } 807 808 809 static void 810 z_tfr (struct mem_read_abstraction_base *mra, int *n_operands, 811 struct operand **operand) 812 { 813 bfd_byte byte; 814 int status = mra->read (mra, 0, 1, &byte); 815 if (status < 0) 816 return; 817 818 operand[(*n_operands)++] = create_register_operand (byte >> 4); 819 operand[(*n_operands)++] = create_register_operand (byte & 0x0F); 820 } 821 822 static void 823 z_reg (struct mem_read_abstraction_base *mra, int *n_operands, 824 struct operand **operand) 825 { 826 bfd_byte byte; 827 int status = mra->read (mra, -1, 1, &byte); 828 if (status < 0) 829 return; 830 831 operand[(*n_operands)++] = create_register_operand (byte & 0x07); 832 } 833 834 835 static void 836 reg_xy (struct mem_read_abstraction_base *mra, 837 int *n_operands, struct operand **operand) 838 { 839 bfd_byte byte; 840 int status = mra->read (mra, -1, 1, &byte); 841 if (status < 0) 842 return; 843 844 operand[(*n_operands)++] = 845 create_register_operand ((byte & 0x01) ? REG_Y : REG_X); 846 } 847 848 static void 849 lea_reg_xys_opr (struct mem_read_abstraction_base *mra, 850 int *n_operands, struct operand **operand) 851 { 852 bfd_byte byte; 853 int status = mra->read (mra, -1, 1, &byte); 854 if (status < 0) 855 return; 856 857 int reg_xys = -1; 858 switch (byte & 0x03) 859 { 860 case 0x00: 861 reg_xys = REG_X; 862 break; 863 case 0x01: 864 reg_xys = REG_Y; 865 break; 866 case 0x02: 867 reg_xys = REG_S; 868 break; 869 } 870 871 operand[(*n_operands)++] = create_register_operand (reg_xys); 872 operand[(*n_operands)++] = x_opr_decode (mra, 0); 873 } 874 875 static void 876 lea_reg_xys (struct mem_read_abstraction_base *mra, 877 int *n_operands, struct operand **operand) 878 { 879 bfd_byte byte; 880 int status = mra->read (mra, -1, 1, &byte); 881 if (status < 0) 882 return; 883 884 int reg_n = -1; 885 switch (byte & 0x03) 886 { 887 case 0x00: 888 reg_n = REG_X; 889 break; 890 case 0x01: 891 reg_n = REG_Y; 892 break; 893 case 0x02: 894 reg_n = REG_S; 895 break; 896 } 897 898 status = mra->read (mra, 0, 1, &byte); 899 if (status < 0) 900 return; 901 902 operand[(*n_operands)++] = create_register_operand (reg_n); 903 operand[(*n_operands)++] = create_memory_operand (false, (int8_t) byte, 904 1, reg_n, -1); 905 } 906 907 908 /* PC Relative offsets of size 15 or 7 bits */ 909 static void 910 rel_15_7 (struct mem_read_abstraction_base *mra, int offset, 911 int *n_operands, struct operand **operands) 912 { 913 bfd_byte upper; 914 int status = mra->read (mra, offset - 1, 1, &upper); 915 if (status < 0) 916 return; 917 918 bool rel_size = (upper & 0x80); 919 920 int16_t addr = upper; 921 if (rel_size) 922 { 923 /* 15 bits. Get the next byte */ 924 bfd_byte lower; 925 status = mra->read (mra, offset, 1, &lower); 926 if (status < 0) 927 return; 928 929 addr <<= 8; 930 addr |= lower; 931 addr &= 0x7FFF; 932 933 bool negative = (addr & 0x4000); 934 addr &= 0x3FFF; 935 if (negative) 936 addr = addr - 0x4000; 937 } 938 else 939 { 940 /* 7 bits. */ 941 bool negative = (addr & 0x40); 942 addr &= 0x3F; 943 if (negative) 944 addr = addr - 0x40; 945 } 946 947 operands[(*n_operands)++] = 948 create_simple_memory_operand (addr, mra->posn (mra) - 1, true); 949 } 950 951 952 /* PC Relative offsets of size 15 or 7 bits */ 953 static void 954 decode_rel_15_7 (struct mem_read_abstraction_base *mra, 955 int *n_operands, struct operand **operand) 956 { 957 rel_15_7 (mra, 1, n_operands, operand); 958 } 959 960 static int shift_n_bytes (struct mem_read_abstraction_base *); 961 static int mov_imm_opr_n_bytes (struct mem_read_abstraction_base *); 962 static int loop_prim_n_bytes (struct mem_read_abstraction_base *); 963 static int bm_rel_n_bytes (struct mem_read_abstraction_base *); 964 static int mul_n_bytes (struct mem_read_abstraction_base *); 965 static int bm_n_bytes (struct mem_read_abstraction_base *); 966 967 static void psh_pul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 968 static void shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 969 static void mul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 970 static void bm_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 971 static void bm_rel_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 972 static void mov_imm_opr (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand); 973 static void loop_primitive_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); 974 static void bit_field_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); 975 static void exg_sex_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands); 976 977 978 static enum optr shift_discrim (struct mem_read_abstraction_base *mra, enum optr hint); 979 static enum optr psh_pul_discrim (struct mem_read_abstraction_base *mra, enum optr hint); 980 static enum optr mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint); 981 static enum optr loop_primitive_discrim (struct mem_read_abstraction_base *mra, enum optr hint); 982 static enum optr bit_field_discrim (struct mem_read_abstraction_base *mra, enum optr hint); 983 static enum optr exg_sex_discrim (struct mem_read_abstraction_base *mra, enum optr hint); 984 985 986 static void 987 cmp_xy (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, 988 int *n_operands, struct operand **operand) 989 { 990 operand[(*n_operands)++] = create_register_operand (REG_X); 991 operand[(*n_operands)++] = create_register_operand (REG_Y); 992 } 993 994 static void 995 sub_d6_x_y (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, 996 int *n_operands, struct operand **operand) 997 { 998 operand[(*n_operands)++] = create_register_operand (REG_D6); 999 operand[(*n_operands)++] = create_register_operand (REG_X); 1000 operand[(*n_operands)++] = create_register_operand (REG_Y); 1001 } 1002 1003 static void 1004 sub_d6_y_x (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED, 1005 int *n_operands, struct operand **operand) 1006 { 1007 operand[(*n_operands)++] = create_register_operand (REG_D6); 1008 operand[(*n_operands)++] = create_register_operand (REG_Y); 1009 operand[(*n_operands)++] = create_register_operand (REG_X); 1010 } 1011 1012 static void 1013 ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands, 1014 struct operand **operand); 1015 1016 static enum optr 1017 mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint) 1018 { 1019 uint8_t mb; 1020 int status = mra->read (mra, 0, 1, &mb); 1021 if (status < 0) 1022 return OP_INVALID; 1023 1024 bool signed_op = (mb & 0x80); 1025 1026 switch (hint) 1027 { 1028 case OPBASE_mul: 1029 return signed_op ? OP_muls : OP_mulu; 1030 break; 1031 case OPBASE_div: 1032 return signed_op ? OP_divs : OP_divu; 1033 break; 1034 case OPBASE_mod: 1035 return signed_op ? OP_mods : OP_modu; 1036 break; 1037 case OPBASE_mac: 1038 return signed_op ? OP_macs : OP_macu; 1039 break; 1040 case OPBASE_qmul: 1041 return signed_op ? OP_qmuls : OP_qmulu; 1042 break; 1043 default: 1044 abort (); 1045 } 1046 1047 return OP_INVALID; 1048 } 1049 1050 struct opcode 1051 { 1052 /* The operation that this opcode performs. */ 1053 enum optr operator; 1054 1055 /* The size of this operation. May be -1 if it is implied 1056 in the operands or if size is not applicable. */ 1057 short osize; 1058 1059 /* Some operations need this function to work out which operation 1060 is intended. */ 1061 discriminator_f discriminator; 1062 1063 /* A function returning the number of bytes in this instruction. */ 1064 insn_bytes_f insn_bytes; 1065 1066 operands_f operands; 1067 operands_f operands2; 1068 }; 1069 1070 static const struct opcode page2[] = 1071 { 1072 [0x00] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, 1073 [0x01] = {OP_st, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, 1074 [0x02] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_s_opr, 0}, 1075 [0x03] = {OP_ld, -1, 0, four, reg_s_imm, 0}, 1076 [0x04] = {OP_cmp, -1, 0, four, reg_s_imm, 0}, 1077 [0x05] = {OP_stop, -1, 0, single, 0, 0}, 1078 [0x06] = {OP_wai, -1, 0, single, 0, 0}, 1079 [0x07] = {OP_sys, -1, 0, single, 0, 0}, 1080 [0x08] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, /* BFEXT / BFINS */ 1081 [0x09] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1082 [0x0a] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1083 [0x0b] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1084 [0x0c] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1085 [0x0d] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1086 [0x0e] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1087 [0x0f] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, 1088 [0x10] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1089 [0x11] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1090 [0x12] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1091 [0x13] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1092 [0x14] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1093 [0x15] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1094 [0x16] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1095 [0x17] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1096 [0x18] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1097 [0x19] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1098 [0x1a] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1099 [0x1b] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1100 [0x1c] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1101 [0x1d] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1102 [0x1e] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1103 [0x1f] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1104 [0x20] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1105 [0x21] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1106 [0x22] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1107 [0x23] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1108 [0x24] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1109 [0x25] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1110 [0x26] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1111 [0x27] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1112 [0x28] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1113 [0x29] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1114 [0x2a] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1115 [0x2b] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1116 [0x2c] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1117 [0x2d] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1118 [0x2e] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1119 [0x2f] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1120 [0x30] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1121 [0x31] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1122 [0x32] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1123 [0x33] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1124 [0x34] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1125 [0x35] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1126 [0x36] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1127 [0x37] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1128 [0x38] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1129 [0x39] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1130 [0x3a] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1131 [0x3b] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1132 [0x3c] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1133 [0x3d] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1134 [0x3e] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1135 [0x3f] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1136 [0x40] = {OP_abs, -1, 0, single, z_reg, 0}, 1137 [0x41] = {OP_abs, -1, 0, single, z_reg, 0}, 1138 [0x42] = {OP_abs, -1, 0, single, z_reg, 0}, 1139 [0x43] = {OP_abs, -1, 0, single, z_reg, 0}, 1140 [0x44] = {OP_abs, -1, 0, single, z_reg, 0}, 1141 [0x45] = {OP_abs, -1, 0, single, z_reg, 0}, 1142 [0x46] = {OP_abs, -1, 0, single, z_reg, 0}, 1143 [0x47] = {OP_abs, -1, 0, single, z_reg, 0}, 1144 [0x48] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1145 [0x49] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1146 [0x4a] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1147 [0x4b] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1148 [0x4c] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1149 [0x4d] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1150 [0x4e] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1151 [0x4f] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1152 [0x50] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1153 [0x51] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1154 [0x52] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1155 [0x53] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base}, 1156 [0x54] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base}, 1157 [0x55] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base}, 1158 [0x56] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base}, 1159 [0x57] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base}, 1160 [0x58] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1161 [0x59] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1162 [0x5a] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1163 [0x5b] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base}, 1164 [0x5c] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base}, 1165 [0x5d] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base}, 1166 [0x5e] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base}, 1167 [0x5f] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base}, 1168 [0x60] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1169 [0x61] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1170 [0x62] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1171 [0x63] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1172 [0x64] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1173 [0x65] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1174 [0x66] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1175 [0x67] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1176 [0x68] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1177 [0x69] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1178 [0x6a] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1179 [0x6b] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1180 [0x6c] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1181 [0x6d] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1182 [0x6e] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1183 [0x6f] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1184 [0x70] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1185 [0x71] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1186 [0x72] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1187 [0x73] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base}, 1188 [0x74] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base}, 1189 [0x75] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base}, 1190 [0x76] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base}, 1191 [0x77] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base}, 1192 [0x78] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1193 [0x79] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1194 [0x7a] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1195 [0x7b] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base}, 1196 [0x7c] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base}, 1197 [0x7d] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base}, 1198 [0x7e] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base}, 1199 [0x7f] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base}, 1200 [0x80] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1201 [0x81] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1202 [0x82] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1203 [0x83] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1204 [0x84] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1205 [0x85] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1206 [0x86] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1207 [0x87] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1208 [0x88] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1209 [0x89] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1210 [0x8a] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1211 [0x8b] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1212 [0x8c] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1213 [0x8d] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1214 [0x8e] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1215 [0x8f] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1216 [0x90] = {OP_rti, -1, 0, single, 0, 0}, 1217 [0x91] = {OP_clb, -1, 0, two, z_tfr, 0}, 1218 [0x92] = {OP_trap, -1, 0, single, trap_decode, 0}, 1219 [0x93] = {OP_trap, -1, 0, single, trap_decode, 0}, 1220 [0x94] = {OP_trap, -1, 0, single, trap_decode, 0}, 1221 [0x95] = {OP_trap, -1, 0, single, trap_decode, 0}, 1222 [0x96] = {OP_trap, -1, 0, single, trap_decode, 0}, 1223 [0x97] = {OP_trap, -1, 0, single, trap_decode, 0}, 1224 [0x98] = {OP_trap, -1, 0, single, trap_decode, 0}, 1225 [0x99] = {OP_trap, -1, 0, single, trap_decode, 0}, 1226 [0x9a] = {OP_trap, -1, 0, single, trap_decode, 0}, 1227 [0x9b] = {OP_trap, -1, 0, single, trap_decode, 0}, 1228 [0x9c] = {OP_trap, -1, 0, single, trap_decode, 0}, 1229 [0x9d] = {OP_trap, -1, 0, single, trap_decode, 0}, 1230 [0x9e] = {OP_trap, -1, 0, single, trap_decode, 0}, 1231 [0x9f] = {OP_trap, -1, 0, single, trap_decode, 0}, 1232 [0xa0] = {OP_sat, -1, 0, single, z_reg, 0}, 1233 [0xa1] = {OP_sat, -1, 0, single, z_reg, 0}, 1234 [0xa2] = {OP_sat, -1, 0, single, z_reg, 0}, 1235 [0xa3] = {OP_sat, -1, 0, single, z_reg, 0}, 1236 [0xa4] = {OP_sat, -1, 0, single, z_reg, 0}, 1237 [0xa5] = {OP_sat, -1, 0, single, z_reg, 0}, 1238 [0xa6] = {OP_sat, -1, 0, single, z_reg, 0}, 1239 [0xa7] = {OP_sat, -1, 0, single, z_reg, 0}, 1240 [0xa8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1241 [0xa9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1242 [0xaa] = {OP_trap, -1, 0, single, trap_decode, 0}, 1243 [0xab] = {OP_trap, -1, 0, single, trap_decode, 0}, 1244 [0xac] = {OP_trap, -1, 0, single, trap_decode, 0}, 1245 [0xad] = {OP_trap, -1, 0, single, trap_decode, 0}, 1246 [0xae] = {OP_trap, -1, 0, single, trap_decode, 0}, 1247 [0xaf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1248 [0xb0] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1249 [0xb1] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1250 [0xb2] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1251 [0xb3] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1252 [0xb4] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1253 [0xb5] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1254 [0xb6] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1255 [0xb7] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1256 [0xb8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1257 [0xb9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1258 [0xba] = {OP_trap, -1, 0, single, trap_decode, 0}, 1259 [0xbb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1260 [0xbc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1261 [0xbd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1262 [0xbe] = {OP_trap, -1, 0, single, trap_decode, 0}, 1263 [0xbf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1264 [0xc0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1265 [0xc1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1266 [0xc2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1267 [0xc3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1268 [0xc4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1269 [0xc5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1270 [0xc6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1271 [0xc7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1272 [0xc8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1273 [0xc9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1274 [0xca] = {OP_trap, -1, 0, single, trap_decode, 0}, 1275 [0xcb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1276 [0xcc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1277 [0xcd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1278 [0xce] = {OP_trap, -1, 0, single, trap_decode, 0}, 1279 [0xcf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1280 [0xd0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1281 [0xd1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1282 [0xd2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1283 [0xd3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1284 [0xd4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1285 [0xd5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1286 [0xd6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1287 [0xd7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1288 [0xd8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1289 [0xd9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1290 [0xda] = {OP_trap, -1, 0, single, trap_decode, 0}, 1291 [0xdb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1292 [0xdc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1293 [0xdd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1294 [0xde] = {OP_trap, -1, 0, single, trap_decode, 0}, 1295 [0xdf] = {OP_trap, -1, 0, single, trap_decode, 0}, 1296 [0xe0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1297 [0xe1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1298 [0xe2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1299 [0xe3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1300 [0xe4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1301 [0xe5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1302 [0xe6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1303 [0xe7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1304 [0xe8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1305 [0xe9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1306 [0xea] = {OP_trap, -1, 0, single, trap_decode, 0}, 1307 [0xeb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1308 [0xec] = {OP_trap, -1, 0, single, trap_decode, 0}, 1309 [0xed] = {OP_trap, -1, 0, single, trap_decode, 0}, 1310 [0xee] = {OP_trap, -1, 0, single, trap_decode, 0}, 1311 [0xef] = {OP_trap, -1, 0, single, trap_decode, 0}, 1312 [0xf0] = {OP_trap, -1, 0, single, trap_decode, 0}, 1313 [0xf1] = {OP_trap, -1, 0, single, trap_decode, 0}, 1314 [0xf2] = {OP_trap, -1, 0, single, trap_decode, 0}, 1315 [0xf3] = {OP_trap, -1, 0, single, trap_decode, 0}, 1316 [0xf4] = {OP_trap, -1, 0, single, trap_decode, 0}, 1317 [0xf5] = {OP_trap, -1, 0, single, trap_decode, 0}, 1318 [0xf6] = {OP_trap, -1, 0, single, trap_decode, 0}, 1319 [0xf7] = {OP_trap, -1, 0, single, trap_decode, 0}, 1320 [0xf8] = {OP_trap, -1, 0, single, trap_decode, 0}, 1321 [0xf9] = {OP_trap, -1, 0, single, trap_decode, 0}, 1322 [0xfa] = {OP_trap, -1, 0, single, trap_decode, 0}, 1323 [0xfb] = {OP_trap, -1, 0, single, trap_decode, 0}, 1324 [0xfc] = {OP_trap, -1, 0, single, trap_decode, 0}, 1325 [0xfd] = {OP_trap, -1, 0, single, trap_decode, 0}, 1326 [0xfe] = {OP_trap, -1, 0, single, trap_decode, 0}, 1327 [0xff] = {OP_trap, -1, 0, single, trap_decode, 0}, 1328 }; 1329 1330 static const struct opcode page1[] = 1331 { 1332 [0x00] = {OP_bgnd, -1, 0, single, 0, 0}, 1333 [0x01] = {OP_nop, -1, 0, single, 0, 0}, 1334 [0x02] = {OP_brclr, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0}, 1335 [0x03] = {OP_brset, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0}, 1336 [0x04] = {0xFFFF, -1, psh_pul_discrim, two, psh_pul_decode, 0}, /* psh/pul */ 1337 [0x05] = {OP_rts, -1, 0, single, 0, 0}, 1338 [0x06] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1339 [0x07] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1340 [0x08] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, 1341 [0x09] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, 1342 [0x0a] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0}, 1343 [0x0b] = {0xFFFF, -1, loop_primitive_discrim, loop_prim_n_bytes, loop_primitive_decode, 0}, /* Loop primitives TBcc / DBcc */ 1344 [0x0c] = {OP_mov, 0, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1345 [0x0d] = {OP_mov, 1, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1346 [0x0e] = {OP_mov, 2, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1347 [0x0f] = {OP_mov, 3, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0}, 1348 [0x10] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, /* lsr/lsl/asl/asr/rol/ror */ 1349 [0x11] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1350 [0x12] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1351 [0x13] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1352 [0x14] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1353 [0x15] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1354 [0x16] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1355 [0x17] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, 1356 [0x18] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, 1357 [0x19] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, 1358 [0x1a] = {OP_lea, -1, 0, two, lea_reg_xys, NULL}, 1359 /* 0x1b PG2 */ 1360 [0x1c] = {OP_mov, 0, 0, opr_n_bytes2, z_opr_decode2, 0}, 1361 [0x1d] = {OP_mov, 1, 0, opr_n_bytes2, z_opr_decode2, 0}, 1362 [0x1e] = {OP_mov, 2, 0, opr_n_bytes2, z_opr_decode2, 0}, 1363 [0x1f] = {OP_mov, 3, 0, opr_n_bytes2, z_opr_decode2, 0}, 1364 [0x20] = {OP_bra, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1365 [0x21] = {OP_bsr, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1366 [0x22] = {OP_bhi, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1367 [0x23] = {OP_bls, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1368 [0x24] = {OP_bcc, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1369 [0x25] = {OP_bcs, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1370 [0x26] = {OP_bne, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1371 [0x27] = {OP_beq, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1372 [0x28] = {OP_bvc, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1373 [0x29] = {OP_bvs, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1374 [0x2a] = {OP_bpl, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1375 [0x2b] = {OP_bmi, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1376 [0x2c] = {OP_bge, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1377 [0x2d] = {OP_blt, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1378 [0x2e] = {OP_bgt, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1379 [0x2f] = {OP_ble, -1, 0, pcrel_15bit, decode_rel_15_7, 0}, 1380 [0x30] = {OP_inc, -1, 0, single, z_reg, 0}, 1381 [0x31] = {OP_inc, -1, 0, single, z_reg, 0}, 1382 [0x32] = {OP_inc, -1, 0, single, z_reg, 0}, 1383 [0x33] = {OP_inc, -1, 0, single, z_reg, 0}, 1384 [0x34] = {OP_inc, -1, 0, single, z_reg, 0}, 1385 [0x35] = {OP_inc, -1, 0, single, z_reg, 0}, 1386 [0x36] = {OP_inc, -1, 0, single, z_reg, 0}, 1387 [0x37] = {OP_inc, -1, 0, single, z_reg, 0}, 1388 [0x38] = {OP_clr, -1, 0, single, z_reg, 0}, 1389 [0x39] = {OP_clr, -1, 0, single, z_reg, 0}, 1390 [0x3a] = {OP_clr, -1, 0, single, z_reg, 0}, 1391 [0x3b] = {OP_clr, -1, 0, single, z_reg, 0}, 1392 [0x3c] = {OP_clr, -1, 0, single, z_reg, 0}, 1393 [0x3d] = {OP_clr, -1, 0, single, z_reg, 0}, 1394 [0x3e] = {OP_clr, -1, 0, single, z_reg, 0}, 1395 [0x3f] = {OP_clr, -1, 0, single, z_reg, 0}, 1396 [0x40] = {OP_dec, -1, 0, single, z_reg, 0}, 1397 [0x41] = {OP_dec, -1, 0, single, z_reg, 0}, 1398 [0x42] = {OP_dec, -1, 0, single, z_reg, 0}, 1399 [0x43] = {OP_dec, -1, 0, single, z_reg, 0}, 1400 [0x44] = {OP_dec, -1, 0, single, z_reg, 0}, 1401 [0x45] = {OP_dec, -1, 0, single, z_reg, 0}, 1402 [0x46] = {OP_dec, -1, 0, single, z_reg, 0}, 1403 [0x47] = {OP_dec, -1, 0, single, z_reg, 0}, 1404 [0x48] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1405 [0x49] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1406 [0x4a] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1407 [0x4b] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1408 [0x4c] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1409 [0x4d] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1410 [0x4e] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1411 [0x4f] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0}, 1412 [0x50] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1413 [0x51] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1414 [0x52] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1415 [0x53] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base}, 1416 [0x54] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base}, 1417 [0x55] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base}, 1418 [0x56] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base}, 1419 [0x57] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base}, 1420 [0x58] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1421 [0x59] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1422 [0x5a] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1423 [0x5b] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base}, 1424 [0x5c] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base}, 1425 [0x5d] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base}, 1426 [0x5e] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base}, 1427 [0x5f] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base}, 1428 [0x60] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1429 [0x61] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1430 [0x62] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1431 [0x63] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1432 [0x64] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1433 [0x65] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1434 [0x66] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1435 [0x67] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1436 [0x68] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1437 [0x69] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1438 [0x6a] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1439 [0x6b] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1440 [0x6c] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1441 [0x6d] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1442 [0x6e] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1443 [0x6f] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1444 [0x70] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1445 [0x71] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1446 [0x72] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1447 [0x73] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base}, 1448 [0x74] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base}, 1449 [0x75] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base}, 1450 [0x76] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base}, 1451 [0x77] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base}, 1452 [0x78] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1453 [0x79] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1454 [0x7a] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1455 [0x7b] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base}, 1456 [0x7c] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base}, 1457 [0x7d] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base}, 1458 [0x7e] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base}, 1459 [0x7f] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base}, 1460 [0x80] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1461 [0x81] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1462 [0x82] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1463 [0x83] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1464 [0x84] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1465 [0x85] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1466 [0x86] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1467 [0x87] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1468 [0x88] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1469 [0x89] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1470 [0x8a] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1471 [0x8b] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1472 [0x8c] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1473 [0x8d] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1474 [0x8e] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1475 [0x8f] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1476 [0x90] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1477 [0x91] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1478 [0x92] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1479 [0x93] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base}, 1480 [0x94] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base}, 1481 [0x95] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base}, 1482 [0x96] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base}, 1483 [0x97] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base}, 1484 [0x98] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base}, 1485 [0x99] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base}, 1486 [0x9a] = {OP_clr, -1, 0, single, reg_xy, 0}, 1487 [0x9b] = {OP_clr, -1, 0, single, reg_xy, 0}, 1488 [0x9c] = {OP_inc, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1489 [0x9d] = {OP_inc, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1490 [0x9e] = {OP_tfr, -1, 0, two, z_tfr, NULL}, 1491 [0x9f] = {OP_inc, 3, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1492 [0xa0] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1493 [0xa1] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1494 [0xa2] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1495 [0xa3] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1496 [0xa4] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1497 [0xa5] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1498 [0xa6] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1499 [0xa7] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1500 [0xa8] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1501 [0xa9] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1502 [0xaa] = {OP_jmp, -1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1503 [0xab] = {OP_jsr, -1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1504 [0xac] = {OP_dec, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1505 [0xad] = {OP_dec, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1506 [0xae] = {0xFFFF, -1, exg_sex_discrim, two, exg_sex_decode, 0}, /* EXG / SEX */ 1507 [0xaf] = {OP_dec, 3, 0, opr_n_bytes_p1, 0, z_opr_decode}, 1508 [0xb0] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1509 [0xb1] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1510 [0xb2] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1511 [0xb3] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1512 [0xb4] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1513 [0xb5] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1514 [0xb6] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1515 [0xb7] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode}, 1516 [0xb8] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode}, 1517 [0xb9] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode}, 1518 [0xba] = {OP_jmp, -1, 0, four, z_ext24_decode, 0}, 1519 [0xbb] = {OP_jsr, -1, 0, four, z_ext24_decode, 0}, 1520 [0xbc] = {OP_clr, 0, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1521 [0xbd] = {OP_clr, 1, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1522 [0xbe] = {OP_clr, 2, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1523 [0xbf] = {OP_clr, 3, 0, opr_n_bytes_p1, z_opr_decode, 0}, 1524 [0xc0] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1525 [0xc1] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1526 [0xc2] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1527 [0xc3] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1528 [0xc4] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1529 [0xc5] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1530 [0xc6] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1531 [0xc7] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1532 [0xc8] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1533 [0xc9] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1534 [0xca] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1535 [0xcb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1536 [0xcc] = {OP_com, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1537 [0xcd] = {OP_com, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1538 [0xce] = {OP_andcc, -1, 0, two, imm1_decode, 0}, 1539 [0xcf] = {OP_com, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1540 [0xd0] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1541 [0xd1] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1542 [0xd2] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1543 [0xd3] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1544 [0xd4] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1545 [0xd5] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1546 [0xd6] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1547 [0xd7] = {OP_st, -1, 0, four, z_reg, z_ext24_decode}, 1548 [0xd8] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode}, 1549 [0xd9] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode}, 1550 [0xda] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1551 [0xdb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1552 [0xdc] = {OP_neg, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1553 [0xdd] = {OP_neg, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1554 [0xde] = {OP_orcc, -1, 0, two, imm1_decode, 0}, 1555 [0xdf] = {OP_neg, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode}, 1556 [0xe0] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1557 [0xe1] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1558 [0xe2] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1559 [0xe3] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base}, 1560 [0xe4] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base}, 1561 [0xe5] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base}, 1562 [0xe6] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base}, 1563 [0xe7] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base}, 1564 [0xe8] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base}, 1565 [0xe9] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base}, 1566 [0xea] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1567 [0xeb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1568 [0xec] = {OP_bclr, -1, 0, bm_n_bytes, bm_decode, 0}, 1569 [0xed] = {OP_bset, -1, 0, bm_n_bytes, bm_decode, 0}, 1570 [0xee] = {OP_btgl, -1, 0, bm_n_bytes, bm_decode, 0}, 1571 [0xef] = {OP_INVALID, -1, 0, NULL, NULL, NULL}, /* SPARE */ 1572 [0xf0] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1573 [0xf1] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1574 [0xf2] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1575 [0xf3] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1576 [0xf4] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1577 [0xf5] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1578 [0xf6] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1579 [0xf7] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode}, 1580 [0xf8] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1581 [0xf9] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode}, 1582 [0xfa] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1583 [0xfb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode}, 1584 [0xfc] = {OP_cmp, -1, 0, single, cmp_xy, 0}, 1585 [0xfd] = {OP_sub, -1, 0, single, sub_d6_x_y, 0}, 1586 [0xfe] = {OP_sub, -1, 0, single, sub_d6_y_x, 0}, 1587 [0xff] = {OP_swi, -1, 0, single, 0, 0} 1588 }; 1589 1590 static const int oprregs1[] = 1591 { 1592 REG_D3, REG_D2, REG_D1, REG_D0, REG_CCL, REG_CCH 1593 }; 1594 1595 static const int oprregs2[] = 1596 { 1597 REG_Y, REG_X, REG_D7, REG_D6, REG_D5, REG_D4 1598 }; 1599 1600 1601 1602 1604 enum MUL_MODE 1605 { 1606 MUL_REG_REG, 1607 MUL_REG_OPR, 1608 MUL_REG_IMM, 1609 MUL_OPR_OPR 1610 }; 1611 1612 struct mb 1613 { 1614 uint8_t mask; 1615 uint8_t value; 1616 enum MUL_MODE mode; 1617 }; 1618 1619 static const struct mb mul_table[] = { 1620 {0x40, 0x00, MUL_REG_REG}, 1621 1622 {0x47, 0x40, MUL_REG_OPR}, 1623 {0x47, 0x41, MUL_REG_OPR}, 1624 {0x47, 0x43, MUL_REG_OPR}, 1625 1626 {0x47, 0x44, MUL_REG_IMM}, 1627 {0x47, 0x45, MUL_REG_IMM}, 1628 {0x47, 0x47, MUL_REG_IMM}, 1629 1630 {0x43, 0x42, MUL_OPR_OPR}, 1631 }; 1632 1633 1634 static void 1635 mul_decode (struct mem_read_abstraction_base *mra, 1636 int *n_operands, struct operand **operand) 1637 { 1638 uint8_t mb; 1639 int status = mra->read (mra, 0, 1, &mb); 1640 if (status < 0) 1641 return; 1642 1643 uint8_t byte; 1644 status = mra->read (mra, -1, 1, &byte); 1645 if (status < 0) 1646 return; 1647 1648 enum MUL_MODE mode = -1; 1649 size_t i; 1650 for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i) 1651 { 1652 const struct mb *mm = mul_table + i; 1653 if ((mb & mm->mask) == mm->value) 1654 { 1655 mode = mm->mode; 1656 break; 1657 } 1658 } 1659 operand[(*n_operands)++] = create_register_operand (byte & 0x07); 1660 1661 switch (mode) 1662 { 1663 case MUL_REG_IMM: 1664 { 1665 int size = (mb & 0x3); 1666 operand[(*n_operands)++] = 1667 create_register_operand_with_size ((mb & 0x38) >> 3, size); 1668 uint32_t imm = z_decode_signed_value (mra, 1, size + 1); 1669 operand[(*n_operands)++] = create_immediate_operand (imm); 1670 } 1671 break; 1672 case MUL_REG_REG: 1673 operand[(*n_operands)++] = create_register_operand ((mb & 0x38) >> 3); 1674 operand[(*n_operands)++] = create_register_operand (mb & 0x07); 1675 break; 1676 case MUL_REG_OPR: 1677 operand[(*n_operands)++] = create_register_operand ((mb & 0x38) >> 3); 1678 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, mb & 0x3); 1679 break; 1680 case MUL_OPR_OPR: 1681 { 1682 int first = x_opr_n_bytes (mra, 1); 1683 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1684 (mb & 0x30) >> 4); 1685 operand[(*n_operands)++] = x_opr_decode_with_size (mra, first + 1, 1686 (mb & 0x0c) >> 2); 1687 break; 1688 } 1689 } 1690 } 1691 1692 1693 static int 1694 mul_n_bytes (struct mem_read_abstraction_base *mra) 1695 { 1696 int nx = 2; 1697 uint8_t mb; 1698 int status = mra->read (mra, 0, 1, &mb); 1699 if (status < 0) 1700 return 0; 1701 1702 enum MUL_MODE mode = -1; 1703 size_t i; 1704 for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i) 1705 { 1706 const struct mb *mm = mul_table + i; 1707 if ((mb & mm->mask) == mm->value) 1708 { 1709 mode = mm->mode; 1710 break; 1711 } 1712 } 1713 1714 int size = (mb & 0x3) + 1; 1715 1716 switch (mode) 1717 { 1718 case MUL_REG_IMM: 1719 nx += size; 1720 break; 1721 case MUL_REG_REG: 1722 break; 1723 case MUL_REG_OPR: 1724 nx += x_opr_n_bytes (mra, 1); 1725 break; 1726 case MUL_OPR_OPR: 1727 { 1728 int first = x_opr_n_bytes (mra, nx - 1); 1729 nx += first; 1730 int second = x_opr_n_bytes (mra, nx - 1); 1731 nx += second; 1732 } 1733 break; 1734 } 1735 1736 return nx; 1737 } 1738 1739 1740 /* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1, 1742 and contains obvious typos. 1743 However the Freescale tools and experiments with the chip itself 1744 seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG 1745 respectively. */ 1746 1747 enum BM_MODE 1748 { 1749 BM_REG_IMM, 1750 BM_RESERVED0, 1751 BM_OPR_B, 1752 BM_OPR_W, 1753 BM_OPR_L, 1754 BM_OPR_REG, 1755 BM_RESERVED1 1756 }; 1757 1758 struct bm 1759 { 1760 uint8_t mask; 1761 uint8_t value; 1762 enum BM_MODE mode; 1763 }; 1764 1765 static const struct bm bm_table[] = { 1766 { 0xC6, 0x04, BM_REG_IMM}, 1767 { 0x84, 0x00, BM_REG_IMM}, 1768 { 0x06, 0x06, BM_REG_IMM}, 1769 { 0xC6, 0x44, BM_RESERVED0}, 1770 // 00 1771 { 0x8F, 0x80, BM_OPR_B}, 1772 { 0x8E, 0x82, BM_OPR_W}, 1773 { 0x8C, 0x88, BM_OPR_L}, 1774 1775 { 0x83, 0x81, BM_OPR_REG}, 1776 { 0x87, 0x84, BM_RESERVED1}, 1777 }; 1778 1779 static void 1780 bm_decode (struct mem_read_abstraction_base *mra, 1781 int *n_operands, struct operand **operand) 1782 { 1783 uint8_t bm; 1784 int status = mra->read (mra, 0, 1, &bm); 1785 if (status < 0) 1786 return; 1787 1788 size_t i; 1789 enum BM_MODE mode = -1; 1790 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) 1791 { 1792 const struct bm *bme = bm_table + i; 1793 if ((bm & bme->mask) == bme->value) 1794 { 1795 mode = bme->mode; 1796 break; 1797 } 1798 } 1799 1800 switch (mode) 1801 { 1802 case BM_REG_IMM: 1803 case BM_RESERVED0: 1804 operand[(*n_operands)++] = create_register_operand (bm & 0x07); 1805 break; 1806 case BM_OPR_B: 1807 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 0); 1808 break; 1809 case BM_OPR_W: 1810 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1); 1811 break; 1812 case BM_OPR_L: 1813 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 3); 1814 break; 1815 case BM_OPR_REG: 1816 case BM_RESERVED1: 1817 { 1818 uint8_t xb; 1819 mra->read (mra, 1, 1, &xb); 1820 /* Don't emit a size suffix for register operands */ 1821 if ((xb & 0xF8) != 0xB8) 1822 operand[(*n_operands)++] = 1823 x_opr_decode_with_size (mra, 1, (bm & 0x0c) >> 2); 1824 else 1825 operand[(*n_operands)++] = x_opr_decode (mra, 1); 1826 } 1827 break; 1828 } 1829 1830 uint8_t imm = 0; 1831 switch (mode) 1832 { 1833 case BM_REG_IMM: 1834 case BM_RESERVED0: 1835 imm = (bm & 0x38) >> 3; 1836 operand[(*n_operands)++] = create_immediate_operand (imm); 1837 break; 1838 case BM_OPR_L: 1839 imm |= (bm & 0x03) << 3; 1840 /* fallthrough */ 1841 case BM_OPR_W: 1842 imm |= (bm & 0x01) << 3; 1843 /* fallthrough */ 1844 case BM_OPR_B: 1845 imm |= (bm & 0x70) >> 4; 1846 operand[(*n_operands)++] = create_immediate_operand (imm); 1847 break; 1848 case BM_OPR_REG: 1849 case BM_RESERVED1: 1850 operand[(*n_operands)++] = create_register_operand ((bm & 0x70) >> 4); 1851 break; 1852 } 1853 } 1854 1855 1856 static void 1857 bm_rel_decode (struct mem_read_abstraction_base *mra, 1858 int *n_operands, struct operand **operand) 1859 { 1860 uint8_t bm; 1861 int status = mra->read (mra, 0, 1, &bm); 1862 if (status < 0) 1863 return; 1864 1865 size_t i; 1866 enum BM_MODE mode = -1; 1867 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) 1868 { 1869 const struct bm *bme = bm_table + i; 1870 if ((bm & bme->mask) == bme->value) 1871 { 1872 mode = bme->mode; 1873 break; 1874 } 1875 } 1876 1877 int n = 1; 1878 switch (mode) 1879 { 1880 case BM_REG_IMM: 1881 case BM_RESERVED0: 1882 operand[(*n_operands)++] = create_register_operand (bm & 0x07); 1883 break; 1884 case BM_OPR_B: 1885 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 0); 1886 n = 1 + x_opr_n_bytes (mra, 1); 1887 break; 1888 case BM_OPR_W: 1889 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1); 1890 n = 1 + x_opr_n_bytes (mra, 1); 1891 break; 1892 case BM_OPR_L: 1893 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 3); 1894 n = 1 + x_opr_n_bytes (mra, 1); 1895 break; 1896 case BM_OPR_REG: 1897 case BM_RESERVED1: 1898 { 1899 uint8_t xb; 1900 mra->read (mra, +1, 1, &xb); 1901 /* Don't emit a size suffix for register operands */ 1902 if ((xb & 0xF8) != 0xB8) 1903 { 1904 short os = (bm & 0x0c) >> 2; 1905 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, os); 1906 } 1907 else 1908 operand[(*n_operands)++] = x_opr_decode (mra, 1); 1909 1910 } 1911 break; 1912 } 1913 1914 int imm = 0; 1915 switch (mode) 1916 { 1917 case BM_OPR_L: 1918 imm |= (bm & 0x02) << 3; 1919 /* fall through */ 1920 case BM_OPR_W: 1921 imm |= (bm & 0x01) << 3; 1922 /* fall through */ 1923 case BM_OPR_B: 1924 imm |= (bm & 0x70) >> 4; 1925 operand[(*n_operands)++] = create_immediate_operand (imm); 1926 break; 1927 case BM_RESERVED0: 1928 imm = (bm & 0x38) >> 3; 1929 operand[(*n_operands)++] = create_immediate_operand (imm); 1930 break; 1931 case BM_REG_IMM: 1932 imm = (bm & 0xF8) >> 3; 1933 operand[(*n_operands)++] = create_immediate_operand (imm); 1934 break; 1935 case BM_OPR_REG: 1936 case BM_RESERVED1: 1937 operand[(*n_operands)++] = create_register_operand ((bm & 0x70) >> 4); 1938 n += x_opr_n_bytes (mra, 1); 1939 break; 1940 } 1941 1942 rel_15_7 (mra, n + 1, n_operands, operand); 1943 } 1944 1945 static int 1946 bm_n_bytes (struct mem_read_abstraction_base *mra) 1947 { 1948 uint8_t bm; 1949 int status = mra->read (mra, 0, 1, &bm); 1950 if (status < 0) 1951 return status; 1952 1953 size_t i; 1954 enum BM_MODE mode = -1; 1955 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i) 1956 { 1957 const struct bm *bme = bm_table + i; 1958 if ((bm & bme->mask) == bme->value) 1959 { 1960 mode = bme->mode; 1961 break; 1962 } 1963 } 1964 1965 int n = 2; 1966 switch (mode) 1967 { 1968 case BM_REG_IMM: 1969 case BM_RESERVED0: 1970 break; 1971 1972 case BM_OPR_B: 1973 case BM_OPR_W: 1974 case BM_OPR_L: 1975 n += x_opr_n_bytes (mra, 1); 1976 break; 1977 case BM_OPR_REG: 1978 case BM_RESERVED1: 1979 n += x_opr_n_bytes (mra, 1); 1980 break; 1981 } 1982 1983 return n; 1984 } 1985 1986 static int 1987 bm_rel_n_bytes (struct mem_read_abstraction_base *mra) 1988 { 1989 int n = 1 + bm_n_bytes (mra); 1990 1991 bfd_byte rb; 1992 int status = mra->read (mra, n - 2, 1, &rb); 1993 if (status != 0) 1994 return status; 1995 1996 if (rb & 0x80) 1997 n++; 1998 1999 return n; 2000 } 2001 2002 2003 2004 2006 2007 /* shift direction */ 2008 enum SB_DIR 2009 { 2010 SB_LEFT, 2011 SB_RIGHT 2012 }; 2013 2014 enum SB_TYPE 2015 { 2016 SB_ARITHMETIC, 2017 SB_LOGICAL 2018 }; 2019 2020 2021 enum SB_MODE 2022 { 2023 SB_REG_REG_N_EFF, 2024 SB_REG_REG_N, 2025 SB_REG_OPR_EFF, 2026 SB_ROT, 2027 SB_REG_OPR_OPR, 2028 SB_OPR_N 2029 }; 2030 2031 struct sb 2032 { 2033 uint8_t mask; 2034 uint8_t value; 2035 enum SB_MODE mode; 2036 }; 2037 2038 static const struct sb sb_table[] = { 2039 {0x30, 0x00, SB_REG_REG_N_EFF}, 2040 {0x30, 0x10, SB_REG_REG_N}, 2041 {0x34, 0x20, SB_REG_OPR_EFF}, 2042 {0x34, 0x24, SB_ROT}, 2043 {0x34, 0x30, SB_REG_OPR_OPR}, 2044 {0x34, 0x34, SB_OPR_N}, 2045 }; 2046 2047 static int 2048 shift_n_bytes (struct mem_read_abstraction_base *mra) 2049 { 2050 bfd_byte sb; 2051 int status = mra->read (mra, 0, 1, &sb); 2052 if (status != 0) 2053 return status; 2054 2055 size_t i; 2056 enum SB_MODE mode = -1; 2057 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) 2058 { 2059 const struct sb *sbe = sb_table + i; 2060 if ((sb & sbe->mask) == sbe->value) 2061 mode = sbe->mode; 2062 } 2063 2064 switch (mode) 2065 { 2066 case SB_REG_REG_N_EFF: 2067 return 2; 2068 break; 2069 case SB_REG_OPR_EFF: 2070 case SB_ROT: 2071 return 2 + x_opr_n_bytes (mra, 1); 2072 break; 2073 case SB_REG_OPR_OPR: 2074 { 2075 int opr1 = x_opr_n_bytes (mra, 1); 2076 int opr2 = 0; 2077 if ((sb & 0x30) != 0x20) 2078 opr2 = x_opr_n_bytes (mra, opr1 + 1); 2079 return 2 + opr1 + opr2; 2080 } 2081 break; 2082 default: 2083 return 3; 2084 } 2085 2086 /* not reached */ 2087 return -1; 2088 } 2089 2090 2092 static int 2093 2094 mov_imm_opr_n_bytes (struct mem_read_abstraction_base *mra) 2095 { 2096 bfd_byte byte; 2097 int status = mra->read (mra, -1, 1, &byte); 2098 if (status < 0) 2099 return status; 2100 2101 int size = byte - 0x0c + 1; 2102 2103 return size + x_opr_n_bytes (mra, size) + 1; 2104 } 2105 2106 static void 2107 mov_imm_opr (struct mem_read_abstraction_base *mra, 2108 int *n_operands, struct operand **operand) 2109 { 2110 bfd_byte byte; 2111 int status = mra->read (mra, -1, 1, &byte); 2112 if (status < 0) 2113 return ; 2114 2115 int size = byte - 0x0c + 1; 2116 uint32_t imm = decode_signed_value (mra, size); 2117 2118 operand[(*n_operands)++] = create_immediate_operand (imm); 2119 operand[(*n_operands)++] = x_opr_decode (mra, size); 2120 } 2121 2122 2123 2125 static void 2126 ld_18bit_decode (struct mem_read_abstraction_base *mra, 2127 int *n_operands, struct operand **operand) 2128 { 2129 size_t size = 3; 2130 bfd_byte buffer[3]; 2131 int status = mra->read (mra, 0, 2, buffer + 1); 2132 if (status < 0) 2133 return ; 2134 2135 status = mra->read (mra, -1, 1, buffer); 2136 if (status < 0) 2137 return ; 2138 2139 buffer[0] = (buffer[0] & 0x30) >> 4; 2140 2141 size_t i; 2142 uint32_t imm = 0; 2143 for (i = 0; i < size; ++i) 2144 { 2145 imm |= buffer[i] << (8 * (size - i - 1)); 2146 } 2147 2148 operand[(*n_operands)++] = create_immediate_operand (imm); 2149 } 2150 2151 2152 2154 /* Loop Primitives */ 2155 2156 enum LP_MODE { 2157 LP_REG, 2158 LP_XY, 2159 LP_OPR 2160 }; 2161 2162 struct lp 2163 { 2164 uint8_t mask; 2165 uint8_t value; 2166 enum LP_MODE mode; 2167 }; 2168 2169 static const struct lp lp_mode[] = { 2170 {0x08, 0x00, LP_REG}, 2171 {0x0C, 0x08, LP_XY}, 2172 {0x0C, 0x0C, LP_OPR}, 2173 }; 2174 2175 2176 static int 2177 loop_prim_n_bytes (struct mem_read_abstraction_base *mra) 2178 { 2179 int mx = 0; 2180 uint8_t lb; 2181 mra->read (mra, mx++, 1, &lb); 2182 2183 enum LP_MODE mode = -1; 2184 size_t i; 2185 for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i) 2186 { 2187 const struct lp *pb = lp_mode + i; 2188 if ((lb & pb->mask) == pb->value) 2189 { 2190 mode = pb->mode; 2191 break; 2192 } 2193 } 2194 2195 if (mode == LP_OPR) 2196 { 2197 mx += x_opr_n_bytes (mra, mx) ; 2198 } 2199 2200 uint8_t rb; 2201 mra->read (mra, mx++, 1, &rb); 2202 if (rb & 0x80) 2203 mx++; 2204 2205 return mx + 1; 2206 } 2207 2208 2209 2210 2212 static enum optr 2213 exg_sex_discrim (struct mem_read_abstraction_base *mra, 2214 enum optr hint ATTRIBUTE_UNUSED) 2215 { 2216 uint8_t eb; 2217 int status = mra->read (mra, 0, 1, &eb); 2218 enum optr operator = OP_INVALID; 2219 if (status < 0) 2220 return operator; 2221 2222 struct operand *op0 = create_register_operand ((eb & 0xf0) >> 4); 2223 struct operand *op1 = create_register_operand (eb & 0xf); 2224 2225 int reg0 = ((struct register_operand *) op0)->reg; 2226 int reg1 = ((struct register_operand *) op1)->reg; 2227 if (reg0 >= 0 && reg0 < S12Z_N_REGISTERS 2228 && reg1 >= 0 && reg1 < S12Z_N_REGISTERS) 2229 { 2230 const struct reg *r0 = registers + reg0; 2231 const struct reg *r1 = registers + reg1; 2232 2233 operator = r0->bytes < r1->bytes ? OP_sex : OP_exg; 2234 } 2235 2236 free (op0); 2237 free (op1); 2238 2239 return operator; 2240 } 2241 2242 2243 static void 2244 exg_sex_decode (struct mem_read_abstraction_base *mra, 2245 int *n_operands, struct operand **operands) 2246 { 2247 uint8_t eb; 2248 int status = mra->read (mra, 0, 1, &eb); 2249 if (status < 0) 2250 return; 2251 2252 /* Ship out the operands. */ 2253 operands[(*n_operands)++] = create_register_operand ((eb & 0xf0) >> 4); 2254 operands[(*n_operands)++] = create_register_operand (eb & 0xf); 2255 } 2256 2257 static enum optr 2258 loop_primitive_discrim (struct mem_read_abstraction_base *mra, 2259 enum optr hint ATTRIBUTE_UNUSED) 2260 { 2261 uint8_t lb; 2262 int status = mra->read (mra, 0, 1, &lb); 2263 if (status < 0) 2264 return OP_INVALID; 2265 2266 enum optr opbase = (lb & 0x80) ? OP_dbNE : OP_tbNE; 2267 return opbase + ((lb & 0x70) >> 4); 2268 } 2269 2270 static void 2271 loop_primitive_decode (struct mem_read_abstraction_base *mra, 2272 int *n_operands, struct operand **operands) 2273 { 2274 int offs = 1; 2275 uint8_t lb; 2276 int status = mra->read (mra, 0, 1, &lb); 2277 if (status < 0) 2278 return ; 2279 2280 enum LP_MODE mode = -1; 2281 size_t i; 2282 for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i) 2283 { 2284 const struct lp *pb = lp_mode + i; 2285 if ((lb & pb->mask) == pb->value) 2286 { 2287 mode = pb->mode; 2288 break; 2289 } 2290 } 2291 2292 switch (mode) 2293 { 2294 case LP_REG: 2295 operands[(*n_operands)++] = create_register_operand (lb & 0x07); 2296 break; 2297 case LP_XY: 2298 operands[(*n_operands)++] = 2299 create_register_operand ((lb & 0x01) + REG_X); 2300 break; 2301 case LP_OPR: 2302 offs += x_opr_n_bytes (mra, 1); 2303 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, lb & 0x03); 2304 break; 2305 } 2306 2307 rel_15_7 (mra, offs + 1, n_operands, operands); 2308 } 2309 2310 2311 static enum optr 2312 shift_discrim (struct mem_read_abstraction_base *mra, 2313 enum optr hint ATTRIBUTE_UNUSED) 2314 { 2315 size_t i; 2316 uint8_t sb; 2317 int status = mra->read (mra, 0, 1, &sb); 2318 if (status < 0) 2319 return OP_INVALID; 2320 2321 enum SB_DIR dir = (sb & 0x40) ? SB_LEFT : SB_RIGHT; 2322 enum SB_TYPE type = (sb & 0x80) ? SB_ARITHMETIC : SB_LOGICAL; 2323 enum SB_MODE mode = -1; 2324 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) 2325 { 2326 const struct sb *sbe = sb_table + i; 2327 if ((sb & sbe->mask) == sbe->value) 2328 mode = sbe->mode; 2329 } 2330 2331 if (mode == SB_ROT) 2332 return (dir == SB_LEFT) ? OP_rol : OP_ror; 2333 2334 if (type == SB_LOGICAL) 2335 return (dir == SB_LEFT) ? OP_lsl : OP_lsr; 2336 2337 return (dir == SB_LEFT) ? OP_asl : OP_asr; 2338 } 2339 2340 2341 static void 2342 shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, 2343 struct operand **operands) 2344 { 2345 size_t i; 2346 2347 uint8_t byte; 2348 int status = mra->read (mra, -1, 1, &byte); 2349 if (status < 0) 2350 return ; 2351 2352 uint8_t sb; 2353 status = mra->read (mra, 0, 1, &sb); 2354 if (status < 0) 2355 return ; 2356 2357 enum SB_MODE mode = -1; 2358 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i) 2359 { 2360 const struct sb *sbe = sb_table + i; 2361 if ((sb & sbe->mask) == sbe->value) 2362 mode = sbe->mode; 2363 } 2364 2365 short osize = -1; 2366 switch (mode) 2367 { 2368 case SB_REG_OPR_EFF: 2369 case SB_ROT: 2370 case SB_REG_OPR_OPR: 2371 osize = sb & 0x03; 2372 break; 2373 case SB_OPR_N: 2374 { 2375 uint8_t xb; 2376 mra->read (mra, 1, 1, &xb); 2377 /* The size suffix is not printed if the OPR operand refers 2378 directly to a register, because the size is implied by the 2379 size of that register. */ 2380 if ((xb & 0xF8) != 0xB8) 2381 osize = sb & 0x03; 2382 } 2383 break; 2384 default: 2385 break; 2386 }; 2387 2388 /* Destination register */ 2389 switch (mode) 2390 { 2391 case SB_REG_REG_N_EFF: 2392 case SB_REG_REG_N: 2393 operands[(*n_operands)++] = create_register_operand (byte & 0x07); 2394 break; 2395 case SB_REG_OPR_EFF: 2396 case SB_REG_OPR_OPR: 2397 operands[(*n_operands)++] = create_register_operand (byte & 0x07); 2398 break; 2399 2400 case SB_ROT: 2401 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize); 2402 break; 2403 2404 default: 2405 break; 2406 } 2407 2408 /* Source register */ 2409 switch (mode) 2410 { 2411 case SB_REG_REG_N_EFF: 2412 case SB_REG_REG_N: 2413 operands[(*n_operands)++] = 2414 create_register_operand_with_size (sb & 0x07, osize); 2415 break; 2416 2417 case SB_REG_OPR_OPR: 2418 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize); 2419 break; 2420 2421 default: 2422 break; 2423 } 2424 2425 /* 3rd arg */ 2426 switch (mode) 2427 { 2428 case SB_REG_OPR_EFF: 2429 case SB_OPR_N: 2430 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize); 2431 break; 2432 2433 case SB_REG_REG_N: 2434 { 2435 uint8_t xb; 2436 mra->read (mra, 1, 1, &xb); 2437 2438 /* This case is slightly unusual. 2439 If XB matches the binary pattern 0111XXXX, then instead of 2440 interpreting this as a general OPR postbyte in the IMMe4 mode, 2441 the XB byte is interpreted in s special way. */ 2442 if ((xb & 0xF0) == 0x70) 2443 { 2444 if (byte & 0x10) 2445 { 2446 int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1); 2447 operands[(*n_operands)++] = create_immediate_operand (shift); 2448 } 2449 else 2450 { 2451 /* This should not happen. */ 2452 abort (); 2453 } 2454 } 2455 else 2456 { 2457 operands[(*n_operands)++] = x_opr_decode (mra, 1); 2458 } 2459 } 2460 break; 2461 case SB_REG_OPR_OPR: 2462 { 2463 uint8_t xb; 2464 int n = x_opr_n_bytes (mra, 1); 2465 mra->read (mra, 1 + n, 1, &xb); 2466 2467 if ((xb & 0xF0) == 0x70) 2468 { 2469 int imm = xb & 0x0F; 2470 imm <<= 1; 2471 imm |= (sb & 0x08) >> 3; 2472 operands[(*n_operands)++] = create_immediate_operand (imm); 2473 } 2474 else 2475 { 2476 operands[(*n_operands)++] = x_opr_decode (mra, 1 + n); 2477 } 2478 } 2479 break; 2480 default: 2481 break; 2482 } 2483 2484 switch (mode) 2485 { 2486 case SB_REG_REG_N_EFF: 2487 case SB_REG_OPR_EFF: 2488 case SB_OPR_N: 2489 { 2490 int imm = (sb & 0x08) ? 2 : 1; 2491 operands[(*n_operands)++] = create_immediate_operand (imm); 2492 } 2493 break; 2494 2495 default: 2496 break; 2497 } 2498 } 2499 2500 static enum optr 2501 psh_pul_discrim (struct mem_read_abstraction_base *mra, 2502 enum optr hint ATTRIBUTE_UNUSED) 2503 { 2504 uint8_t byte; 2505 int status = mra->read (mra, 0, 1, &byte); 2506 if (status != 0) 2507 return OP_INVALID; 2508 2509 return (byte & 0x80) ? OP_pull: OP_push; 2510 } 2511 2512 2513 static void 2514 psh_pul_decode (struct mem_read_abstraction_base *mra, 2515 int *n_operands, struct operand **operand) 2516 { 2517 uint8_t byte; 2518 int status = mra->read (mra, 0, 1, &byte); 2519 if (status != 0) 2520 return; 2521 int bit; 2522 if (byte & 0x40) 2523 { 2524 if ((byte & 0x3F) == 0) 2525 operand[(*n_operands)++] = create_register_all16_operand (); 2526 else 2527 for (bit = 5; bit >= 0; --bit) 2528 { 2529 if (byte & (0x1 << bit)) 2530 { 2531 operand[(*n_operands)++] = create_register_operand (oprregs2[bit]); 2532 } 2533 } 2534 } 2535 else 2536 { 2537 if ((byte & 0x3F) == 0) 2538 operand[(*n_operands)++] = create_register_all_operand (); 2539 else 2540 for (bit = 5; bit >= 0; --bit) 2541 { 2542 if (byte & (0x1 << bit)) 2543 { 2544 operand[(*n_operands)++] = create_register_operand (oprregs1[bit]); 2545 } 2546 } 2547 } 2548 } 2549 2550 static enum optr 2551 bit_field_discrim (struct mem_read_abstraction_base *mra, 2552 enum optr hint ATTRIBUTE_UNUSED) 2553 { 2554 int status; 2555 bfd_byte bb; 2556 status = mra->read (mra, 0, 1, &bb); 2557 if (status != 0) 2558 return OP_INVALID; 2559 2560 return (bb & 0x80) ? OP_bfins : OP_bfext; 2561 } 2562 2563 static void 2564 bit_field_decode (struct mem_read_abstraction_base *mra, 2565 int *n_operands, struct operand **operands) 2566 { 2567 int status; 2568 2569 bfd_byte byte2; 2570 status = mra->read (mra, -1, 1, &byte2); 2571 if (status != 0) 2572 return; 2573 2574 bfd_byte bb; 2575 status = mra->read (mra, 0, 1, &bb); 2576 if (status != 0) 2577 return; 2578 2579 enum BB_MODE mode = -1; 2580 size_t i; 2581 const struct opr_bb *bbs = 0; 2582 for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i) 2583 { 2584 bbs = bb_modes + i; 2585 if ((bb & bbs->mask) == bbs->value) 2586 { 2587 mode = bbs->mode; 2588 break; 2589 } 2590 } 2591 int reg1 = byte2 & 0x07; 2592 /* First operand */ 2593 switch (mode) 2594 { 2595 case BB_REG_REG_REG: 2596 case BB_REG_REG_IMM: 2597 case BB_REG_OPR_REG: 2598 case BB_REG_OPR_IMM: 2599 operands[(*n_operands)++] = create_register_operand (reg1); 2600 break; 2601 case BB_OPR_REG_REG: 2602 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 2603 (bb >> 2) & 0x03); 2604 break; 2605 case BB_OPR_REG_IMM: 2606 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 2, 2607 (bb >> 2) & 0x03); 2608 break; 2609 } 2610 2611 /* Second operand */ 2612 switch (mode) 2613 { 2614 case BB_REG_REG_REG: 2615 case BB_REG_REG_IMM: 2616 { 2617 int reg_src = (bb >> 2) & 0x07; 2618 operands[(*n_operands)++] = create_register_operand (reg_src); 2619 } 2620 break; 2621 case BB_OPR_REG_REG: 2622 case BB_OPR_REG_IMM: 2623 { 2624 int reg_src = (byte2 & 0x07); 2625 operands[(*n_operands)++] = create_register_operand (reg_src); 2626 } 2627 break; 2628 case BB_REG_OPR_REG: 2629 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 2630 (bb >> 2) & 0x03); 2631 break; 2632 case BB_REG_OPR_IMM: 2633 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 2, 2634 (bb >> 2) & 0x03); 2635 break; 2636 } 2637 2638 /* Third operand */ 2639 switch (mode) 2640 { 2641 case BB_REG_REG_REG: 2642 case BB_OPR_REG_REG: 2643 case BB_REG_OPR_REG: 2644 { 2645 int reg_parm = bb & 0x03; 2646 operands[(*n_operands)++] = create_register_operand (reg_parm); 2647 } 2648 break; 2649 case BB_REG_REG_IMM: 2650 case BB_OPR_REG_IMM: 2651 case BB_REG_OPR_IMM: 2652 { 2653 bfd_byte i1; 2654 mra->read (mra, 1, 1, &i1); 2655 int offset = i1 & 0x1f; 2656 int width = bb & 0x03; 2657 width <<= 3; 2658 width |= i1 >> 5; 2659 operands[(*n_operands)++] = create_bitfield_operand (width, offset); 2660 } 2661 break; 2662 } 2663 } 2664 2665 2666 /* Decode the next instruction at MRA, according to OPC. 2667 The operation to be performed is returned. 2668 The number of operands, will be placed in N_OPERANDS. 2669 The operands themselved into OPERANDS. */ 2670 static enum optr 2671 decode_operation (const struct opcode *opc, 2672 struct mem_read_abstraction_base *mra, 2673 int *n_operands, struct operand **operands) 2674 { 2675 enum optr op = opc->operator; 2676 if (opc->discriminator) 2677 op = opc->discriminator (mra, opc->operator); 2678 2679 if (opc->operands) 2680 opc->operands (mra, n_operands, operands); 2681 2682 if (opc->operands2) 2683 opc->operands2 (mra, n_operands, operands); 2684 2685 return op; 2686 } 2687 2688 int 2689 decode_s12z (enum optr *myoperator, short *osize, 2690 int *n_operands, struct operand **operands, 2691 struct mem_read_abstraction_base *mra) 2692 { 2693 int n_bytes = 0; 2694 bfd_byte byte; 2695 2696 int status = mra->read (mra, 0, 1, &byte); 2697 if (status != 0) 2698 return status; 2699 2700 mra->advance (mra); 2701 2702 const struct opcode *opc = page1 + byte; 2703 if (byte == PAGE2_PREBYTE) 2704 { 2705 /* Opcodes in page2 have an additional byte */ 2706 n_bytes++; 2707 2708 bfd_byte byte2; 2709 mra->read (mra, 0, 1, &byte2); 2710 mra->advance (mra); 2711 opc = page2 + byte2; 2712 } 2713 *myoperator = decode_operation (opc, mra, n_operands, operands); 2714 *osize = opc->osize; 2715 2716 /* Return the number of bytes in the instruction. */ 2717 n_bytes += (opc && opc->insn_bytes) ? opc->insn_bytes (mra) : 0; 2718 2719 return n_bytes; 2720 } 2721 2722
Indexes created Wed Apr 08 00:23:23 UTC 2026