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elf32-arm.c revision 1.20 
      1 /* 32-bit ELF support for ARM
      2    Copyright (C) 1998-2026 Free Software Foundation, Inc.
      3 
      4    This file is part of BFD, the Binary File Descriptor library.
      5 
      6    This program is free software; you can redistribute it and/or modify
      7    it under the terms of the GNU General Public License as published by
      8    the Free Software Foundation; either version 3 of the License, or
      9    (at your option) any later version.
     10 
     11    This program is distributed in the hope that it will be useful,
     12    but WITHOUT ANY WARRANTY; without even the implied warranty of
     13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14    GNU General Public License for more details.
     15 
     16    You should have received a copy of the GNU General Public License
     17    along with this program; if not, write to the Free Software
     18    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
     19    MA 02110-1301, USA.  */
     20 
     21 #include "sysdep.h"
     22 #include <limits.h>
     23 
     24 #include "bfd.h"
     25 #include "libiberty.h"
     26 #include "libbfd.h"
     27 #include "elf-bfd.h"
     28 #include "elf-vxworks.h"
     29 #include "elf/arm.h"
     30 #include "elf32-arm.h"
     31 #include "cpu-arm.h"
     32 
     33 /* Return the relocation section associated with NAME.  HTAB is the
     34    bfd's elf32_arm_link_hash_entry.  */
     35 #define RELOC_SECTION(HTAB, NAME) \
     36   ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
     37 
     38 /* Return size of a relocation entry.  HTAB is the bfd's
     39    elf32_arm_link_hash_entry.  */
     40 #define RELOC_SIZE(HTAB) \
     41   ((HTAB)->use_rel \
     42    ? sizeof (Elf32_External_Rel) \
     43    : sizeof (Elf32_External_Rela))
     44 
     45 /* Return function to swap relocations in.  HTAB is the bfd's
     46    elf32_arm_link_hash_entry.  */
     47 #define SWAP_RELOC_IN(HTAB) \
     48   ((HTAB)->use_rel \
     49    ? bfd_elf32_swap_reloc_in \
     50    : bfd_elf32_swap_reloca_in)
     51 
     52 /* Return function to swap relocations out.  HTAB is the bfd's
     53    elf32_arm_link_hash_entry.  */
     54 #define SWAP_RELOC_OUT(HTAB) \
     55   ((HTAB)->use_rel \
     56    ? bfd_elf32_swap_reloc_out \
     57    : bfd_elf32_swap_reloca_out)
     58 
     59 #define elf_info_to_howto		NULL
     60 #define elf_info_to_howto_rel		elf32_arm_info_to_howto
     61 
     62 #define ARM_ELF_ABI_VERSION		0
     63 #define ARM_ELF_OS_ABI_VERSION		ELFOSABI_ARM
     64 
     65 /* The Adjusted Place, as defined by AAELF.  */
     66 #define Pa(X) ((X) & 0xfffffffc)
     67 
     68 static bool elf32_arm_write_section (bfd *output_bfd,
     69 				     struct bfd_link_info *link_info,
     70 				     asection *sec,
     71 				     bfd_byte *contents);
     72 
     73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
     74    R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
     75    in that slot.  */
     76 
     77 static reloc_howto_type elf32_arm_howto_table_1[] =
     78 {
     79   /* No relocation.  */
     80   HOWTO (R_ARM_NONE,		/* type */
     81 	 0,			/* rightshift */
     82 	 0,			/* size */
     83 	 0,			/* bitsize */
     84 	 false,			/* pc_relative */
     85 	 0,			/* bitpos */
     86 	 complain_overflow_dont,/* complain_on_overflow */
     87 	 bfd_elf_generic_reloc,	/* special_function */
     88 	 "R_ARM_NONE",		/* name */
     89 	 false,			/* partial_inplace */
     90 	 0,			/* src_mask */
     91 	 0,			/* dst_mask */
     92 	 false),		/* pcrel_offset */
     93 
     94   HOWTO (R_ARM_PC24,		/* type */
     95 	 2,			/* rightshift */
     96 	 4,			/* size */
     97 	 24,			/* bitsize */
     98 	 true,			/* pc_relative */
     99 	 0,			/* bitpos */
    100 	 complain_overflow_signed,/* complain_on_overflow */
    101 	 bfd_elf_generic_reloc,	/* special_function */
    102 	 "R_ARM_PC24",		/* name */
    103 	 false,			/* partial_inplace */
    104 	 0x00ffffff,		/* src_mask */
    105 	 0x00ffffff,		/* dst_mask */
    106 	 true),			/* pcrel_offset */
    107 
    108   /* 32 bit absolute */
    109   HOWTO (R_ARM_ABS32,		/* type */
    110 	 0,			/* rightshift */
    111 	 4,			/* size */
    112 	 32,			/* bitsize */
    113 	 false,			/* pc_relative */
    114 	 0,			/* bitpos */
    115 	 complain_overflow_bitfield,/* complain_on_overflow */
    116 	 bfd_elf_generic_reloc,	/* special_function */
    117 	 "R_ARM_ABS32",		/* name */
    118 	 false,			/* partial_inplace */
    119 	 0xffffffff,		/* src_mask */
    120 	 0xffffffff,		/* dst_mask */
    121 	 false),		/* pcrel_offset */
    122 
    123   /* standard 32bit pc-relative reloc */
    124   HOWTO (R_ARM_REL32,		/* type */
    125 	 0,			/* rightshift */
    126 	 4,			/* size */
    127 	 32,			/* bitsize */
    128 	 true,			/* pc_relative */
    129 	 0,			/* bitpos */
    130 	 complain_overflow_bitfield,/* complain_on_overflow */
    131 	 bfd_elf_generic_reloc,	/* special_function */
    132 	 "R_ARM_REL32",		/* name */
    133 	 false,			/* partial_inplace */
    134 	 0xffffffff,		/* src_mask */
    135 	 0xffffffff,		/* dst_mask */
    136 	 true),			/* pcrel_offset */
    137 
    138   /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
    139   HOWTO (R_ARM_LDR_PC_G0,	/* type */
    140 	 0,			/* rightshift */
    141 	 1,			/* size */
    142 	 32,			/* bitsize */
    143 	 true,			/* pc_relative */
    144 	 0,			/* bitpos */
    145 	 complain_overflow_dont,/* complain_on_overflow */
    146 	 bfd_elf_generic_reloc,	/* special_function */
    147 	 "R_ARM_LDR_PC_G0",     /* name */
    148 	 false,			/* partial_inplace */
    149 	 0xffffffff,		/* src_mask */
    150 	 0xffffffff,		/* dst_mask */
    151 	 true),			/* pcrel_offset */
    152 
    153    /* 16 bit absolute */
    154   HOWTO (R_ARM_ABS16,		/* type */
    155 	 0,			/* rightshift */
    156 	 2,			/* size */
    157 	 16,			/* bitsize */
    158 	 false,			/* pc_relative */
    159 	 0,			/* bitpos */
    160 	 complain_overflow_bitfield,/* complain_on_overflow */
    161 	 bfd_elf_generic_reloc,	/* special_function */
    162 	 "R_ARM_ABS16",		/* name */
    163 	 false,			/* partial_inplace */
    164 	 0x0000ffff,		/* src_mask */
    165 	 0x0000ffff,		/* dst_mask */
    166 	 false),		/* pcrel_offset */
    167 
    168   /* 12 bit absolute */
    169   HOWTO (R_ARM_ABS12,		/* type */
    170 	 0,			/* rightshift */
    171 	 4,			/* size */
    172 	 12,			/* bitsize */
    173 	 false,			/* pc_relative */
    174 	 0,			/* bitpos */
    175 	 complain_overflow_bitfield,/* complain_on_overflow */
    176 	 bfd_elf_generic_reloc,	/* special_function */
    177 	 "R_ARM_ABS12",		/* name */
    178 	 false,			/* partial_inplace */
    179 	 0x00000fff,		/* src_mask */
    180 	 0x00000fff,		/* dst_mask */
    181 	 false),		/* pcrel_offset */
    182 
    183   HOWTO (R_ARM_THM_ABS5,	/* type */
    184 	 6,			/* rightshift */
    185 	 2,			/* size */
    186 	 5,			/* bitsize */
    187 	 false,			/* pc_relative */
    188 	 0,			/* bitpos */
    189 	 complain_overflow_bitfield,/* complain_on_overflow */
    190 	 bfd_elf_generic_reloc,	/* special_function */
    191 	 "R_ARM_THM_ABS5",	/* name */
    192 	 false,			/* partial_inplace */
    193 	 0x000007e0,		/* src_mask */
    194 	 0x000007e0,		/* dst_mask */
    195 	 false),		/* pcrel_offset */
    196 
    197   /* 8 bit absolute */
    198   HOWTO (R_ARM_ABS8,		/* type */
    199 	 0,			/* rightshift */
    200 	 1,			/* size */
    201 	 8,			/* bitsize */
    202 	 false,			/* pc_relative */
    203 	 0,			/* bitpos */
    204 	 complain_overflow_bitfield,/* complain_on_overflow */
    205 	 bfd_elf_generic_reloc,	/* special_function */
    206 	 "R_ARM_ABS8",		/* name */
    207 	 false,			/* partial_inplace */
    208 	 0x000000ff,		/* src_mask */
    209 	 0x000000ff,		/* dst_mask */
    210 	 false),		/* pcrel_offset */
    211 
    212   HOWTO (R_ARM_SBREL32,		/* type */
    213 	 0,			/* rightshift */
    214 	 4,			/* size */
    215 	 32,			/* bitsize */
    216 	 false,			/* pc_relative */
    217 	 0,			/* bitpos */
    218 	 complain_overflow_dont,/* complain_on_overflow */
    219 	 bfd_elf_generic_reloc,	/* special_function */
    220 	 "R_ARM_SBREL32",	/* name */
    221 	 false,			/* partial_inplace */
    222 	 0xffffffff,		/* src_mask */
    223 	 0xffffffff,		/* dst_mask */
    224 	 false),		/* pcrel_offset */
    225 
    226   HOWTO (R_ARM_THM_CALL,	/* type */
    227 	 1,			/* rightshift */
    228 	 4,			/* size */
    229 	 24,			/* bitsize */
    230 	 true,			/* pc_relative */
    231 	 0,			/* bitpos */
    232 	 complain_overflow_signed,/* complain_on_overflow */
    233 	 bfd_elf_generic_reloc,	/* special_function */
    234 	 "R_ARM_THM_CALL",	/* name */
    235 	 false,			/* partial_inplace */
    236 	 0x07ff2fff,		/* src_mask */
    237 	 0x07ff2fff,		/* dst_mask */
    238 	 true),			/* pcrel_offset */
    239 
    240   HOWTO (R_ARM_THM_PC8,		/* type */
    241 	 1,			/* rightshift */
    242 	 2,			/* size */
    243 	 8,			/* bitsize */
    244 	 true,			/* pc_relative */
    245 	 0,			/* bitpos */
    246 	 complain_overflow_signed,/* complain_on_overflow */
    247 	 bfd_elf_generic_reloc,	/* special_function */
    248 	 "R_ARM_THM_PC8",	/* name */
    249 	 false,			/* partial_inplace */
    250 	 0x000000ff,		/* src_mask */
    251 	 0x000000ff,		/* dst_mask */
    252 	 true),			/* pcrel_offset */
    253 
    254   HOWTO (R_ARM_BREL_ADJ,	/* type */
    255 	 1,			/* rightshift */
    256 	 2,			/* size */
    257 	 32,			/* bitsize */
    258 	 false,			/* pc_relative */
    259 	 0,			/* bitpos */
    260 	 complain_overflow_signed,/* complain_on_overflow */
    261 	 bfd_elf_generic_reloc,	/* special_function */
    262 	 "R_ARM_BREL_ADJ",	/* name */
    263 	 false,			/* partial_inplace */
    264 	 0xffffffff,		/* src_mask */
    265 	 0xffffffff,		/* dst_mask */
    266 	 false),		/* pcrel_offset */
    267 
    268   HOWTO (R_ARM_TLS_DESC,	/* type */
    269 	 0,			/* rightshift */
    270 	 4,			/* size */
    271 	 32,			/* bitsize */
    272 	 false,			/* pc_relative */
    273 	 0,			/* bitpos */
    274 	 complain_overflow_bitfield,/* complain_on_overflow */
    275 	 bfd_elf_generic_reloc,	/* special_function */
    276 	 "R_ARM_TLS_DESC",	/* name */
    277 	 false,			/* partial_inplace */
    278 	 0xffffffff,		/* src_mask */
    279 	 0xffffffff,		/* dst_mask */
    280 	 false),		/* pcrel_offset */
    281 
    282   HOWTO (R_ARM_THM_SWI8,	/* type */
    283 	 0,			/* rightshift */
    284 	 0,			/* size */
    285 	 0,			/* bitsize */
    286 	 false,			/* pc_relative */
    287 	 0,			/* bitpos */
    288 	 complain_overflow_signed,/* complain_on_overflow */
    289 	 bfd_elf_generic_reloc,	/* special_function */
    290 	 "R_ARM_SWI8",		/* name */
    291 	 false,			/* partial_inplace */
    292 	 0x00000000,		/* src_mask */
    293 	 0x00000000,		/* dst_mask */
    294 	 false),		/* pcrel_offset */
    295 
    296   /* BLX instruction for the ARM.  */
    297   HOWTO (R_ARM_XPC25,		/* type */
    298 	 2,			/* rightshift */
    299 	 4,			/* size */
    300 	 24,			/* bitsize */
    301 	 true,			/* pc_relative */
    302 	 0,			/* bitpos */
    303 	 complain_overflow_signed,/* complain_on_overflow */
    304 	 bfd_elf_generic_reloc,	/* special_function */
    305 	 "R_ARM_XPC25",		/* name */
    306 	 false,			/* partial_inplace */
    307 	 0x00ffffff,		/* src_mask */
    308 	 0x00ffffff,		/* dst_mask */
    309 	 true),			/* pcrel_offset */
    310 
    311   /* BLX instruction for the Thumb.  */
    312   HOWTO (R_ARM_THM_XPC22,	/* type */
    313 	 2,			/* rightshift */
    314 	 4,			/* size */
    315 	 24,			/* bitsize */
    316 	 true,			/* pc_relative */
    317 	 0,			/* bitpos */
    318 	 complain_overflow_signed,/* complain_on_overflow */
    319 	 bfd_elf_generic_reloc,	/* special_function */
    320 	 "R_ARM_THM_XPC22",	/* name */
    321 	 false,			/* partial_inplace */
    322 	 0x07ff2fff,		/* src_mask */
    323 	 0x07ff2fff,		/* dst_mask */
    324 	 true),			/* pcrel_offset */
    325 
    326   /* Dynamic TLS relocations.  */
    327 
    328   HOWTO (R_ARM_TLS_DTPMOD32,	/* type */
    329 	 0,			/* rightshift */
    330 	 4,			/* size */
    331 	 32,			/* bitsize */
    332 	 false,			/* pc_relative */
    333 	 0,			/* bitpos */
    334 	 complain_overflow_bitfield,/* complain_on_overflow */
    335 	 bfd_elf_generic_reloc, /* special_function */
    336 	 "R_ARM_TLS_DTPMOD32",	/* name */
    337 	 true,			/* partial_inplace */
    338 	 0xffffffff,		/* src_mask */
    339 	 0xffffffff,		/* dst_mask */
    340 	 false),		/* pcrel_offset */
    341 
    342   HOWTO (R_ARM_TLS_DTPOFF32,	/* type */
    343 	 0,			/* rightshift */
    344 	 4,			/* size */
    345 	 32,			/* bitsize */
    346 	 false,			/* pc_relative */
    347 	 0,			/* bitpos */
    348 	 complain_overflow_bitfield,/* complain_on_overflow */
    349 	 bfd_elf_generic_reloc, /* special_function */
    350 	 "R_ARM_TLS_DTPOFF32",	/* name */
    351 	 true,			/* partial_inplace */
    352 	 0xffffffff,		/* src_mask */
    353 	 0xffffffff,		/* dst_mask */
    354 	 false),		/* pcrel_offset */
    355 
    356   HOWTO (R_ARM_TLS_TPOFF32,	/* type */
    357 	 0,			/* rightshift */
    358 	 4,			/* size */
    359 	 32,			/* bitsize */
    360 	 false,			/* pc_relative */
    361 	 0,			/* bitpos */
    362 	 complain_overflow_bitfield,/* complain_on_overflow */
    363 	 bfd_elf_generic_reloc, /* special_function */
    364 	 "R_ARM_TLS_TPOFF32",	/* name */
    365 	 true,			/* partial_inplace */
    366 	 0xffffffff,		/* src_mask */
    367 	 0xffffffff,		/* dst_mask */
    368 	 false),		/* pcrel_offset */
    369 
    370   /* Relocs used in ARM Linux */
    371 
    372   HOWTO (R_ARM_COPY,		/* type */
    373 	 0,			/* rightshift */
    374 	 4,			/* size */
    375 	 32,			/* bitsize */
    376 	 false,			/* pc_relative */
    377 	 0,			/* bitpos */
    378 	 complain_overflow_bitfield,/* complain_on_overflow */
    379 	 bfd_elf_generic_reloc, /* special_function */
    380 	 "R_ARM_COPY",		/* name */
    381 	 true,			/* partial_inplace */
    382 	 0xffffffff,		/* src_mask */
    383 	 0xffffffff,		/* dst_mask */
    384 	 false),		/* pcrel_offset */
    385 
    386   HOWTO (R_ARM_GLOB_DAT,	/* type */
    387 	 0,			/* rightshift */
    388 	 4,			/* size */
    389 	 32,			/* bitsize */
    390 	 false,			/* pc_relative */
    391 	 0,			/* bitpos */
    392 	 complain_overflow_bitfield,/* complain_on_overflow */
    393 	 bfd_elf_generic_reloc, /* special_function */
    394 	 "R_ARM_GLOB_DAT",	/* name */
    395 	 true,			/* partial_inplace */
    396 	 0xffffffff,		/* src_mask */
    397 	 0xffffffff,		/* dst_mask */
    398 	 false),		/* pcrel_offset */
    399 
    400   HOWTO (R_ARM_JUMP_SLOT,	/* type */
    401 	 0,			/* rightshift */
    402 	 4,			/* size */
    403 	 32,			/* bitsize */
    404 	 false,			/* pc_relative */
    405 	 0,			/* bitpos */
    406 	 complain_overflow_bitfield,/* complain_on_overflow */
    407 	 bfd_elf_generic_reloc, /* special_function */
    408 	 "R_ARM_JUMP_SLOT",	/* name */
    409 	 true,			/* partial_inplace */
    410 	 0xffffffff,		/* src_mask */
    411 	 0xffffffff,		/* dst_mask */
    412 	 false),		/* pcrel_offset */
    413 
    414   HOWTO (R_ARM_RELATIVE,	/* type */
    415 	 0,			/* rightshift */
    416 	 4,			/* size */
    417 	 32,			/* bitsize */
    418 	 false,			/* pc_relative */
    419 	 0,			/* bitpos */
    420 	 complain_overflow_bitfield,/* complain_on_overflow */
    421 	 bfd_elf_generic_reloc, /* special_function */
    422 	 "R_ARM_RELATIVE",	/* name */
    423 	 true,			/* partial_inplace */
    424 	 0xffffffff,		/* src_mask */
    425 	 0xffffffff,		/* dst_mask */
    426 	 false),		/* pcrel_offset */
    427 
    428   HOWTO (R_ARM_GOTOFF32,	/* type */
    429 	 0,			/* rightshift */
    430 	 4,			/* size */
    431 	 32,			/* bitsize */
    432 	 false,			/* pc_relative */
    433 	 0,			/* bitpos */
    434 	 complain_overflow_bitfield,/* complain_on_overflow */
    435 	 bfd_elf_generic_reloc, /* special_function */
    436 	 "R_ARM_GOTOFF32",	/* name */
    437 	 true,			/* partial_inplace */
    438 	 0xffffffff,		/* src_mask */
    439 	 0xffffffff,		/* dst_mask */
    440 	 false),		/* pcrel_offset */
    441 
    442   HOWTO (R_ARM_GOTPC,		/* type */
    443 	 0,			/* rightshift */
    444 	 4,			/* size */
    445 	 32,			/* bitsize */
    446 	 true,			/* pc_relative */
    447 	 0,			/* bitpos */
    448 	 complain_overflow_bitfield,/* complain_on_overflow */
    449 	 bfd_elf_generic_reloc, /* special_function */
    450 	 "R_ARM_GOTPC",		/* name */
    451 	 true,			/* partial_inplace */
    452 	 0xffffffff,		/* src_mask */
    453 	 0xffffffff,		/* dst_mask */
    454 	 true),			/* pcrel_offset */
    455 
    456   HOWTO (R_ARM_GOT32,		/* type */
    457 	 0,			/* rightshift */
    458 	 4,			/* size */
    459 	 32,			/* bitsize */
    460 	 false,			/* pc_relative */
    461 	 0,			/* bitpos */
    462 	 complain_overflow_bitfield,/* complain_on_overflow */
    463 	 bfd_elf_generic_reloc, /* special_function */
    464 	 "R_ARM_GOT32",		/* name */
    465 	 true,			/* partial_inplace */
    466 	 0xffffffff,		/* src_mask */
    467 	 0xffffffff,		/* dst_mask */
    468 	 false),		/* pcrel_offset */
    469 
    470   HOWTO (R_ARM_PLT32,		/* type */
    471 	 2,			/* rightshift */
    472 	 4,			/* size */
    473 	 24,			/* bitsize */
    474 	 true,			/* pc_relative */
    475 	 0,			/* bitpos */
    476 	 complain_overflow_bitfield,/* complain_on_overflow */
    477 	 bfd_elf_generic_reloc, /* special_function */
    478 	 "R_ARM_PLT32",		/* name */
    479 	 false,			/* partial_inplace */
    480 	 0x00ffffff,		/* src_mask */
    481 	 0x00ffffff,		/* dst_mask */
    482 	 true),			/* pcrel_offset */
    483 
    484   HOWTO (R_ARM_CALL,		/* type */
    485 	 2,			/* rightshift */
    486 	 4,			/* size */
    487 	 24,			/* bitsize */
    488 	 true,			/* pc_relative */
    489 	 0,			/* bitpos */
    490 	 complain_overflow_signed,/* complain_on_overflow */
    491 	 bfd_elf_generic_reloc,	/* special_function */
    492 	 "R_ARM_CALL",		/* name */
    493 	 false,			/* partial_inplace */
    494 	 0x00ffffff,		/* src_mask */
    495 	 0x00ffffff,		/* dst_mask */
    496 	 true),			/* pcrel_offset */
    497 
    498   HOWTO (R_ARM_JUMP24,		/* type */
    499 	 2,			/* rightshift */
    500 	 4,			/* size */
    501 	 24,			/* bitsize */
    502 	 true,			/* pc_relative */
    503 	 0,			/* bitpos */
    504 	 complain_overflow_signed,/* complain_on_overflow */
    505 	 bfd_elf_generic_reloc,	/* special_function */
    506 	 "R_ARM_JUMP24",	/* name */
    507 	 false,			/* partial_inplace */
    508 	 0x00ffffff,		/* src_mask */
    509 	 0x00ffffff,		/* dst_mask */
    510 	 true),			/* pcrel_offset */
    511 
    512   HOWTO (R_ARM_THM_JUMP24,	/* type */
    513 	 1,			/* rightshift */
    514 	 4,			/* size */
    515 	 24,			/* bitsize */
    516 	 true,			/* pc_relative */
    517 	 0,			/* bitpos */
    518 	 complain_overflow_signed,/* complain_on_overflow */
    519 	 bfd_elf_generic_reloc,	/* special_function */
    520 	 "R_ARM_THM_JUMP24",	/* name */
    521 	 false,			/* partial_inplace */
    522 	 0x07ff2fff,		/* src_mask */
    523 	 0x07ff2fff,		/* dst_mask */
    524 	 true),			/* pcrel_offset */
    525 
    526   HOWTO (R_ARM_BASE_ABS,	/* type */
    527 	 0,			/* rightshift */
    528 	 4,			/* size */
    529 	 32,			/* bitsize */
    530 	 false,			/* pc_relative */
    531 	 0,			/* bitpos */
    532 	 complain_overflow_dont,/* complain_on_overflow */
    533 	 bfd_elf_generic_reloc,	/* special_function */
    534 	 "R_ARM_BASE_ABS",	/* name */
    535 	 false,			/* partial_inplace */
    536 	 0xffffffff,		/* src_mask */
    537 	 0xffffffff,		/* dst_mask */
    538 	 false),		/* pcrel_offset */
    539 
    540   HOWTO (R_ARM_ALU_PCREL7_0,	/* type */
    541 	 0,			/* rightshift */
    542 	 4,			/* size */
    543 	 12,			/* bitsize */
    544 	 true,			/* pc_relative */
    545 	 0,			/* bitpos */
    546 	 complain_overflow_dont,/* complain_on_overflow */
    547 	 bfd_elf_generic_reloc,	/* special_function */
    548 	 "R_ARM_ALU_PCREL_7_0",	/* name */
    549 	 false,			/* partial_inplace */
    550 	 0x00000fff,		/* src_mask */
    551 	 0x00000fff,		/* dst_mask */
    552 	 true),			/* pcrel_offset */
    553 
    554   HOWTO (R_ARM_ALU_PCREL15_8,	/* type */
    555 	 0,			/* rightshift */
    556 	 4,			/* size */
    557 	 12,			/* bitsize */
    558 	 true,			/* pc_relative */
    559 	 8,			/* bitpos */
    560 	 complain_overflow_dont,/* complain_on_overflow */
    561 	 bfd_elf_generic_reloc,	/* special_function */
    562 	 "R_ARM_ALU_PCREL_15_8",/* name */
    563 	 false,			/* partial_inplace */
    564 	 0x00000fff,		/* src_mask */
    565 	 0x00000fff,		/* dst_mask */
    566 	 true),			/* pcrel_offset */
    567 
    568   HOWTO (R_ARM_ALU_PCREL23_15,	/* type */
    569 	 0,			/* rightshift */
    570 	 4,			/* size */
    571 	 12,			/* bitsize */
    572 	 true,			/* pc_relative */
    573 	 16,			/* bitpos */
    574 	 complain_overflow_dont,/* complain_on_overflow */
    575 	 bfd_elf_generic_reloc,	/* special_function */
    576 	 "R_ARM_ALU_PCREL_23_15",/* name */
    577 	 false,			/* partial_inplace */
    578 	 0x00000fff,		/* src_mask */
    579 	 0x00000fff,		/* dst_mask */
    580 	 true),			/* pcrel_offset */
    581 
    582   HOWTO (R_ARM_LDR_SBREL_11_0,	/* type */
    583 	 0,			/* rightshift */
    584 	 4,			/* size */
    585 	 12,			/* bitsize */
    586 	 false,			/* pc_relative */
    587 	 0,			/* bitpos */
    588 	 complain_overflow_dont,/* complain_on_overflow */
    589 	 bfd_elf_generic_reloc,	/* special_function */
    590 	 "R_ARM_LDR_SBREL_11_0",/* name */
    591 	 false,			/* partial_inplace */
    592 	 0x00000fff,		/* src_mask */
    593 	 0x00000fff,		/* dst_mask */
    594 	 false),		/* pcrel_offset */
    595 
    596   HOWTO (R_ARM_ALU_SBREL_19_12,	/* type */
    597 	 0,			/* rightshift */
    598 	 4,			/* size */
    599 	 8,			/* bitsize */
    600 	 false,			/* pc_relative */
    601 	 12,			/* bitpos */
    602 	 complain_overflow_dont,/* complain_on_overflow */
    603 	 bfd_elf_generic_reloc,	/* special_function */
    604 	 "R_ARM_ALU_SBREL_19_12",/* name */
    605 	 false,			/* partial_inplace */
    606 	 0x000ff000,		/* src_mask */
    607 	 0x000ff000,		/* dst_mask */
    608 	 false),		/* pcrel_offset */
    609 
    610   HOWTO (R_ARM_ALU_SBREL_27_20,	/* type */
    611 	 0,			/* rightshift */
    612 	 4,			/* size */
    613 	 8,			/* bitsize */
    614 	 false,			/* pc_relative */
    615 	 20,			/* bitpos */
    616 	 complain_overflow_dont,/* complain_on_overflow */
    617 	 bfd_elf_generic_reloc,	/* special_function */
    618 	 "R_ARM_ALU_SBREL_27_20",/* name */
    619 	 false,			/* partial_inplace */
    620 	 0x0ff00000,		/* src_mask */
    621 	 0x0ff00000,		/* dst_mask */
    622 	 false),		/* pcrel_offset */
    623 
    624   HOWTO (R_ARM_TARGET1,		/* type */
    625 	 0,			/* rightshift */
    626 	 4,			/* size */
    627 	 32,			/* bitsize */
    628 	 false,			/* pc_relative */
    629 	 0,			/* bitpos */
    630 	 complain_overflow_dont,/* complain_on_overflow */
    631 	 bfd_elf_generic_reloc,	/* special_function */
    632 	 "R_ARM_TARGET1",	/* name */
    633 	 false,			/* partial_inplace */
    634 	 0xffffffff,		/* src_mask */
    635 	 0xffffffff,		/* dst_mask */
    636 	 false),		/* pcrel_offset */
    637 
    638   HOWTO (R_ARM_ROSEGREL32,	/* type */
    639 	 0,			/* rightshift */
    640 	 4,			/* size */
    641 	 32,			/* bitsize */
    642 	 false,			/* pc_relative */
    643 	 0,			/* bitpos */
    644 	 complain_overflow_dont,/* complain_on_overflow */
    645 	 bfd_elf_generic_reloc,	/* special_function */
    646 	 "R_ARM_ROSEGREL32",	/* name */
    647 	 false,			/* partial_inplace */
    648 	 0xffffffff,		/* src_mask */
    649 	 0xffffffff,		/* dst_mask */
    650 	 false),		/* pcrel_offset */
    651 
    652   HOWTO (R_ARM_V4BX,		/* type */
    653 	 0,			/* rightshift */
    654 	 4,			/* size */
    655 	 32,			/* bitsize */
    656 	 false,			/* pc_relative */
    657 	 0,			/* bitpos */
    658 	 complain_overflow_dont,/* complain_on_overflow */
    659 	 bfd_elf_generic_reloc,	/* special_function */
    660 	 "R_ARM_V4BX",		/* name */
    661 	 false,			/* partial_inplace */
    662 	 0xffffffff,		/* src_mask */
    663 	 0xffffffff,		/* dst_mask */
    664 	 false),		/* pcrel_offset */
    665 
    666   HOWTO (R_ARM_TARGET2,		/* type */
    667 	 0,			/* rightshift */
    668 	 4,			/* size */
    669 	 32,			/* bitsize */
    670 	 false,			/* pc_relative */
    671 	 0,			/* bitpos */
    672 	 complain_overflow_signed,/* complain_on_overflow */
    673 	 bfd_elf_generic_reloc,	/* special_function */
    674 	 "R_ARM_TARGET2",	/* name */
    675 	 false,			/* partial_inplace */
    676 	 0xffffffff,		/* src_mask */
    677 	 0xffffffff,		/* dst_mask */
    678 	 true),			/* pcrel_offset */
    679 
    680   HOWTO (R_ARM_PREL31,		/* type */
    681 	 0,			/* rightshift */
    682 	 4,			/* size */
    683 	 31,			/* bitsize */
    684 	 true,			/* pc_relative */
    685 	 0,			/* bitpos */
    686 	 complain_overflow_signed,/* complain_on_overflow */
    687 	 bfd_elf_generic_reloc,	/* special_function */
    688 	 "R_ARM_PREL31",	/* name */
    689 	 false,			/* partial_inplace */
    690 	 0x7fffffff,		/* src_mask */
    691 	 0x7fffffff,		/* dst_mask */
    692 	 true),			/* pcrel_offset */
    693 
    694   HOWTO (R_ARM_MOVW_ABS_NC,	/* type */
    695 	 0,			/* rightshift */
    696 	 4,			/* size */
    697 	 16,			/* bitsize */
    698 	 false,			/* pc_relative */
    699 	 0,			/* bitpos */
    700 	 complain_overflow_dont,/* complain_on_overflow */
    701 	 bfd_elf_generic_reloc,	/* special_function */
    702 	 "R_ARM_MOVW_ABS_NC",	/* name */
    703 	 false,			/* partial_inplace */
    704 	 0x000f0fff,		/* src_mask */
    705 	 0x000f0fff,		/* dst_mask */
    706 	 false),		/* pcrel_offset */
    707 
    708   HOWTO (R_ARM_MOVT_ABS,	/* type */
    709 	 0,			/* rightshift */
    710 	 4,			/* size */
    711 	 16,			/* bitsize */
    712 	 false,			/* pc_relative */
    713 	 0,			/* bitpos */
    714 	 complain_overflow_bitfield,/* complain_on_overflow */
    715 	 bfd_elf_generic_reloc,	/* special_function */
    716 	 "R_ARM_MOVT_ABS",	/* name */
    717 	 false,			/* partial_inplace */
    718 	 0x000f0fff,		/* src_mask */
    719 	 0x000f0fff,		/* dst_mask */
    720 	 false),		/* pcrel_offset */
    721 
    722   HOWTO (R_ARM_MOVW_PREL_NC,	/* type */
    723 	 0,			/* rightshift */
    724 	 4,			/* size */
    725 	 16,			/* bitsize */
    726 	 true,			/* pc_relative */
    727 	 0,			/* bitpos */
    728 	 complain_overflow_dont,/* complain_on_overflow */
    729 	 bfd_elf_generic_reloc,	/* special_function */
    730 	 "R_ARM_MOVW_PREL_NC",	/* name */
    731 	 false,			/* partial_inplace */
    732 	 0x000f0fff,		/* src_mask */
    733 	 0x000f0fff,		/* dst_mask */
    734 	 true),			/* pcrel_offset */
    735 
    736   HOWTO (R_ARM_MOVT_PREL,	/* type */
    737 	 0,			/* rightshift */
    738 	 4,			/* size */
    739 	 16,			/* bitsize */
    740 	 true,			/* pc_relative */
    741 	 0,			/* bitpos */
    742 	 complain_overflow_bitfield,/* complain_on_overflow */
    743 	 bfd_elf_generic_reloc,	/* special_function */
    744 	 "R_ARM_MOVT_PREL",	/* name */
    745 	 false,			/* partial_inplace */
    746 	 0x000f0fff,		/* src_mask */
    747 	 0x000f0fff,		/* dst_mask */
    748 	 true),			/* pcrel_offset */
    749 
    750   HOWTO (R_ARM_THM_MOVW_ABS_NC,	/* type */
    751 	 0,			/* rightshift */
    752 	 4,			/* size */
    753 	 16,			/* bitsize */
    754 	 false,			/* pc_relative */
    755 	 0,			/* bitpos */
    756 	 complain_overflow_dont,/* complain_on_overflow */
    757 	 bfd_elf_generic_reloc,	/* special_function */
    758 	 "R_ARM_THM_MOVW_ABS_NC",/* name */
    759 	 false,			/* partial_inplace */
    760 	 0x040f70ff,		/* src_mask */
    761 	 0x040f70ff,		/* dst_mask */
    762 	 false),		/* pcrel_offset */
    763 
    764   HOWTO (R_ARM_THM_MOVT_ABS,	/* type */
    765 	 0,			/* rightshift */
    766 	 4,			/* size */
    767 	 16,			/* bitsize */
    768 	 false,			/* pc_relative */
    769 	 0,			/* bitpos */
    770 	 complain_overflow_bitfield,/* complain_on_overflow */
    771 	 bfd_elf_generic_reloc,	/* special_function */
    772 	 "R_ARM_THM_MOVT_ABS",	/* name */
    773 	 false,			/* partial_inplace */
    774 	 0x040f70ff,		/* src_mask */
    775 	 0x040f70ff,		/* dst_mask */
    776 	 false),		/* pcrel_offset */
    777 
    778   HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
    779 	 0,			/* rightshift */
    780 	 4,			/* size */
    781 	 16,			/* bitsize */
    782 	 true,			/* pc_relative */
    783 	 0,			/* bitpos */
    784 	 complain_overflow_dont,/* complain_on_overflow */
    785 	 bfd_elf_generic_reloc,	/* special_function */
    786 	 "R_ARM_THM_MOVW_PREL_NC",/* name */
    787 	 false,			/* partial_inplace */
    788 	 0x040f70ff,		/* src_mask */
    789 	 0x040f70ff,		/* dst_mask */
    790 	 true),			/* pcrel_offset */
    791 
    792   HOWTO (R_ARM_THM_MOVT_PREL,	/* type */
    793 	 0,			/* rightshift */
    794 	 4,			/* size */
    795 	 16,			/* bitsize */
    796 	 true,			/* pc_relative */
    797 	 0,			/* bitpos */
    798 	 complain_overflow_bitfield,/* complain_on_overflow */
    799 	 bfd_elf_generic_reloc,	/* special_function */
    800 	 "R_ARM_THM_MOVT_PREL",	/* name */
    801 	 false,			/* partial_inplace */
    802 	 0x040f70ff,		/* src_mask */
    803 	 0x040f70ff,		/* dst_mask */
    804 	 true),			/* pcrel_offset */
    805 
    806   HOWTO (R_ARM_THM_JUMP19,	/* type */
    807 	 1,			/* rightshift */
    808 	 4,			/* size */
    809 	 19,			/* bitsize */
    810 	 true,			/* pc_relative */
    811 	 0,			/* bitpos */
    812 	 complain_overflow_signed,/* complain_on_overflow */
    813 	 bfd_elf_generic_reloc, /* special_function */
    814 	 "R_ARM_THM_JUMP19",	/* name */
    815 	 false,			/* partial_inplace */
    816 	 0x043f2fff,		/* src_mask */
    817 	 0x043f2fff,		/* dst_mask */
    818 	 true),			/* pcrel_offset */
    819 
    820   HOWTO (R_ARM_THM_JUMP6,	/* type */
    821 	 1,			/* rightshift */
    822 	 2,			/* size */
    823 	 6,			/* bitsize */
    824 	 true,			/* pc_relative */
    825 	 0,			/* bitpos */
    826 	 complain_overflow_unsigned,/* complain_on_overflow */
    827 	 bfd_elf_generic_reloc,	/* special_function */
    828 	 "R_ARM_THM_JUMP6",	/* name */
    829 	 false,			/* partial_inplace */
    830 	 0x02f8,		/* src_mask */
    831 	 0x02f8,		/* dst_mask */
    832 	 true),			/* pcrel_offset */
    833 
    834   /* These are declared as 13-bit signed relocations because we can
    835      address -4095 .. 4095(base) by altering ADDW to SUBW or vice
    836      versa.  */
    837   HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
    838 	 0,			/* rightshift */
    839 	 4,			/* size */
    840 	 13,			/* bitsize */
    841 	 true,			/* pc_relative */
    842 	 0,			/* bitpos */
    843 	 complain_overflow_dont,/* complain_on_overflow */
    844 	 bfd_elf_generic_reloc,	/* special_function */
    845 	 "R_ARM_THM_ALU_PREL_11_0",/* name */
    846 	 false,			/* partial_inplace */
    847 	 0xffffffff,		/* src_mask */
    848 	 0xffffffff,		/* dst_mask */
    849 	 true),			/* pcrel_offset */
    850 
    851   HOWTO (R_ARM_THM_PC12,	/* type */
    852 	 0,			/* rightshift */
    853 	 4,			/* size */
    854 	 13,			/* bitsize */
    855 	 true,			/* pc_relative */
    856 	 0,			/* bitpos */
    857 	 complain_overflow_dont,/* complain_on_overflow */
    858 	 bfd_elf_generic_reloc,	/* special_function */
    859 	 "R_ARM_THM_PC12",	/* name */
    860 	 false,			/* partial_inplace */
    861 	 0xffffffff,		/* src_mask */
    862 	 0xffffffff,		/* dst_mask */
    863 	 true),			/* pcrel_offset */
    864 
    865   HOWTO (R_ARM_ABS32_NOI,	/* type */
    866 	 0,			/* rightshift */
    867 	 4,			/* size */
    868 	 32,			/* bitsize */
    869 	 false,			/* pc_relative */
    870 	 0,			/* bitpos */
    871 	 complain_overflow_dont,/* complain_on_overflow */
    872 	 bfd_elf_generic_reloc,	/* special_function */
    873 	 "R_ARM_ABS32_NOI",	/* name */
    874 	 false,			/* partial_inplace */
    875 	 0xffffffff,		/* src_mask */
    876 	 0xffffffff,		/* dst_mask */
    877 	 false),		/* pcrel_offset */
    878 
    879   HOWTO (R_ARM_REL32_NOI,	/* type */
    880 	 0,			/* rightshift */
    881 	 4,			/* size */
    882 	 32,			/* bitsize */
    883 	 true,			/* pc_relative */
    884 	 0,			/* bitpos */
    885 	 complain_overflow_dont,/* complain_on_overflow */
    886 	 bfd_elf_generic_reloc,	/* special_function */
    887 	 "R_ARM_REL32_NOI",	/* name */
    888 	 false,			/* partial_inplace */
    889 	 0xffffffff,		/* src_mask */
    890 	 0xffffffff,		/* dst_mask */
    891 	 false),		/* pcrel_offset */
    892 
    893   /* Group relocations.  */
    894 
    895   HOWTO (R_ARM_ALU_PC_G0_NC,	/* type */
    896 	 0,			/* rightshift */
    897 	 4,			/* size */
    898 	 32,			/* bitsize */
    899 	 true,			/* pc_relative */
    900 	 0,			/* bitpos */
    901 	 complain_overflow_dont,/* complain_on_overflow */
    902 	 bfd_elf_generic_reloc,	/* special_function */
    903 	 "R_ARM_ALU_PC_G0_NC",	/* name */
    904 	 false,			/* partial_inplace */
    905 	 0xffffffff,		/* src_mask */
    906 	 0xffffffff,		/* dst_mask */
    907 	 true),			/* pcrel_offset */
    908 
    909   HOWTO (R_ARM_ALU_PC_G0,	/* type */
    910 	 0,			/* rightshift */
    911 	 4,			/* size */
    912 	 32,			/* bitsize */
    913 	 true,			/* pc_relative */
    914 	 0,			/* bitpos */
    915 	 complain_overflow_dont,/* complain_on_overflow */
    916 	 bfd_elf_generic_reloc,	/* special_function */
    917 	 "R_ARM_ALU_PC_G0",	/* name */
    918 	 false,			/* partial_inplace */
    919 	 0xffffffff,		/* src_mask */
    920 	 0xffffffff,		/* dst_mask */
    921 	 true),			/* pcrel_offset */
    922 
    923   HOWTO (R_ARM_ALU_PC_G1_NC,	/* type */
    924 	 0,			/* rightshift */
    925 	 4,			/* size */
    926 	 32,			/* bitsize */
    927 	 true,			/* pc_relative */
    928 	 0,			/* bitpos */
    929 	 complain_overflow_dont,/* complain_on_overflow */
    930 	 bfd_elf_generic_reloc,	/* special_function */
    931 	 "R_ARM_ALU_PC_G1_NC",	/* name */
    932 	 false,			/* partial_inplace */
    933 	 0xffffffff,		/* src_mask */
    934 	 0xffffffff,		/* dst_mask */
    935 	 true),			/* pcrel_offset */
    936 
    937   HOWTO (R_ARM_ALU_PC_G1,	/* type */
    938 	 0,			/* rightshift */
    939 	 4,			/* size */
    940 	 32,			/* bitsize */
    941 	 true,			/* pc_relative */
    942 	 0,			/* bitpos */
    943 	 complain_overflow_dont,/* complain_on_overflow */
    944 	 bfd_elf_generic_reloc,	/* special_function */
    945 	 "R_ARM_ALU_PC_G1",	/* name */
    946 	 false,			/* partial_inplace */
    947 	 0xffffffff,		/* src_mask */
    948 	 0xffffffff,		/* dst_mask */
    949 	 true),			/* pcrel_offset */
    950 
    951   HOWTO (R_ARM_ALU_PC_G2,	/* type */
    952 	 0,			/* rightshift */
    953 	 4,			/* size */
    954 	 32,			/* bitsize */
    955 	 true,			/* pc_relative */
    956 	 0,			/* bitpos */
    957 	 complain_overflow_dont,/* complain_on_overflow */
    958 	 bfd_elf_generic_reloc,	/* special_function */
    959 	 "R_ARM_ALU_PC_G2",	/* name */
    960 	 false,			/* partial_inplace */
    961 	 0xffffffff,		/* src_mask */
    962 	 0xffffffff,		/* dst_mask */
    963 	 true),			/* pcrel_offset */
    964 
    965   HOWTO (R_ARM_LDR_PC_G1,	/* type */
    966 	 0,			/* rightshift */
    967 	 4,			/* size */
    968 	 32,			/* bitsize */
    969 	 true,			/* pc_relative */
    970 	 0,			/* bitpos */
    971 	 complain_overflow_dont,/* complain_on_overflow */
    972 	 bfd_elf_generic_reloc,	/* special_function */
    973 	 "R_ARM_LDR_PC_G1",	/* name */
    974 	 false,			/* partial_inplace */
    975 	 0xffffffff,		/* src_mask */
    976 	 0xffffffff,		/* dst_mask */
    977 	 true),			/* pcrel_offset */
    978 
    979   HOWTO (R_ARM_LDR_PC_G2,	/* type */
    980 	 0,			/* rightshift */
    981 	 4,			/* size */
    982 	 32,			/* bitsize */
    983 	 true,			/* pc_relative */
    984 	 0,			/* bitpos */
    985 	 complain_overflow_dont,/* complain_on_overflow */
    986 	 bfd_elf_generic_reloc,	/* special_function */
    987 	 "R_ARM_LDR_PC_G2",	/* name */
    988 	 false,			/* partial_inplace */
    989 	 0xffffffff,		/* src_mask */
    990 	 0xffffffff,		/* dst_mask */
    991 	 true),			/* pcrel_offset */
    992 
    993   HOWTO (R_ARM_LDRS_PC_G0,	/* type */
    994 	 0,			/* rightshift */
    995 	 4,			/* size */
    996 	 32,			/* bitsize */
    997 	 true,			/* pc_relative */
    998 	 0,			/* bitpos */
    999 	 complain_overflow_dont,/* complain_on_overflow */
   1000 	 bfd_elf_generic_reloc,	/* special_function */
   1001 	 "R_ARM_LDRS_PC_G0",	/* name */
   1002 	 false,			/* partial_inplace */
   1003 	 0xffffffff,		/* src_mask */
   1004 	 0xffffffff,		/* dst_mask */
   1005 	 true),			/* pcrel_offset */
   1006 
   1007   HOWTO (R_ARM_LDRS_PC_G1,	/* type */
   1008 	 0,			/* rightshift */
   1009 	 4,			/* size */
   1010 	 32,			/* bitsize */
   1011 	 true,			/* pc_relative */
   1012 	 0,			/* bitpos */
   1013 	 complain_overflow_dont,/* complain_on_overflow */
   1014 	 bfd_elf_generic_reloc,	/* special_function */
   1015 	 "R_ARM_LDRS_PC_G1",	/* name */
   1016 	 false,			/* partial_inplace */
   1017 	 0xffffffff,		/* src_mask */
   1018 	 0xffffffff,		/* dst_mask */
   1019 	 true),			/* pcrel_offset */
   1020 
   1021   HOWTO (R_ARM_LDRS_PC_G2,	/* type */
   1022 	 0,			/* rightshift */
   1023 	 4,			/* size */
   1024 	 32,			/* bitsize */
   1025 	 true,			/* pc_relative */
   1026 	 0,			/* bitpos */
   1027 	 complain_overflow_dont,/* complain_on_overflow */
   1028 	 bfd_elf_generic_reloc,	/* special_function */
   1029 	 "R_ARM_LDRS_PC_G2",	/* name */
   1030 	 false,			/* partial_inplace */
   1031 	 0xffffffff,		/* src_mask */
   1032 	 0xffffffff,		/* dst_mask */
   1033 	 true),			/* pcrel_offset */
   1034 
   1035   HOWTO (R_ARM_LDC_PC_G0,	/* type */
   1036 	 0,			/* rightshift */
   1037 	 4,			/* size */
   1038 	 32,			/* bitsize */
   1039 	 true,			/* pc_relative */
   1040 	 0,			/* bitpos */
   1041 	 complain_overflow_dont,/* complain_on_overflow */
   1042 	 bfd_elf_generic_reloc,	/* special_function */
   1043 	 "R_ARM_LDC_PC_G0",	/* name */
   1044 	 false,			/* partial_inplace */
   1045 	 0xffffffff,		/* src_mask */
   1046 	 0xffffffff,		/* dst_mask */
   1047 	 true),			/* pcrel_offset */
   1048 
   1049   HOWTO (R_ARM_LDC_PC_G1,	/* type */
   1050 	 0,			/* rightshift */
   1051 	 4,			/* size */
   1052 	 32,			/* bitsize */
   1053 	 true,			/* pc_relative */
   1054 	 0,			/* bitpos */
   1055 	 complain_overflow_dont,/* complain_on_overflow */
   1056 	 bfd_elf_generic_reloc,	/* special_function */
   1057 	 "R_ARM_LDC_PC_G1",	/* name */
   1058 	 false,			/* partial_inplace */
   1059 	 0xffffffff,		/* src_mask */
   1060 	 0xffffffff,		/* dst_mask */
   1061 	 true),			/* pcrel_offset */
   1062 
   1063   HOWTO (R_ARM_LDC_PC_G2,	/* type */
   1064 	 0,			/* rightshift */
   1065 	 4,			/* size */
   1066 	 32,			/* bitsize */
   1067 	 true,			/* pc_relative */
   1068 	 0,			/* bitpos */
   1069 	 complain_overflow_dont,/* complain_on_overflow */
   1070 	 bfd_elf_generic_reloc,	/* special_function */
   1071 	 "R_ARM_LDC_PC_G2",	/* name */
   1072 	 false,			/* partial_inplace */
   1073 	 0xffffffff,		/* src_mask */
   1074 	 0xffffffff,		/* dst_mask */
   1075 	 true),			/* pcrel_offset */
   1076 
   1077   HOWTO (R_ARM_ALU_SB_G0_NC,	/* type */
   1078 	 0,			/* rightshift */
   1079 	 4,			/* size */
   1080 	 32,			/* bitsize */
   1081 	 true,			/* pc_relative */
   1082 	 0,			/* bitpos */
   1083 	 complain_overflow_dont,/* complain_on_overflow */
   1084 	 bfd_elf_generic_reloc,	/* special_function */
   1085 	 "R_ARM_ALU_SB_G0_NC",	/* name */
   1086 	 false,			/* partial_inplace */
   1087 	 0xffffffff,		/* src_mask */
   1088 	 0xffffffff,		/* dst_mask */
   1089 	 true),			/* pcrel_offset */
   1090 
   1091   HOWTO (R_ARM_ALU_SB_G0,	/* type */
   1092 	 0,			/* rightshift */
   1093 	 4,			/* size */
   1094 	 32,			/* bitsize */
   1095 	 true,			/* pc_relative */
   1096 	 0,			/* bitpos */
   1097 	 complain_overflow_dont,/* complain_on_overflow */
   1098 	 bfd_elf_generic_reloc,	/* special_function */
   1099 	 "R_ARM_ALU_SB_G0",	/* name */
   1100 	 false,			/* partial_inplace */
   1101 	 0xffffffff,		/* src_mask */
   1102 	 0xffffffff,		/* dst_mask */
   1103 	 true),			/* pcrel_offset */
   1104 
   1105   HOWTO (R_ARM_ALU_SB_G1_NC,	/* type */
   1106 	 0,			/* rightshift */
   1107 	 4,			/* size */
   1108 	 32,			/* bitsize */
   1109 	 true,			/* pc_relative */
   1110 	 0,			/* bitpos */
   1111 	 complain_overflow_dont,/* complain_on_overflow */
   1112 	 bfd_elf_generic_reloc,	/* special_function */
   1113 	 "R_ARM_ALU_SB_G1_NC",	/* name */
   1114 	 false,			/* partial_inplace */
   1115 	 0xffffffff,		/* src_mask */
   1116 	 0xffffffff,		/* dst_mask */
   1117 	 true),			/* pcrel_offset */
   1118 
   1119   HOWTO (R_ARM_ALU_SB_G1,	/* type */
   1120 	 0,			/* rightshift */
   1121 	 4,			/* size */
   1122 	 32,			/* bitsize */
   1123 	 true,			/* pc_relative */
   1124 	 0,			/* bitpos */
   1125 	 complain_overflow_dont,/* complain_on_overflow */
   1126 	 bfd_elf_generic_reloc,	/* special_function */
   1127 	 "R_ARM_ALU_SB_G1",	/* name */
   1128 	 false,			/* partial_inplace */
   1129 	 0xffffffff,		/* src_mask */
   1130 	 0xffffffff,		/* dst_mask */
   1131 	 true),			/* pcrel_offset */
   1132 
   1133   HOWTO (R_ARM_ALU_SB_G2,	/* type */
   1134 	 0,			/* rightshift */
   1135 	 4,			/* size */
   1136 	 32,			/* bitsize */
   1137 	 true,			/* pc_relative */
   1138 	 0,			/* bitpos */
   1139 	 complain_overflow_dont,/* complain_on_overflow */
   1140 	 bfd_elf_generic_reloc,	/* special_function */
   1141 	 "R_ARM_ALU_SB_G2",	/* name */
   1142 	 false,			/* partial_inplace */
   1143 	 0xffffffff,		/* src_mask */
   1144 	 0xffffffff,		/* dst_mask */
   1145 	 true),			/* pcrel_offset */
   1146 
   1147   HOWTO (R_ARM_LDR_SB_G0,	/* type */
   1148 	 0,			/* rightshift */
   1149 	 4,			/* size */
   1150 	 32,			/* bitsize */
   1151 	 true,			/* pc_relative */
   1152 	 0,			/* bitpos */
   1153 	 complain_overflow_dont,/* complain_on_overflow */
   1154 	 bfd_elf_generic_reloc,	/* special_function */
   1155 	 "R_ARM_LDR_SB_G0",	/* name */
   1156 	 false,			/* partial_inplace */
   1157 	 0xffffffff,		/* src_mask */
   1158 	 0xffffffff,		/* dst_mask */
   1159 	 true),			/* pcrel_offset */
   1160 
   1161   HOWTO (R_ARM_LDR_SB_G1,	/* type */
   1162 	 0,			/* rightshift */
   1163 	 4,			/* size */
   1164 	 32,			/* bitsize */
   1165 	 true,			/* pc_relative */
   1166 	 0,			/* bitpos */
   1167 	 complain_overflow_dont,/* complain_on_overflow */
   1168 	 bfd_elf_generic_reloc,	/* special_function */
   1169 	 "R_ARM_LDR_SB_G1",	/* name */
   1170 	 false,			/* partial_inplace */
   1171 	 0xffffffff,		/* src_mask */
   1172 	 0xffffffff,		/* dst_mask */
   1173 	 true),			/* pcrel_offset */
   1174 
   1175   HOWTO (R_ARM_LDR_SB_G2,	/* type */
   1176 	 0,			/* rightshift */
   1177 	 4,			/* size */
   1178 	 32,			/* bitsize */
   1179 	 true,			/* pc_relative */
   1180 	 0,			/* bitpos */
   1181 	 complain_overflow_dont,/* complain_on_overflow */
   1182 	 bfd_elf_generic_reloc,	/* special_function */
   1183 	 "R_ARM_LDR_SB_G2",	/* name */
   1184 	 false,			/* partial_inplace */
   1185 	 0xffffffff,		/* src_mask */
   1186 	 0xffffffff,		/* dst_mask */
   1187 	 true),			/* pcrel_offset */
   1188 
   1189   HOWTO (R_ARM_LDRS_SB_G0,	/* type */
   1190 	 0,			/* rightshift */
   1191 	 4,			/* size */
   1192 	 32,			/* bitsize */
   1193 	 true,			/* pc_relative */
   1194 	 0,			/* bitpos */
   1195 	 complain_overflow_dont,/* complain_on_overflow */
   1196 	 bfd_elf_generic_reloc,	/* special_function */
   1197 	 "R_ARM_LDRS_SB_G0",	/* name */
   1198 	 false,			/* partial_inplace */
   1199 	 0xffffffff,		/* src_mask */
   1200 	 0xffffffff,		/* dst_mask */
   1201 	 true),			/* pcrel_offset */
   1202 
   1203   HOWTO (R_ARM_LDRS_SB_G1,	/* type */
   1204 	 0,			/* rightshift */
   1205 	 4,			/* size */
   1206 	 32,			/* bitsize */
   1207 	 true,			/* pc_relative */
   1208 	 0,			/* bitpos */
   1209 	 complain_overflow_dont,/* complain_on_overflow */
   1210 	 bfd_elf_generic_reloc,	/* special_function */
   1211 	 "R_ARM_LDRS_SB_G1",	/* name */
   1212 	 false,			/* partial_inplace */
   1213 	 0xffffffff,		/* src_mask */
   1214 	 0xffffffff,		/* dst_mask */
   1215 	 true),			/* pcrel_offset */
   1216 
   1217   HOWTO (R_ARM_LDRS_SB_G2,	/* type */
   1218 	 0,			/* rightshift */
   1219 	 4,			/* size */
   1220 	 32,			/* bitsize */
   1221 	 true,			/* pc_relative */
   1222 	 0,			/* bitpos */
   1223 	 complain_overflow_dont,/* complain_on_overflow */
   1224 	 bfd_elf_generic_reloc,	/* special_function */
   1225 	 "R_ARM_LDRS_SB_G2",	/* name */
   1226 	 false,			/* partial_inplace */
   1227 	 0xffffffff,		/* src_mask */
   1228 	 0xffffffff,		/* dst_mask */
   1229 	 true),			/* pcrel_offset */
   1230 
   1231   HOWTO (R_ARM_LDC_SB_G0,	/* type */
   1232 	 0,			/* rightshift */
   1233 	 4,			/* size */
   1234 	 32,			/* bitsize */
   1235 	 true,			/* pc_relative */
   1236 	 0,			/* bitpos */
   1237 	 complain_overflow_dont,/* complain_on_overflow */
   1238 	 bfd_elf_generic_reloc,	/* special_function */
   1239 	 "R_ARM_LDC_SB_G0",	/* name */
   1240 	 false,			/* partial_inplace */
   1241 	 0xffffffff,		/* src_mask */
   1242 	 0xffffffff,		/* dst_mask */
   1243 	 true),			/* pcrel_offset */
   1244 
   1245   HOWTO (R_ARM_LDC_SB_G1,	/* type */
   1246 	 0,			/* rightshift */
   1247 	 4,			/* size */
   1248 	 32,			/* bitsize */
   1249 	 true,			/* pc_relative */
   1250 	 0,			/* bitpos */
   1251 	 complain_overflow_dont,/* complain_on_overflow */
   1252 	 bfd_elf_generic_reloc,	/* special_function */
   1253 	 "R_ARM_LDC_SB_G1",	/* name */
   1254 	 false,			/* partial_inplace */
   1255 	 0xffffffff,		/* src_mask */
   1256 	 0xffffffff,		/* dst_mask */
   1257 	 true),			/* pcrel_offset */
   1258 
   1259   HOWTO (R_ARM_LDC_SB_G2,	/* type */
   1260 	 0,			/* rightshift */
   1261 	 4,			/* size */
   1262 	 32,			/* bitsize */
   1263 	 true,			/* pc_relative */
   1264 	 0,			/* bitpos */
   1265 	 complain_overflow_dont,/* complain_on_overflow */
   1266 	 bfd_elf_generic_reloc,	/* special_function */
   1267 	 "R_ARM_LDC_SB_G2",	/* name */
   1268 	 false,			/* partial_inplace */
   1269 	 0xffffffff,		/* src_mask */
   1270 	 0xffffffff,		/* dst_mask */
   1271 	 true),			/* pcrel_offset */
   1272 
   1273   /* End of group relocations.  */
   1274 
   1275   HOWTO (R_ARM_MOVW_BREL_NC,	/* type */
   1276 	 0,			/* rightshift */
   1277 	 4,			/* size */
   1278 	 16,			/* bitsize */
   1279 	 false,			/* pc_relative */
   1280 	 0,			/* bitpos */
   1281 	 complain_overflow_dont,/* complain_on_overflow */
   1282 	 bfd_elf_generic_reloc,	/* special_function */
   1283 	 "R_ARM_MOVW_BREL_NC",	/* name */
   1284 	 false,			/* partial_inplace */
   1285 	 0x0000ffff,		/* src_mask */
   1286 	 0x0000ffff,		/* dst_mask */
   1287 	 false),		/* pcrel_offset */
   1288 
   1289   HOWTO (R_ARM_MOVT_BREL,	/* type */
   1290 	 0,			/* rightshift */
   1291 	 4,			/* size */
   1292 	 16,			/* bitsize */
   1293 	 false,			/* pc_relative */
   1294 	 0,			/* bitpos */
   1295 	 complain_overflow_bitfield,/* complain_on_overflow */
   1296 	 bfd_elf_generic_reloc,	/* special_function */
   1297 	 "R_ARM_MOVT_BREL",	/* name */
   1298 	 false,			/* partial_inplace */
   1299 	 0x0000ffff,		/* src_mask */
   1300 	 0x0000ffff,		/* dst_mask */
   1301 	 false),		/* pcrel_offset */
   1302 
   1303   HOWTO (R_ARM_MOVW_BREL,	/* type */
   1304 	 0,			/* rightshift */
   1305 	 4,			/* size */
   1306 	 16,			/* bitsize */
   1307 	 false,			/* pc_relative */
   1308 	 0,			/* bitpos */
   1309 	 complain_overflow_dont,/* complain_on_overflow */
   1310 	 bfd_elf_generic_reloc,	/* special_function */
   1311 	 "R_ARM_MOVW_BREL",	/* name */
   1312 	 false,			/* partial_inplace */
   1313 	 0x0000ffff,		/* src_mask */
   1314 	 0x0000ffff,		/* dst_mask */
   1315 	 false),		/* pcrel_offset */
   1316 
   1317   HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
   1318 	 0,			/* rightshift */
   1319 	 4,			/* size */
   1320 	 16,			/* bitsize */
   1321 	 false,			/* pc_relative */
   1322 	 0,			/* bitpos */
   1323 	 complain_overflow_dont,/* complain_on_overflow */
   1324 	 bfd_elf_generic_reloc,	/* special_function */
   1325 	 "R_ARM_THM_MOVW_BREL_NC",/* name */
   1326 	 false,			/* partial_inplace */
   1327 	 0x040f70ff,		/* src_mask */
   1328 	 0x040f70ff,		/* dst_mask */
   1329 	 false),		/* pcrel_offset */
   1330 
   1331   HOWTO (R_ARM_THM_MOVT_BREL,	/* type */
   1332 	 0,			/* rightshift */
   1333 	 4,			/* size */
   1334 	 16,			/* bitsize */
   1335 	 false,			/* pc_relative */
   1336 	 0,			/* bitpos */
   1337 	 complain_overflow_bitfield,/* complain_on_overflow */
   1338 	 bfd_elf_generic_reloc,	/* special_function */
   1339 	 "R_ARM_THM_MOVT_BREL",	/* name */
   1340 	 false,			/* partial_inplace */
   1341 	 0x040f70ff,		/* src_mask */
   1342 	 0x040f70ff,		/* dst_mask */
   1343 	 false),		/* pcrel_offset */
   1344 
   1345   HOWTO (R_ARM_THM_MOVW_BREL,	/* type */
   1346 	 0,			/* rightshift */
   1347 	 4,			/* size */
   1348 	 16,			/* bitsize */
   1349 	 false,			/* pc_relative */
   1350 	 0,			/* bitpos */
   1351 	 complain_overflow_dont,/* complain_on_overflow */
   1352 	 bfd_elf_generic_reloc,	/* special_function */
   1353 	 "R_ARM_THM_MOVW_BREL",	/* name */
   1354 	 false,			/* partial_inplace */
   1355 	 0x040f70ff,		/* src_mask */
   1356 	 0x040f70ff,		/* dst_mask */
   1357 	 false),		/* pcrel_offset */
   1358 
   1359   HOWTO (R_ARM_TLS_GOTDESC,	/* type */
   1360 	 0,			/* rightshift */
   1361 	 4,			/* size */
   1362 	 32,			/* bitsize */
   1363 	 false,			/* pc_relative */
   1364 	 0,			/* bitpos */
   1365 	 complain_overflow_bitfield,/* complain_on_overflow */
   1366 	 NULL,			/* special_function */
   1367 	 "R_ARM_TLS_GOTDESC",	/* name */
   1368 	 true,			/* partial_inplace */
   1369 	 0xffffffff,		/* src_mask */
   1370 	 0xffffffff,		/* dst_mask */
   1371 	 false),		/* pcrel_offset */
   1372 
   1373   HOWTO (R_ARM_TLS_CALL,	/* type */
   1374 	 0,			/* rightshift */
   1375 	 4,			/* size */
   1376 	 24,			/* bitsize */
   1377 	 false,			/* pc_relative */
   1378 	 0,			/* bitpos */
   1379 	 complain_overflow_dont,/* complain_on_overflow */
   1380 	 bfd_elf_generic_reloc,	/* special_function */
   1381 	 "R_ARM_TLS_CALL",	/* name */
   1382 	 false,			/* partial_inplace */
   1383 	 0x00ffffff,		/* src_mask */
   1384 	 0x00ffffff,		/* dst_mask */
   1385 	 false),		/* pcrel_offset */
   1386 
   1387   HOWTO (R_ARM_TLS_DESCSEQ,	/* type */
   1388 	 0,			/* rightshift */
   1389 	 4,			/* size */
   1390 	 0,			/* bitsize */
   1391 	 false,			/* pc_relative */
   1392 	 0,			/* bitpos */
   1393 	 complain_overflow_dont,/* complain_on_overflow */
   1394 	 bfd_elf_generic_reloc,	/* special_function */
   1395 	 "R_ARM_TLS_DESCSEQ",	/* name */
   1396 	 false,			/* partial_inplace */
   1397 	 0x00000000,		/* src_mask */
   1398 	 0x00000000,		/* dst_mask */
   1399 	 false),		/* pcrel_offset */
   1400 
   1401   HOWTO (R_ARM_THM_TLS_CALL,	/* type */
   1402 	 0,			/* rightshift */
   1403 	 4,			/* size */
   1404 	 24,			/* bitsize */
   1405 	 false,			/* pc_relative */
   1406 	 0,			/* bitpos */
   1407 	 complain_overflow_dont,/* complain_on_overflow */
   1408 	 bfd_elf_generic_reloc,	/* special_function */
   1409 	 "R_ARM_THM_TLS_CALL",	/* name */
   1410 	 false,			/* partial_inplace */
   1411 	 0x07ff07ff,		/* src_mask */
   1412 	 0x07ff07ff,		/* dst_mask */
   1413 	 false),		/* pcrel_offset */
   1414 
   1415   HOWTO (R_ARM_PLT32_ABS,	/* type */
   1416 	 0,			/* rightshift */
   1417 	 4,			/* size */
   1418 	 32,			/* bitsize */
   1419 	 false,			/* pc_relative */
   1420 	 0,			/* bitpos */
   1421 	 complain_overflow_dont,/* complain_on_overflow */
   1422 	 bfd_elf_generic_reloc,	/* special_function */
   1423 	 "R_ARM_PLT32_ABS",	/* name */
   1424 	 false,			/* partial_inplace */
   1425 	 0xffffffff,		/* src_mask */
   1426 	 0xffffffff,		/* dst_mask */
   1427 	 false),		/* pcrel_offset */
   1428 
   1429   HOWTO (R_ARM_GOT_ABS,		/* type */
   1430 	 0,			/* rightshift */
   1431 	 4,			/* size */
   1432 	 32,			/* bitsize */
   1433 	 false,			/* pc_relative */
   1434 	 0,			/* bitpos */
   1435 	 complain_overflow_dont,/* complain_on_overflow */
   1436 	 bfd_elf_generic_reloc,	/* special_function */
   1437 	 "R_ARM_GOT_ABS",	/* name */
   1438 	 false,			/* partial_inplace */
   1439 	 0xffffffff,		/* src_mask */
   1440 	 0xffffffff,		/* dst_mask */
   1441 	 false),			/* pcrel_offset */
   1442 
   1443   HOWTO (R_ARM_GOT_PREL,	/* type */
   1444 	 0,			/* rightshift */
   1445 	 4,			/* size */
   1446 	 32,			/* bitsize */
   1447 	 true,			/* pc_relative */
   1448 	 0,			/* bitpos */
   1449 	 complain_overflow_dont,	/* complain_on_overflow */
   1450 	 bfd_elf_generic_reloc,	/* special_function */
   1451 	 "R_ARM_GOT_PREL",	/* name */
   1452 	 false,			/* partial_inplace */
   1453 	 0xffffffff,		/* src_mask */
   1454 	 0xffffffff,		/* dst_mask */
   1455 	 true),			/* pcrel_offset */
   1456 
   1457   HOWTO (R_ARM_GOT_BREL12,	/* type */
   1458 	 0,			/* rightshift */
   1459 	 4,			/* size */
   1460 	 12,			/* bitsize */
   1461 	 false,			/* pc_relative */
   1462 	 0,			/* bitpos */
   1463 	 complain_overflow_bitfield,/* complain_on_overflow */
   1464 	 bfd_elf_generic_reloc,	/* special_function */
   1465 	 "R_ARM_GOT_BREL12",	/* name */
   1466 	 false,			/* partial_inplace */
   1467 	 0x00000fff,		/* src_mask */
   1468 	 0x00000fff,		/* dst_mask */
   1469 	 false),		/* pcrel_offset */
   1470 
   1471   HOWTO (R_ARM_GOTOFF12,	/* type */
   1472 	 0,			/* rightshift */
   1473 	 4,			/* size */
   1474 	 12,			/* bitsize */
   1475 	 false,			/* pc_relative */
   1476 	 0,			/* bitpos */
   1477 	 complain_overflow_bitfield,/* complain_on_overflow */
   1478 	 bfd_elf_generic_reloc,	/* special_function */
   1479 	 "R_ARM_GOTOFF12",	/* name */
   1480 	 false,			/* partial_inplace */
   1481 	 0x00000fff,		/* src_mask */
   1482 	 0x00000fff,		/* dst_mask */
   1483 	 false),		/* pcrel_offset */
   1484 
   1485   EMPTY_HOWTO (R_ARM_GOTRELAX),	 /* reserved for future GOT-load optimizations */
   1486 
   1487   /* GNU extension to record C++ vtable member usage */
   1488   HOWTO (R_ARM_GNU_VTENTRY,	/* type */
   1489 	 0,			/* rightshift */
   1490 	 4,			/* size */
   1491 	 0,			/* bitsize */
   1492 	 false,			/* pc_relative */
   1493 	 0,			/* bitpos */
   1494 	 complain_overflow_dont, /* complain_on_overflow */
   1495 	 _bfd_elf_rel_vtable_reloc_fn,	/* special_function */
   1496 	 "R_ARM_GNU_VTENTRY",	/* name */
   1497 	 false,			/* partial_inplace */
   1498 	 0,			/* src_mask */
   1499 	 0,			/* dst_mask */
   1500 	 false),		/* pcrel_offset */
   1501 
   1502   /* GNU extension to record C++ vtable hierarchy */
   1503   HOWTO (R_ARM_GNU_VTINHERIT, /* type */
   1504 	 0,			/* rightshift */
   1505 	 4,			/* size */
   1506 	 0,			/* bitsize */
   1507 	 false,			/* pc_relative */
   1508 	 0,			/* bitpos */
   1509 	 complain_overflow_dont, /* complain_on_overflow */
   1510 	 NULL,			/* special_function */
   1511 	 "R_ARM_GNU_VTINHERIT", /* name */
   1512 	 false,			/* partial_inplace */
   1513 	 0,			/* src_mask */
   1514 	 0,			/* dst_mask */
   1515 	 false),		/* pcrel_offset */
   1516 
   1517   HOWTO (R_ARM_THM_JUMP11,	/* type */
   1518 	 1,			/* rightshift */
   1519 	 2,			/* size */
   1520 	 11,			/* bitsize */
   1521 	 true,			/* pc_relative */
   1522 	 0,			/* bitpos */
   1523 	 complain_overflow_signed,	/* complain_on_overflow */
   1524 	 bfd_elf_generic_reloc,	/* special_function */
   1525 	 "R_ARM_THM_JUMP11",	/* name */
   1526 	 false,			/* partial_inplace */
   1527 	 0x000007ff,		/* src_mask */
   1528 	 0x000007ff,		/* dst_mask */
   1529 	 true),			/* pcrel_offset */
   1530 
   1531   HOWTO (R_ARM_THM_JUMP8,	/* type */
   1532 	 1,			/* rightshift */
   1533 	 2,			/* size */
   1534 	 8,			/* bitsize */
   1535 	 true,			/* pc_relative */
   1536 	 0,			/* bitpos */
   1537 	 complain_overflow_signed,	/* complain_on_overflow */
   1538 	 bfd_elf_generic_reloc,	/* special_function */
   1539 	 "R_ARM_THM_JUMP8",	/* name */
   1540 	 false,			/* partial_inplace */
   1541 	 0x000000ff,		/* src_mask */
   1542 	 0x000000ff,		/* dst_mask */
   1543 	 true),			/* pcrel_offset */
   1544 
   1545   /* TLS relocations */
   1546   HOWTO (R_ARM_TLS_GD32,	/* type */
   1547 	 0,			/* rightshift */
   1548 	 4,			/* size */
   1549 	 32,			/* bitsize */
   1550 	 false,			/* pc_relative */
   1551 	 0,			/* bitpos */
   1552 	 complain_overflow_bitfield,/* complain_on_overflow */
   1553 	 NULL,			/* special_function */
   1554 	 "R_ARM_TLS_GD32",	/* name */
   1555 	 true,			/* partial_inplace */
   1556 	 0xffffffff,		/* src_mask */
   1557 	 0xffffffff,		/* dst_mask */
   1558 	 false),		/* pcrel_offset */
   1559 
   1560   HOWTO (R_ARM_TLS_LDM32,	/* type */
   1561 	 0,			/* rightshift */
   1562 	 4,			/* size */
   1563 	 32,			/* bitsize */
   1564 	 false,			/* pc_relative */
   1565 	 0,			/* bitpos */
   1566 	 complain_overflow_bitfield,/* complain_on_overflow */
   1567 	 bfd_elf_generic_reloc, /* special_function */
   1568 	 "R_ARM_TLS_LDM32",	/* name */
   1569 	 true,			/* partial_inplace */
   1570 	 0xffffffff,		/* src_mask */
   1571 	 0xffffffff,		/* dst_mask */
   1572 	 false),		/* pcrel_offset */
   1573 
   1574   HOWTO (R_ARM_TLS_LDO32,	/* type */
   1575 	 0,			/* rightshift */
   1576 	 4,			/* size */
   1577 	 32,			/* bitsize */
   1578 	 false,			/* pc_relative */
   1579 	 0,			/* bitpos */
   1580 	 complain_overflow_bitfield,/* complain_on_overflow */
   1581 	 bfd_elf_generic_reloc, /* special_function */
   1582 	 "R_ARM_TLS_LDO32",	/* name */
   1583 	 true,			/* partial_inplace */
   1584 	 0xffffffff,		/* src_mask */
   1585 	 0xffffffff,		/* dst_mask */
   1586 	 false),		/* pcrel_offset */
   1587 
   1588   HOWTO (R_ARM_TLS_IE32,	/* type */
   1589 	 0,			/* rightshift */
   1590 	 4,			/* size */
   1591 	 32,			/* bitsize */
   1592 	 false,			 /* pc_relative */
   1593 	 0,			/* bitpos */
   1594 	 complain_overflow_bitfield,/* complain_on_overflow */
   1595 	 NULL,			/* special_function */
   1596 	 "R_ARM_TLS_IE32",	/* name */
   1597 	 true,			/* partial_inplace */
   1598 	 0xffffffff,		/* src_mask */
   1599 	 0xffffffff,		/* dst_mask */
   1600 	 false),		/* pcrel_offset */
   1601 
   1602   HOWTO (R_ARM_TLS_LE32,	/* type */
   1603 	 0,			/* rightshift */
   1604 	 4,			/* size */
   1605 	 32,			/* bitsize */
   1606 	 false,			/* pc_relative */
   1607 	 0,			/* bitpos */
   1608 	 complain_overflow_bitfield,/* complain_on_overflow */
   1609 	 NULL,			/* special_function */
   1610 	 "R_ARM_TLS_LE32",	/* name */
   1611 	 true,			/* partial_inplace */
   1612 	 0xffffffff,		/* src_mask */
   1613 	 0xffffffff,		/* dst_mask */
   1614 	 false),		/* pcrel_offset */
   1615 
   1616   HOWTO (R_ARM_TLS_LDO12,	/* type */
   1617 	 0,			/* rightshift */
   1618 	 4,			/* size */
   1619 	 12,			/* bitsize */
   1620 	 false,			/* pc_relative */
   1621 	 0,			/* bitpos */
   1622 	 complain_overflow_bitfield,/* complain_on_overflow */
   1623 	 bfd_elf_generic_reloc,	/* special_function */
   1624 	 "R_ARM_TLS_LDO12",	/* name */
   1625 	 false,			/* partial_inplace */
   1626 	 0x00000fff,		/* src_mask */
   1627 	 0x00000fff,		/* dst_mask */
   1628 	 false),		/* pcrel_offset */
   1629 
   1630   HOWTO (R_ARM_TLS_LE12,	/* type */
   1631 	 0,			/* rightshift */
   1632 	 4,			/* size */
   1633 	 12,			/* bitsize */
   1634 	 false,			/* pc_relative */
   1635 	 0,			/* bitpos */
   1636 	 complain_overflow_bitfield,/* complain_on_overflow */
   1637 	 bfd_elf_generic_reloc,	/* special_function */
   1638 	 "R_ARM_TLS_LE12",	/* name */
   1639 	 false,			/* partial_inplace */
   1640 	 0x00000fff,		/* src_mask */
   1641 	 0x00000fff,		/* dst_mask */
   1642 	 false),		/* pcrel_offset */
   1643 
   1644   HOWTO (R_ARM_TLS_IE12GP,	/* type */
   1645 	 0,			/* rightshift */
   1646 	 4,			/* size */
   1647 	 12,			/* bitsize */
   1648 	 false,			/* pc_relative */
   1649 	 0,			/* bitpos */
   1650 	 complain_overflow_bitfield,/* complain_on_overflow */
   1651 	 bfd_elf_generic_reloc,	/* special_function */
   1652 	 "R_ARM_TLS_IE12GP",	/* name */
   1653 	 false,			/* partial_inplace */
   1654 	 0x00000fff,		/* src_mask */
   1655 	 0x00000fff,		/* dst_mask */
   1656 	 false),		/* pcrel_offset */
   1657 
   1658   /* 112-127 private relocations.  */
   1659   EMPTY_HOWTO (112),
   1660   EMPTY_HOWTO (113),
   1661   EMPTY_HOWTO (114),
   1662   EMPTY_HOWTO (115),
   1663   EMPTY_HOWTO (116),
   1664   EMPTY_HOWTO (117),
   1665   EMPTY_HOWTO (118),
   1666   EMPTY_HOWTO (119),
   1667   EMPTY_HOWTO (120),
   1668   EMPTY_HOWTO (121),
   1669   EMPTY_HOWTO (122),
   1670   EMPTY_HOWTO (123),
   1671   EMPTY_HOWTO (124),
   1672   EMPTY_HOWTO (125),
   1673   EMPTY_HOWTO (126),
   1674   EMPTY_HOWTO (127),
   1675 
   1676   /* R_ARM_ME_TOO, obsolete.  */
   1677   EMPTY_HOWTO (128),
   1678 
   1679   HOWTO (R_ARM_THM_TLS_DESCSEQ,	/* type */
   1680 	 0,			/* rightshift */
   1681 	 2,			/* size */
   1682 	 0,			/* bitsize */
   1683 	 false,			/* pc_relative */
   1684 	 0,			/* bitpos */
   1685 	 complain_overflow_dont,/* complain_on_overflow */
   1686 	 bfd_elf_generic_reloc,	/* special_function */
   1687 	 "R_ARM_THM_TLS_DESCSEQ",/* name */
   1688 	 false,			/* partial_inplace */
   1689 	 0x00000000,		/* src_mask */
   1690 	 0x00000000,		/* dst_mask */
   1691 	 false),		/* pcrel_offset */
   1692   EMPTY_HOWTO (130),
   1693   EMPTY_HOWTO (131),
   1694   HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type.  */
   1695 	 0,			/* rightshift.  */
   1696 	 2,			/* size.  */
   1697 	 16,			/* bitsize.  */
   1698 	 false,			/* pc_relative.  */
   1699 	 0,			/* bitpos.  */
   1700 	 complain_overflow_bitfield,/* complain_on_overflow.  */
   1701 	 bfd_elf_generic_reloc,	/* special_function.  */
   1702 	 "R_ARM_THM_ALU_ABS_G0_NC",/* name.  */
   1703 	 false,			/* partial_inplace.  */
   1704 	 0x00000000,		/* src_mask.  */
   1705 	 0x00000000,		/* dst_mask.  */
   1706 	 false),		/* pcrel_offset.  */
   1707   HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type.  */
   1708 	 0,			/* rightshift.  */
   1709 	 2,			/* size.  */
   1710 	 16,			/* bitsize.  */
   1711 	 false,			/* pc_relative.  */
   1712 	 0,			/* bitpos.  */
   1713 	 complain_overflow_bitfield,/* complain_on_overflow.  */
   1714 	 bfd_elf_generic_reloc,	/* special_function.  */
   1715 	 "R_ARM_THM_ALU_ABS_G1_NC",/* name.  */
   1716 	 false,			/* partial_inplace.  */
   1717 	 0x00000000,		/* src_mask.  */
   1718 	 0x00000000,		/* dst_mask.  */
   1719 	 false),		/* pcrel_offset.  */
   1720   HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type.  */
   1721 	 0,			/* rightshift.  */
   1722 	 2,			/* size.  */
   1723 	 16,			/* bitsize.  */
   1724 	 false,			/* pc_relative.  */
   1725 	 0,			/* bitpos.  */
   1726 	 complain_overflow_bitfield,/* complain_on_overflow.  */
   1727 	 bfd_elf_generic_reloc,	/* special_function.  */
   1728 	 "R_ARM_THM_ALU_ABS_G2_NC",/* name.  */
   1729 	 false,			/* partial_inplace.  */
   1730 	 0x00000000,		/* src_mask.  */
   1731 	 0x00000000,		/* dst_mask.  */
   1732 	 false),		/* pcrel_offset.  */
   1733   HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type.  */
   1734 	 0,			/* rightshift.  */
   1735 	 2,			/* size.  */
   1736 	 16,			/* bitsize.  */
   1737 	 false,			/* pc_relative.  */
   1738 	 0,			/* bitpos.  */
   1739 	 complain_overflow_bitfield,/* complain_on_overflow.  */
   1740 	 bfd_elf_generic_reloc,	/* special_function.  */
   1741 	 "R_ARM_THM_ALU_ABS_G3_NC",/* name.  */
   1742 	 false,			/* partial_inplace.  */
   1743 	 0x00000000,		/* src_mask.  */
   1744 	 0x00000000,		/* dst_mask.  */
   1745 	 false),		/* pcrel_offset.  */
   1746   /* Relocations for Armv8.1-M Mainline.  */
   1747   HOWTO (R_ARM_THM_BF16,	/* type.  */
   1748 	 0,			/* rightshift.  */
   1749 	 2,			/* size.  */
   1750 	 16,			/* bitsize.  */
   1751 	 true,			/* pc_relative.  */
   1752 	 0,			/* bitpos.  */
   1753 	 complain_overflow_dont,/* do not complain_on_overflow.  */
   1754 	 bfd_elf_generic_reloc,	/* special_function.  */
   1755 	 "R_ARM_THM_BF16",	/* name.  */
   1756 	 false,			/* partial_inplace.  */
   1757 	 0x001f0ffe,		/* src_mask.  */
   1758 	 0x001f0ffe,		/* dst_mask.  */
   1759 	 true),			/* pcrel_offset.  */
   1760   HOWTO (R_ARM_THM_BF12,	/* type.  */
   1761 	 0,			/* rightshift.  */
   1762 	 2,			/* size.  */
   1763 	 12,			/* bitsize.  */
   1764 	 true,			/* pc_relative.  */
   1765 	 0,			/* bitpos.  */
   1766 	 complain_overflow_dont,/* do not complain_on_overflow.  */
   1767 	 bfd_elf_generic_reloc,	/* special_function.  */
   1768 	 "R_ARM_THM_BF12",	/* name.  */
   1769 	 false,			/* partial_inplace.  */
   1770 	 0x00010ffe,		/* src_mask.  */
   1771 	 0x00010ffe,		/* dst_mask.  */
   1772 	 true),			/* pcrel_offset.  */
   1773   HOWTO (R_ARM_THM_BF18,	/* type.  */
   1774 	 0,			/* rightshift.  */
   1775 	 2,			/* size.  */
   1776 	 18,			/* bitsize.  */
   1777 	 true,			/* pc_relative.  */
   1778 	 0,			/* bitpos.  */
   1779 	 complain_overflow_dont,/* do not complain_on_overflow.  */
   1780 	 bfd_elf_generic_reloc,	/* special_function.  */
   1781 	 "R_ARM_THM_BF18",	/* name.  */
   1782 	 false,			/* partial_inplace.  */
   1783 	 0x007f0ffe,		/* src_mask.  */
   1784 	 0x007f0ffe,		/* dst_mask.  */
   1785 	 true),			/* pcrel_offset.  */
   1786 };
   1787 
   1788 /* 160 onwards: */
   1789 static reloc_howto_type elf32_arm_howto_table_2[8] =
   1790 {
   1791   HOWTO (R_ARM_IRELATIVE,	/* type */
   1792 	 0,			/* rightshift */
   1793 	 4,			/* size */
   1794 	 32,			/* bitsize */
   1795 	 false,			/* pc_relative */
   1796 	 0,			/* bitpos */
   1797 	 complain_overflow_bitfield,/* complain_on_overflow */
   1798 	 bfd_elf_generic_reloc, /* special_function */
   1799 	 "R_ARM_IRELATIVE",	/* name */
   1800 	 true,			/* partial_inplace */
   1801 	 0xffffffff,		/* src_mask */
   1802 	 0xffffffff,		/* dst_mask */
   1803 	 false),		/* pcrel_offset */
   1804   HOWTO (R_ARM_GOTFUNCDESC,	/* type */
   1805 	 0,			/* rightshift */
   1806 	 4,			/* size */
   1807 	 32,			/* bitsize */
   1808 	 false,			/* pc_relative */
   1809 	 0,			/* bitpos */
   1810 	 complain_overflow_bitfield,/* complain_on_overflow */
   1811 	 bfd_elf_generic_reloc,	/* special_function */
   1812 	 "R_ARM_GOTFUNCDESC",	/* name */
   1813 	 false,			/* partial_inplace */
   1814 	 0,			/* src_mask */
   1815 	 0xffffffff,		/* dst_mask */
   1816 	 false),		/* pcrel_offset */
   1817   HOWTO (R_ARM_GOTOFFFUNCDESC, /* type */
   1818 	 0,			/* rightshift */
   1819 	 4,			/* size */
   1820 	 32,			/* bitsize */
   1821 	 false,			/* pc_relative */
   1822 	 0,			/* bitpos */
   1823 	 complain_overflow_bitfield,/* complain_on_overflow */
   1824 	 bfd_elf_generic_reloc,	/* special_function */
   1825 	 "R_ARM_GOTOFFFUNCDESC",/* name */
   1826 	 false,			/* partial_inplace */
   1827 	 0,			/* src_mask */
   1828 	 0xffffffff,		/* dst_mask */
   1829 	 false),		/* pcrel_offset */
   1830   HOWTO (R_ARM_FUNCDESC,	/* type */
   1831 	 0,			/* rightshift */
   1832 	 4,			/* size */
   1833 	 32,			/* bitsize */
   1834 	 false,			/* pc_relative */
   1835 	 0,			/* bitpos */
   1836 	 complain_overflow_bitfield,/* complain_on_overflow */
   1837 	 bfd_elf_generic_reloc,	/* special_function */
   1838 	 "R_ARM_FUNCDESC",	/* name */
   1839 	 false,			/* partial_inplace */
   1840 	 0,			/* src_mask */
   1841 	 0xffffffff,		/* dst_mask */
   1842 	 false),		/* pcrel_offset */
   1843   HOWTO (R_ARM_FUNCDESC_VALUE,	/* type */
   1844 	 0,			/* rightshift */
   1845 	 4,			/* size */
   1846 	 64,			/* bitsize */
   1847 	 false,			/* pc_relative */
   1848 	 0,			/* bitpos */
   1849 	 complain_overflow_bitfield,/* complain_on_overflow */
   1850 	 bfd_elf_generic_reloc,	/* special_function */
   1851 	 "R_ARM_FUNCDESC_VALUE",/* name */
   1852 	 false,			/* partial_inplace */
   1853 	 0,			/* src_mask */
   1854 	 0xffffffff,		/* dst_mask */
   1855 	 false),		/* pcrel_offset */
   1856   HOWTO (R_ARM_TLS_GD32_FDPIC,	/* type */
   1857 	 0,			/* rightshift */
   1858 	 4,			/* size */
   1859 	 32,			/* bitsize */
   1860 	 false,			/* pc_relative */
   1861 	 0,			/* bitpos */
   1862 	 complain_overflow_bitfield,/* complain_on_overflow */
   1863 	 bfd_elf_generic_reloc,	/* special_function */
   1864 	 "R_ARM_TLS_GD32_FDPIC",/* name */
   1865 	 false,			/* partial_inplace */
   1866 	 0,			/* src_mask */
   1867 	 0xffffffff,		/* dst_mask */
   1868 	 false),		/* pcrel_offset */
   1869   HOWTO (R_ARM_TLS_LDM32_FDPIC,	/* type */
   1870 	 0,			/* rightshift */
   1871 	 4,			/* size */
   1872 	 32,			/* bitsize */
   1873 	 false,			/* pc_relative */
   1874 	 0,			/* bitpos */
   1875 	 complain_overflow_bitfield,/* complain_on_overflow */
   1876 	 bfd_elf_generic_reloc,	/* special_function */
   1877 	 "R_ARM_TLS_LDM32_FDPIC",/* name */
   1878 	 false,			/* partial_inplace */
   1879 	 0,			/* src_mask */
   1880 	 0xffffffff,		/* dst_mask */
   1881 	 false),		/* pcrel_offset */
   1882   HOWTO (R_ARM_TLS_IE32_FDPIC,	/* type */
   1883 	 0,			/* rightshift */
   1884 	 4,			/* size */
   1885 	 32,			/* bitsize */
   1886 	 false,			/* pc_relative */
   1887 	 0,			/* bitpos */
   1888 	 complain_overflow_bitfield,/* complain_on_overflow */
   1889 	 bfd_elf_generic_reloc,	/* special_function */
   1890 	 "R_ARM_TLS_IE32_FDPIC",/* name */
   1891 	 false,			/* partial_inplace */
   1892 	 0,			/* src_mask */
   1893 	 0xffffffff,		/* dst_mask */
   1894 	 false),		/* pcrel_offset */
   1895 };
   1896 
   1897 /* 249-255 extended, currently unused, relocations:  */
   1898 static reloc_howto_type elf32_arm_howto_table_3[4] =
   1899 {
   1900   HOWTO (R_ARM_RREL32,		/* type */
   1901 	 0,			/* rightshift */
   1902 	 0,			/* size */
   1903 	 0,			/* bitsize */
   1904 	 false,			/* pc_relative */
   1905 	 0,			/* bitpos */
   1906 	 complain_overflow_dont,/* complain_on_overflow */
   1907 	 bfd_elf_generic_reloc,	/* special_function */
   1908 	 "R_ARM_RREL32",	/* name */
   1909 	 false,			/* partial_inplace */
   1910 	 0,			/* src_mask */
   1911 	 0,			/* dst_mask */
   1912 	 false),		/* pcrel_offset */
   1913 
   1914   HOWTO (R_ARM_RABS32,		/* type */
   1915 	 0,			/* rightshift */
   1916 	 0,			/* size */
   1917 	 0,			/* bitsize */
   1918 	 false,			/* pc_relative */
   1919 	 0,			/* bitpos */
   1920 	 complain_overflow_dont,/* complain_on_overflow */
   1921 	 bfd_elf_generic_reloc,	/* special_function */
   1922 	 "R_ARM_RABS32",	/* name */
   1923 	 false,			/* partial_inplace */
   1924 	 0,			/* src_mask */
   1925 	 0,			/* dst_mask */
   1926 	 false),		/* pcrel_offset */
   1927 
   1928   HOWTO (R_ARM_RPC24,		/* type */
   1929 	 0,			/* rightshift */
   1930 	 0,			/* size */
   1931 	 0,			/* bitsize */
   1932 	 false,			/* pc_relative */
   1933 	 0,			/* bitpos */
   1934 	 complain_overflow_dont,/* complain_on_overflow */
   1935 	 bfd_elf_generic_reloc,	/* special_function */
   1936 	 "R_ARM_RPC24",		/* name */
   1937 	 false,			/* partial_inplace */
   1938 	 0,			/* src_mask */
   1939 	 0,			/* dst_mask */
   1940 	 false),		/* pcrel_offset */
   1941 
   1942   HOWTO (R_ARM_RBASE,		/* type */
   1943 	 0,			/* rightshift */
   1944 	 0,			/* size */
   1945 	 0,			/* bitsize */
   1946 	 false,			/* pc_relative */
   1947 	 0,			/* bitpos */
   1948 	 complain_overflow_dont,/* complain_on_overflow */
   1949 	 bfd_elf_generic_reloc,	/* special_function */
   1950 	 "R_ARM_RBASE",		/* name */
   1951 	 false,			/* partial_inplace */
   1952 	 0,			/* src_mask */
   1953 	 0,			/* dst_mask */
   1954 	 false)			/* pcrel_offset */
   1955 };
   1956 
   1957 static reloc_howto_type *
   1958 elf32_arm_howto_from_type (unsigned int r_type)
   1959 {
   1960   if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
   1961     return &elf32_arm_howto_table_1[r_type];
   1962 
   1963   if (r_type >= R_ARM_IRELATIVE
   1964       && r_type < R_ARM_IRELATIVE + ARRAY_SIZE (elf32_arm_howto_table_2))
   1965     return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
   1966 
   1967   if (r_type >= R_ARM_RREL32
   1968       && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
   1969     return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
   1970 
   1971   return NULL;
   1972 }
   1973 
   1974 static bool
   1975 elf32_arm_info_to_howto (bfd * abfd, arelent * bfd_reloc,
   1976 			 Elf_Internal_Rela * elf_reloc)
   1977 {
   1978   unsigned int r_type;
   1979 
   1980   r_type = ELF32_R_TYPE (elf_reloc->r_info);
   1981   if ((bfd_reloc->howto = elf32_arm_howto_from_type (r_type)) == NULL)
   1982     {
   1983       /* xgettext:c-format */
   1984       _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
   1985 			  abfd, r_type);
   1986       bfd_set_error (bfd_error_bad_value);
   1987       return false;
   1988     }
   1989   return true;
   1990 }
   1991 
   1992 struct elf32_arm_reloc_map
   1993   {
   1994     bfd_reloc_code_real_type  bfd_reloc_val;
   1995     unsigned char	      elf_reloc_val;
   1996   };
   1997 
   1998 /* All entries in this list must also be present in elf32_arm_howto_table.  */
   1999 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
   2000   {
   2001     {BFD_RELOC_NONE,		     R_ARM_NONE},
   2002     {BFD_RELOC_ARM_PCREL_BRANCH,     R_ARM_PC24},
   2003     {BFD_RELOC_ARM_PCREL_CALL,	     R_ARM_CALL},
   2004     {BFD_RELOC_ARM_PCREL_JUMP,	     R_ARM_JUMP24},
   2005     {BFD_RELOC_ARM_PCREL_BLX,	     R_ARM_XPC25},
   2006     {BFD_RELOC_THUMB_PCREL_BLX,	     R_ARM_THM_XPC22},
   2007     {BFD_RELOC_32,		     R_ARM_ABS32},
   2008     {BFD_RELOC_32_PCREL,	     R_ARM_REL32},
   2009     {BFD_RELOC_8,		     R_ARM_ABS8},
   2010     {BFD_RELOC_16,		     R_ARM_ABS16},
   2011     {BFD_RELOC_ARM_OFFSET_IMM,	     R_ARM_ABS12},
   2012     {BFD_RELOC_ARM_THUMB_OFFSET,     R_ARM_THM_ABS5},
   2013     {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
   2014     {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
   2015     {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
   2016     {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
   2017     {BFD_RELOC_THUMB_PCREL_BRANCH9,  R_ARM_THM_JUMP8},
   2018     {BFD_RELOC_THUMB_PCREL_BRANCH7,  R_ARM_THM_JUMP6},
   2019     {BFD_RELOC_GLOB_DAT,	     R_ARM_GLOB_DAT},
   2020     {BFD_RELOC_JMP_SLOT,	     R_ARM_JUMP_SLOT},
   2021     {BFD_RELOC_RELATIVE,	     R_ARM_RELATIVE},
   2022     {BFD_RELOC_ARM_GOTOFF,	     R_ARM_GOTOFF32},
   2023     {BFD_RELOC_ARM_GOTPC,	     R_ARM_GOTPC},
   2024     {BFD_RELOC_ARM_GOT_PREL,	     R_ARM_GOT_PREL},
   2025     {BFD_RELOC_ARM_GOT32,	     R_ARM_GOT32},
   2026     {BFD_RELOC_32_PLT_PCREL,	     R_ARM_PLT32},
   2027     {BFD_RELOC_ARM_TARGET1,	     R_ARM_TARGET1},
   2028     {BFD_RELOC_ARM_ROSEGREL32,	     R_ARM_ROSEGREL32},
   2029     {BFD_RELOC_ARM_SBREL32,	     R_ARM_SBREL32},
   2030     {BFD_RELOC_ARM_PREL31,	     R_ARM_PREL31},
   2031     {BFD_RELOC_ARM_TARGET2,	     R_ARM_TARGET2},
   2032     {BFD_RELOC_ARM_TLS_GOTDESC,	     R_ARM_TLS_GOTDESC},
   2033     {BFD_RELOC_ARM_TLS_CALL,	     R_ARM_TLS_CALL},
   2034     {BFD_RELOC_ARM_THM_TLS_CALL,     R_ARM_THM_TLS_CALL},
   2035     {BFD_RELOC_ARM_TLS_DESCSEQ,	     R_ARM_TLS_DESCSEQ},
   2036     {BFD_RELOC_ARM_THM_TLS_DESCSEQ,  R_ARM_THM_TLS_DESCSEQ},
   2037     {BFD_RELOC_ARM_TLS_DESC,	     R_ARM_TLS_DESC},
   2038     {BFD_RELOC_ARM_TLS_GD32,	     R_ARM_TLS_GD32},
   2039     {BFD_RELOC_ARM_TLS_LDO32,	     R_ARM_TLS_LDO32},
   2040     {BFD_RELOC_ARM_TLS_LDM32,	     R_ARM_TLS_LDM32},
   2041     {BFD_RELOC_ARM_TLS_DTPMOD32,     R_ARM_TLS_DTPMOD32},
   2042     {BFD_RELOC_ARM_TLS_DTPOFF32,     R_ARM_TLS_DTPOFF32},
   2043     {BFD_RELOC_ARM_TLS_TPOFF32,	     R_ARM_TLS_TPOFF32},
   2044     {BFD_RELOC_ARM_TLS_IE32,	     R_ARM_TLS_IE32},
   2045     {BFD_RELOC_ARM_TLS_LE32,	     R_ARM_TLS_LE32},
   2046     {BFD_RELOC_IRELATIVE,	     R_ARM_IRELATIVE},
   2047     {BFD_RELOC_ARM_GOTFUNCDESC,      R_ARM_GOTFUNCDESC},
   2048     {BFD_RELOC_ARM_GOTOFFFUNCDESC,   R_ARM_GOTOFFFUNCDESC},
   2049     {BFD_RELOC_ARM_FUNCDESC,         R_ARM_FUNCDESC},
   2050     {BFD_RELOC_ARM_FUNCDESC_VALUE,   R_ARM_FUNCDESC_VALUE},
   2051     {BFD_RELOC_ARM_TLS_GD32_FDPIC,   R_ARM_TLS_GD32_FDPIC},
   2052     {BFD_RELOC_ARM_TLS_LDM32_FDPIC,  R_ARM_TLS_LDM32_FDPIC},
   2053     {BFD_RELOC_ARM_TLS_IE32_FDPIC,   R_ARM_TLS_IE32_FDPIC},
   2054     {BFD_RELOC_VTABLE_INHERIT,	     R_ARM_GNU_VTINHERIT},
   2055     {BFD_RELOC_VTABLE_ENTRY,	     R_ARM_GNU_VTENTRY},
   2056     {BFD_RELOC_ARM_MOVW,	     R_ARM_MOVW_ABS_NC},
   2057     {BFD_RELOC_ARM_MOVT,	     R_ARM_MOVT_ABS},
   2058     {BFD_RELOC_ARM_MOVW_PCREL,	     R_ARM_MOVW_PREL_NC},
   2059     {BFD_RELOC_ARM_MOVT_PCREL,	     R_ARM_MOVT_PREL},
   2060     {BFD_RELOC_ARM_THUMB_MOVW,	     R_ARM_THM_MOVW_ABS_NC},
   2061     {BFD_RELOC_ARM_THUMB_MOVT,	     R_ARM_THM_MOVT_ABS},
   2062     {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
   2063     {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
   2064     {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
   2065     {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
   2066     {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
   2067     {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
   2068     {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
   2069     {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
   2070     {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
   2071     {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
   2072     {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
   2073     {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
   2074     {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
   2075     {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
   2076     {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
   2077     {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
   2078     {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
   2079     {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
   2080     {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
   2081     {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
   2082     {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
   2083     {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
   2084     {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
   2085     {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
   2086     {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
   2087     {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
   2088     {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
   2089     {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
   2090     {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
   2091     {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
   2092     {BFD_RELOC_ARM_V4BX,	     R_ARM_V4BX},
   2093     {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
   2094     {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
   2095     {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
   2096     {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC},
   2097     {BFD_RELOC_ARM_THUMB_BF17, R_ARM_THM_BF16},
   2098     {BFD_RELOC_ARM_THUMB_BF13, R_ARM_THM_BF12},
   2099     {BFD_RELOC_ARM_THUMB_BF19, R_ARM_THM_BF18}
   2100   };
   2101 
   2102 static reloc_howto_type *
   2103 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
   2104 			     bfd_reloc_code_real_type code)
   2105 {
   2106   unsigned int i;
   2107 
   2108   for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
   2109     if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
   2110       return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
   2111 
   2112   return NULL;
   2113 }
   2114 
   2115 static reloc_howto_type *
   2116 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
   2117 			     const char *r_name)
   2118 {
   2119   unsigned int i;
   2120 
   2121   for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
   2122     if (elf32_arm_howto_table_1[i].name != NULL
   2123 	&& strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
   2124       return &elf32_arm_howto_table_1[i];
   2125 
   2126   for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
   2127     if (elf32_arm_howto_table_2[i].name != NULL
   2128 	&& strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
   2129       return &elf32_arm_howto_table_2[i];
   2130 
   2131   for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
   2132     if (elf32_arm_howto_table_3[i].name != NULL
   2133 	&& strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
   2134       return &elf32_arm_howto_table_3[i];
   2135 
   2136   return NULL;
   2137 }
   2138 
   2139 /* Support for core dump NOTE sections.  */
   2140 
   2141 static bool
   2142 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
   2143 {
   2144   int offset;
   2145   size_t size;
   2146 
   2147   switch (note->descsz)
   2148     {
   2149       default:
   2150 	return false;
   2151 
   2152       case 156:         /* Linux/ARM 32-bit, some pre-v5.9 linux kernels.  */
   2153 	/* There's a linux kernel bug for CONFIG_BINFMT_ELF_FDPIC=y
   2154 	   configurations, fixed by v5.9 linux kernel commit 16aead81018c
   2155 	   ("take fdpic-related parts of elf_prstatus out").
   2156 	   The bug causes the FDPIC-specific unsigned long fields
   2157 	   pr_exec_fdpic_loadmap and pr_interp_fdpic_loadmap to be added to
   2158 	   struct elf_prstatus in case the FDPIC ABI is not used.
   2159 	   The two fields are added after pr_reg, so just ignore them.  */
   2160 
   2161 	/* Fall through.  */
   2162       case 148:		/* Linux/ARM 32-bit.  */
   2163 	/* pr_cursig */
   2164 	elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
   2165 
   2166 	/* pr_pid */
   2167 	elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
   2168 
   2169 	/* pr_reg */
   2170 	offset = 72;
   2171 	size = 72;
   2172 
   2173 	break;
   2174     }
   2175 
   2176   /* Make a ".reg/999" section.  */
   2177   return _bfd_elfcore_make_pseudosection (abfd, ".reg",
   2178 					  size, note->descpos + offset);
   2179 }
   2180 
   2181 static bool
   2182 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
   2183 {
   2184   switch (note->descsz)
   2185     {
   2186       default:
   2187 	return false;
   2188 
   2189       case 124:		/* Linux/ARM elf_prpsinfo.  */
   2190 	elf_tdata (abfd)->core->pid
   2191 	 = bfd_get_32 (abfd, note->descdata + 12);
   2192 	elf_tdata (abfd)->core->program
   2193 	 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
   2194 	elf_tdata (abfd)->core->command
   2195 	 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
   2196     }
   2197 
   2198   /* Note that for some reason, a spurious space is tacked
   2199      onto the end of the args in some (at least one anyway)
   2200      implementations, so strip it off if it exists.  */
   2201   {
   2202     char *command = elf_tdata (abfd)->core->command;
   2203     int n = strlen (command);
   2204 
   2205     if (0 < n && command[n - 1] == ' ')
   2206       command[n - 1] = '\0';
   2207   }
   2208 
   2209   return true;
   2210 }
   2211 
   2212 static char *
   2213 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
   2214 				int note_type, ...)
   2215 {
   2216   switch (note_type)
   2217     {
   2218     default:
   2219       return NULL;
   2220 
   2221     case NT_PRPSINFO:
   2222       {
   2223 	char data[124] ATTRIBUTE_NONSTRING;
   2224 	va_list ap;
   2225 
   2226 	va_start (ap, note_type);
   2227 	memset (data, 0, sizeof (data));
   2228 	strncpy (data + 28, va_arg (ap, const char *), 16);
   2229 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
   2230 	DIAGNOSTIC_PUSH;
   2231 	/* GCC 8.0 and 8.1 warn about 80 equals destination size with
   2232 	   -Wstringop-truncation:
   2233 	   https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
   2234 	 */
   2235 	DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
   2236 #endif
   2237 	strncpy (data + 44, va_arg (ap, const char *), 80);
   2238 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
   2239 	DIAGNOSTIC_POP;
   2240 #endif
   2241 	va_end (ap);
   2242 
   2243 	return elfcore_write_note (abfd, buf, bufsiz,
   2244 				   "CORE", note_type, data, sizeof (data));
   2245       }
   2246 
   2247     case NT_PRSTATUS:
   2248       {
   2249 	char data[148];
   2250 	va_list ap;
   2251 	long pid;
   2252 	int cursig;
   2253 	const void *greg;
   2254 
   2255 	va_start (ap, note_type);
   2256 	memset (data, 0, sizeof (data));
   2257 	pid = va_arg (ap, long);
   2258 	bfd_put_32 (abfd, pid, data + 24);
   2259 	cursig = va_arg (ap, int);
   2260 	bfd_put_16 (abfd, cursig, data + 12);
   2261 	greg = va_arg (ap, const void *);
   2262 	memcpy (data + 72, greg, 72);
   2263 	va_end (ap);
   2264 
   2265 	return elfcore_write_note (abfd, buf, bufsiz,
   2266 				   "CORE", note_type, data, sizeof (data));
   2267       }
   2268     }
   2269 }
   2270 
   2271 #define TARGET_LITTLE_SYM		arm_elf32_le_vec
   2272 #define TARGET_LITTLE_NAME		"elf32-littlearm"
   2273 #define TARGET_BIG_SYM			arm_elf32_be_vec
   2274 #define TARGET_BIG_NAME			"elf32-bigarm"
   2275 
   2276 #define elf_backend_grok_prstatus	elf32_arm_nabi_grok_prstatus
   2277 #define elf_backend_grok_psinfo		elf32_arm_nabi_grok_psinfo
   2278 #define elf_backend_write_core_note	elf32_arm_nabi_write_core_note
   2279 
   2280 typedef unsigned long int insn32;
   2281 typedef unsigned short int insn16;
   2282 
   2283 /* In lieu of proper flags, assume all EABIv4 or later objects are
   2284    interworkable.  */
   2285 #define INTERWORK_FLAG(abfd)  \
   2286   (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
   2287   || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
   2288   || ((abfd)->flags & BFD_LINKER_CREATED))
   2289 
   2290 /* The linker script knows the section names for placement.
   2291    The entry_names are used to do simple name mangling on the stubs.
   2292    Given a function name, and its type, the stub can be found. The
   2293    name can be changed. The only requirement is the %s be present.  */
   2294 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
   2295 #define THUMB2ARM_GLUE_ENTRY_NAME   "__%s_from_thumb"
   2296 
   2297 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
   2298 #define ARM2THUMB_GLUE_ENTRY_NAME   "__%s_from_arm"
   2299 
   2300 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
   2301 #define VFP11_ERRATUM_VENEER_ENTRY_NAME   "__vfp11_veneer_%x"
   2302 
   2303 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
   2304 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME   "__stm32l4xx_veneer_%x"
   2305 
   2306 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
   2307 #define ARM_BX_GLUE_ENTRY_NAME   "__bx_r%d"
   2308 
   2309 #define STUB_ENTRY_NAME   "__%s_veneer"
   2310 
   2311 #define CMSE_PREFIX "__acle_se_"
   2312 
   2313 #define CMSE_STUB_NAME ".gnu.sgstubs"
   2314 
   2315 /* The name of the dynamic interpreter.  This is put in the .interp
   2316    section.  */
   2317 #define ELF_DYNAMIC_INTERPRETER     "/usr/lib/ld.so.1"
   2318 
   2319 /* FDPIC default stack size.  */
   2320 #define DEFAULT_STACK_SIZE 0x8000
   2321 
   2322 static const unsigned long tls_trampoline [] =
   2323 {
   2324   0xe08e0000,		/* add r0, lr, r0 */
   2325   0xe5901004,		/* ldr r1, [r0,#4] */
   2326   0xe12fff11,		/* bx  r1 */
   2327 };
   2328 
   2329 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
   2330 {
   2331   0xe52d2004, /*	push    {r2}			*/
   2332   0xe59f200c, /*      ldr     r2, [pc, #3f - . - 8]	*/
   2333   0xe59f100c, /*      ldr     r1, [pc, #4f - . - 8]	*/
   2334   0xe79f2002, /* 1:   ldr     r2, [pc, r2]		*/
   2335   0xe081100f, /* 2:   add     r1, pc			*/
   2336   0xe12fff12, /*      bx      r2			*/
   2337   0x00000014, /* 3:   .word  _GLOBAL_OFFSET_TABLE_ - 1b - 8
   2338 				+ dl_tlsdesc_lazy_resolver(GOT)   */
   2339   0x00000018, /* 4:   .word  _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
   2340 };
   2341 
   2342 /* NOTE: [Thumb nop sequence]
   2343    When adding code that transitions from Thumb to Arm the instruction that
   2344    should be used for the alignment padding should be 0xe7fd (b .-2) instead of
   2345    a nop for performance reasons.  */
   2346 
   2347 /* ARM FDPIC PLT entry.  */
   2348 /* The last 5 words contain PLT lazy fragment code and data.  */
   2349 static const bfd_vma elf32_arm_fdpic_plt_entry [] =
   2350   {
   2351     0xe59fc008,    /* ldr     r12, .L1 */
   2352     0xe08cc009,    /* add     r12, r12, r9 */
   2353     0xe59c9004,    /* ldr     r9, [r12, #4] */
   2354     0xe59cf000,    /* ldr     pc, [r12] */
   2355     0x00000000,    /* L1.     .word   foo(GOTOFFFUNCDESC) */
   2356     0x00000000,    /* L1.     .word   foo(funcdesc_value_reloc_offset) */
   2357     0xe51fc00c,    /* ldr     r12, [pc, #-12] */
   2358     0xe92d1000,    /* push    {r12} */
   2359     0xe599c004,    /* ldr     r12, [r9, #4] */
   2360     0xe599f000,    /* ldr     pc, [r9] */
   2361   };
   2362 
   2363 /* Thumb FDPIC PLT entry.  */
   2364 /* The last 5 words contain PLT lazy fragment code and data.  */
   2365 static const bfd_vma elf32_arm_fdpic_thumb_plt_entry [] =
   2366   {
   2367     0xc00cf8df,    /* ldr.w   r12, .L1 */
   2368     0x0c09eb0c,    /* add.w   r12, r12, r9 */
   2369     0x9004f8dc,    /* ldr.w   r9, [r12, #4] */
   2370     0xf000f8dc,    /* ldr.w   pc, [r12] */
   2371     0x00000000,    /* .L1     .word   foo(GOTOFFFUNCDESC) */
   2372     0x00000000,    /* .L2     .word   foo(funcdesc_value_reloc_offset) */
   2373     0xc008f85f,    /* ldr.w   r12, .L2 */
   2374     0xcd04f84d,    /* push    {r12} */
   2375     0xc004f8d9,    /* ldr.w   r12, [r9, #4] */
   2376     0xf000f8d9,    /* ldr.w   pc, [r9] */
   2377   };
   2378 
   2379 #ifdef FOUR_WORD_PLT
   2380 
   2381 /* The first entry in a procedure linkage table looks like
   2382    this.  It is set up so that any shared library function that is
   2383    called before the relocation has been set up calls the dynamic
   2384    linker first.  */
   2385 static const bfd_vma elf32_arm_plt0_entry [] =
   2386 {
   2387   0xe52de004,		/* str   lr, [sp, #-4]! */
   2388   0xe59fe010,		/* ldr   lr, [pc, #16]  */
   2389   0xe08fe00e,		/* add   lr, pc, lr     */
   2390   0xe5bef008,		/* ldr   pc, [lr, #8]!  */
   2391 };
   2392 
   2393 /* Subsequent entries in a procedure linkage table look like
   2394    this.  */
   2395 static const bfd_vma elf32_arm_plt_entry [] =
   2396 {
   2397   0xe28fc600,		/* add   ip, pc, #NN	*/
   2398   0xe28cca00,		/* add	 ip, ip, #NN	*/
   2399   0xe5bcf000,		/* ldr	 pc, [ip, #NN]! */
   2400   0x00000000,		/* unused		*/
   2401 };
   2402 
   2403 #else /* not FOUR_WORD_PLT */
   2404 
   2405 /* The first entry in a procedure linkage table looks like
   2406    this.  It is set up so that any shared library function that is
   2407    called before the relocation has been set up calls the dynamic
   2408    linker first.  */
   2409 static const bfd_vma elf32_arm_plt0_entry [] =
   2410 {
   2411   0xe52de004,		/* str	 lr, [sp, #-4]! */
   2412   0xe59fe004,		/* ldr	 lr, [pc, #4]	*/
   2413   0xe08fe00e,		/* add	 lr, pc, lr	*/
   2414   0xe5bef008,		/* ldr	 pc, [lr, #8]!	*/
   2415   0x00000000,		/* &GOT[0] - .		*/
   2416 };
   2417 
   2418 /* By default subsequent entries in a procedure linkage table look like
   2419    this. Offsets that don't fit into 28 bits will cause link error.  */
   2420 static const bfd_vma elf32_arm_plt_entry_short [] =
   2421 {
   2422   0xe28fc600,		/* add   ip, pc, #0xNN00000 */
   2423   0xe28cca00,		/* add	 ip, ip, #0xNN000   */
   2424   0xe5bcf000,		/* ldr	 pc, [ip, #0xNNN]!  */
   2425 };
   2426 
   2427 /* When explicitly asked, we'll use this "long" entry format
   2428    which can cope with arbitrary displacements.  */
   2429 static const bfd_vma elf32_arm_plt_entry_long [] =
   2430 {
   2431   0xe28fc200,		/* add	 ip, pc, #0xN0000000 */
   2432   0xe28cc600,		/* add	 ip, ip, #0xNN00000  */
   2433   0xe28cca00,		/* add	 ip, ip, #0xNN000    */
   2434   0xe5bcf000,		/* ldr	 pc, [ip, #0xNNN]!   */
   2435 };
   2436 
   2437 static bool elf32_arm_use_long_plt_entry = false;
   2438 
   2439 #endif /* not FOUR_WORD_PLT */
   2440 
   2441 /* The first entry in a procedure linkage table looks like this.
   2442    It is set up so that any shared library function that is called before the
   2443    relocation has been set up calls the dynamic linker first.  */
   2444 static const bfd_vma elf32_thumb2_plt0_entry [] =
   2445 {
   2446   /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
   2447      an instruction maybe encoded to one or two array elements.  */
   2448   0xf8dfb500,		/* push	   {lr}		 */
   2449   0x44fee008,		/* ldr.w   lr, [pc, #8]	 */
   2450 			/* add	   lr, pc	 */
   2451   0xff08f85e,		/* ldr.w   pc, [lr, #8]! */
   2452   0x00000000,		/* &GOT[0] - .		 */
   2453 };
   2454 
   2455 /* Subsequent entries in a procedure linkage table for thumb only target
   2456    look like this.  */
   2457 static const bfd_vma elf32_thumb2_plt_entry [] =
   2458 {
   2459   /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
   2460      an instruction maybe encoded to one or two array elements.  */
   2461   0x0c00f240,		/* movw	   ip, #0xNNNN	  */
   2462   0x0c00f2c0,		/* movt	   ip, #0xNNNN	  */
   2463   0xf8dc44fc,		/* add	   ip, pc	  */
   2464   0xe7fcf000		/* ldr.w   pc, [ip]	  */
   2465 			/* b      .-4		  */
   2466 };
   2467 
   2468 /* The format of the first entry in the procedure linkage table
   2469    for a VxWorks executable.  */
   2470 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
   2471 {
   2472   0xe52dc008,		/* str	  ip,[sp,#-8]!			*/
   2473   0xe59fc000,		/* ldr	  ip,[pc]			*/
   2474   0xe59cf008,		/* ldr	  pc,[ip,#8]			*/
   2475   0x00000000,		/* .long  _GLOBAL_OFFSET_TABLE_		*/
   2476 };
   2477 
   2478 /* The format of subsequent entries in a VxWorks executable.  */
   2479 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
   2480 {
   2481   0xe59fc000,	      /* ldr	ip,[pc]			*/
   2482   0xe59cf000,	      /* ldr	pc,[ip]			*/
   2483   0x00000000,	      /* .long	@got				*/
   2484   0xe59fc000,	      /* ldr	ip,[pc]			*/
   2485   0xea000000,	      /* b	_PLT				*/
   2486   0x00000000,	      /* .long	@pltindex*sizeof(Elf32_Rela)	*/
   2487 };
   2488 
   2489 /* The format of entries in a VxWorks shared library.  */
   2490 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
   2491 {
   2492   0xe59fc000,	      /* ldr	ip,[pc]			*/
   2493   0xe79cf009,	      /* ldr	pc,[ip,r9]			*/
   2494   0x00000000,	      /* .long	@got				*/
   2495   0xe59fc000,	      /* ldr	ip,[pc]			*/
   2496   0xe599f008,	      /* ldr	pc,[r9,#8]			*/
   2497   0x00000000,	      /* .long	@pltindex*sizeof(Elf32_Rela)	*/
   2498 };
   2499 
   2500 /* An initial stub used if the PLT entry is referenced from Thumb code.  */
   2501 #define PLT_THUMB_STUB_SIZE 4
   2502 static const bfd_vma elf32_arm_plt_thumb_stub [] =
   2503 {
   2504   0x4778,		/* bx pc */
   2505   0xe7fd		/* b .-2 */
   2506 };
   2507 
   2508 /* PR 28924:
   2509    There was a bug due to too high values of THM_MAX_FWD_BRANCH_OFFSET and
   2510    THM2_MAX_FWD_BRANCH_OFFSET.  The first macro concerns the case when Thumb-2
   2511    is not available, and second macro when Thumb-2 is available.  Among other
   2512    things, they affect the range of branches represented as BLX instructions
   2513    in Encoding T2 defined in Section A8.8.25 of the ARM Architecture
   2514    Reference Manual ARMv7-A and ARMv7-R edition issue C.d.  Such branches are
   2515    specified there to have a maximum forward offset that is a multiple of 4.
   2516    Previously, the respective values defined here were multiples of 2 but not
   2517    4 and they are included in comments for reference.  */
   2518 #define ARM_MAX_FWD_BRANCH_OFFSET  ((((1 << 23) - 1) << 2) + 8)
   2519 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
   2520 #define THM_MAX_FWD_BRANCH_OFFSET   ((1 << 22) - 4 + 4)
   2521 /* #def THM_MAX_FWD_BRANCH_OFFSET   ((1 << 22) - 2 + 4) */
   2522 #define THM_MAX_BWD_BRANCH_OFFSET  (-(1 << 22) + 4)
   2523 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 4) + 4)
   2524 /* #def THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) */
   2525 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
   2526 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
   2527 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
   2528 
   2529 enum stub_insn_type
   2530 {
   2531   THUMB16_TYPE = 1,
   2532   THUMB32_TYPE,
   2533   ARM_TYPE,
   2534   DATA_TYPE
   2535 };
   2536 
   2537 #define THUMB16_INSN(X)		{(X), THUMB16_TYPE, R_ARM_NONE, 0}
   2538 /* A bit of a hack.  A Thumb conditional branch, in which the proper condition
   2539    is inserted in arm_build_one_stub().  */
   2540 #define THUMB16_BCOND_INSN(X)	{(X), THUMB16_TYPE, R_ARM_NONE, 1}
   2541 #define THUMB32_INSN(X)		{(X), THUMB32_TYPE, R_ARM_NONE, 0}
   2542 #define THUMB32_MOVT(X)		{(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
   2543 #define THUMB32_MOVW(X)		{(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
   2544 #define THUMB32_B_INSN(X, Z)	{(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
   2545 #define ARM_INSN(X)		{(X), ARM_TYPE, R_ARM_NONE, 0}
   2546 #define ARM_REL_INSN(X, Z)	{(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
   2547 #define DATA_WORD(X,Y,Z)	{(X), DATA_TYPE, (Y), (Z)}
   2548 
   2549 typedef struct
   2550 {
   2551   bfd_vma	       data;
   2552   enum stub_insn_type  type;
   2553   unsigned int	       r_type;
   2554   int		       reloc_addend;
   2555 }  insn_sequence;
   2556 
   2557 /* See note [Thumb nop sequence] when adding a veneer.  */
   2558 
   2559 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
   2560    to reach the stub if necessary.  */
   2561 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
   2562 {
   2563   ARM_INSN (0xe51ff004),	    /* ldr   pc, [pc, #-4] */
   2564   DATA_WORD (0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
   2565 };
   2566 
   2567 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
   2568    available.  */
   2569 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
   2570 {
   2571   ARM_INSN (0xe59fc000),	    /* ldr   ip, [pc, #0] */
   2572   ARM_INSN (0xe12fff1c),	    /* bx    ip */
   2573   DATA_WORD (0, R_ARM_ABS32, 0),    /* dcd   R_ARM_ABS32(X) */
   2574 };
   2575 
   2576 /* Thumb -> Thumb long branch stub. Used on M-profile architectures.  */
   2577 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
   2578 {
   2579   THUMB16_INSN (0xb401),	     /* push {r0} */
   2580   THUMB16_INSN (0x4802),	     /* ldr  r0, [pc, #8] */
   2581   THUMB16_INSN (0x4684),	     /* mov  ip, r0 */
   2582   THUMB16_INSN (0xbc01),	     /* pop  {r0} */
   2583   THUMB16_INSN (0x4760),	     /* bx   ip */
   2584   THUMB16_INSN (0xbf00),	     /* nop */
   2585   DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
   2586 };
   2587 
   2588 /* Thumb -> Thumb long branch stub in thumb2 encoding.  Used on armv7.  */
   2589 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
   2590 {
   2591   THUMB32_INSN (0xf85ff000),	     /* ldr.w  pc, [pc, #-0] */
   2592   DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(x) */
   2593 };
   2594 
   2595 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
   2596    M-profile architectures.  */
   2597 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
   2598 {
   2599   THUMB32_MOVW (0xf2400c00),	     /* mov.w ip, R_ARM_MOVW_ABS_NC */
   2600   THUMB32_MOVT (0xf2c00c00),	     /* movt  ip, R_ARM_MOVT_ABS << 16 */
   2601   THUMB16_INSN (0x4760),	     /* bx   ip */
   2602   THUMB16_INSN (0xbf00),	     /* nop */
   2603   /* The nop is added to ensure alignment of following stubs in the section.  */
   2604 };
   2605 
   2606 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
   2607    allowed.  */
   2608 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
   2609 {
   2610   THUMB16_INSN (0x4778),	     /* bx   pc */
   2611   THUMB16_INSN (0xe7fd),	     /* b   .-2 */
   2612   ARM_INSN (0xe59fc000),	     /* ldr  ip, [pc, #0] */
   2613   ARM_INSN (0xe12fff1c),	     /* bx   ip */
   2614   DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd  R_ARM_ABS32(X) */
   2615 };
   2616 
   2617 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
   2618    available.  */
   2619 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
   2620 {
   2621   THUMB16_INSN (0x4778),	     /* bx   pc */
   2622   THUMB16_INSN (0xe7fd),	     /* b   .-2 */
   2623   ARM_INSN (0xe51ff004),	     /* ldr   pc, [pc, #-4] */
   2624   DATA_WORD (0, R_ARM_ABS32, 0),     /* dcd   R_ARM_ABS32(X) */
   2625 };
   2626 
   2627 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
   2628    one, when the destination is close enough.  */
   2629 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
   2630 {
   2631   THUMB16_INSN (0x4778),	     /* bx   pc */
   2632   THUMB16_INSN (0xe7fd),	     /* b   .-2 */
   2633   ARM_REL_INSN (0xea000000, -8),     /* b    (X-8) */
   2634 };
   2635 
   2636 /* ARM/Thumb -> ARM long branch stub, PIC.  On V5T and above, use
   2637    blx to reach the stub if necessary.  */
   2638 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
   2639 {
   2640   ARM_INSN (0xe59fc000),	     /* ldr   ip, [pc] */
   2641   ARM_INSN (0xe08ff00c),	     /* add   pc, pc, ip */
   2642   DATA_WORD (0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
   2643 };
   2644 
   2645 /* ARM/Thumb -> Thumb long branch stub, PIC.  On V5T and above, use
   2646    blx to reach the stub if necessary.  We can not add into pc;
   2647    it is not guaranteed to mode switch (different in ARMv6 and
   2648    ARMv7).  */
   2649 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
   2650 {
   2651   ARM_INSN (0xe59fc004),	     /* ldr   ip, [pc, #4] */
   2652   ARM_INSN (0xe08fc00c),	     /* add   ip, pc, ip */
   2653   ARM_INSN (0xe12fff1c),	     /* bx    ip */
   2654   DATA_WORD (0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
   2655 };
   2656 
   2657 /* V4T ARM -> ARM long branch stub, PIC.  */
   2658 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
   2659 {
   2660   ARM_INSN (0xe59fc004),	     /* ldr   ip, [pc, #4] */
   2661   ARM_INSN (0xe08fc00c),	     /* add   ip, pc, ip */
   2662   ARM_INSN (0xe12fff1c),	     /* bx    ip */
   2663   DATA_WORD (0, R_ARM_REL32, 0),     /* dcd   R_ARM_REL32(X) */
   2664 };
   2665 
   2666 /* V4T Thumb -> ARM long branch stub, PIC.  */
   2667 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
   2668 {
   2669   THUMB16_INSN (0x4778),	     /* bx   pc */
   2670   THUMB16_INSN (0xe7fd),	     /* b   .-2 */
   2671   ARM_INSN (0xe59fc000),	     /* ldr  ip, [pc, #0] */
   2672   ARM_INSN (0xe08cf00f),	     /* add  pc, ip, pc */
   2673   DATA_WORD (0, R_ARM_REL32, -4),     /* dcd  R_ARM_REL32(X) */
   2674 };
   2675 
   2676 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
   2677    architectures.  */
   2678 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
   2679 {
   2680   THUMB16_INSN (0xb401),	     /* push {r0} */
   2681   THUMB16_INSN (0x4802),	     /* ldr  r0, [pc, #8] */
   2682   THUMB16_INSN (0x46fc),	     /* mov  ip, pc */
   2683   THUMB16_INSN (0x4484),	     /* add  ip, r0 */
   2684   THUMB16_INSN (0xbc01),	     /* pop  {r0} */
   2685   THUMB16_INSN (0x4760),	     /* bx   ip */
   2686   DATA_WORD (0, R_ARM_REL32, 4),     /* dcd  R_ARM_REL32(X) */
   2687 };
   2688 
   2689 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
   2690    allowed.  */
   2691 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
   2692 {
   2693   THUMB16_INSN (0x4778),	     /* bx   pc */
   2694   THUMB16_INSN (0xe7fd),	     /* b   .-2 */
   2695   ARM_INSN (0xe59fc004),	     /* ldr  ip, [pc, #4] */
   2696   ARM_INSN (0xe08fc00c),	     /* add   ip, pc, ip */
   2697   ARM_INSN (0xe12fff1c),	     /* bx   ip */
   2698   DATA_WORD (0, R_ARM_REL32, 0),     /* dcd  R_ARM_REL32(X) */
   2699 };
   2700 
   2701 /* Thumb2/ARM -> TLS trampoline.  Lowest common denominator, which is a
   2702    long PIC stub.  We can use r1 as a scratch -- and cannot use ip.  */
   2703 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
   2704 {
   2705   ARM_INSN (0xe59f1000),	     /* ldr   r1, [pc] */
   2706   ARM_INSN (0xe08ff001),	     /* add   pc, pc, r1 */
   2707   DATA_WORD (0, R_ARM_REL32, -4),    /* dcd   R_ARM_REL32(X-4) */
   2708 };
   2709 
   2710 /* V4T Thumb -> TLS trampoline.  lowest common denominator, which is a
   2711    long PIC stub.  We can use r1 as a scratch -- and cannot use ip.  */
   2712 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
   2713 {
   2714   THUMB16_INSN (0x4778),	     /* bx   pc */
   2715   THUMB16_INSN (0xe7fd),	     /* b   .-2 */
   2716   ARM_INSN (0xe59f1000),	     /* ldr  r1, [pc, #0] */
   2717   ARM_INSN (0xe081f00f),	     /* add  pc, r1, pc */
   2718   DATA_WORD (0, R_ARM_REL32, -4),    /* dcd  R_ARM_REL32(X) */
   2719 };
   2720 
   2721 /* Stub used for transition to secure state (aka SG veneer).  */
   2722 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
   2723 {
   2724   THUMB32_INSN (0xe97fe97f),		/* sg.  */
   2725   THUMB32_B_INSN (0xf000b800, -4),	/* b.w original_branch_dest.  */
   2726 };
   2727 
   2728 
   2729 /* Cortex-A8 erratum-workaround stubs.  */
   2730 
   2731 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
   2732    can't use a conditional branch to reach this stub).  */
   2733 
   2734 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
   2735 {
   2736   THUMB16_BCOND_INSN (0xd001),	       /* b<cond>.n true.  */
   2737   THUMB32_B_INSN (0xf000b800, -4),     /* b.w insn_after_original_branch.  */
   2738   THUMB32_B_INSN (0xf000b800, -4)      /* true: b.w original_branch_dest.  */
   2739 };
   2740 
   2741 /* Stub used for b.w and bl.w instructions.  */
   2742 
   2743 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
   2744 {
   2745   THUMB32_B_INSN (0xf000b800, -4)	/* b.w original_branch_dest.  */
   2746 };
   2747 
   2748 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
   2749 {
   2750   THUMB32_B_INSN (0xf000b800, -4)	/* b.w original_branch_dest.  */
   2751 };
   2752 
   2753 /* Stub used for Thumb-2 blx.w instructions.  We modified the original blx.w
   2754    instruction (which switches to ARM mode) to point to this stub.  Jump to the
   2755    real destination using an ARM-mode branch.  */
   2756 
   2757 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
   2758 {
   2759   ARM_REL_INSN (0xea000000, -8)	/* b original_branch_dest.  */
   2760 };
   2761 
   2762 /* For each section group there can be a specially created linker section
   2763    to hold the stubs for that group.  The name of the stub section is based
   2764    upon the name of another section within that group with the suffix below
   2765    applied.
   2766 
   2767    PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
   2768    create what appeared to be a linker stub section when it actually
   2769    contained user code/data.  For example, consider this fragment:
   2770 
   2771      const char * stubborn_problems[] = { "np" };
   2772 
   2773    If this is compiled with "-fPIC -fdata-sections" then gcc produces a
   2774    section called:
   2775 
   2776      .data.rel.local.stubborn_problems
   2777 
   2778    This then causes problems in arm32_arm_build_stubs() as it triggers:
   2779 
   2780       // Ignore non-stub sections.
   2781       if (!strstr (stub_sec->name, STUB_SUFFIX))
   2782 	continue;
   2783 
   2784    And so the section would be ignored instead of being processed.  Hence
   2785    the change in definition of STUB_SUFFIX to a name that cannot be a valid
   2786    C identifier.  */
   2787 #define STUB_SUFFIX ".__stub"
   2788 
   2789 /* One entry per long/short branch stub defined above.  */
   2790 #define DEF_STUBS \
   2791   DEF_STUB (long_branch_any_any)	\
   2792   DEF_STUB (long_branch_v4t_arm_thumb) \
   2793   DEF_STUB (long_branch_thumb_only) \
   2794   DEF_STUB (long_branch_v4t_thumb_thumb)	\
   2795   DEF_STUB (long_branch_v4t_thumb_arm) \
   2796   DEF_STUB (short_branch_v4t_thumb_arm) \
   2797   DEF_STUB (long_branch_any_arm_pic) \
   2798   DEF_STUB (long_branch_any_thumb_pic) \
   2799   DEF_STUB (long_branch_v4t_thumb_thumb_pic) \
   2800   DEF_STUB (long_branch_v4t_arm_thumb_pic) \
   2801   DEF_STUB (long_branch_v4t_thumb_arm_pic) \
   2802   DEF_STUB (long_branch_thumb_only_pic) \
   2803   DEF_STUB (long_branch_any_tls_pic) \
   2804   DEF_STUB (long_branch_v4t_thumb_tls_pic) \
   2805   DEF_STUB (cmse_branch_thumb_only) \
   2806   DEF_STUB (a8_veneer_b_cond) \
   2807   DEF_STUB (a8_veneer_b) \
   2808   DEF_STUB (a8_veneer_bl) \
   2809   DEF_STUB (a8_veneer_blx) \
   2810   DEF_STUB (long_branch_thumb2_only) \
   2811   DEF_STUB (long_branch_thumb2_only_pure)
   2812 
   2813 #define DEF_STUB(x) arm_stub_##x,
   2814 enum elf32_arm_stub_type
   2815 {
   2816   arm_stub_none,
   2817   DEF_STUBS
   2818   max_stub_type
   2819 };
   2820 #undef DEF_STUB
   2821 
   2822 /* Note the first a8_veneer type.  */
   2823 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
   2824 
   2825 typedef struct
   2826 {
   2827   const insn_sequence* template_sequence;
   2828   int template_size;
   2829 } stub_def;
   2830 
   2831 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
   2832 static const stub_def stub_definitions[] =
   2833 {
   2834   {NULL, 0},
   2835   DEF_STUBS
   2836 };
   2837 
   2838 struct elf32_arm_stub_hash_entry
   2839 {
   2840   /* Base hash table entry structure.  */
   2841   struct bfd_hash_entry root;
   2842 
   2843   /* The stub section.  */
   2844   asection *stub_sec;
   2845 
   2846   /* Offset within stub_sec of the beginning of this stub.  */
   2847   bfd_vma stub_offset;
   2848 
   2849   /* Given the symbol's value and its section we can determine its final
   2850      value when building the stubs (so the stub knows where to jump).  */
   2851   bfd_vma target_value;
   2852   asection *target_section;
   2853 
   2854   /* Same as above but for the source of the branch to the stub.  Used for
   2855      Cortex-A8 erratum workaround to patch it to branch to the stub.  As
   2856      such, source section does not need to be recorded since Cortex-A8 erratum
   2857      workaround stubs are only generated when both source and target are in the
   2858      same section.  */
   2859   bfd_vma source_value;
   2860 
   2861   /* The instruction which caused this stub to be generated (only valid for
   2862      Cortex-A8 erratum workaround stubs at present).  */
   2863   unsigned long orig_insn;
   2864 
   2865   /* The stub type.  */
   2866   enum elf32_arm_stub_type stub_type;
   2867   /* Its encoding size in bytes.  */
   2868   int stub_size;
   2869   /* Its template.  */
   2870   const insn_sequence *stub_template;
   2871   /* The size of the template (number of entries).  */
   2872   int stub_template_size;
   2873 
   2874   /* The symbol table entry, if any, that this was derived from.  */
   2875   struct elf32_arm_link_hash_entry *h;
   2876 
   2877   /* Type of branch.  */
   2878   enum arm_st_branch_type branch_type;
   2879 
   2880   /* Where this stub is being called from, or, in the case of combined
   2881      stub sections, the first input section in the group.  */
   2882   asection *id_sec;
   2883 
   2884   /* The name for the local symbol at the start of this stub.  The
   2885      stub name in the hash table has to be unique; this does not, so
   2886      it can be friendlier.  */
   2887   char *output_name;
   2888 };
   2889 
   2890 /* Used to build a map of a section.  This is required for mixed-endian
   2891    code/data.  */
   2892 
   2893 typedef struct elf32_elf_section_map
   2894 {
   2895   bfd_vma vma;
   2896   char type;
   2897 }
   2898 elf32_arm_section_map;
   2899 
   2900 /* Information about a VFP11 erratum veneer, or a branch to such a veneer.  */
   2901 
   2902 typedef enum
   2903 {
   2904   VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
   2905   VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
   2906   VFP11_ERRATUM_ARM_VENEER,
   2907   VFP11_ERRATUM_THUMB_VENEER
   2908 }
   2909 elf32_vfp11_erratum_type;
   2910 
   2911 typedef struct elf32_vfp11_erratum_list
   2912 {
   2913   struct elf32_vfp11_erratum_list *next;
   2914   bfd_vma vma;
   2915   union
   2916   {
   2917     struct
   2918     {
   2919       struct elf32_vfp11_erratum_list *veneer;
   2920       unsigned int vfp_insn;
   2921     } b;
   2922     struct
   2923     {
   2924       struct elf32_vfp11_erratum_list *branch;
   2925       unsigned int id;
   2926     } v;
   2927   } u;
   2928   elf32_vfp11_erratum_type type;
   2929 }
   2930 elf32_vfp11_erratum_list;
   2931 
   2932 /* Information about a STM32L4XX erratum veneer, or a branch to such a
   2933    veneer.  */
   2934 typedef enum
   2935 {
   2936   STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
   2937   STM32L4XX_ERRATUM_VENEER
   2938 }
   2939 elf32_stm32l4xx_erratum_type;
   2940 
   2941 typedef struct elf32_stm32l4xx_erratum_list
   2942 {
   2943   struct elf32_stm32l4xx_erratum_list *next;
   2944   bfd_vma vma;
   2945   union
   2946   {
   2947     struct
   2948     {
   2949       struct elf32_stm32l4xx_erratum_list *veneer;
   2950       unsigned int insn;
   2951     } b;
   2952     struct
   2953     {
   2954       struct elf32_stm32l4xx_erratum_list *branch;
   2955       unsigned int id;
   2956     } v;
   2957   } u;
   2958   elf32_stm32l4xx_erratum_type type;
   2959 }
   2960 elf32_stm32l4xx_erratum_list;
   2961 
   2962 typedef enum
   2963 {
   2964   DELETE_EXIDX_ENTRY,
   2965   INSERT_EXIDX_CANTUNWIND_AT_END
   2966 }
   2967 arm_unwind_edit_type;
   2968 
   2969 /* A (sorted) list of edits to apply to an unwind table.  */
   2970 typedef struct arm_unwind_table_edit
   2971 {
   2972   arm_unwind_edit_type type;
   2973   /* Note: we sometimes want to insert an unwind entry corresponding to a
   2974      section different from the one we're currently writing out, so record the
   2975      (text) section this edit relates to here.  */
   2976   asection *linked_section;
   2977   unsigned int index;
   2978   struct arm_unwind_table_edit *next;
   2979 }
   2980 arm_unwind_table_edit;
   2981 
   2982 typedef struct _arm_elf_section_data
   2983 {
   2984   /* Information about mapping symbols.  */
   2985   struct bfd_elf_section_data elf;
   2986   unsigned int mapcount;
   2987   unsigned int mapsize;
   2988   elf32_arm_section_map *map;
   2989   /* Information about CPU errata.  */
   2990   unsigned int erratumcount;
   2991   elf32_vfp11_erratum_list *erratumlist;
   2992   unsigned int stm32l4xx_erratumcount;
   2993   elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
   2994   unsigned int additional_reloc_count;
   2995   /* Information about unwind tables.  */
   2996   union
   2997   {
   2998     /* Unwind info attached to a text section.  */
   2999     struct
   3000     {
   3001       asection *arm_exidx_sec;
   3002     } text;
   3003 
   3004     /* Unwind info attached to an .ARM.exidx section.  */
   3005     struct
   3006     {
   3007       arm_unwind_table_edit *unwind_edit_list;
   3008       arm_unwind_table_edit *unwind_edit_tail;
   3009     } exidx;
   3010   } u;
   3011 }
   3012 _arm_elf_section_data;
   3013 
   3014 #define elf32_arm_section_data(sec) \
   3015   ((_arm_elf_section_data *) elf_section_data (sec))
   3016 
   3017 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
   3018    These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
   3019    so may be created multiple times: we use an array of these entries whilst
   3020    relaxing which we can refresh easily, then create stubs for each potentially
   3021    erratum-triggering instruction once we've settled on a solution.  */
   3022 
   3023 struct a8_erratum_fix
   3024 {
   3025   bfd *input_bfd;
   3026   asection *section;
   3027   bfd_vma offset;
   3028   bfd_vma target_offset;
   3029   unsigned long orig_insn;
   3030   char *stub_name;
   3031   enum elf32_arm_stub_type stub_type;
   3032   enum arm_st_branch_type branch_type;
   3033 };
   3034 
   3035 /* A table of relocs applied to branches which might trigger Cortex-A8
   3036    erratum.  */
   3037 
   3038 struct a8_erratum_reloc
   3039 {
   3040   bfd_vma from;
   3041   bfd_vma destination;
   3042   struct elf32_arm_link_hash_entry *hash;
   3043   const char *sym_name;
   3044   unsigned int r_type;
   3045   enum arm_st_branch_type branch_type;
   3046   bool non_a8_stub;
   3047 };
   3048 
   3049 /* The size of the thread control block.  */
   3050 #define TCB_SIZE	8
   3051 
   3052 /* ARM-specific information about a PLT entry, over and above the usual
   3053    gotplt_union.  */
   3054 struct arm_plt_info
   3055 {
   3056   /* We reference count Thumb references to a PLT entry separately,
   3057      so that we can emit the Thumb trampoline only if needed.  */
   3058   bfd_signed_vma thumb_refcount;
   3059 
   3060   /* Some references from Thumb code may be eliminated by BL->BLX
   3061      conversion, so record them separately.  */
   3062   bfd_signed_vma maybe_thumb_refcount;
   3063 
   3064   /* How many of the recorded PLT accesses were from non-call relocations.
   3065      This information is useful when deciding whether anything takes the
   3066      address of an STT_GNU_IFUNC PLT.  A value of 0 means that all
   3067      non-call references to the function should resolve directly to the
   3068      real runtime target.  */
   3069   unsigned int noncall_refcount;
   3070 
   3071   /* Since PLT entries have variable size if the Thumb prologue is
   3072      used, we need to record the index into .got.plt instead of
   3073      recomputing it from the PLT offset.  */
   3074   bfd_signed_vma got_offset;
   3075 };
   3076 
   3077 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol.  */
   3078 struct arm_local_iplt_info
   3079 {
   3080   /* The information that is usually found in the generic ELF part of
   3081      the hash table entry.  */
   3082   union gotplt_union root;
   3083 
   3084   /* The information that is usually found in the ARM-specific part of
   3085      the hash table entry.  */
   3086   struct arm_plt_info arm;
   3087 
   3088   /* A list of all potential dynamic relocations against this symbol.  */
   3089   struct elf_dyn_relocs *dyn_relocs;
   3090 };
   3091 
   3092 /* Structure to handle FDPIC support for local functions.  */
   3093 struct fdpic_local
   3094 {
   3095   unsigned int funcdesc_cnt;
   3096   unsigned int gotofffuncdesc_cnt;
   3097   int funcdesc_offset;
   3098 };
   3099 
   3100 struct elf_arm_obj_tdata
   3101 {
   3102   struct elf_obj_tdata root;
   3103 
   3104   /* Zero to warn when linking objects with incompatible enum sizes.  */
   3105   int no_enum_size_warning;
   3106 
   3107   /* Zero to warn when linking objects with incompatible wchar_t sizes.  */
   3108   int no_wchar_size_warning;
   3109 
   3110   /* The number of entries in each of the arrays in this strcuture.
   3111      Used to avoid buffer overruns.  */
   3112   bfd_size_type num_entries;
   3113 
   3114   /* tls_type for each local got entry.  */
   3115   char *local_got_tls_type;
   3116 
   3117   /* GOTPLT entries for TLS descriptors.  */
   3118   bfd_vma *local_tlsdesc_gotent;
   3119 
   3120   /* Information for local symbols that need entries in .iplt.  */
   3121   struct arm_local_iplt_info **local_iplt;
   3122 
   3123   /* Maintains FDPIC counters and funcdesc info.  */
   3124   struct fdpic_local *local_fdpic_cnts;
   3125 };
   3126 
   3127 #define elf_arm_tdata(bfd) \
   3128   ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
   3129 
   3130 #define elf32_arm_num_entries(bfd) \
   3131   (elf_arm_tdata (bfd)->num_entries)
   3132 
   3133 #define elf32_arm_local_got_tls_type(bfd) \
   3134   (elf_arm_tdata (bfd)->local_got_tls_type)
   3135 
   3136 #define elf32_arm_local_tlsdesc_gotent(bfd) \
   3137   (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
   3138 
   3139 #define elf32_arm_local_iplt(bfd) \
   3140   (elf_arm_tdata (bfd)->local_iplt)
   3141 
   3142 #define elf32_arm_local_fdpic_cnts(bfd) \
   3143   (elf_arm_tdata (bfd)->local_fdpic_cnts)
   3144 
   3145 #define is_arm_elf(bfd) \
   3146   (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
   3147    && elf_tdata (bfd) != NULL \
   3148    && elf_object_id (bfd) == ARM_ELF_DATA)
   3149 
   3150 static bool
   3151 elf32_arm_mkobject (bfd *abfd)
   3152 {
   3153   return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata));
   3154 }
   3155 
   3156 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
   3157 
   3158 /* Structure to handle FDPIC support for extern functions.  */
   3159 struct fdpic_global {
   3160   unsigned int gotofffuncdesc_cnt;
   3161   unsigned int gotfuncdesc_cnt;
   3162   unsigned int funcdesc_cnt;
   3163   int funcdesc_offset;
   3164   int gotfuncdesc_offset;
   3165 };
   3166 
   3167 /* Arm ELF linker hash entry.  */
   3168 struct elf32_arm_link_hash_entry
   3169 {
   3170   struct elf_link_hash_entry root;
   3171 
   3172   /* ARM-specific PLT information.  */
   3173   struct arm_plt_info plt;
   3174 
   3175 #define GOT_UNKNOWN	0
   3176 #define GOT_NORMAL	1
   3177 #define GOT_TLS_GD	2
   3178 #define GOT_TLS_IE	4
   3179 #define GOT_TLS_GDESC	8
   3180 #define GOT_TLS_GD_ANY_P(type)	((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
   3181   unsigned int tls_type : 8;
   3182 
   3183   /* True if the symbol's PLT entry is in .iplt rather than .plt.  */
   3184   unsigned int is_iplt : 1;
   3185 
   3186   unsigned int unused : 23;
   3187 
   3188   /* Offset of the GOTPLT entry reserved for the TLS descriptor,
   3189      starting at the end of the jump table.  */
   3190   bfd_vma tlsdesc_got;
   3191 
   3192   /* The symbol marking the real symbol location for exported thumb
   3193      symbols with Arm stubs.  */
   3194   struct elf_link_hash_entry *export_glue;
   3195 
   3196   /* A pointer to the most recently used stub hash entry against this
   3197      symbol.  */
   3198   struct elf32_arm_stub_hash_entry *stub_cache;
   3199 
   3200   /* Counter for FDPIC relocations against this symbol.  */
   3201   struct fdpic_global fdpic_cnts;
   3202 };
   3203 
   3204 /* Traverse an arm ELF linker hash table.  */
   3205 #define elf32_arm_link_hash_traverse(table, func, info)			\
   3206   (elf_link_hash_traverse						\
   3207    (&(table)->root,							\
   3208     (bool (*) (struct elf_link_hash_entry *, void *)) (func),		\
   3209     (info)))
   3210 
   3211 /* Get the ARM elf linker hash table from a link_info structure.  */
   3212 #define elf32_arm_hash_table(p) \
   3213   ((is_elf_hash_table ((p)->hash)					\
   3214     && elf_hash_table_id (elf_hash_table (p)) == ARM_ELF_DATA)		\
   3215    ? (struct elf32_arm_link_hash_table *) (p)->hash : NULL)
   3216 
   3217 #define arm_stub_hash_lookup(table, string, create, copy) \
   3218   ((struct elf32_arm_stub_hash_entry *) \
   3219    bfd_hash_lookup ((table), (string), (create), (copy)))
   3220 
   3221 /* Array to keep track of which stub sections have been created, and
   3222    information on stub grouping.  */
   3223 struct map_stub
   3224 {
   3225   /* This is the section to which stubs in the group will be
   3226      attached.  */
   3227   asection *link_sec;
   3228   /* The stub section.  */
   3229   asection *stub_sec;
   3230 };
   3231 
   3232 #define elf32_arm_compute_jump_table_size(htab) \
   3233   ((htab)->next_tls_desc_index * 4)
   3234 
   3235 /* ARM ELF linker hash table.  */
   3236 struct elf32_arm_link_hash_table
   3237 {
   3238   /* The main hash table.  */
   3239   struct elf_link_hash_table root;
   3240 
   3241   /* The size in bytes of the section containing the Thumb-to-ARM glue.  */
   3242   bfd_size_type thumb_glue_size;
   3243 
   3244   /* The size in bytes of the section containing the ARM-to-Thumb glue.  */
   3245   bfd_size_type arm_glue_size;
   3246 
   3247   /* The size in bytes of section containing the ARMv4 BX veneers.  */
   3248   bfd_size_type bx_glue_size;
   3249 
   3250   /* Offsets of ARMv4 BX veneers.  Bit1 set if present, and Bit0 set when
   3251      veneer has been populated.  */
   3252   bfd_vma bx_glue_offset[15];
   3253 
   3254   /* The size in bytes of the section containing glue for VFP11 erratum
   3255      veneers.  */
   3256   bfd_size_type vfp11_erratum_glue_size;
   3257 
   3258  /* The size in bytes of the section containing glue for STM32L4XX erratum
   3259      veneers.  */
   3260   bfd_size_type stm32l4xx_erratum_glue_size;
   3261 
   3262   /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum.  This
   3263      holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
   3264      elf32_arm_write_section().  */
   3265   struct a8_erratum_fix *a8_erratum_fixes;
   3266   unsigned int num_a8_erratum_fixes;
   3267 
   3268   /* An arbitrary input BFD chosen to hold the glue sections.  */
   3269   bfd * bfd_of_glue_owner;
   3270 
   3271   /* Nonzero to output a BE8 image.  */
   3272   int byteswap_code;
   3273 
   3274   /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
   3275      Nonzero if R_ARM_TARGET1 means R_ARM_REL32.  */
   3276   int target1_is_rel;
   3277 
   3278   /* The relocation to use for R_ARM_TARGET2 relocations.  */
   3279   int target2_reloc;
   3280 
   3281   /* 0 = Ignore R_ARM_V4BX.
   3282      1 = Convert BX to MOV PC.
   3283      2 = Generate v4 interworing stubs.  */
   3284   int fix_v4bx;
   3285 
   3286   /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum.  */
   3287   int fix_cortex_a8;
   3288 
   3289   /* Whether we should fix the ARM1176 BLX immediate issue.  */
   3290   int fix_arm1176;
   3291 
   3292   /* Nonzero if the ARM/Thumb BLX instructions are available for use.  */
   3293   int use_blx;
   3294 
   3295   /* What sort of code sequences we should look for which may trigger the
   3296      VFP11 denorm erratum.  */
   3297   bfd_arm_vfp11_fix vfp11_fix;
   3298 
   3299   /* Global counter for the number of fixes we have emitted.  */
   3300   int num_vfp11_fixes;
   3301 
   3302   /* What sort of code sequences we should look for which may trigger the
   3303      STM32L4XX erratum.  */
   3304   bfd_arm_stm32l4xx_fix stm32l4xx_fix;
   3305 
   3306   /* Global counter for the number of fixes we have emitted.  */
   3307   int num_stm32l4xx_fixes;
   3308 
   3309   /* Nonzero to force PIC branch veneers.  */
   3310   int pic_veneer;
   3311 
   3312   /* The number of bytes in the initial entry in the PLT.  */
   3313   bfd_size_type plt_header_size;
   3314 
   3315   /* The number of bytes in the subsequent PLT etries.  */
   3316   bfd_size_type plt_entry_size;
   3317 
   3318   /* True if the target uses REL relocations.  */
   3319   bool use_rel;
   3320 
   3321   /* Nonzero if import library must be a secure gateway import library
   3322      as per ARMv8-M Security Extensions.  */
   3323   int cmse_implib;
   3324 
   3325   /* The import library whose symbols' address must remain stable in
   3326      the import library generated.  */
   3327   bfd *in_implib_bfd;
   3328 
   3329   /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt.  */
   3330   bfd_vma next_tls_desc_index;
   3331 
   3332   /* How many R_ARM_TLS_DESC relocations were generated so far.  */
   3333   bfd_vma num_tls_desc;
   3334 
   3335   /* The (unloaded but important) VxWorks .rela.plt.unloaded section.  */
   3336   asection *srelplt2;
   3337 
   3338   /* Offset in .plt section of tls_arm_trampoline.  */
   3339   bfd_vma tls_trampoline;
   3340 
   3341   /* Data for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations.  */
   3342   union
   3343   {
   3344     bfd_signed_vma refcount;
   3345     bfd_vma offset;
   3346   } tls_ldm_got;
   3347 
   3348   /* For convenience in allocate_dynrelocs.  */
   3349   bfd * obfd;
   3350 
   3351   /* The amount of space used by the reserved portion of the sgotplt
   3352      section, plus whatever space is used by the jump slots.  */
   3353   bfd_vma sgotplt_jump_table_size;
   3354 
   3355   /* The stub hash table.  */
   3356   struct bfd_hash_table stub_hash_table;
   3357 
   3358   /* Linker stub bfd.  */
   3359   bfd *stub_bfd;
   3360 
   3361   /* Linker call-backs.  */
   3362   asection * (*add_stub_section) (const char *, asection *, asection *,
   3363 				  unsigned int);
   3364   void (*layout_sections_again) (void);
   3365 
   3366   /* Array to keep track of which stub sections have been created, and
   3367      information on stub grouping.  */
   3368   struct map_stub *stub_group;
   3369 
   3370   /* Input stub section holding secure gateway veneers.  */
   3371   asection *cmse_stub_sec;
   3372 
   3373   /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
   3374      start to be allocated.  */
   3375   bfd_vma new_cmse_stub_offset;
   3376 
   3377   /* Number of elements in stub_group.  */
   3378   unsigned int top_id;
   3379 
   3380   /* Assorted information used by elf32_arm_size_stubs.  */
   3381   unsigned int bfd_count;
   3382   unsigned int top_index;
   3383   asection **input_list;
   3384 
   3385   /* True if the target system uses FDPIC. */
   3386   int fdpic_p;
   3387 
   3388   /* Fixup section. Used for FDPIC.  */
   3389   asection *srofixup;
   3390 };
   3391 
   3392 /* Add an FDPIC read-only fixup.  */
   3393 static void
   3394 arm_elf_add_rofixup (bfd *output_bfd, asection *srofixup, bfd_vma offset)
   3395 {
   3396   bfd_vma fixup_offset;
   3397 
   3398   fixup_offset = srofixup->reloc_count++ * 4;
   3399   BFD_ASSERT (fixup_offset < srofixup->size);
   3400   bfd_put_32 (output_bfd, offset, srofixup->contents + fixup_offset);
   3401 }
   3402 
   3403 static inline int
   3404 ctz (unsigned int mask)
   3405 {
   3406 #if GCC_VERSION >= 3004
   3407   return __builtin_ctz (mask);
   3408 #else
   3409   unsigned int i;
   3410 
   3411   for (i = 0; i < 8 * sizeof (mask); i++)
   3412     {
   3413       if (mask & 0x1)
   3414 	break;
   3415       mask = (mask >> 1);
   3416     }
   3417   return i;
   3418 #endif
   3419 }
   3420 
   3421 #if !defined (__NetBSD__) || (__NetBSD_Version__ < 600000000)
   3422 static inline int
   3423 elf32_arm_popcount (unsigned int mask)
   3424 {
   3425 #if GCC_VERSION >= 3004
   3426   return __builtin_popcount (mask);
   3427 #else
   3428   unsigned int i;
   3429   int sum = 0;
   3430 
   3431   for (i = 0; i < 8 * sizeof (mask); i++)
   3432     {
   3433       if (mask & 0x1)
   3434 	sum++;
   3435       mask = (mask >> 1);
   3436     }
   3437   return sum;
   3438 #endif
   3439 }
   3440 #endif
   3441 
   3442 static void elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
   3443 				    asection *sreloc, Elf_Internal_Rela *rel);
   3444 
   3445 static void
   3446 arm_elf_fill_funcdesc (bfd *output_bfd,
   3447 		       struct bfd_link_info *info,
   3448 		       int *funcdesc_offset,
   3449 		       int dynindx,
   3450 		       int offset,
   3451 		       bfd_vma addr,
   3452 		       bfd_vma dynreloc_value,
   3453 		       bfd_vma seg)
   3454 {
   3455   if ((*funcdesc_offset & 1) == 0)
   3456     {
   3457       struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
   3458       asection *sgot = globals->root.sgot;
   3459 
   3460       if (bfd_link_pic (info))
   3461 	{
   3462 	  asection *srelgot = globals->root.srelgot;
   3463 	  Elf_Internal_Rela outrel;
   3464 
   3465 	  outrel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
   3466 	  outrel.r_offset = sgot->output_section->vma + sgot->output_offset + offset;
   3467 	  outrel.r_addend = 0;
   3468 
   3469 	  elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   3470 	  bfd_put_32 (output_bfd, addr, sgot->contents + offset);
   3471 	  bfd_put_32 (output_bfd, seg, sgot->contents + offset + 4);
   3472 	}
   3473       else
   3474 	{
   3475 	  struct elf_link_hash_entry *hgot = globals->root.hgot;
   3476 	  bfd_vma got_value = hgot->root.u.def.value
   3477 	    + hgot->root.u.def.section->output_section->vma
   3478 	    + hgot->root.u.def.section->output_offset;
   3479 
   3480 	  arm_elf_add_rofixup (output_bfd, globals->srofixup,
   3481 			       sgot->output_section->vma + sgot->output_offset
   3482 			       + offset);
   3483 	  arm_elf_add_rofixup (output_bfd, globals->srofixup,
   3484 			       sgot->output_section->vma + sgot->output_offset
   3485 			       + offset + 4);
   3486 	  bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + offset);
   3487 	  bfd_put_32 (output_bfd, got_value, sgot->contents + offset + 4);
   3488 	}
   3489       *funcdesc_offset |= 1;
   3490     }
   3491 }
   3492 
   3493 /* Create an entry in an ARM ELF linker hash table.  */
   3494 
   3495 static struct bfd_hash_entry *
   3496 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
   3497 			     struct bfd_hash_table * table,
   3498 			     const char * string)
   3499 {
   3500   struct elf32_arm_link_hash_entry * ret =
   3501     (struct elf32_arm_link_hash_entry *) entry;
   3502 
   3503   /* Allocate the structure if it has not already been allocated by a
   3504      subclass.  */
   3505   if (ret == NULL)
   3506     ret = (struct elf32_arm_link_hash_entry *)
   3507 	bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
   3508   if (ret == NULL)
   3509     return (struct bfd_hash_entry *) ret;
   3510 
   3511   /* Call the allocation method of the superclass.  */
   3512   ret = ((struct elf32_arm_link_hash_entry *)
   3513 	 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
   3514 				     table, string));
   3515   if (ret != NULL)
   3516     {
   3517       ret->tls_type = GOT_UNKNOWN;
   3518       ret->tlsdesc_got = (bfd_vma) -1;
   3519       ret->plt.thumb_refcount = 0;
   3520       ret->plt.maybe_thumb_refcount = 0;
   3521       ret->plt.noncall_refcount = 0;
   3522       ret->plt.got_offset = -1;
   3523       ret->is_iplt = false;
   3524       ret->export_glue = NULL;
   3525 
   3526       ret->stub_cache = NULL;
   3527 
   3528       ret->fdpic_cnts.gotofffuncdesc_cnt = 0;
   3529       ret->fdpic_cnts.gotfuncdesc_cnt = 0;
   3530       ret->fdpic_cnts.funcdesc_cnt = 0;
   3531       ret->fdpic_cnts.funcdesc_offset = -1;
   3532       ret->fdpic_cnts.gotfuncdesc_offset = -1;
   3533     }
   3534 
   3535   return (struct bfd_hash_entry *) ret;
   3536 }
   3537 
   3538 /* Ensure that we have allocated bookkeeping structures for ABFD's local
   3539    symbols.  */
   3540 
   3541 static bool
   3542 elf32_arm_allocate_local_sym_info (bfd *abfd)
   3543 {
   3544   if (elf_local_got_refcounts (abfd) == NULL)
   3545     {
   3546       bfd_size_type num_syms;
   3547 
   3548       elf32_arm_num_entries (abfd) = 0;
   3549 
   3550       /* Whilst it might be tempting to allocate a single block of memory and
   3551 	 then divide it up amoungst the arrays in the elf_arm_obj_tdata
   3552 	 structure, this interferes with the work of memory checkers looking
   3553 	 for buffer overruns.  So allocate each array individually.  */
   3554 
   3555       num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
   3556 
   3557       elf_local_got_refcounts (abfd) = bfd_zalloc
   3558 	(abfd, num_syms * sizeof (* elf_local_got_refcounts (abfd)));
   3559 
   3560       if (elf_local_got_refcounts (abfd) == NULL)
   3561 	return false;
   3562 
   3563       elf32_arm_local_tlsdesc_gotent (abfd) = bfd_zalloc
   3564 	(abfd, num_syms * sizeof (* elf32_arm_local_tlsdesc_gotent (abfd)));
   3565 
   3566       if (elf32_arm_local_tlsdesc_gotent (abfd) == NULL)
   3567 	return false;
   3568 
   3569       elf32_arm_local_iplt (abfd) = bfd_zalloc
   3570 	(abfd, num_syms * sizeof (* elf32_arm_local_iplt (abfd)));
   3571 
   3572       if (elf32_arm_local_iplt (abfd) == NULL)
   3573 	return false;
   3574 
   3575       elf32_arm_local_fdpic_cnts (abfd) = bfd_zalloc
   3576 	(abfd, num_syms * sizeof (* elf32_arm_local_fdpic_cnts (abfd)));
   3577 
   3578       if (elf32_arm_local_fdpic_cnts (abfd) == NULL)
   3579 	return false;
   3580 
   3581       elf32_arm_local_got_tls_type (abfd) = bfd_zalloc
   3582 	(abfd, num_syms * sizeof (* elf32_arm_local_got_tls_type (abfd)));
   3583 
   3584       if (elf32_arm_local_got_tls_type (abfd) == NULL)
   3585 	return false;
   3586 
   3587       elf32_arm_num_entries (abfd) = num_syms;
   3588 
   3589 #if GCC_VERSION >= 3000
   3590       BFD_ASSERT (__alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd))
   3591 		  <= __alignof__ (*elf_local_got_refcounts (abfd)));
   3592       BFD_ASSERT (__alignof__ (*elf32_arm_local_iplt (abfd))
   3593 		  <= __alignof__ (*elf32_arm_local_tlsdesc_gotent (abfd)));
   3594       BFD_ASSERT (__alignof__ (*elf32_arm_local_fdpic_cnts (abfd))
   3595 		  <= __alignof__ (*elf32_arm_local_iplt (abfd)));
   3596       BFD_ASSERT (__alignof__ (*elf32_arm_local_got_tls_type (abfd))
   3597 		  <= __alignof__ (*elf32_arm_local_fdpic_cnts (abfd)));
   3598 #endif
   3599     }
   3600   return true;
   3601 }
   3602 
   3603 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
   3604    to input bfd ABFD.  Create the information if it doesn't already exist.
   3605    Return null if an allocation fails.  */
   3606 
   3607 static struct arm_local_iplt_info *
   3608 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
   3609 {
   3610   struct arm_local_iplt_info **ptr;
   3611 
   3612   if (!elf32_arm_allocate_local_sym_info (abfd))
   3613     return NULL;
   3614 
   3615   BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
   3616   BFD_ASSERT (r_symndx < elf32_arm_num_entries (abfd));
   3617   ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
   3618   if (*ptr == NULL)
   3619     *ptr = bfd_zalloc (abfd, sizeof (**ptr));
   3620   return *ptr;
   3621 }
   3622 
   3623 /* Try to obtain PLT information for the symbol with index R_SYMNDX
   3624    in ABFD's symbol table.  If the symbol is global, H points to its
   3625    hash table entry, otherwise H is null.
   3626 
   3627    Return true if the symbol does have PLT information.  When returning
   3628    true, point *ROOT_PLT at the target-independent reference count/offset
   3629    union and *ARM_PLT at the ARM-specific information.  */
   3630 
   3631 static bool
   3632 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
   3633 			struct elf32_arm_link_hash_entry *h,
   3634 			unsigned long r_symndx, union gotplt_union **root_plt,
   3635 			struct arm_plt_info **arm_plt)
   3636 {
   3637   struct arm_local_iplt_info *local_iplt;
   3638 
   3639   if (globals->root.splt == NULL && globals->root.iplt == NULL)
   3640     return false;
   3641 
   3642   if (h != NULL)
   3643     {
   3644       *root_plt = &h->root.plt;
   3645       *arm_plt = &h->plt;
   3646       return true;
   3647     }
   3648 
   3649   if (elf32_arm_local_iplt (abfd) == NULL)
   3650     return false;
   3651 
   3652   if (r_symndx >= elf32_arm_num_entries (abfd))
   3653     return false;
   3654 
   3655   local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
   3656   if (local_iplt == NULL)
   3657     return false;
   3658 
   3659   *root_plt = &local_iplt->root;
   3660   *arm_plt = &local_iplt->arm;
   3661   return true;
   3662 }
   3663 
   3664 static bool using_thumb_only (struct elf32_arm_link_hash_table *globals);
   3665 
   3666 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
   3667    before it.  */
   3668 
   3669 static bool
   3670 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
   3671 				  struct arm_plt_info *arm_plt)
   3672 {
   3673   struct elf32_arm_link_hash_table *htab;
   3674 
   3675   htab = elf32_arm_hash_table (info);
   3676 
   3677   return (!using_thumb_only (htab) && (arm_plt->thumb_refcount != 0
   3678 	  || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0)));
   3679 }
   3680 
   3681 /* Return a pointer to the head of the dynamic reloc list that should
   3682    be used for local symbol ISYM, which is symbol number R_SYMNDX in
   3683    ABFD's symbol table.  Return null if an error occurs.  */
   3684 
   3685 static struct elf_dyn_relocs **
   3686 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
   3687 				   Elf_Internal_Sym *isym)
   3688 {
   3689   if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
   3690     {
   3691       struct arm_local_iplt_info *local_iplt;
   3692 
   3693       local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
   3694       if (local_iplt == NULL)
   3695 	return NULL;
   3696       return &local_iplt->dyn_relocs;
   3697     }
   3698   else
   3699     {
   3700       /* Track dynamic relocs needed for local syms too.
   3701 	 We really need local syms available to do this
   3702 	 easily.  Oh well.  */
   3703       asection *s;
   3704       void *vpp;
   3705 
   3706       s = bfd_section_from_elf_index (abfd, isym->st_shndx);
   3707       if (s == NULL)
   3708 	return NULL;
   3709 
   3710       vpp = &elf_section_data (s)->local_dynrel;
   3711       return (struct elf_dyn_relocs **) vpp;
   3712     }
   3713 }
   3714 
   3715 /* Initialize an entry in the stub hash table.  */
   3716 
   3717 static struct bfd_hash_entry *
   3718 stub_hash_newfunc (struct bfd_hash_entry *entry,
   3719 		   struct bfd_hash_table *table,
   3720 		   const char *string)
   3721 {
   3722   /* Allocate the structure if it has not already been allocated by a
   3723      subclass.  */
   3724   if (entry == NULL)
   3725     {
   3726       entry = (struct bfd_hash_entry *)
   3727 	  bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
   3728       if (entry == NULL)
   3729 	return entry;
   3730     }
   3731 
   3732   /* Call the allocation method of the superclass.  */
   3733   entry = bfd_hash_newfunc (entry, table, string);
   3734   if (entry != NULL)
   3735     {
   3736       struct elf32_arm_stub_hash_entry *eh;
   3737 
   3738       /* Initialize the local fields.  */
   3739       eh = (struct elf32_arm_stub_hash_entry *) entry;
   3740       eh->stub_sec = NULL;
   3741       eh->stub_offset = (bfd_vma) -1;
   3742       eh->source_value = 0;
   3743       eh->target_value = 0;
   3744       eh->target_section = NULL;
   3745       eh->orig_insn = 0;
   3746       eh->stub_type = arm_stub_none;
   3747       eh->stub_size = 0;
   3748       eh->stub_template = NULL;
   3749       eh->stub_template_size = -1;
   3750       eh->h = NULL;
   3751       eh->id_sec = NULL;
   3752       eh->output_name = NULL;
   3753     }
   3754 
   3755   return entry;
   3756 }
   3757 
   3758 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
   3759    shortcuts to them in our hash table.  */
   3760 
   3761 static bool
   3762 create_got_section (bfd *dynobj, struct bfd_link_info *info)
   3763 {
   3764   struct elf32_arm_link_hash_table *htab;
   3765 
   3766   htab = elf32_arm_hash_table (info);
   3767   if (htab == NULL)
   3768     return false;
   3769 
   3770   if (! _bfd_elf_create_got_section (dynobj, info))
   3771     return false;
   3772 
   3773   /* Also create .rofixup.  */
   3774   if (htab->fdpic_p)
   3775     {
   3776       htab->srofixup = bfd_make_section_with_flags (dynobj, ".rofixup",
   3777 						    (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
   3778 						     | SEC_IN_MEMORY | SEC_LINKER_CREATED | SEC_READONLY));
   3779       if (htab->srofixup == NULL
   3780 	  || !bfd_set_section_alignment (htab->srofixup, 2))
   3781 	return false;
   3782     }
   3783 
   3784   return true;
   3785 }
   3786 
   3787 /* Create the .iplt, .rel(a).iplt and .igot.plt sections.  */
   3788 
   3789 static bool
   3790 create_ifunc_sections (struct bfd_link_info *info)
   3791 {
   3792   struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
   3793   bfd *dynobj = htab->root.dynobj;
   3794   elf_backend_data *bed = get_elf_backend_data (dynobj);
   3795   asection *s;
   3796   flagword flags = bed->dynamic_sec_flags;
   3797 
   3798   if (htab->root.iplt == NULL)
   3799     {
   3800       s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
   3801 					      flags | SEC_READONLY | SEC_CODE);
   3802       if (s == NULL
   3803 	  || !bfd_set_section_alignment (s, bed->plt_alignment))
   3804 	return false;
   3805       htab->root.iplt = s;
   3806     }
   3807 
   3808   if (htab->root.irelplt == NULL)
   3809     {
   3810       s = bfd_make_section_anyway_with_flags (dynobj,
   3811 					      RELOC_SECTION (htab, ".iplt"),
   3812 					      flags | SEC_READONLY);
   3813       if (s == NULL
   3814 	  || !bfd_set_section_alignment (s, bed->s->log_file_align))
   3815 	return false;
   3816       htab->root.irelplt = s;
   3817     }
   3818 
   3819   if (htab->root.igotplt == NULL)
   3820     {
   3821       s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
   3822       if (s == NULL
   3823 	  || !bfd_set_section_alignment (s, bed->s->log_file_align))
   3824 	return false;
   3825       htab->root.igotplt = s;
   3826     }
   3827   return true;
   3828 }
   3829 
   3830 /* Determine if we're dealing with a Thumb only architecture.  */
   3831 
   3832 static bool
   3833 using_thumb_only (struct elf32_arm_link_hash_table *globals)
   3834 {
   3835   int arch;
   3836   int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
   3837 					  Tag_CPU_arch_profile);
   3838 
   3839   if (profile)
   3840     return profile == 'M';
   3841 
   3842   arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
   3843 
   3844   /* Force return logic to be reviewed for each new architecture.  */
   3845   BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
   3846 
   3847   if (arch == TAG_CPU_ARCH_V6_M
   3848       || arch == TAG_CPU_ARCH_V6S_M
   3849       || arch == TAG_CPU_ARCH_V7E_M
   3850       || arch == TAG_CPU_ARCH_V8M_BASE
   3851       || arch == TAG_CPU_ARCH_V8M_MAIN
   3852       || arch == TAG_CPU_ARCH_V8_1M_MAIN)
   3853     return true;
   3854 
   3855   return false;
   3856 }
   3857 
   3858 /* Determine if we're dealing with a Thumb-2 object.  */
   3859 
   3860 static bool
   3861 using_thumb2 (struct elf32_arm_link_hash_table *globals)
   3862 {
   3863   int arch;
   3864   int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
   3865 					    Tag_THUMB_ISA_use);
   3866 
   3867   /* No use of thumb permitted, or a legacy thumb-1/2 definition.  */
   3868   if (thumb_isa < 3)
   3869     return thumb_isa == 2;
   3870 
   3871   /* Variant of thumb is described by the architecture tag.  */
   3872   arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
   3873 
   3874   /* Force return logic to be reviewed for each new architecture.  */
   3875   BFD_ASSERT (arch <= TAG_CPU_ARCH_V8_1M_MAIN);
   3876 
   3877   return (arch == TAG_CPU_ARCH_V6T2
   3878 	  || arch == TAG_CPU_ARCH_V7
   3879 	  || arch == TAG_CPU_ARCH_V7E_M
   3880 	  || arch == TAG_CPU_ARCH_V8
   3881 	  || arch == TAG_CPU_ARCH_V8R
   3882 	  || arch == TAG_CPU_ARCH_V8M_MAIN
   3883 	  || arch == TAG_CPU_ARCH_V8_1M_MAIN);
   3884 }
   3885 
   3886 /* Determine whether Thumb-2 BL instruction is available.  */
   3887 
   3888 static bool
   3889 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
   3890 {
   3891   int arch =
   3892     bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
   3893 
   3894   /* Force return logic to be reviewed for each new architecture.  */
   3895   BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
   3896 
   3897   /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M).  */
   3898   return (arch == TAG_CPU_ARCH_V6T2
   3899 	  || arch >= TAG_CPU_ARCH_V7);
   3900 }
   3901 
   3902 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
   3903    .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
   3904    hash table.  */
   3905 
   3906 static bool
   3907 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
   3908 {
   3909   struct elf32_arm_link_hash_table *htab;
   3910 
   3911   htab = elf32_arm_hash_table (info);
   3912   if (htab == NULL)
   3913     return false;
   3914 
   3915   if (!htab->root.sgot && !create_got_section (dynobj, info))
   3916     return false;
   3917 
   3918   if (!_bfd_elf_create_dynamic_sections (dynobj, info))
   3919     return false;
   3920 
   3921   if (htab->root.target_os == is_vxworks)
   3922     {
   3923       if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
   3924 	return false;
   3925 
   3926       if (bfd_link_pic (info))
   3927 	{
   3928 	  htab->plt_header_size = 0;
   3929 	  htab->plt_entry_size
   3930 	    = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
   3931 	}
   3932       else
   3933 	{
   3934 	  htab->plt_header_size
   3935 	    = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
   3936 	  htab->plt_entry_size
   3937 	    = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
   3938 	}
   3939 
   3940       if (elf_elfheader (dynobj))
   3941 	elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
   3942     }
   3943   else
   3944     {
   3945       /* PR ld/16017
   3946 	 Test for thumb only architectures.  Note - we cannot just call
   3947 	 using_thumb_only() as the attributes in the output bfd have not been
   3948 	 initialised at this point, so instead we use the input bfd.  */
   3949       bfd * saved_obfd = htab->obfd;
   3950 
   3951       htab->obfd = dynobj;
   3952       if (using_thumb_only (htab))
   3953 	{
   3954 	  htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
   3955 	  htab->plt_entry_size  = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
   3956 	}
   3957       htab->obfd = saved_obfd;
   3958     }
   3959 
   3960   if (htab->fdpic_p) {
   3961     htab->plt_header_size = 0;
   3962     if (info->flags & DF_BIND_NOW)
   3963       htab->plt_entry_size = 4 * (ARRAY_SIZE (elf32_arm_fdpic_plt_entry) - 5);
   3964     else
   3965       htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry);
   3966   }
   3967 
   3968   if (!htab->root.splt
   3969       || !htab->root.srelplt
   3970       || !htab->root.sdynbss
   3971       || (!bfd_link_pic (info) && !htab->root.srelbss))
   3972     abort ();
   3973 
   3974   return true;
   3975 }
   3976 
   3977 /* Copy the extra info we tack onto an elf_link_hash_entry.  */
   3978 
   3979 static void
   3980 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
   3981 				struct elf_link_hash_entry *dir,
   3982 				struct elf_link_hash_entry *ind)
   3983 {
   3984   struct elf32_arm_link_hash_entry *edir, *eind;
   3985 
   3986   edir = (struct elf32_arm_link_hash_entry *) dir;
   3987   eind = (struct elf32_arm_link_hash_entry *) ind;
   3988 
   3989   if (ind->root.type == bfd_link_hash_indirect)
   3990     {
   3991       /* Copy over PLT info.  */
   3992       edir->plt.thumb_refcount += eind->plt.thumb_refcount;
   3993       eind->plt.thumb_refcount = 0;
   3994       edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
   3995       eind->plt.maybe_thumb_refcount = 0;
   3996       edir->plt.noncall_refcount += eind->plt.noncall_refcount;
   3997       eind->plt.noncall_refcount = 0;
   3998 
   3999       /* Copy FDPIC counters.  */
   4000       edir->fdpic_cnts.gotofffuncdesc_cnt += eind->fdpic_cnts.gotofffuncdesc_cnt;
   4001       edir->fdpic_cnts.gotfuncdesc_cnt += eind->fdpic_cnts.gotfuncdesc_cnt;
   4002       edir->fdpic_cnts.funcdesc_cnt += eind->fdpic_cnts.funcdesc_cnt;
   4003 
   4004       /* We should only allocate a function to .iplt once the final
   4005 	 symbol information is known.  */
   4006       BFD_ASSERT (!eind->is_iplt);
   4007 
   4008       if (dir->got.refcount <= 0)
   4009 	{
   4010 	  edir->tls_type = eind->tls_type;
   4011 	  eind->tls_type = GOT_UNKNOWN;
   4012 	}
   4013     }
   4014 
   4015   _bfd_elf_link_hash_copy_indirect (info, dir, ind);
   4016 }
   4017 
   4018 /* Destroy an ARM elf linker hash table.  */
   4019 
   4020 static void
   4021 elf32_arm_link_hash_table_free (bfd *obfd)
   4022 {
   4023   struct elf32_arm_link_hash_table *ret
   4024     = (struct elf32_arm_link_hash_table *) obfd->link.hash;
   4025 
   4026   bfd_hash_table_free (&ret->stub_hash_table);
   4027   _bfd_elf_link_hash_table_free (obfd);
   4028 }
   4029 
   4030 /* Create an ARM elf linker hash table.  */
   4031 
   4032 static struct bfd_link_hash_table *
   4033 elf32_arm_link_hash_table_create (bfd *abfd)
   4034 {
   4035   struct elf32_arm_link_hash_table *ret;
   4036   size_t amt = sizeof (struct elf32_arm_link_hash_table);
   4037 
   4038   ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
   4039   if (ret == NULL)
   4040     return NULL;
   4041 
   4042   if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
   4043 				      elf32_arm_link_hash_newfunc,
   4044 				      sizeof (struct elf32_arm_link_hash_entry)))
   4045     {
   4046       free (ret);
   4047       return NULL;
   4048     }
   4049 
   4050   ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
   4051   ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
   4052 #ifdef FOUR_WORD_PLT
   4053   ret->plt_header_size = 16;
   4054   ret->plt_entry_size = 16;
   4055 #else
   4056   ret->plt_header_size = 20;
   4057   ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
   4058 #endif
   4059   ret->use_rel = true;
   4060   ret->obfd = abfd;
   4061   ret->fdpic_p = 0;
   4062 
   4063   if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
   4064 			    sizeof (struct elf32_arm_stub_hash_entry)))
   4065     {
   4066       _bfd_elf_link_hash_table_free (abfd);
   4067       return NULL;
   4068     }
   4069   ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
   4070 
   4071   return &ret->root.root;
   4072 }
   4073 
   4074 /* Determine what kind of NOPs are available.  */
   4075 
   4076 static bool
   4077 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
   4078 {
   4079   const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
   4080 					     Tag_CPU_arch);
   4081 
   4082   /* Force return logic to be reviewed for each new architecture.  */
   4083   BFD_ASSERT (arch <= TAG_CPU_ARCH_V9);
   4084 
   4085   return (arch == TAG_CPU_ARCH_V6T2
   4086 	  || arch == TAG_CPU_ARCH_V6K
   4087 	  || arch == TAG_CPU_ARCH_V7
   4088 	  || arch == TAG_CPU_ARCH_V8
   4089 	  || arch == TAG_CPU_ARCH_V8R
   4090 	  || arch == TAG_CPU_ARCH_V9);
   4091 }
   4092 
   4093 static bool
   4094 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
   4095 {
   4096   switch (stub_type)
   4097     {
   4098     case arm_stub_long_branch_thumb_only:
   4099     case arm_stub_long_branch_thumb2_only:
   4100     case arm_stub_long_branch_thumb2_only_pure:
   4101     case arm_stub_long_branch_v4t_thumb_arm:
   4102     case arm_stub_short_branch_v4t_thumb_arm:
   4103     case arm_stub_long_branch_v4t_thumb_arm_pic:
   4104     case arm_stub_long_branch_v4t_thumb_tls_pic:
   4105     case arm_stub_long_branch_thumb_only_pic:
   4106     case arm_stub_cmse_branch_thumb_only:
   4107       return true;
   4108     case arm_stub_none:
   4109       BFD_FAIL ();
   4110       return false;
   4111       break;
   4112     default:
   4113       return false;
   4114     }
   4115 }
   4116 
   4117 /* Determine the type of stub needed, if any, for a call.  */
   4118 
   4119 static enum elf32_arm_stub_type
   4120 arm_type_of_stub (struct bfd_link_info *info,
   4121 		  asection *input_sec,
   4122 		  const Elf_Internal_Rela *rel,
   4123 		  unsigned char st_type,
   4124 		  enum arm_st_branch_type *actual_branch_type,
   4125 		  struct elf32_arm_link_hash_entry *hash,
   4126 		  bfd_vma destination,
   4127 		  asection *sym_sec,
   4128 		  bfd *input_bfd,
   4129 		  const char *name)
   4130 {
   4131   bfd_vma location;
   4132   bfd_signed_vma branch_offset;
   4133   unsigned int r_type;
   4134   struct elf32_arm_link_hash_table * globals;
   4135   bool thumb2, thumb2_bl, thumb_only;
   4136   enum elf32_arm_stub_type stub_type = arm_stub_none;
   4137   int use_plt = 0;
   4138   enum arm_st_branch_type branch_type = *actual_branch_type;
   4139   union gotplt_union *root_plt;
   4140   struct arm_plt_info *arm_plt;
   4141   int arch;
   4142   int thumb2_movw;
   4143 
   4144   if (branch_type == ST_BRANCH_LONG)
   4145     return stub_type;
   4146 
   4147   globals = elf32_arm_hash_table (info);
   4148   if (globals == NULL)
   4149     return stub_type;
   4150 
   4151   thumb_only = using_thumb_only (globals);
   4152   thumb2 = using_thumb2 (globals);
   4153   thumb2_bl = using_thumb2_bl (globals);
   4154 
   4155   arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
   4156 
   4157   /* True for architectures that implement the thumb2 movw instruction.  */
   4158   thumb2_movw = thumb2 || (arch  == TAG_CPU_ARCH_V8M_BASE);
   4159 
   4160   /* Determine where the call point is.  */
   4161   location = (input_sec->output_offset
   4162 	      + input_sec->output_section->vma
   4163 	      + rel->r_offset);
   4164 
   4165   r_type = ELF32_R_TYPE (rel->r_info);
   4166 
   4167   /* Don't pretend we know what stub to use (if any) when we target a
   4168      Thumb-only target and we don't know the actual destination
   4169      type.  */
   4170   if (branch_type == ST_BRANCH_UNKNOWN && thumb_only)
   4171     return stub_type;
   4172 
   4173   /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
   4174      are considering a function call relocation.  */
   4175   if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
   4176 		     || r_type == R_ARM_THM_JUMP19)
   4177       && branch_type == ST_BRANCH_TO_ARM)
   4178     {
   4179       if (sym_sec == bfd_abs_section_ptr)
   4180 	/* As an exception, assume that absolute symbols are of the
   4181 	   right kind (Thumb).  They are presumably defined in the
   4182 	   linker script, where it is not possible to declare them as
   4183 	   Thumb (and thus are seen as Arm mode). We'll inform the
   4184 	   user with a warning, though, in
   4185 	   elf32_arm_final_link_relocate. */
   4186 	branch_type = ST_BRANCH_TO_THUMB;
   4187       else
   4188 	/* Otherwise do not silently build a stub, and let the users
   4189 	   know they have to fix their code.  Indeed, we could decide
   4190 	   to insert a stub involving Arm code and/or BLX, leading to
   4191 	   a run-time crash.  */
   4192 	return stub_type;
   4193     }
   4194 
   4195   /* For TLS call relocs, it is the caller's responsibility to provide
   4196      the address of the appropriate trampoline.  */
   4197   if (r_type != R_ARM_TLS_CALL
   4198       && r_type != R_ARM_THM_TLS_CALL
   4199       && elf32_arm_get_plt_info (input_bfd, globals, hash,
   4200 				 ELF32_R_SYM (rel->r_info), &root_plt,
   4201 				 &arm_plt)
   4202       && root_plt->offset != (bfd_vma) -1)
   4203     {
   4204       asection *splt;
   4205 
   4206       if (hash == NULL || hash->is_iplt)
   4207 	splt = globals->root.iplt;
   4208       else
   4209 	splt = globals->root.splt;
   4210       if (splt != NULL)
   4211 	{
   4212 	  use_plt = 1;
   4213 
   4214 	  /* Note when dealing with PLT entries: the main PLT stub is in
   4215 	     ARM mode, so if the branch is in Thumb mode, another
   4216 	     Thumb->ARM stub will be inserted later just before the ARM
   4217 	     PLT stub. If a long branch stub is needed, we'll add a
   4218 	     Thumb->Arm one and branch directly to the ARM PLT entry.
   4219 	     Here, we have to check if a pre-PLT Thumb->ARM stub
   4220 	     is needed and if it will be close enough.  */
   4221 
   4222 	  destination = (splt->output_section->vma
   4223 			 + splt->output_offset
   4224 			 + root_plt->offset);
   4225 	  st_type = STT_FUNC;
   4226 
   4227 	  /* Thumb branch/call to PLT: it can become a branch to ARM
   4228 	     or to Thumb. We must perform the same checks and
   4229 	     corrections as in elf32_arm_final_link_relocate.  */
   4230 	  if ((r_type == R_ARM_THM_CALL)
   4231 	      || (r_type == R_ARM_THM_JUMP24))
   4232 	    {
   4233 	      if (globals->use_blx
   4234 		  && r_type == R_ARM_THM_CALL
   4235 		  && !thumb_only)
   4236 		{
   4237 		  /* If the Thumb BLX instruction is available, convert
   4238 		     the BL to a BLX instruction to call the ARM-mode
   4239 		     PLT entry.  */
   4240 		  branch_type = ST_BRANCH_TO_ARM;
   4241 		}
   4242 	      else
   4243 		{
   4244 		  if (!thumb_only)
   4245 		    /* Target the Thumb stub before the ARM PLT entry.  */
   4246 		    destination -= PLT_THUMB_STUB_SIZE;
   4247 		  branch_type = ST_BRANCH_TO_THUMB;
   4248 		}
   4249 	    }
   4250 	  else
   4251 	    {
   4252 	      branch_type = ST_BRANCH_TO_ARM;
   4253 	    }
   4254 	}
   4255     }
   4256   /* Calls to STT_GNU_IFUNC symbols should go through a PLT.  */
   4257   BFD_ASSERT (st_type != STT_GNU_IFUNC);
   4258 
   4259   branch_offset = (bfd_signed_vma)(destination - location);
   4260 
   4261   if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
   4262       || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
   4263     {
   4264       /* Handle cases where:
   4265 	 - this call goes too far (different Thumb/Thumb2 max
   4266 	   distance)
   4267 	 - it's a Thumb->Arm call and blx is not available, or it's a
   4268 	   Thumb->Arm branch (not bl). A stub is needed in this case,
   4269 	   but only if this call is not through a PLT entry. Indeed,
   4270 	   PLT stubs handle mode switching already.  */
   4271       if ((!thumb2_bl
   4272 	    && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
   4273 		|| (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
   4274 	  || (thumb2_bl
   4275 	      && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
   4276 		  || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
   4277 	  || (thumb2
   4278 	      && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
   4279 		  || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
   4280 	      && (r_type == R_ARM_THM_JUMP19))
   4281 	  || (branch_type == ST_BRANCH_TO_ARM
   4282 	      && (((r_type == R_ARM_THM_CALL
   4283 		    || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
   4284 		  || (r_type == R_ARM_THM_JUMP24)
   4285 		  || (r_type == R_ARM_THM_JUMP19))
   4286 	      && !use_plt))
   4287 	{
   4288 	  /* If we need to insert a Thumb-Thumb long branch stub to a
   4289 	     PLT, use one that branches directly to the ARM PLT
   4290 	     stub. If we pretended we'd use the pre-PLT Thumb->ARM
   4291 	     stub, undo this now.  */
   4292 	  if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only)
   4293 	    {
   4294 	      branch_type = ST_BRANCH_TO_ARM;
   4295 	      branch_offset += PLT_THUMB_STUB_SIZE;
   4296 	    }
   4297 
   4298 	  if (branch_type == ST_BRANCH_TO_THUMB)
   4299 	    {
   4300 	      /* Thumb to thumb.  */
   4301 	      if (!thumb_only)
   4302 		{
   4303 		  if (input_sec->flags & SEC_ELF_PURECODE)
   4304 		    _bfd_error_handler
   4305 		      (_("%pB(%pA): warning: long branch veneers used in"
   4306 			 " section with SHF_ARM_PURECODE section"
   4307 			 " attribute is only supported for M-profile"
   4308 			 " targets that implement the movw instruction"),
   4309 		       input_bfd, input_sec);
   4310 
   4311 		  stub_type = (bfd_link_pic (info) | globals->pic_veneer)
   4312 		    /* PIC stubs.  */
   4313 		    ? ((globals->use_blx
   4314 			&& (r_type == R_ARM_THM_CALL))
   4315 		       /* V5T and above. Stub starts with ARM code, so
   4316 			  we must be able to switch mode before
   4317 			  reaching it, which is only possible for 'bl'
   4318 			  (ie R_ARM_THM_CALL relocation).  */
   4319 		       ? arm_stub_long_branch_any_thumb_pic
   4320 		       /* On V4T, use Thumb code only.  */
   4321 		       : arm_stub_long_branch_v4t_thumb_thumb_pic)
   4322 
   4323 		    /* non-PIC stubs.  */
   4324 		    : ((globals->use_blx
   4325 			&& (r_type == R_ARM_THM_CALL))
   4326 		       /* V5T and above.  */
   4327 		       ? arm_stub_long_branch_any_any
   4328 		       /* V4T.  */
   4329 		       : arm_stub_long_branch_v4t_thumb_thumb);
   4330 		}
   4331 	      else
   4332 		{
   4333 		  if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
   4334 		      stub_type = arm_stub_long_branch_thumb2_only_pure;
   4335 		  else
   4336 		    {
   4337 		      if (input_sec->flags & SEC_ELF_PURECODE)
   4338 			_bfd_error_handler
   4339 			  (_("%pB(%pA): warning: long branch veneers used in"
   4340 			     " section with SHF_ARM_PURECODE section"
   4341 			     " attribute is only supported for M-profile"
   4342 			     " targets that implement the movw instruction"),
   4343 			   input_bfd, input_sec);
   4344 
   4345 		      stub_type = (bfd_link_pic (info) | globals->pic_veneer)
   4346 			/* PIC stub.  */
   4347 			? arm_stub_long_branch_thumb_only_pic
   4348 			/* non-PIC stub.  */
   4349 			: (thumb2 ? arm_stub_long_branch_thumb2_only
   4350 				  : arm_stub_long_branch_thumb_only);
   4351 		    }
   4352 		}
   4353 	    }
   4354 	  else
   4355 	    {
   4356 	      if (input_sec->flags & SEC_ELF_PURECODE)
   4357 		_bfd_error_handler
   4358 		  (_("%pB(%pA): warning: long branch veneers used in"
   4359 		     " section with SHF_ARM_PURECODE section"
   4360 		     " attribute is only supported" " for M-profile"
   4361 		     " targets that implement the movw instruction"),
   4362 		   input_bfd, input_sec);
   4363 
   4364 	      /* Thumb to arm.  */
   4365 	      if (sym_sec != NULL
   4366 		  && sym_sec->owner != NULL
   4367 		  && !INTERWORK_FLAG (sym_sec->owner))
   4368 		{
   4369 		  _bfd_error_handler
   4370 		    (_("%pB(%s): warning: interworking not enabled;"
   4371 		       " first occurrence: %pB: %s call to %s"),
   4372 		     sym_sec->owner, name, input_bfd, "Thumb", "ARM");
   4373 		}
   4374 
   4375 	      stub_type =
   4376 		(bfd_link_pic (info) | globals->pic_veneer)
   4377 		/* PIC stubs.  */
   4378 		? (r_type == R_ARM_THM_TLS_CALL
   4379 		   /* TLS PIC stubs.  */
   4380 		   ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
   4381 		      : arm_stub_long_branch_v4t_thumb_tls_pic)
   4382 		   : ((globals->use_blx && r_type == R_ARM_THM_CALL)
   4383 		      /* V5T PIC and above.  */
   4384 		      ? arm_stub_long_branch_any_arm_pic
   4385 		      /* V4T PIC stub.  */
   4386 		      : arm_stub_long_branch_v4t_thumb_arm_pic))
   4387 
   4388 		/* non-PIC stubs.  */
   4389 		: ((globals->use_blx && r_type == R_ARM_THM_CALL)
   4390 		   /* V5T and above.  */
   4391 		   ? arm_stub_long_branch_any_any
   4392 		   /* V4T.  */
   4393 		   : arm_stub_long_branch_v4t_thumb_arm);
   4394 
   4395 	      /* Handle v4t short branches.  */
   4396 	      if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
   4397 		  && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
   4398 		  && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
   4399 		stub_type = arm_stub_short_branch_v4t_thumb_arm;
   4400 	    }
   4401 	}
   4402     }
   4403   else if (r_type == R_ARM_CALL
   4404 	   || r_type == R_ARM_JUMP24
   4405 	   || r_type == R_ARM_PLT32
   4406 	   || r_type == R_ARM_TLS_CALL)
   4407     {
   4408       if (input_sec->flags & SEC_ELF_PURECODE)
   4409 	_bfd_error_handler
   4410 	  (_("%pB(%pA): warning: long branch veneers used in"
   4411 	     " section with SHF_ARM_PURECODE section"
   4412 	     " attribute is only supported for M-profile"
   4413 	     " targets that implement the movw instruction"),
   4414 	   input_bfd, input_sec);
   4415       if (branch_type == ST_BRANCH_TO_THUMB)
   4416 	{
   4417 	  /* Arm to thumb.  */
   4418 
   4419 	  if (sym_sec != NULL
   4420 	      && sym_sec->owner != NULL
   4421 	      && !INTERWORK_FLAG (sym_sec->owner))
   4422 	    {
   4423 	      _bfd_error_handler
   4424 		(_("%pB(%s): warning: interworking not enabled;"
   4425 		   " first occurrence: %pB: %s call to %s"),
   4426 		 sym_sec->owner, name, input_bfd, "ARM", "Thumb");
   4427 	    }
   4428 
   4429 	  /* We have an extra 2-bytes reach because of
   4430 	     the mode change (bit 24 (H) of BLX encoding).  */
   4431 	  if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
   4432 	      || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
   4433 	      || (r_type == R_ARM_CALL && !globals->use_blx)
   4434 	      || (r_type == R_ARM_JUMP24)
   4435 	      || (r_type == R_ARM_PLT32))
   4436 	    {
   4437 	      stub_type = (bfd_link_pic (info) | globals->pic_veneer)
   4438 		/* PIC stubs.  */
   4439 		? ((globals->use_blx)
   4440 		   /* V5T and above.  */
   4441 		   ? arm_stub_long_branch_any_thumb_pic
   4442 		   /* V4T stub.  */
   4443 		   : arm_stub_long_branch_v4t_arm_thumb_pic)
   4444 
   4445 		/* non-PIC stubs.  */
   4446 		: ((globals->use_blx)
   4447 		   /* V5T and above.  */
   4448 		   ? arm_stub_long_branch_any_any
   4449 		   /* V4T.  */
   4450 		   : arm_stub_long_branch_v4t_arm_thumb);
   4451 	    }
   4452 	}
   4453       else
   4454 	{
   4455 	  /* Arm to arm.  */
   4456 	  if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
   4457 	      || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
   4458 	    {
   4459 	      stub_type =
   4460 		(bfd_link_pic (info) | globals->pic_veneer)
   4461 		/* PIC stubs.  */
   4462 		? (r_type == R_ARM_TLS_CALL
   4463 		   /* TLS PIC Stub.  */
   4464 		   ? arm_stub_long_branch_any_tls_pic
   4465 		   : arm_stub_long_branch_any_arm_pic)
   4466 		/* non-PIC stubs.  */
   4467 		: arm_stub_long_branch_any_any;
   4468 	    }
   4469 	}
   4470     }
   4471 
   4472   /* If a stub is needed, record the actual destination type.  */
   4473   if (stub_type != arm_stub_none)
   4474     *actual_branch_type = branch_type;
   4475 
   4476   return stub_type;
   4477 }
   4478 
   4479 /* Build a name for an entry in the stub hash table.  */
   4480 
   4481 static char *
   4482 elf32_arm_stub_name (const asection *input_section,
   4483 		     const asection *sym_sec,
   4484 		     const struct elf32_arm_link_hash_entry *hash,
   4485 		     const Elf_Internal_Rela *rel,
   4486 		     enum elf32_arm_stub_type stub_type)
   4487 {
   4488   char *stub_name;
   4489   bfd_size_type len;
   4490 
   4491   if (hash)
   4492     {
   4493       len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
   4494       stub_name = (char *) bfd_malloc (len);
   4495       if (stub_name != NULL)
   4496 	sprintf (stub_name, "%08x_%s+%x_%d",
   4497 		 input_section->id & 0xffffffff,
   4498 		 hash->root.root.root.string,
   4499 		 (int) rel->r_addend & 0xffffffff,
   4500 		 (int) stub_type);
   4501     }
   4502   else
   4503     {
   4504       len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
   4505       stub_name = (char *) bfd_malloc (len);
   4506       if (stub_name != NULL)
   4507 	sprintf (stub_name, "%08x_%x:%x+%x_%d",
   4508 		 input_section->id & 0xffffffff,
   4509 		 sym_sec->id & 0xffffffff,
   4510 		 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
   4511 		 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
   4512 		 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
   4513 		 (int) rel->r_addend & 0xffffffff,
   4514 		 (int) stub_type);
   4515     }
   4516 
   4517   return stub_name;
   4518 }
   4519 
   4520 /* Look up an entry in the stub hash.  Stub entries are cached because
   4521    creating the stub name takes a bit of time.  */
   4522 
   4523 static struct elf32_arm_stub_hash_entry *
   4524 elf32_arm_get_stub_entry (const asection *input_section,
   4525 			  const asection *sym_sec,
   4526 			  struct elf_link_hash_entry *hash,
   4527 			  const Elf_Internal_Rela *rel,
   4528 			  struct elf32_arm_link_hash_table *htab,
   4529 			  enum elf32_arm_stub_type stub_type)
   4530 {
   4531   struct elf32_arm_stub_hash_entry *stub_entry;
   4532   struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
   4533   const asection *id_sec;
   4534 
   4535   if ((input_section->flags & SEC_CODE) == 0)
   4536     return NULL;
   4537 
   4538   /* If the input section is the CMSE stubs one and it needs a long
   4539      branch stub to reach it's final destination, give up with an
   4540      error message: this is not supported.  See PR ld/24709.  */
   4541   if (!strncmp (input_section->name, CMSE_STUB_NAME, strlen (CMSE_STUB_NAME)))
   4542     {
   4543       bfd *output_bfd = htab->obfd;
   4544       asection *out_sec = bfd_get_section_by_name (output_bfd, CMSE_STUB_NAME);
   4545 
   4546       _bfd_error_handler (_("ERROR: CMSE stub (%s section) too far "
   4547 			    "(%#" PRIx64 ") from destination (%#" PRIx64 ")"),
   4548 			  CMSE_STUB_NAME,
   4549 			  (uint64_t)out_sec->output_section->vma
   4550 			    + out_sec->output_offset,
   4551 			  (uint64_t)sym_sec->output_section->vma
   4552 			    + sym_sec->output_offset
   4553 			    + h->root.root.u.def.value);
   4554       /* Exit, rather than leave incompletely processed
   4555 	 relocations.  */
   4556       xexit (1);
   4557     }
   4558 
   4559   /* If this input section is part of a group of sections sharing one
   4560      stub section, then use the id of the first section in the group.
   4561      Stub names need to include a section id, as there may well be
   4562      more than one stub used to reach say, printf, and we need to
   4563      distinguish between them.  */
   4564   BFD_ASSERT (input_section->id <= htab->top_id);
   4565   id_sec = htab->stub_group[input_section->id].link_sec;
   4566 
   4567   if (h != NULL && h->stub_cache != NULL
   4568       && h->stub_cache->h == h
   4569       && h->stub_cache->id_sec == id_sec
   4570       && h->stub_cache->stub_type == stub_type)
   4571     {
   4572       stub_entry = h->stub_cache;
   4573     }
   4574   else
   4575     {
   4576       char *stub_name;
   4577 
   4578       stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
   4579       if (stub_name == NULL)
   4580 	return NULL;
   4581 
   4582       stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
   4583 					stub_name, false, false);
   4584       if (h != NULL)
   4585 	h->stub_cache = stub_entry;
   4586 
   4587       free (stub_name);
   4588     }
   4589 
   4590   return stub_entry;
   4591 }
   4592 
   4593 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
   4594    section.  */
   4595 
   4596 static bool
   4597 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
   4598 {
   4599   if (stub_type >= max_stub_type)
   4600     abort ();  /* Should be unreachable.  */
   4601 
   4602   switch (stub_type)
   4603     {
   4604     case arm_stub_cmse_branch_thumb_only:
   4605       return true;
   4606 
   4607     default:
   4608       return false;
   4609     }
   4610 
   4611   abort ();  /* Should be unreachable.  */
   4612 }
   4613 
   4614 /* Required alignment (as a power of 2) for the dedicated section holding
   4615    veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
   4616    with input sections.  */
   4617 
   4618 static int
   4619 arm_dedicated_stub_output_section_required_alignment
   4620   (enum elf32_arm_stub_type stub_type)
   4621 {
   4622   if (stub_type >= max_stub_type)
   4623     abort ();  /* Should be unreachable.  */
   4624 
   4625   switch (stub_type)
   4626     {
   4627     /* Vectors of Secure Gateway veneers must be aligned on 32byte
   4628        boundary.  */
   4629     case arm_stub_cmse_branch_thumb_only:
   4630       return 5;
   4631 
   4632     default:
   4633       BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
   4634       return 0;
   4635     }
   4636 
   4637   abort ();  /* Should be unreachable.  */
   4638 }
   4639 
   4640 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
   4641    NULL if veneers of this type are interspersed with input sections.  */
   4642 
   4643 static const char *
   4644 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
   4645 {
   4646   if (stub_type >= max_stub_type)
   4647     abort ();  /* Should be unreachable.  */
   4648 
   4649   switch (stub_type)
   4650     {
   4651     case arm_stub_cmse_branch_thumb_only:
   4652       return CMSE_STUB_NAME;
   4653 
   4654     default:
   4655       BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
   4656       return NULL;
   4657     }
   4658 
   4659   abort ();  /* Should be unreachable.  */
   4660 }
   4661 
   4662 /* If veneers of type STUB_TYPE should go in a dedicated output section,
   4663    returns the address of the hash table field in HTAB holding a pointer to the
   4664    corresponding input section.  Otherwise, returns NULL.  */
   4665 
   4666 static asection **
   4667 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
   4668 				      enum elf32_arm_stub_type stub_type)
   4669 {
   4670   if (stub_type >= max_stub_type)
   4671     abort ();  /* Should be unreachable.  */
   4672 
   4673   switch (stub_type)
   4674     {
   4675     case arm_stub_cmse_branch_thumb_only:
   4676       return &htab->cmse_stub_sec;
   4677 
   4678     default:
   4679       BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
   4680       return NULL;
   4681     }
   4682 
   4683   abort ();  /* Should be unreachable.  */
   4684 }
   4685 
   4686 /* Find or create a stub section to contain a stub of type STUB_TYPE.  SECTION
   4687    is the section that branch into veneer and can be NULL if stub should go in
   4688    a dedicated output section.  Returns a pointer to the stub section, and the
   4689    section to which the stub section will be attached (in *LINK_SEC_P).
   4690    LINK_SEC_P may be NULL.  */
   4691 
   4692 static asection *
   4693 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
   4694 				   struct elf32_arm_link_hash_table *htab,
   4695 				   enum elf32_arm_stub_type stub_type)
   4696 {
   4697   asection *link_sec, *out_sec, **stub_sec_p;
   4698   const char *stub_sec_prefix;
   4699   bool dedicated_output_section =
   4700     arm_dedicated_stub_output_section_required (stub_type);
   4701   int align;
   4702 
   4703   if (dedicated_output_section)
   4704     {
   4705       bfd *output_bfd = htab->obfd;
   4706       const char *out_sec_name =
   4707 	arm_dedicated_stub_output_section_name (stub_type);
   4708       link_sec = NULL;
   4709       stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
   4710       stub_sec_prefix = out_sec_name;
   4711       align = arm_dedicated_stub_output_section_required_alignment (stub_type);
   4712       out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
   4713       if (out_sec == NULL)
   4714 	{
   4715 	  _bfd_error_handler (_("no address assigned to the veneers output "
   4716 				"section %s"), out_sec_name);
   4717 	  return NULL;
   4718 	}
   4719     }
   4720   else
   4721     {
   4722       BFD_ASSERT (section->id <= htab->top_id);
   4723       link_sec = htab->stub_group[section->id].link_sec;
   4724       BFD_ASSERT (link_sec != NULL);
   4725       stub_sec_p = &htab->stub_group[section->id].stub_sec;
   4726       if (*stub_sec_p == NULL)
   4727 	stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
   4728       stub_sec_prefix = link_sec->name;
   4729       out_sec = link_sec->output_section;
   4730       align = 3;
   4731     }
   4732 
   4733   if (*stub_sec_p == NULL)
   4734     {
   4735       size_t namelen;
   4736       bfd_size_type len;
   4737       char *s_name;
   4738 
   4739       namelen = strlen (stub_sec_prefix);
   4740       len = namelen + sizeof (STUB_SUFFIX);
   4741       s_name = (char *) bfd_alloc (htab->stub_bfd, len);
   4742       if (s_name == NULL)
   4743 	return NULL;
   4744 
   4745       memcpy (s_name, stub_sec_prefix, namelen);
   4746       memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
   4747       *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
   4748 					       align);
   4749       if (*stub_sec_p == NULL)
   4750 	return NULL;
   4751 
   4752       out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
   4753 			| SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
   4754 			| SEC_KEEP;
   4755     }
   4756 
   4757   if (!dedicated_output_section)
   4758     htab->stub_group[section->id].stub_sec = *stub_sec_p;
   4759 
   4760   if (link_sec_p)
   4761     *link_sec_p = link_sec;
   4762 
   4763   return *stub_sec_p;
   4764 }
   4765 
   4766 /* Add a new stub entry to the stub hash.  Not all fields of the new
   4767    stub entry are initialised.  */
   4768 
   4769 static struct elf32_arm_stub_hash_entry *
   4770 elf32_arm_add_stub (const char *stub_name, asection *section,
   4771 		    struct elf32_arm_link_hash_table *htab,
   4772 		    enum elf32_arm_stub_type stub_type)
   4773 {
   4774   asection *link_sec;
   4775   asection *stub_sec;
   4776   struct elf32_arm_stub_hash_entry *stub_entry;
   4777 
   4778   stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
   4779 						stub_type);
   4780   if (stub_sec == NULL)
   4781     return NULL;
   4782 
   4783   /* Enter this entry into the linker stub hash table.  */
   4784   stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
   4785 				     true, false);
   4786   if (stub_entry == NULL)
   4787     {
   4788       if (section == NULL)
   4789 	section = stub_sec;
   4790       _bfd_error_handler (_("%pB: cannot create stub entry %s"),
   4791 			  section->owner, stub_name);
   4792       return NULL;
   4793     }
   4794 
   4795   stub_entry->stub_sec = stub_sec;
   4796   stub_entry->stub_offset = (bfd_vma) -1;
   4797   stub_entry->id_sec = link_sec;
   4798 
   4799   return stub_entry;
   4800 }
   4801 
   4802 /* Store an Arm insn into an output section not processed by
   4803    elf32_arm_write_section.  */
   4804 
   4805 static void
   4806 put_arm_insn (struct elf32_arm_link_hash_table * htab,
   4807 	      bfd * output_bfd, bfd_vma val, void * ptr)
   4808 {
   4809   if (htab->byteswap_code != bfd_little_endian (output_bfd))
   4810     bfd_putl32 (val, ptr);
   4811   else
   4812     bfd_putb32 (val, ptr);
   4813 }
   4814 
   4815 /* Store a 16-bit Thumb insn into an output section not processed by
   4816    elf32_arm_write_section.  */
   4817 
   4818 static void
   4819 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
   4820 		bfd * output_bfd, bfd_vma val, void * ptr)
   4821 {
   4822   if (htab->byteswap_code != bfd_little_endian (output_bfd))
   4823     bfd_putl16 (val, ptr);
   4824   else
   4825     bfd_putb16 (val, ptr);
   4826 }
   4827 
   4828 /* Store a Thumb2 insn into an output section not processed by
   4829    elf32_arm_write_section.  */
   4830 
   4831 static void
   4832 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
   4833 		 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
   4834 {
   4835   /* T2 instructions are 16-bit streamed.  */
   4836   if (htab->byteswap_code != bfd_little_endian (output_bfd))
   4837     {
   4838       bfd_putl16 ((val >> 16) & 0xffff, ptr);
   4839       bfd_putl16 ((val & 0xffff), ptr + 2);
   4840     }
   4841   else
   4842     {
   4843       bfd_putb16 ((val >> 16) & 0xffff, ptr);
   4844       bfd_putb16 ((val & 0xffff), ptr + 2);
   4845     }
   4846 }
   4847 
   4848 /* If it's possible to change R_TYPE to a more efficient access
   4849    model, return the new reloc type.  */
   4850 
   4851 static unsigned
   4852 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
   4853 			  struct elf_link_hash_entry *h)
   4854 {
   4855   int is_local = (h == NULL);
   4856 
   4857   if (bfd_link_dll (info)
   4858       || (h && h->root.type == bfd_link_hash_undefweak))
   4859     return r_type;
   4860 
   4861   /* We do not support relaxations for Old TLS models.  */
   4862   switch (r_type)
   4863     {
   4864     case R_ARM_TLS_GOTDESC:
   4865     case R_ARM_TLS_CALL:
   4866     case R_ARM_THM_TLS_CALL:
   4867     case R_ARM_TLS_DESCSEQ:
   4868     case R_ARM_THM_TLS_DESCSEQ:
   4869       return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
   4870     }
   4871 
   4872   return r_type;
   4873 }
   4874 
   4875 static bfd_reloc_status_type elf32_arm_final_link_relocate
   4876   (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
   4877    Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
   4878    const char *, unsigned char, enum arm_st_branch_type,
   4879    struct elf_link_hash_entry *, bool *, char **);
   4880 
   4881 static unsigned int
   4882 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
   4883 {
   4884   switch (stub_type)
   4885     {
   4886     case arm_stub_a8_veneer_b_cond:
   4887     case arm_stub_a8_veneer_b:
   4888     case arm_stub_a8_veneer_bl:
   4889       return 2;
   4890 
   4891     case arm_stub_long_branch_any_any:
   4892     case arm_stub_long_branch_v4t_arm_thumb:
   4893     case arm_stub_long_branch_thumb_only:
   4894     case arm_stub_long_branch_thumb2_only:
   4895     case arm_stub_long_branch_thumb2_only_pure:
   4896     case arm_stub_long_branch_v4t_thumb_thumb:
   4897     case arm_stub_long_branch_v4t_thumb_arm:
   4898     case arm_stub_short_branch_v4t_thumb_arm:
   4899     case arm_stub_long_branch_any_arm_pic:
   4900     case arm_stub_long_branch_any_thumb_pic:
   4901     case arm_stub_long_branch_v4t_thumb_thumb_pic:
   4902     case arm_stub_long_branch_v4t_arm_thumb_pic:
   4903     case arm_stub_long_branch_v4t_thumb_arm_pic:
   4904     case arm_stub_long_branch_thumb_only_pic:
   4905     case arm_stub_long_branch_any_tls_pic:
   4906     case arm_stub_long_branch_v4t_thumb_tls_pic:
   4907     case arm_stub_cmse_branch_thumb_only:
   4908     case arm_stub_a8_veneer_blx:
   4909       return 4;
   4910 
   4911     default:
   4912       abort ();  /* Should be unreachable.  */
   4913     }
   4914 }
   4915 
   4916 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
   4917    veneering (TRUE) or have their own symbol (FALSE).  */
   4918 
   4919 static bool
   4920 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
   4921 {
   4922   if (stub_type >= max_stub_type)
   4923     abort ();  /* Should be unreachable.  */
   4924 
   4925   switch (stub_type)
   4926     {
   4927     case arm_stub_cmse_branch_thumb_only:
   4928       return true;
   4929 
   4930     default:
   4931       return false;
   4932     }
   4933 
   4934   abort ();  /* Should be unreachable.  */
   4935 }
   4936 
   4937 /* Returns the padding needed for the dedicated section used stubs of type
   4938    STUB_TYPE.  */
   4939 
   4940 static int
   4941 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
   4942 {
   4943   if (stub_type >= max_stub_type)
   4944     abort ();  /* Should be unreachable.  */
   4945 
   4946   switch (stub_type)
   4947     {
   4948     case arm_stub_cmse_branch_thumb_only:
   4949       return 32;
   4950 
   4951     default:
   4952       return 0;
   4953     }
   4954 
   4955   abort ();  /* Should be unreachable.  */
   4956 }
   4957 
   4958 /* If veneers of type STUB_TYPE should go in a dedicated output section,
   4959    returns the address of the hash table field in HTAB holding the offset at
   4960    which new veneers should be layed out in the stub section.  */
   4961 
   4962 static bfd_vma*
   4963 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
   4964 				enum elf32_arm_stub_type stub_type)
   4965 {
   4966   switch (stub_type)
   4967     {
   4968     case arm_stub_cmse_branch_thumb_only:
   4969       return &htab->new_cmse_stub_offset;
   4970 
   4971     default:
   4972       BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
   4973       return NULL;
   4974     }
   4975 }
   4976 
   4977 static bool
   4978 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
   4979 		    void * in_arg)
   4980 {
   4981 #define MAXRELOCS 3
   4982   bool removed_sg_veneer;
   4983   struct elf32_arm_stub_hash_entry *stub_entry;
   4984   struct elf32_arm_link_hash_table *globals;
   4985   struct bfd_link_info *info;
   4986   asection *stub_sec;
   4987   bfd *stub_bfd;
   4988   bfd_byte *loc;
   4989   bfd_vma sym_value;
   4990   int template_size;
   4991   int size;
   4992   const insn_sequence *template_sequence;
   4993   int i;
   4994   int stub_reloc_idx[MAXRELOCS] = {-1, -1};
   4995   int stub_reloc_offset[MAXRELOCS] = {0, 0};
   4996   int nrelocs = 0;
   4997   int just_allocated = 0;
   4998 
   4999   /* Massage our args to the form they really have.  */
   5000   stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
   5001   info = (struct bfd_link_info *) in_arg;
   5002 
   5003   /* Fail if the target section could not be assigned to an output
   5004      section.  The user should fix his linker script.  */
   5005   if (stub_entry->target_section->output_section == NULL
   5006       && info->non_contiguous_regions)
   5007     info->callbacks->fatal (_("%P: Could not assign `%pA' to an output section. "
   5008 			      "Retry without --enable-non-contiguous-regions.\n"),
   5009 			    stub_entry->target_section);
   5010 
   5011   globals = elf32_arm_hash_table (info);
   5012   if (globals == NULL)
   5013     return false;
   5014 
   5015   stub_sec = stub_entry->stub_sec;
   5016 
   5017   if ((globals->fix_cortex_a8 < 0)
   5018       != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
   5019     /* We have to do less-strictly-aligned fixes last.  */
   5020     return true;
   5021 
   5022   /* Assign a slot at the end of section if none assigned yet.  */
   5023   if (stub_entry->stub_offset == (bfd_vma) -1)
   5024     {
   5025       stub_entry->stub_offset = stub_sec->size;
   5026       just_allocated = 1;
   5027     }
   5028   loc = stub_sec->contents + stub_entry->stub_offset;
   5029 
   5030   stub_bfd = stub_sec->owner;
   5031 
   5032   /* This is the address of the stub destination.  */
   5033   sym_value = (stub_entry->target_value
   5034 	       + stub_entry->target_section->output_offset
   5035 	       + stub_entry->target_section->output_section->vma);
   5036 
   5037   template_sequence = stub_entry->stub_template;
   5038   template_size = stub_entry->stub_template_size;
   5039 
   5040   size = 0;
   5041   for (i = 0; i < template_size; i++)
   5042     {
   5043       switch (template_sequence[i].type)
   5044 	{
   5045 	case THUMB16_TYPE:
   5046 	  {
   5047 	    bfd_vma data = (bfd_vma) template_sequence[i].data;
   5048 	    if (template_sequence[i].reloc_addend != 0)
   5049 	      {
   5050 		/* We've borrowed the reloc_addend field to mean we should
   5051 		   insert a condition code into this (Thumb-1 branch)
   5052 		   instruction.  See THUMB16_BCOND_INSN.  */
   5053 		BFD_ASSERT ((data & 0xff00) == 0xd000);
   5054 		data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
   5055 	      }
   5056 	    bfd_put_16 (stub_bfd, data, loc + size);
   5057 	    size += 2;
   5058 	  }
   5059 	  break;
   5060 
   5061 	case THUMB32_TYPE:
   5062 	  bfd_put_16 (stub_bfd,
   5063 		      (template_sequence[i].data >> 16) & 0xffff,
   5064 		      loc + size);
   5065 	  bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
   5066 		      loc + size + 2);
   5067 	  if (template_sequence[i].r_type != R_ARM_NONE)
   5068 	    {
   5069 	      stub_reloc_idx[nrelocs] = i;
   5070 	      stub_reloc_offset[nrelocs++] = size;
   5071 	    }
   5072 	  size += 4;
   5073 	  break;
   5074 
   5075 	case ARM_TYPE:
   5076 	  bfd_put_32 (stub_bfd, template_sequence[i].data,
   5077 		      loc + size);
   5078 	  /* Handle cases where the target is encoded within the
   5079 	     instruction.  */
   5080 	  if (template_sequence[i].r_type == R_ARM_JUMP24)
   5081 	    {
   5082 	      stub_reloc_idx[nrelocs] = i;
   5083 	      stub_reloc_offset[nrelocs++] = size;
   5084 	    }
   5085 	  size += 4;
   5086 	  break;
   5087 
   5088 	case DATA_TYPE:
   5089 	  bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
   5090 	  stub_reloc_idx[nrelocs] = i;
   5091 	  stub_reloc_offset[nrelocs++] = size;
   5092 	  size += 4;
   5093 	  break;
   5094 
   5095 	default:
   5096 	  BFD_FAIL ();
   5097 	  return false;
   5098 	}
   5099     }
   5100 
   5101   if (just_allocated)
   5102     stub_sec->size += size;
   5103 
   5104   /* Stub size has already been computed in arm_size_one_stub. Check
   5105      consistency.  */
   5106   BFD_ASSERT (size == stub_entry->stub_size);
   5107 
   5108   /* Destination is Thumb. Force bit 0 to 1 to reflect this.  */
   5109   if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
   5110     sym_value |= 1;
   5111 
   5112   /* Assume non empty slots have at least one and at most MAXRELOCS entries
   5113      to relocate in each stub.  */
   5114   removed_sg_veneer =
   5115     (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
   5116   BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
   5117 
   5118   for (i = 0; i < nrelocs; i++)
   5119     {
   5120       Elf_Internal_Rela rel;
   5121       bool unresolved_reloc;
   5122       char *error_message;
   5123       bfd_vma points_to =
   5124 	sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
   5125 
   5126       rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
   5127       rel.r_info = ELF32_R_INFO (0,
   5128 				 template_sequence[stub_reloc_idx[i]].r_type);
   5129       rel.r_addend = 0;
   5130 
   5131       if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
   5132 	/* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
   5133 	   template should refer back to the instruction after the original
   5134 	   branch.  We use target_section as Cortex-A8 erratum workaround stubs
   5135 	   are only generated when both source and target are in the same
   5136 	   section.  */
   5137 	points_to = stub_entry->target_section->output_section->vma
   5138 		    + stub_entry->target_section->output_offset
   5139 		    + stub_entry->source_value;
   5140 
   5141       elf32_arm_final_link_relocate (elf32_arm_howto_from_type
   5142 	  (template_sequence[stub_reloc_idx[i]].r_type),
   5143 	   stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
   5144 	   points_to, info, stub_entry->target_section, "", STT_FUNC,
   5145 	   stub_entry->branch_type,
   5146 	   (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
   5147 	   &error_message);
   5148     }
   5149 
   5150   return true;
   5151 #undef MAXRELOCS
   5152 }
   5153 
   5154 /* Calculate the template, template size and instruction size for a stub.
   5155    Return value is the instruction size.  */
   5156 
   5157 static unsigned int
   5158 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
   5159 			     const insn_sequence **stub_template,
   5160 			     int *stub_template_size)
   5161 {
   5162   const insn_sequence *template_sequence = NULL;
   5163   int template_size = 0, i;
   5164   unsigned int size;
   5165 
   5166   template_sequence = stub_definitions[stub_type].template_sequence;
   5167   if (stub_template)
   5168     *stub_template = template_sequence;
   5169 
   5170   template_size = stub_definitions[stub_type].template_size;
   5171   if (stub_template_size)
   5172     *stub_template_size = template_size;
   5173 
   5174   size = 0;
   5175   for (i = 0; i < template_size; i++)
   5176     {
   5177       switch (template_sequence[i].type)
   5178 	{
   5179 	case THUMB16_TYPE:
   5180 	  size += 2;
   5181 	  break;
   5182 
   5183 	case ARM_TYPE:
   5184 	case THUMB32_TYPE:
   5185 	case DATA_TYPE:
   5186 	  size += 4;
   5187 	  break;
   5188 
   5189 	default:
   5190 	  BFD_FAIL ();
   5191 	  return 0;
   5192 	}
   5193     }
   5194 
   5195   return size;
   5196 }
   5197 
   5198 /* As above, but don't actually build the stub.  Just bump offset so
   5199    we know stub section sizes.  */
   5200 
   5201 static bool
   5202 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
   5203 		   void *in_arg ATTRIBUTE_UNUSED)
   5204 {
   5205   struct elf32_arm_stub_hash_entry *stub_entry;
   5206   const insn_sequence *template_sequence;
   5207   int template_size, size;
   5208 
   5209   /* Massage our args to the form they really have.  */
   5210   stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
   5211 
   5212   BFD_ASSERT ((stub_entry->stub_type > arm_stub_none)
   5213 	      && stub_entry->stub_type < ARRAY_SIZE (stub_definitions));
   5214 
   5215   size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
   5216 				      &template_size);
   5217 
   5218   /* Initialized to -1.  Null size indicates an empty slot full of zeros.  */
   5219   if (stub_entry->stub_template_size)
   5220     {
   5221       stub_entry->stub_size = size;
   5222       stub_entry->stub_template = template_sequence;
   5223       stub_entry->stub_template_size = template_size;
   5224     }
   5225 
   5226   /* Already accounted for.  */
   5227   if (stub_entry->stub_offset != (bfd_vma) -1)
   5228     return true;
   5229 
   5230   size = (size + 7) & ~7;
   5231   stub_entry->stub_sec->size += size;
   5232 
   5233   return true;
   5234 }
   5235 
   5236 /* External entry points for sizing and building linker stubs.  */
   5237 
   5238 /* Set up various things so that we can make a list of input sections
   5239    for each output section included in the link.  Returns -1 on error,
   5240    0 when no stubs will be needed, and 1 on success.  */
   5241 
   5242 int
   5243 elf32_arm_setup_section_lists (bfd *output_bfd,
   5244 			       struct bfd_link_info *info)
   5245 {
   5246   bfd *input_bfd;
   5247   unsigned int bfd_count;
   5248   unsigned int top_id, top_index;
   5249   asection *section;
   5250   asection **input_list, **list;
   5251   size_t amt;
   5252   struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
   5253 
   5254   if (htab == NULL)
   5255     return 0;
   5256 
   5257   /* Count the number of input BFDs and find the top input section id.  */
   5258   for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
   5259        input_bfd != NULL;
   5260        input_bfd = input_bfd->link.next)
   5261     {
   5262       bfd_count += 1;
   5263       for (section = input_bfd->sections;
   5264 	   section != NULL;
   5265 	   section = section->next)
   5266 	{
   5267 	  if (top_id < section->id)
   5268 	    top_id = section->id;
   5269 	}
   5270     }
   5271   htab->bfd_count = bfd_count;
   5272 
   5273   amt = sizeof (struct map_stub) * (top_id + 1);
   5274   htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
   5275   if (htab->stub_group == NULL)
   5276     return -1;
   5277   htab->top_id = top_id;
   5278 
   5279   /* We can't use output_bfd->section_count here to find the top output
   5280      section index as some sections may have been removed, and
   5281      _bfd_strip_section_from_output doesn't renumber the indices.  */
   5282   for (section = output_bfd->sections, top_index = 0;
   5283        section != NULL;
   5284        section = section->next)
   5285     {
   5286       if (top_index < section->index)
   5287 	top_index = section->index;
   5288     }
   5289 
   5290   htab->top_index = top_index;
   5291   amt = sizeof (asection *) * (top_index + 1);
   5292   input_list = (asection **) bfd_malloc (amt);
   5293   htab->input_list = input_list;
   5294   if (input_list == NULL)
   5295     return -1;
   5296 
   5297   /* For sections we aren't interested in, mark their entries with a
   5298      value we can check later.  */
   5299   list = input_list + top_index;
   5300   do
   5301     *list = bfd_abs_section_ptr;
   5302   while (list-- != input_list);
   5303 
   5304   for (section = output_bfd->sections;
   5305        section != NULL;
   5306        section = section->next)
   5307     {
   5308       if ((section->flags & SEC_CODE) != 0)
   5309 	input_list[section->index] = NULL;
   5310     }
   5311 
   5312   return 1;
   5313 }
   5314 
   5315 /* The linker repeatedly calls this function for each input section,
   5316    in the order that input sections are linked into output sections.
   5317    Build lists of input sections to determine groupings between which
   5318    we may insert linker stubs.  */
   5319 
   5320 void
   5321 elf32_arm_next_input_section (struct bfd_link_info *info,
   5322 			      asection *isec)
   5323 {
   5324   struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
   5325 
   5326   if (htab == NULL)
   5327     return;
   5328 
   5329   if (isec->output_section->index <= htab->top_index)
   5330     {
   5331       asection **list = htab->input_list + isec->output_section->index;
   5332 
   5333       if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
   5334 	{
   5335 	  /* Steal the link_sec pointer for our list.  */
   5336 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
   5337 	  /* This happens to make the list in reverse order,
   5338 	     which we reverse later.  */
   5339 	  PREV_SEC (isec) = *list;
   5340 	  *list = isec;
   5341 	}
   5342     }
   5343 }
   5344 
   5345 /* See whether we can group stub sections together.  Grouping stub
   5346    sections may result in fewer stubs.  More importantly, we need to
   5347    put all .init* and .fini* stubs at the end of the .init or
   5348    .fini output sections respectively, because glibc splits the
   5349    _init and _fini functions into multiple parts.  Putting a stub in
   5350    the middle of a function is not a good idea.  */
   5351 
   5352 static void
   5353 group_sections (struct elf32_arm_link_hash_table *htab,
   5354 		bfd_size_type stub_group_size,
   5355 		bool stubs_always_after_branch)
   5356 {
   5357   asection **list = htab->input_list;
   5358 
   5359   do
   5360     {
   5361       asection *tail = *list;
   5362       asection *head;
   5363 
   5364       if (tail == bfd_abs_section_ptr)
   5365 	continue;
   5366 
   5367       /* Reverse the list: we must avoid placing stubs at the
   5368 	 beginning of the section because the beginning of the text
   5369 	 section may be required for an interrupt vector in bare metal
   5370 	 code.  */
   5371 #define NEXT_SEC PREV_SEC
   5372       head = NULL;
   5373       while (tail != NULL)
   5374 	{
   5375 	  /* Pop from tail.  */
   5376 	  asection *item = tail;
   5377 	  tail = PREV_SEC (item);
   5378 
   5379 	  /* Push on head.  */
   5380 	  NEXT_SEC (item) = head;
   5381 	  head = item;
   5382 	}
   5383 
   5384       while (head != NULL)
   5385 	{
   5386 	  asection *curr;
   5387 	  asection *next;
   5388 	  bfd_vma stub_group_start = head->output_offset;
   5389 	  bfd_vma end_of_next;
   5390 
   5391 	  curr = head;
   5392 	  while (NEXT_SEC (curr) != NULL)
   5393 	    {
   5394 	      next = NEXT_SEC (curr);
   5395 	      end_of_next = next->output_offset + next->size;
   5396 	      if (end_of_next - stub_group_start >= stub_group_size)
   5397 		/* End of NEXT is too far from start, so stop.  */
   5398 		break;
   5399 	      /* Add NEXT to the group.  */
   5400 	      curr = next;
   5401 	    }
   5402 
   5403 	  /* OK, the size from the start to the start of CURR is less
   5404 	     than stub_group_size and thus can be handled by one stub
   5405 	     section.  (Or the head section is itself larger than
   5406 	     stub_group_size, in which case we may be toast.)
   5407 	     We should really be keeping track of the total size of
   5408 	     stubs added here, as stubs contribute to the final output
   5409 	     section size.  */
   5410 	  do
   5411 	    {
   5412 	      next = NEXT_SEC (head);
   5413 	      /* Set up this stub group.  */
   5414 	      htab->stub_group[head->id].link_sec = curr;
   5415 	    }
   5416 	  while (head != curr && (head = next) != NULL);
   5417 
   5418 	  /* But wait, there's more!  Input sections up to stub_group_size
   5419 	     bytes after the stub section can be handled by it too.  */
   5420 	  if (!stubs_always_after_branch)
   5421 	    {
   5422 	      stub_group_start = curr->output_offset + curr->size;
   5423 
   5424 	      while (next != NULL)
   5425 		{
   5426 		  end_of_next = next->output_offset + next->size;
   5427 		  if (end_of_next - stub_group_start >= stub_group_size)
   5428 		    /* End of NEXT is too far from stubs, so stop.  */
   5429 		    break;
   5430 		  /* Add NEXT to the stub group.  */
   5431 		  head = next;
   5432 		  next = NEXT_SEC (head);
   5433 		  htab->stub_group[head->id].link_sec = curr;
   5434 		}
   5435 	    }
   5436 	  head = next;
   5437 	}
   5438     }
   5439   while (list++ != htab->input_list + htab->top_index);
   5440 
   5441   free (htab->input_list);
   5442 #undef PREV_SEC
   5443 #undef NEXT_SEC
   5444 }
   5445 
   5446 /* Comparison function for sorting/searching relocations relating to Cortex-A8
   5447    erratum fix.  */
   5448 
   5449 static int
   5450 a8_reloc_compare (const void *a, const void *b)
   5451 {
   5452   const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
   5453   const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
   5454 
   5455   if (ra->from < rb->from)
   5456     return -1;
   5457   else if (ra->from > rb->from)
   5458     return 1;
   5459   else
   5460     return 0;
   5461 }
   5462 
   5463 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
   5464 						    const char *, char **);
   5465 
   5466 /* Helper function to scan code for sequences which might trigger the Cortex-A8
   5467    branch/TLB erratum.  Fill in the table described by A8_FIXES_P,
   5468    NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P.  Returns true if an error occurs, false
   5469    otherwise.  */
   5470 
   5471 static bool
   5472 cortex_a8_erratum_scan (bfd *input_bfd,
   5473 			struct bfd_link_info *info,
   5474 			struct a8_erratum_fix **a8_fixes_p,
   5475 			unsigned int *num_a8_fixes_p,
   5476 			unsigned int *a8_fix_table_size_p,
   5477 			struct a8_erratum_reloc *a8_relocs,
   5478 			unsigned int num_a8_relocs,
   5479 			unsigned prev_num_a8_fixes,
   5480 			bool *stub_changed_p)
   5481 {
   5482   asection *section;
   5483   struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
   5484   struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
   5485   unsigned int num_a8_fixes = *num_a8_fixes_p;
   5486   unsigned int a8_fix_table_size = *a8_fix_table_size_p;
   5487 
   5488   if (htab == NULL)
   5489     return false;
   5490 
   5491   for (section = input_bfd->sections;
   5492        section != NULL;
   5493        section = section->next)
   5494     {
   5495       bfd_byte *contents = NULL;
   5496       struct _arm_elf_section_data *sec_data;
   5497       unsigned int span;
   5498       bfd_vma base_vma;
   5499 
   5500       if (elf_section_type (section) != SHT_PROGBITS
   5501 	  || (elf_section_flags (section) & SHF_EXECINSTR) == 0
   5502 	  || (section->flags & SEC_EXCLUDE) != 0
   5503 	  || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
   5504 	  || (section->output_section == bfd_abs_section_ptr))
   5505 	continue;
   5506 
   5507       base_vma = section->output_section->vma + section->output_offset;
   5508 
   5509       if (elf_section_data (section)->this_hdr.contents != NULL)
   5510 	contents = elf_section_data (section)->this_hdr.contents;
   5511       else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
   5512 	return true;
   5513 
   5514       sec_data = elf32_arm_section_data (section);
   5515 
   5516       for (span = 0; span < sec_data->mapcount; span++)
   5517 	{
   5518 	  unsigned int span_start = sec_data->map[span].vma;
   5519 	  unsigned int span_end = (span == sec_data->mapcount - 1)
   5520 	    ? section->size : sec_data->map[span + 1].vma;
   5521 	  unsigned int i;
   5522 	  char span_type = sec_data->map[span].type;
   5523 	  bool last_was_32bit = false, last_was_branch = false;
   5524 
   5525 	  if (span_type != 't')
   5526 	    continue;
   5527 
   5528 	  /* Span is entirely within a single 4KB region: skip scanning.  */
   5529 	  if (((base_vma + span_start) & ~0xfff)
   5530 	      == ((base_vma + span_end) & ~0xfff))
   5531 	    continue;
   5532 
   5533 	  /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
   5534 
   5535 	       * The opcode is BLX.W, BL.W, B.W, Bcc.W
   5536 	       * The branch target is in the same 4KB region as the
   5537 		 first half of the branch.
   5538 	       * The instruction before the branch is a 32-bit
   5539 		 length non-branch instruction.  */
   5540 	  for (i = span_start; i < span_end;)
   5541 	    {
   5542 	      unsigned int insn = bfd_getl16 (&contents[i]);
   5543 	      bool insn_32bit = false, is_blx = false, is_b = false;
   5544 	      bool is_bl = false, is_bcc = false, is_32bit_branch;
   5545 
   5546 	      if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
   5547 		insn_32bit = true;
   5548 
   5549 	      if (insn_32bit)
   5550 		{
   5551 		  /* Load the rest of the insn (in manual-friendly order).  */
   5552 		  insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
   5553 
   5554 		  /* Encoding T4: B<c>.W.  */
   5555 		  is_b = (insn & 0xf800d000) == 0xf0009000;
   5556 		  /* Encoding T1: BL<c>.W.  */
   5557 		  is_bl = (insn & 0xf800d000) == 0xf000d000;
   5558 		  /* Encoding T2: BLX<c>.W.  */
   5559 		  is_blx = (insn & 0xf800d000) == 0xf000c000;
   5560 		  /* Encoding T3: B<c>.W (not permitted in IT block).  */
   5561 		  is_bcc = (insn & 0xf800d000) == 0xf0008000
   5562 			   && (insn & 0x07f00000) != 0x03800000;
   5563 		}
   5564 
   5565 	      is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
   5566 
   5567 	      if (((base_vma + i) & 0xfff) == 0xffe
   5568 		  && insn_32bit
   5569 		  && is_32bit_branch
   5570 		  && last_was_32bit
   5571 		  && ! last_was_branch)
   5572 		{
   5573 		  bfd_signed_vma offset = 0;
   5574 		  bool force_target_arm = false;
   5575 		  bool force_target_thumb = false;
   5576 		  bfd_vma target;
   5577 		  enum elf32_arm_stub_type stub_type = arm_stub_none;
   5578 		  struct a8_erratum_reloc key, *found;
   5579 		  bool use_plt = false;
   5580 
   5581 		  key.from = base_vma + i;
   5582 		  found = (struct a8_erratum_reloc *)
   5583 		      bsearch (&key, a8_relocs, num_a8_relocs,
   5584 			       sizeof (struct a8_erratum_reloc),
   5585 			       &a8_reloc_compare);
   5586 
   5587 		  if (found)
   5588 		    {
   5589 		      char *error_message = NULL;
   5590 		      struct elf_link_hash_entry *entry;
   5591 
   5592 		      /* We don't care about the error returned from this
   5593 			 function, only if there is glue or not.  */
   5594 		      entry = find_thumb_glue (info, found->sym_name,
   5595 					       &error_message);
   5596 
   5597 		      if (entry)
   5598 			found->non_a8_stub = true;
   5599 
   5600 		      /* Keep a simpler condition, for the sake of clarity.  */
   5601 		      if (htab->root.splt != NULL && found->hash != NULL
   5602 			  && found->hash->root.plt.offset != (bfd_vma) -1)
   5603 			use_plt = true;
   5604 
   5605 		      if (found->r_type == R_ARM_THM_CALL)
   5606 			{
   5607 			  if (found->branch_type == ST_BRANCH_TO_ARM
   5608 			      || use_plt)
   5609 			    force_target_arm = true;
   5610 			  else
   5611 			    force_target_thumb = true;
   5612 			}
   5613 		    }
   5614 
   5615 		  /* Check if we have an offending branch instruction.  */
   5616 
   5617 		  if (found && found->non_a8_stub)
   5618 		    /* We've already made a stub for this instruction, e.g.
   5619 		       it's a long branch or a Thumb->ARM stub.  Assume that
   5620 		       stub will suffice to work around the A8 erratum (see
   5621 		       setting of always_after_branch above).  */
   5622 		    ;
   5623 		  else if (is_bcc)
   5624 		    {
   5625 		      offset = (insn & 0x7ff) << 1;
   5626 		      offset |= (insn & 0x3f0000) >> 4;
   5627 		      offset |= (insn & 0x2000) ? 0x40000 : 0;
   5628 		      offset |= (insn & 0x800) ? 0x80000 : 0;
   5629 		      offset |= (insn & 0x4000000) ? 0x100000 : 0;
   5630 		      if (offset & 0x100000)
   5631 			offset |= ~ ((bfd_signed_vma) 0xfffff);
   5632 		      stub_type = arm_stub_a8_veneer_b_cond;
   5633 		    }
   5634 		  else if (is_b || is_bl || is_blx)
   5635 		    {
   5636 		      int s = (insn & 0x4000000) != 0;
   5637 		      int j1 = (insn & 0x2000) != 0;
   5638 		      int j2 = (insn & 0x800) != 0;
   5639 		      int i1 = !(j1 ^ s);
   5640 		      int i2 = !(j2 ^ s);
   5641 
   5642 		      offset = (insn & 0x7ff) << 1;
   5643 		      offset |= (insn & 0x3ff0000) >> 4;
   5644 		      offset |= i2 << 22;
   5645 		      offset |= i1 << 23;
   5646 		      offset |= s << 24;
   5647 		      if (offset & 0x1000000)
   5648 			offset |= ~ ((bfd_signed_vma) 0xffffff);
   5649 
   5650 		      if (is_blx)
   5651 			offset &= ~ ((bfd_signed_vma) 3);
   5652 
   5653 		      stub_type = is_blx ? arm_stub_a8_veneer_blx :
   5654 			is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
   5655 		    }
   5656 
   5657 		  if (stub_type != arm_stub_none)
   5658 		    {
   5659 		      bfd_vma pc_for_insn = base_vma + i + 4;
   5660 
   5661 		      /* The original instruction is a BL, but the target is
   5662 			 an ARM instruction.  If we were not making a stub,
   5663 			 the BL would have been converted to a BLX.  Use the
   5664 			 BLX stub instead in that case.  */
   5665 		      if (htab->use_blx && force_target_arm
   5666 			  && stub_type == arm_stub_a8_veneer_bl)
   5667 			{
   5668 			  stub_type = arm_stub_a8_veneer_blx;
   5669 			  is_blx = true;
   5670 			  is_bl = false;
   5671 			}
   5672 		      /* Conversely, if the original instruction was
   5673 			 BLX but the target is Thumb mode, use the BL
   5674 			 stub.  */
   5675 		      else if (force_target_thumb
   5676 			       && stub_type == arm_stub_a8_veneer_blx)
   5677 			{
   5678 			  stub_type = arm_stub_a8_veneer_bl;
   5679 			  is_blx = false;
   5680 			  is_bl = true;
   5681 			}
   5682 
   5683 		      if (is_blx)
   5684 			pc_for_insn &= ~ ((bfd_vma) 3);
   5685 
   5686 		      /* If we found a relocation, use the proper destination,
   5687 			 not the offset in the (unrelocated) instruction.
   5688 			 Note this is always done if we switched the stub type
   5689 			 above.  */
   5690 		      if (found)
   5691 			offset =
   5692 			  (bfd_signed_vma) (found->destination - pc_for_insn);
   5693 
   5694 		      /* If the stub will use a Thumb-mode branch to a
   5695 			 PLT target, redirect it to the preceding Thumb
   5696 			 entry point.  */
   5697 		      if (stub_type != arm_stub_a8_veneer_blx && use_plt)
   5698 			offset -= PLT_THUMB_STUB_SIZE;
   5699 
   5700 		      target = pc_for_insn + offset;
   5701 
   5702 		      /* The BLX stub is ARM-mode code.  Adjust the offset to
   5703 			 take the different PC value (+8 instead of +4) into
   5704 			 account.  */
   5705 		      if (stub_type == arm_stub_a8_veneer_blx)
   5706 			offset += 4;
   5707 
   5708 		      if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
   5709 			{
   5710 			  char *stub_name = NULL;
   5711 
   5712 			  if (num_a8_fixes == a8_fix_table_size)
   5713 			    {
   5714 			      a8_fix_table_size *= 2;
   5715 			      a8_fixes = (struct a8_erratum_fix *)
   5716 				  bfd_realloc (a8_fixes,
   5717 					       sizeof (struct a8_erratum_fix)
   5718 					       * a8_fix_table_size);
   5719 			    }
   5720 
   5721 			  if (num_a8_fixes < prev_num_a8_fixes)
   5722 			    {
   5723 			      /* If we're doing a subsequent scan,
   5724 				 check if we've found the same fix as
   5725 				 before, and try and reuse the stub
   5726 				 name.  */
   5727 			      stub_name = a8_fixes[num_a8_fixes].stub_name;
   5728 			      if ((a8_fixes[num_a8_fixes].section != section)
   5729 				  || (a8_fixes[num_a8_fixes].offset != i))
   5730 				{
   5731 				  free (stub_name);
   5732 				  stub_name = NULL;
   5733 				  *stub_changed_p = true;
   5734 				}
   5735 			    }
   5736 
   5737 			  if (!stub_name)
   5738 			    {
   5739 			      stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
   5740 			      if (stub_name != NULL)
   5741 				sprintf (stub_name, "%x:%x", section->id, i);
   5742 			    }
   5743 
   5744 			  a8_fixes[num_a8_fixes].input_bfd = input_bfd;
   5745 			  a8_fixes[num_a8_fixes].section = section;
   5746 			  a8_fixes[num_a8_fixes].offset = i;
   5747 			  a8_fixes[num_a8_fixes].target_offset =
   5748 			    target - base_vma;
   5749 			  a8_fixes[num_a8_fixes].orig_insn = insn;
   5750 			  a8_fixes[num_a8_fixes].stub_name = stub_name;
   5751 			  a8_fixes[num_a8_fixes].stub_type = stub_type;
   5752 			  a8_fixes[num_a8_fixes].branch_type =
   5753 			    is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
   5754 
   5755 			  num_a8_fixes++;
   5756 			}
   5757 		    }
   5758 		}
   5759 
   5760 	      i += insn_32bit ? 4 : 2;
   5761 	      last_was_32bit = insn_32bit;
   5762 	      last_was_branch = is_32bit_branch;
   5763 	    }
   5764 	}
   5765 
   5766       if (elf_section_data (section)->this_hdr.contents == NULL)
   5767 	free (contents);
   5768     }
   5769 
   5770   *a8_fixes_p = a8_fixes;
   5771   *num_a8_fixes_p = num_a8_fixes;
   5772   *a8_fix_table_size_p = a8_fix_table_size;
   5773 
   5774   return false;
   5775 }
   5776 
   5777 /* Create or update a stub entry depending on whether the stub can already be
   5778    found in HTAB.  The stub is identified by:
   5779    - its type STUB_TYPE
   5780    - its source branch (note that several can share the same stub) whose
   5781      section and relocation (if any) are given by SECTION and IRELA
   5782      respectively
   5783    - its target symbol whose input section, hash, name, value and branch type
   5784      are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
   5785      respectively
   5786 
   5787    If found, the value of the stub's target symbol is updated from SYM_VALUE
   5788    and *NEW_STUB is set to FALSE.  Otherwise, *NEW_STUB is set to
   5789    TRUE and the stub entry is initialized.
   5790 
   5791    Returns the stub that was created or updated, or NULL if an error
   5792    occurred.  */
   5793 
   5794 static struct elf32_arm_stub_hash_entry *
   5795 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
   5796 		       enum elf32_arm_stub_type stub_type, asection *section,
   5797 		       Elf_Internal_Rela *irela, asection *sym_sec,
   5798 		       struct elf32_arm_link_hash_entry *hash, char *sym_name,
   5799 		       bfd_vma sym_value, enum arm_st_branch_type branch_type,
   5800 		       bool *new_stub)
   5801 {
   5802   const asection *id_sec;
   5803   char *stub_name;
   5804   struct elf32_arm_stub_hash_entry *stub_entry;
   5805   unsigned int r_type;
   5806   bool sym_claimed = arm_stub_sym_claimed (stub_type);
   5807 
   5808   BFD_ASSERT (stub_type != arm_stub_none);
   5809   *new_stub = false;
   5810 
   5811   if (sym_claimed)
   5812     stub_name = sym_name;
   5813   else
   5814     {
   5815       BFD_ASSERT (irela);
   5816       BFD_ASSERT (section);
   5817       BFD_ASSERT (section->id <= htab->top_id);
   5818 
   5819       /* Support for grouping stub sections.  */
   5820       id_sec = htab->stub_group[section->id].link_sec;
   5821 
   5822       /* Get the name of this stub.  */
   5823       stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
   5824 				       stub_type);
   5825       if (!stub_name)
   5826 	return NULL;
   5827     }
   5828 
   5829   stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, false,
   5830 				     false);
   5831   /* The proper stub has already been created, just update its value.  */
   5832   if (stub_entry != NULL)
   5833     {
   5834       if (!sym_claimed)
   5835 	free (stub_name);
   5836       stub_entry->target_value = sym_value;
   5837       return stub_entry;
   5838     }
   5839 
   5840   stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
   5841   if (stub_entry == NULL)
   5842     {
   5843       if (!sym_claimed)
   5844 	free (stub_name);
   5845       return NULL;
   5846     }
   5847 
   5848   stub_entry->target_value = sym_value;
   5849   stub_entry->target_section = sym_sec;
   5850   stub_entry->stub_type = stub_type;
   5851   stub_entry->h = hash;
   5852   stub_entry->branch_type = branch_type;
   5853 
   5854   if (sym_claimed)
   5855     stub_entry->output_name = sym_name;
   5856   else
   5857     {
   5858       if (sym_name == NULL)
   5859 	sym_name = "unnamed";
   5860       stub_entry->output_name = (char *)
   5861 	bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
   5862 				   + strlen (sym_name));
   5863       if (stub_entry->output_name == NULL)
   5864 	{
   5865 	  free (stub_name);
   5866 	  return NULL;
   5867 	}
   5868 
   5869       /* For historical reasons, use the existing names for ARM-to-Thumb and
   5870 	 Thumb-to-ARM stubs.  */
   5871       r_type = ELF32_R_TYPE (irela->r_info);
   5872       if ((r_type == (unsigned int) R_ARM_THM_CALL
   5873 	   || r_type == (unsigned int) R_ARM_THM_JUMP24
   5874 	   || r_type == (unsigned int) R_ARM_THM_JUMP19)
   5875 	  && branch_type == ST_BRANCH_TO_ARM)
   5876 	sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
   5877       else if ((r_type == (unsigned int) R_ARM_CALL
   5878 		|| r_type == (unsigned int) R_ARM_JUMP24)
   5879 	       && branch_type == ST_BRANCH_TO_THUMB)
   5880 	sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
   5881       else
   5882 	sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
   5883     }
   5884 
   5885   *new_stub = true;
   5886   return stub_entry;
   5887 }
   5888 
   5889 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
   5890    gateway veneer to transition from non secure to secure state and create them
   5891    accordingly.
   5892 
   5893    "ARMv8-M Security Extensions: Requirements on Development Tools" document
   5894    defines the conditions that govern Secure Gateway veneer creation for a
   5895    given symbol <SYM> as follows:
   5896    - it has function type
   5897    - it has non local binding
   5898    - a symbol named __acle_se_<SYM> (called special symbol) exists with the
   5899      same type, binding and value as <SYM> (called normal symbol).
   5900    An entry function can handle secure state transition itself in which case
   5901    its special symbol would have a different value from the normal symbol.
   5902 
   5903    OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
   5904    entry mapping while HTAB gives the name to hash entry mapping.
   5905    *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
   5906    created.
   5907 
   5908    The return value gives whether a stub failed to be allocated.  */
   5909 
   5910 static bool
   5911 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
   5912 	   obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
   5913 	   int *cmse_stub_created)
   5914 {
   5915   elf_backend_data *bed = get_elf_backend_data (input_bfd);
   5916   Elf_Internal_Shdr *symtab_hdr;
   5917   unsigned i, j, sym_count, ext_start;
   5918   Elf_Internal_Sym *cmse_sym, *local_syms;
   5919   struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
   5920   enum arm_st_branch_type branch_type;
   5921   char *sym_name, *lsym_name;
   5922   bfd_vma sym_value;
   5923   asection *section;
   5924   struct elf32_arm_stub_hash_entry *stub_entry;
   5925   bool is_v8m, new_stub, cmse_invalid, ret = true;
   5926 
   5927   symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
   5928   sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
   5929   ext_start = symtab_hdr->sh_info;
   5930   is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
   5931 	    && out_attr[Tag_CPU_arch_profile].i == 'M');
   5932 
   5933   local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
   5934   if (local_syms == NULL)
   5935     local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
   5936 				       symtab_hdr->sh_info, 0, NULL, NULL,
   5937 				       NULL);
   5938   if (symtab_hdr->sh_info && local_syms == NULL)
   5939     return false;
   5940 
   5941   /* Scan symbols.  */
   5942   for (i = 0; i < sym_count; i++)
   5943     {
   5944       cmse_invalid = false;
   5945 
   5946       if (i < ext_start)
   5947 	{
   5948 	  cmse_sym = &local_syms[i];
   5949 	  sym_name = bfd_elf_string_from_elf_section (input_bfd,
   5950 						      symtab_hdr->sh_link,
   5951 						      cmse_sym->st_name);
   5952 	  if (!sym_name || !startswith (sym_name, CMSE_PREFIX))
   5953 	    continue;
   5954 
   5955 	  /* Special symbol with local binding.  */
   5956 	  cmse_invalid = true;
   5957 	}
   5958       else
   5959 	{
   5960 	  cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
   5961 	  if (cmse_hash == NULL)
   5962 	    continue;
   5963 
   5964 	  sym_name = (char *) cmse_hash->root.root.root.string;
   5965 	  if (!startswith (sym_name, CMSE_PREFIX))
   5966 	    continue;
   5967 
   5968 	  /* Special symbol has incorrect binding or type.  */
   5969 	  if ((cmse_hash->root.root.type != bfd_link_hash_defined
   5970 	       && cmse_hash->root.root.type != bfd_link_hash_defweak)
   5971 	      || cmse_hash->root.type != STT_FUNC)
   5972 	    cmse_invalid = true;
   5973 	}
   5974 
   5975       if (!is_v8m)
   5976 	{
   5977 	  _bfd_error_handler (_("%pB: special symbol `%s' only allowed for "
   5978 				"ARMv8-M architecture or later"),
   5979 			      input_bfd, sym_name);
   5980 	  is_v8m = true; /* Avoid multiple warning.  */
   5981 	  ret = false;
   5982 	}
   5983 
   5984       if (cmse_invalid)
   5985 	{
   5986 	  _bfd_error_handler (_("%pB: invalid special symbol `%s'; it must be"
   5987 				" a global or weak function symbol"),
   5988 			      input_bfd, sym_name);
   5989 	  ret = false;
   5990 	  if (i < ext_start)
   5991 	    continue;
   5992 	}
   5993 
   5994       sym_name += strlen (CMSE_PREFIX);
   5995       hash = (struct elf32_arm_link_hash_entry *)
   5996 	elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
   5997 
   5998       /* No associated normal symbol or it is neither global nor weak.  */
   5999       if (!hash
   6000 	  || (hash->root.root.type != bfd_link_hash_defined
   6001 	      && hash->root.root.type != bfd_link_hash_defweak)
   6002 	  || hash->root.type != STT_FUNC)
   6003 	{
   6004 	  /* Initialize here to avoid warning about use of possibly
   6005 	     uninitialized variable.  */
   6006 	  j = 0;
   6007 
   6008 	  if (!hash)
   6009 	    {
   6010 	      /* Searching for a normal symbol with local binding.  */
   6011 	      for (; j < ext_start; j++)
   6012 		{
   6013 		  lsym_name =
   6014 		    bfd_elf_string_from_elf_section (input_bfd,
   6015 						     symtab_hdr->sh_link,
   6016 						     local_syms[j].st_name);
   6017 		  if (!strcmp (sym_name, lsym_name))
   6018 		    break;
   6019 		}
   6020 	    }
   6021 
   6022 	  if (hash || j < ext_start)
   6023 	    {
   6024 	      _bfd_error_handler
   6025 		(_("%pB: invalid standard symbol `%s'; it must be "
   6026 		   "a global or weak function symbol"),
   6027 		 input_bfd, sym_name);
   6028 	    }
   6029 	  else
   6030 	    _bfd_error_handler
   6031 	      (_("%pB: absent standard symbol `%s'"), input_bfd, sym_name);
   6032 	  ret = false;
   6033 	  if (!hash)
   6034 	    continue;
   6035 	}
   6036 
   6037       sym_value = hash->root.root.u.def.value;
   6038       section = hash->root.root.u.def.section;
   6039 
   6040       if (cmse_hash->root.root.u.def.section != section)
   6041 	{
   6042 	  _bfd_error_handler
   6043 	    (_("%pB: `%s' and its special symbol are in different sections"),
   6044 	     input_bfd, sym_name);
   6045 	  ret = false;
   6046 	}
   6047       if (cmse_hash->root.root.u.def.value != sym_value)
   6048 	continue; /* Ignore: could be an entry function starting with SG.  */
   6049 
   6050 	/* If this section is a link-once section that will be discarded, then
   6051 	   don't create any stubs.  */
   6052       if (section->output_section == NULL)
   6053 	{
   6054 	  _bfd_error_handler
   6055 	    (_("%pB: entry function `%s' not output"), input_bfd, sym_name);
   6056 	  continue;
   6057 	}
   6058 
   6059       if (hash->root.size == 0)
   6060 	{
   6061 	  _bfd_error_handler
   6062 	    (_("%pB: entry function `%s' is empty"), input_bfd, sym_name);
   6063 	  ret = false;
   6064 	}
   6065 
   6066       if (!ret)
   6067 	continue;
   6068       branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
   6069       stub_entry
   6070 	= elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
   6071 				 NULL, NULL, section, hash, sym_name,
   6072 				 sym_value, branch_type, &new_stub);
   6073 
   6074       if (stub_entry == NULL)
   6075 	 ret = false;
   6076       else
   6077 	{
   6078 	  BFD_ASSERT (new_stub);
   6079 	  (*cmse_stub_created)++;
   6080 	}
   6081     }
   6082 
   6083   if (!symtab_hdr->contents)
   6084     free (local_syms);
   6085   return ret;
   6086 }
   6087 
   6088 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
   6089    code entry function, ie can be called from non secure code without using a
   6090    veneer.  */
   6091 
   6092 static bool
   6093 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
   6094 {
   6095   bfd_byte contents[4];
   6096   uint32_t first_insn;
   6097   asection *section;
   6098   file_ptr offset;
   6099   bfd *abfd;
   6100 
   6101   /* Defined symbol of function type.  */
   6102   if (hash->root.root.type != bfd_link_hash_defined
   6103       && hash->root.root.type != bfd_link_hash_defweak)
   6104     return false;
   6105   if (hash->root.type != STT_FUNC)
   6106     return false;
   6107 
   6108   /* Read first instruction.  */
   6109   section = hash->root.root.u.def.section;
   6110   abfd = section->owner;
   6111   offset = hash->root.root.u.def.value - section->vma;
   6112   if (!bfd_get_section_contents (abfd, section, contents, offset,
   6113 				 sizeof (contents)))
   6114     return false;
   6115 
   6116   first_insn = bfd_get_32 (abfd, contents);
   6117 
   6118   /* Starts by SG instruction.  */
   6119   return first_insn == 0xe97fe97f;
   6120 }
   6121 
   6122 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
   6123    secure gateway veneers (ie. the veneers was not in the input import library)
   6124    and there is no output import library (GEN_INFO->out_implib_bfd is NULL.  */
   6125 
   6126 static bool
   6127 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
   6128 {
   6129   struct elf32_arm_stub_hash_entry *stub_entry;
   6130   struct bfd_link_info *info;
   6131 
   6132   /* Massage our args to the form they really have.  */
   6133   stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
   6134   info = (struct bfd_link_info *) gen_info;
   6135 
   6136   if (info->out_implib_bfd)
   6137     return true;
   6138 
   6139   if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
   6140     return true;
   6141 
   6142   if (stub_entry->stub_offset == (bfd_vma) -1)
   6143     _bfd_error_handler ("  %s", stub_entry->output_name);
   6144 
   6145   return true;
   6146 }
   6147 
   6148 /* Set offset of each secure gateway veneers so that its address remain
   6149    identical to the one in the input import library referred by
   6150    HTAB->in_implib_bfd.  A warning is issued for veneers that disappeared
   6151    (present in input import library but absent from the executable being
   6152    linked) or if new veneers appeared and there is no output import library
   6153    (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
   6154    number of secure gateway veneers found in the input import library.
   6155 
   6156    The function returns whether an error occurred.  If no error occurred,
   6157    *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
   6158    and this function and HTAB->new_cmse_stub_offset is set to the biggest
   6159    veneer observed set for new veneers to be layed out after.  */
   6160 
   6161 static bool
   6162 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
   6163 				  struct elf32_arm_link_hash_table *htab,
   6164 				  int *cmse_stub_created)
   6165 {
   6166   long symsize;
   6167   char *sym_name;
   6168   flagword flags;
   6169   long i, symcount;
   6170   bfd *in_implib_bfd;
   6171   asection *stub_out_sec;
   6172   bool ret = true;
   6173   Elf_Internal_Sym *intsym;
   6174   const char *out_sec_name;
   6175   bfd_size_type cmse_stub_size;
   6176   asymbol **sympp = NULL, *sym;
   6177   struct elf32_arm_link_hash_entry *hash;
   6178   const insn_sequence *cmse_stub_template;
   6179   struct elf32_arm_stub_hash_entry *stub_entry;
   6180   int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
   6181   bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
   6182   bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
   6183 
   6184   /* No input secure gateway import library.  */
   6185   if (!htab->in_implib_bfd)
   6186     return true;
   6187 
   6188   in_implib_bfd = htab->in_implib_bfd;
   6189   if (!htab->cmse_implib)
   6190     {
   6191       _bfd_error_handler (_("%pB: --in-implib only supported for Secure "
   6192 			    "Gateway import libraries"), in_implib_bfd);
   6193       return false;
   6194     }
   6195 
   6196   /* Get symbol table size.  */
   6197   symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
   6198   if (symsize < 0)
   6199     return false;
   6200 
   6201   /* Read in the input secure gateway import library's symbol table.  */
   6202   sympp = (asymbol **) bfd_malloc (symsize);
   6203   if (sympp == NULL)
   6204     return false;
   6205 
   6206   symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
   6207   if (symcount < 0)
   6208     {
   6209       ret = false;
   6210       goto free_sym_buf;
   6211     }
   6212 
   6213   htab->new_cmse_stub_offset = 0;
   6214   cmse_stub_size =
   6215     find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
   6216 				 &cmse_stub_template,
   6217 				 &cmse_stub_template_size);
   6218   out_sec_name =
   6219     arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
   6220   stub_out_sec =
   6221     bfd_get_section_by_name (htab->obfd, out_sec_name);
   6222   if (stub_out_sec != NULL)
   6223     cmse_stub_sec_vma = stub_out_sec->vma;
   6224 
   6225   /* Set addresses of veneers mentionned in input secure gateway import
   6226      library's symbol table.  */
   6227   for (i = 0; i < symcount; i++)
   6228     {
   6229       sym = sympp[i];
   6230       flags = sym->flags;
   6231       sym_name = (char *) bfd_asymbol_name (sym);
   6232       intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
   6233 
   6234       if (sym->section != bfd_abs_section_ptr
   6235 	  || !(flags & (BSF_GLOBAL | BSF_WEAK))
   6236 	  || (flags & BSF_FUNCTION) != BSF_FUNCTION
   6237 	  || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
   6238 	      != ST_BRANCH_TO_THUMB))
   6239 	{
   6240 	  _bfd_error_handler (_("%pB: invalid import library entry: `%s'; "
   6241 				"symbol should be absolute, global and "
   6242 				"refer to Thumb functions"),
   6243 			      in_implib_bfd, sym_name);
   6244 	  ret = false;
   6245 	  continue;
   6246 	}
   6247 
   6248       veneer_value = bfd_asymbol_value (sym);
   6249       stub_offset = veneer_value - cmse_stub_sec_vma;
   6250       stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
   6251 					 false, false);
   6252       hash = (struct elf32_arm_link_hash_entry *)
   6253 	elf_link_hash_lookup (&(htab)->root, sym_name, false, false, true);
   6254 
   6255       /* Stub entry should have been created by cmse_scan or the symbol be of
   6256 	 a secure function callable from non secure code.  */
   6257       if (!stub_entry && !hash)
   6258 	{
   6259 	  bool new_stub;
   6260 
   6261 	  _bfd_error_handler
   6262 	    (_("entry function `%s' disappeared from secure code"), sym_name);
   6263 	  hash = (struct elf32_arm_link_hash_entry *)
   6264 	    elf_link_hash_lookup (&(htab)->root, sym_name, true, true, true);
   6265 	  stub_entry
   6266 	    = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
   6267 				     NULL, NULL, bfd_abs_section_ptr, hash,
   6268 				     sym_name, veneer_value,
   6269 				     ST_BRANCH_TO_THUMB, &new_stub);
   6270 	  if (stub_entry == NULL)
   6271 	    ret = false;
   6272 	  else
   6273 	  {
   6274 	    BFD_ASSERT (new_stub);
   6275 	    new_cmse_stubs_created++;
   6276 	    (*cmse_stub_created)++;
   6277 	  }
   6278 	  stub_entry->stub_template_size = stub_entry->stub_size = 0;
   6279 	  stub_entry->stub_offset = stub_offset;
   6280 	}
   6281       /* Symbol found is not callable from non secure code.  */
   6282       else if (!stub_entry)
   6283 	{
   6284 	  if (!cmse_entry_fct_p (hash))
   6285 	    {
   6286 	      _bfd_error_handler (_("`%s' refers to a non entry function"),
   6287 				  sym_name);
   6288 	      ret = false;
   6289 	    }
   6290 	  continue;
   6291 	}
   6292       else
   6293 	{
   6294 	  /* Only stubs for SG veneers should have been created.  */
   6295 	  BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
   6296 
   6297 	  /* Check visibility hasn't changed.  */
   6298 	  if (!!(flags & BSF_GLOBAL)
   6299 	      != (hash->root.root.type == bfd_link_hash_defined))
   6300 	    _bfd_error_handler
   6301 	      (_("%pB: visibility of symbol `%s' has changed"), in_implib_bfd,
   6302 	       sym_name);
   6303 
   6304 	  stub_entry->stub_offset = stub_offset;
   6305 	}
   6306 
   6307       /* Size should match that of a SG veneer.  */
   6308       if (intsym->st_size != cmse_stub_size)
   6309 	{
   6310 	  _bfd_error_handler (_("%pB: incorrect size for symbol `%s'"),
   6311 			      in_implib_bfd, sym_name);
   6312 	  ret = false;
   6313 	}
   6314 
   6315       /* Previous veneer address is before current SG veneer section.  */
   6316       if (veneer_value < cmse_stub_sec_vma)
   6317 	{
   6318 	  /* Avoid offset underflow.  */
   6319 	  if (stub_entry)
   6320 	    stub_entry->stub_offset = 0;
   6321 	  stub_offset = 0;
   6322 	  ret = false;
   6323 	}
   6324 
   6325       /* Complain if stub offset not a multiple of stub size.  */
   6326       if (stub_offset % cmse_stub_size)
   6327 	{
   6328 	  _bfd_error_handler
   6329 	    (_("offset of veneer for entry function `%s' not a multiple of "
   6330 	       "its size"), sym_name);
   6331 	  ret = false;
   6332 	}
   6333 
   6334       if (!ret)
   6335 	continue;
   6336 
   6337       new_cmse_stubs_created--;
   6338       if (veneer_value < cmse_stub_array_start)
   6339 	cmse_stub_array_start = veneer_value;
   6340       next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
   6341       if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
   6342 	htab->new_cmse_stub_offset = next_cmse_stub_offset;
   6343     }
   6344 
   6345   if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
   6346     {
   6347       BFD_ASSERT (new_cmse_stubs_created > 0);
   6348       _bfd_error_handler
   6349 	(_("new entry function(s) introduced but no output import library "
   6350 	   "specified:"));
   6351       bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
   6352     }
   6353 
   6354   if (cmse_stub_array_start != cmse_stub_sec_vma)
   6355     {
   6356       _bfd_error_handler
   6357 	(_("start address of `%s' is different from previous link"),
   6358 	 out_sec_name);
   6359       ret = false;
   6360     }
   6361 
   6362  free_sym_buf:
   6363   free (sympp);
   6364   return ret;
   6365 }
   6366 
   6367 /* Determine and set the size of the stub section for a final link.
   6368 
   6369    The basic idea here is to examine all the relocations looking for
   6370    PC-relative calls to a target that is unreachable with a "bl"
   6371    instruction.  */
   6372 
   6373 bool
   6374 elf32_arm_size_stubs (bfd *output_bfd,
   6375 		      bfd *stub_bfd,
   6376 		      struct bfd_link_info *info,
   6377 		      bfd_signed_vma group_size,
   6378 		      asection * (*add_stub_section) (const char *, asection *,
   6379 						      asection *,
   6380 						      unsigned int),
   6381 		      void (*layout_sections_again) (void))
   6382 {
   6383   bool ret = true;
   6384   obj_attribute *out_attr;
   6385   int cmse_stub_created = 0;
   6386   bfd_size_type stub_group_size;
   6387   bool m_profile, stubs_always_after_branch, first_veneer_scan = true;
   6388   struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
   6389   struct a8_erratum_fix *a8_fixes = NULL;
   6390   unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
   6391   struct a8_erratum_reloc *a8_relocs = NULL;
   6392   unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
   6393 
   6394   if (htab == NULL)
   6395     return false;
   6396 
   6397   if (htab->fix_cortex_a8)
   6398     {
   6399       a8_fixes = (struct a8_erratum_fix *)
   6400 	  bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
   6401       a8_relocs = (struct a8_erratum_reloc *)
   6402 	  bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
   6403     }
   6404 
   6405   /* Propagate mach to stub bfd, because it may not have been
   6406      finalized when we created stub_bfd.  */
   6407   bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
   6408 		     bfd_get_mach (output_bfd));
   6409 
   6410   /* Stash our params away.  */
   6411   htab->stub_bfd = stub_bfd;
   6412   htab->add_stub_section = add_stub_section;
   6413   htab->layout_sections_again = layout_sections_again;
   6414   stubs_always_after_branch = group_size < 0;
   6415 
   6416   out_attr = elf_known_obj_attributes_proc (output_bfd);
   6417   m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
   6418 
   6419   /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
   6420      as the first half of a 32-bit branch straddling two 4K pages.  This is a
   6421      crude way of enforcing that.  */
   6422   if (htab->fix_cortex_a8)
   6423     stubs_always_after_branch = 1;
   6424 
   6425   if (group_size < 0)
   6426     stub_group_size = -group_size;
   6427   else
   6428     stub_group_size = group_size;
   6429 
   6430   if (stub_group_size == 1)
   6431     {
   6432       /* Default values.  */
   6433       /* Thumb branch range is +-4MB has to be used as the default
   6434 	 maximum size (a given section can contain both ARM and Thumb
   6435 	 code, so the worst case has to be taken into account).
   6436 
   6437 	 This value is 24K less than that, which allows for 2025
   6438 	 12-byte stubs.  If we exceed that, then we will fail to link.
   6439 	 The user will have to relink with an explicit group size
   6440 	 option.  */
   6441       stub_group_size = 4170000;
   6442     }
   6443 
   6444   group_sections (htab, stub_group_size, stubs_always_after_branch);
   6445 
   6446   /* If we're applying the cortex A8 fix, we need to determine the
   6447      program header size now, because we cannot change it later --
   6448      that could alter section placements.  Notice the A8 erratum fix
   6449      ends up requiring the section addresses to remain unchanged
   6450      modulo the page size.  That's something we cannot represent
   6451      inside BFD, and we don't want to force the section alignment to
   6452      be the page size.  */
   6453   if (htab->fix_cortex_a8)
   6454     (*htab->layout_sections_again) ();
   6455 
   6456   while (1)
   6457     {
   6458       bfd *input_bfd;
   6459       asection *stub_sec;
   6460       enum elf32_arm_stub_type stub_type;
   6461       bool stub_changed = false;
   6462       unsigned prev_num_a8_fixes = num_a8_fixes;
   6463 
   6464       num_a8_fixes = 0;
   6465       for (input_bfd = info->input_bfds;
   6466 	   input_bfd != NULL;
   6467 	   input_bfd = input_bfd->link.next)
   6468 	{
   6469 	  Elf_Internal_Shdr *symtab_hdr;
   6470 	  asection *section;
   6471 	  Elf_Internal_Sym *local_syms = NULL;
   6472 
   6473 	  if (!is_arm_elf (input_bfd))
   6474 	    continue;
   6475 	  if ((input_bfd->flags & DYNAMIC) != 0
   6476 	      && (elf_sym_hashes (input_bfd) == NULL
   6477 		  || (elf_dyn_lib_class (input_bfd) & DYN_AS_NEEDED) != 0))
   6478 	    continue;
   6479 
   6480 	  num_a8_relocs = 0;
   6481 
   6482 	  /* We'll need the symbol table in a second.  */
   6483 	  symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
   6484 	  if (symtab_hdr->sh_info == 0)
   6485 	    continue;
   6486 
   6487 	  /* Limit scan of symbols to object file whose profile is
   6488 	     Microcontroller to not hinder performance in the general case.  */
   6489 	  if (m_profile && first_veneer_scan)
   6490 	    {
   6491 	      struct elf_link_hash_entry **sym_hashes;
   6492 
   6493 	      sym_hashes = elf_sym_hashes (input_bfd);
   6494 	      if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
   6495 			      &cmse_stub_created))
   6496 		goto error_ret_free_local;
   6497 
   6498 	      if (cmse_stub_created != 0)
   6499 		stub_changed = true;
   6500 	    }
   6501 
   6502 	  /* Walk over each section attached to the input bfd.  */
   6503 	  for (section = input_bfd->sections;
   6504 	       section != NULL;
   6505 	       section = section->next)
   6506 	    {
   6507 	      Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
   6508 
   6509 	      /* If there aren't any relocs, then there's nothing more
   6510 		 to do.  */
   6511 	      if ((section->flags & SEC_RELOC) == 0
   6512 		  || section->reloc_count == 0
   6513 		  || (section->flags & SEC_CODE) == 0)
   6514 		continue;
   6515 
   6516 	      /* If this section is a link-once section that will be
   6517 		 discarded, then don't create any stubs.  */
   6518 	      if (section->output_section == NULL
   6519 		  || section->output_section->owner != output_bfd)
   6520 		continue;
   6521 
   6522 	      /* Get the relocs.  */
   6523 	      internal_relocs
   6524 		= _bfd_elf_link_read_relocs (input_bfd, section, NULL,
   6525 					     NULL, info->keep_memory);
   6526 	      if (internal_relocs == NULL)
   6527 		goto error_ret_free_local;
   6528 
   6529 	      /* Now examine each relocation.  */
   6530 	      irela = internal_relocs;
   6531 	      irelaend = irela + section->reloc_count;
   6532 	      for (; irela < irelaend; irela++)
   6533 		{
   6534 		  unsigned int r_type, r_indx;
   6535 		  asection *sym_sec;
   6536 		  bfd_vma sym_value;
   6537 		  bfd_vma destination;
   6538 		  struct elf32_arm_link_hash_entry *hash;
   6539 		  const char *sym_name;
   6540 		  unsigned char st_type;
   6541 		  enum arm_st_branch_type branch_type;
   6542 		  bool created_stub = false;
   6543 
   6544 		  r_type = ELF32_R_TYPE (irela->r_info);
   6545 		  r_indx = ELF32_R_SYM (irela->r_info);
   6546 
   6547 		  if (r_type >= (unsigned int) R_ARM_max)
   6548 		    {
   6549 		      bfd_set_error (bfd_error_bad_value);
   6550 		    error_ret_free_internal:
   6551 		      if (elf_section_data (section)->relocs == NULL)
   6552 			free (internal_relocs);
   6553 		    /* Fall through.  */
   6554 		    error_ret_free_local:
   6555 		      if (symtab_hdr->contents != (unsigned char *) local_syms)
   6556 			free (local_syms);
   6557 		      return false;
   6558 		    }
   6559 
   6560 		  hash = NULL;
   6561 		  if (r_indx >= symtab_hdr->sh_info)
   6562 		    hash = elf32_arm_hash_entry
   6563 		      (elf_sym_hashes (input_bfd)
   6564 		       [r_indx - symtab_hdr->sh_info]);
   6565 
   6566 		  /* Only look for stubs on branch instructions, or
   6567 		     non-relaxed TLSCALL  */
   6568 		  if ((r_type != (unsigned int) R_ARM_CALL)
   6569 		      && (r_type != (unsigned int) R_ARM_THM_CALL)
   6570 		      && (r_type != (unsigned int) R_ARM_JUMP24)
   6571 		      && (r_type != (unsigned int) R_ARM_THM_JUMP19)
   6572 		      && (r_type != (unsigned int) R_ARM_THM_XPC22)
   6573 		      && (r_type != (unsigned int) R_ARM_THM_JUMP24)
   6574 		      && (r_type != (unsigned int) R_ARM_PLT32)
   6575 		      && !((r_type == (unsigned int) R_ARM_TLS_CALL
   6576 			    || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
   6577 			   && r_type == (elf32_arm_tls_transition
   6578 					 (info, r_type,
   6579 					  (struct elf_link_hash_entry *) hash))
   6580 			   && ((hash ? hash->tls_type
   6581 				: (elf32_arm_local_got_tls_type
   6582 				   (input_bfd)[r_indx]))
   6583 			       & GOT_TLS_GDESC) != 0))
   6584 		    continue;
   6585 
   6586 		  /* Now determine the call target, its name, value,
   6587 		     section.  */
   6588 		  sym_sec = NULL;
   6589 		  sym_value = 0;
   6590 		  destination = 0;
   6591 		  sym_name = NULL;
   6592 
   6593 		  if (r_type == (unsigned int) R_ARM_TLS_CALL
   6594 		      || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
   6595 		    {
   6596 		      /* A non-relaxed TLS call.  The target is the
   6597 			 plt-resident trampoline and nothing to do
   6598 			 with the symbol.  */
   6599 		      BFD_ASSERT (htab->tls_trampoline > 0);
   6600 		      sym_sec = htab->root.splt;
   6601 		      sym_value = htab->tls_trampoline;
   6602 		      hash = 0;
   6603 		      st_type = STT_FUNC;
   6604 		      branch_type = ST_BRANCH_TO_ARM;
   6605 		    }
   6606 		  else if (!hash)
   6607 		    {
   6608 		      /* It's a local symbol.  */
   6609 		      Elf_Internal_Sym *sym;
   6610 
   6611 		      if (local_syms == NULL)
   6612 			{
   6613 			  local_syms
   6614 			    = (Elf_Internal_Sym *) symtab_hdr->contents;
   6615 			  if (local_syms == NULL)
   6616 			    local_syms
   6617 			      = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
   6618 						      symtab_hdr->sh_info, 0,
   6619 						      NULL, NULL, NULL);
   6620 			  if (local_syms == NULL)
   6621 			    goto error_ret_free_internal;
   6622 			}
   6623 
   6624 		      sym = local_syms + r_indx;
   6625 		      if (sym->st_shndx == SHN_UNDEF)
   6626 			sym_sec = bfd_und_section_ptr;
   6627 		      else if (sym->st_shndx == SHN_ABS)
   6628 			sym_sec = bfd_abs_section_ptr;
   6629 		      else if (sym->st_shndx == SHN_COMMON)
   6630 			sym_sec = bfd_com_section_ptr;
   6631 		      else
   6632 			sym_sec =
   6633 			  bfd_section_from_elf_index (input_bfd, sym->st_shndx);
   6634 
   6635 		      if (!sym_sec)
   6636 			/* This is an undefined symbol.  It can never
   6637 			   be resolved.  */
   6638 			continue;
   6639 
   6640 		      if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
   6641 			sym_value = sym->st_value;
   6642 		      destination = (sym_value + irela->r_addend
   6643 				     + sym_sec->output_offset
   6644 				     + sym_sec->output_section->vma);
   6645 		      st_type = ELF_ST_TYPE (sym->st_info);
   6646 		      branch_type =
   6647 			ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
   6648 		      sym_name
   6649 			= bfd_elf_string_from_elf_section (input_bfd,
   6650 							   symtab_hdr->sh_link,
   6651 							   sym->st_name);
   6652 		    }
   6653 		  else
   6654 		    {
   6655 		      /* It's an external symbol.  */
   6656 		      while (hash->root.root.type == bfd_link_hash_indirect
   6657 			     || hash->root.root.type == bfd_link_hash_warning)
   6658 			hash = ((struct elf32_arm_link_hash_entry *)
   6659 				hash->root.root.u.i.link);
   6660 
   6661 		      if (hash->root.root.type == bfd_link_hash_defined
   6662 			  || hash->root.root.type == bfd_link_hash_defweak)
   6663 			{
   6664 			  sym_sec = hash->root.root.u.def.section;
   6665 			  sym_value = hash->root.root.u.def.value;
   6666 
   6667 			  struct elf32_arm_link_hash_table *globals =
   6668 						  elf32_arm_hash_table (info);
   6669 
   6670 			  /* For a destination in a shared library,
   6671 			     use the PLT stub as target address to
   6672 			     decide whether a branch stub is
   6673 			     needed.  */
   6674 			  if (globals != NULL
   6675 			      && globals->root.splt != NULL
   6676 			      && hash != NULL
   6677 			      && hash->root.plt.offset != (bfd_vma) -1)
   6678 			    {
   6679 			      sym_sec = globals->root.splt;
   6680 			      sym_value = hash->root.plt.offset;
   6681 			      if (sym_sec->output_section != NULL)
   6682 				destination = (sym_value
   6683 					       + sym_sec->output_offset
   6684 					       + sym_sec->output_section->vma);
   6685 			    }
   6686 			  else if (sym_sec->output_section != NULL)
   6687 			    destination = (sym_value + irela->r_addend
   6688 					   + sym_sec->output_offset
   6689 					   + sym_sec->output_section->vma);
   6690 			}
   6691 		      else if ((hash->root.root.type == bfd_link_hash_undefined)
   6692 			       || (hash->root.root.type == bfd_link_hash_undefweak))
   6693 			{
   6694 			  /* For a shared library, use the PLT stub as
   6695 			     target address to decide whether a long
   6696 			     branch stub is needed.
   6697 			     For absolute code, they cannot be handled.  */
   6698 			  struct elf32_arm_link_hash_table *globals =
   6699 			    elf32_arm_hash_table (info);
   6700 
   6701 			  if (globals != NULL
   6702 			      && globals->root.splt != NULL
   6703 			      && hash != NULL
   6704 			      && hash->root.plt.offset != (bfd_vma) -1)
   6705 			    {
   6706 			      sym_sec = globals->root.splt;
   6707 			      sym_value = hash->root.plt.offset;
   6708 			      if (sym_sec->output_section != NULL)
   6709 				destination = (sym_value
   6710 					       + sym_sec->output_offset
   6711 					       + sym_sec->output_section->vma);
   6712 			    }
   6713 			  else
   6714 			    continue;
   6715 			}
   6716 		      else
   6717 			{
   6718 			  bfd_set_error (bfd_error_bad_value);
   6719 			  goto error_ret_free_internal;
   6720 			}
   6721 		      st_type = hash->root.type;
   6722 		      branch_type =
   6723 			ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
   6724 		      sym_name = hash->root.root.root.string;
   6725 		    }
   6726 
   6727 		  do
   6728 		    {
   6729 		      bool new_stub;
   6730 		      struct elf32_arm_stub_hash_entry *stub_entry;
   6731 
   6732 		      /* Determine what (if any) linker stub is needed.  */
   6733 		      stub_type = arm_type_of_stub (info, section, irela,
   6734 						    st_type, &branch_type,
   6735 						    hash, destination, sym_sec,
   6736 						    input_bfd, sym_name);
   6737 		      if (stub_type == arm_stub_none)
   6738 			break;
   6739 
   6740 		      /* We've either created a stub for this reloc already,
   6741 			 or we are about to.  */
   6742 		      stub_entry =
   6743 			elf32_arm_create_stub (htab, stub_type, section, irela,
   6744 					       sym_sec, hash,
   6745 					       (char *) sym_name, sym_value,
   6746 					       branch_type, &new_stub);
   6747 
   6748 		      created_stub = stub_entry != NULL;
   6749 		      if (!created_stub)
   6750 			goto error_ret_free_internal;
   6751 		      else if (!new_stub)
   6752 			break;
   6753 		      else
   6754 			stub_changed = true;
   6755 		    }
   6756 		  while (0);
   6757 
   6758 		  /* Look for relocations which might trigger Cortex-A8
   6759 		     erratum.  */
   6760 		  if (htab->fix_cortex_a8
   6761 		      && (r_type == (unsigned int) R_ARM_THM_JUMP24
   6762 			  || r_type == (unsigned int) R_ARM_THM_JUMP19
   6763 			  || r_type == (unsigned int) R_ARM_THM_CALL
   6764 			  || r_type == (unsigned int) R_ARM_THM_XPC22))
   6765 		    {
   6766 		      bfd_vma from = section->output_section->vma
   6767 				     + section->output_offset
   6768 				     + irela->r_offset;
   6769 
   6770 		      if ((from & 0xfff) == 0xffe)
   6771 			{
   6772 			  /* Found a candidate.  Note we haven't checked the
   6773 			     destination is within 4K here: if we do so (and
   6774 			     don't create an entry in a8_relocs) we can't tell
   6775 			     that a branch should have been relocated when
   6776 			     scanning later.  */
   6777 			  if (num_a8_relocs == a8_reloc_table_size)
   6778 			    {
   6779 			      a8_reloc_table_size *= 2;
   6780 			      a8_relocs = (struct a8_erratum_reloc *)
   6781 				  bfd_realloc (a8_relocs,
   6782 					       sizeof (struct a8_erratum_reloc)
   6783 					       * a8_reloc_table_size);
   6784 			    }
   6785 
   6786 			  a8_relocs[num_a8_relocs].from = from;
   6787 			  a8_relocs[num_a8_relocs].destination = destination;
   6788 			  a8_relocs[num_a8_relocs].r_type = r_type;
   6789 			  a8_relocs[num_a8_relocs].branch_type = branch_type;
   6790 			  a8_relocs[num_a8_relocs].sym_name = sym_name;
   6791 			  a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
   6792 			  a8_relocs[num_a8_relocs].hash = hash;
   6793 
   6794 			  num_a8_relocs++;
   6795 			}
   6796 		    }
   6797 		}
   6798 
   6799 	      /* We're done with the internal relocs, free them.  */
   6800 	      if (elf_section_data (section)->relocs == NULL)
   6801 		free (internal_relocs);
   6802 	    }
   6803 
   6804 	  if (htab->fix_cortex_a8)
   6805 	    {
   6806 	      /* Sort relocs which might apply to Cortex-A8 erratum.  */
   6807 	      qsort (a8_relocs, num_a8_relocs,
   6808 		     sizeof (struct a8_erratum_reloc),
   6809 		     &a8_reloc_compare);
   6810 
   6811 	      /* Scan for branches which might trigger Cortex-A8 erratum.  */
   6812 	      if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
   6813 					  &num_a8_fixes, &a8_fix_table_size,
   6814 					  a8_relocs, num_a8_relocs,
   6815 					  prev_num_a8_fixes, &stub_changed)
   6816 		  != 0)
   6817 		goto error_ret_free_local;
   6818 	    }
   6819 
   6820 	  if (local_syms != NULL
   6821 	      && symtab_hdr->contents != (unsigned char *) local_syms)
   6822 	    {
   6823 	      if (!info->keep_memory)
   6824 		free (local_syms);
   6825 	      else
   6826 		symtab_hdr->contents = (unsigned char *) local_syms;
   6827 	    }
   6828 	}
   6829 
   6830       if (first_veneer_scan
   6831 	  && !set_cmse_veneer_addr_from_implib (info, htab,
   6832 						&cmse_stub_created))
   6833 	ret = false;
   6834 
   6835       if (prev_num_a8_fixes != num_a8_fixes)
   6836 	stub_changed = true;
   6837 
   6838       if (!stub_changed)
   6839 	break;
   6840 
   6841       /* OK, we've added some stubs.  Find out the new size of the
   6842 	 stub sections.  */
   6843       for (stub_sec = htab->stub_bfd->sections;
   6844 	   stub_sec != NULL;
   6845 	   stub_sec = stub_sec->next)
   6846 	{
   6847 	  /* Ignore non-stub sections.  */
   6848 	  if (!strstr (stub_sec->name, STUB_SUFFIX))
   6849 	    continue;
   6850 
   6851 	  stub_sec->size = 0;
   6852 	}
   6853 
   6854       /* Add new SG veneers after those already in the input import
   6855 	 library.  */
   6856       for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
   6857 	   stub_type++)
   6858 	{
   6859 	  bfd_vma *start_offset_p;
   6860 	  asection **stub_sec_p;
   6861 
   6862 	  start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
   6863 	  stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
   6864 	  if (start_offset_p == NULL)
   6865 	    continue;
   6866 
   6867 	  BFD_ASSERT (stub_sec_p != NULL);
   6868 	  if (*stub_sec_p != NULL)
   6869 	    (*stub_sec_p)->size = *start_offset_p;
   6870 	}
   6871 
   6872       /* Compute stub section size, considering padding.  */
   6873       bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
   6874       for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
   6875 	   stub_type++)
   6876 	{
   6877 	  int size, padding;
   6878 	  asection **stub_sec_p;
   6879 
   6880 	  padding = arm_dedicated_stub_section_padding (stub_type);
   6881 	  stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
   6882 	  /* Skip if no stub input section or no stub section padding
   6883 	     required.  */
   6884 	  if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
   6885 	    continue;
   6886 	  /* Stub section padding required but no dedicated section.  */
   6887 	  BFD_ASSERT (stub_sec_p);
   6888 
   6889 	  size = (*stub_sec_p)->size;
   6890 	  size = (size + padding - 1) & ~(padding - 1);
   6891 	  (*stub_sec_p)->size = size;
   6892 	}
   6893 
   6894       /* Add Cortex-A8 erratum veneers to stub section sizes too.  */
   6895       if (htab->fix_cortex_a8)
   6896 	for (i = 0; i < num_a8_fixes; i++)
   6897 	  {
   6898 	    stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
   6899 			 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
   6900 
   6901 	    if (stub_sec == NULL)
   6902 	      return false;
   6903 
   6904 	    stub_sec->size
   6905 	      += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
   6906 					      NULL);
   6907 	  }
   6908 
   6909 
   6910       /* Ask the linker to do its stuff.  */
   6911       (*htab->layout_sections_again) ();
   6912       first_veneer_scan = false;
   6913     }
   6914 
   6915   /* Add stubs for Cortex-A8 erratum fixes now.  */
   6916   if (htab->fix_cortex_a8)
   6917     {
   6918       for (i = 0; i < num_a8_fixes; i++)
   6919 	{
   6920 	  struct elf32_arm_stub_hash_entry *stub_entry;
   6921 	  char *stub_name = a8_fixes[i].stub_name;
   6922 	  asection *section = a8_fixes[i].section;
   6923 	  unsigned int section_id = a8_fixes[i].section->id;
   6924 	  asection *link_sec = htab->stub_group[section_id].link_sec;
   6925 	  asection *stub_sec = htab->stub_group[section_id].stub_sec;
   6926 	  const insn_sequence *template_sequence;
   6927 	  int template_size, size = 0;
   6928 
   6929 	  stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
   6930 					     true, false);
   6931 	  if (stub_entry == NULL)
   6932 	    {
   6933 	      _bfd_error_handler (_("%pB: cannot create stub entry %s"),
   6934 				  section->owner, stub_name);
   6935 	      return false;
   6936 	    }
   6937 
   6938 	  stub_entry->stub_sec = stub_sec;
   6939 	  stub_entry->stub_offset = (bfd_vma) -1;
   6940 	  stub_entry->id_sec = link_sec;
   6941 	  stub_entry->stub_type = a8_fixes[i].stub_type;
   6942 	  stub_entry->source_value = a8_fixes[i].offset;
   6943 	  stub_entry->target_section = a8_fixes[i].section;
   6944 	  stub_entry->target_value = a8_fixes[i].target_offset;
   6945 	  stub_entry->orig_insn = a8_fixes[i].orig_insn;
   6946 	  stub_entry->branch_type = a8_fixes[i].branch_type;
   6947 
   6948 	  size = find_stub_size_and_template (a8_fixes[i].stub_type,
   6949 					      &template_sequence,
   6950 					      &template_size);
   6951 
   6952 	  stub_entry->stub_size = size;
   6953 	  stub_entry->stub_template = template_sequence;
   6954 	  stub_entry->stub_template_size = template_size;
   6955 	}
   6956 
   6957       /* Stash the Cortex-A8 erratum fix array for use later in
   6958 	 elf32_arm_write_section().  */
   6959       htab->a8_erratum_fixes = a8_fixes;
   6960       htab->num_a8_erratum_fixes = num_a8_fixes;
   6961     }
   6962   else
   6963     {
   6964       htab->a8_erratum_fixes = NULL;
   6965       htab->num_a8_erratum_fixes = 0;
   6966     }
   6967   return ret;
   6968 }
   6969 
   6970 /* Build all the stubs associated with the current output file.  The
   6971    stubs are kept in a hash table attached to the main linker hash
   6972    table.  We also set up the .plt entries for statically linked PIC
   6973    functions here.  This function is called via arm_elf_finish in the
   6974    linker.  */
   6975 
   6976 bool
   6977 elf32_arm_build_stubs (struct bfd_link_info *info)
   6978 {
   6979   asection *stub_sec;
   6980   struct bfd_hash_table *table;
   6981   enum elf32_arm_stub_type stub_type;
   6982   struct elf32_arm_link_hash_table *htab;
   6983 
   6984   htab = elf32_arm_hash_table (info);
   6985   if (htab == NULL)
   6986     return false;
   6987 
   6988   for (stub_sec = htab->stub_bfd->sections;
   6989        stub_sec != NULL;
   6990        stub_sec = stub_sec->next)
   6991     {
   6992       bfd_size_type size;
   6993 
   6994       /* Ignore non-stub sections.  */
   6995       if (!strstr (stub_sec->name, STUB_SUFFIX))
   6996 	continue;
   6997 
   6998       /* Allocate memory to hold the linker stubs.  Zeroing the stub sections
   6999 	 must at least be done for stub section requiring padding and for SG
   7000 	 veneers to ensure that a non secure code branching to a removed SG
   7001 	 veneer causes an error.  */
   7002       size = stub_sec->size;
   7003       stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
   7004       if (stub_sec->contents == NULL && size != 0)
   7005 	return false;
   7006       stub_sec->alloced = 1;
   7007 
   7008       stub_sec->size = 0;
   7009     }
   7010 
   7011   /* Add new SG veneers after those already in the input import library.  */
   7012   for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
   7013     {
   7014       bfd_vma *start_offset_p;
   7015       asection **stub_sec_p;
   7016 
   7017       start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
   7018       stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
   7019       if (start_offset_p == NULL)
   7020 	continue;
   7021 
   7022       BFD_ASSERT (stub_sec_p != NULL);
   7023       if (*stub_sec_p != NULL)
   7024 	(*stub_sec_p)->size = *start_offset_p;
   7025     }
   7026 
   7027   /* Build the stubs as directed by the stub hash table.  */
   7028   table = &htab->stub_hash_table;
   7029   bfd_hash_traverse (table, arm_build_one_stub, info);
   7030   if (htab->fix_cortex_a8)
   7031     {
   7032       /* Place the cortex a8 stubs last.  */
   7033       htab->fix_cortex_a8 = -1;
   7034       bfd_hash_traverse (table, arm_build_one_stub, info);
   7035     }
   7036 
   7037   return true;
   7038 }
   7039 
   7040 /* Locate the Thumb encoded calling stub for NAME.  */
   7041 
   7042 static struct elf_link_hash_entry *
   7043 find_thumb_glue (struct bfd_link_info *link_info,
   7044 		 const char *name,
   7045 		 char **error_message)
   7046 {
   7047   char *tmp_name;
   7048   struct elf_link_hash_entry *hash;
   7049   struct elf32_arm_link_hash_table *hash_table;
   7050 
   7051   /* We need a pointer to the armelf specific hash table.  */
   7052   hash_table = elf32_arm_hash_table (link_info);
   7053   if (hash_table == NULL)
   7054     return NULL;
   7055 
   7056   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
   7057 				  + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
   7058 
   7059   BFD_ASSERT (tmp_name);
   7060 
   7061   sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
   7062 
   7063   hash = elf_link_hash_lookup
   7064     (&(hash_table)->root, tmp_name, false, false, true);
   7065 
   7066   if (hash == NULL)
   7067     {
   7068       *error_message = bfd_asprintf (_("unable to find %s glue '%s' for '%s'"),
   7069 				     "Thumb", tmp_name, name);
   7070       if (*error_message == NULL)
   7071 	*error_message = (char *) bfd_errmsg (bfd_error_system_call);
   7072     }
   7073 
   7074   free (tmp_name);
   7075 
   7076   return hash;
   7077 }
   7078 
   7079 /* Locate the ARM encoded calling stub for NAME.  */
   7080 
   7081 static struct elf_link_hash_entry *
   7082 find_arm_glue (struct bfd_link_info *link_info,
   7083 	       const char *name,
   7084 	       char **error_message)
   7085 {
   7086   char *tmp_name;
   7087   struct elf_link_hash_entry *myh;
   7088   struct elf32_arm_link_hash_table *hash_table;
   7089 
   7090   /* We need a pointer to the elfarm specific hash table.  */
   7091   hash_table = elf32_arm_hash_table (link_info);
   7092   if (hash_table == NULL)
   7093     return NULL;
   7094 
   7095   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
   7096 				  + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
   7097   BFD_ASSERT (tmp_name);
   7098 
   7099   sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
   7100 
   7101   myh = elf_link_hash_lookup
   7102     (&(hash_table)->root, tmp_name, false, false, true);
   7103 
   7104   if (myh == NULL)
   7105     {
   7106       *error_message = bfd_asprintf (_("unable to find %s glue '%s' for '%s'"),
   7107 				     "ARM", tmp_name, name);
   7108       if (*error_message == NULL)
   7109 	*error_message = (char *) bfd_errmsg (bfd_error_system_call);
   7110     }
   7111   free (tmp_name);
   7112 
   7113   return myh;
   7114 }
   7115 
   7116 /* ARM->Thumb glue (static images):
   7117 
   7118    .arm
   7119    __func_from_arm:
   7120    ldr r12, __func_addr
   7121    bx  r12
   7122    __func_addr:
   7123    .word func    @ behave as if you saw a ARM_32 reloc.
   7124 
   7125    (v5t static images)
   7126    .arm
   7127    __func_from_arm:
   7128    ldr pc, __func_addr
   7129    __func_addr:
   7130    .word func    @ behave as if you saw a ARM_32 reloc.
   7131 
   7132    (relocatable images)
   7133    .arm
   7134    __func_from_arm:
   7135    ldr r12, __func_offset
   7136    add r12, r12, pc
   7137    bx  r12
   7138    __func_offset:
   7139    .word func - .   */
   7140 
   7141 #define ARM2THUMB_STATIC_GLUE_SIZE 12
   7142 static const insn32 a2t1_ldr_insn = 0xe59fc000;
   7143 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
   7144 static const insn32 a2t3_func_addr_insn = 0x00000001;
   7145 
   7146 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
   7147 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
   7148 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
   7149 
   7150 #define ARM2THUMB_PIC_GLUE_SIZE 16
   7151 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
   7152 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
   7153 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
   7154 
   7155 /* Thumb->ARM:				Thumb->(non-interworking aware) ARM
   7156 
   7157      .thumb				.thumb
   7158      .align 2				.align 2
   7159  __func_from_thumb:		    __func_from_thumb:
   7160      bx pc				push {r6, lr}
   7161      nop				ldr  r6, __func_addr
   7162      .arm				mov  lr, pc
   7163      b func				bx   r6
   7164 					.arm
   7165 				    ;; back_to_thumb
   7166 					ldmia r13! {r6, lr}
   7167 					bx    lr
   7168 				    __func_addr:
   7169 					.word	     func  */
   7170 
   7171 #define THUMB2ARM_GLUE_SIZE 8
   7172 static const insn16 t2a1_bx_pc_insn = 0x4778;
   7173 static const insn16 t2a2_noop_insn = 0x46c0;
   7174 static const insn32 t2a3_b_insn = 0xea000000;
   7175 
   7176 #define VFP11_ERRATUM_VENEER_SIZE 8
   7177 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
   7178 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
   7179 
   7180 #define ARM_BX_VENEER_SIZE 12
   7181 static const insn32 armbx1_tst_insn = 0xe3100001;
   7182 static const insn32 armbx2_moveq_insn = 0x01a0f000;
   7183 static const insn32 armbx3_bx_insn = 0xe12fff10;
   7184 
   7185 #ifndef ELFARM_NABI_C_INCLUDED
   7186 static void
   7187 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
   7188 {
   7189   asection * s;
   7190   bfd_byte * contents;
   7191 
   7192   if (size == 0)
   7193     {
   7194       /* Do not include empty glue sections in the output.  */
   7195       if (abfd != NULL)
   7196 	{
   7197 	  s = bfd_get_linker_section (abfd, name);
   7198 	  if (s != NULL)
   7199 	    s->flags |= SEC_EXCLUDE;
   7200 	}
   7201       return;
   7202     }
   7203 
   7204   BFD_ASSERT (abfd != NULL);
   7205 
   7206   s = bfd_get_linker_section (abfd, name);
   7207   BFD_ASSERT (s != NULL);
   7208 
   7209   contents = (bfd_byte *) bfd_zalloc (abfd, size);
   7210 
   7211   BFD_ASSERT (s->size == size);
   7212   s->contents = contents;
   7213   s->alloced = 1;
   7214 }
   7215 
   7216 bool
   7217 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
   7218 {
   7219   struct elf32_arm_link_hash_table * globals;
   7220 
   7221   globals = elf32_arm_hash_table (info);
   7222   BFD_ASSERT (globals != NULL);
   7223 
   7224   arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
   7225 				   globals->arm_glue_size,
   7226 				   ARM2THUMB_GLUE_SECTION_NAME);
   7227 
   7228   arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
   7229 				   globals->thumb_glue_size,
   7230 				   THUMB2ARM_GLUE_SECTION_NAME);
   7231 
   7232   arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
   7233 				   globals->vfp11_erratum_glue_size,
   7234 				   VFP11_ERRATUM_VENEER_SECTION_NAME);
   7235 
   7236   arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
   7237 				   globals->stm32l4xx_erratum_glue_size,
   7238 				   STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
   7239 
   7240   arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
   7241 				   globals->bx_glue_size,
   7242 				   ARM_BX_GLUE_SECTION_NAME);
   7243 
   7244   return true;
   7245 }
   7246 
   7247 /* Allocate space and symbols for calling a Thumb function from Arm mode.
   7248    returns the symbol identifying the stub.  */
   7249 
   7250 static struct elf_link_hash_entry *
   7251 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
   7252 			  struct elf_link_hash_entry * h)
   7253 {
   7254   const char * name = h->root.root.string;
   7255   asection * s;
   7256   char * tmp_name;
   7257   struct elf_link_hash_entry * myh;
   7258   struct bfd_link_hash_entry * bh;
   7259   struct elf32_arm_link_hash_table * globals;
   7260   bfd_vma val;
   7261   bfd_size_type size;
   7262 
   7263   globals = elf32_arm_hash_table (link_info);
   7264   BFD_ASSERT (globals != NULL);
   7265   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
   7266 
   7267   s = bfd_get_linker_section
   7268     (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
   7269 
   7270   BFD_ASSERT (s != NULL);
   7271 
   7272   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
   7273 				  + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
   7274   BFD_ASSERT (tmp_name);
   7275 
   7276   sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
   7277 
   7278   myh = elf_link_hash_lookup
   7279     (&(globals)->root, tmp_name, false, false, true);
   7280 
   7281   if (myh != NULL)
   7282     {
   7283       /* We've already seen this guy.  */
   7284       free (tmp_name);
   7285       return myh;
   7286     }
   7287 
   7288   /* The only trick here is using hash_table->arm_glue_size as the value.
   7289      Even though the section isn't allocated yet, this is where we will be
   7290      putting it.  The +1 on the value marks that the stub has not been
   7291      output yet - not that it is a Thumb function.  */
   7292   bh = NULL;
   7293   val = globals->arm_glue_size + 1;
   7294   _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
   7295 				    tmp_name, BSF_GLOBAL, s, val,
   7296 				    NULL, true, false, &bh);
   7297 
   7298   myh = (struct elf_link_hash_entry *) bh;
   7299   myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   7300   myh->forced_local = 1;
   7301 
   7302   free (tmp_name);
   7303 
   7304   if (bfd_link_pic (link_info)
   7305       || globals->pic_veneer)
   7306     size = ARM2THUMB_PIC_GLUE_SIZE;
   7307   else if (globals->use_blx)
   7308     size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
   7309   else
   7310     size = ARM2THUMB_STATIC_GLUE_SIZE;
   7311 
   7312   s->size += size;
   7313   globals->arm_glue_size += size;
   7314 
   7315   return myh;
   7316 }
   7317 
   7318 /* Allocate space for ARMv4 BX veneers.  */
   7319 
   7320 static void
   7321 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
   7322 {
   7323   asection * s;
   7324   struct elf32_arm_link_hash_table *globals;
   7325   char *tmp_name;
   7326   struct elf_link_hash_entry *myh;
   7327   struct bfd_link_hash_entry *bh;
   7328   bfd_vma val;
   7329 
   7330   /* BX PC does not need a veneer.  */
   7331   if (reg == 15)
   7332     return;
   7333 
   7334   globals = elf32_arm_hash_table (link_info);
   7335   BFD_ASSERT (globals != NULL);
   7336   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
   7337 
   7338   /* Check if this veneer has already been allocated.  */
   7339   if (globals->bx_glue_offset[reg])
   7340     return;
   7341 
   7342   s = bfd_get_linker_section
   7343     (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
   7344 
   7345   BFD_ASSERT (s != NULL);
   7346 
   7347   /* Add symbol for veneer.  */
   7348   tmp_name = (char *)
   7349       bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
   7350   BFD_ASSERT (tmp_name);
   7351 
   7352   sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
   7353 
   7354   myh = elf_link_hash_lookup
   7355     (&(globals)->root, tmp_name, false, false, false);
   7356 
   7357   BFD_ASSERT (myh == NULL);
   7358 
   7359   bh = NULL;
   7360   val = globals->bx_glue_size;
   7361   _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
   7362 				    tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
   7363 				    NULL, true, false, &bh);
   7364 
   7365   myh = (struct elf_link_hash_entry *) bh;
   7366   myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   7367   myh->forced_local = 1;
   7368 
   7369   s->size += ARM_BX_VENEER_SIZE;
   7370   globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
   7371   globals->bx_glue_size += ARM_BX_VENEER_SIZE;
   7372 }
   7373 
   7374 
   7375 /* Add an entry to the code/data map for section SEC.  */
   7376 
   7377 static void
   7378 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
   7379 {
   7380   struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
   7381   unsigned int newidx;
   7382 
   7383   if (sec_data->map == NULL)
   7384     {
   7385       sec_data->map = (elf32_arm_section_map *)
   7386 	  bfd_malloc (sizeof (elf32_arm_section_map));
   7387       sec_data->mapcount = 0;
   7388       sec_data->mapsize = 1;
   7389     }
   7390 
   7391   newidx = sec_data->mapcount++;
   7392 
   7393   if (sec_data->mapcount > sec_data->mapsize)
   7394     {
   7395       sec_data->mapsize *= 2;
   7396       sec_data->map = (elf32_arm_section_map *)
   7397 	  bfd_realloc_or_free (sec_data->map, sec_data->mapsize
   7398 			       * sizeof (elf32_arm_section_map));
   7399     }
   7400 
   7401   if (sec_data->map)
   7402     {
   7403       sec_data->map[newidx].vma = vma;
   7404       sec_data->map[newidx].type = type;
   7405     }
   7406 }
   7407 
   7408 
   7409 /* Record information about a VFP11 denorm-erratum veneer.  Only ARM-mode
   7410    veneers are handled for now.  */
   7411 
   7412 static bfd_vma
   7413 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
   7414 			     elf32_vfp11_erratum_list *branch,
   7415 			     bfd *branch_bfd,
   7416 			     asection *branch_sec,
   7417 			     unsigned int offset)
   7418 {
   7419   asection *s;
   7420   struct elf32_arm_link_hash_table *hash_table;
   7421   char *tmp_name;
   7422   struct elf_link_hash_entry *myh;
   7423   struct bfd_link_hash_entry *bh;
   7424   bfd_vma val;
   7425   struct _arm_elf_section_data *sec_data;
   7426   elf32_vfp11_erratum_list *newerr;
   7427 
   7428   hash_table = elf32_arm_hash_table (link_info);
   7429   BFD_ASSERT (hash_table != NULL);
   7430   BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
   7431 
   7432   s = bfd_get_linker_section
   7433     (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
   7434 
   7435   sec_data = elf32_arm_section_data (s);
   7436 
   7437   BFD_ASSERT (s != NULL);
   7438 
   7439   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
   7440 				  (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
   7441   BFD_ASSERT (tmp_name);
   7442 
   7443   sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
   7444 	   hash_table->num_vfp11_fixes);
   7445 
   7446   myh = elf_link_hash_lookup
   7447     (&(hash_table)->root, tmp_name, false, false, false);
   7448 
   7449   BFD_ASSERT (myh == NULL);
   7450 
   7451   bh = NULL;
   7452   val = hash_table->vfp11_erratum_glue_size;
   7453   _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
   7454 				    tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
   7455 				    NULL, true, false, &bh);
   7456 
   7457   myh = (struct elf_link_hash_entry *) bh;
   7458   myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   7459   myh->forced_local = 1;
   7460 
   7461   /* Link veneer back to calling location.  */
   7462   sec_data->erratumcount += 1;
   7463   newerr = (elf32_vfp11_erratum_list *)
   7464       bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
   7465 
   7466   newerr->type = VFP11_ERRATUM_ARM_VENEER;
   7467   newerr->vma = -1;
   7468   newerr->u.v.branch = branch;
   7469   newerr->u.v.id = hash_table->num_vfp11_fixes;
   7470   branch->u.b.veneer = newerr;
   7471 
   7472   newerr->next = sec_data->erratumlist;
   7473   sec_data->erratumlist = newerr;
   7474 
   7475   /* A symbol for the return from the veneer.  */
   7476   sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
   7477 	   hash_table->num_vfp11_fixes);
   7478 
   7479   myh = elf_link_hash_lookup
   7480     (&(hash_table)->root, tmp_name, false, false, false);
   7481 
   7482   if (myh != NULL)
   7483     abort ();
   7484 
   7485   bh = NULL;
   7486   val = offset + 4;
   7487   _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
   7488 				    branch_sec, val, NULL, true, false, &bh);
   7489 
   7490   myh = (struct elf_link_hash_entry *) bh;
   7491   myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   7492   myh->forced_local = 1;
   7493 
   7494   free (tmp_name);
   7495 
   7496   /* Generate a mapping symbol for the veneer section, and explicitly add an
   7497      entry for that symbol to the code/data map for the section.  */
   7498   if (hash_table->vfp11_erratum_glue_size == 0)
   7499     {
   7500       bh = NULL;
   7501       /* FIXME: Creates an ARM symbol.  Thumb mode will need attention if it
   7502 	 ever requires this erratum fix.  */
   7503       _bfd_generic_link_add_one_symbol (link_info,
   7504 					hash_table->bfd_of_glue_owner, "$a",
   7505 					BSF_LOCAL, s, 0, NULL,
   7506 					true, false, &bh);
   7507 
   7508       myh = (struct elf_link_hash_entry *) bh;
   7509       myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
   7510       myh->forced_local = 1;
   7511 
   7512       /* The elf32_arm_init_maps function only cares about symbols from input
   7513 	 BFDs.  We must make a note of this generated mapping symbol
   7514 	 ourselves so that code byteswapping works properly in
   7515 	 elf32_arm_write_section.  */
   7516       elf32_arm_section_map_add (s, 'a', 0);
   7517     }
   7518 
   7519   s->size += VFP11_ERRATUM_VENEER_SIZE;
   7520   hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
   7521   hash_table->num_vfp11_fixes++;
   7522 
   7523   /* The offset of the veneer.  */
   7524   return val;
   7525 }
   7526 
   7527 /* Record information about a STM32L4XX STM erratum veneer.  Only THUMB-mode
   7528    veneers need to be handled because used only in Cortex-M.  */
   7529 
   7530 static bfd_vma
   7531 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
   7532 				 elf32_stm32l4xx_erratum_list *branch,
   7533 				 bfd *branch_bfd,
   7534 				 asection *branch_sec,
   7535 				 unsigned int offset,
   7536 				 bfd_size_type veneer_size)
   7537 {
   7538   asection *s;
   7539   struct elf32_arm_link_hash_table *hash_table;
   7540   char *tmp_name;
   7541   struct elf_link_hash_entry *myh;
   7542   struct bfd_link_hash_entry *bh;
   7543   bfd_vma val;
   7544   struct _arm_elf_section_data *sec_data;
   7545   elf32_stm32l4xx_erratum_list *newerr;
   7546 
   7547   hash_table = elf32_arm_hash_table (link_info);
   7548   BFD_ASSERT (hash_table != NULL);
   7549   BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
   7550 
   7551   s = bfd_get_linker_section
   7552     (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
   7553 
   7554   BFD_ASSERT (s != NULL);
   7555 
   7556   sec_data = elf32_arm_section_data (s);
   7557 
   7558   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
   7559 				  (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
   7560   BFD_ASSERT (tmp_name);
   7561 
   7562   sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
   7563 	   hash_table->num_stm32l4xx_fixes);
   7564 
   7565   myh = elf_link_hash_lookup
   7566     (&(hash_table)->root, tmp_name, false, false, false);
   7567 
   7568   BFD_ASSERT (myh == NULL);
   7569 
   7570   bh = NULL;
   7571   val = hash_table->stm32l4xx_erratum_glue_size;
   7572   _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
   7573 				    tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
   7574 				    NULL, true, false, &bh);
   7575 
   7576   myh = (struct elf_link_hash_entry *) bh;
   7577   myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   7578   myh->forced_local = 1;
   7579 
   7580   /* Link veneer back to calling location.  */
   7581   sec_data->stm32l4xx_erratumcount += 1;
   7582   newerr = (elf32_stm32l4xx_erratum_list *)
   7583       bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
   7584 
   7585   newerr->type = STM32L4XX_ERRATUM_VENEER;
   7586   newerr->vma = -1;
   7587   newerr->u.v.branch = branch;
   7588   newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
   7589   branch->u.b.veneer = newerr;
   7590 
   7591   newerr->next = sec_data->stm32l4xx_erratumlist;
   7592   sec_data->stm32l4xx_erratumlist = newerr;
   7593 
   7594   /* A symbol for the return from the veneer.  */
   7595   sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
   7596 	   hash_table->num_stm32l4xx_fixes);
   7597 
   7598   myh = elf_link_hash_lookup
   7599     (&(hash_table)->root, tmp_name, false, false, false);
   7600 
   7601   if (myh != NULL)
   7602     abort ();
   7603 
   7604   bh = NULL;
   7605   val = offset + 4;
   7606   _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
   7607 				    branch_sec, val, NULL, true, false, &bh);
   7608 
   7609   myh = (struct elf_link_hash_entry *) bh;
   7610   myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   7611   myh->forced_local = 1;
   7612 
   7613   free (tmp_name);
   7614 
   7615   /* Generate a mapping symbol for the veneer section, and explicitly add an
   7616      entry for that symbol to the code/data map for the section.  */
   7617   if (hash_table->stm32l4xx_erratum_glue_size == 0)
   7618     {
   7619       bh = NULL;
   7620       /* Creates a THUMB symbol since there is no other choice.  */
   7621       _bfd_generic_link_add_one_symbol (link_info,
   7622 					hash_table->bfd_of_glue_owner, "$t",
   7623 					BSF_LOCAL, s, 0, NULL,
   7624 					true, false, &bh);
   7625 
   7626       myh = (struct elf_link_hash_entry *) bh;
   7627       myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
   7628       myh->forced_local = 1;
   7629 
   7630       /* The elf32_arm_init_maps function only cares about symbols from input
   7631 	 BFDs.  We must make a note of this generated mapping symbol
   7632 	 ourselves so that code byteswapping works properly in
   7633 	 elf32_arm_write_section.  */
   7634       elf32_arm_section_map_add (s, 't', 0);
   7635     }
   7636 
   7637   s->size += veneer_size;
   7638   hash_table->stm32l4xx_erratum_glue_size += veneer_size;
   7639   hash_table->num_stm32l4xx_fixes++;
   7640 
   7641   /* The offset of the veneer.  */
   7642   return val;
   7643 }
   7644 
   7645 #define ARM_GLUE_SECTION_FLAGS \
   7646   (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
   7647    | SEC_READONLY | SEC_LINKER_CREATED)
   7648 
   7649 /* Create a fake section for use by the ARM backend of the linker.  */
   7650 
   7651 static bool
   7652 arm_make_glue_section (bfd * abfd, const char * name)
   7653 {
   7654   asection * sec;
   7655 
   7656   sec = bfd_get_linker_section (abfd, name);
   7657   if (sec != NULL)
   7658     /* Already made.  */
   7659     return true;
   7660 
   7661   sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
   7662 
   7663   if (sec == NULL
   7664       || !bfd_set_section_alignment (sec, 2))
   7665     return false;
   7666 
   7667   /* Set the gc mark to prevent the section from being removed by garbage
   7668      collection, despite the fact that no relocs refer to this section.  */
   7669   sec->gc_mark = 1;
   7670 
   7671   return true;
   7672 }
   7673 
   7674 /* Set size of .plt entries.  This function is called from the
   7675    linker scripts in ld/emultempl/{armelf}.em.  */
   7676 
   7677 void
   7678 bfd_elf32_arm_use_long_plt (void)
   7679 {
   7680   elf32_arm_use_long_plt_entry = true;
   7681 }
   7682 
   7683 /* Add the glue sections to ABFD.  This function is called from the
   7684    linker scripts in ld/emultempl/{armelf}.em.  */
   7685 
   7686 bool
   7687 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
   7688 					struct bfd_link_info *info)
   7689 {
   7690   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
   7691   bool dostm32l4xx = globals
   7692     && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
   7693   bool addglue;
   7694 
   7695   /* If we are only performing a partial
   7696      link do not bother adding the glue.  */
   7697   if (bfd_link_relocatable (info))
   7698     return true;
   7699 
   7700   addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
   7701     && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
   7702     && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
   7703     && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
   7704 
   7705   if (!dostm32l4xx)
   7706     return addglue;
   7707 
   7708   return addglue
   7709     && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
   7710 }
   7711 
   7712 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP.  This
   7713    ensures they are not marked for deletion by
   7714    strip_excluded_output_sections () when veneers are going to be created
   7715    later.  Not doing so would trigger assert on empty section size in
   7716    lang_size_sections_1 ().  */
   7717 
   7718 void
   7719 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
   7720 {
   7721   enum elf32_arm_stub_type stub_type;
   7722 
   7723   /* If we are only performing a partial
   7724      link do not bother adding the glue.  */
   7725   if (bfd_link_relocatable (info))
   7726     return;
   7727 
   7728   for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
   7729     {
   7730       asection *out_sec;
   7731       const char *out_sec_name;
   7732 
   7733       if (!arm_dedicated_stub_output_section_required (stub_type))
   7734 	continue;
   7735 
   7736      out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
   7737      out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
   7738      if (out_sec != NULL)
   7739 	out_sec->flags |= SEC_KEEP;
   7740     }
   7741 }
   7742 
   7743 /* Select a BFD to be used to hold the sections used by the glue code.
   7744    This function is called from the linker scripts in ld/emultempl/
   7745    {armelf/pe}.em.  */
   7746 
   7747 bool
   7748 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
   7749 {
   7750   struct elf32_arm_link_hash_table *globals;
   7751 
   7752   /* If we are only performing a partial link
   7753      do not bother getting a bfd to hold the glue.  */
   7754   if (bfd_link_relocatable (info))
   7755     return true;
   7756 
   7757   /* Make sure we don't attach the glue sections to a dynamic object.  */
   7758   BFD_ASSERT (!(abfd->flags & DYNAMIC));
   7759 
   7760   globals = elf32_arm_hash_table (info);
   7761   BFD_ASSERT (globals != NULL);
   7762 
   7763   if (globals->bfd_of_glue_owner != NULL)
   7764     return true;
   7765 
   7766   /* Save the bfd for later use.  */
   7767   globals->bfd_of_glue_owner = abfd;
   7768 
   7769   return true;
   7770 }
   7771 
   7772 static void
   7773 check_use_blx (struct elf32_arm_link_hash_table *globals)
   7774 {
   7775   int cpu_arch;
   7776 
   7777   cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
   7778 				       Tag_CPU_arch);
   7779 
   7780   if (globals->fix_arm1176)
   7781     {
   7782       if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
   7783 	globals->use_blx = 1;
   7784     }
   7785   else
   7786     {
   7787       if (cpu_arch > TAG_CPU_ARCH_V4T)
   7788 	globals->use_blx = 1;
   7789     }
   7790 }
   7791 
   7792 bool
   7793 bfd_elf32_arm_process_before_allocation (bfd *abfd,
   7794 					 struct bfd_link_info *link_info)
   7795 {
   7796   Elf_Internal_Shdr *symtab_hdr;
   7797   Elf_Internal_Rela *internal_relocs = NULL;
   7798   Elf_Internal_Rela *irel, *irelend;
   7799   bfd_byte *contents = NULL;
   7800 
   7801   asection *sec;
   7802   struct elf32_arm_link_hash_table *globals;
   7803 
   7804   /* If we are only performing a partial link do not bother
   7805      to construct any glue.  */
   7806   if (bfd_link_relocatable (link_info))
   7807     return true;
   7808 
   7809   /* Here we have a bfd that is to be included on the link.  We have a
   7810      hook to do reloc rummaging, before section sizes are nailed down.  */
   7811   globals = elf32_arm_hash_table (link_info);
   7812   BFD_ASSERT (globals != NULL);
   7813 
   7814   check_use_blx (globals);
   7815 
   7816   if (globals->byteswap_code && !bfd_big_endian (abfd))
   7817     {
   7818       _bfd_error_handler (_("%pB: BE8 images only valid in big-endian mode"),
   7819 			  abfd);
   7820       return false;
   7821     }
   7822 
   7823   /* PR 5398: If we have not decided to include any loadable sections in
   7824      the output then we will not have a glue owner bfd.  This is OK, it
   7825      just means that there is nothing else for us to do here.  */
   7826   if (globals->bfd_of_glue_owner == NULL)
   7827     return true;
   7828 
   7829   /* Rummage around all the relocs and map the glue vectors.  */
   7830   sec = abfd->sections;
   7831 
   7832   if (sec == NULL)
   7833     return true;
   7834 
   7835   for (; sec != NULL; sec = sec->next)
   7836     {
   7837       if (sec->reloc_count == 0)
   7838 	continue;
   7839 
   7840       if ((sec->flags & SEC_EXCLUDE) != 0
   7841 	  || (sec->flags & SEC_HAS_CONTENTS) == 0)
   7842 	continue;
   7843 
   7844       symtab_hdr = & elf_symtab_hdr (abfd);
   7845 
   7846       /* Load the relocs.  */
   7847       internal_relocs
   7848 	= _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, false);
   7849 
   7850       if (internal_relocs == NULL)
   7851 	goto error_return;
   7852 
   7853       irelend = internal_relocs + sec->reloc_count;
   7854       for (irel = internal_relocs; irel < irelend; irel++)
   7855 	{
   7856 	  long r_type;
   7857 	  unsigned long r_index;
   7858 
   7859 	  struct elf_link_hash_entry *h;
   7860 
   7861 	  r_type = ELF32_R_TYPE (irel->r_info);
   7862 	  r_index = ELF32_R_SYM (irel->r_info);
   7863 
   7864 	  /* These are the only relocation types we care about.  */
   7865 	  if (   r_type != R_ARM_PC24
   7866 	      && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
   7867 	    continue;
   7868 
   7869 	  /* Get the section contents if we haven't done so already.  */
   7870 	  if (contents == NULL)
   7871 	    {
   7872 	      /* Get cached copy if it exists.  */
   7873 	      if (elf_section_data (sec)->this_hdr.contents != NULL)
   7874 		contents = elf_section_data (sec)->this_hdr.contents;
   7875 	      else
   7876 		{
   7877 		  /* Go get them off disk.  */
   7878 		  if (! bfd_malloc_and_get_section (abfd, sec, &contents))
   7879 		    goto error_return;
   7880 		}
   7881 	    }
   7882 
   7883 	  if (r_type == R_ARM_V4BX)
   7884 	    {
   7885 	      int reg;
   7886 
   7887 	      reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
   7888 	      record_arm_bx_glue (link_info, reg);
   7889 	      continue;
   7890 	    }
   7891 
   7892 	  /* If the relocation is not against a symbol it cannot concern us.  */
   7893 	  h = NULL;
   7894 
   7895 	  /* We don't care about local symbols.  */
   7896 	  if (r_index < symtab_hdr->sh_info)
   7897 	    continue;
   7898 
   7899 	  /* This is an external symbol.  */
   7900 	  r_index -= symtab_hdr->sh_info;
   7901 	  h = (struct elf_link_hash_entry *)
   7902 	    elf_sym_hashes (abfd)[r_index];
   7903 
   7904 	  /* If the relocation is against a static symbol it must be within
   7905 	     the current section and so cannot be a cross ARM/Thumb relocation.  */
   7906 	  if (h == NULL)
   7907 	    continue;
   7908 
   7909 	  /* If the call will go through a PLT entry then we do not need
   7910 	     glue.  */
   7911 	  if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
   7912 	    continue;
   7913 
   7914 	  switch (r_type)
   7915 	    {
   7916 	    case R_ARM_PC24:
   7917 	      /* This one is a call from arm code.  We need to look up
   7918 		 the target of the call.  If it is a thumb target, we
   7919 		 insert glue.  */
   7920 	      if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
   7921 		  == ST_BRANCH_TO_THUMB)
   7922 		record_arm_to_thumb_glue (link_info, h);
   7923 	      break;
   7924 
   7925 	    default:
   7926 	      abort ();
   7927 	    }
   7928 	}
   7929 
   7930       if (elf_section_data (sec)->this_hdr.contents != contents)
   7931 	free (contents);
   7932       contents = NULL;
   7933 
   7934       if (elf_section_data (sec)->relocs != internal_relocs)
   7935 	free (internal_relocs);
   7936       internal_relocs = NULL;
   7937     }
   7938 
   7939   return true;
   7940 
   7941  error_return:
   7942   if (elf_section_data (sec)->this_hdr.contents != contents)
   7943     free (contents);
   7944   if (elf_section_data (sec)->relocs != internal_relocs)
   7945     free (internal_relocs);
   7946 
   7947   return false;
   7948 }
   7949 #endif
   7950 
   7951 
   7952 /* Initialise maps of ARM/Thumb/data for input BFDs.  */
   7953 
   7954 void
   7955 bfd_elf32_arm_init_maps (bfd *abfd)
   7956 {
   7957   Elf_Internal_Sym *isymbuf;
   7958   Elf_Internal_Shdr *hdr;
   7959   unsigned int i, localsyms;
   7960 
   7961   /* PR 7093: Make sure that we are dealing with an arm elf binary.  */
   7962   if (! is_arm_elf (abfd))
   7963     return;
   7964 
   7965   if ((abfd->flags & DYNAMIC) != 0)
   7966     return;
   7967 
   7968   hdr = & elf_symtab_hdr (abfd);
   7969   localsyms = hdr->sh_info;
   7970 
   7971   /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
   7972      should contain the number of local symbols, which should come before any
   7973      global symbols.  Mapping symbols are always local.  */
   7974   isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
   7975 				  NULL);
   7976 
   7977   /* No internal symbols read?  Skip this BFD.  */
   7978   if (isymbuf == NULL)
   7979     return;
   7980 
   7981   for (i = 0; i < localsyms; i++)
   7982     {
   7983       Elf_Internal_Sym *isym = &isymbuf[i];
   7984       asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
   7985       const char *name;
   7986 
   7987       if (sec != NULL
   7988 	  && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
   7989 	{
   7990 	  name = bfd_elf_string_from_elf_section (abfd,
   7991 	    hdr->sh_link, isym->st_name);
   7992 
   7993 	  if (bfd_is_arm_special_symbol_name (name,
   7994 					      BFD_ARM_SPECIAL_SYM_TYPE_MAP))
   7995 	    elf32_arm_section_map_add (sec, name[1], isym->st_value);
   7996 	}
   7997     }
   7998 }
   7999 
   8000 
   8001 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
   8002    say what they wanted.  */
   8003 
   8004 void
   8005 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
   8006 {
   8007   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
   8008   obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
   8009 
   8010   if (globals == NULL)
   8011     return;
   8012 
   8013   if (globals->fix_cortex_a8 == -1)
   8014     {
   8015       /* Turn on Cortex-A8 erratum workaround for ARMv7-A.  */
   8016       if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
   8017 	  && (out_attr[Tag_CPU_arch_profile].i == 'A'
   8018 	      || out_attr[Tag_CPU_arch_profile].i == 0))
   8019 	globals->fix_cortex_a8 = 1;
   8020       else
   8021 	globals->fix_cortex_a8 = 0;
   8022     }
   8023 }
   8024 
   8025 
   8026 void
   8027 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
   8028 {
   8029   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
   8030   obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
   8031 
   8032   if (globals == NULL)
   8033     return;
   8034   /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix.  */
   8035   if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
   8036     {
   8037       switch (globals->vfp11_fix)
   8038 	{
   8039 	case BFD_ARM_VFP11_FIX_DEFAULT:
   8040 	case BFD_ARM_VFP11_FIX_NONE:
   8041 	  globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
   8042 	  break;
   8043 
   8044 	default:
   8045 	  /* Give a warning, but do as the user requests anyway.  */
   8046 	  _bfd_error_handler (_("%pB: warning: selected VFP11 erratum "
   8047 	    "workaround is not necessary for target architecture"), obfd);
   8048 	}
   8049     }
   8050   else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
   8051     /* For earlier architectures, we might need the workaround, but do not
   8052        enable it by default.  If users is running with broken hardware, they
   8053        must enable the erratum fix explicitly.  */
   8054     globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
   8055 }
   8056 
   8057 void
   8058 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
   8059 {
   8060   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
   8061   obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
   8062 
   8063   if (globals == NULL)
   8064     return;
   8065 
   8066   /* We assume only Cortex-M4 may require the fix.  */
   8067   if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
   8068       || out_attr[Tag_CPU_arch_profile].i != 'M')
   8069     {
   8070       if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
   8071 	/* Give a warning, but do as the user requests anyway.  */
   8072 	_bfd_error_handler
   8073 	  (_("%pB: warning: selected STM32L4XX erratum "
   8074 	     "workaround is not necessary for target architecture"), obfd);
   8075     }
   8076 }
   8077 
   8078 enum bfd_arm_vfp11_pipe
   8079 {
   8080   VFP11_FMAC,
   8081   VFP11_LS,
   8082   VFP11_DS,
   8083   VFP11_BAD
   8084 };
   8085 
   8086 /* Return a VFP register number.  This is encoded as RX:X for single-precision
   8087    registers, or X:RX for double-precision registers, where RX is the group of
   8088    four bits in the instruction encoding and X is the single extension bit.
   8089    RX and X fields are specified using their lowest (starting) bit.  The return
   8090    value is:
   8091 
   8092      0...31: single-precision registers s0...s31
   8093      32...63: double-precision registers d0...d31.
   8094 
   8095    Although X should be zero for VFP11 (encoding d0...d15 only), we might
   8096    encounter VFP3 instructions, so we allow the full range for DP registers.  */
   8097 
   8098 static unsigned int
   8099 bfd_arm_vfp11_regno (unsigned int insn, bool is_double, unsigned int rx,
   8100 		     unsigned int x)
   8101 {
   8102   if (is_double)
   8103     return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
   8104   else
   8105     return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
   8106 }
   8107 
   8108 /* Set bits in *WMASK according to a register number REG as encoded by
   8109    bfd_arm_vfp11_regno().  Ignore d16-d31.  */
   8110 
   8111 static void
   8112 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
   8113 {
   8114   if (reg < 32)
   8115     *wmask |= 1 << reg;
   8116   else if (reg < 48)
   8117     *wmask |= 3 << ((reg - 32) * 2);
   8118 }
   8119 
   8120 /* Return TRUE if WMASK overwrites anything in REGS.  */
   8121 
   8122 static bool
   8123 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
   8124 {
   8125   int i;
   8126 
   8127   for (i = 0; i < numregs; i++)
   8128     {
   8129       unsigned int reg = regs[i];
   8130 
   8131       if (reg < 32 && (wmask & (1 << reg)) != 0)
   8132 	return true;
   8133 
   8134       reg -= 32;
   8135 
   8136       if (reg >= 16)
   8137 	continue;
   8138 
   8139       if ((wmask & (3 << (reg * 2))) != 0)
   8140 	return true;
   8141     }
   8142 
   8143   return false;
   8144 }
   8145 
   8146 /* In this function, we're interested in two things: finding input registers
   8147    for VFP data-processing instructions, and finding the set of registers which
   8148    arbitrary VFP instructions may write to.  We use a 32-bit unsigned int to
   8149    hold the written set, so FLDM etc. are easy to deal with (we're only
   8150    interested in 32 SP registers or 16 dp registers, due to the VFP version
   8151    implemented by the chip in question).  DP registers are marked by setting
   8152    both SP registers in the write mask).  */
   8153 
   8154 static enum bfd_arm_vfp11_pipe
   8155 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
   8156 			   int *numregs)
   8157 {
   8158   enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
   8159   bool is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
   8160 
   8161   if ((insn & 0x0f000e10) == 0x0e000a00)  /* A data-processing insn.  */
   8162     {
   8163       unsigned int pqrs;
   8164       unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
   8165       unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
   8166 
   8167       pqrs = ((insn & 0x00800000) >> 20)
   8168 	   | ((insn & 0x00300000) >> 19)
   8169 	   | ((insn & 0x00000040) >> 6);
   8170 
   8171       switch (pqrs)
   8172 	{
   8173 	case 0: /* fmac[sd].  */
   8174 	case 1: /* fnmac[sd].  */
   8175 	case 2: /* fmsc[sd].  */
   8176 	case 3: /* fnmsc[sd].  */
   8177 	  vpipe = VFP11_FMAC;
   8178 	  bfd_arm_vfp11_write_mask (destmask, fd);
   8179 	  regs[0] = fd;
   8180 	  regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7);  /* Fn.  */
   8181 	  regs[2] = fm;
   8182 	  *numregs = 3;
   8183 	  break;
   8184 
   8185 	case 4: /* fmul[sd].  */
   8186 	case 5: /* fnmul[sd].  */
   8187 	case 6: /* fadd[sd].  */
   8188 	case 7: /* fsub[sd].  */
   8189 	  vpipe = VFP11_FMAC;
   8190 	  goto vfp_binop;
   8191 
   8192 	case 8: /* fdiv[sd].  */
   8193 	  vpipe = VFP11_DS;
   8194 	  vfp_binop:
   8195 	  bfd_arm_vfp11_write_mask (destmask, fd);
   8196 	  regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7);   /* Fn.  */
   8197 	  regs[1] = fm;
   8198 	  *numregs = 2;
   8199 	  break;
   8200 
   8201 	case 15: /* extended opcode.  */
   8202 	  {
   8203 	    unsigned int extn = ((insn >> 15) & 0x1e)
   8204 			      | ((insn >> 7) & 1);
   8205 
   8206 	    switch (extn)
   8207 	      {
   8208 	      case 0: /* fcpy[sd].  */
   8209 	      case 1: /* fabs[sd].  */
   8210 	      case 2: /* fneg[sd].  */
   8211 	      case 8: /* fcmp[sd].  */
   8212 	      case 9: /* fcmpe[sd].  */
   8213 	      case 10: /* fcmpz[sd].  */
   8214 	      case 11: /* fcmpez[sd].  */
   8215 	      case 16: /* fuito[sd].  */
   8216 	      case 17: /* fsito[sd].  */
   8217 	      case 24: /* ftoui[sd].  */
   8218 	      case 25: /* ftouiz[sd].  */
   8219 	      case 26: /* ftosi[sd].  */
   8220 	      case 27: /* ftosiz[sd].  */
   8221 		/* These instructions will not bounce due to underflow.  */
   8222 		*numregs = 0;
   8223 		vpipe = VFP11_FMAC;
   8224 		break;
   8225 
   8226 	      case 3: /* fsqrt[sd].  */
   8227 		/* fsqrt cannot underflow, but it can (perhaps) overwrite
   8228 		   registers to cause the erratum in previous instructions.  */
   8229 		bfd_arm_vfp11_write_mask (destmask, fd);
   8230 		vpipe = VFP11_DS;
   8231 		break;
   8232 
   8233 	      case 15: /* fcvt{ds,sd}.  */
   8234 		{
   8235 		  int rnum = 0;
   8236 
   8237 		  bfd_arm_vfp11_write_mask (destmask, fd);
   8238 
   8239 		  /* Only FCVTSD can underflow.  */
   8240 		  if ((insn & 0x100) != 0)
   8241 		    regs[rnum++] = fm;
   8242 
   8243 		  *numregs = rnum;
   8244 
   8245 		  vpipe = VFP11_FMAC;
   8246 		}
   8247 		break;
   8248 
   8249 	      default:
   8250 		return VFP11_BAD;
   8251 	      }
   8252 	  }
   8253 	  break;
   8254 
   8255 	default:
   8256 	  return VFP11_BAD;
   8257 	}
   8258     }
   8259   /* Two-register transfer.  */
   8260   else if ((insn & 0x0fe00ed0) == 0x0c400a10)
   8261     {
   8262       unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
   8263 
   8264       if ((insn & 0x100000) == 0)
   8265 	{
   8266 	  if (is_double)
   8267 	    bfd_arm_vfp11_write_mask (destmask, fm);
   8268 	  else
   8269 	    {
   8270 	      bfd_arm_vfp11_write_mask (destmask, fm);
   8271 	      bfd_arm_vfp11_write_mask (destmask, fm + 1);
   8272 	    }
   8273 	}
   8274 
   8275       vpipe = VFP11_LS;
   8276     }
   8277   else if ((insn & 0x0e100e00) == 0x0c100a00)  /* A load insn.  */
   8278     {
   8279       int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
   8280       unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
   8281 
   8282       switch (puw)
   8283 	{
   8284 	case 0: /* Two-reg transfer.  We should catch these above.  */
   8285 	  abort ();
   8286 
   8287 	case 2: /* fldm[sdx].  */
   8288 	case 3:
   8289 	case 5:
   8290 	  {
   8291 	    unsigned int i, offset = insn & 0xff;
   8292 
   8293 	    if (is_double)
   8294 	      offset >>= 1;
   8295 
   8296 	    for (i = fd; i < fd + offset; i++)
   8297 	      bfd_arm_vfp11_write_mask (destmask, i);
   8298 	  }
   8299 	  break;
   8300 
   8301 	case 4: /* fld[sd].  */
   8302 	case 6:
   8303 	  bfd_arm_vfp11_write_mask (destmask, fd);
   8304 	  break;
   8305 
   8306 	default:
   8307 	  return VFP11_BAD;
   8308 	}
   8309 
   8310       vpipe = VFP11_LS;
   8311     }
   8312   /* Single-register transfer. Note L==0.  */
   8313   else if ((insn & 0x0f100e10) == 0x0e000a10)
   8314     {
   8315       unsigned int opcode = (insn >> 21) & 7;
   8316       unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
   8317 
   8318       switch (opcode)
   8319 	{
   8320 	case 0: /* fmsr/fmdlr.  */
   8321 	case 1: /* fmdhr.  */
   8322 	  /* Mark fmdhr and fmdlr as writing to the whole of the DP
   8323 	     destination register.  I don't know if this is exactly right,
   8324 	     but it is the conservative choice.  */
   8325 	  bfd_arm_vfp11_write_mask (destmask, fn);
   8326 	  break;
   8327 
   8328 	case 7: /* fmxr.  */
   8329 	  break;
   8330 	}
   8331 
   8332       vpipe = VFP11_LS;
   8333     }
   8334 
   8335   return vpipe;
   8336 }
   8337 
   8338 
   8339 static int elf32_arm_compare_mapping (const void * a, const void * b);
   8340 
   8341 
   8342 /* Look for potentially-troublesome code sequences which might trigger the
   8343    VFP11 denormal/antidependency erratum.  See, e.g., the ARM1136 errata sheet
   8344    (available from ARM) for details of the erratum.  A short version is
   8345    described in ld.texinfo.  */
   8346 
   8347 bool
   8348 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
   8349 {
   8350   asection *sec;
   8351   bfd_byte *contents = NULL;
   8352   int state = 0;
   8353   int regs[3], numregs = 0;
   8354   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
   8355   int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
   8356 
   8357   if (globals == NULL)
   8358     return false;
   8359 
   8360   /* We use a simple FSM to match troublesome VFP11 instruction sequences.
   8361      The states transition as follows:
   8362 
   8363        0 -> 1 (vector) or 0 -> 2 (scalar)
   8364 	   A VFP FMAC-pipeline instruction has been seen. Fill
   8365 	   regs[0]..regs[numregs-1] with its input operands. Remember this
   8366 	   instruction in 'first_fmac'.
   8367 
   8368        1 -> 2
   8369 	   Any instruction, except for a VFP instruction which overwrites
   8370 	   regs[*].
   8371 
   8372        1 -> 3 [ -> 0 ]  or
   8373        2 -> 3 [ -> 0 ]
   8374 	   A VFP instruction has been seen which overwrites any of regs[*].
   8375 	   We must make a veneer!  Reset state to 0 before examining next
   8376 	   instruction.
   8377 
   8378        2 -> 0
   8379 	   If we fail to match anything in state 2, reset to state 0 and reset
   8380 	   the instruction pointer to the instruction after 'first_fmac'.
   8381 
   8382      If the VFP11 vector mode is in use, there must be at least two unrelated
   8383      instructions between anti-dependent VFP11 instructions to properly avoid
   8384      triggering the erratum, hence the use of the extra state 1.  */
   8385 
   8386   /* If we are only performing a partial link do not bother
   8387      to construct any glue.  */
   8388   if (bfd_link_relocatable (link_info))
   8389     return true;
   8390 
   8391   /* Skip if this bfd does not correspond to an ELF image.  */
   8392   if (! is_arm_elf (abfd))
   8393     return true;
   8394 
   8395   /* We should have chosen a fix type by the time we get here.  */
   8396   BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
   8397 
   8398   if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
   8399     return true;
   8400 
   8401   /* Skip this BFD if it corresponds to an executable or dynamic object.  */
   8402   if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
   8403     return true;
   8404 
   8405   for (sec = abfd->sections; sec != NULL; sec = sec->next)
   8406     {
   8407       unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
   8408       struct _arm_elf_section_data *sec_data;
   8409 
   8410       /* If we don't have executable progbits, we're not interested in this
   8411 	 section.  Also skip if section is to be excluded.  */
   8412       if (elf_section_type (sec) != SHT_PROGBITS
   8413 	  || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
   8414 	  || (sec->flags & SEC_EXCLUDE) != 0
   8415 	  || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
   8416 	  || sec->output_section == bfd_abs_section_ptr
   8417 	  || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
   8418 	continue;
   8419 
   8420       sec_data = elf32_arm_section_data (sec);
   8421 
   8422       if (sec_data->mapcount == 0)
   8423 	continue;
   8424 
   8425       if (elf_section_data (sec)->this_hdr.contents != NULL)
   8426 	contents = elf_section_data (sec)->this_hdr.contents;
   8427       else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
   8428 	goto error_return;
   8429 
   8430       qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
   8431 	     elf32_arm_compare_mapping);
   8432 
   8433       for (span = 0; span < sec_data->mapcount; span++)
   8434 	{
   8435 	  unsigned int span_start = sec_data->map[span].vma;
   8436 	  unsigned int span_end = (span == sec_data->mapcount - 1)
   8437 				  ? sec->size : sec_data->map[span + 1].vma;
   8438 	  char span_type = sec_data->map[span].type;
   8439 
   8440 	  /* FIXME: Only ARM mode is supported at present.  We may need to
   8441 	     support Thumb-2 mode also at some point.  */
   8442 	  if (span_type != 'a')
   8443 	    continue;
   8444 
   8445 	  for (i = span_start; i < span_end;)
   8446 	    {
   8447 	      unsigned int next_i = i + 4;
   8448 	      unsigned int insn = bfd_big_endian (abfd)
   8449 		? (((unsigned) contents[i] << 24)
   8450 		   | (contents[i + 1] << 16)
   8451 		   | (contents[i + 2] << 8)
   8452 		   | contents[i + 3])
   8453 		: (((unsigned) contents[i + 3] << 24)
   8454 		   | (contents[i + 2] << 16)
   8455 		   | (contents[i + 1] << 8)
   8456 		   | contents[i]);
   8457 	      unsigned int writemask = 0;
   8458 	      enum bfd_arm_vfp11_pipe vpipe;
   8459 
   8460 	      switch (state)
   8461 		{
   8462 		case 0:
   8463 		  vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
   8464 						    &numregs);
   8465 		  /* I'm assuming the VFP11 erratum can trigger with denorm
   8466 		     operands on either the FMAC or the DS pipeline. This might
   8467 		     lead to slightly overenthusiastic veneer insertion.  */
   8468 		  if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
   8469 		    {
   8470 		      state = use_vector ? 1 : 2;
   8471 		      first_fmac = i;
   8472 		      veneer_of_insn = insn;
   8473 		    }
   8474 		  break;
   8475 
   8476 		case 1:
   8477 		  {
   8478 		    int other_regs[3], other_numregs;
   8479 		    vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
   8480 						      other_regs,
   8481 						      &other_numregs);
   8482 		    if (vpipe != VFP11_BAD
   8483 			&& bfd_arm_vfp11_antidependency (writemask, regs,
   8484 							 numregs))
   8485 		      state = 3;
   8486 		    else
   8487 		      state = 2;
   8488 		  }
   8489 		  break;
   8490 
   8491 		case 2:
   8492 		  {
   8493 		    int other_regs[3], other_numregs;
   8494 		    vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
   8495 						      other_regs,
   8496 						      &other_numregs);
   8497 		    if (vpipe != VFP11_BAD
   8498 			&& bfd_arm_vfp11_antidependency (writemask, regs,
   8499 							 numregs))
   8500 		      state = 3;
   8501 		    else
   8502 		      {
   8503 			state = 0;
   8504 			next_i = first_fmac + 4;
   8505 		      }
   8506 		  }
   8507 		  break;
   8508 
   8509 		case 3:
   8510 		  abort ();  /* Should be unreachable.  */
   8511 		}
   8512 
   8513 	      if (state == 3)
   8514 		{
   8515 		  elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
   8516 		      bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
   8517 
   8518 		  elf32_arm_section_data (sec)->erratumcount += 1;
   8519 
   8520 		  newerr->u.b.vfp_insn = veneer_of_insn;
   8521 
   8522 		  switch (span_type)
   8523 		    {
   8524 		    case 'a':
   8525 		      newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
   8526 		      break;
   8527 
   8528 		    default:
   8529 		      abort ();
   8530 		    }
   8531 
   8532 		  record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
   8533 					       first_fmac);
   8534 
   8535 		  newerr->vma = -1;
   8536 
   8537 		  newerr->next = sec_data->erratumlist;
   8538 		  sec_data->erratumlist = newerr;
   8539 
   8540 		  state = 0;
   8541 		}
   8542 
   8543 	      i = next_i;
   8544 	    }
   8545 	}
   8546 
   8547       if (elf_section_data (sec)->this_hdr.contents != contents)
   8548 	free (contents);
   8549       contents = NULL;
   8550     }
   8551 
   8552   return true;
   8553 
   8554  error_return:
   8555   if (elf_section_data (sec)->this_hdr.contents != contents)
   8556     free (contents);
   8557 
   8558   return false;
   8559 }
   8560 
   8561 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
   8562    after sections have been laid out, using specially-named symbols.  */
   8563 
   8564 void
   8565 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
   8566 					  struct bfd_link_info *link_info)
   8567 {
   8568   asection *sec;
   8569   struct elf32_arm_link_hash_table *globals;
   8570   char *tmp_name;
   8571 
   8572   if (bfd_link_relocatable (link_info))
   8573     return;
   8574 
   8575   /* Skip if this bfd does not correspond to an ELF image.  */
   8576   if (! is_arm_elf (abfd))
   8577     return;
   8578 
   8579   globals = elf32_arm_hash_table (link_info);
   8580   if (globals == NULL)
   8581     return;
   8582 
   8583   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
   8584 				  (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
   8585   BFD_ASSERT (tmp_name);
   8586 
   8587   for (sec = abfd->sections; sec != NULL; sec = sec->next)
   8588     {
   8589       struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
   8590       elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
   8591 
   8592       for (; errnode != NULL; errnode = errnode->next)
   8593 	{
   8594 	  struct elf_link_hash_entry *myh;
   8595 	  bfd_vma vma;
   8596 
   8597 	  switch (errnode->type)
   8598 	    {
   8599 	    case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
   8600 	    case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
   8601 	      /* Find veneer symbol.  */
   8602 	      sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
   8603 		       errnode->u.b.veneer->u.v.id);
   8604 
   8605 	      myh = elf_link_hash_lookup
   8606 		(&(globals)->root, tmp_name, false, false, true);
   8607 
   8608 	      if (myh == NULL)
   8609 		_bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
   8610 				    abfd, "VFP11", tmp_name);
   8611 
   8612 	      vma = myh->root.u.def.section->output_section->vma
   8613 		    + myh->root.u.def.section->output_offset
   8614 		    + myh->root.u.def.value;
   8615 
   8616 	      errnode->u.b.veneer->vma = vma;
   8617 	      break;
   8618 
   8619 	    case VFP11_ERRATUM_ARM_VENEER:
   8620 	    case VFP11_ERRATUM_THUMB_VENEER:
   8621 	      /* Find return location.  */
   8622 	      sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
   8623 		       errnode->u.v.id);
   8624 
   8625 	      myh = elf_link_hash_lookup
   8626 		(&(globals)->root, tmp_name, false, false, true);
   8627 
   8628 	      if (myh == NULL)
   8629 		_bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
   8630 				    abfd, "VFP11", tmp_name);
   8631 
   8632 	      vma = myh->root.u.def.section->output_section->vma
   8633 		    + myh->root.u.def.section->output_offset
   8634 		    + myh->root.u.def.value;
   8635 
   8636 	      errnode->u.v.branch->vma = vma;
   8637 	      break;
   8638 
   8639 	    default:
   8640 	      abort ();
   8641 	    }
   8642 	}
   8643     }
   8644 
   8645   free (tmp_name);
   8646 }
   8647 
   8648 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
   8649    return locations after sections have been laid out, using
   8650    specially-named symbols.  */
   8651 
   8652 void
   8653 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
   8654 					      struct bfd_link_info *link_info)
   8655 {
   8656   asection *sec;
   8657   struct elf32_arm_link_hash_table *globals;
   8658   char *tmp_name;
   8659 
   8660   if (bfd_link_relocatable (link_info))
   8661     return;
   8662 
   8663   /* Skip if this bfd does not correspond to an ELF image.  */
   8664   if (! is_arm_elf (abfd))
   8665     return;
   8666 
   8667   globals = elf32_arm_hash_table (link_info);
   8668   if (globals == NULL)
   8669     return;
   8670 
   8671   tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
   8672 				  (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
   8673   BFD_ASSERT (tmp_name);
   8674 
   8675   for (sec = abfd->sections; sec != NULL; sec = sec->next)
   8676     {
   8677       struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
   8678       elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
   8679 
   8680       for (; errnode != NULL; errnode = errnode->next)
   8681 	{
   8682 	  struct elf_link_hash_entry *myh;
   8683 	  bfd_vma vma;
   8684 
   8685 	  switch (errnode->type)
   8686 	    {
   8687 	    case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
   8688 	      /* Find veneer symbol.  */
   8689 	      sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
   8690 		       errnode->u.b.veneer->u.v.id);
   8691 
   8692 	      myh = elf_link_hash_lookup
   8693 		(&(globals)->root, tmp_name, false, false, true);
   8694 
   8695 	      if (myh == NULL)
   8696 		_bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
   8697 				    abfd, "STM32L4XX", tmp_name);
   8698 
   8699 	      vma = myh->root.u.def.section->output_section->vma
   8700 		+ myh->root.u.def.section->output_offset
   8701 		+ myh->root.u.def.value;
   8702 
   8703 	      errnode->u.b.veneer->vma = vma;
   8704 	      break;
   8705 
   8706 	    case STM32L4XX_ERRATUM_VENEER:
   8707 	      /* Find return location.  */
   8708 	      sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
   8709 		       errnode->u.v.id);
   8710 
   8711 	      myh = elf_link_hash_lookup
   8712 		(&(globals)->root, tmp_name, false, false, true);
   8713 
   8714 	      if (myh == NULL)
   8715 		_bfd_error_handler (_("%pB: unable to find %s veneer `%s'"),
   8716 				    abfd, "STM32L4XX", tmp_name);
   8717 
   8718 	      vma = myh->root.u.def.section->output_section->vma
   8719 		+ myh->root.u.def.section->output_offset
   8720 		+ myh->root.u.def.value;
   8721 
   8722 	      errnode->u.v.branch->vma = vma;
   8723 	      break;
   8724 
   8725 	    default:
   8726 	      abort ();
   8727 	    }
   8728 	}
   8729     }
   8730 
   8731   free (tmp_name);
   8732 }
   8733 
   8734 static inline bool
   8735 is_thumb2_ldmia (const insn32 insn)
   8736 {
   8737   /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
   8738      1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll.  */
   8739   return (insn & 0xffd02000) == 0xe8900000;
   8740 }
   8741 
   8742 static inline bool
   8743 is_thumb2_ldmdb (const insn32 insn)
   8744 {
   8745   /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
   8746      1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll.  */
   8747   return (insn & 0xffd02000) == 0xe9100000;
   8748 }
   8749 
   8750 static inline bool
   8751 is_thumb2_vldm (const insn32 insn)
   8752 {
   8753   /* A6.5 Extension register load or store instruction
   8754      A7.7.229
   8755      We look for SP 32-bit and DP 64-bit registers.
   8756      Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
   8757      <list> is consecutive 64-bit registers
   8758      1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
   8759      Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
   8760      <list> is consecutive 32-bit registers
   8761      1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
   8762      if P==0 && U==1 && W==1 && Rn=1101 VPOP
   8763      if PUW=010 || PUW=011 || PUW=101 VLDM.  */
   8764   return
   8765     (((insn & 0xfe100f00) == 0xec100b00) ||
   8766      ((insn & 0xfe100f00) == 0xec100a00))
   8767     && /* (IA without !).  */
   8768     (((((insn << 7) >> 28) & 0xd) == 0x4)
   8769      /* (IA with !), includes VPOP (when reg number is SP).  */
   8770      || ((((insn << 7) >> 28) & 0xd) == 0x5)
   8771      /* (DB with !).  */
   8772      || ((((insn << 7) >> 28) & 0xd) == 0x9));
   8773 }
   8774 
   8775 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
   8776    VLDM opcode and:
   8777  - computes the number and the mode of memory accesses
   8778  - decides if the replacement should be done:
   8779    . replaces only if > 8-word accesses
   8780    . or (testing purposes only) replaces all accesses.  */
   8781 
   8782 static bool
   8783 stm32l4xx_need_create_replacing_stub (const insn32 insn,
   8784 				      bfd_arm_stm32l4xx_fix stm32l4xx_fix)
   8785 {
   8786   int nb_words = 0;
   8787 
   8788   /* The field encoding the register list is the same for both LDMIA
   8789      and LDMDB encodings.  */
   8790   if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
   8791     nb_words = elf32_arm_popcount (insn & 0x0000ffff);
   8792   else if (is_thumb2_vldm (insn))
   8793    nb_words = (insn & 0xff);
   8794 
   8795   /* DEFAULT mode accounts for the real bug condition situation,
   8796      ALL mode inserts stubs for each LDM/VLDM instruction (testing).  */
   8797   return (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT
   8798 	  ? nb_words > 8
   8799 	  : stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL);
   8800 }
   8801 
   8802 /* Look for potentially-troublesome code sequences which might trigger
   8803    the STM STM32L4XX erratum.  */
   8804 
   8805 bool
   8806 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
   8807 				      struct bfd_link_info *link_info)
   8808 {
   8809   asection *sec;
   8810   bfd_byte *contents = NULL;
   8811   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
   8812 
   8813   if (globals == NULL)
   8814     return false;
   8815 
   8816   /* If we are only performing a partial link do not bother
   8817      to construct any glue.  */
   8818   if (bfd_link_relocatable (link_info))
   8819     return true;
   8820 
   8821   /* Skip if this bfd does not correspond to an ELF image.  */
   8822   if (! is_arm_elf (abfd))
   8823     return true;
   8824 
   8825   if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
   8826     return true;
   8827 
   8828   /* Skip this BFD if it corresponds to an executable or dynamic object.  */
   8829   if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
   8830     return true;
   8831 
   8832   for (sec = abfd->sections; sec != NULL; sec = sec->next)
   8833     {
   8834       unsigned int i, span;
   8835       struct _arm_elf_section_data *sec_data;
   8836 
   8837       /* If we don't have executable progbits, we're not interested in this
   8838 	 section.  Also skip if section is to be excluded.  */
   8839       if (elf_section_type (sec) != SHT_PROGBITS
   8840 	  || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
   8841 	  || (sec->flags & SEC_EXCLUDE) != 0
   8842 	  || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
   8843 	  || sec->output_section == bfd_abs_section_ptr
   8844 	  || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
   8845 	continue;
   8846 
   8847       sec_data = elf32_arm_section_data (sec);
   8848 
   8849       if (sec_data->mapcount == 0)
   8850 	continue;
   8851 
   8852       if (elf_section_data (sec)->this_hdr.contents != NULL)
   8853 	contents = elf_section_data (sec)->this_hdr.contents;
   8854       else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
   8855 	goto error_return;
   8856 
   8857       qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
   8858 	     elf32_arm_compare_mapping);
   8859 
   8860       for (span = 0; span < sec_data->mapcount; span++)
   8861 	{
   8862 	  unsigned int span_start = sec_data->map[span].vma;
   8863 	  unsigned int span_end = (span == sec_data->mapcount - 1)
   8864 	    ? sec->size : sec_data->map[span + 1].vma;
   8865 	  char span_type = sec_data->map[span].type;
   8866 	  int itblock_current_pos = 0;
   8867 
   8868 	  /* Only Thumb2 mode need be supported with this CM4 specific
   8869 	     code, we should not encounter any arm mode eg span_type
   8870 	     != 'a'.  */
   8871 	  if (span_type != 't')
   8872 	    continue;
   8873 
   8874 	  for (i = span_start; i < span_end;)
   8875 	    {
   8876 	      unsigned int insn = bfd_get_16 (abfd, &contents[i]);
   8877 	      bool insn_32bit = false;
   8878 	      bool is_ldm = false;
   8879 	      bool is_vldm = false;
   8880 	      bool is_not_last_in_it_block = false;
   8881 
   8882 	      /* The first 16-bits of all 32-bit thumb2 instructions start
   8883 		 with opcode[15..13]=0b111 and the encoded op1 can be anything
   8884 		 except opcode[12..11]!=0b00.
   8885 		 See 32-bit Thumb instruction encoding.  */
   8886 	      if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
   8887 		insn_32bit = true;
   8888 
   8889 	      /* Compute the predicate that tells if the instruction
   8890 		 is concerned by the IT block
   8891 		 - Creates an error if there is a ldm that is not
   8892 		   last in the IT block thus cannot be replaced
   8893 		 - Otherwise we can create a branch at the end of the
   8894 		   IT block, it will be controlled naturally by IT
   8895 		   with the proper pseudo-predicate
   8896 		 - So the only interesting predicate is the one that
   8897 		   tells that we are not on the last item of an IT
   8898 		   block.  */
   8899 	      if (itblock_current_pos != 0)
   8900 		  is_not_last_in_it_block = !!--itblock_current_pos;
   8901 
   8902 	      if (insn_32bit)
   8903 		{
   8904 		  /* Load the rest of the insn (in manual-friendly order).  */
   8905 		  insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
   8906 		  is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
   8907 		  is_vldm = is_thumb2_vldm (insn);
   8908 
   8909 		  /* Veneers are created for (v)ldm depending on
   8910 		     option flags and memory accesses conditions; but
   8911 		     if the instruction is not the last instruction of
   8912 		     an IT block, we cannot create a jump there, so we
   8913 		     bail out.  */
   8914 		    if ((is_ldm || is_vldm)
   8915 			&& stm32l4xx_need_create_replacing_stub
   8916 			(insn, globals->stm32l4xx_fix))
   8917 		      {
   8918 			if (is_not_last_in_it_block)
   8919 			  {
   8920 			    _bfd_error_handler
   8921 			      /* xgettext:c-format */
   8922 			      (_("%pB(%pA+%#x): error: multiple load detected"
   8923 				 " in non-last IT block instruction:"
   8924 				 " STM32L4XX veneer cannot be generated; "
   8925 				 "use gcc option -mrestrict-it to generate"
   8926 				 " only one instruction per IT block"),
   8927 			       abfd, sec, i);
   8928 			  }
   8929 			else
   8930 			  {
   8931 			    elf32_stm32l4xx_erratum_list *newerr =
   8932 			      (elf32_stm32l4xx_erratum_list *)
   8933 			      bfd_zmalloc
   8934 			      (sizeof (elf32_stm32l4xx_erratum_list));
   8935 
   8936 			    elf32_arm_section_data (sec)
   8937 			      ->stm32l4xx_erratumcount += 1;
   8938 			    newerr->u.b.insn = insn;
   8939 			    /* We create only thumb branches.  */
   8940 			    newerr->type =
   8941 			      STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
   8942 			    record_stm32l4xx_erratum_veneer
   8943 			      (link_info, newerr, abfd, sec,
   8944 			       i,
   8945 			       is_ldm ?
   8946 			       STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
   8947 			       STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
   8948 			    newerr->vma = -1;
   8949 			    newerr->next = sec_data->stm32l4xx_erratumlist;
   8950 			    sec_data->stm32l4xx_erratumlist = newerr;
   8951 			  }
   8952 		      }
   8953 		}
   8954 	      else
   8955 		{
   8956 		  /* A7.7.37 IT p208
   8957 		     IT blocks are only encoded in T1
   8958 		     Encoding T1: IT{x{y{z}}} <firstcond>
   8959 		     1 0 1 1 - 1 1 1 1 - firstcond - mask
   8960 		     if mask = '0000' then see 'related encodings'
   8961 		     We don't deal with UNPREDICTABLE, just ignore these.
   8962 		     There can be no nested IT blocks so an IT block
   8963 		     is naturally a new one for which it is worth
   8964 		     computing its size.  */
   8965 		  bool is_newitblock = ((insn & 0xff00) == 0xbf00)
   8966 		    && ((insn & 0x000f) != 0x0000);
   8967 		  /* If we have a new IT block we compute its size.  */
   8968 		  if (is_newitblock)
   8969 		    {
   8970 		      /* Compute the number of instructions controlled
   8971 			 by the IT block, it will be used to decide
   8972 			 whether we are inside an IT block or not.  */
   8973 		      unsigned int mask = insn & 0x000f;
   8974 		      itblock_current_pos = 4 - ctz (mask);
   8975 		    }
   8976 		}
   8977 
   8978 	      i += insn_32bit ? 4 : 2;
   8979 	    }
   8980 	}
   8981 
   8982       if (elf_section_data (sec)->this_hdr.contents != contents)
   8983 	free (contents);
   8984       contents = NULL;
   8985     }
   8986 
   8987   return true;
   8988 
   8989  error_return:
   8990   if (elf_section_data (sec)->this_hdr.contents != contents)
   8991     free (contents);
   8992 
   8993   return false;
   8994 }
   8995 
   8996 /* Set target relocation values needed during linking.  */
   8997 
   8998 void
   8999 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
   9000 				 struct bfd_link_info *link_info,
   9001 				 struct elf32_arm_params *params)
   9002 {
   9003   struct elf32_arm_link_hash_table *globals;
   9004 
   9005   globals = elf32_arm_hash_table (link_info);
   9006   if (globals == NULL)
   9007     return;
   9008 
   9009   globals->target1_is_rel = params->target1_is_rel;
   9010   if (globals->fdpic_p)
   9011     globals->target2_reloc = R_ARM_GOT32;
   9012   else if (strcmp (params->target2_type, "rel") == 0)
   9013     globals->target2_reloc = R_ARM_REL32;
   9014   else if (strcmp (params->target2_type, "abs") == 0)
   9015     globals->target2_reloc = R_ARM_ABS32;
   9016   else if (strcmp (params->target2_type, "got-rel") == 0)
   9017     globals->target2_reloc = R_ARM_GOT_PREL;
   9018   else
   9019     {
   9020       _bfd_error_handler (_("invalid TARGET2 relocation type '%s'"),
   9021 			  params->target2_type);
   9022     }
   9023   globals->fix_v4bx = params->fix_v4bx;
   9024   globals->use_blx |= params->use_blx;
   9025   globals->vfp11_fix = params->vfp11_denorm_fix;
   9026   globals->stm32l4xx_fix = params->stm32l4xx_fix;
   9027   if (globals->fdpic_p)
   9028     globals->pic_veneer = 1;
   9029   else
   9030     globals->pic_veneer = params->pic_veneer;
   9031   globals->fix_cortex_a8 = params->fix_cortex_a8;
   9032   globals->fix_arm1176 = params->fix_arm1176;
   9033   globals->cmse_implib = params->cmse_implib;
   9034   globals->in_implib_bfd = params->in_implib_bfd;
   9035 
   9036   BFD_ASSERT (is_arm_elf (output_bfd));
   9037   elf_arm_tdata (output_bfd)->no_enum_size_warning
   9038     = params->no_enum_size_warning;
   9039   elf_arm_tdata (output_bfd)->no_wchar_size_warning
   9040     = params->no_wchar_size_warning;
   9041 }
   9042 
   9043 /* Replace the target offset of a Thumb bl or b.w instruction.  */
   9044 
   9045 static void
   9046 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
   9047 {
   9048   bfd_vma upper;
   9049   bfd_vma lower;
   9050   int reloc_sign;
   9051 
   9052   BFD_ASSERT ((offset & 1) == 0);
   9053 
   9054   upper = bfd_get_16 (abfd, insn);
   9055   lower = bfd_get_16 (abfd, insn + 2);
   9056   reloc_sign = (offset < 0) ? 1 : 0;
   9057   upper = (upper & ~(bfd_vma) 0x7ff)
   9058 	  | ((offset >> 12) & 0x3ff)
   9059 	  | (reloc_sign << 10);
   9060   lower = (lower & ~(bfd_vma) 0x2fff)
   9061 	  | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
   9062 	  | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
   9063 	  | ((offset >> 1) & 0x7ff);
   9064   bfd_put_16 (abfd, upper, insn);
   9065   bfd_put_16 (abfd, lower, insn + 2);
   9066 }
   9067 
   9068 /* Thumb code calling an ARM function.  */
   9069 
   9070 static int
   9071 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
   9072 			 const char *		name,
   9073 			 bfd *			input_bfd,
   9074 			 bfd *			output_bfd,
   9075 			 asection *		input_section,
   9076 			 bfd_byte *		hit_data,
   9077 			 asection *		sym_sec,
   9078 			 bfd_vma		offset,
   9079 			 bfd_signed_vma		addend,
   9080 			 bfd_vma		val,
   9081 			 char **error_message)
   9082 {
   9083   asection * s = 0;
   9084   bfd_vma my_offset;
   9085   long int ret_offset;
   9086   struct elf_link_hash_entry * myh;
   9087   struct elf32_arm_link_hash_table * globals;
   9088 
   9089   myh = find_thumb_glue (info, name, error_message);
   9090   if (myh == NULL)
   9091     return false;
   9092 
   9093   globals = elf32_arm_hash_table (info);
   9094   BFD_ASSERT (globals != NULL);
   9095   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
   9096 
   9097   my_offset = myh->root.u.def.value;
   9098 
   9099   s = bfd_get_linker_section (globals->bfd_of_glue_owner,
   9100 			      THUMB2ARM_GLUE_SECTION_NAME);
   9101 
   9102   BFD_ASSERT (s != NULL);
   9103   BFD_ASSERT (s->contents != NULL);
   9104   BFD_ASSERT (s->output_section != NULL);
   9105 
   9106   if ((my_offset & 0x01) == 0x01)
   9107     {
   9108       if (sym_sec != NULL
   9109 	  && sym_sec->owner != NULL
   9110 	  && !INTERWORK_FLAG (sym_sec->owner))
   9111 	{
   9112 	  _bfd_error_handler
   9113 	    (_("%pB(%s): warning: interworking not enabled;"
   9114 	       " first occurrence: %pB: %s call to %s"),
   9115 	     sym_sec->owner, name, input_bfd, "Thumb", "ARM");
   9116 
   9117 	  return false;
   9118 	}
   9119 
   9120       --my_offset;
   9121       myh->root.u.def.value = my_offset;
   9122 
   9123       put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
   9124 		      s->contents + my_offset);
   9125 
   9126       put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
   9127 		      s->contents + my_offset + 2);
   9128 
   9129       ret_offset =
   9130 	/* Address of destination of the stub.  */
   9131 	((bfd_signed_vma) val)
   9132 	- ((bfd_signed_vma)
   9133 	   /* Offset from the start of the current section
   9134 	      to the start of the stubs.  */
   9135 	   (s->output_offset
   9136 	    /* Offset of the start of this stub from the start of the stubs.  */
   9137 	    + my_offset
   9138 	    /* Address of the start of the current section.  */
   9139 	    + s->output_section->vma)
   9140 	   /* The branch instruction is 4 bytes into the stub.  */
   9141 	   + 4
   9142 	   /* ARM branches work from the pc of the instruction + 8.  */
   9143 	   + 8);
   9144 
   9145       put_arm_insn (globals, output_bfd,
   9146 		    (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
   9147 		    s->contents + my_offset + 4);
   9148     }
   9149 
   9150   BFD_ASSERT (my_offset <= globals->thumb_glue_size);
   9151 
   9152   /* Now go back and fix up the original BL insn to point to here.  */
   9153   ret_offset =
   9154     /* Address of where the stub is located.  */
   9155     (s->output_section->vma + s->output_offset + my_offset)
   9156      /* Address of where the BL is located.  */
   9157     - (input_section->output_section->vma + input_section->output_offset
   9158        + offset)
   9159     /* Addend in the relocation.  */
   9160     - addend
   9161     /* Biassing for PC-relative addressing.  */
   9162     - 8;
   9163 
   9164   insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
   9165 
   9166   return true;
   9167 }
   9168 
   9169 /* Populate an Arm to Thumb stub.  Returns the stub symbol.  */
   9170 
   9171 static struct elf_link_hash_entry *
   9172 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
   9173 			     const char *	    name,
   9174 			     bfd *		    input_bfd,
   9175 			     bfd *		    output_bfd,
   9176 			     asection *		    sym_sec,
   9177 			     bfd_vma		    val,
   9178 			     asection *		    s,
   9179 			     char **		    error_message)
   9180 {
   9181   bfd_vma my_offset;
   9182   long int ret_offset;
   9183   struct elf_link_hash_entry * myh;
   9184   struct elf32_arm_link_hash_table * globals;
   9185 
   9186   myh = find_arm_glue (info, name, error_message);
   9187   if (myh == NULL)
   9188     return NULL;
   9189 
   9190   globals = elf32_arm_hash_table (info);
   9191   BFD_ASSERT (globals != NULL);
   9192   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
   9193 
   9194   my_offset = myh->root.u.def.value;
   9195 
   9196   if ((my_offset & 0x01) == 0x01)
   9197     {
   9198       if (sym_sec != NULL
   9199 	  && sym_sec->owner != NULL
   9200 	  && !INTERWORK_FLAG (sym_sec->owner))
   9201 	{
   9202 	  _bfd_error_handler
   9203 	    (_("%pB(%s): warning: interworking not enabled;"
   9204 	       " first occurrence: %pB: %s call to %s"),
   9205 	     sym_sec->owner, name, input_bfd, "ARM", "Thumb");
   9206 	}
   9207 
   9208       --my_offset;
   9209       myh->root.u.def.value = my_offset;
   9210 
   9211       if (bfd_link_pic (info)
   9212 	  || globals->pic_veneer)
   9213 	{
   9214 	  /* For relocatable objects we can't use absolute addresses,
   9215 	     so construct the address from a relative offset.  */
   9216 	  /* TODO: If the offset is small it's probably worth
   9217 	     constructing the address with adds.  */
   9218 	  put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
   9219 			s->contents + my_offset);
   9220 	  put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
   9221 			s->contents + my_offset + 4);
   9222 	  put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
   9223 			s->contents + my_offset + 8);
   9224 	  /* Adjust the offset by 4 for the position of the add,
   9225 	     and 8 for the pipeline offset.  */
   9226 	  ret_offset = (val - (s->output_offset
   9227 			       + s->output_section->vma
   9228 			       + my_offset + 12))
   9229 		       | 1;
   9230 	  bfd_put_32 (output_bfd, ret_offset,
   9231 		      s->contents + my_offset + 12);
   9232 	}
   9233       else if (globals->use_blx)
   9234 	{
   9235 	  put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
   9236 			s->contents + my_offset);
   9237 
   9238 	  /* It's a thumb address.  Add the low order bit.  */
   9239 	  bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
   9240 		      s->contents + my_offset + 4);
   9241 	}
   9242       else
   9243 	{
   9244 	  put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
   9245 			s->contents + my_offset);
   9246 
   9247 	  put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
   9248 			s->contents + my_offset + 4);
   9249 
   9250 	  /* It's a thumb address.  Add the low order bit.  */
   9251 	  bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
   9252 		      s->contents + my_offset + 8);
   9253 
   9254 	  my_offset += 12;
   9255 	}
   9256     }
   9257 
   9258   BFD_ASSERT (my_offset <= globals->arm_glue_size);
   9259 
   9260   return myh;
   9261 }
   9262 
   9263 /* Arm code calling a Thumb function.  */
   9264 
   9265 static int
   9266 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
   9267 			 const char *		name,
   9268 			 bfd *			input_bfd,
   9269 			 bfd *			output_bfd,
   9270 			 asection *		input_section,
   9271 			 bfd_byte *		hit_data,
   9272 			 asection *		sym_sec,
   9273 			 bfd_vma		offset,
   9274 			 bfd_signed_vma		addend,
   9275 			 bfd_vma		val,
   9276 			 char **error_message)
   9277 {
   9278   unsigned long int tmp;
   9279   bfd_vma my_offset;
   9280   asection * s;
   9281   long int ret_offset;
   9282   struct elf_link_hash_entry * myh;
   9283   struct elf32_arm_link_hash_table * globals;
   9284 
   9285   globals = elf32_arm_hash_table (info);
   9286   BFD_ASSERT (globals != NULL);
   9287   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
   9288 
   9289   s = bfd_get_linker_section (globals->bfd_of_glue_owner,
   9290 			      ARM2THUMB_GLUE_SECTION_NAME);
   9291   BFD_ASSERT (s != NULL);
   9292   BFD_ASSERT (s->contents != NULL);
   9293   BFD_ASSERT (s->output_section != NULL);
   9294 
   9295   myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
   9296 				     sym_sec, val, s, error_message);
   9297   if (!myh)
   9298     return false;
   9299 
   9300   my_offset = myh->root.u.def.value;
   9301   tmp = bfd_get_32 (input_bfd, hit_data);
   9302   tmp = tmp & 0xFF000000;
   9303 
   9304   /* Somehow these are both 4 too far, so subtract 8.  */
   9305   ret_offset = (s->output_offset
   9306 		+ my_offset
   9307 		+ s->output_section->vma
   9308 		- (input_section->output_offset
   9309 		   + input_section->output_section->vma
   9310 		   + offset + addend)
   9311 		- 8);
   9312 
   9313   tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
   9314 
   9315   bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
   9316 
   9317   return true;
   9318 }
   9319 
   9320 /* Populate Arm stub for an exported Thumb function.  */
   9321 
   9322 static bool
   9323 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
   9324 {
   9325   struct bfd_link_info * info = (struct bfd_link_info *) inf;
   9326   asection * s;
   9327   struct elf_link_hash_entry * myh;
   9328   struct elf32_arm_link_hash_entry *eh;
   9329   struct elf32_arm_link_hash_table * globals;
   9330   asection *sec;
   9331   bfd_vma val;
   9332   char *error_message;
   9333 
   9334   eh = elf32_arm_hash_entry (h);
   9335   /* Allocate stubs for exported Thumb functions on v4t.  */
   9336   if (eh->export_glue == NULL)
   9337     return true;
   9338 
   9339   globals = elf32_arm_hash_table (info);
   9340   BFD_ASSERT (globals != NULL);
   9341   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
   9342 
   9343   s = bfd_get_linker_section (globals->bfd_of_glue_owner,
   9344 			      ARM2THUMB_GLUE_SECTION_NAME);
   9345   BFD_ASSERT (s != NULL);
   9346   BFD_ASSERT (s->contents != NULL);
   9347   BFD_ASSERT (s->output_section != NULL);
   9348 
   9349   sec = eh->export_glue->root.u.def.section;
   9350 
   9351   BFD_ASSERT (sec->output_section != NULL);
   9352 
   9353   val = eh->export_glue->root.u.def.value + sec->output_offset
   9354 	+ sec->output_section->vma;
   9355 
   9356   myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
   9357 				     h->root.u.def.section->owner,
   9358 				     globals->obfd, sec, val, s,
   9359 				     &error_message);
   9360   BFD_ASSERT (myh);
   9361   return true;
   9362 }
   9363 
   9364 /* Populate ARMv4 BX veneers.  Returns the absolute adress of the veneer.  */
   9365 
   9366 static bfd_vma
   9367 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
   9368 {
   9369   bfd_byte *p;
   9370   bfd_vma glue_addr;
   9371   asection *s;
   9372   struct elf32_arm_link_hash_table *globals;
   9373 
   9374   globals = elf32_arm_hash_table (info);
   9375   BFD_ASSERT (globals != NULL);
   9376   BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
   9377 
   9378   s = bfd_get_linker_section (globals->bfd_of_glue_owner,
   9379 			      ARM_BX_GLUE_SECTION_NAME);
   9380   BFD_ASSERT (s != NULL);
   9381   BFD_ASSERT (s->contents != NULL);
   9382   BFD_ASSERT (s->output_section != NULL);
   9383 
   9384   BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
   9385 
   9386   glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
   9387 
   9388   if ((globals->bx_glue_offset[reg] & 1) == 0)
   9389     {
   9390       p = s->contents + glue_addr;
   9391       bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
   9392       bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
   9393       bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
   9394       globals->bx_glue_offset[reg] |= 1;
   9395     }
   9396 
   9397   return glue_addr + s->output_section->vma + s->output_offset;
   9398 }
   9399 
   9400 /* Generate Arm stubs for exported Thumb symbols.  */
   9401 static void
   9402 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
   9403 				  struct bfd_link_info *link_info)
   9404 {
   9405   struct elf32_arm_link_hash_table * globals;
   9406 
   9407   if (link_info == NULL)
   9408     /* Ignore this if we are not called by the ELF backend linker.  */
   9409     return;
   9410 
   9411   globals = elf32_arm_hash_table (link_info);
   9412   if (globals == NULL)
   9413     return;
   9414 
   9415   /* If blx is available then exported Thumb symbols are OK and there is
   9416      nothing to do.  */
   9417   if (globals->use_blx)
   9418     return;
   9419 
   9420   elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
   9421 			  link_info);
   9422 }
   9423 
   9424 /* Reserve space for COUNT dynamic relocations in relocation selection
   9425    SRELOC.  */
   9426 
   9427 static void
   9428 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
   9429 			      bfd_size_type count)
   9430 {
   9431   struct elf32_arm_link_hash_table *htab;
   9432 
   9433   htab = elf32_arm_hash_table (info);
   9434   BFD_ASSERT (htab->root.dynamic_sections_created);
   9435   if (sreloc == NULL)
   9436     abort ();
   9437   sreloc->size += RELOC_SIZE (htab) * count;
   9438 }
   9439 
   9440 /* Reserve space for COUNT R_ARM_IRELATIVE relocations.  If the link is
   9441    dynamic, the relocations should go in SRELOC, otherwise they should
   9442    go in the special .rel.iplt section.  */
   9443 
   9444 static void
   9445 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
   9446 			    bfd_size_type count)
   9447 {
   9448   struct elf32_arm_link_hash_table *htab;
   9449 
   9450   htab = elf32_arm_hash_table (info);
   9451   if (!htab->root.dynamic_sections_created)
   9452     htab->root.irelplt->size += RELOC_SIZE (htab) * count;
   9453   else
   9454     {
   9455       BFD_ASSERT (sreloc != NULL);
   9456       sreloc->size += RELOC_SIZE (htab) * count;
   9457     }
   9458 }
   9459 
   9460 /* Add relocation REL to the end of relocation section SRELOC.  */
   9461 
   9462 static void
   9463 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
   9464 			asection *sreloc, Elf_Internal_Rela *rel)
   9465 {
   9466   bfd_byte *loc;
   9467   struct elf32_arm_link_hash_table *htab;
   9468 
   9469   htab = elf32_arm_hash_table (info);
   9470   if (!htab->root.dynamic_sections_created
   9471       && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
   9472     sreloc = htab->root.irelplt;
   9473   if (sreloc == NULL)
   9474     abort ();
   9475   loc = sreloc->contents;
   9476   loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
   9477   if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
   9478     abort ();
   9479   SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
   9480 }
   9481 
   9482 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
   9483    IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
   9484    to .plt.  */
   9485 
   9486 static void
   9487 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
   9488 			      bool is_iplt_entry,
   9489 			      union gotplt_union *root_plt,
   9490 			      struct arm_plt_info *arm_plt)
   9491 {
   9492   struct elf32_arm_link_hash_table *htab;
   9493   asection *splt;
   9494   asection *sgotplt;
   9495 
   9496   htab = elf32_arm_hash_table (info);
   9497 
   9498   if (is_iplt_entry)
   9499     {
   9500       splt = htab->root.iplt;
   9501       sgotplt = htab->root.igotplt;
   9502 
   9503       /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt.  */
   9504       elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
   9505     }
   9506   else
   9507     {
   9508       splt = htab->root.splt;
   9509       sgotplt = htab->root.sgotplt;
   9510 
   9511     if (htab->fdpic_p)
   9512       {
   9513 	/* Allocate room for R_ARM_FUNCDESC_VALUE.  */
   9514 	/* For lazy binding, relocations will be put into .rel.plt, in
   9515 	   .rel.got otherwise.  */
   9516 	/* FIXME: today we don't support lazy binding so put it in .rel.got */
   9517 	if (info->flags & DF_BIND_NOW)
   9518 	  elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   9519 	else
   9520 	  elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
   9521       }
   9522     else
   9523       {
   9524 	/* Allocate room for an R_JUMP_SLOT relocation in .rel.plt.  */
   9525 	elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
   9526       }
   9527 
   9528       /* If this is the first .plt entry, make room for the special
   9529 	 first entry.  */
   9530       if (splt->size == 0)
   9531 	splt->size += htab->plt_header_size;
   9532 
   9533       htab->next_tls_desc_index++;
   9534     }
   9535 
   9536   /* Allocate the PLT entry itself, including any leading Thumb stub.  */
   9537   if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
   9538     splt->size += PLT_THUMB_STUB_SIZE;
   9539   root_plt->offset = splt->size;
   9540   splt->size += htab->plt_entry_size;
   9541 
   9542   /* We also need to make an entry in the .got.plt section, which
   9543      will be placed in the .got section by the linker script.  */
   9544   if (is_iplt_entry)
   9545     arm_plt->got_offset = sgotplt->size;
   9546   else
   9547     arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
   9548   if (htab->fdpic_p)
   9549     /* Function descriptor takes 64 bits in GOT.  */
   9550     sgotplt->size += 8;
   9551   else
   9552     sgotplt->size += 4;
   9553 }
   9554 
   9555 /* Fill in a PLT entry and its associated GOT slot.  If DYNINDX == -1,
   9556    the entry lives in .iplt and resolves to (*SYM_VALUE)().
   9557    Otherwise, DYNINDX is the index of the symbol in the dynamic
   9558    symbol table and SYM_VALUE is undefined.
   9559 
   9560    ROOT_PLT points to the offset of the PLT entry from the start of its
   9561    section (.iplt or .plt).  ARM_PLT points to the symbol's ARM-specific
   9562    bookkeeping information.
   9563 
   9564    Returns FALSE if there was a problem.  */
   9565 
   9566 static bool
   9567 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
   9568 			      union gotplt_union *root_plt,
   9569 			      struct arm_plt_info *arm_plt,
   9570 			      int dynindx, bfd_vma sym_value)
   9571 {
   9572   struct elf32_arm_link_hash_table *htab;
   9573   asection *sgot;
   9574   asection *splt;
   9575   asection *srel;
   9576   bfd_byte *loc;
   9577   bfd_vma plt_index;
   9578   Elf_Internal_Rela rel;
   9579   bfd_vma got_header_size;
   9580 
   9581   htab = elf32_arm_hash_table (info);
   9582 
   9583   /* Pick the appropriate sections and sizes.  */
   9584   if (dynindx == -1)
   9585     {
   9586       splt = htab->root.iplt;
   9587       sgot = htab->root.igotplt;
   9588       srel = htab->root.irelplt;
   9589 
   9590       /* There are no reserved entries in .igot.plt, and no special
   9591 	 first entry in .iplt.  */
   9592       got_header_size = 0;
   9593     }
   9594   else
   9595     {
   9596       splt = htab->root.splt;
   9597       sgot = htab->root.sgotplt;
   9598       srel = htab->root.srelplt;
   9599 
   9600       got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
   9601     }
   9602   BFD_ASSERT (splt != NULL && srel != NULL);
   9603 
   9604   bfd_vma got_offset, got_address, plt_address;
   9605   bfd_vma got_displacement, initial_got_entry;
   9606   bfd_byte * ptr;
   9607 
   9608   BFD_ASSERT (sgot != NULL);
   9609 
   9610   /* Get the offset into the .(i)got.plt table of the entry that
   9611      corresponds to this function.  */
   9612   got_offset = (arm_plt->got_offset & -2);
   9613 
   9614   /* Get the index in the procedure linkage table which
   9615      corresponds to this symbol.  This is the index of this symbol
   9616      in all the symbols for which we are making plt entries.
   9617      After the reserved .got.plt entries, all symbols appear in
   9618      the same order as in .plt.  */
   9619   if (htab->fdpic_p)
   9620     /* Function descriptor takes 8 bytes.  */
   9621     plt_index = (got_offset - got_header_size) / 8;
   9622   else
   9623     plt_index = (got_offset - got_header_size) / 4;
   9624 
   9625   /* Calculate the address of the GOT entry.  */
   9626   got_address = (sgot->output_section->vma
   9627 		 + sgot->output_offset
   9628 		 + got_offset);
   9629 
   9630   /* ...and the address of the PLT entry.  */
   9631   plt_address = (splt->output_section->vma
   9632 		 + splt->output_offset
   9633 		 + root_plt->offset);
   9634 
   9635   ptr = splt->contents + root_plt->offset;
   9636   if (htab->root.target_os == is_vxworks && bfd_link_pic (info))
   9637     {
   9638       unsigned int i;
   9639       bfd_vma val;
   9640 
   9641       for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
   9642 	{
   9643 	  val = elf32_arm_vxworks_shared_plt_entry[i];
   9644 	  if (i == 2)
   9645 	    val |= got_address - sgot->output_section->vma;
   9646 	  if (i == 5)
   9647 	    val |= plt_index * RELOC_SIZE (htab);
   9648 	  if (i == 2 || i == 5)
   9649 	    bfd_put_32 (output_bfd, val, ptr);
   9650 	  else
   9651 	    put_arm_insn (htab, output_bfd, val, ptr);
   9652 	}
   9653     }
   9654   else if (htab->root.target_os == is_vxworks)
   9655     {
   9656       unsigned int i;
   9657       bfd_vma val;
   9658 
   9659       for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
   9660 	{
   9661 	  val = elf32_arm_vxworks_exec_plt_entry[i];
   9662 	  if (i == 2)
   9663 	    val |= got_address;
   9664 	  if (i == 4)
   9665 	    val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
   9666 	  if (i == 5)
   9667 	    val |= plt_index * RELOC_SIZE (htab);
   9668 	  if (i == 2 || i == 5)
   9669 	    bfd_put_32 (output_bfd, val, ptr);
   9670 	  else
   9671 	    put_arm_insn (htab, output_bfd, val, ptr);
   9672 	}
   9673 
   9674       loc = (htab->srelplt2->contents
   9675 	     + (plt_index * 2 + 1) * RELOC_SIZE (htab));
   9676 
   9677       /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
   9678 	 referencing the GOT for this PLT entry.  */
   9679       rel.r_offset = plt_address + 8;
   9680       rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
   9681       rel.r_addend = got_offset;
   9682       SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
   9683       loc += RELOC_SIZE (htab);
   9684 
   9685       /* Create the R_ARM_ABS32 relocation referencing the
   9686 	 beginning of the PLT for this GOT entry.  */
   9687       rel.r_offset = got_address;
   9688       rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
   9689       rel.r_addend = 0;
   9690       SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
   9691     }
   9692   else if (htab->fdpic_p)
   9693     {
   9694       const bfd_vma *plt_entry = using_thumb_only (htab)
   9695 	? elf32_arm_fdpic_thumb_plt_entry
   9696 	: elf32_arm_fdpic_plt_entry;
   9697 
   9698       /* Fill-up Thumb stub if needed.  */
   9699       if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
   9700 	{
   9701 	  put_thumb_insn (htab, output_bfd,
   9702 			  elf32_arm_plt_thumb_stub[0], ptr - 4);
   9703 	  put_thumb_insn (htab, output_bfd,
   9704 			  elf32_arm_plt_thumb_stub[1], ptr - 2);
   9705 	}
   9706       /* As we are using 32 bit instructions even for the Thumb
   9707 	 version, we have to use 'put_arm_insn' instead of
   9708 	 'put_thumb_insn'.  */
   9709       put_arm_insn (htab, output_bfd, plt_entry[0], ptr + 0);
   9710       put_arm_insn (htab, output_bfd, plt_entry[1], ptr + 4);
   9711       put_arm_insn (htab, output_bfd, plt_entry[2], ptr + 8);
   9712       put_arm_insn (htab, output_bfd, plt_entry[3], ptr + 12);
   9713       bfd_put_32 (output_bfd, got_offset, ptr + 16);
   9714 
   9715       if (!(info->flags & DF_BIND_NOW))
   9716 	{
   9717 	  /* funcdesc_value_reloc_offset.  */
   9718 	  bfd_put_32 (output_bfd,
   9719 		      htab->root.srelplt->reloc_count * RELOC_SIZE (htab),
   9720 		      ptr + 20);
   9721 	  put_arm_insn (htab, output_bfd, plt_entry[6], ptr + 24);
   9722 	  put_arm_insn (htab, output_bfd, plt_entry[7], ptr + 28);
   9723 	  put_arm_insn (htab, output_bfd, plt_entry[8], ptr + 32);
   9724 	  put_arm_insn (htab, output_bfd, plt_entry[9], ptr + 36);
   9725 	}
   9726     }
   9727   else if (using_thumb_only (htab))
   9728     {
   9729       /* PR ld/16017: Generate thumb only PLT entries.  */
   9730       if (!using_thumb2 (htab))
   9731 	{
   9732 	  /* FIXME: We ought to be able to generate thumb-1 PLT
   9733 	     instructions...  */
   9734 	  _bfd_error_handler (_("%pB: warning: thumb-1 mode PLT generation not currently supported"),
   9735 			      output_bfd);
   9736 	  return false;
   9737 	}
   9738 
   9739       /* Calculate the displacement between the PLT slot and the entry in
   9740 	 the GOT.  The 12-byte offset accounts for the value produced by
   9741 	 adding to pc in the 3rd instruction of the PLT stub.  */
   9742       got_displacement = got_address - (plt_address + 12);
   9743 
   9744       /* As we are using 32 bit instructions we have to use 'put_arm_insn'
   9745 	 instead of 'put_thumb_insn'.  */
   9746       put_arm_insn (htab, output_bfd,
   9747 		    elf32_thumb2_plt_entry[0]
   9748 		    | ((got_displacement & 0x000000ff) << 16)
   9749 		    | ((got_displacement & 0x00000700) << 20)
   9750 		    | ((got_displacement & 0x00000800) >>  1)
   9751 		    | ((got_displacement & 0x0000f000) >> 12),
   9752 		    ptr + 0);
   9753       put_arm_insn (htab, output_bfd,
   9754 		    elf32_thumb2_plt_entry[1]
   9755 		    | ((got_displacement & 0x00ff0000)      )
   9756 		    | ((got_displacement & 0x07000000) <<  4)
   9757 		    | ((got_displacement & 0x08000000) >> 17)
   9758 		    | ((got_displacement & 0xf0000000) >> 28),
   9759 		    ptr + 4);
   9760       put_arm_insn (htab, output_bfd,
   9761 		    elf32_thumb2_plt_entry[2],
   9762 		    ptr + 8);
   9763       put_arm_insn (htab, output_bfd,
   9764 		    elf32_thumb2_plt_entry[3],
   9765 		    ptr + 12);
   9766     }
   9767   else
   9768     {
   9769       /* Calculate the displacement between the PLT slot and the
   9770 	 entry in the GOT.  The eight-byte offset accounts for the
   9771 	 value produced by adding to pc in the first instruction
   9772 	 of the PLT stub.  */
   9773       got_displacement = got_address - (plt_address + 8);
   9774 
   9775       if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
   9776 	{
   9777 	  put_thumb_insn (htab, output_bfd,
   9778 			  elf32_arm_plt_thumb_stub[0], ptr - 4);
   9779 	  put_thumb_insn (htab, output_bfd,
   9780 			  elf32_arm_plt_thumb_stub[1], ptr - 2);
   9781 	}
   9782 
   9783       if (!elf32_arm_use_long_plt_entry)
   9784 	{
   9785 	  BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
   9786 
   9787 	  put_arm_insn (htab, output_bfd,
   9788 			elf32_arm_plt_entry_short[0]
   9789 			| ((got_displacement & 0x0ff00000) >> 20),
   9790 			ptr + 0);
   9791 	  put_arm_insn (htab, output_bfd,
   9792 			elf32_arm_plt_entry_short[1]
   9793 			| ((got_displacement & 0x000ff000) >> 12),
   9794 			ptr+ 4);
   9795 	  put_arm_insn (htab, output_bfd,
   9796 			elf32_arm_plt_entry_short[2]
   9797 			| (got_displacement & 0x00000fff),
   9798 			ptr + 8);
   9799 #ifdef FOUR_WORD_PLT
   9800 	  bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
   9801 #endif
   9802 	}
   9803       else
   9804 	{
   9805 	  put_arm_insn (htab, output_bfd,
   9806 			elf32_arm_plt_entry_long[0]
   9807 			| ((got_displacement & 0xf0000000) >> 28),
   9808 			ptr + 0);
   9809 	  put_arm_insn (htab, output_bfd,
   9810 			elf32_arm_plt_entry_long[1]
   9811 			| ((got_displacement & 0x0ff00000) >> 20),
   9812 			ptr + 4);
   9813 	  put_arm_insn (htab, output_bfd,
   9814 			elf32_arm_plt_entry_long[2]
   9815 			| ((got_displacement & 0x000ff000) >> 12),
   9816 			ptr+ 8);
   9817 	  put_arm_insn (htab, output_bfd,
   9818 			elf32_arm_plt_entry_long[3]
   9819 			| (got_displacement & 0x00000fff),
   9820 			ptr + 12);
   9821 	}
   9822     }
   9823 
   9824   /* Fill in the entry in the .rel(a).(i)plt section.  */
   9825   rel.r_offset = got_address;
   9826   rel.r_addend = 0;
   9827   if (dynindx == -1)
   9828     {
   9829       /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
   9830 	 The dynamic linker or static executable then calls SYM_VALUE
   9831 	 to determine the correct run-time value of the .igot.plt entry.  */
   9832       rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
   9833       initial_got_entry = sym_value;
   9834     }
   9835   else
   9836     {
   9837       /* For FDPIC we will have to resolve a R_ARM_FUNCDESC_VALUE
   9838 	 used by PLT entry.  */
   9839       if (htab->fdpic_p)
   9840 	{
   9841 	  rel.r_info = ELF32_R_INFO (dynindx, R_ARM_FUNCDESC_VALUE);
   9842 	  initial_got_entry = 0;
   9843 	}
   9844       else
   9845 	{
   9846 	  rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
   9847 	  initial_got_entry = (splt->output_section->vma
   9848 			       + splt->output_offset);
   9849 
   9850 	  /* PR ld/16017
   9851 	     When thumb only we need to set the LSB for any address that
   9852 	     will be used with an interworking branch instruction.  */
   9853 	  if (using_thumb_only (htab))
   9854 	    initial_got_entry |= 1;
   9855 	}
   9856     }
   9857 
   9858   /* Fill in the entry in the global offset table.  */
   9859   bfd_put_32 (output_bfd, initial_got_entry,
   9860 	      sgot->contents + got_offset);
   9861 
   9862   if (htab->fdpic_p && !(info->flags & DF_BIND_NOW))
   9863     {
   9864       /* Setup initial funcdesc value.  */
   9865       /* FIXME: we don't support lazy binding because there is a
   9866 	 race condition between both words getting written and
   9867 	 some other thread attempting to read them. The ARM
   9868 	 architecture does not have an atomic 64 bit load/store
   9869 	 instruction that could be used to prevent it; it is
   9870 	 recommended that threaded FDPIC applications run with the
   9871 	 LD_BIND_NOW environment variable set.  */
   9872       bfd_put_32 (output_bfd, plt_address + 0x18,
   9873 		  sgot->contents + got_offset);
   9874       bfd_put_32 (output_bfd, -1 /*TODO*/,
   9875 		  sgot->contents + got_offset + 4);
   9876     }
   9877 
   9878   if (dynindx == -1)
   9879     elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
   9880   else
   9881     {
   9882       if (htab->fdpic_p)
   9883 	{
   9884 	  /* For FDPIC we put PLT relocationss into .rel.got when not
   9885 	     lazy binding otherwise we put them in .rel.plt.  For now,
   9886 	     we don't support lazy binding so put it in .rel.got.  */
   9887 	  if (info->flags & DF_BIND_NOW)
   9888 	    elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelgot, &rel);
   9889 	  else
   9890 	    elf32_arm_add_dynreloc (output_bfd, info, htab->root.srelplt, &rel);
   9891 	}
   9892       else
   9893 	{
   9894 	  loc = srel->contents + plt_index * RELOC_SIZE (htab);
   9895 	  SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
   9896 	}
   9897     }
   9898 
   9899   return true;
   9900 }
   9901 
   9902 /* Some relocations map to different relocations depending on the
   9903    target.  Return the real relocation.  */
   9904 
   9905 static int
   9906 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
   9907 		     int r_type)
   9908 {
   9909   switch (r_type)
   9910     {
   9911     case R_ARM_TARGET1:
   9912       if (globals->target1_is_rel)
   9913 	return R_ARM_REL32;
   9914       else
   9915 	return R_ARM_ABS32;
   9916 
   9917     case R_ARM_TARGET2:
   9918       return globals->target2_reloc;
   9919 
   9920     default:
   9921       return r_type;
   9922     }
   9923 }
   9924 
   9925 /* Return the base VMA address which should be subtracted from real addresses
   9926    when resolving @dtpoff relocation.
   9927    This is PT_TLS segment p_vaddr.  */
   9928 
   9929 static bfd_vma
   9930 dtpoff_base (struct bfd_link_info *info)
   9931 {
   9932   /* If tls_sec is NULL, we should have signalled an error already.  */
   9933   if (elf_hash_table (info)->tls_sec == NULL)
   9934     return 0;
   9935   return elf_hash_table (info)->tls_sec->vma;
   9936 }
   9937 
   9938 /* Return the relocation value for @tpoff relocation
   9939    if STT_TLS virtual address is ADDRESS.  */
   9940 
   9941 static bfd_vma
   9942 tpoff (struct bfd_link_info *info, bfd_vma address)
   9943 {
   9944   struct elf_link_hash_table *htab = elf_hash_table (info);
   9945   bfd_vma base;
   9946 
   9947   /* If tls_sec is NULL, we should have signalled an error already.  */
   9948   if (htab->tls_sec == NULL)
   9949     return 0;
   9950   base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
   9951   return address - htab->tls_sec->vma + base;
   9952 }
   9953 
   9954 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
   9955    VALUE is the relocation value.  */
   9956 
   9957 static bfd_reloc_status_type
   9958 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
   9959 {
   9960   if (value > 0xfff)
   9961     return bfd_reloc_overflow;
   9962 
   9963   value |= bfd_get_32 (abfd, data) & 0xfffff000;
   9964   bfd_put_32 (abfd, value, data);
   9965   return bfd_reloc_ok;
   9966 }
   9967 
   9968 /* Handle TLS relaxations.  Relaxing is possible for symbols that use
   9969    R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
   9970    R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
   9971 
   9972    Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
   9973    is to then call final_link_relocate.  Return other values in the
   9974    case of error.
   9975 
   9976    FIXME:When --emit-relocs is in effect, we'll emit relocs describing
   9977    the pre-relaxed code.  It would be nice if the relocs were updated
   9978    to match the optimization.   */
   9979 
   9980 static bfd_reloc_status_type
   9981 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
   9982 		     bfd *input_bfd, asection *input_sec, bfd_byte *contents,
   9983 		     Elf_Internal_Rela *rel, unsigned long is_local)
   9984 {
   9985   unsigned long insn;
   9986 
   9987   switch (ELF32_R_TYPE (rel->r_info))
   9988     {
   9989     default:
   9990       return bfd_reloc_notsupported;
   9991 
   9992     case R_ARM_TLS_GOTDESC:
   9993       if (is_local)
   9994 	insn = 0;
   9995       else
   9996 	{
   9997 	  insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
   9998 	  if (insn & 1)
   9999 	    insn -= 5; /* THUMB */
   10000 	  else
   10001 	    insn -= 8; /* ARM */
   10002 	}
   10003       bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
   10004       return bfd_reloc_continue;
   10005 
   10006     case R_ARM_THM_TLS_DESCSEQ:
   10007       /* Thumb insn.  */
   10008       insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
   10009       if ((insn & 0xff78) == 0x4478)	  /* add rx, pc */
   10010 	{
   10011 	  if (is_local)
   10012 	    /* nop */
   10013 	    bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
   10014 	}
   10015       else if ((insn & 0xffc0) == 0x6840)  /* ldr rx,[ry,#4] */
   10016 	{
   10017 	  if (is_local)
   10018 	    /* nop */
   10019 	    bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
   10020 	  else
   10021 	    /* ldr rx,[ry] */
   10022 	    bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
   10023 	}
   10024       else if ((insn & 0xff87) == 0x4780)  /* blx rx */
   10025 	{
   10026 	  if (is_local)
   10027 	    /* nop */
   10028 	    bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
   10029 	  else
   10030 	    /* mov r0, rx */
   10031 	    bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
   10032 			contents + rel->r_offset);
   10033 	}
   10034       else
   10035 	{
   10036 	  if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
   10037 	    /* It's a 32 bit instruction, fetch the rest of it for
   10038 	       error generation.  */
   10039 	    insn = (insn << 16)
   10040 	      | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
   10041 	  _bfd_error_handler
   10042 	    /* xgettext:c-format */
   10043 	    (_("%pB(%pA+%#" PRIx64 "): "
   10044 	       "unexpected %s instruction '%#lx' in TLS trampoline"),
   10045 	     input_bfd, input_sec, (uint64_t) rel->r_offset,
   10046 	     "Thumb", insn);
   10047 	  return bfd_reloc_notsupported;
   10048 	}
   10049       break;
   10050 
   10051     case R_ARM_TLS_DESCSEQ:
   10052       /* arm insn.  */
   10053       insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
   10054       if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
   10055 	{
   10056 	  if (is_local)
   10057 	    /* mov rx, ry */
   10058 	    bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
   10059 			contents + rel->r_offset);
   10060 	}
   10061       else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
   10062 	{
   10063 	  if (is_local)
   10064 	    /* nop */
   10065 	    bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
   10066 	  else
   10067 	    /* ldr rx,[ry] */
   10068 	    bfd_put_32 (input_bfd, insn & 0xfffff000,
   10069 			contents + rel->r_offset);
   10070 	}
   10071       else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
   10072 	{
   10073 	  if (is_local)
   10074 	    /* nop */
   10075 	    bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
   10076 	  else
   10077 	    /* mov r0, rx */
   10078 	    bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
   10079 			contents + rel->r_offset);
   10080 	}
   10081       else
   10082 	{
   10083 	  _bfd_error_handler
   10084 	    /* xgettext:c-format */
   10085 	    (_("%pB(%pA+%#" PRIx64 "): "
   10086 	       "unexpected %s instruction '%#lx' in TLS trampoline"),
   10087 	     input_bfd, input_sec, (uint64_t) rel->r_offset,
   10088 	     "ARM", insn);
   10089 	  return bfd_reloc_notsupported;
   10090 	}
   10091       break;
   10092 
   10093     case R_ARM_TLS_CALL:
   10094       /* GD->IE relaxation, turn the instruction into 'nop' or
   10095 	 'ldr r0, [pc,r0]'  */
   10096       insn = is_local ? 0xe1a00000 : 0xe79f0000;
   10097       bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
   10098       break;
   10099 
   10100     case R_ARM_THM_TLS_CALL:
   10101       /* GD->IE relaxation.  */
   10102       if (!is_local)
   10103 	/* add r0,pc; ldr r0, [r0]  */
   10104 	insn = 0x44786800;
   10105       else if (using_thumb2 (globals))
   10106 	/* nop.w */
   10107 	insn = 0xf3af8000;
   10108       else
   10109 	/* nop; nop */
   10110 	insn = 0xbf00bf00;
   10111 
   10112       bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
   10113       bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
   10114       break;
   10115     }
   10116   return bfd_reloc_ok;
   10117 }
   10118 
   10119 /* For a given value of n, calculate the value of G_n as required to
   10120    deal with group relocations.  We return it in the form of an
   10121    encoded constant-and-rotation, together with the final residual.  If n is
   10122    specified as less than zero, then final_residual is filled with the
   10123    input value and no further action is performed.  */
   10124 
   10125 static bfd_vma
   10126 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
   10127 {
   10128   int current_n;
   10129   bfd_vma g_n;
   10130   bfd_vma encoded_g_n = 0;
   10131   bfd_vma residual = value; /* Also known as Y_n.  */
   10132 
   10133   for (current_n = 0; current_n <= n; current_n++)
   10134     {
   10135       int shift;
   10136 
   10137       /* Calculate which part of the value to mask.  */
   10138       if (residual == 0)
   10139 	shift = 0;
   10140       else
   10141 	{
   10142 	  int msb;
   10143 
   10144 	  /* Determine the most significant bit in the residual and
   10145 	     align the resulting value to a 2-bit boundary.  */
   10146 	  for (msb = 30; msb >= 0; msb -= 2)
   10147 	    if (residual & (3u << msb))
   10148 	      break;
   10149 
   10150 	  /* The desired shift is now (msb - 6), or zero, whichever
   10151 	     is the greater.  */
   10152 	  shift = msb - 6;
   10153 	  if (shift < 0)
   10154 	    shift = 0;
   10155 	}
   10156 
   10157       /* Calculate g_n in 32-bit as well as encoded constant+rotation form.  */
   10158       g_n = residual & (0xff << shift);
   10159       encoded_g_n = (g_n >> shift)
   10160 		    | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
   10161 
   10162       /* Calculate the residual for the next time around.  */
   10163       residual &= ~g_n;
   10164     }
   10165 
   10166   *final_residual = residual;
   10167 
   10168   return encoded_g_n;
   10169 }
   10170 
   10171 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
   10172    Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise.  */
   10173 
   10174 static int
   10175 identify_add_or_sub (bfd_vma insn)
   10176 {
   10177   int opcode = insn & 0x1e00000;
   10178 
   10179   if (opcode == 1 << 23) /* ADD */
   10180     return 1;
   10181 
   10182   if (opcode == 1 << 22) /* SUB */
   10183     return -1;
   10184 
   10185   return 0;
   10186 }
   10187 
   10188 /* Perform a relocation as part of a final link.  */
   10189 
   10190 static bfd_reloc_status_type
   10191 elf32_arm_final_link_relocate (reloc_howto_type *	    howto,
   10192 			       bfd *			    input_bfd,
   10193 			       bfd *			    output_bfd,
   10194 			       asection *		    input_section,
   10195 			       bfd_byte *		    contents,
   10196 			       Elf_Internal_Rela *	    rel,
   10197 			       bfd_vma			    value,
   10198 			       struct bfd_link_info *	    info,
   10199 			       asection *		    sym_sec,
   10200 			       const char *		    sym_name,
   10201 			       unsigned char		    st_type,
   10202 			       enum arm_st_branch_type	    branch_type,
   10203 			       struct elf_link_hash_entry * h,
   10204 			       bool *			    unresolved_reloc_p,
   10205 			       char **			    error_message)
   10206 {
   10207   unsigned long			r_type = howto->type;
   10208   unsigned long			r_symndx;
   10209   bfd_byte *			hit_data = contents + rel->r_offset;
   10210   bfd_vma *			local_got_offsets;
   10211   bfd_vma *			local_tlsdesc_gotents;
   10212   asection *			sgot;
   10213   asection *			splt;
   10214   asection *			sreloc = NULL;
   10215   asection *			srelgot;
   10216   bfd_vma			addend;
   10217   bfd_signed_vma		signed_addend;
   10218   unsigned char			dynreloc_st_type;
   10219   bfd_vma			dynreloc_value;
   10220   struct elf32_arm_link_hash_table * globals;
   10221   struct elf32_arm_link_hash_entry *eh;
   10222   union gotplt_union	       *root_plt;
   10223   struct arm_plt_info	       *arm_plt;
   10224   bfd_vma			plt_offset;
   10225   bfd_vma			gotplt_offset;
   10226   bool				has_iplt_entry;
   10227   bool				resolved_to_zero;
   10228 
   10229   globals = elf32_arm_hash_table (info);
   10230   if (globals == NULL)
   10231     return bfd_reloc_notsupported;
   10232 
   10233   BFD_ASSERT (is_arm_elf (input_bfd));
   10234   BFD_ASSERT (howto != NULL);
   10235 
   10236   /* Some relocation types map to different relocations depending on the
   10237      target.  We pick the right one here.  */
   10238   r_type = arm_real_reloc_type (globals, r_type);
   10239 
   10240   /* It is possible to have linker relaxations on some TLS access
   10241      models.  Update our information here.  */
   10242   r_type = elf32_arm_tls_transition (info, r_type, h);
   10243 
   10244   if (r_type != howto->type)
   10245     howto = elf32_arm_howto_from_type (r_type);
   10246 
   10247   eh = (struct elf32_arm_link_hash_entry *) h;
   10248   sgot = globals->root.sgot;
   10249   local_got_offsets = elf_local_got_offsets (input_bfd);
   10250   local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
   10251 
   10252   if (globals->root.dynamic_sections_created)
   10253     srelgot = globals->root.srelgot;
   10254   else
   10255     srelgot = NULL;
   10256 
   10257   r_symndx = ELF32_R_SYM (rel->r_info);
   10258 
   10259   if (globals->use_rel)
   10260     {
   10261       bfd_vma sign;
   10262 
   10263       switch (bfd_get_reloc_size (howto))
   10264 	{
   10265 	case 1: addend = bfd_get_8 (input_bfd, hit_data); break;
   10266 	case 2: addend = bfd_get_16 (input_bfd, hit_data); break;
   10267 	case 4: addend = bfd_get_32 (input_bfd, hit_data); break;
   10268 	default: addend = 0; break;
   10269 	}
   10270       /* Note: the addend and signed_addend calculated here are
   10271 	 incorrect for any split field.  */
   10272       addend &= howto->src_mask;
   10273       sign = howto->src_mask & ~(howto->src_mask >> 1);
   10274       signed_addend = (addend ^ sign) - sign;
   10275       signed_addend = (bfd_vma) signed_addend << howto->rightshift;
   10276       addend <<= howto->rightshift;
   10277     }
   10278   else
   10279     addend = signed_addend = rel->r_addend;
   10280 
   10281   /* Record the symbol information that should be used in dynamic
   10282      relocations.  */
   10283   dynreloc_st_type = st_type;
   10284   dynreloc_value = value;
   10285   if (branch_type == ST_BRANCH_TO_THUMB)
   10286     dynreloc_value |= 1;
   10287 
   10288   /* Find out whether the symbol has a PLT.  Set ST_VALUE, BRANCH_TYPE and
   10289      VALUE appropriately for relocations that we resolve at link time.  */
   10290   has_iplt_entry = false;
   10291   if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
   10292 			      &arm_plt)
   10293       && root_plt->offset != (bfd_vma) -1)
   10294     {
   10295       plt_offset = root_plt->offset;
   10296       gotplt_offset = arm_plt->got_offset;
   10297 
   10298       if (h == NULL || eh->is_iplt)
   10299 	{
   10300 	  has_iplt_entry = true;
   10301 	  splt = globals->root.iplt;
   10302 
   10303 	  /* Populate .iplt entries here, because not all of them will
   10304 	     be seen by finish_dynamic_symbol.  The lower bit is set if
   10305 	     we have already populated the entry.  */
   10306 	  if (plt_offset & 1)
   10307 	    plt_offset--;
   10308 	  else
   10309 	    {
   10310 	      if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
   10311 						-1, dynreloc_value))
   10312 		root_plt->offset |= 1;
   10313 	      else
   10314 		return bfd_reloc_notsupported;
   10315 	    }
   10316 
   10317 	  /* Static relocations always resolve to the .iplt entry.  */
   10318 	  st_type = STT_FUNC;
   10319 	  value = (splt->output_section->vma
   10320 		   + splt->output_offset
   10321 		   + plt_offset);
   10322 	  branch_type = ST_BRANCH_TO_ARM;
   10323 
   10324 	  /* If there are non-call relocations that resolve to the .iplt
   10325 	     entry, then all dynamic ones must too.  */
   10326 	  if (arm_plt->noncall_refcount != 0)
   10327 	    {
   10328 	      dynreloc_st_type = st_type;
   10329 	      dynreloc_value = value;
   10330 	    }
   10331 	}
   10332       else
   10333 	/* We populate the .plt entry in finish_dynamic_symbol.  */
   10334 	splt = globals->root.splt;
   10335     }
   10336   else
   10337     {
   10338       splt = NULL;
   10339       plt_offset = (bfd_vma) -1;
   10340       gotplt_offset = (bfd_vma) -1;
   10341     }
   10342 
   10343   /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we are
   10344      resolving a function call relocation.  We want to inform the user
   10345      that something is wrong.  */
   10346   if (using_thumb_only (globals)
   10347       && (r_type == R_ARM_THM_CALL
   10348 	  || r_type == R_ARM_THM_JUMP24)
   10349       && branch_type == ST_BRANCH_TO_ARM
   10350       /* Calls through a PLT are special: the assembly source code
   10351 	 cannot be annotated with '.type foo(PLT), %function', and
   10352 	 they handled specifically below anyway. */
   10353       && splt == NULL)
   10354     {
   10355       if (sym_sec == bfd_abs_section_ptr)
   10356 	{
   10357 	/* As an exception, assume that absolute symbols are of the
   10358 	   right kind (Thumb).  They are presumably defined in the
   10359 	   linker script, where it is not possible to declare them as
   10360 	   Thumb (and thus are seen as Arm mode). Inform the user with
   10361 	   a warning, though. */
   10362 	  branch_type = ST_BRANCH_TO_THUMB;
   10363 
   10364 	  if (sym_sec->owner)
   10365 	    _bfd_error_handler
   10366 	      (_("warning: %pB(%s): Forcing bramch to absolute symbol in Thumb mode (Thumb-only CPU)"
   10367 		 " in %pB"),
   10368 	       sym_sec->owner, sym_name, input_bfd);
   10369 	  else
   10370 	    _bfd_error_handler
   10371 	      (_("warning: (%s): Forcing branch to absolute symbol in Thumb mode (Thumb-only CPU)"
   10372 		 " in %pB"),
   10373 	       sym_name, input_bfd);
   10374 	}
   10375       else
   10376 	/* Otherwise do not silently build a stub, and let the users
   10377 	   know they have to fix their code.  Indeed, we could decide
   10378 	   to insert a stub involving Arm code and/or BLX, leading to
   10379 	   a run-time crash.  */
   10380 	branch_type = ST_BRANCH_UNKNOWN;
   10381     }
   10382 
   10383   /* Fail early if branch_type is ST_BRANCH_UNKNOWN and we target a
   10384      Thumb-only CPU.  We could emit a warning on Arm-capable targets
   10385      too, but that would be too verbose (a lot of legacy code does not
   10386      use the .type foo, %function directive).  */
   10387   if (using_thumb_only (globals)
   10388       && (r_type == R_ARM_THM_CALL
   10389 	  || r_type == R_ARM_THM_JUMP24)
   10390       && branch_type == ST_BRANCH_UNKNOWN
   10391       /* Exception to the rule above: a branch to an undefined weak
   10392 	 symbol is turned into a jump to the next instruction unless a
   10393 	 PLT entry will be created (see below).  */
   10394       && !(h && h->root.type == bfd_link_hash_undefweak
   10395 	   && plt_offset == (bfd_vma) -1))
   10396     {
   10397       if (sym_sec != NULL
   10398 	  && sym_sec->owner != NULL)
   10399 	_bfd_error_handler
   10400 	  (_("%pB(%s): Unknown destination type (ARM/Thumb) in %pB"),
   10401 	   sym_sec->owner, sym_name, input_bfd);
   10402       else
   10403 	_bfd_error_handler
   10404 	  (_("(%s): Unknown destination type (ARM/Thumb) in %pB"),
   10405 	   sym_name, input_bfd);
   10406 
   10407       return bfd_reloc_notsupported;
   10408     }
   10409 
   10410   resolved_to_zero = (h != NULL
   10411 		      && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h));
   10412 
   10413   switch (r_type)
   10414     {
   10415     case R_ARM_NONE:
   10416       /* We don't need to find a value for this symbol.  It's just a
   10417 	 marker.  */
   10418       *unresolved_reloc_p = false;
   10419       return bfd_reloc_ok;
   10420 
   10421     case R_ARM_ABS12:
   10422       if (globals->root.target_os != is_vxworks)
   10423 	return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
   10424       /* Fall through.  */
   10425 
   10426     case R_ARM_PC24:
   10427     case R_ARM_ABS32:
   10428     case R_ARM_ABS32_NOI:
   10429     case R_ARM_REL32:
   10430     case R_ARM_REL32_NOI:
   10431     case R_ARM_CALL:
   10432     case R_ARM_JUMP24:
   10433     case R_ARM_XPC25:
   10434     case R_ARM_PREL31:
   10435     case R_ARM_PLT32:
   10436       /* Handle relocations which should use the PLT entry.  ABS32/REL32
   10437 	 will use the symbol's value, which may point to a PLT entry, but we
   10438 	 don't need to handle that here.  If we created a PLT entry, all
   10439 	 branches in this object should go to it, except if the PLT is too
   10440 	 far away, in which case a long branch stub should be inserted.  */
   10441       if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
   10442 	   && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
   10443 	   && r_type != R_ARM_CALL
   10444 	   && r_type != R_ARM_JUMP24
   10445 	   && r_type != R_ARM_PLT32)
   10446 	  && plt_offset != (bfd_vma) -1)
   10447 	{
   10448 	  /* If we've created a .plt section, and assigned a PLT entry
   10449 	     to this function, it must either be a STT_GNU_IFUNC reference
   10450 	     or not be known to bind locally.  In other cases, we should
   10451 	     have cleared the PLT entry by now.  */
   10452 	  BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
   10453 
   10454 	  value = (splt->output_section->vma
   10455 		   + splt->output_offset
   10456 		   + plt_offset);
   10457 	  *unresolved_reloc_p = false;
   10458 	  return _bfd_final_link_relocate (howto, input_bfd, input_section,
   10459 					   contents, rel->r_offset, value,
   10460 					   rel->r_addend);
   10461 	}
   10462 
   10463       /* When generating a shared library or PIE, these relocations
   10464 	 are copied into the output file to be resolved at run time.  */
   10465       if ((bfd_link_pic (info)
   10466 	   || globals->fdpic_p)
   10467 	  && (input_section->flags & SEC_ALLOC)
   10468 	  && !(globals->root.target_os == is_vxworks
   10469 	       && strcmp (input_section->output_section->name,
   10470 			  ".tls_vars") == 0)
   10471 	  && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
   10472 	      || !SYMBOL_CALLS_LOCAL (info, h))
   10473 	  && !(input_bfd == globals->stub_bfd
   10474 	       && strstr (input_section->name, STUB_SUFFIX))
   10475 	  && (h == NULL
   10476 	      || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
   10477 		  && !resolved_to_zero)
   10478 	      || h->root.type != bfd_link_hash_undefweak)
   10479 	  && r_type != R_ARM_PC24
   10480 	  && r_type != R_ARM_CALL
   10481 	  && r_type != R_ARM_JUMP24
   10482 	  && r_type != R_ARM_PREL31
   10483 	  && r_type != R_ARM_PLT32)
   10484 	{
   10485 	  Elf_Internal_Rela outrel;
   10486 	  bool skip, relocate;
   10487 	  int isrofixup = 0;
   10488 
   10489 	  if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
   10490 	      && !h->def_regular)
   10491 	    {
   10492 	      char *v = _("shared object");
   10493 
   10494 	      if (bfd_link_executable (info))
   10495 		v = _("PIE executable");
   10496 
   10497 	      _bfd_error_handler
   10498 		(_("%pB: relocation %s against external or undefined symbol `%s'"
   10499 		   " can not be used when making a %s; recompile with -fPIC"), input_bfd,
   10500 		 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
   10501 	      return bfd_reloc_notsupported;
   10502 	    }
   10503 
   10504 	  *unresolved_reloc_p = false;
   10505 
   10506 	  if (sreloc == NULL && globals->root.dynamic_sections_created)
   10507 	    {
   10508 	      sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
   10509 							   ! globals->use_rel);
   10510 
   10511 	      if (sreloc == NULL)
   10512 		return bfd_reloc_notsupported;
   10513 	    }
   10514 
   10515 	  skip = false;
   10516 	  relocate = false;
   10517 
   10518 	  outrel.r_addend = addend;
   10519 	  outrel.r_offset =
   10520 	    _bfd_elf_section_offset (output_bfd, info, input_section,
   10521 				     rel->r_offset);
   10522 	  if (outrel.r_offset == (bfd_vma) -1)
   10523 	    skip = true;
   10524 	  else if (outrel.r_offset == (bfd_vma) -2)
   10525 	    skip = true, relocate = true;
   10526 	  outrel.r_offset += (input_section->output_section->vma
   10527 			      + input_section->output_offset);
   10528 
   10529 	  if (skip)
   10530 	    memset (&outrel, 0, sizeof outrel);
   10531 	  else if (h != NULL
   10532 		   && h->dynindx != -1
   10533 		   && (!bfd_link_pic (info)
   10534 		       || !(bfd_link_pie (info)
   10535 			    || SYMBOLIC_BIND (info, h))
   10536 		       || !h->def_regular))
   10537 	    outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
   10538 	  else
   10539 	    {
   10540 	      int symbol;
   10541 
   10542 	      /* This symbol is local, or marked to become local.  */
   10543 	      BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI
   10544 			  || (globals->fdpic_p && !bfd_link_pic (info)));
   10545 	      /* On SVR4-ish systems, the dynamic loader cannot
   10546 		 relocate the text and data segments independently,
   10547 		 so the symbol does not matter.  */
   10548 	      symbol = 0;
   10549 	      if (dynreloc_st_type == STT_GNU_IFUNC)
   10550 		/* We have an STT_GNU_IFUNC symbol that doesn't resolve
   10551 		   to the .iplt entry.  Instead, every non-call reference
   10552 		   must use an R_ARM_IRELATIVE relocation to obtain the
   10553 		   correct run-time address.  */
   10554 		outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
   10555 	      else if (globals->fdpic_p && !bfd_link_pic (info))
   10556 		isrofixup = 1;
   10557 	      else
   10558 		outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
   10559 	      if (globals->use_rel)
   10560 		relocate = true;
   10561 	      else
   10562 		outrel.r_addend += dynreloc_value;
   10563 	    }
   10564 
   10565 	  if (isrofixup)
   10566 	    arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
   10567 	  else
   10568 	    elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
   10569 
   10570 	  /* If this reloc is against an external symbol, we do not want to
   10571 	     fiddle with the addend.  Otherwise, we need to include the symbol
   10572 	     value so that it becomes an addend for the dynamic reloc.  */
   10573 	  if (! relocate)
   10574 	    return bfd_reloc_ok;
   10575 
   10576 	  return _bfd_final_link_relocate (howto, input_bfd, input_section,
   10577 					   contents, rel->r_offset,
   10578 					   dynreloc_value, (bfd_vma) 0);
   10579 	}
   10580       else switch (r_type)
   10581 	{
   10582 	case R_ARM_ABS12:
   10583 	  return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
   10584 
   10585 	case R_ARM_XPC25:	  /* Arm BLX instruction.  */
   10586 	case R_ARM_CALL:
   10587 	case R_ARM_JUMP24:
   10588 	case R_ARM_PC24:	  /* Arm B/BL instruction.  */
   10589 	case R_ARM_PLT32:
   10590 	  {
   10591 	  struct elf32_arm_stub_hash_entry *stub_entry = NULL;
   10592 
   10593 	  if (r_type == R_ARM_XPC25)
   10594 	    {
   10595 	      /* Check for Arm calling Arm function.  */
   10596 	      /* FIXME: Should we translate the instruction into a BL
   10597 		 instruction instead ?  */
   10598 	      if (branch_type != ST_BRANCH_TO_THUMB)
   10599 		_bfd_error_handler
   10600 		  (_("\%pB: warning: %s BLX instruction targets"
   10601 		     " %s function '%s'"),
   10602 		   input_bfd, "ARM",
   10603 		   "ARM", h ? h->root.root.string : "(local)");
   10604 	    }
   10605 	  else if (r_type == R_ARM_PC24)
   10606 	    {
   10607 	      /* Check for Arm calling Thumb function.  */
   10608 	      if (branch_type == ST_BRANCH_TO_THUMB)
   10609 		{
   10610 		  if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
   10611 					       output_bfd, input_section,
   10612 					       hit_data, sym_sec, rel->r_offset,
   10613 					       signed_addend, value,
   10614 					       error_message))
   10615 		    return bfd_reloc_ok;
   10616 		  else
   10617 		    return bfd_reloc_dangerous;
   10618 		}
   10619 	    }
   10620 
   10621 	  /* Check if a stub has to be inserted because the
   10622 	     destination is too far or we are changing mode.  */
   10623 	  if (   r_type == R_ARM_CALL
   10624 	      || r_type == R_ARM_JUMP24
   10625 	      || r_type == R_ARM_PLT32)
   10626 	    {
   10627 	      enum elf32_arm_stub_type stub_type = arm_stub_none;
   10628 	      struct elf32_arm_link_hash_entry *hash;
   10629 
   10630 	      hash = (struct elf32_arm_link_hash_entry *) h;
   10631 	      stub_type = arm_type_of_stub (info, input_section, rel,
   10632 					    st_type, &branch_type,
   10633 					    hash, value, sym_sec,
   10634 					    input_bfd, sym_name);
   10635 
   10636 	      if (stub_type != arm_stub_none)
   10637 		{
   10638 		  /* The target is out of reach, so redirect the
   10639 		     branch to the local stub for this function.  */
   10640 		  stub_entry = elf32_arm_get_stub_entry (input_section,
   10641 							 sym_sec, h,
   10642 							 rel, globals,
   10643 							 stub_type);
   10644 		  {
   10645 		    if (stub_entry != NULL)
   10646 		      value = (stub_entry->stub_offset
   10647 			       + stub_entry->stub_sec->output_offset
   10648 			       + stub_entry->stub_sec->output_section->vma);
   10649 
   10650 		    if (plt_offset != (bfd_vma) -1)
   10651 		      *unresolved_reloc_p = false;
   10652 		  }
   10653 		}
   10654 	      else
   10655 		{
   10656 		  /* If the call goes through a PLT entry, make sure to
   10657 		     check distance to the right destination address.  */
   10658 		  if (plt_offset != (bfd_vma) -1)
   10659 		    {
   10660 		      value = (splt->output_section->vma
   10661 			       + splt->output_offset
   10662 			       + plt_offset);
   10663 		      *unresolved_reloc_p = false;
   10664 		      /* The PLT entry is in ARM mode, regardless of the
   10665 			 target function.  */
   10666 		      branch_type = ST_BRANCH_TO_ARM;
   10667 		    }
   10668 		}
   10669 	    }
   10670 
   10671 	  /* The ARM ELF ABI says that this reloc is computed as: S - P + A
   10672 	     where:
   10673 	      S is the address of the symbol in the relocation.
   10674 	      P is address of the instruction being relocated.
   10675 	      A is the addend (extracted from the instruction) in bytes.
   10676 
   10677 	     S is held in 'value'.
   10678 	     P is the base address of the section containing the
   10679 	       instruction plus the offset of the reloc into that
   10680 	       section, ie:
   10681 		 (input_section->output_section->vma +
   10682 		  input_section->output_offset +
   10683 		  rel->r_offset).
   10684 	     A is the addend, converted into bytes, ie:
   10685 		 (signed_addend * 4)
   10686 
   10687 	     Note: None of these operations have knowledge of the pipeline
   10688 	     size of the processor, thus it is up to the assembler to
   10689 	     encode this information into the addend.  */
   10690 	  value -= (input_section->output_section->vma
   10691 		    + input_section->output_offset);
   10692 	  value -= rel->r_offset;
   10693 	  value += signed_addend;
   10694 
   10695 	  signed_addend = value;
   10696 	  signed_addend >>= howto->rightshift;
   10697 
   10698 	  /* A branch to an undefined weak symbol is turned into a jump to
   10699 	     the next instruction unless a PLT entry will be created.
   10700 	     Do the same for local undefined symbols (but not for STN_UNDEF).
   10701 	     The jump to the next instruction is optimized as a NOP depending
   10702 	     on the architecture.  */
   10703 	  if (h ? (h->root.type == bfd_link_hash_undefweak
   10704 		   && plt_offset == (bfd_vma) -1)
   10705 	      : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
   10706 	    {
   10707 	      value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
   10708 
   10709 	      if (arch_has_arm_nop (globals))
   10710 		value |= 0x0320f000;
   10711 	      else
   10712 		value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0.  */
   10713 	    }
   10714 	  else
   10715 	    {
   10716 	      /* Perform a signed range check.  */
   10717 	      if (   signed_addend >   ((bfd_signed_vma)  (howto->dst_mask >> 1))
   10718 		  || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
   10719 		return bfd_reloc_overflow;
   10720 
   10721 	      addend = (value & 2);
   10722 
   10723 	      value = (signed_addend & howto->dst_mask)
   10724 		| (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
   10725 
   10726 	      if (r_type == R_ARM_CALL)
   10727 		{
   10728 		  /* Set the H bit in the BLX instruction.  */
   10729 		  if (branch_type == ST_BRANCH_TO_THUMB)
   10730 		    {
   10731 		      if (addend)
   10732 			value |= (1 << 24);
   10733 		      else
   10734 			value &= ~(bfd_vma)(1 << 24);
   10735 		    }
   10736 
   10737 		  /* Select the correct instruction (BL or BLX).  */
   10738 		  /* Only if we are not handling a BL to a stub. In this
   10739 		     case, mode switching is performed by the stub.  */
   10740 		  if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
   10741 		    value |= (1 << 28);
   10742 		  else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
   10743 		    {
   10744 		      value &= ~(bfd_vma)(1 << 28);
   10745 		      value |= (1 << 24);
   10746 		    }
   10747 		}
   10748 	    }
   10749 	  }
   10750 	  break;
   10751 
   10752 	case R_ARM_ABS32:
   10753 	  value += addend;
   10754 	  if (branch_type == ST_BRANCH_TO_THUMB)
   10755 	    value |= 1;
   10756 	  break;
   10757 
   10758 	case R_ARM_ABS32_NOI:
   10759 	  value += addend;
   10760 	  break;
   10761 
   10762 	case R_ARM_REL32:
   10763 	  value += addend;
   10764 	  if (branch_type == ST_BRANCH_TO_THUMB)
   10765 	    value |= 1;
   10766 	  value -= (input_section->output_section->vma
   10767 		    + input_section->output_offset + rel->r_offset);
   10768 	  break;
   10769 
   10770 	case R_ARM_REL32_NOI:
   10771 	  value += addend;
   10772 	  value -= (input_section->output_section->vma
   10773 		    + input_section->output_offset + rel->r_offset);
   10774 	  break;
   10775 
   10776 	case R_ARM_PREL31:
   10777 	  value -= (input_section->output_section->vma
   10778 		    + input_section->output_offset + rel->r_offset);
   10779 	  value += signed_addend;
   10780 	  if (! h || h->root.type != bfd_link_hash_undefweak)
   10781 	    {
   10782 	      /* Check for overflow.  */
   10783 	      if ((value ^ (value >> 1)) & (1 << 30))
   10784 		return bfd_reloc_overflow;
   10785 	    }
   10786 	  value &= 0x7fffffff;
   10787 	  value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
   10788 	  if (branch_type == ST_BRANCH_TO_THUMB)
   10789 	    value |= 1;
   10790 	  break;
   10791 	}
   10792 
   10793       bfd_put_32 (input_bfd, value, hit_data);
   10794       return bfd_reloc_ok;
   10795 
   10796     case R_ARM_ABS8:
   10797       value += addend;
   10798 
   10799       /* There is no way to tell whether the user intended to use a signed or
   10800 	 unsigned addend.  When checking for overflow we accept either,
   10801 	 as specified by the AAELF.  */
   10802       if ((long) value > 0xff || (long) value < -0x80)
   10803 	return bfd_reloc_overflow;
   10804 
   10805       bfd_put_8 (input_bfd, value, hit_data);
   10806       return bfd_reloc_ok;
   10807 
   10808     case R_ARM_ABS16:
   10809       value += addend;
   10810 
   10811       /* See comment for R_ARM_ABS8.  */
   10812       if ((long) value > 0xffff || (long) value < -0x8000)
   10813 	return bfd_reloc_overflow;
   10814 
   10815       bfd_put_16 (input_bfd, value, hit_data);
   10816       return bfd_reloc_ok;
   10817 
   10818     case R_ARM_THM_ABS5:
   10819       /* Support ldr and str instructions for the thumb.  */
   10820       if (globals->use_rel)
   10821 	{
   10822 	  /* Need to refetch addend.  */
   10823 	  addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
   10824 	  /* ??? Need to determine shift amount from operand size.  */
   10825 	  addend >>= howto->rightshift;
   10826 	}
   10827       value += addend;
   10828 
   10829       /* ??? Isn't value unsigned?  */
   10830       if ((long) value > 0x1f || (long) value < -0x10)
   10831 	return bfd_reloc_overflow;
   10832 
   10833       /* ??? Value needs to be properly shifted into place first.  */
   10834       value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
   10835       bfd_put_16 (input_bfd, value, hit_data);
   10836       return bfd_reloc_ok;
   10837 
   10838     case R_ARM_THM_ALU_PREL_11_0:
   10839       /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw).  */
   10840       {
   10841 	bfd_vma insn;
   10842 	bfd_signed_vma relocation;
   10843 
   10844 	insn = (bfd_get_16 (input_bfd, hit_data) << 16)
   10845 	     | bfd_get_16 (input_bfd, hit_data + 2);
   10846 
   10847 	if (globals->use_rel)
   10848 	  {
   10849 	    signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
   10850 			  | ((insn & (1 << 26)) >> 15);
   10851 	    if (insn & 0xf00000)
   10852 	      signed_addend = -signed_addend;
   10853 	  }
   10854 
   10855 	relocation = value + signed_addend;
   10856 	relocation -= Pa (input_section->output_section->vma
   10857 			  + input_section->output_offset
   10858 			  + rel->r_offset);
   10859 
   10860 	/* PR 21523: Use an absolute value.  The user of this reloc will
   10861 	   have already selected an ADD or SUB insn appropriately.  */
   10862 	value = llabs (relocation);
   10863 
   10864 	if (value >= 0x1000)
   10865 	  return bfd_reloc_overflow;
   10866 
   10867 	/* Destination is Thumb.  Force bit 0 to 1 to reflect this.  */
   10868 	if (branch_type == ST_BRANCH_TO_THUMB)
   10869 	  value |= 1;
   10870 
   10871 	insn = (insn & 0xfb0f8f00) | (value & 0xff)
   10872 	     | ((value & 0x700) << 4)
   10873 	     | ((value & 0x800) << 15);
   10874 	if (relocation < 0)
   10875 	  insn |= 0xa00000;
   10876 
   10877 	bfd_put_16 (input_bfd, insn >> 16, hit_data);
   10878 	bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
   10879 
   10880 	return bfd_reloc_ok;
   10881       }
   10882 
   10883     case R_ARM_THM_PC8:
   10884       /* PR 10073:  This reloc is not generated by the GNU toolchain,
   10885 	 but it is supported for compatibility with third party libraries
   10886 	 generated by other compilers, specifically the ARM/IAR.  */
   10887       {
   10888 	bfd_vma insn;
   10889 	bfd_signed_vma relocation;
   10890 
   10891 	insn = bfd_get_16 (input_bfd, hit_data);
   10892 
   10893 	if (globals->use_rel)
   10894 	  addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
   10895 
   10896 	relocation = value + addend;
   10897 	relocation -= Pa (input_section->output_section->vma
   10898 			  + input_section->output_offset
   10899 			  + rel->r_offset);
   10900 
   10901 	value = relocation;
   10902 
   10903 	/* We do not check for overflow of this reloc.  Although strictly
   10904 	   speaking this is incorrect, it appears to be necessary in order
   10905 	   to work with IAR generated relocs.  Since GCC and GAS do not
   10906 	   generate R_ARM_THM_PC8 relocs, the lack of a check should not be
   10907 	   a problem for them.  */
   10908 	value &= 0x3fc;
   10909 
   10910 	insn = (insn & 0xff00) | (value >> 2);
   10911 
   10912 	bfd_put_16 (input_bfd, insn, hit_data);
   10913 
   10914 	return bfd_reloc_ok;
   10915       }
   10916 
   10917     case R_ARM_THM_PC12:
   10918       /* Corresponds to: ldr.w reg, [pc, #offset].  */
   10919       {
   10920 	bfd_vma insn;
   10921 	bfd_signed_vma relocation;
   10922 
   10923 	insn = (bfd_get_16 (input_bfd, hit_data) << 16)
   10924 	     | bfd_get_16 (input_bfd, hit_data + 2);
   10925 
   10926 	if (globals->use_rel)
   10927 	  {
   10928 	    signed_addend = insn & 0xfff;
   10929 	    if (!(insn & (1 << 23)))
   10930 	      signed_addend = -signed_addend;
   10931 	  }
   10932 
   10933 	relocation = value + signed_addend;
   10934 	relocation -= Pa (input_section->output_section->vma
   10935 			  + input_section->output_offset
   10936 			  + rel->r_offset);
   10937 
   10938 	value = relocation;
   10939 
   10940 	if (value >= 0x1000)
   10941 	  return bfd_reloc_overflow;
   10942 
   10943 	insn = (insn & 0xff7ff000) | value;
   10944 	if (relocation >= 0)
   10945 	  insn |= (1 << 23);
   10946 
   10947 	bfd_put_16 (input_bfd, insn >> 16, hit_data);
   10948 	bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
   10949 
   10950 	return bfd_reloc_ok;
   10951       }
   10952 
   10953     case R_ARM_THM_XPC22:
   10954     case R_ARM_THM_CALL:
   10955     case R_ARM_THM_JUMP24:
   10956       /* Thumb BL (branch long instruction).  */
   10957       {
   10958 	bfd_vma relocation;
   10959 	bfd_vma reloc_sign;
   10960 	bool overflow = false;
   10961 	bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
   10962 	bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
   10963 	bfd_signed_vma reloc_signed_max;
   10964 	bfd_signed_vma reloc_signed_min;
   10965 	bfd_vma check;
   10966 	bfd_signed_vma signed_check;
   10967 	int bitsize;
   10968 	const int thumb2 = using_thumb2 (globals);
   10969 	const int thumb2_bl = using_thumb2_bl (globals);
   10970 
   10971 	/* A branch to an undefined weak symbol is turned into a jump to
   10972 	   the next instruction unless a PLT entry will be created.
   10973 	   The jump to the next instruction is optimized as a NOP.W for
   10974 	   Thumb-2 enabled architectures.  */
   10975 	if (h && h->root.type == bfd_link_hash_undefweak
   10976 	    && plt_offset == (bfd_vma) -1)
   10977 	  {
   10978 	    if (thumb2)
   10979 	      {
   10980 		bfd_put_16 (input_bfd, 0xf3af, hit_data);
   10981 		bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
   10982 	      }
   10983 	    else
   10984 	      {
   10985 		bfd_put_16 (input_bfd, 0xe000, hit_data);
   10986 		bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
   10987 	      }
   10988 	    return bfd_reloc_ok;
   10989 	  }
   10990 
   10991 	/* Fetch the addend.  We use the Thumb-2 encoding (backwards compatible
   10992 	   with Thumb-1) involving the J1 and J2 bits.  */
   10993 	if (globals->use_rel)
   10994 	  {
   10995 	    bfd_vma s = (upper_insn & (1 << 10)) >> 10;
   10996 	    bfd_vma upper = upper_insn & 0x3ff;
   10997 	    bfd_vma lower = lower_insn & 0x7ff;
   10998 	    bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
   10999 	    bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
   11000 	    bfd_vma i1 = j1 ^ s ? 0 : 1;
   11001 	    bfd_vma i2 = j2 ^ s ? 0 : 1;
   11002 
   11003 	    addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
   11004 	    /* Sign extend.  */
   11005 	    addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
   11006 
   11007 	    signed_addend = addend;
   11008 	  }
   11009 
   11010 	if (r_type == R_ARM_THM_XPC22)
   11011 	  {
   11012 	    /* Check for Thumb to Thumb call.  */
   11013 	    /* FIXME: Should we translate the instruction into a BL
   11014 	       instruction instead ?  */
   11015 	    if (branch_type == ST_BRANCH_TO_THUMB)
   11016 	      _bfd_error_handler
   11017 		(_("%pB: warning: %s BLX instruction targets"
   11018 		   " %s function '%s'"),
   11019 		 input_bfd, "Thumb",
   11020 		 "Thumb", h ? h->root.root.string : "(local)");
   11021 	  }
   11022 	else
   11023 	  {
   11024 	    /* If it is not a call to Thumb, assume call to Arm.
   11025 	       If it is a call relative to a section name, then it is not a
   11026 	       function call at all, but rather a long jump.  Calls through
   11027 	       the PLT do not require stubs.  */
   11028 	    if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
   11029 	      {
   11030 		if (globals->use_blx && r_type == R_ARM_THM_CALL)
   11031 		  {
   11032 		    /* Convert BL to BLX.  */
   11033 		    lower_insn = (lower_insn & ~0x1000) | 0x0800;
   11034 		  }
   11035 		else if ((   r_type != R_ARM_THM_CALL)
   11036 			 && (r_type != R_ARM_THM_JUMP24))
   11037 		  {
   11038 		    if (elf32_thumb_to_arm_stub
   11039 			(info, sym_name, input_bfd, output_bfd, input_section,
   11040 			 hit_data, sym_sec, rel->r_offset, signed_addend, value,
   11041 			 error_message))
   11042 		      return bfd_reloc_ok;
   11043 		    else
   11044 		      return bfd_reloc_dangerous;
   11045 		  }
   11046 	      }
   11047 	    else if (branch_type == ST_BRANCH_TO_THUMB
   11048 		     && globals->use_blx
   11049 		     && r_type == R_ARM_THM_CALL)
   11050 	      {
   11051 		/* Make sure this is a BL.  */
   11052 		lower_insn |= 0x1800;
   11053 	      }
   11054 	  }
   11055 
   11056 	enum elf32_arm_stub_type stub_type = arm_stub_none;
   11057 	if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
   11058 	  {
   11059 	    /* Check if a stub has to be inserted because the destination
   11060 	       is too far.  */
   11061 	    struct elf32_arm_stub_hash_entry *stub_entry;
   11062 	    struct elf32_arm_link_hash_entry *hash;
   11063 
   11064 	    hash = (struct elf32_arm_link_hash_entry *) h;
   11065 
   11066 	    stub_type = arm_type_of_stub (info, input_section, rel,
   11067 					  st_type, &branch_type,
   11068 					  hash, value, sym_sec,
   11069 					  input_bfd, sym_name);
   11070 
   11071 	    if (stub_type != arm_stub_none)
   11072 	      {
   11073 		/* The target is out of reach or we are changing modes, so
   11074 		   redirect the branch to the local stub for this
   11075 		   function.  */
   11076 		stub_entry = elf32_arm_get_stub_entry (input_section,
   11077 						       sym_sec, h,
   11078 						       rel, globals,
   11079 						       stub_type);
   11080 		if (stub_entry != NULL)
   11081 		  {
   11082 		    value = (stub_entry->stub_offset
   11083 			     + stub_entry->stub_sec->output_offset
   11084 			     + stub_entry->stub_sec->output_section->vma);
   11085 
   11086 		    if (plt_offset != (bfd_vma) -1)
   11087 		      *unresolved_reloc_p = false;
   11088 		  }
   11089 
   11090 		/* If this call becomes a call to Arm, force BLX.  */
   11091 		if (globals->use_blx && (r_type == R_ARM_THM_CALL))
   11092 		  {
   11093 		    if ((stub_entry
   11094 			 && !arm_stub_is_thumb (stub_entry->stub_type))
   11095 			|| branch_type != ST_BRANCH_TO_THUMB)
   11096 		      lower_insn = (lower_insn & ~0x1000) | 0x0800;
   11097 		  }
   11098 	      }
   11099 	  }
   11100 
   11101 	/* Handle calls via the PLT.  */
   11102 	if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
   11103 	  {
   11104 	    value = (splt->output_section->vma
   11105 		     + splt->output_offset
   11106 		     + plt_offset);
   11107 
   11108 	    if (globals->use_blx
   11109 		&& r_type == R_ARM_THM_CALL
   11110 		&& ! using_thumb_only (globals))
   11111 	      {
   11112 		/* If the Thumb BLX instruction is available, convert
   11113 		   the BL to a BLX instruction to call the ARM-mode
   11114 		   PLT entry.  */
   11115 		lower_insn = (lower_insn & ~0x1000) | 0x0800;
   11116 		branch_type = ST_BRANCH_TO_ARM;
   11117 	      }
   11118 	    else
   11119 	      {
   11120 		if (! using_thumb_only (globals))
   11121 		  /* Target the Thumb stub before the ARM PLT entry.  */
   11122 		  value -= PLT_THUMB_STUB_SIZE;
   11123 		branch_type = ST_BRANCH_TO_THUMB;
   11124 	      }
   11125 	    *unresolved_reloc_p = false;
   11126 	  }
   11127 
   11128 	relocation = value + signed_addend;
   11129 
   11130 	relocation -= (input_section->output_section->vma
   11131 		       + input_section->output_offset
   11132 		       + rel->r_offset);
   11133 
   11134 	check = relocation >> howto->rightshift;
   11135 
   11136 	/* If this is a signed value, the rightshift just dropped
   11137 	   leading 1 bits (assuming twos complement).  */
   11138 	if ((bfd_signed_vma) relocation >= 0)
   11139 	  signed_check = check;
   11140 	else
   11141 	  signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
   11142 
   11143 	/* Calculate the permissable maximum and minimum values for
   11144 	   this relocation according to whether we're relocating for
   11145 	   Thumb-2 or not.  */
   11146 	bitsize = howto->bitsize;
   11147 	if (!thumb2_bl)
   11148 	  bitsize -= 2;
   11149 	reloc_signed_max = (1 << (bitsize - 1)) - 1;
   11150 	reloc_signed_min = ~reloc_signed_max;
   11151 
   11152 	/* Assumes two's complement.  */
   11153 	if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
   11154 	  overflow = true;
   11155 
   11156 	if ((lower_insn & 0x5000) == 0x4000)
   11157 	  /* For a BLX instruction, make sure that the relocation is rounded up
   11158 	     to a word boundary.  This follows the semantics of the instruction
   11159 	     which specifies that bit 1 of the target address will come from bit
   11160 	     1 of the base address.  */
   11161 	  relocation = (relocation + 2) & ~ 3;
   11162 
   11163 	/* Put RELOCATION back into the insn.  Assumes two's complement.
   11164 	   We use the Thumb-2 encoding, which is safe even if dealing with
   11165 	   a Thumb-1 instruction by virtue of our overflow check above.  */
   11166 	reloc_sign = (signed_check < 0) ? 1 : 0;
   11167 	upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
   11168 		     | ((relocation >> 12) & 0x3ff)
   11169 		     | (reloc_sign << 10);
   11170 	lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
   11171 		     | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
   11172 		     | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
   11173 		     | ((relocation >> 1) & 0x7ff);
   11174 
   11175 	/* Put the relocated value back in the object file:  */
   11176 	bfd_put_16 (input_bfd, upper_insn, hit_data);
   11177 	bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
   11178 
   11179 	return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
   11180       }
   11181       break;
   11182 
   11183     case R_ARM_THM_JUMP19:
   11184       /* Thumb32 conditional branch instruction.  */
   11185       {
   11186 	bfd_vma relocation;
   11187 	bool overflow = false;
   11188 	bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
   11189 	bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
   11190 	bfd_signed_vma reloc_signed_max = 0xffffe;
   11191 	bfd_signed_vma reloc_signed_min = -0x100000;
   11192 	bfd_signed_vma signed_check;
   11193 	enum elf32_arm_stub_type stub_type = arm_stub_none;
   11194 	struct elf32_arm_stub_hash_entry *stub_entry;
   11195 	struct elf32_arm_link_hash_entry *hash;
   11196 
   11197 	/* Need to refetch the addend, reconstruct the top three bits,
   11198 	   and squish the two 11 bit pieces together.  */
   11199 	if (globals->use_rel)
   11200 	  {
   11201 	    bfd_vma S     = (upper_insn & 0x0400) >> 10;
   11202 	    bfd_vma upper = (upper_insn & 0x003f);
   11203 	    bfd_vma J1    = (lower_insn & 0x2000) >> 13;
   11204 	    bfd_vma J2    = (lower_insn & 0x0800) >> 11;
   11205 	    bfd_vma lower = (lower_insn & 0x07ff);
   11206 
   11207 	    upper |= J1 << 6;
   11208 	    upper |= J2 << 7;
   11209 	    upper |= (!S) << 8;
   11210 	    upper -= 0x0100; /* Sign extend.  */
   11211 
   11212 	    addend = (upper << 12) | (lower << 1);
   11213 	    signed_addend = addend;
   11214 	  }
   11215 
   11216 	/* Handle calls via the PLT.  */
   11217 	if (plt_offset != (bfd_vma) -1)
   11218 	  {
   11219 	    value = (splt->output_section->vma
   11220 		     + splt->output_offset
   11221 		     + plt_offset);
   11222 	    /* Target the Thumb stub before the ARM PLT entry.  */
   11223 	    value -= PLT_THUMB_STUB_SIZE;
   11224 	    *unresolved_reloc_p = false;
   11225 	  }
   11226 
   11227 	hash = (struct elf32_arm_link_hash_entry *)h;
   11228 
   11229 	stub_type = arm_type_of_stub (info, input_section, rel,
   11230 				      st_type, &branch_type,
   11231 				      hash, value, sym_sec,
   11232 				      input_bfd, sym_name);
   11233 	if (stub_type != arm_stub_none)
   11234 	  {
   11235 	    stub_entry = elf32_arm_get_stub_entry (input_section,
   11236 						   sym_sec, h,
   11237 						   rel, globals,
   11238 						   stub_type);
   11239 	    if (stub_entry != NULL)
   11240 	      {
   11241 		value = (stub_entry->stub_offset
   11242 			+ stub_entry->stub_sec->output_offset
   11243 			+ stub_entry->stub_sec->output_section->vma);
   11244 	      }
   11245 	  }
   11246 
   11247 	relocation = value + signed_addend;
   11248 	relocation -= (input_section->output_section->vma
   11249 		       + input_section->output_offset
   11250 		       + rel->r_offset);
   11251 	signed_check = (bfd_signed_vma) relocation;
   11252 
   11253 	if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
   11254 	  overflow = true;
   11255 
   11256 	/* Put RELOCATION back into the insn.  */
   11257 	{
   11258 	  bfd_vma S  = (relocation & 0x00100000) >> 20;
   11259 	  bfd_vma J2 = (relocation & 0x00080000) >> 19;
   11260 	  bfd_vma J1 = (relocation & 0x00040000) >> 18;
   11261 	  bfd_vma hi = (relocation & 0x0003f000) >> 12;
   11262 	  bfd_vma lo = (relocation & 0x00000ffe) >>  1;
   11263 
   11264 	  upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
   11265 	  lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
   11266 	}
   11267 
   11268 	/* Put the relocated value back in the object file:  */
   11269 	bfd_put_16 (input_bfd, upper_insn, hit_data);
   11270 	bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
   11271 
   11272 	return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
   11273       }
   11274 
   11275     case R_ARM_THM_JUMP11:
   11276     case R_ARM_THM_JUMP8:
   11277     case R_ARM_THM_JUMP6:
   11278       /* Thumb B (branch) instruction).  */
   11279       {
   11280 	bfd_signed_vma relocation;
   11281 	bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
   11282 	bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
   11283 	bfd_signed_vma signed_check;
   11284 
   11285 	/* CZB cannot jump backward.  */
   11286 	if (r_type == R_ARM_THM_JUMP6)
   11287 	  {
   11288 	    reloc_signed_min = 0;
   11289 	    if (globals->use_rel)
   11290 	      signed_addend = ((addend & 0x200) >> 3) | ((addend & 0xf8) >> 2);
   11291 	  }
   11292 
   11293 	relocation = value + signed_addend;
   11294 
   11295 	relocation -= (input_section->output_section->vma
   11296 		       + input_section->output_offset
   11297 		       + rel->r_offset);
   11298 
   11299 	relocation >>= howto->rightshift;
   11300 	signed_check = relocation;
   11301 
   11302 	if (r_type == R_ARM_THM_JUMP6)
   11303 	  relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
   11304 	else
   11305 	  relocation &= howto->dst_mask;
   11306 	relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
   11307 
   11308 	bfd_put_16 (input_bfd, relocation, hit_data);
   11309 
   11310 	/* Assumes two's complement.  */
   11311 	if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
   11312 	  return bfd_reloc_overflow;
   11313 
   11314 	return bfd_reloc_ok;
   11315       }
   11316 
   11317     case R_ARM_ALU_PCREL7_0:
   11318     case R_ARM_ALU_PCREL15_8:
   11319     case R_ARM_ALU_PCREL23_15:
   11320       {
   11321 	bfd_vma insn;
   11322 	bfd_vma relocation;
   11323 
   11324 	insn = bfd_get_32 (input_bfd, hit_data);
   11325 	if (globals->use_rel)
   11326 	  {
   11327 	    /* Extract the addend.  */
   11328 	    addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
   11329 	    signed_addend = addend;
   11330 	  }
   11331 	relocation = value + signed_addend;
   11332 
   11333 	relocation -= (input_section->output_section->vma
   11334 		       + input_section->output_offset
   11335 		       + rel->r_offset);
   11336 	insn = (insn & ~0xfff)
   11337 	       | ((howto->bitpos << 7) & 0xf00)
   11338 	       | ((relocation >> howto->bitpos) & 0xff);
   11339 	bfd_put_32 (input_bfd, value, hit_data);
   11340       }
   11341       return bfd_reloc_ok;
   11342 
   11343     case R_ARM_GNU_VTINHERIT:
   11344     case R_ARM_GNU_VTENTRY:
   11345       return bfd_reloc_ok;
   11346 
   11347     case R_ARM_GOTOFF32:
   11348       /* Relocation is relative to the start of the
   11349 	 global offset table.  */
   11350 
   11351       BFD_ASSERT (sgot != NULL);
   11352       if (sgot == NULL)
   11353 	return bfd_reloc_notsupported;
   11354 
   11355       /* If we are addressing a Thumb function, we need to adjust the
   11356 	 address by one, so that attempts to call the function pointer will
   11357 	 correctly interpret it as Thumb code.  */
   11358       if (branch_type == ST_BRANCH_TO_THUMB)
   11359 	value += 1;
   11360 
   11361       /* Note that sgot->output_offset is not involved in this
   11362 	 calculation.  We always want the start of .got.  If we
   11363 	 define _GLOBAL_OFFSET_TABLE in a different way, as is
   11364 	 permitted by the ABI, we might have to change this
   11365 	 calculation.  */
   11366       value -= sgot->output_section->vma;
   11367       return _bfd_final_link_relocate (howto, input_bfd, input_section,
   11368 				       contents, rel->r_offset, value,
   11369 				       rel->r_addend);
   11370 
   11371     case R_ARM_GOTPC:
   11372       /* Use global offset table as symbol value.  */
   11373       BFD_ASSERT (sgot != NULL);
   11374 
   11375       if (sgot == NULL)
   11376 	return bfd_reloc_notsupported;
   11377 
   11378       *unresolved_reloc_p = false;
   11379       value = sgot->output_section->vma;
   11380       return _bfd_final_link_relocate (howto, input_bfd, input_section,
   11381 				       contents, rel->r_offset, value,
   11382 				       rel->r_addend);
   11383 
   11384     case R_ARM_GOT32:
   11385     case R_ARM_GOT_PREL:
   11386       /* Relocation is to the entry for this symbol in the
   11387 	 global offset table.  */
   11388       if (sgot == NULL)
   11389 	return bfd_reloc_notsupported;
   11390 
   11391       if (dynreloc_st_type == STT_GNU_IFUNC
   11392 	  && plt_offset != (bfd_vma) -1
   11393 	  && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
   11394 	{
   11395 	  /* We have a relocation against a locally-binding STT_GNU_IFUNC
   11396 	     symbol, and the relocation resolves directly to the runtime
   11397 	     target rather than to the .iplt entry.  This means that any
   11398 	     .got entry would be the same value as the .igot.plt entry,
   11399 	     so there's no point creating both.  */
   11400 	  sgot = globals->root.igotplt;
   11401 	  value = sgot->output_offset + gotplt_offset;
   11402 	}
   11403       else if (h != NULL)
   11404 	{
   11405 	  bfd_vma off;
   11406 
   11407 	  off = h->got.offset;
   11408 	  BFD_ASSERT (off != (bfd_vma) -1);
   11409 	  if ((off & 1) != 0)
   11410 	    {
   11411 	      /* We have already processsed one GOT relocation against
   11412 		 this symbol.  */
   11413 	      off &= ~1;
   11414 	      if (globals->root.dynamic_sections_created
   11415 		  && !SYMBOL_REFERENCES_LOCAL (info, h))
   11416 		*unresolved_reloc_p = false;
   11417 	    }
   11418 	  else
   11419 	    {
   11420 	      Elf_Internal_Rela outrel;
   11421 	      int isrofixup = 0;
   11422 
   11423 	      if (((h->dynindx != -1) || globals->fdpic_p)
   11424 		  && !SYMBOL_REFERENCES_LOCAL (info, h))
   11425 		{
   11426 		  /* If the symbol doesn't resolve locally in a static
   11427 		     object, we have an undefined reference.  If the
   11428 		     symbol doesn't resolve locally in a dynamic object,
   11429 		     it should be resolved by the dynamic linker.  */
   11430 		  if (globals->root.dynamic_sections_created)
   11431 		    {
   11432 		      outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
   11433 		      *unresolved_reloc_p = false;
   11434 		    }
   11435 		  else
   11436 		    outrel.r_info = 0;
   11437 		  outrel.r_addend = 0;
   11438 		}
   11439 	      else
   11440 		{
   11441 		  if (dynreloc_st_type == STT_GNU_IFUNC)
   11442 		    outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
   11443 		  else if (bfd_link_pic (info)
   11444 			   && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
   11445 		    outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
   11446 		  else
   11447 		    {
   11448 		      outrel.r_info = 0;
   11449 		      if (globals->fdpic_p)
   11450 			isrofixup = 1;
   11451 		    }
   11452 		  outrel.r_addend = dynreloc_value;
   11453 		}
   11454 
   11455 	      /* The GOT entry is initialized to zero by default.
   11456 		 See if we should install a different value.  */
   11457 	      if (outrel.r_addend != 0
   11458 		  && (globals->use_rel || outrel.r_info == 0))
   11459 		{
   11460 		  bfd_put_32 (output_bfd, outrel.r_addend,
   11461 			      sgot->contents + off);
   11462 		  outrel.r_addend = 0;
   11463 		}
   11464 
   11465 	      if (isrofixup)
   11466 		arm_elf_add_rofixup (output_bfd,
   11467 				     elf32_arm_hash_table (info)->srofixup,
   11468 				     sgot->output_section->vma
   11469 				     + sgot->output_offset + off);
   11470 
   11471 	      else if (outrel.r_info != 0)
   11472 		{
   11473 		  outrel.r_offset = (sgot->output_section->vma
   11474 				     + sgot->output_offset
   11475 				     + off);
   11476 		  elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   11477 		}
   11478 
   11479 	      h->got.offset |= 1;
   11480 	    }
   11481 	  value = sgot->output_offset + off;
   11482 	}
   11483       else
   11484 	{
   11485 	  bfd_vma off;
   11486 
   11487 	  BFD_ASSERT (local_got_offsets != NULL
   11488 		      && local_got_offsets[r_symndx] != (bfd_vma) -1);
   11489 
   11490 	  off = local_got_offsets[r_symndx];
   11491 
   11492 	  /* The offset must always be a multiple of 4.  We use the
   11493 	     least significant bit to record whether we have already
   11494 	     generated the necessary reloc.  */
   11495 	  if ((off & 1) != 0)
   11496 	    off &= ~1;
   11497 	  else
   11498 	    {
   11499 	      Elf_Internal_Rela outrel;
   11500 	      int isrofixup = 0;
   11501 
   11502 	      if (dynreloc_st_type == STT_GNU_IFUNC)
   11503 		outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
   11504 	      else if (bfd_link_pic (info))
   11505 		outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
   11506 	      else
   11507 		{
   11508 		  outrel.r_info = 0;
   11509 		  if (globals->fdpic_p)
   11510 		    isrofixup = 1;
   11511 		}
   11512 
   11513 	      /* The GOT entry is initialized to zero by default.
   11514 		 See if we should install a different value.  */
   11515 	      if (globals->use_rel || outrel.r_info == 0)
   11516 		bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
   11517 
   11518 	      if (isrofixup)
   11519 		arm_elf_add_rofixup (output_bfd,
   11520 				     globals->srofixup,
   11521 				     sgot->output_section->vma
   11522 				     + sgot->output_offset + off);
   11523 
   11524 	      else if (outrel.r_info != 0)
   11525 		{
   11526 		  outrel.r_addend = addend + dynreloc_value;
   11527 		  outrel.r_offset = (sgot->output_section->vma
   11528 				     + sgot->output_offset
   11529 				     + off);
   11530 		  elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   11531 		}
   11532 
   11533 	      local_got_offsets[r_symndx] |= 1;
   11534 	    }
   11535 
   11536 	  value = sgot->output_offset + off;
   11537 	}
   11538       if (r_type != R_ARM_GOT32)
   11539 	value += sgot->output_section->vma;
   11540 
   11541       return _bfd_final_link_relocate (howto, input_bfd, input_section,
   11542 				       contents, rel->r_offset, value,
   11543 				       rel->r_addend);
   11544 
   11545     case R_ARM_TLS_LDO32:
   11546       value = value - dtpoff_base (info);
   11547 
   11548       return _bfd_final_link_relocate (howto, input_bfd, input_section,
   11549 				       contents, rel->r_offset, value,
   11550 				       rel->r_addend);
   11551 
   11552     case R_ARM_TLS_LDM32:
   11553     case R_ARM_TLS_LDM32_FDPIC:
   11554       {
   11555 	bfd_vma off;
   11556 
   11557 	if (sgot == NULL)
   11558 	  abort ();
   11559 
   11560 	off = globals->tls_ldm_got.offset;
   11561 
   11562 	if ((off & 1) != 0)
   11563 	  off &= ~1;
   11564 	else
   11565 	  {
   11566 	    /* If we don't know the module number, create a relocation
   11567 	       for it.  */
   11568 	    if (bfd_link_dll (info))
   11569 	      {
   11570 		Elf_Internal_Rela outrel;
   11571 
   11572 		if (srelgot == NULL)
   11573 		  abort ();
   11574 
   11575 		outrel.r_addend = 0;
   11576 		outrel.r_offset = (sgot->output_section->vma
   11577 				   + sgot->output_offset + off);
   11578 		outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
   11579 
   11580 		if (globals->use_rel)
   11581 		  bfd_put_32 (output_bfd, outrel.r_addend,
   11582 			      sgot->contents + off);
   11583 
   11584 		elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   11585 	      }
   11586 	    else
   11587 	      bfd_put_32 (output_bfd, 1, sgot->contents + off);
   11588 
   11589 	    globals->tls_ldm_got.offset |= 1;
   11590 	  }
   11591 
   11592 	if (r_type == R_ARM_TLS_LDM32_FDPIC)
   11593 	  {
   11594 	    bfd_put_32 (output_bfd,
   11595 			globals->root.sgot->output_offset + off,
   11596 			contents + rel->r_offset);
   11597 
   11598 	    return bfd_reloc_ok;
   11599 	  }
   11600 	else
   11601 	  {
   11602 	    value = sgot->output_section->vma + sgot->output_offset + off
   11603 	      - (input_section->output_section->vma
   11604 		 + input_section->output_offset + rel->r_offset);
   11605 
   11606 	    return _bfd_final_link_relocate (howto, input_bfd, input_section,
   11607 					     contents, rel->r_offset, value,
   11608 					     rel->r_addend);
   11609 	  }
   11610       }
   11611 
   11612     case R_ARM_TLS_CALL:
   11613     case R_ARM_THM_TLS_CALL:
   11614     case R_ARM_TLS_GD32:
   11615     case R_ARM_TLS_GD32_FDPIC:
   11616     case R_ARM_TLS_IE32:
   11617     case R_ARM_TLS_IE32_FDPIC:
   11618     case R_ARM_TLS_GOTDESC:
   11619     case R_ARM_TLS_DESCSEQ:
   11620     case R_ARM_THM_TLS_DESCSEQ:
   11621       {
   11622 	bfd_vma off, offplt;
   11623 	int indx = 0;
   11624 	char tls_type;
   11625 
   11626 	BFD_ASSERT (sgot != NULL);
   11627 
   11628 	if (h != NULL)
   11629 	  {
   11630 	    bool dyn;
   11631 	    dyn = globals->root.dynamic_sections_created;
   11632 	    if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
   11633 						 bfd_link_pic (info),
   11634 						 h)
   11635 		&& (!bfd_link_pic (info)
   11636 		    || !SYMBOL_REFERENCES_LOCAL (info, h)))
   11637 	      {
   11638 		*unresolved_reloc_p = false;
   11639 		indx = h->dynindx;
   11640 	      }
   11641 	    off = h->got.offset;
   11642 	    offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
   11643 	    tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
   11644 	  }
   11645 	else
   11646 	  {
   11647 	    BFD_ASSERT (local_got_offsets != NULL);
   11648 
   11649 	    if (r_symndx >= elf32_arm_num_entries (input_bfd))
   11650 	      {
   11651 		_bfd_error_handler (_("\
   11652 %pB: expected symbol index in range 0..%lu but found local symbol with index %lu"),
   11653 				    input_bfd,
   11654 				    (unsigned long) elf32_arm_num_entries (input_bfd),
   11655 				    r_symndx);
   11656 		return false;
   11657 	      }
   11658 	    off = local_got_offsets[r_symndx];
   11659 	    offplt = local_tlsdesc_gotents[r_symndx];
   11660 	    tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
   11661 	  }
   11662 
   11663 	/* Linker relaxations happens from one of the
   11664 	   R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE.  */
   11665 	if (ELF32_R_TYPE (rel->r_info) != r_type)
   11666 	  tls_type = GOT_TLS_IE;
   11667 
   11668 	BFD_ASSERT (tls_type != GOT_UNKNOWN);
   11669 
   11670 	if ((off & 1) != 0)
   11671 	  off &= ~1;
   11672 	else
   11673 	  {
   11674 	    bool need_relocs = false;
   11675 	    Elf_Internal_Rela outrel;
   11676 	    int cur_off = off;
   11677 
   11678 	    /* The GOT entries have not been initialized yet.  Do it
   11679 	       now, and emit any relocations.  If both an IE GOT and a
   11680 	       GD GOT are necessary, we emit the GD first.  */
   11681 
   11682 	    if ((bfd_link_dll (info) || indx != 0)
   11683 		&& (h == NULL
   11684 		    || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
   11685 			&& !resolved_to_zero)
   11686 		    || h->root.type != bfd_link_hash_undefweak))
   11687 	      {
   11688 		need_relocs = true;
   11689 		BFD_ASSERT (srelgot != NULL);
   11690 	      }
   11691 
   11692 	    if (tls_type & GOT_TLS_GDESC)
   11693 	      {
   11694 		bfd_byte *loc;
   11695 
   11696 		/* We should have relaxed, unless this is an undefined
   11697 		   weak symbol.  */
   11698 		BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
   11699 			    || bfd_link_dll (info));
   11700 		BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
   11701 			    <= globals->root.sgotplt->size);
   11702 
   11703 		outrel.r_addend = 0;
   11704 		outrel.r_offset = (globals->root.sgotplt->output_section->vma
   11705 				   + globals->root.sgotplt->output_offset
   11706 				   + offplt
   11707 				   + globals->sgotplt_jump_table_size);
   11708 
   11709 		outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
   11710 		sreloc = globals->root.srelplt;
   11711 		loc = sreloc->contents;
   11712 		loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
   11713 		BFD_ASSERT (loc + RELOC_SIZE (globals)
   11714 			   <= sreloc->contents + sreloc->size);
   11715 
   11716 		SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
   11717 
   11718 		/* For globals, the first word in the relocation gets
   11719 		   the relocation index and the top bit set, or zero,
   11720 		   if we're binding now.  For locals, it gets the
   11721 		   symbol's offset in the tls section.  */
   11722 		bfd_put_32 (output_bfd,
   11723 			    !h ? value - elf_hash_table (info)->tls_sec->vma
   11724 			    : info->flags & DF_BIND_NOW ? 0
   11725 			    : 0x80000000 | ELF32_R_SYM (outrel.r_info),
   11726 			    globals->root.sgotplt->contents + offplt
   11727 			    + globals->sgotplt_jump_table_size);
   11728 
   11729 		/* Second word in the relocation is always zero.  */
   11730 		bfd_put_32 (output_bfd, 0,
   11731 			    globals->root.sgotplt->contents + offplt
   11732 			    + globals->sgotplt_jump_table_size + 4);
   11733 	      }
   11734 	    if (tls_type & GOT_TLS_GD)
   11735 	      {
   11736 		if (need_relocs)
   11737 		  {
   11738 		    outrel.r_addend = 0;
   11739 		    outrel.r_offset = (sgot->output_section->vma
   11740 				       + sgot->output_offset
   11741 				       + cur_off);
   11742 		    outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
   11743 
   11744 		    if (globals->use_rel)
   11745 		      bfd_put_32 (output_bfd, outrel.r_addend,
   11746 				  sgot->contents + cur_off);
   11747 
   11748 		    elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   11749 
   11750 		    if (indx == 0)
   11751 		      bfd_put_32 (output_bfd, value - dtpoff_base (info),
   11752 				  sgot->contents + cur_off + 4);
   11753 		    else
   11754 		      {
   11755 			outrel.r_addend = 0;
   11756 			outrel.r_info = ELF32_R_INFO (indx,
   11757 						      R_ARM_TLS_DTPOFF32);
   11758 			outrel.r_offset += 4;
   11759 
   11760 			if (globals->use_rel)
   11761 			  bfd_put_32 (output_bfd, outrel.r_addend,
   11762 				      sgot->contents + cur_off + 4);
   11763 
   11764 			elf32_arm_add_dynreloc (output_bfd, info,
   11765 						srelgot, &outrel);
   11766 		      }
   11767 		  }
   11768 		else
   11769 		  {
   11770 		    /* If we are not emitting relocations for a
   11771 		       general dynamic reference, then we must be in a
   11772 		       static link or an executable link with the
   11773 		       symbol binding locally.  Mark it as belonging
   11774 		       to module 1, the executable.  */
   11775 		    bfd_put_32 (output_bfd, 1,
   11776 				sgot->contents + cur_off);
   11777 		    bfd_put_32 (output_bfd, value - dtpoff_base (info),
   11778 				sgot->contents + cur_off + 4);
   11779 		  }
   11780 
   11781 		cur_off += 8;
   11782 	      }
   11783 
   11784 	    if (tls_type & GOT_TLS_IE)
   11785 	      {
   11786 		if (need_relocs)
   11787 		  {
   11788 		    if (indx == 0)
   11789 		      outrel.r_addend = value - dtpoff_base (info);
   11790 		    else
   11791 		      outrel.r_addend = 0;
   11792 		    outrel.r_offset = (sgot->output_section->vma
   11793 				       + sgot->output_offset
   11794 				       + cur_off);
   11795 		    outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
   11796 
   11797 		    if (globals->use_rel)
   11798 		      bfd_put_32 (output_bfd, outrel.r_addend,
   11799 				  sgot->contents + cur_off);
   11800 
   11801 		    elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   11802 		  }
   11803 		else
   11804 		  bfd_put_32 (output_bfd, tpoff (info, value),
   11805 			      sgot->contents + cur_off);
   11806 		cur_off += 4;
   11807 	      }
   11808 
   11809 	    if (h != NULL)
   11810 	      h->got.offset |= 1;
   11811 	    else
   11812 	      local_got_offsets[r_symndx] |= 1;
   11813 	  }
   11814 
   11815 	if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32 && r_type != R_ARM_TLS_GD32_FDPIC)
   11816 	  off += 8;
   11817 	else if (tls_type & GOT_TLS_GDESC)
   11818 	  off = offplt;
   11819 
   11820 	if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
   11821 	    || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL)
   11822 	  {
   11823 	    bfd_signed_vma offset;
   11824 	    /* TLS stubs are arm mode.  The original symbol is a
   11825 	       data object, so branch_type is bogus.  */
   11826 	    branch_type = ST_BRANCH_TO_ARM;
   11827 	    enum elf32_arm_stub_type stub_type
   11828 	      = arm_type_of_stub (info, input_section, rel,
   11829 				  st_type, &branch_type,
   11830 				  (struct elf32_arm_link_hash_entry *)h,
   11831 				  globals->tls_trampoline, globals->root.splt,
   11832 				  input_bfd, sym_name);
   11833 
   11834 	    if (stub_type != arm_stub_none)
   11835 	      {
   11836 		struct elf32_arm_stub_hash_entry *stub_entry
   11837 		  = elf32_arm_get_stub_entry
   11838 		  (input_section, globals->root.splt, 0, rel,
   11839 		   globals, stub_type);
   11840 		offset = (stub_entry->stub_offset
   11841 			  + stub_entry->stub_sec->output_offset
   11842 			  + stub_entry->stub_sec->output_section->vma);
   11843 	      }
   11844 	    else
   11845 	      offset = (globals->root.splt->output_section->vma
   11846 			+ globals->root.splt->output_offset
   11847 			+ globals->tls_trampoline);
   11848 
   11849 	    if (ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL)
   11850 	      {
   11851 		unsigned long inst;
   11852 
   11853 		offset -= (input_section->output_section->vma
   11854 			   + input_section->output_offset
   11855 			   + rel->r_offset + 8);
   11856 
   11857 		inst = offset >> 2;
   11858 		inst &= 0x00ffffff;
   11859 		value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
   11860 	      }
   11861 	    else
   11862 	      {
   11863 		/* Thumb blx encodes the offset in a complicated
   11864 		   fashion.  */
   11865 		unsigned upper_insn, lower_insn;
   11866 		unsigned neg;
   11867 
   11868 		offset -= (input_section->output_section->vma
   11869 			   + input_section->output_offset
   11870 			   + rel->r_offset + 4);
   11871 
   11872 		if (stub_type != arm_stub_none
   11873 		    && arm_stub_is_thumb (stub_type))
   11874 		  {
   11875 		    lower_insn = 0xd000;
   11876 		  }
   11877 		else
   11878 		  {
   11879 		    lower_insn = 0xc000;
   11880 		    /* Round up the offset to a word boundary.  */
   11881 		    offset = (offset + 2) & ~2;
   11882 		  }
   11883 
   11884 		neg = offset < 0;
   11885 		upper_insn = (0xf000
   11886 			      | ((offset >> 12) & 0x3ff)
   11887 			      | (neg << 10));
   11888 		lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
   11889 			      | (((!((offset >> 22) & 1)) ^ neg) << 11)
   11890 			      | ((offset >> 1) & 0x7ff);
   11891 		bfd_put_16 (input_bfd, upper_insn, hit_data);
   11892 		bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
   11893 		return bfd_reloc_ok;
   11894 	      }
   11895 	  }
   11896 	/* These relocations needs special care, as besides the fact
   11897 	   they point somewhere in .gotplt, the addend must be
   11898 	   adjusted accordingly depending on the type of instruction
   11899 	   we refer to.  */
   11900 	else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
   11901 	  {
   11902 	    unsigned long data, insn;
   11903 	    unsigned thumb;
   11904 
   11905 	    data = bfd_get_signed_32 (input_bfd, hit_data);
   11906 	    thumb = data & 1;
   11907 	    data &= ~1ul;
   11908 
   11909 	    if (thumb)
   11910 	      {
   11911 		insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
   11912 		if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
   11913 		  insn = (insn << 16)
   11914 		    | bfd_get_16 (input_bfd,
   11915 				  contents + rel->r_offset - data + 2);
   11916 		if ((insn & 0xf800c000) == 0xf000c000)
   11917 		  /* bl/blx */
   11918 		  value = -6;
   11919 		else if ((insn & 0xffffff00) == 0x4400)
   11920 		  /* add */
   11921 		  value = -5;
   11922 		else
   11923 		  {
   11924 		    _bfd_error_handler
   11925 		      /* xgettext:c-format */
   11926 		      (_("%pB(%pA+%#" PRIx64 "): "
   11927 			 "unexpected %s instruction '%#lx' "
   11928 			 "referenced by TLS_GOTDESC"),
   11929 		       input_bfd, input_section, (uint64_t) rel->r_offset,
   11930 		       "Thumb", insn);
   11931 		    return bfd_reloc_notsupported;
   11932 		  }
   11933 	      }
   11934 	    else
   11935 	      {
   11936 		insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
   11937 
   11938 		switch (insn >> 24)
   11939 		  {
   11940 		  case 0xeb:  /* bl */
   11941 		  case 0xfa:  /* blx */
   11942 		    value = -4;
   11943 		    break;
   11944 
   11945 		  case 0xe0:	/* add */
   11946 		    value = -8;
   11947 		    break;
   11948 
   11949 		  default:
   11950 		    _bfd_error_handler
   11951 		      /* xgettext:c-format */
   11952 		      (_("%pB(%pA+%#" PRIx64 "): "
   11953 			 "unexpected %s instruction '%#lx' "
   11954 			 "referenced by TLS_GOTDESC"),
   11955 		       input_bfd, input_section, (uint64_t) rel->r_offset,
   11956 		       "ARM", insn);
   11957 		    return bfd_reloc_notsupported;
   11958 		  }
   11959 	      }
   11960 
   11961 	    value += ((globals->root.sgotplt->output_section->vma
   11962 		       + globals->root.sgotplt->output_offset + off)
   11963 		      - (input_section->output_section->vma
   11964 			 + input_section->output_offset
   11965 			 + rel->r_offset)
   11966 		      + globals->sgotplt_jump_table_size);
   11967 	  }
   11968 	else
   11969 	  value = ((globals->root.sgot->output_section->vma
   11970 		    + globals->root.sgot->output_offset + off)
   11971 		   - (input_section->output_section->vma
   11972 		      + input_section->output_offset + rel->r_offset));
   11973 
   11974 	if (globals->fdpic_p && (r_type == R_ARM_TLS_GD32_FDPIC ||
   11975 				 r_type == R_ARM_TLS_IE32_FDPIC))
   11976 	  {
   11977 	    /* For FDPIC relocations, resolve to the offset of the GOT
   11978 	       entry from the start of GOT.  */
   11979 	    bfd_put_32 (output_bfd,
   11980 			globals->root.sgot->output_offset + off,
   11981 			contents + rel->r_offset);
   11982 
   11983 	    return bfd_reloc_ok;
   11984 	  }
   11985 	else
   11986 	  {
   11987 	    return _bfd_final_link_relocate (howto, input_bfd, input_section,
   11988 					     contents, rel->r_offset, value,
   11989 					     rel->r_addend);
   11990 	  }
   11991       }
   11992 
   11993     case R_ARM_TLS_LE32:
   11994       if (bfd_link_dll (info))
   11995 	{
   11996 	  _bfd_error_handler
   11997 	    /* xgettext:c-format */
   11998 	    (_("%pB(%pA+%#" PRIx64 "): %s relocation not permitted "
   11999 	       "in shared object"),
   12000 	     input_bfd, input_section, (uint64_t) rel->r_offset, howto->name);
   12001 	  return bfd_reloc_notsupported;
   12002 	}
   12003       else
   12004 	value = tpoff (info, value);
   12005 
   12006       return _bfd_final_link_relocate (howto, input_bfd, input_section,
   12007 				       contents, rel->r_offset, value,
   12008 				       rel->r_addend);
   12009 
   12010     case R_ARM_V4BX:
   12011       if (globals->fix_v4bx)
   12012 	{
   12013 	  bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
   12014 
   12015 	  /* Ensure that we have a BX instruction.  */
   12016 	  BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
   12017 
   12018 	  if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
   12019 	    {
   12020 	      /* Branch to veneer.  */
   12021 	      bfd_vma glue_addr;
   12022 	      glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
   12023 	      glue_addr -= input_section->output_section->vma
   12024 			   + input_section->output_offset
   12025 			   + rel->r_offset + 8;
   12026 	      insn = (insn & 0xf0000000) | 0x0a000000
   12027 		     | ((glue_addr >> 2) & 0x00ffffff);
   12028 	    }
   12029 	  else
   12030 	    {
   12031 	      /* Preserve Rm (lowest four bits) and the condition code
   12032 		 (highest four bits). Other bits encode MOV PC,Rm.  */
   12033 	      insn = (insn & 0xf000000f) | 0x01a0f000;
   12034 	    }
   12035 
   12036 	  bfd_put_32 (input_bfd, insn, hit_data);
   12037 	}
   12038       return bfd_reloc_ok;
   12039 
   12040     case R_ARM_MOVW_ABS_NC:
   12041     case R_ARM_MOVT_ABS:
   12042     case R_ARM_MOVW_PREL_NC:
   12043     case R_ARM_MOVT_PREL:
   12044     /* Until we properly support segment-base-relative addressing then
   12045        we assume the segment base to be zero, as for the group relocations.
   12046        Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
   12047        and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS.  */
   12048     case R_ARM_MOVW_BREL_NC:
   12049     case R_ARM_MOVW_BREL:
   12050     case R_ARM_MOVT_BREL:
   12051       {
   12052 	bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
   12053 
   12054 	if (globals->use_rel)
   12055 	  {
   12056 	    addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
   12057 	    signed_addend = (addend ^ 0x8000) - 0x8000;
   12058 	  }
   12059 
   12060 	value += signed_addend;
   12061 
   12062 	if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
   12063 	  value -= (input_section->output_section->vma
   12064 		    + input_section->output_offset + rel->r_offset);
   12065 
   12066 	if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
   12067 	  return bfd_reloc_overflow;
   12068 
   12069 	if (branch_type == ST_BRANCH_TO_THUMB)
   12070 	  value |= 1;
   12071 
   12072 	if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
   12073 	    || r_type == R_ARM_MOVT_BREL)
   12074 	  value >>= 16;
   12075 
   12076 	insn &= 0xfff0f000;
   12077 	insn |= value & 0xfff;
   12078 	insn |= (value & 0xf000) << 4;
   12079 	bfd_put_32 (input_bfd, insn, hit_data);
   12080       }
   12081       return bfd_reloc_ok;
   12082 
   12083     case R_ARM_THM_MOVW_ABS_NC:
   12084     case R_ARM_THM_MOVT_ABS:
   12085     case R_ARM_THM_MOVW_PREL_NC:
   12086     case R_ARM_THM_MOVT_PREL:
   12087     /* Until we properly support segment-base-relative addressing then
   12088        we assume the segment base to be zero, as for the above relocations.
   12089        Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
   12090        R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
   12091        as R_ARM_THM_MOVT_ABS.  */
   12092     case R_ARM_THM_MOVW_BREL_NC:
   12093     case R_ARM_THM_MOVW_BREL:
   12094     case R_ARM_THM_MOVT_BREL:
   12095       {
   12096 	bfd_vma insn;
   12097 
   12098 	insn = bfd_get_16 (input_bfd, hit_data) << 16;
   12099 	insn |= bfd_get_16 (input_bfd, hit_data + 2);
   12100 
   12101 	if (globals->use_rel)
   12102 	  {
   12103 	    addend = ((insn >> 4)  & 0xf000)
   12104 		   | ((insn >> 15) & 0x0800)
   12105 		   | ((insn >> 4)  & 0x0700)
   12106 		   | (insn	   & 0x00ff);
   12107 	    signed_addend = (addend ^ 0x8000) - 0x8000;
   12108 	  }
   12109 
   12110 	value += signed_addend;
   12111 
   12112 	if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
   12113 	  value -= (input_section->output_section->vma
   12114 		    + input_section->output_offset + rel->r_offset);
   12115 
   12116 	if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
   12117 	  return bfd_reloc_overflow;
   12118 
   12119 	if (branch_type == ST_BRANCH_TO_THUMB)
   12120 	  value |= 1;
   12121 
   12122 	if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
   12123 	    || r_type == R_ARM_THM_MOVT_BREL)
   12124 	  value >>= 16;
   12125 
   12126 	insn &= 0xfbf08f00;
   12127 	insn |= (value & 0xf000) << 4;
   12128 	insn |= (value & 0x0800) << 15;
   12129 	insn |= (value & 0x0700) << 4;
   12130 	insn |= (value & 0x00ff);
   12131 
   12132 	bfd_put_16 (input_bfd, insn >> 16, hit_data);
   12133 	bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
   12134       }
   12135       return bfd_reloc_ok;
   12136 
   12137     case R_ARM_ALU_PC_G0_NC:
   12138     case R_ARM_ALU_PC_G1_NC:
   12139     case R_ARM_ALU_PC_G0:
   12140     case R_ARM_ALU_PC_G1:
   12141     case R_ARM_ALU_PC_G2:
   12142     case R_ARM_ALU_SB_G0_NC:
   12143     case R_ARM_ALU_SB_G1_NC:
   12144     case R_ARM_ALU_SB_G0:
   12145     case R_ARM_ALU_SB_G1:
   12146     case R_ARM_ALU_SB_G2:
   12147       {
   12148 	bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
   12149 	bfd_vma pc = input_section->output_section->vma
   12150 		     + input_section->output_offset + rel->r_offset;
   12151 	/* sb is the origin of the *segment* containing the symbol.  */
   12152 	bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
   12153 	bfd_vma residual;
   12154 	bfd_vma g_n;
   12155 	bfd_signed_vma signed_value;
   12156 	int group = 0;
   12157 
   12158 	/* Determine which group of bits to select.  */
   12159 	switch (r_type)
   12160 	  {
   12161 	  case R_ARM_ALU_PC_G0_NC:
   12162 	  case R_ARM_ALU_PC_G0:
   12163 	  case R_ARM_ALU_SB_G0_NC:
   12164 	  case R_ARM_ALU_SB_G0:
   12165 	    group = 0;
   12166 	    break;
   12167 
   12168 	  case R_ARM_ALU_PC_G1_NC:
   12169 	  case R_ARM_ALU_PC_G1:
   12170 	  case R_ARM_ALU_SB_G1_NC:
   12171 	  case R_ARM_ALU_SB_G1:
   12172 	    group = 1;
   12173 	    break;
   12174 
   12175 	  case R_ARM_ALU_PC_G2:
   12176 	  case R_ARM_ALU_SB_G2:
   12177 	    group = 2;
   12178 	    break;
   12179 
   12180 	  default:
   12181 	    abort ();
   12182 	  }
   12183 
   12184 	/* If REL, extract the addend from the insn.  If RELA, it will
   12185 	   have already been fetched for us.  */
   12186 	if (globals->use_rel)
   12187 	  {
   12188 	    int negative;
   12189 	    bfd_vma constant = insn & 0xff;
   12190 	    bfd_vma rotation = (insn & 0xf00) >> 8;
   12191 
   12192 	    if (rotation == 0)
   12193 	      signed_addend = constant;
   12194 	    else
   12195 	      {
   12196 		/* Compensate for the fact that in the instruction, the
   12197 		   rotation is stored in multiples of 2 bits.  */
   12198 		rotation *= 2;
   12199 
   12200 		/* Rotate "constant" right by "rotation" bits.  */
   12201 		signed_addend = (constant >> rotation) |
   12202 				(constant << (8 * sizeof (bfd_vma) - rotation));
   12203 	      }
   12204 
   12205 	    /* Determine if the instruction is an ADD or a SUB.
   12206 	       (For REL, this determines the sign of the addend.)  */
   12207 	    negative = identify_add_or_sub (insn);
   12208 	    if (negative == 0)
   12209 	      {
   12210 		_bfd_error_handler
   12211 		  /* xgettext:c-format */
   12212 		  (_("%pB(%pA+%#" PRIx64 "): only ADD or SUB instructions "
   12213 		     "are allowed for ALU group relocations"),
   12214 		  input_bfd, input_section, (uint64_t) rel->r_offset);
   12215 		return bfd_reloc_overflow;
   12216 	      }
   12217 
   12218 	    signed_addend *= negative;
   12219 	  }
   12220 
   12221 	/* Compute the value (X) to go in the place.  */
   12222 	if (r_type == R_ARM_ALU_PC_G0_NC
   12223 	    || r_type == R_ARM_ALU_PC_G1_NC
   12224 	    || r_type == R_ARM_ALU_PC_G0
   12225 	    || r_type == R_ARM_ALU_PC_G1
   12226 	    || r_type == R_ARM_ALU_PC_G2)
   12227 	  /* PC relative.  */
   12228 	  signed_value = value - pc + signed_addend;
   12229 	else
   12230 	  /* Section base relative.  */
   12231 	  signed_value = value - sb + signed_addend;
   12232 
   12233 	/* If the target symbol is a Thumb function, then set the
   12234 	   Thumb bit in the address.  */
   12235 	if (branch_type == ST_BRANCH_TO_THUMB)
   12236 	  signed_value |= 1;
   12237 
   12238 	/* Calculate the value of the relevant G_n, in encoded
   12239 	   constant-with-rotation format.  */
   12240 	g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
   12241 					  group, &residual);
   12242 
   12243 	/* Check for overflow if required.  */
   12244 	if ((r_type == R_ARM_ALU_PC_G0
   12245 	     || r_type == R_ARM_ALU_PC_G1
   12246 	     || r_type == R_ARM_ALU_PC_G2
   12247 	     || r_type == R_ARM_ALU_SB_G0
   12248 	     || r_type == R_ARM_ALU_SB_G1
   12249 	     || r_type == R_ARM_ALU_SB_G2) && residual != 0)
   12250 	  {
   12251 	    _bfd_error_handler
   12252 	      /* xgettext:c-format */
   12253 	      (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
   12254 		 "splitting %#" PRIx64 " for group relocation %s"),
   12255 	       input_bfd, input_section, (uint64_t) rel->r_offset,
   12256 	       (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
   12257 	       howto->name);
   12258 	    return bfd_reloc_overflow;
   12259 	  }
   12260 
   12261 	/* Mask out the value and the ADD/SUB part of the opcode; take care
   12262 	   not to destroy the S bit.  */
   12263 	insn &= 0xff1ff000;
   12264 
   12265 	/* Set the opcode according to whether the value to go in the
   12266 	   place is negative.  */
   12267 	if (signed_value < 0)
   12268 	  insn |= 1 << 22;
   12269 	else
   12270 	  insn |= 1 << 23;
   12271 
   12272 	/* Encode the offset.  */
   12273 	insn |= g_n;
   12274 
   12275 	bfd_put_32 (input_bfd, insn, hit_data);
   12276       }
   12277       return bfd_reloc_ok;
   12278 
   12279     case R_ARM_LDR_PC_G0:
   12280     case R_ARM_LDR_PC_G1:
   12281     case R_ARM_LDR_PC_G2:
   12282     case R_ARM_LDR_SB_G0:
   12283     case R_ARM_LDR_SB_G1:
   12284     case R_ARM_LDR_SB_G2:
   12285       {
   12286 	bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
   12287 	bfd_vma pc = input_section->output_section->vma
   12288 		     + input_section->output_offset + rel->r_offset;
   12289 	/* sb is the origin of the *segment* containing the symbol.  */
   12290 	bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
   12291 	bfd_vma residual;
   12292 	bfd_signed_vma signed_value;
   12293 	int group = 0;
   12294 
   12295 	/* Determine which groups of bits to calculate.  */
   12296 	switch (r_type)
   12297 	  {
   12298 	  case R_ARM_LDR_PC_G0:
   12299 	  case R_ARM_LDR_SB_G0:
   12300 	    group = 0;
   12301 	    break;
   12302 
   12303 	  case R_ARM_LDR_PC_G1:
   12304 	  case R_ARM_LDR_SB_G1:
   12305 	    group = 1;
   12306 	    break;
   12307 
   12308 	  case R_ARM_LDR_PC_G2:
   12309 	  case R_ARM_LDR_SB_G2:
   12310 	    group = 2;
   12311 	    break;
   12312 
   12313 	  default:
   12314 	    abort ();
   12315 	  }
   12316 
   12317 	/* If REL, extract the addend from the insn.  If RELA, it will
   12318 	   have already been fetched for us.  */
   12319 	if (globals->use_rel)
   12320 	  {
   12321 	    int negative = (insn & (1 << 23)) ? 1 : -1;
   12322 	    signed_addend = negative * (insn & 0xfff);
   12323 	  }
   12324 
   12325 	/* Compute the value (X) to go in the place.  */
   12326 	if (r_type == R_ARM_LDR_PC_G0
   12327 	    || r_type == R_ARM_LDR_PC_G1
   12328 	    || r_type == R_ARM_LDR_PC_G2)
   12329 	  /* PC relative.  */
   12330 	  signed_value = value - pc + signed_addend;
   12331 	else
   12332 	  /* Section base relative.  */
   12333 	  signed_value = value - sb + signed_addend;
   12334 
   12335 	/* Calculate the value of the relevant G_{n-1} to obtain
   12336 	   the residual at that stage.  */
   12337 	calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
   12338 				    group - 1, &residual);
   12339 
   12340 	/* Check for overflow.  */
   12341 	if (residual >= 0x1000)
   12342 	  {
   12343 	    _bfd_error_handler
   12344 	      /* xgettext:c-format */
   12345 	      (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
   12346 		 "splitting %#" PRIx64 " for group relocation %s"),
   12347 	       input_bfd, input_section, (uint64_t) rel->r_offset,
   12348 	       (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
   12349 	       howto->name);
   12350 	    return bfd_reloc_overflow;
   12351 	  }
   12352 
   12353 	/* Mask out the value and U bit.  */
   12354 	insn &= 0xff7ff000;
   12355 
   12356 	/* Set the U bit if the value to go in the place is non-negative.  */
   12357 	if (signed_value >= 0)
   12358 	  insn |= 1 << 23;
   12359 
   12360 	/* Encode the offset.  */
   12361 	insn |= residual;
   12362 
   12363 	bfd_put_32 (input_bfd, insn, hit_data);
   12364       }
   12365       return bfd_reloc_ok;
   12366 
   12367     case R_ARM_LDRS_PC_G0:
   12368     case R_ARM_LDRS_PC_G1:
   12369     case R_ARM_LDRS_PC_G2:
   12370     case R_ARM_LDRS_SB_G0:
   12371     case R_ARM_LDRS_SB_G1:
   12372     case R_ARM_LDRS_SB_G2:
   12373       {
   12374 	bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
   12375 	bfd_vma pc = input_section->output_section->vma
   12376 		     + input_section->output_offset + rel->r_offset;
   12377 	/* sb is the origin of the *segment* containing the symbol.  */
   12378 	bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
   12379 	bfd_vma residual;
   12380 	bfd_signed_vma signed_value;
   12381 	int group = 0;
   12382 
   12383 	/* Determine which groups of bits to calculate.  */
   12384 	switch (r_type)
   12385 	  {
   12386 	  case R_ARM_LDRS_PC_G0:
   12387 	  case R_ARM_LDRS_SB_G0:
   12388 	    group = 0;
   12389 	    break;
   12390 
   12391 	  case R_ARM_LDRS_PC_G1:
   12392 	  case R_ARM_LDRS_SB_G1:
   12393 	    group = 1;
   12394 	    break;
   12395 
   12396 	  case R_ARM_LDRS_PC_G2:
   12397 	  case R_ARM_LDRS_SB_G2:
   12398 	    group = 2;
   12399 	    break;
   12400 
   12401 	  default:
   12402 	    abort ();
   12403 	  }
   12404 
   12405 	/* If REL, extract the addend from the insn.  If RELA, it will
   12406 	   have already been fetched for us.  */
   12407 	if (globals->use_rel)
   12408 	  {
   12409 	    int negative = (insn & (1 << 23)) ? 1 : -1;
   12410 	    signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
   12411 	  }
   12412 
   12413 	/* Compute the value (X) to go in the place.  */
   12414 	if (r_type == R_ARM_LDRS_PC_G0
   12415 	    || r_type == R_ARM_LDRS_PC_G1
   12416 	    || r_type == R_ARM_LDRS_PC_G2)
   12417 	  /* PC relative.  */
   12418 	  signed_value = value - pc + signed_addend;
   12419 	else
   12420 	  /* Section base relative.  */
   12421 	  signed_value = value - sb + signed_addend;
   12422 
   12423 	/* Calculate the value of the relevant G_{n-1} to obtain
   12424 	   the residual at that stage.  */
   12425 	calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
   12426 				    group - 1, &residual);
   12427 
   12428 	/* Check for overflow.  */
   12429 	if (residual >= 0x100)
   12430 	  {
   12431 	    _bfd_error_handler
   12432 	      /* xgettext:c-format */
   12433 	      (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
   12434 		 "splitting %#" PRIx64 " for group relocation %s"),
   12435 	       input_bfd, input_section, (uint64_t) rel->r_offset,
   12436 	       (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
   12437 	       howto->name);
   12438 	    return bfd_reloc_overflow;
   12439 	  }
   12440 
   12441 	/* Mask out the value and U bit.  */
   12442 	insn &= 0xff7ff0f0;
   12443 
   12444 	/* Set the U bit if the value to go in the place is non-negative.  */
   12445 	if (signed_value >= 0)
   12446 	  insn |= 1 << 23;
   12447 
   12448 	/* Encode the offset.  */
   12449 	insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
   12450 
   12451 	bfd_put_32 (input_bfd, insn, hit_data);
   12452       }
   12453       return bfd_reloc_ok;
   12454 
   12455     case R_ARM_LDC_PC_G0:
   12456     case R_ARM_LDC_PC_G1:
   12457     case R_ARM_LDC_PC_G2:
   12458     case R_ARM_LDC_SB_G0:
   12459     case R_ARM_LDC_SB_G1:
   12460     case R_ARM_LDC_SB_G2:
   12461       {
   12462 	bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
   12463 	bfd_vma pc = input_section->output_section->vma
   12464 		     + input_section->output_offset + rel->r_offset;
   12465 	/* sb is the origin of the *segment* containing the symbol.  */
   12466 	bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
   12467 	bfd_vma residual;
   12468 	bfd_signed_vma signed_value;
   12469 	int group = 0;
   12470 
   12471 	/* Determine which groups of bits to calculate.  */
   12472 	switch (r_type)
   12473 	  {
   12474 	  case R_ARM_LDC_PC_G0:
   12475 	  case R_ARM_LDC_SB_G0:
   12476 	    group = 0;
   12477 	    break;
   12478 
   12479 	  case R_ARM_LDC_PC_G1:
   12480 	  case R_ARM_LDC_SB_G1:
   12481 	    group = 1;
   12482 	    break;
   12483 
   12484 	  case R_ARM_LDC_PC_G2:
   12485 	  case R_ARM_LDC_SB_G2:
   12486 	    group = 2;
   12487 	    break;
   12488 
   12489 	  default:
   12490 	    abort ();
   12491 	  }
   12492 
   12493 	/* If REL, extract the addend from the insn.  If RELA, it will
   12494 	   have already been fetched for us.  */
   12495 	if (globals->use_rel)
   12496 	  {
   12497 	    int negative = (insn & (1 << 23)) ? 1 : -1;
   12498 	    signed_addend = negative * ((insn & 0xff) << 2);
   12499 	  }
   12500 
   12501 	/* Compute the value (X) to go in the place.  */
   12502 	if (r_type == R_ARM_LDC_PC_G0
   12503 	    || r_type == R_ARM_LDC_PC_G1
   12504 	    || r_type == R_ARM_LDC_PC_G2)
   12505 	  /* PC relative.  */
   12506 	  signed_value = value - pc + signed_addend;
   12507 	else
   12508 	  /* Section base relative.  */
   12509 	  signed_value = value - sb + signed_addend;
   12510 
   12511 	/* Calculate the value of the relevant G_{n-1} to obtain
   12512 	   the residual at that stage.  */
   12513 	calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
   12514 				    group - 1, &residual);
   12515 
   12516 	/* Check for overflow.  (The absolute value to go in the place must be
   12517 	   divisible by four and, after having been divided by four, must
   12518 	   fit in eight bits.)  */
   12519 	if ((residual & 0x3) != 0 || residual >= 0x400)
   12520 	  {
   12521 	    _bfd_error_handler
   12522 	      /* xgettext:c-format */
   12523 	      (_("%pB(%pA+%#" PRIx64 "): overflow whilst "
   12524 		 "splitting %#" PRIx64 " for group relocation %s"),
   12525 	       input_bfd, input_section, (uint64_t) rel->r_offset,
   12526 	       (uint64_t) (signed_value < 0 ? -signed_value : signed_value),
   12527 	       howto->name);
   12528 	    return bfd_reloc_overflow;
   12529 	  }
   12530 
   12531 	/* Mask out the value and U bit.  */
   12532 	insn &= 0xff7fff00;
   12533 
   12534 	/* Set the U bit if the value to go in the place is non-negative.  */
   12535 	if (signed_value >= 0)
   12536 	  insn |= 1 << 23;
   12537 
   12538 	/* Encode the offset.  */
   12539 	insn |= residual >> 2;
   12540 
   12541 	bfd_put_32 (input_bfd, insn, hit_data);
   12542       }
   12543       return bfd_reloc_ok;
   12544 
   12545     case R_ARM_THM_ALU_ABS_G0_NC:
   12546     case R_ARM_THM_ALU_ABS_G1_NC:
   12547     case R_ARM_THM_ALU_ABS_G2_NC:
   12548     case R_ARM_THM_ALU_ABS_G3_NC:
   12549 	{
   12550 	    static const int shift_array[4] = {0, 8, 16, 24};
   12551 	    bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
   12552 	    bfd_vma addr = value;
   12553 	    int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
   12554 
   12555 	    /* Compute address.  */
   12556 	    if (globals->use_rel)
   12557 		signed_addend = insn & 0xff;
   12558 	    addr += signed_addend;
   12559 	    if (branch_type == ST_BRANCH_TO_THUMB)
   12560 		addr |= 1;
   12561 	    /* Clean imm8 insn.  */
   12562 	    insn &= 0xff00;
   12563 	    /* And update with correct part of address.  */
   12564 	    insn |= (addr >> shift) & 0xff;
   12565 	    /* Update insn.  */
   12566 	    bfd_put_16 (input_bfd, insn, hit_data);
   12567 	}
   12568 
   12569 	*unresolved_reloc_p = false;
   12570 	return bfd_reloc_ok;
   12571 
   12572     case R_ARM_GOTOFFFUNCDESC:
   12573       {
   12574 	if (h == NULL)
   12575 	  {
   12576 	    struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
   12577 	    int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
   12578 
   12579 	    if (r_symndx >= elf32_arm_num_entries (input_bfd))
   12580 	      {
   12581 		* error_message = _("local symbol index too big");
   12582 		return bfd_reloc_dangerous;
   12583 	      }
   12584 
   12585 	    int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
   12586 	    bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
   12587 	    bfd_vma seg = -1;
   12588 
   12589 	    if (bfd_link_pic (info) && dynindx == 0)
   12590 	      {
   12591 		* error_message = _("no dynamic index information available");
   12592 		return bfd_reloc_dangerous;
   12593 	      }
   12594 
   12595 	    /* Resolve relocation.  */
   12596 	    bfd_put_32 (output_bfd, (offset + sgot->output_offset)
   12597 		       , contents + rel->r_offset);
   12598 	    /* Emit R_ARM_FUNCDESC_VALUE or two fixups on funcdesc if
   12599 	       not done yet.  */
   12600 	    arm_elf_fill_funcdesc (output_bfd, info,
   12601 				   &local_fdpic_cnts[r_symndx].funcdesc_offset,
   12602 				   dynindx, offset, addr, dynreloc_value, seg);
   12603 	  }
   12604 	else
   12605 	  {
   12606 	    int dynindx;
   12607 	    int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
   12608 	    bfd_vma addr;
   12609 	    bfd_vma seg = -1;
   12610 
   12611 	    /* For static binaries, sym_sec can be null.  */
   12612 	    if (sym_sec)
   12613 	      {
   12614 		dynindx = elf_section_data (sym_sec->output_section)->dynindx;
   12615 		addr = dynreloc_value - sym_sec->output_section->vma;
   12616 	      }
   12617 	    else
   12618 	      {
   12619 		dynindx = 0;
   12620 		addr = 0;
   12621 	      }
   12622 
   12623 	    if (bfd_link_pic (info) && dynindx == 0)
   12624 	      {
   12625 		* error_message = _("no dynamic index information available");
   12626 		return bfd_reloc_dangerous;
   12627 	      }
   12628 
   12629 	    /* This case cannot occur since funcdesc is allocated by
   12630 	       the dynamic loader so we cannot resolve the relocation.  */
   12631 	    if (h->dynindx != -1)
   12632 	      {
   12633 		* error_message = _("invalid dynamic index");
   12634 		return bfd_reloc_dangerous;
   12635 	      }
   12636 
   12637 	    /* Resolve relocation.  */
   12638 	    bfd_put_32 (output_bfd, (offset + sgot->output_offset),
   12639 		        contents + rel->r_offset);
   12640 	    /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
   12641 	    arm_elf_fill_funcdesc (output_bfd, info,
   12642 				   &eh->fdpic_cnts.funcdesc_offset,
   12643 				   dynindx, offset, addr, dynreloc_value, seg);
   12644 	  }
   12645       }
   12646       *unresolved_reloc_p = false;
   12647       return bfd_reloc_ok;
   12648 
   12649     case R_ARM_GOTFUNCDESC:
   12650       {
   12651 	if (h != NULL)
   12652 	  {
   12653 	    Elf_Internal_Rela outrel;
   12654 
   12655 	    /* Resolve relocation.  */
   12656 	    bfd_put_32 (output_bfd, ((eh->fdpic_cnts.gotfuncdesc_offset & ~1)
   12657 				     + sgot->output_offset),
   12658 			contents + rel->r_offset);
   12659 	    /* Add funcdesc and associated R_ARM_FUNCDESC_VALUE.  */
   12660 	    if (h->dynindx == -1)
   12661 	      {
   12662 		int dynindx;
   12663 		int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
   12664 		bfd_vma addr;
   12665 		bfd_vma seg = -1;
   12666 
   12667 		/* For static binaries sym_sec can be null.  */
   12668 		if (sym_sec)
   12669 		  {
   12670 		    dynindx = elf_section_data (sym_sec->output_section)->dynindx;
   12671 		    addr = dynreloc_value - sym_sec->output_section->vma;
   12672 		  }
   12673 		else
   12674 		  {
   12675 		    dynindx = 0;
   12676 		    addr = 0;
   12677 		  }
   12678 
   12679 		/* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
   12680 		arm_elf_fill_funcdesc (output_bfd, info,
   12681 				       &eh->fdpic_cnts.funcdesc_offset,
   12682 				       dynindx, offset, addr, dynreloc_value, seg);
   12683 	      }
   12684 
   12685 	    /* Add a dynamic relocation on GOT entry if not already done.  */
   12686 	    if ((eh->fdpic_cnts.gotfuncdesc_offset & 1) == 0)
   12687 	      {
   12688 		if (h->dynindx == -1)
   12689 		  {
   12690 		    outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
   12691 		    if (h->root.type == bfd_link_hash_undefweak)
   12692 		      bfd_put_32 (output_bfd, 0, sgot->contents
   12693 				  + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
   12694 		    else
   12695 		      bfd_put_32 (output_bfd, sgot->output_section->vma
   12696 				  + sgot->output_offset
   12697 				  + (eh->fdpic_cnts.funcdesc_offset & ~1),
   12698 				  sgot->contents
   12699 				  + (eh->fdpic_cnts.gotfuncdesc_offset & ~1));
   12700 		  }
   12701 		else
   12702 		  {
   12703 		    outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
   12704 		  }
   12705 		outrel.r_offset = sgot->output_section->vma
   12706 		  + sgot->output_offset
   12707 		  + (eh->fdpic_cnts.gotfuncdesc_offset & ~1);
   12708 		outrel.r_addend = 0;
   12709 		if (h->dynindx == -1 && !bfd_link_pic (info))
   12710 		  if (h->root.type == bfd_link_hash_undefweak)
   12711 		    arm_elf_add_rofixup (output_bfd, globals->srofixup, -1);
   12712 		  else
   12713 		    arm_elf_add_rofixup (output_bfd, globals->srofixup,
   12714 					 outrel.r_offset);
   12715 		else
   12716 		  elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   12717 		eh->fdpic_cnts.gotfuncdesc_offset |= 1;
   12718 	      }
   12719 	  }
   12720 	else
   12721 	  {
   12722 	    /* Such relocation on static function should not have been
   12723 	       emitted by the compiler.  */
   12724 	    return bfd_reloc_notsupported;
   12725 	  }
   12726       }
   12727       *unresolved_reloc_p = false;
   12728       return bfd_reloc_ok;
   12729 
   12730     case R_ARM_FUNCDESC:
   12731       {
   12732 	if (h == NULL)
   12733 	  {
   12734 	    struct fdpic_local *local_fdpic_cnts = elf32_arm_local_fdpic_cnts (input_bfd);
   12735 	    Elf_Internal_Rela outrel;
   12736 	    int dynindx = elf_section_data (sym_sec->output_section)->dynindx;
   12737 
   12738 	    if (r_symndx >= elf32_arm_num_entries (input_bfd))
   12739 	      {
   12740 		* error_message = _("local symbol index too big");
   12741 		return bfd_reloc_dangerous;
   12742 	      }
   12743 
   12744 	    int offset = local_fdpic_cnts[r_symndx].funcdesc_offset & ~1;
   12745 	    bfd_vma addr = dynreloc_value - sym_sec->output_section->vma;
   12746 	    bfd_vma seg = -1;
   12747 
   12748 	    if (bfd_link_pic (info) && dynindx == 0)
   12749 	      {
   12750 		* error_message = _("dynamic index information not available");
   12751 		return bfd_reloc_dangerous;
   12752 	      }
   12753 
   12754 	    /* Replace static FUNCDESC relocation with a
   12755 	       R_ARM_RELATIVE dynamic relocation or with a rofixup for
   12756 	       executable.  */
   12757 	    outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
   12758 	    outrel.r_offset = input_section->output_section->vma
   12759 	      + input_section->output_offset + rel->r_offset;
   12760 	    outrel.r_addend = 0;
   12761 	    if (bfd_link_pic (info))
   12762 	      elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   12763 	    else
   12764 	      arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
   12765 
   12766 	    bfd_put_32 (input_bfd, sgot->output_section->vma
   12767 			+ sgot->output_offset + offset, hit_data);
   12768 
   12769 	    /* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
   12770 	    arm_elf_fill_funcdesc (output_bfd, info,
   12771 				   &local_fdpic_cnts[r_symndx].funcdesc_offset,
   12772 				   dynindx, offset, addr, dynreloc_value, seg);
   12773 	  }
   12774 	else
   12775 	  {
   12776 	    if (h->dynindx == -1)
   12777 	      {
   12778 		int dynindx;
   12779 		int offset = eh->fdpic_cnts.funcdesc_offset & ~1;
   12780 		bfd_vma addr;
   12781 		bfd_vma seg = -1;
   12782 		Elf_Internal_Rela outrel;
   12783 
   12784 		/* For static binaries sym_sec can be null.  */
   12785 		if (sym_sec)
   12786 		  {
   12787 		    dynindx = elf_section_data (sym_sec->output_section)->dynindx;
   12788 		    addr = dynreloc_value - sym_sec->output_section->vma;
   12789 		  }
   12790 		else
   12791 		  {
   12792 		    dynindx = 0;
   12793 		    addr = 0;
   12794 		  }
   12795 
   12796 		if (bfd_link_pic (info) && dynindx == 0)
   12797 		  abort ();
   12798 
   12799 		/* Replace static FUNCDESC relocation with a
   12800 		   R_ARM_RELATIVE dynamic relocation.  */
   12801 		outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
   12802 		outrel.r_offset = input_section->output_section->vma
   12803 		  + input_section->output_offset + rel->r_offset;
   12804 		outrel.r_addend = 0;
   12805 		if (bfd_link_pic (info))
   12806 		  elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   12807 		else
   12808 		  arm_elf_add_rofixup (output_bfd, globals->srofixup, outrel.r_offset);
   12809 
   12810 		bfd_put_32 (input_bfd, sgot->output_section->vma
   12811 			    + sgot->output_offset + offset, hit_data);
   12812 
   12813 		/* Emit R_ARM_FUNCDESC_VALUE on funcdesc if not done yet.  */
   12814 		arm_elf_fill_funcdesc (output_bfd, info,
   12815 				       &eh->fdpic_cnts.funcdesc_offset,
   12816 				       dynindx, offset, addr, dynreloc_value, seg);
   12817 	      }
   12818 	    else
   12819 	      {
   12820 		Elf_Internal_Rela outrel;
   12821 
   12822 		/* Add a dynamic relocation.  */
   12823 		outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_FUNCDESC);
   12824 		outrel.r_offset = input_section->output_section->vma
   12825 		  + input_section->output_offset + rel->r_offset;
   12826 		outrel.r_addend = 0;
   12827 		elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
   12828 	      }
   12829 	  }
   12830       }
   12831       *unresolved_reloc_p = false;
   12832       return bfd_reloc_ok;
   12833 
   12834     case R_ARM_THM_BF16:
   12835       {
   12836 	bfd_vma relocation;
   12837 	bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
   12838 	bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
   12839 
   12840 	if (globals->use_rel)
   12841 	  {
   12842 	    bfd_vma immA  = (upper_insn & 0x001f);
   12843 	    bfd_vma immB  = (lower_insn & 0x07fe) >> 1;
   12844 	    bfd_vma immC  = (lower_insn & 0x0800) >> 11;
   12845 	    addend  = (immA << 12);
   12846 	    addend |= (immB << 2);
   12847 	    addend |= (immC << 1);
   12848 	    addend |= 1;
   12849 	    /* Sign extend.  */
   12850 	    signed_addend = (addend & 0x10000) ? addend - (1 << 17) : addend;
   12851 	  }
   12852 
   12853 	relocation  = value + signed_addend;
   12854 	relocation -= (input_section->output_section->vma
   12855 		       + input_section->output_offset
   12856 		       + rel->r_offset);
   12857 
   12858 	/* Put RELOCATION back into the insn.  */
   12859 	{
   12860 	  bfd_vma immA = (relocation & 0x0001f000) >> 12;
   12861 	  bfd_vma immB = (relocation & 0x00000ffc) >> 2;
   12862 	  bfd_vma immC = (relocation & 0x00000002) >> 1;
   12863 
   12864 	  upper_insn = (upper_insn & 0xffe0) | immA;
   12865 	  lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
   12866 	}
   12867 
   12868 	/* Put the relocated value back in the object file:  */
   12869 	bfd_put_16 (input_bfd, upper_insn, hit_data);
   12870 	bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
   12871 
   12872 	return bfd_reloc_ok;
   12873       }
   12874 
   12875     case R_ARM_THM_BF12:
   12876       {
   12877 	bfd_vma relocation;
   12878 	bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
   12879 	bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
   12880 
   12881 	if (globals->use_rel)
   12882 	  {
   12883 	    bfd_vma immA  = (upper_insn & 0x0001);
   12884 	    bfd_vma immB  = (lower_insn & 0x07fe) >> 1;
   12885 	    bfd_vma immC  = (lower_insn & 0x0800) >> 11;
   12886 	    addend  = (immA << 12);
   12887 	    addend |= (immB << 2);
   12888 	    addend |= (immC << 1);
   12889 	    addend |= 1;
   12890 	    /* Sign extend.  */
   12891 	    addend = (addend & 0x1000) ? addend - (1 << 13) : addend;
   12892 	    signed_addend = addend;
   12893 	  }
   12894 
   12895 	relocation  = value + signed_addend;
   12896 	relocation -= (input_section->output_section->vma
   12897 		       + input_section->output_offset
   12898 		       + rel->r_offset);
   12899 
   12900 	/* Put RELOCATION back into the insn.  */
   12901 	{
   12902 	  bfd_vma immA = (relocation & 0x00001000) >> 12;
   12903 	  bfd_vma immB = (relocation & 0x00000ffc) >> 2;
   12904 	  bfd_vma immC = (relocation & 0x00000002) >> 1;
   12905 
   12906 	  upper_insn = (upper_insn & 0xfffe) | immA;
   12907 	  lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
   12908 	}
   12909 
   12910 	/* Put the relocated value back in the object file:  */
   12911 	bfd_put_16 (input_bfd, upper_insn, hit_data);
   12912 	bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
   12913 
   12914 	return bfd_reloc_ok;
   12915       }
   12916 
   12917     case R_ARM_THM_BF18:
   12918       {
   12919 	bfd_vma relocation;
   12920 	bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
   12921 	bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
   12922 
   12923 	if (globals->use_rel)
   12924 	  {
   12925 	    bfd_vma immA  = (upper_insn & 0x007f);
   12926 	    bfd_vma immB  = (lower_insn & 0x07fe) >> 1;
   12927 	    bfd_vma immC  = (lower_insn & 0x0800) >> 11;
   12928 	    addend  = (immA << 12);
   12929 	    addend |= (immB << 2);
   12930 	    addend |= (immC << 1);
   12931 	    addend |= 1;
   12932 	    /* Sign extend.  */
   12933 	    addend = (addend & 0x40000) ? addend - (1 << 19) : addend;
   12934 	    signed_addend = addend;
   12935 	  }
   12936 
   12937 	relocation  = value + signed_addend;
   12938 	relocation -= (input_section->output_section->vma
   12939 		       + input_section->output_offset
   12940 		       + rel->r_offset);
   12941 
   12942 	/* Put RELOCATION back into the insn.  */
   12943 	{
   12944 	  bfd_vma immA = (relocation & 0x0007f000) >> 12;
   12945 	  bfd_vma immB = (relocation & 0x00000ffc) >> 2;
   12946 	  bfd_vma immC = (relocation & 0x00000002) >> 1;
   12947 
   12948 	  upper_insn = (upper_insn & 0xff80) | immA;
   12949 	  lower_insn = (lower_insn & 0xf001) | (immC << 11) | (immB << 1);
   12950 	}
   12951 
   12952 	/* Put the relocated value back in the object file:  */
   12953 	bfd_put_16 (input_bfd, upper_insn, hit_data);
   12954 	bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
   12955 
   12956 	return bfd_reloc_ok;
   12957       }
   12958 
   12959     default:
   12960       return bfd_reloc_notsupported;
   12961     }
   12962 }
   12963 
   12964 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS.  */
   12965 static void
   12966 arm_add_to_rel (bfd *		   abfd,
   12967 		bfd_byte *	   address,
   12968 		reloc_howto_type * howto,
   12969 		bfd_signed_vma	   increment)
   12970 {
   12971   bfd_signed_vma addend;
   12972 
   12973   if (howto->type == R_ARM_THM_CALL
   12974       || howto->type == R_ARM_THM_JUMP24)
   12975     {
   12976       int upper_insn, lower_insn;
   12977       int upper, lower;
   12978 
   12979       upper_insn = bfd_get_16 (abfd, address);
   12980       lower_insn = bfd_get_16 (abfd, address + 2);
   12981       upper = upper_insn & 0x7ff;
   12982       lower = lower_insn & 0x7ff;
   12983 
   12984       addend = (upper << 12) | (lower << 1);
   12985       addend += increment;
   12986       addend >>= 1;
   12987 
   12988       upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
   12989       lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
   12990 
   12991       bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
   12992       bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
   12993     }
   12994   else
   12995     {
   12996       bfd_vma	     contents;
   12997 
   12998       contents = bfd_get_32 (abfd, address);
   12999 
   13000       /* Get the (signed) value from the instruction.  */
   13001       addend = contents & howto->src_mask;
   13002       if (addend & ((howto->src_mask + 1) >> 1))
   13003 	{
   13004 	  bfd_signed_vma mask;
   13005 
   13006 	  mask = -1;
   13007 	  mask &= ~ howto->src_mask;
   13008 	  addend |= mask;
   13009 	}
   13010 
   13011       /* Add in the increment, (which is a byte value).  */
   13012       switch (howto->type)
   13013 	{
   13014 	default:
   13015 	  addend += increment;
   13016 	  break;
   13017 
   13018 	case R_ARM_PC24:
   13019 	case R_ARM_PLT32:
   13020 	case R_ARM_CALL:
   13021 	case R_ARM_JUMP24:
   13022 	  addend *= bfd_get_reloc_size (howto);
   13023 	  addend += increment;
   13024 
   13025 	  /* Should we check for overflow here ?  */
   13026 
   13027 	  /* Drop any undesired bits.  */
   13028 	  addend >>= howto->rightshift;
   13029 	  break;
   13030 	}
   13031 
   13032       contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
   13033 
   13034       bfd_put_32 (abfd, contents, address);
   13035     }
   13036 }
   13037 
   13038 #define IS_ARM_TLS_RELOC(R_TYPE)	\
   13039   ((R_TYPE) == R_ARM_TLS_GD32		\
   13040    || (R_TYPE) == R_ARM_TLS_GD32_FDPIC  \
   13041    || (R_TYPE) == R_ARM_TLS_LDO32	\
   13042    || (R_TYPE) == R_ARM_TLS_LDM32	\
   13043    || (R_TYPE) == R_ARM_TLS_LDM32_FDPIC	\
   13044    || (R_TYPE) == R_ARM_TLS_DTPOFF32	\
   13045    || (R_TYPE) == R_ARM_TLS_DTPMOD32	\
   13046    || (R_TYPE) == R_ARM_TLS_TPOFF32	\
   13047    || (R_TYPE) == R_ARM_TLS_LE32	\
   13048    || (R_TYPE) == R_ARM_TLS_IE32	\
   13049    || (R_TYPE) == R_ARM_TLS_IE32_FDPIC	\
   13050    || IS_ARM_TLS_GNU_RELOC (R_TYPE))
   13051 
   13052 /* Specific set of relocations for the gnu tls dialect.  */
   13053 #define IS_ARM_TLS_GNU_RELOC(R_TYPE)	\
   13054   ((R_TYPE) == R_ARM_TLS_GOTDESC	\
   13055    || (R_TYPE) == R_ARM_TLS_CALL	\
   13056    || (R_TYPE) == R_ARM_THM_TLS_CALL	\
   13057    || (R_TYPE) == R_ARM_TLS_DESCSEQ	\
   13058    || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
   13059 
   13060 /* Relocate an ARM ELF section.  */
   13061 
   13062 static int
   13063 elf32_arm_relocate_section (bfd *		   output_bfd,
   13064 			    struct bfd_link_info * info,
   13065 			    bfd *		   input_bfd,
   13066 			    asection *		   input_section,
   13067 			    bfd_byte *		   contents,
   13068 			    Elf_Internal_Rela *	   relocs,
   13069 			    Elf_Internal_Sym *	   local_syms,
   13070 			    asection **		   local_sections)
   13071 {
   13072   Elf_Internal_Shdr *symtab_hdr;
   13073   struct elf_link_hash_entry **sym_hashes;
   13074   Elf_Internal_Rela *rel;
   13075   Elf_Internal_Rela *relend;
   13076   const char *name;
   13077   struct elf32_arm_link_hash_table * globals;
   13078 
   13079   globals = elf32_arm_hash_table (info);
   13080   if (globals == NULL)
   13081     return false;
   13082 
   13083   symtab_hdr = & elf_symtab_hdr (input_bfd);
   13084   sym_hashes = elf_sym_hashes (input_bfd);
   13085 
   13086   rel = relocs;
   13087   relend = relocs + input_section->reloc_count;
   13088   for (; rel < relend; rel++)
   13089     {
   13090       int			   r_type;
   13091       reloc_howto_type *	   howto;
   13092       unsigned long		   r_symndx;
   13093       Elf_Internal_Sym *	   sym;
   13094       asection *		   sec;
   13095       struct elf_link_hash_entry * h;
   13096       bfd_vma			   relocation;
   13097       bfd_reloc_status_type	   r;
   13098       arelent			   bfd_reloc;
   13099       char			   sym_type;
   13100       bool			   unresolved_reloc = false;
   13101       char *error_message = NULL;
   13102 
   13103       r_symndx = ELF32_R_SYM (rel->r_info);
   13104       r_type   = ELF32_R_TYPE (rel->r_info);
   13105       r_type   = arm_real_reloc_type (globals, r_type);
   13106 
   13107       if (   r_type == R_ARM_GNU_VTENTRY
   13108 	  || r_type == R_ARM_GNU_VTINHERIT)
   13109 	continue;
   13110 
   13111       howto = bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
   13112 
   13113       if (howto == NULL)
   13114 	return _bfd_unrecognized_reloc (input_bfd, input_section, r_type);
   13115 
   13116       h = NULL;
   13117       sym = NULL;
   13118       sec = NULL;
   13119 
   13120       if (r_symndx < symtab_hdr->sh_info)
   13121 	{
   13122 	  sym = local_syms + r_symndx;
   13123 	  sym_type = ELF32_ST_TYPE (sym->st_info);
   13124 	  sec = local_sections[r_symndx];
   13125 
   13126 	  /* An object file might have a reference to a local
   13127 	     undefined symbol.  This is a daft object file, but we
   13128 	     should at least do something about it.  V4BX & NONE
   13129 	     relocations do not use the symbol and are explicitly
   13130 	     allowed to use the undefined symbol, so allow those.
   13131 	     Likewise for relocations against STN_UNDEF.  */
   13132 	  if (r_type != R_ARM_V4BX
   13133 	      && r_type != R_ARM_NONE
   13134 	      && r_symndx != STN_UNDEF
   13135 	      && bfd_is_und_section (sec)
   13136 	      && ELF_ST_BIND (sym->st_info) != STB_WEAK)
   13137 	    (*info->callbacks->undefined_symbol)
   13138 	      (info, bfd_elf_string_from_elf_section
   13139 	       (input_bfd, symtab_hdr->sh_link, sym->st_name),
   13140 	       input_bfd, input_section,
   13141 	       rel->r_offset, true);
   13142 
   13143 	  if (globals->use_rel)
   13144 	    {
   13145 	      relocation = (sec->output_section->vma
   13146 			    + sec->output_offset
   13147 			    + sym->st_value);
   13148 	      if (!bfd_link_relocatable (info)
   13149 		  && (sec->flags & SEC_MERGE)
   13150 		  && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
   13151 		{
   13152 		  asection *msec;
   13153 		  bfd_vma addend, value;
   13154 
   13155 		  switch (r_type)
   13156 		    {
   13157 		    case R_ARM_MOVW_ABS_NC:
   13158 		    case R_ARM_MOVT_ABS:
   13159 		      value = bfd_get_32 (input_bfd, contents + rel->r_offset);
   13160 		      addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
   13161 		      addend = (addend ^ 0x8000) - 0x8000;
   13162 		      break;
   13163 
   13164 		    case R_ARM_THM_MOVW_ABS_NC:
   13165 		    case R_ARM_THM_MOVT_ABS:
   13166 		      value = bfd_get_16 (input_bfd, contents + rel->r_offset)
   13167 			      << 16;
   13168 		      value |= bfd_get_16 (input_bfd,
   13169 					   contents + rel->r_offset + 2);
   13170 		      addend = ((value & 0xf7000) >> 4) | (value & 0xff)
   13171 			       | ((value & 0x04000000) >> 15);
   13172 		      addend = (addend ^ 0x8000) - 0x8000;
   13173 		      break;
   13174 
   13175 		    default:
   13176 		      if (howto->rightshift
   13177 			  || (howto->src_mask & (howto->src_mask + 1)))
   13178 			{
   13179 			  _bfd_error_handler
   13180 			    /* xgettext:c-format */
   13181 			    (_("%pB(%pA+%#" PRIx64 "): "
   13182 			       "%s relocation against SEC_MERGE section"),
   13183 			     input_bfd, input_section,
   13184 			     (uint64_t) rel->r_offset, howto->name);
   13185 			  return false;
   13186 			}
   13187 
   13188 		      value = bfd_get_32 (input_bfd, contents + rel->r_offset);
   13189 
   13190 		      /* Get the (signed) value from the instruction.  */
   13191 		      addend = value & howto->src_mask;
   13192 		      if (addend & ((howto->src_mask + 1) >> 1))
   13193 			{
   13194 			  bfd_signed_vma mask;
   13195 
   13196 			  mask = -1;
   13197 			  mask &= ~ howto->src_mask;
   13198 			  addend |= mask;
   13199 			}
   13200 		      break;
   13201 		    }
   13202 
   13203 		  msec = sec;
   13204 		  addend =
   13205 		    _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
   13206 		    - relocation;
   13207 		  addend += msec->output_section->vma + msec->output_offset;
   13208 
   13209 		  /* Cases here must match those in the preceding
   13210 		     switch statement.  */
   13211 		  switch (r_type)
   13212 		    {
   13213 		    case R_ARM_MOVW_ABS_NC:
   13214 		    case R_ARM_MOVT_ABS:
   13215 		      value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
   13216 			      | (addend & 0xfff);
   13217 		      bfd_put_32 (input_bfd, value, contents + rel->r_offset);
   13218 		      break;
   13219 
   13220 		    case R_ARM_THM_MOVW_ABS_NC:
   13221 		    case R_ARM_THM_MOVT_ABS:
   13222 		      value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
   13223 			      | (addend & 0xff) | ((addend & 0x0800) << 15);
   13224 		      bfd_put_16 (input_bfd, value >> 16,
   13225 				  contents + rel->r_offset);
   13226 		      bfd_put_16 (input_bfd, value,
   13227 				  contents + rel->r_offset + 2);
   13228 		      break;
   13229 
   13230 		    default:
   13231 		      value = (value & ~ howto->dst_mask)
   13232 			      | (addend & howto->dst_mask);
   13233 		      bfd_put_32 (input_bfd, value, contents + rel->r_offset);
   13234 		      break;
   13235 		    }
   13236 		}
   13237 	    }
   13238 	  else
   13239 	    relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
   13240 	}
   13241       else
   13242 	{
   13243 	  bool warned, ignored;
   13244 
   13245 	  RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
   13246 				   r_symndx, symtab_hdr, sym_hashes,
   13247 				   h, sec, relocation,
   13248 				   unresolved_reloc, warned, ignored);
   13249 
   13250 	  sym_type = h->type;
   13251 	}
   13252 
   13253       if (sec != NULL && discarded_section (sec))
   13254 	RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
   13255 					 rel, 1, relend, R_ARM_NONE,
   13256 					 howto, 0, contents);
   13257 
   13258       if (bfd_link_relocatable (info))
   13259 	{
   13260 	  /* This is a relocatable link.  We don't have to change
   13261 	     anything, unless the reloc is against a section symbol,
   13262 	     in which case we have to adjust according to where the
   13263 	     section symbol winds up in the output section.  */
   13264 	  if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
   13265 	    {
   13266 	      if (globals->use_rel)
   13267 		arm_add_to_rel (input_bfd, contents + rel->r_offset,
   13268 				howto, (bfd_signed_vma) sec->output_offset);
   13269 	      else
   13270 		rel->r_addend += sec->output_offset;
   13271 	    }
   13272 	  continue;
   13273 	}
   13274 
   13275       if (h != NULL)
   13276 	name = h->root.root.string;
   13277       else
   13278 	{
   13279 	  name = (bfd_elf_string_from_elf_section
   13280 		  (input_bfd, symtab_hdr->sh_link, sym->st_name));
   13281 	  if (name == NULL || *name == '\0')
   13282 	    name = bfd_section_name (sec);
   13283 	}
   13284 
   13285       if (r_symndx != STN_UNDEF
   13286 	  && r_type != R_ARM_NONE
   13287 	  && (h == NULL
   13288 	      || h->root.type == bfd_link_hash_defined
   13289 	      || h->root.type == bfd_link_hash_defweak)
   13290 	  && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
   13291 	{
   13292 	  _bfd_error_handler
   13293 	    ((sym_type == STT_TLS
   13294 	      /* xgettext:c-format */
   13295 	      ? _("%pB(%pA+%#" PRIx64 "): %s used with TLS symbol %s")
   13296 	      /* xgettext:c-format */
   13297 	      : _("%pB(%pA+%#" PRIx64 "): %s used with non-TLS symbol %s")),
   13298 	     input_bfd,
   13299 	     input_section,
   13300 	     (uint64_t) rel->r_offset,
   13301 	     howto->name,
   13302 	     name);
   13303 	}
   13304 
   13305       /* We call elf32_arm_final_link_relocate unless we're completely
   13306 	 done, i.e., the relaxation produced the final output we want,
   13307 	 and we won't let anybody mess with it. Also, we have to do
   13308 	 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
   13309 	 both in relaxed and non-relaxed cases.  */
   13310       if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
   13311 	  || (IS_ARM_TLS_GNU_RELOC (r_type)
   13312 	      && !((h ? elf32_arm_hash_entry (h)->tls_type :
   13313 		    elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
   13314 		   & GOT_TLS_GDESC)))
   13315 	{
   13316 	  r = elf32_arm_tls_relax (globals, input_bfd, input_section,
   13317 				   contents, rel, h == NULL);
   13318 	  /* This may have been marked unresolved because it came from
   13319 	     a shared library.  But we've just dealt with that.  */
   13320 	  unresolved_reloc = 0;
   13321 	}
   13322       else
   13323 	r = bfd_reloc_continue;
   13324 
   13325       if (r == bfd_reloc_continue)
   13326 	{
   13327 	  unsigned char branch_type =
   13328 	    h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
   13329 	      : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
   13330 
   13331 	  r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
   13332 					     input_section, contents, rel,
   13333 					     relocation, info, sec, name,
   13334 					     sym_type, branch_type, h,
   13335 					     &unresolved_reloc,
   13336 					     &error_message);
   13337 	}
   13338 
   13339       /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
   13340 	 because such sections are not SEC_ALLOC and thus ld.so will
   13341 	 not process them.  */
   13342       if (unresolved_reloc
   13343 	  && !((input_section->flags & SEC_DEBUGGING) != 0
   13344 	       && h->def_dynamic)
   13345 	  && _bfd_elf_section_offset (output_bfd, info, input_section,
   13346 				      rel->r_offset) != (bfd_vma) -1)
   13347 	{
   13348 	  _bfd_error_handler
   13349 	    /* xgettext:c-format */
   13350 	    (_("%pB(%pA+%#" PRIx64 "): "
   13351 	       "unresolvable %s relocation against symbol `%s'"),
   13352 	     input_bfd,
   13353 	     input_section,
   13354 	     (uint64_t) rel->r_offset,
   13355 	     howto->name,
   13356 	     h->root.root.string);
   13357 	  return false;
   13358 	}
   13359 
   13360       if (r != bfd_reloc_ok)
   13361 	{
   13362 	  switch (r)
   13363 	    {
   13364 	    case bfd_reloc_overflow:
   13365 	      /* If the overflowing reloc was to an undefined symbol,
   13366 		 we have already printed one error message and there
   13367 		 is no point complaining again.  */
   13368 	      if (!h || h->root.type != bfd_link_hash_undefined)
   13369 		(*info->callbacks->reloc_overflow)
   13370 		  (info, (h ? &h->root : NULL), name, howto->name,
   13371 		   (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
   13372 	      break;
   13373 
   13374 	    case bfd_reloc_undefined:
   13375 	      (*info->callbacks->undefined_symbol)
   13376 		(info, name, input_bfd, input_section, rel->r_offset, true);
   13377 	      break;
   13378 
   13379 	    case bfd_reloc_outofrange:
   13380 	      error_message = _("out of range");
   13381 	      goto common_error;
   13382 
   13383 	    case bfd_reloc_notsupported:
   13384 	      error_message = _("unsupported relocation");
   13385 	      goto common_error;
   13386 
   13387 	    case bfd_reloc_dangerous:
   13388 	      /* error_message should already be set.  */
   13389 	      goto common_error;
   13390 
   13391 	    default:
   13392 	      error_message = _("unknown error");
   13393 	      /* Fall through.  */
   13394 
   13395 	    common_error:
   13396 	      BFD_ASSERT (error_message != NULL);
   13397 	      (*info->callbacks->reloc_dangerous)
   13398 		(info, error_message, input_bfd, input_section, rel->r_offset);
   13399 	      break;
   13400 	    }
   13401 	}
   13402     }
   13403 
   13404   return true;
   13405 }
   13406 
   13407 /* Add a new unwind edit to the list described by HEAD, TAIL.  If TINDEX is zero,
   13408    adds the edit to the start of the list.  (The list must be built in order of
   13409    ascending TINDEX: the function's callers are primarily responsible for
   13410    maintaining that condition).  */
   13411 
   13412 static void
   13413 add_unwind_table_edit (arm_unwind_table_edit **head,
   13414 		       arm_unwind_table_edit **tail,
   13415 		       arm_unwind_edit_type type,
   13416 		       asection *linked_section,
   13417 		       unsigned int tindex)
   13418 {
   13419   arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
   13420       xmalloc (sizeof (arm_unwind_table_edit));
   13421 
   13422   new_edit->type = type;
   13423   new_edit->linked_section = linked_section;
   13424   new_edit->index = tindex;
   13425 
   13426   if (tindex > 0)
   13427     {
   13428       new_edit->next = NULL;
   13429 
   13430       if (*tail)
   13431 	(*tail)->next = new_edit;
   13432 
   13433       (*tail) = new_edit;
   13434 
   13435       if (!*head)
   13436 	(*head) = new_edit;
   13437     }
   13438   else
   13439     {
   13440       new_edit->next = *head;
   13441 
   13442       if (!*tail)
   13443 	*tail = new_edit;
   13444 
   13445       *head = new_edit;
   13446     }
   13447 }
   13448 
   13449 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
   13450 
   13451 /* Increase the size of EXIDX_SEC by ADJUST bytes.  ADJUST mau be negative.  */
   13452 
   13453 static void
   13454 adjust_exidx_size (asection *exidx_sec, int adjust)
   13455 {
   13456   asection *out_sec;
   13457 
   13458   if (!exidx_sec->rawsize)
   13459     exidx_sec->rawsize = exidx_sec->size;
   13460 
   13461   bfd_set_section_size (exidx_sec, exidx_sec->size + adjust);
   13462   out_sec = exidx_sec->output_section;
   13463   /* Adjust size of output section.  */
   13464   bfd_set_section_size (out_sec, out_sec->size + adjust);
   13465 }
   13466 
   13467 /* Insert an EXIDX_CANTUNWIND marker at the end of a section.  */
   13468 
   13469 static void
   13470 insert_cantunwind_after (asection *text_sec, asection *exidx_sec)
   13471 {
   13472   struct _arm_elf_section_data *exidx_arm_data;
   13473 
   13474   exidx_arm_data = get_arm_elf_section_data (exidx_sec);
   13475   add_unwind_table_edit
   13476     (&exidx_arm_data->u.exidx.unwind_edit_list,
   13477      &exidx_arm_data->u.exidx.unwind_edit_tail,
   13478      INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
   13479 
   13480   exidx_arm_data->additional_reloc_count++;
   13481 
   13482   adjust_exidx_size (exidx_sec, 8);
   13483 }
   13484 
   13485 /* Scan .ARM.exidx tables, and create a list describing edits which should be
   13486    made to those tables, such that:
   13487 
   13488      1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
   13489      2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
   13490 	codes which have been inlined into the index).
   13491 
   13492    If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
   13493 
   13494    The edits are applied when the tables are written
   13495    (in elf32_arm_write_section).  */
   13496 
   13497 bool
   13498 elf32_arm_fix_exidx_coverage (asection **text_section_order,
   13499 			      unsigned int num_text_sections,
   13500 			      struct bfd_link_info *info,
   13501 			      bool merge_exidx_entries)
   13502 {
   13503   bfd *inp;
   13504   unsigned int last_second_word = 0, i;
   13505   asection *last_exidx_sec = NULL;
   13506   asection *last_text_sec = NULL;
   13507   int last_unwind_type = -1;
   13508 
   13509   /* Walk over all EXIDX sections, and create backlinks from the corrsponding
   13510      text sections.  */
   13511   for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
   13512     {
   13513       asection *sec;
   13514 
   13515       for (sec = inp->sections; sec != NULL; sec = sec->next)
   13516 	{
   13517 	  struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
   13518 	  Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
   13519 
   13520 	  if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
   13521 	    continue;
   13522 
   13523 	  if (elf_sec->linked_to)
   13524 	    {
   13525 	      Elf_Internal_Shdr *linked_hdr
   13526 		= &elf_section_data (elf_sec->linked_to)->this_hdr;
   13527 	      struct _arm_elf_section_data *linked_sec_arm_data
   13528 		= get_arm_elf_section_data (linked_hdr->bfd_section);
   13529 
   13530 	      if (linked_sec_arm_data == NULL)
   13531 		continue;
   13532 
   13533 	      /* Link this .ARM.exidx section back from the text section it
   13534 		 describes.  */
   13535 	      linked_sec_arm_data->u.text.arm_exidx_sec = sec;
   13536 	    }
   13537 	}
   13538     }
   13539 
   13540   /* Walk all text sections in order of increasing VMA.  Eilminate duplicate
   13541      index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
   13542      and add EXIDX_CANTUNWIND entries for sections with no unwind table data.  */
   13543 
   13544   for (i = 0; i < num_text_sections; i++)
   13545     {
   13546       asection *sec = text_section_order[i];
   13547       asection *exidx_sec;
   13548       struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
   13549       struct _arm_elf_section_data *exidx_arm_data;
   13550       bfd_byte *contents = NULL;
   13551       int deleted_exidx_bytes = 0;
   13552       bfd_vma j;
   13553       arm_unwind_table_edit *unwind_edit_head = NULL;
   13554       arm_unwind_table_edit *unwind_edit_tail = NULL;
   13555       Elf_Internal_Shdr *hdr;
   13556       bfd *ibfd;
   13557 
   13558       if (arm_data == NULL)
   13559 	continue;
   13560 
   13561       exidx_sec = arm_data->u.text.arm_exidx_sec;
   13562       if (exidx_sec == NULL)
   13563 	{
   13564 	  /* Section has no unwind data.  */
   13565 	  if (last_unwind_type == 0 || !last_exidx_sec)
   13566 	    continue;
   13567 
   13568 	  /* Ignore zero sized sections.  */
   13569 	  if (sec->size == 0)
   13570 	    continue;
   13571 
   13572 	  insert_cantunwind_after (last_text_sec, last_exidx_sec);
   13573 	  last_unwind_type = 0;
   13574 	  continue;
   13575 	}
   13576 
   13577       /* Skip /DISCARD/ sections.  */
   13578       if (bfd_is_abs_section (exidx_sec->output_section))
   13579 	continue;
   13580 
   13581       hdr = &elf_section_data (exidx_sec)->this_hdr;
   13582       if (hdr->sh_type != SHT_ARM_EXIDX)
   13583 	continue;
   13584 
   13585       exidx_arm_data = get_arm_elf_section_data (exidx_sec);
   13586       if (exidx_arm_data == NULL)
   13587 	continue;
   13588 
   13589       ibfd = exidx_sec->owner;
   13590 
   13591       if (hdr->contents != NULL)
   13592 	contents = hdr->contents;
   13593       else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
   13594 	/* An error?  */
   13595 	continue;
   13596 
   13597       if (last_unwind_type > 0)
   13598 	{
   13599 	  unsigned int first_word = bfd_get_32 (ibfd, contents);
   13600 	  /* Add cantunwind if first unwind item does not match section
   13601 	     start.  */
   13602 	  if (first_word != sec->vma)
   13603 	    {
   13604 	      insert_cantunwind_after (last_text_sec, last_exidx_sec);
   13605 	      last_unwind_type = 0;
   13606 	    }
   13607 	}
   13608 
   13609       for (j = 0; j < hdr->sh_size; j += 8)
   13610 	{
   13611 	  unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
   13612 	  int unwind_type;
   13613 	  int elide = 0;
   13614 
   13615 	  /* An EXIDX_CANTUNWIND entry.  */
   13616 	  if (second_word == 1)
   13617 	    {
   13618 	      if (last_unwind_type == 0)
   13619 		elide = 1;
   13620 	      unwind_type = 0;
   13621 	    }
   13622 	  /* Inlined unwinding data.  Merge if equal to previous.  */
   13623 	  else if ((second_word & 0x80000000) != 0)
   13624 	    {
   13625 	      if (merge_exidx_entries
   13626 		   && last_second_word == second_word && last_unwind_type == 1)
   13627 		elide = 1;
   13628 	      unwind_type = 1;
   13629 	      last_second_word = second_word;
   13630 	    }
   13631 	  /* Normal table entry.  In theory we could merge these too,
   13632 	     but duplicate entries are likely to be much less common.  */
   13633 	  else
   13634 	    unwind_type = 2;
   13635 
   13636 	  if (elide && !bfd_link_relocatable (info))
   13637 	    {
   13638 	      add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
   13639 				     DELETE_EXIDX_ENTRY, NULL, j / 8);
   13640 
   13641 	      deleted_exidx_bytes += 8;
   13642 	    }
   13643 
   13644 	  last_unwind_type = unwind_type;
   13645 	}
   13646 
   13647       /* Free contents if we allocated it ourselves.  */
   13648       if (contents != hdr->contents)
   13649 	free (contents);
   13650 
   13651       /* Record edits to be applied later (in elf32_arm_write_section).  */
   13652       exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
   13653       exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
   13654 
   13655       if (deleted_exidx_bytes > 0)
   13656 	adjust_exidx_size (exidx_sec, - deleted_exidx_bytes);
   13657 
   13658       last_exidx_sec = exidx_sec;
   13659       last_text_sec = sec;
   13660     }
   13661 
   13662   /* Add terminating CANTUNWIND entry.  */
   13663   if (!bfd_link_relocatable (info) && last_exidx_sec
   13664       && last_unwind_type != 0)
   13665     insert_cantunwind_after (last_text_sec, last_exidx_sec);
   13666 
   13667   return true;
   13668 }
   13669 
   13670 static bool
   13671 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
   13672 			       bfd *ibfd, const char *name)
   13673 {
   13674   asection *sec, *osec;
   13675 
   13676   sec = bfd_get_linker_section (ibfd, name);
   13677   if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
   13678     return true;
   13679 
   13680   osec = sec->output_section;
   13681   if (elf32_arm_write_section (obfd, info, sec, sec->contents))
   13682     return true;
   13683 
   13684   if (! bfd_set_section_contents (obfd, osec, sec->contents,
   13685 				  sec->output_offset, sec->size))
   13686     return false;
   13687 
   13688   return true;
   13689 }
   13690 
   13691 static bool
   13692 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
   13693 {
   13694   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
   13695   asection *sec, *osec;
   13696 
   13697   if (globals == NULL)
   13698     return false;
   13699 
   13700   /* Invoke the regular ELF backend linker to do all the work.  */
   13701   if (!_bfd_elf_final_link (abfd, info))
   13702     return false;
   13703 
   13704   /* Process stub sections (eg BE8 encoding, ...).  */
   13705   struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
   13706   unsigned int i;
   13707   for (i=0; i<htab->top_id; i++)
   13708     {
   13709       sec = htab->stub_group[i].stub_sec;
   13710       /* Only process it once, in its link_sec slot.  */
   13711       if (sec && i == htab->stub_group[i].link_sec->id)
   13712 	{
   13713 	  osec = sec->output_section;
   13714 	  elf32_arm_write_section (abfd, info, sec, sec->contents);
   13715 	  if (! bfd_set_section_contents (abfd, osec, sec->contents,
   13716 					  sec->output_offset, sec->size))
   13717 	    return false;
   13718 	}
   13719     }
   13720 
   13721   /* Write out any glue sections now that we have created all the
   13722      stubs.  */
   13723   if (globals->bfd_of_glue_owner != NULL)
   13724     {
   13725       if (! elf32_arm_output_glue_section (info, abfd,
   13726 					   globals->bfd_of_glue_owner,
   13727 					   ARM2THUMB_GLUE_SECTION_NAME))
   13728 	return false;
   13729 
   13730       if (! elf32_arm_output_glue_section (info, abfd,
   13731 					   globals->bfd_of_glue_owner,
   13732 					   THUMB2ARM_GLUE_SECTION_NAME))
   13733 	return false;
   13734 
   13735       if (! elf32_arm_output_glue_section (info, abfd,
   13736 					   globals->bfd_of_glue_owner,
   13737 					   VFP11_ERRATUM_VENEER_SECTION_NAME))
   13738 	return false;
   13739 
   13740       if (! elf32_arm_output_glue_section (info, abfd,
   13741 					   globals->bfd_of_glue_owner,
   13742 					   STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
   13743 	return false;
   13744 
   13745       if (! elf32_arm_output_glue_section (info, abfd,
   13746 					   globals->bfd_of_glue_owner,
   13747 					   ARM_BX_GLUE_SECTION_NAME))
   13748 	return false;
   13749     }
   13750 
   13751   return true;
   13752 }
   13753 
   13754 /* Return a best guess for the machine number based on the attributes.  */
   13755 
   13756 static unsigned int
   13757 bfd_arm_get_mach_from_attributes (bfd * abfd)
   13758 {
   13759   int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
   13760 
   13761   switch (arch)
   13762     {
   13763     case TAG_CPU_ARCH_PRE_V4: return bfd_mach_arm_3M;
   13764     case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
   13765     case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
   13766     case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
   13767 
   13768     case TAG_CPU_ARCH_V5TE:
   13769       {
   13770 	char * name;
   13771 
   13772 	BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
   13773 	name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
   13774 
   13775 	if (name)
   13776 	  {
   13777 	    if (strcmp (name, "IWMMXT2") == 0)
   13778 	      return bfd_mach_arm_iWMMXt2;
   13779 
   13780 	    if (strcmp (name, "IWMMXT") == 0)
   13781 	      return bfd_mach_arm_iWMMXt;
   13782 
   13783 	    if (strcmp (name, "XSCALE") == 0)
   13784 	      {
   13785 		int wmmx;
   13786 
   13787 		BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
   13788 		wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
   13789 		switch (wmmx)
   13790 		  {
   13791 		  case 1: return bfd_mach_arm_iWMMXt;
   13792 		  case 2: return bfd_mach_arm_iWMMXt2;
   13793 		  default: return bfd_mach_arm_XScale;
   13794 		  }
   13795 	      }
   13796 	  }
   13797 
   13798 	return bfd_mach_arm_5TE;
   13799       }
   13800 
   13801     case TAG_CPU_ARCH_V5TEJ:
   13802 	return bfd_mach_arm_5TEJ;
   13803     case TAG_CPU_ARCH_V6:
   13804 	return bfd_mach_arm_6;
   13805     case TAG_CPU_ARCH_V6KZ:
   13806 	return bfd_mach_arm_6KZ;
   13807     case TAG_CPU_ARCH_V6T2:
   13808 	return bfd_mach_arm_6T2;
   13809     case TAG_CPU_ARCH_V6K:
   13810 	return bfd_mach_arm_6K;
   13811     case TAG_CPU_ARCH_V7:
   13812 	return bfd_mach_arm_7;
   13813     case TAG_CPU_ARCH_V6_M:
   13814 	return bfd_mach_arm_6M;
   13815     case TAG_CPU_ARCH_V6S_M:
   13816 	return bfd_mach_arm_6SM;
   13817     case TAG_CPU_ARCH_V7E_M:
   13818 	return bfd_mach_arm_7EM;
   13819     case TAG_CPU_ARCH_V8:
   13820 	return bfd_mach_arm_8;
   13821     case TAG_CPU_ARCH_V8R:
   13822 	return bfd_mach_arm_8R;
   13823     case TAG_CPU_ARCH_V8M_BASE:
   13824 	return bfd_mach_arm_8M_BASE;
   13825     case TAG_CPU_ARCH_V8M_MAIN:
   13826 	return bfd_mach_arm_8M_MAIN;
   13827     case TAG_CPU_ARCH_V8_1M_MAIN:
   13828 	return bfd_mach_arm_8_1M_MAIN;
   13829     case TAG_CPU_ARCH_V9:
   13830 	return bfd_mach_arm_9;
   13831 
   13832     default:
   13833       /* Force entry to be added for any new known Tag_CPU_arch value.  */
   13834       BFD_ASSERT (arch > MAX_TAG_CPU_ARCH);
   13835 
   13836       /* Unknown Tag_CPU_arch value.  */
   13837       return bfd_mach_arm_unknown;
   13838     }
   13839 }
   13840 
   13841 /* Set the right machine number.  */
   13842 
   13843 static bool
   13844 elf32_arm_object_p (bfd *abfd)
   13845 {
   13846   unsigned int mach;
   13847 
   13848   mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
   13849 
   13850   if (mach == bfd_mach_arm_unknown)
   13851     mach = bfd_arm_get_mach_from_attributes (abfd);
   13852 
   13853   bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
   13854   return true;
   13855 }
   13856 
   13857 /* Function to keep ARM specific flags in the ELF header.  */
   13858 
   13859 static bool
   13860 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
   13861 {
   13862   if (elf_flags_init (abfd)
   13863       && elf_elfheader (abfd)->e_flags != flags)
   13864     {
   13865       if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
   13866 	{
   13867 	  if (flags & EF_ARM_INTERWORK)
   13868 	    _bfd_error_handler
   13869 	      (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"),
   13870 	       abfd);
   13871 	  else
   13872 	    _bfd_error_handler
   13873 	      (_("warning: clearing the interworking flag of %pB due to outside request"),
   13874 	       abfd);
   13875 	}
   13876     }
   13877   else
   13878     {
   13879       elf_elfheader (abfd)->e_flags = flags;
   13880       elf_flags_init (abfd) = true;
   13881     }
   13882 
   13883   return true;
   13884 }
   13885 
   13886 /* Copy backend specific data from one object module to another.  */
   13887 
   13888 static bool
   13889 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
   13890 {
   13891   flagword in_flags;
   13892   flagword out_flags;
   13893 
   13894   if (! is_arm_elf (ibfd))
   13895     return true;
   13896 
   13897   in_flags  = elf_elfheader (ibfd)->e_flags;
   13898   out_flags = elf_elfheader (obfd)->e_flags;
   13899 
   13900   if (elf_flags_init (obfd)
   13901       && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
   13902       && in_flags != out_flags)
   13903     {
   13904       /* Cannot mix APCS26 and APCS32 code.  */
   13905       if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
   13906 	return false;
   13907 
   13908       /* Cannot mix float APCS and non-float APCS code.  */
   13909       if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
   13910 	return false;
   13911 
   13912       /* If the src and dest have different interworking flags
   13913 	 then turn off the interworking bit.  */
   13914       if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
   13915 	{
   13916 	  if (out_flags & EF_ARM_INTERWORK)
   13917 	    _bfd_error_handler
   13918 	      (_("warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"),
   13919 	       obfd, ibfd);
   13920 
   13921 	  in_flags &= ~EF_ARM_INTERWORK;
   13922 	}
   13923 
   13924       /* Likewise for PIC, though don't warn for this case.  */
   13925       if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
   13926 	in_flags &= ~EF_ARM_PIC;
   13927     }
   13928 
   13929   elf_elfheader (obfd)->e_flags = in_flags;
   13930   elf_flags_init (obfd) = true;
   13931 
   13932   return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
   13933 }
   13934 
   13935 /* Values for Tag_ABI_PCS_R9_use.  */
   13936 enum
   13937 {
   13938   AEABI_R9_V6,
   13939   AEABI_R9_SB,
   13940   AEABI_R9_TLS,
   13941   AEABI_R9_unused
   13942 };
   13943 
   13944 /* Values for Tag_ABI_PCS_RW_data.  */
   13945 enum
   13946 {
   13947   AEABI_PCS_RW_data_absolute,
   13948   AEABI_PCS_RW_data_PCrel,
   13949   AEABI_PCS_RW_data_SBrel,
   13950   AEABI_PCS_RW_data_unused
   13951 };
   13952 
   13953 /* Values for Tag_ABI_enum_size.  */
   13954 enum
   13955 {
   13956   AEABI_enum_unused,
   13957   AEABI_enum_short,
   13958   AEABI_enum_wide,
   13959   AEABI_enum_forced_wide
   13960 };
   13961 
   13962 /* Determine whether an object attribute tag takes an integer, a
   13963    string or both.  */
   13964 
   13965 static int
   13966 elf32_arm_obj_attrs_arg_type (obj_attr_tag_t tag)
   13967 {
   13968   if (tag == Tag_compatibility)
   13969     return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
   13970   else if (tag == Tag_nodefaults)
   13971     return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
   13972   else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
   13973     return ATTR_TYPE_FLAG_STR_VAL;
   13974   else if (tag < 32)
   13975     return ATTR_TYPE_FLAG_INT_VAL;
   13976   else
   13977     return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
   13978 }
   13979 
   13980 /* The ABI defines that Tag_conformance should be emitted first, and that
   13981    Tag_nodefaults should be second (if either is defined).  This sets those
   13982    two positions, and bumps up the position of all the remaining tags to
   13983    compensate.  */
   13984 static int
   13985 elf32_arm_obj_attrs_order (int num)
   13986 {
   13987   if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
   13988     return Tag_conformance;
   13989   if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
   13990     return Tag_nodefaults;
   13991   if ((num - 2) < Tag_nodefaults)
   13992     return num - 2;
   13993   if ((num - 1) < Tag_conformance)
   13994     return num - 1;
   13995   return num;
   13996 }
   13997 
   13998 /* Attribute numbers >=64 (mod 128) can be safely ignored.  */
   13999 static bool
   14000 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
   14001 {
   14002   if ((tag & 127) < 64)
   14003     {
   14004       _bfd_error_handler
   14005 	(_("%pB: unknown mandatory EABI object attribute %d"),
   14006 	 abfd, tag);
   14007       bfd_set_error (bfd_error_bad_value);
   14008       return false;
   14009     }
   14010   else
   14011     {
   14012       _bfd_error_handler
   14013 	(_("warning: %pB: unknown EABI object attribute %d"),
   14014 	 abfd, tag);
   14015       return true;
   14016     }
   14017 }
   14018 
   14019 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
   14020    Returns -1 if no architecture could be read.  */
   14021 
   14022 static int
   14023 get_secondary_compatible_arch (bfd *abfd)
   14024 {
   14025   obj_attribute *attr =
   14026     &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
   14027 
   14028   /* Note: the tag and its argument below are uleb128 values, though
   14029      currently-defined values fit in one byte for each.  */
   14030   if (attr->s
   14031       && attr->s[0] == Tag_CPU_arch
   14032       && (attr->s[1] & 128) != 128
   14033       && attr->s[2] == 0)
   14034    return attr->s[1];
   14035 
   14036   /* This tag is "safely ignorable", so don't complain if it looks funny.  */
   14037   return -1;
   14038 }
   14039 
   14040 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
   14041    The tag is removed if ARCH is -1.  */
   14042 
   14043 static void
   14044 set_secondary_compatible_arch (bfd *abfd, int arch)
   14045 {
   14046   obj_attribute *attr =
   14047     &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
   14048 
   14049   if (arch == -1)
   14050     {
   14051       attr->s = NULL;
   14052       return;
   14053     }
   14054 
   14055   /* Note: the tag and its argument below are uleb128 values, though
   14056      currently-defined values fit in one byte for each.  */
   14057   if (!attr->s)
   14058     attr->s = (char *) bfd_alloc (abfd, 3);
   14059   attr->s[0] = Tag_CPU_arch;
   14060   attr->s[1] = arch;
   14061   attr->s[2] = '\0';
   14062 }
   14063 
   14064 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
   14065    into account.  */
   14066 
   14067 static int
   14068 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
   14069 		      int newtag, int secondary_compat,
   14070 		      const char *const name_table[])
   14071 {
   14072 #define T(X) TAG_CPU_ARCH_##X
   14073   int tagl, tagh, result;
   14074   static const int v6t2[] =
   14075     {
   14076       T(V6T2),   /* PRE_V4.  */
   14077       T(V6T2),   /* V4.  */
   14078       T(V6T2),   /* V4T.  */
   14079       T(V6T2),   /* V5T.  */
   14080       T(V6T2),   /* V5TE.  */
   14081       T(V6T2),   /* V5TEJ.  */
   14082       T(V6T2),   /* V6.  */
   14083       T(V7),     /* V6KZ.  */
   14084       T(V6T2)    /* V6T2.  */
   14085     };
   14086   static const int v6k[] =
   14087     {
   14088       T(V6K),    /* PRE_V4.  */
   14089       T(V6K),    /* V4.  */
   14090       T(V6K),    /* V4T.  */
   14091       T(V6K),    /* V5T.  */
   14092       T(V6K),    /* V5TE.  */
   14093       T(V6K),    /* V5TEJ.  */
   14094       T(V6K),    /* V6.  */
   14095       T(V6KZ),   /* V6KZ.  */
   14096       T(V7),     /* V6T2.  */
   14097       T(V6K)     /* V6K.  */
   14098     };
   14099   static const int v7[] =
   14100     {
   14101       T(V7),     /* PRE_V4.  */
   14102       T(V7),     /* V4.  */
   14103       T(V7),     /* V4T.  */
   14104       T(V7),     /* V5T.  */
   14105       T(V7),     /* V5TE.  */
   14106       T(V7),     /* V5TEJ.  */
   14107       T(V7),     /* V6.  */
   14108       T(V7),     /* V6KZ.  */
   14109       T(V7),     /* V6T2.  */
   14110       T(V7),     /* V6K.  */
   14111       T(V7)      /* V7.  */
   14112     };
   14113   static const int v6_m[] =
   14114     {
   14115       -1,	 /* PRE_V4.  */
   14116       -1,	 /* V4.  */
   14117       T(V6K),    /* V4T.  */
   14118       T(V6K),    /* V5T.  */
   14119       T(V6K),    /* V5TE.  */
   14120       T(V6K),    /* V5TEJ.  */
   14121       T(V6K),    /* V6.  */
   14122       T(V6KZ),   /* V6KZ.  */
   14123       T(V7),     /* V6T2.  */
   14124       T(V6K),    /* V6K.  */
   14125       T(V7),     /* V7.  */
   14126       T(V6_M)    /* V6_M.  */
   14127     };
   14128   static const int v6s_m[] =
   14129     {
   14130       -1,	 /* PRE_V4.  */
   14131       -1,	 /* V4.  */
   14132       T(V6K),    /* V4T.  */
   14133       T(V6K),    /* V5T.  */
   14134       T(V6K),    /* V5TE.  */
   14135       T(V6K),    /* V5TEJ.  */
   14136       T(V6K),    /* V6.  */
   14137       T(V6KZ),   /* V6KZ.  */
   14138       T(V7),     /* V6T2.  */
   14139       T(V6K),    /* V6K.  */
   14140       T(V7),     /* V7.  */
   14141       T(V6S_M),  /* V6_M.  */
   14142       T(V6S_M)   /* V6S_M.  */
   14143     };
   14144   static const int v7e_m[] =
   14145     {
   14146       -1,	 /* PRE_V4.  */
   14147       -1,	 /* V4.  */
   14148       T(V7E_M),  /* V4T.  */
   14149       T(V7E_M),  /* V5T.  */
   14150       T(V7E_M),  /* V5TE.  */
   14151       T(V7E_M),  /* V5TEJ.  */
   14152       T(V7E_M),  /* V6.  */
   14153       T(V7E_M),  /* V6KZ.  */
   14154       T(V7E_M),  /* V6T2.  */
   14155       T(V7E_M),  /* V6K.  */
   14156       T(V7E_M),  /* V7.  */
   14157       T(V7E_M),  /* V6_M.  */
   14158       T(V7E_M),  /* V6S_M.  */
   14159       T(V7E_M)   /* V7E_M.  */
   14160     };
   14161   static const int v8[] =
   14162     {
   14163       T(V8),		/* PRE_V4.  */
   14164       T(V8),		/* V4.  */
   14165       T(V8),		/* V4T.  */
   14166       T(V8),		/* V5T.  */
   14167       T(V8),		/* V5TE.  */
   14168       T(V8),		/* V5TEJ.  */
   14169       T(V8),		/* V6.  */
   14170       T(V8),		/* V6KZ.  */
   14171       T(V8),		/* V6T2.  */
   14172       T(V8),		/* V6K.  */
   14173       T(V8),		/* V7.  */
   14174       T(V8),		/* V6_M.  */
   14175       T(V8),		/* V6S_M.  */
   14176       T(V8),		/* V7E_M.  */
   14177       T(V8),		/* V8.  */
   14178       T(V8),		/* V8-R.  */
   14179       T(V8),		/* V8-M.BASE.  */
   14180       T(V8),		/* V8-M.MAIN.  */
   14181       T(V8),		/* V8.1.  */
   14182       T(V8),		/* V8.2.  */
   14183       T(V8),		/* V8.3.  */
   14184       T(V8),		/* V8.1-M.MAIN.  */
   14185     };
   14186   static const int v8r[] =
   14187     {
   14188       T(V8R),		/* PRE_V4.  */
   14189       T(V8R),		/* V4.  */
   14190       T(V8R),		/* V4T.  */
   14191       T(V8R),		/* V5T.  */
   14192       T(V8R),		/* V5TE.  */
   14193       T(V8R),		/* V5TEJ.  */
   14194       T(V8R),		/* V6.  */
   14195       T(V8R),		/* V6KZ.  */
   14196       T(V8R),		/* V6T2.  */
   14197       T(V8R),		/* V6K.  */
   14198       T(V8R),		/* V7.  */
   14199       T(V8R),		/* V6_M.  */
   14200       T(V8R),		/* V6S_M.  */
   14201       T(V8R),		/* V7E_M.  */
   14202       T(V8),		/* V8.  */
   14203       T(V8R),		/* V8R.  */
   14204     };
   14205   static const int v8m_baseline[] =
   14206     {
   14207       -1,		/* PRE_V4.  */
   14208       -1,		/* V4.  */
   14209       -1,		/* V4T.  */
   14210       -1,		/* V5T.  */
   14211       -1,		/* V5TE.  */
   14212       -1,		/* V5TEJ.  */
   14213       -1,		/* V6.  */
   14214       -1,		/* V6KZ.  */
   14215       -1,		/* V6T2.  */
   14216       -1,		/* V6K.  */
   14217       -1,		/* V7.  */
   14218       T(V8M_BASE),	/* V6_M.  */
   14219       T(V8M_BASE),	/* V6S_M.  */
   14220       -1,		/* V7E_M.  */
   14221       -1,		/* V8.  */
   14222       -1,		/* V8R.  */
   14223       T(V8M_BASE)	/* V8-M BASELINE.  */
   14224     };
   14225   static const int v8m_mainline[] =
   14226     {
   14227       -1,		/* PRE_V4.  */
   14228       -1,		/* V4.  */
   14229       -1,		/* V4T.  */
   14230       -1,		/* V5T.  */
   14231       -1,		/* V5TE.  */
   14232       -1,		/* V5TEJ.  */
   14233       -1,		/* V6.  */
   14234       -1,		/* V6KZ.  */
   14235       -1,		/* V6T2.  */
   14236       -1,		/* V6K.  */
   14237       T(V8M_MAIN),	/* V7.  */
   14238       T(V8M_MAIN),	/* V6_M.  */
   14239       T(V8M_MAIN),	/* V6S_M.  */
   14240       T(V8M_MAIN),	/* V7E_M.  */
   14241       -1,		/* V8.  */
   14242       -1,		/* V8R.  */
   14243       T(V8M_MAIN),	/* V8-M BASELINE.  */
   14244       T(V8M_MAIN)	/* V8-M MAINLINE.  */
   14245     };
   14246   static const int v8_1m_mainline[] =
   14247     {
   14248       -1,		/* PRE_V4.  */
   14249       -1,		/* V4.  */
   14250       -1,		/* V4T.  */
   14251       -1,		/* V5T.  */
   14252       -1,		/* V5TE.  */
   14253       -1,		/* V5TEJ.  */
   14254       -1,		/* V6.  */
   14255       -1,		/* V6KZ.  */
   14256       -1,		/* V6T2.  */
   14257       -1,		/* V6K.  */
   14258       T(V8_1M_MAIN),	/* V7.  */
   14259       T(V8_1M_MAIN),	/* V6_M.  */
   14260       T(V8_1M_MAIN),	/* V6S_M.  */
   14261       T(V8_1M_MAIN),	/* V7E_M.  */
   14262       -1,		/* V8.  */
   14263       -1,		/* V8R.  */
   14264       T(V8_1M_MAIN),	/* V8-M BASELINE.  */
   14265       T(V8_1M_MAIN),	/* V8-M MAINLINE.  */
   14266       -1,		/* Unused (18).  */
   14267       -1,		/* Unused (19).  */
   14268       -1,		/* Unused (20).  */
   14269       T(V8_1M_MAIN)	/* V8.1-M MAINLINE.  */
   14270     };
   14271   static const int v9[] =
   14272     {
   14273       T(V9),		/* PRE_V4.  */
   14274       T(V9),		/* V4.  */
   14275       T(V9),		/* V4T.  */
   14276       T(V9),		/* V5T.  */
   14277       T(V9),		/* V5TE.  */
   14278       T(V9),		/* V5TEJ.  */
   14279       T(V9),		/* V6.  */
   14280       T(V9),		/* V6KZ.  */
   14281       T(V9),		/* V6T2.  */
   14282       T(V9),		/* V6K.  */
   14283       T(V9),		/* V7.  */
   14284       T(V9),		/* V6_M.  */
   14285       T(V9),		/* V6S_M.  */
   14286       T(V9),		/* V7E_M.  */
   14287       T(V9),		/* V8.  */
   14288       T(V9),		/* V8-R.  */
   14289       T(V9),		/* V8-M.BASE.  */
   14290       T(V9),		/* V8-M.MAIN.  */
   14291       T(V9),		/* V8.1.  */
   14292       T(V9),		/* V8.2.  */
   14293       T(V9),		/* V8.3.  */
   14294       T(V9),		/* V8.1-M.MAIN.  */
   14295       T(V9),		/* V9.  */
   14296      };
   14297   static const int v4t_plus_v6_m[] =
   14298     {
   14299       -1,		/* PRE_V4.  */
   14300       -1,		/* V4.  */
   14301       T(V4T),		/* V4T.  */
   14302       T(V5T),		/* V5T.  */
   14303       T(V5TE),		/* V5TE.  */
   14304       T(V5TEJ),		/* V5TEJ.  */
   14305       T(V6),		/* V6.  */
   14306       T(V6KZ),		/* V6KZ.  */
   14307       T(V6T2),		/* V6T2.  */
   14308       T(V6K),		/* V6K.  */
   14309       T(V7),		/* V7.  */
   14310       T(V6_M),		/* V6_M.  */
   14311       T(V6S_M),		/* V6S_M.  */
   14312       T(V7E_M),		/* V7E_M.  */
   14313       T(V8),		/* V8.  */
   14314       -1,		/* V8R.  */
   14315       T(V8M_BASE),	/* V8-M BASELINE.  */
   14316       T(V8M_MAIN),	/* V8-M MAINLINE.  */
   14317       -1,		/* Unused (18).  */
   14318       -1,		/* Unused (19).  */
   14319       -1,		/* Unused (20).  */
   14320       T(V8_1M_MAIN),	/* V8.1-M MAINLINE.  */
   14321       T(V9),		/* V9.  */
   14322       T(V4T_PLUS_V6_M)	/* V4T plus V6_M.  */
   14323     };
   14324   static const int *const comb[] =
   14325     {
   14326       v6t2,
   14327       v6k,
   14328       v7,
   14329       v6_m,
   14330       v6s_m,
   14331       v7e_m,
   14332       v8,
   14333       v8r,
   14334       v8m_baseline,
   14335       v8m_mainline,
   14336       NULL,
   14337       NULL,
   14338       NULL,
   14339       v8_1m_mainline,
   14340       v9,
   14341       /* Pseudo-architecture.  */
   14342       v4t_plus_v6_m
   14343     };
   14344 
   14345   /* Check we've not got a higher architecture than we know about.  */
   14346 
   14347   if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
   14348     {
   14349       _bfd_error_handler (_("error: %pB: unknown CPU architecture"), ibfd);
   14350       return -1;
   14351     }
   14352 
   14353   /* Override old tag if we have a Tag_also_compatible_with on the output.  */
   14354 
   14355   if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
   14356       || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
   14357     oldtag = T(V4T_PLUS_V6_M);
   14358 
   14359   /* And override the new tag if we have a Tag_also_compatible_with on the
   14360      input.  */
   14361 
   14362   if ((newtag == T(V6_M) && secondary_compat == T(V4T))
   14363       || (newtag == T(V4T) && secondary_compat == T(V6_M)))
   14364     newtag = T(V4T_PLUS_V6_M);
   14365 
   14366   tagl = (oldtag < newtag) ? oldtag : newtag;
   14367   result = tagh = (oldtag > newtag) ? oldtag : newtag;
   14368 
   14369   /* Architectures before V6KZ add features monotonically.  */
   14370   if (tagh <= TAG_CPU_ARCH_V6KZ)
   14371     return result;
   14372 
   14373   result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
   14374 
   14375   /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
   14376      as the canonical version.  */
   14377   if (result == T(V4T_PLUS_V6_M))
   14378     {
   14379       result = T(V4T);
   14380       *secondary_compat_out = T(V6_M);
   14381     }
   14382   else
   14383     *secondary_compat_out = -1;
   14384 
   14385   if (result == -1)
   14386     {
   14387       _bfd_error_handler (_("error: conflicting CPU architectures %s vs %s in %pB"),
   14388 			  name_table[oldtag], name_table[newtag], ibfd);
   14389       return -1;
   14390     }
   14391 
   14392   return result;
   14393 #undef T
   14394 }
   14395 
   14396 /* Query attributes object to see if integer divide instructions may be
   14397    present in an object.  */
   14398 static bool
   14399 elf32_arm_attributes_accept_div (const obj_attribute *attr)
   14400 {
   14401   int arch = attr[Tag_CPU_arch].i;
   14402   int profile = attr[Tag_CPU_arch_profile].i;
   14403 
   14404   switch (attr[Tag_DIV_use].i)
   14405     {
   14406     case 0:
   14407       /* Integer divide allowed if instruction contained in archetecture.  */
   14408       if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
   14409 	return true;
   14410       else if (arch >= TAG_CPU_ARCH_V7E_M)
   14411 	return true;
   14412       else
   14413 	return false;
   14414 
   14415     case 1:
   14416       /* Integer divide explicitly prohibited.  */
   14417       return false;
   14418 
   14419     default:
   14420       /* Unrecognised case - treat as allowing divide everywhere.  */
   14421     case 2:
   14422       /* Integer divide allowed in ARM state.  */
   14423       return true;
   14424     }
   14425 }
   14426 
   14427 /* Query attributes object to see if integer divide instructions are
   14428    forbidden to be in the object.  This is not the inverse of
   14429    elf32_arm_attributes_accept_div.  */
   14430 static bool
   14431 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
   14432 {
   14433   return attr[Tag_DIV_use].i == 1;
   14434 }
   14435 
   14436 /* Merge EABI object attributes from IBFD into OBFD.  Raise an error if there
   14437    are conflicting attributes.  */
   14438 
   14439 static bool
   14440 elf32_arm_merge_eabi_attributes (bfd *ibfd, struct bfd_link_info *info)
   14441 {
   14442   bfd *obfd = info->output_bfd;
   14443   obj_attribute *in_attr;
   14444   obj_attribute *out_attr;
   14445   /* Some tags have 0 = don't care, 1 = strong requirement,
   14446      2 = weak requirement.  */
   14447   static const int order_021[3] = {0, 2, 1};
   14448   int i;
   14449   bool result = true;
   14450   const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
   14451 
   14452   /* Skip the linker stubs file.  This preserves previous behavior
   14453      of accepting unknown attributes in the first input file - but
   14454      is that a bug?  */
   14455   if (ibfd->flags & BFD_LINKER_CREATED)
   14456     return true;
   14457 
   14458   /* Skip any input that hasn't attribute section.
   14459      This enables to link object files without attribute section with
   14460      any others.  */
   14461   if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
   14462     return true;
   14463 
   14464   if (!elf_known_obj_attributes_proc (obfd)[0].i)
   14465     {
   14466       /* This is the first object.  Copy the attributes.  */
   14467       _bfd_elf_copy_obj_attributes (ibfd, obfd);
   14468 
   14469       out_attr = elf_known_obj_attributes_proc (obfd);
   14470 
   14471       /* Use the Tag_null value to indicate the attributes have been
   14472 	 initialized.  */
   14473       out_attr[0].i = 1;
   14474 
   14475       /* We do not output objects with Tag_MPextension_use_legacy - we move
   14476 	 the attribute's value to Tag_MPextension_use.  */
   14477       if (out_attr[Tag_MPextension_use_legacy].i != 0)
   14478 	{
   14479 	  if (out_attr[Tag_MPextension_use].i != 0
   14480 	      && out_attr[Tag_MPextension_use_legacy].i
   14481 		!= out_attr[Tag_MPextension_use].i)
   14482 	    {
   14483 	      _bfd_error_handler
   14484 		(_("Error: %pB has both the current and legacy "
   14485 		   "Tag_MPextension_use attributes"), ibfd);
   14486 	      result = false;
   14487 	    }
   14488 
   14489 	  out_attr[Tag_MPextension_use] =
   14490 	    out_attr[Tag_MPextension_use_legacy];
   14491 	  out_attr[Tag_MPextension_use_legacy].type = 0;
   14492 	  out_attr[Tag_MPextension_use_legacy].i = 0;
   14493 	}
   14494 
   14495       /* PR 28859 and 28848:  Handle the case where the first input file,
   14496 	 eg crti.o, has a Tag_ABI_HardFP_use of 3 but no Tag_FP_arch set.
   14497 	 Using Tag_ABI_HardFP_use in this way is deprecated, so reset the
   14498 	 attribute to zero.
   14499 	 FIXME: Should we handle other non-zero values of Tag_ABI_HardFO_use ? */
   14500       if (out_attr[Tag_ABI_HardFP_use].i == 3 && out_attr[Tag_FP_arch].i == 0)
   14501 	out_attr[Tag_ABI_HardFP_use].i = 0;
   14502 
   14503       return result;
   14504     }
   14505 
   14506   in_attr = elf_known_obj_attributes_proc (ibfd);
   14507   out_attr = elf_known_obj_attributes_proc (obfd);
   14508   /* This needs to happen before Tag_ABI_FP_number_model is merged.  */
   14509   if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
   14510     {
   14511       /* Ignore mismatches if the object doesn't use floating point or is
   14512 	 floating point ABI independent.  */
   14513       if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
   14514 	  || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
   14515 	      && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
   14516 	out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
   14517       else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
   14518 	       && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
   14519 	{
   14520 	  _bfd_error_handler
   14521 	    (_("error: %pB uses VFP register arguments, %pB does not"),
   14522 	     in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
   14523 	     in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
   14524 	  result = false;
   14525 	}
   14526     }
   14527 
   14528   for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
   14529     {
   14530       /* Merge this attribute with existing attributes.  */
   14531       switch (i)
   14532 	{
   14533 	case Tag_CPU_raw_name:
   14534 	case Tag_CPU_name:
   14535 	  /* These are merged after Tag_CPU_arch.  */
   14536 	  break;
   14537 
   14538 	case Tag_ABI_optimization_goals:
   14539 	case Tag_ABI_FP_optimization_goals:
   14540 	  /* Use the first value seen.  */
   14541 	  break;
   14542 
   14543 	case Tag_CPU_arch:
   14544 	  {
   14545 	    int secondary_compat = -1, secondary_compat_out = -1;
   14546 	    unsigned int saved_out_attr = out_attr[i].i;
   14547 	    int arch_attr;
   14548 	    static const char *const name_table[] =
   14549 	      {
   14550 		/* These aren't real CPU names, but we can't guess
   14551 		   that from the architecture version alone.  */
   14552 		"Pre v4",
   14553 		"ARM v4",
   14554 		"ARM v4T",
   14555 		"ARM v5T",
   14556 		"ARM v5TE",
   14557 		"ARM v5TEJ",
   14558 		"ARM v6",
   14559 		"ARM v6KZ",
   14560 		"ARM v6T2",
   14561 		"ARM v6K",
   14562 		"ARM v7",
   14563 		"ARM v6-M",
   14564 		"ARM v6S-M",
   14565 		"ARM v7E-M",
   14566 		"ARM v8",
   14567 		"ARM v8-R",
   14568 		"ARM v8-M.baseline",
   14569 		"ARM v8-M.mainline",
   14570 		"ARM v8.1-A",
   14571 		"ARM v8.2-A",
   14572 		"ARM v8.3-A",
   14573 		"ARM v8.1-M.mainline",
   14574 		"ARM v9",
   14575 	    };
   14576 
   14577 	    /* Merge Tag_CPU_arch and Tag_also_compatible_with.  */
   14578 	    secondary_compat = get_secondary_compatible_arch (ibfd);
   14579 	    secondary_compat_out = get_secondary_compatible_arch (obfd);
   14580 	    arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
   14581 					      &secondary_compat_out,
   14582 					      in_attr[i].i,
   14583 					      secondary_compat,
   14584 					      name_table);
   14585 
   14586 	    /* Return with error if failed to merge.  */
   14587 	    if (arch_attr == -1)
   14588 	      return false;
   14589 
   14590 	    out_attr[i].i = arch_attr;
   14591 
   14592 	    set_secondary_compatible_arch (obfd, secondary_compat_out);
   14593 
   14594 	    /* Merge Tag_CPU_name and Tag_CPU_raw_name.  */
   14595 	    if (out_attr[i].i == saved_out_attr)
   14596 	      ; /* Leave the names alone.  */
   14597 	    else if (out_attr[i].i == in_attr[i].i)
   14598 	      {
   14599 		/* The output architecture has been changed to match the
   14600 		   input architecture.  Use the input names.  */
   14601 		out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
   14602 		  ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
   14603 		  : NULL;
   14604 		out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
   14605 		  ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
   14606 		  : NULL;
   14607 	      }
   14608 	    else
   14609 	      {
   14610 		out_attr[Tag_CPU_name].s = NULL;
   14611 		out_attr[Tag_CPU_raw_name].s = NULL;
   14612 	      }
   14613 
   14614 	    /* If we still don't have a value for Tag_CPU_name,
   14615 	       make one up now.  Tag_CPU_raw_name remains blank.  */
   14616 	    if (out_attr[Tag_CPU_name].s == NULL
   14617 		&& out_attr[i].i < ARRAY_SIZE (name_table))
   14618 	      out_attr[Tag_CPU_name].s =
   14619 		_bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
   14620 	  }
   14621 	  break;
   14622 
   14623 	case Tag_ARM_ISA_use:
   14624 	case Tag_THUMB_ISA_use:
   14625 	case Tag_WMMX_arch:
   14626 	case Tag_Advanced_SIMD_arch:
   14627 	  /* ??? Do Advanced_SIMD (NEON) and WMMX conflict?  */
   14628 	case Tag_ABI_FP_rounding:
   14629 	case Tag_ABI_FP_exceptions:
   14630 	case Tag_ABI_FP_user_exceptions:
   14631 	case Tag_ABI_FP_number_model:
   14632 	case Tag_FP_HP_extension:
   14633 	case Tag_CPU_unaligned_access:
   14634 	case Tag_T2EE_use:
   14635 	case Tag_MPextension_use:
   14636 	case Tag_MVE_arch:
   14637 	case Tag_PAC_extension:
   14638 	case Tag_BTI_extension:
   14639 	case Tag_BTI_use:
   14640 	case Tag_PACRET_use:
   14641 	  /* Use the largest value specified.  */
   14642 	  if (in_attr[i].i > out_attr[i].i)
   14643 	    out_attr[i].i = in_attr[i].i;
   14644 	  break;
   14645 
   14646 	case Tag_ABI_align_preserved:
   14647 	case Tag_ABI_PCS_RO_data:
   14648 	  /* Use the smallest value specified.  */
   14649 	  if (in_attr[i].i < out_attr[i].i)
   14650 	    out_attr[i].i = in_attr[i].i;
   14651 	  break;
   14652 
   14653 	case Tag_ABI_align_needed:
   14654 	  if ((in_attr[i].i > 0 || out_attr[i].i > 0)
   14655 	      && (in_attr[Tag_ABI_align_preserved].i == 0
   14656 		  || out_attr[Tag_ABI_align_preserved].i == 0))
   14657 	    {
   14658 	      /* This error message should be enabled once all non-conformant
   14659 		 binaries in the toolchain have had the attributes set
   14660 		 properly.
   14661 	      _bfd_error_handler
   14662 		(_("error: %pB: 8-byte data alignment conflicts with %pB"),
   14663 		 obfd, ibfd);
   14664 	      result = false; */
   14665 	    }
   14666 	  /* Fall through.  */
   14667 	case Tag_ABI_FP_denormal:
   14668 	case Tag_ABI_PCS_GOT_use:
   14669 	  /* Use the "greatest" from the sequence 0, 2, 1, or the largest
   14670 	     value if greater than 2 (for future-proofing).  */
   14671 	  if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
   14672 	      || (in_attr[i].i <= 2 && out_attr[i].i <= 2
   14673 		  && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
   14674 	    out_attr[i].i = in_attr[i].i;
   14675 	  break;
   14676 
   14677 	case Tag_Virtualization_use:
   14678 	  /* The virtualization tag effectively stores two bits of
   14679 	     information: the intended use of TrustZone (in bit 0), and the
   14680 	     intended use of Virtualization (in bit 1).  */
   14681 	  if (out_attr[i].i == 0)
   14682 	    out_attr[i].i = in_attr[i].i;
   14683 	  else if (in_attr[i].i != 0
   14684 		   && in_attr[i].i != out_attr[i].i)
   14685 	    {
   14686 	      if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
   14687 		out_attr[i].i = 3;
   14688 	      else
   14689 		{
   14690 		  _bfd_error_handler
   14691 		    (_("error: %pB: unable to merge virtualization attributes "
   14692 		       "with %pB"),
   14693 		     obfd, ibfd);
   14694 		  result = false;
   14695 		}
   14696 	    }
   14697 	  break;
   14698 
   14699 	case Tag_CPU_arch_profile:
   14700 	  if (out_attr[i].i != in_attr[i].i)
   14701 	    {
   14702 	      /* 0 will merge with anything.
   14703 		 'A' and 'S' merge to 'A'.
   14704 		 'R' and 'S' merge to 'R'.
   14705 		 'M' and 'A|R|S' is an error.  */
   14706 	      if (out_attr[i].i == 0
   14707 		  || (out_attr[i].i == 'S'
   14708 		      && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
   14709 		out_attr[i].i = in_attr[i].i;
   14710 	      else if (in_attr[i].i == 0
   14711 		       || (in_attr[i].i == 'S'
   14712 			   && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
   14713 		; /* Do nothing.  */
   14714 	      else
   14715 		{
   14716 		  _bfd_error_handler
   14717 		    (_("error: %pB: conflicting architecture profiles %c/%c"),
   14718 		     ibfd,
   14719 		     in_attr[i].i ? in_attr[i].i : '0',
   14720 		     out_attr[i].i ? out_attr[i].i : '0');
   14721 		  result = false;
   14722 		}
   14723 	    }
   14724 	  break;
   14725 
   14726 	case Tag_DSP_extension:
   14727 	  /* No need to change output value if any of:
   14728 	     - pre (<=) ARMv5T input architecture (do not have DSP)
   14729 	     - M input profile not ARMv7E-M and do not have DSP.  */
   14730 	  if (in_attr[Tag_CPU_arch].i <= 3
   14731 	      || (in_attr[Tag_CPU_arch_profile].i == 'M'
   14732 		  && in_attr[Tag_CPU_arch].i != 13
   14733 		  && in_attr[i].i == 0))
   14734 	    ; /* Do nothing.  */
   14735 	  /* Output value should be 0 if DSP part of architecture, ie.
   14736 	     - post (>=) ARMv5te architecture output
   14737 	     - A, R or S profile output or ARMv7E-M output architecture.  */
   14738 	  else if (out_attr[Tag_CPU_arch].i >= 4
   14739 		   && (out_attr[Tag_CPU_arch_profile].i == 'A'
   14740 		       || out_attr[Tag_CPU_arch_profile].i == 'R'
   14741 		       || out_attr[Tag_CPU_arch_profile].i == 'S'
   14742 		       || out_attr[Tag_CPU_arch].i == 13))
   14743 	    out_attr[i].i = 0;
   14744 	  /* Otherwise, DSP instructions are added and not part of output
   14745 	     architecture.  */
   14746 	  else
   14747 	    out_attr[i].i = 1;
   14748 	  break;
   14749 
   14750 	case Tag_FP_arch:
   14751 	    {
   14752 	      /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
   14753 		 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
   14754 		 when it's 0.  It might mean absence of FP hardware if
   14755 		 Tag_FP_arch is zero.  */
   14756 
   14757 #define VFP_VERSION_COUNT 9
   14758 	      static const struct
   14759 	      {
   14760 		  int ver;
   14761 		  int regs;
   14762 	      } vfp_versions[VFP_VERSION_COUNT] =
   14763 		{
   14764 		  {0, 0},
   14765 		  {1, 16},
   14766 		  {2, 16},
   14767 		  {3, 32},
   14768 		  {3, 16},
   14769 		  {4, 32},
   14770 		  {4, 16},
   14771 		  {8, 32},
   14772 		  {8, 16}
   14773 		};
   14774 	      int ver;
   14775 	      int regs;
   14776 	      int newval;
   14777 
   14778 	      /* If the output has no requirement about FP hardware,
   14779 		 follow the requirement of the input.  */
   14780 	      if (out_attr[i].i == 0)
   14781 		{
   14782 		  /* This assert is still reasonable, we shouldn't
   14783 		     produce the suspicious build attribute
   14784 		     combination (See below for in_attr).  */
   14785 		  BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
   14786 		  out_attr[i].i = in_attr[i].i;
   14787 		  out_attr[Tag_ABI_HardFP_use].i
   14788 		    = in_attr[Tag_ABI_HardFP_use].i;
   14789 		  break;
   14790 		}
   14791 	      /* If the input has no requirement about FP hardware, do
   14792 		 nothing.  */
   14793 	      else if (in_attr[i].i == 0)
   14794 		{
   14795 		  /* We used to assert that Tag_ABI_HardFP_use was
   14796 		     zero here, but we should never assert when
   14797 		     consuming an object file that has suspicious
   14798 		     build attributes.  The single precision variant
   14799 		     of 'no FP architecture' is still 'no FP
   14800 		     architecture', so we just ignore the tag in this
   14801 		     case.  */
   14802 		  break;
   14803 		}
   14804 
   14805 	      /* Both the input and the output have nonzero Tag_FP_arch.
   14806 		 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero.  */
   14807 
   14808 	      /* If both the input and the output have zero Tag_ABI_HardFP_use,
   14809 		 do nothing.  */
   14810 	      if (in_attr[Tag_ABI_HardFP_use].i == 0
   14811 		  && out_attr[Tag_ABI_HardFP_use].i == 0)
   14812 		;
   14813 	      /* If the input and the output have different Tag_ABI_HardFP_use,
   14814 		 the combination of them is 0 (implied by Tag_FP_arch).  */
   14815 	      else if (in_attr[Tag_ABI_HardFP_use].i
   14816 		       != out_attr[Tag_ABI_HardFP_use].i)
   14817 		out_attr[Tag_ABI_HardFP_use].i = 0;
   14818 
   14819 	      /* Now we can handle Tag_FP_arch.  */
   14820 
   14821 	      /* Values of VFP_VERSION_COUNT or more aren't defined, so just
   14822 		 pick the biggest.  */
   14823 	      if (in_attr[i].i >= VFP_VERSION_COUNT
   14824 		  && in_attr[i].i > out_attr[i].i)
   14825 		{
   14826 		  out_attr[i] = in_attr[i];
   14827 		  break;
   14828 		}
   14829 	      /* The output uses the superset of input features
   14830 		 (ISA version) and registers.  */
   14831 	      ver = vfp_versions[in_attr[i].i].ver;
   14832 	      if (ver < vfp_versions[out_attr[i].i].ver)
   14833 		ver = vfp_versions[out_attr[i].i].ver;
   14834 	      regs = vfp_versions[in_attr[i].i].regs;
   14835 	      if (regs < vfp_versions[out_attr[i].i].regs)
   14836 		regs = vfp_versions[out_attr[i].i].regs;
   14837 	      /* This assumes all possible supersets are also a valid
   14838 		 options.  */
   14839 	      for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
   14840 		{
   14841 		  if (regs == vfp_versions[newval].regs
   14842 		      && ver == vfp_versions[newval].ver)
   14843 		    break;
   14844 		}
   14845 	      out_attr[i].i = newval;
   14846 	    }
   14847 	  break;
   14848 	case Tag_PCS_config:
   14849 	  if (out_attr[i].i == 0)
   14850 	    out_attr[i].i = in_attr[i].i;
   14851 	  else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
   14852 	    {
   14853 	      /* It's sometimes ok to mix different configs, so this is only
   14854 		 a warning.  */
   14855 	      _bfd_error_handler
   14856 		(_("warning: %pB: conflicting platform configuration"), ibfd);
   14857 	    }
   14858 	  break;
   14859 	case Tag_ABI_PCS_R9_use:
   14860 	  if (in_attr[i].i != out_attr[i].i
   14861 	      && out_attr[i].i != AEABI_R9_unused
   14862 	      && in_attr[i].i != AEABI_R9_unused)
   14863 	    {
   14864 	      _bfd_error_handler
   14865 		(_("error: %pB: conflicting use of R9"), ibfd);
   14866 	      result = false;
   14867 	    }
   14868 	  if (out_attr[i].i == AEABI_R9_unused)
   14869 	    out_attr[i].i = in_attr[i].i;
   14870 	  break;
   14871 	case Tag_ABI_PCS_RW_data:
   14872 	  if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
   14873 	      && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
   14874 	      && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
   14875 	    {
   14876 	      _bfd_error_handler
   14877 		(_("error: %pB: SB relative addressing conflicts with use of R9"),
   14878 		 ibfd);
   14879 	      result = false;
   14880 	    }
   14881 	  /* Use the smallest value specified.  */
   14882 	  if (in_attr[i].i < out_attr[i].i)
   14883 	    out_attr[i].i = in_attr[i].i;
   14884 	  break;
   14885 	case Tag_ABI_PCS_wchar_t:
   14886 	  if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
   14887 	      && !elf_arm_tdata (obfd)->no_wchar_size_warning)
   14888 	    {
   14889 	      _bfd_error_handler
   14890 		(_("warning: %pB uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
   14891 		 ibfd, in_attr[i].i, out_attr[i].i);
   14892 	    }
   14893 	  else if (in_attr[i].i && !out_attr[i].i)
   14894 	    out_attr[i].i = in_attr[i].i;
   14895 	  break;
   14896 	case Tag_ABI_enum_size:
   14897 	  if (in_attr[i].i != AEABI_enum_unused)
   14898 	    {
   14899 	      if (out_attr[i].i == AEABI_enum_unused
   14900 		  || out_attr[i].i == AEABI_enum_forced_wide)
   14901 		{
   14902 		  /* The existing object is compatible with anything.
   14903 		     Use whatever requirements the new object has.  */
   14904 		  out_attr[i].i = in_attr[i].i;
   14905 		}
   14906 	      else if (in_attr[i].i != AEABI_enum_forced_wide
   14907 		       && out_attr[i].i != in_attr[i].i
   14908 		       && !elf_arm_tdata (obfd)->no_enum_size_warning)
   14909 		{
   14910 		  static const char *aeabi_enum_names[] =
   14911 		    { "", "variable-size", "32-bit", "" };
   14912 		  const char *in_name =
   14913 		    in_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
   14914 		    ? aeabi_enum_names[in_attr[i].i]
   14915 		    : "<unknown>";
   14916 		  const char *out_name =
   14917 		    out_attr[i].i < ARRAY_SIZE (aeabi_enum_names)
   14918 		    ? aeabi_enum_names[out_attr[i].i]
   14919 		    : "<unknown>";
   14920 		  _bfd_error_handler
   14921 		    (_("warning: %pB uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
   14922 		     ibfd, in_name, out_name);
   14923 		}
   14924 	    }
   14925 	  break;
   14926 	case Tag_ABI_VFP_args:
   14927 	  /* Aready done.  */
   14928 	  break;
   14929 	case Tag_ABI_WMMX_args:
   14930 	  if (in_attr[i].i != out_attr[i].i)
   14931 	    {
   14932 	      _bfd_error_handler
   14933 		(_("error: %pB uses iWMMXt register arguments, %pB does not"),
   14934 		 ibfd, obfd);
   14935 	      result = false;
   14936 	    }
   14937 	  break;
   14938 	case Tag_compatibility:
   14939 	  /* Merged in target-independent code.  */
   14940 	  break;
   14941 	case Tag_ABI_HardFP_use:
   14942 	  /* This is handled along with Tag_FP_arch.  */
   14943 	  break;
   14944 	case Tag_ABI_FP_16bit_format:
   14945 	  if (in_attr[i].i != 0 && out_attr[i].i != 0)
   14946 	    {
   14947 	      if (in_attr[i].i != out_attr[i].i)
   14948 		{
   14949 		  _bfd_error_handler
   14950 		    (_("error: fp16 format mismatch between %pB and %pB"),
   14951 		     ibfd, obfd);
   14952 		  result = false;
   14953 		}
   14954 	    }
   14955 	  if (in_attr[i].i != 0)
   14956 	    out_attr[i].i = in_attr[i].i;
   14957 	  break;
   14958 
   14959 	case Tag_DIV_use:
   14960 	  /* A value of zero on input means that the divide instruction may
   14961 	     be used if available in the base architecture as specified via
   14962 	     Tag_CPU_arch and Tag_CPU_arch_profile.  A value of 1 means that
   14963 	     the user did not want divide instructions.  A value of 2
   14964 	     explicitly means that divide instructions were allowed in ARM
   14965 	     and Thumb state.  */
   14966 	  if (in_attr[i].i == out_attr[i].i)
   14967 	    /* Do nothing.  */ ;
   14968 	  else if (elf32_arm_attributes_forbid_div (in_attr)
   14969 		   && !elf32_arm_attributes_accept_div (out_attr))
   14970 	    out_attr[i].i = 1;
   14971 	  else if (elf32_arm_attributes_forbid_div (out_attr)
   14972 		   && elf32_arm_attributes_accept_div (in_attr))
   14973 	    out_attr[i].i = in_attr[i].i;
   14974 	  else if (in_attr[i].i == 2)
   14975 	    out_attr[i].i = in_attr[i].i;
   14976 	  break;
   14977 
   14978 	case Tag_MPextension_use_legacy:
   14979 	  /* We don't output objects with Tag_MPextension_use_legacy - we
   14980 	     move the value to Tag_MPextension_use.  */
   14981 	  if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
   14982 	    {
   14983 	      if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
   14984 		{
   14985 		  _bfd_error_handler
   14986 		    (_("%pB has both the current and legacy "
   14987 		       "Tag_MPextension_use attributes"),
   14988 		     ibfd);
   14989 		  result = false;
   14990 		}
   14991 	    }
   14992 
   14993 	  if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
   14994 	    out_attr[Tag_MPextension_use] = in_attr[i];
   14995 
   14996 	  break;
   14997 
   14998 	case Tag_nodefaults:
   14999 	  /* This tag is set if it exists, but the value is unused (and is
   15000 	     typically zero).  We don't actually need to do anything here -
   15001 	     the merge happens automatically when the type flags are merged
   15002 	     below.  */
   15003 	  break;
   15004 	case Tag_also_compatible_with:
   15005 	  /* Already done in Tag_CPU_arch.  */
   15006 	  break;
   15007 	case Tag_conformance:
   15008 	  /* Keep the attribute if it matches.  Throw it away otherwise.
   15009 	     No attribute means no claim to conform.  */
   15010 	  if (!in_attr[i].s || !out_attr[i].s
   15011 	      || strcmp (in_attr[i].s, out_attr[i].s) != 0)
   15012 	    out_attr[i].s = NULL;
   15013 	  break;
   15014 
   15015 	default:
   15016 	  result
   15017 	    = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
   15018 	}
   15019 
   15020       /* If out_attr was copied from in_attr then it won't have a type yet.  */
   15021       if (in_attr[i].type && !out_attr[i].type)
   15022 	out_attr[i].type = in_attr[i].type;
   15023     }
   15024 
   15025   /* Merge Tag_compatibility attributes and any common GNU ones.  */
   15026   if (!_bfd_elf_merge_object_attributes (ibfd, info))
   15027     return false;
   15028 
   15029   /* Check for any attributes not known on ARM.  */
   15030   result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
   15031 
   15032   return result;
   15033 }
   15034 
   15035 
   15036 /* Return TRUE if the two EABI versions are incompatible.  */
   15037 
   15038 static bool
   15039 elf32_arm_versions_compatible (unsigned iver, unsigned over)
   15040 {
   15041   /* v4 and v5 are the same spec before and after it was released,
   15042      so allow mixing them.  */
   15043   if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
   15044       || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
   15045     return true;
   15046 
   15047   return (iver == over);
   15048 }
   15049 
   15050 /* Merge backend specific data from an object file to the output
   15051    object file when linking.  */
   15052 
   15053 static bool
   15054 elf32_arm_merge_private_bfd_data (bfd *, struct bfd_link_info *);
   15055 
   15056 /* Display the flags field.  */
   15057 
   15058 static bool
   15059 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
   15060 {
   15061   FILE * file = (FILE *) ptr;
   15062   unsigned long flags;
   15063 
   15064   BFD_ASSERT (abfd != NULL && ptr != NULL);
   15065 
   15066   /* Print normal ELF private data.  */
   15067   _bfd_elf_print_private_bfd_data (abfd, ptr);
   15068 
   15069   flags = elf_elfheader (abfd)->e_flags;
   15070   /* Ignore init flag - it may not be set, despite the flags field
   15071      containing valid data.  */
   15072 
   15073   fprintf (file, _("private flags = 0x%lx:"), elf_elfheader (abfd)->e_flags);
   15074 
   15075   switch (EF_ARM_EABI_VERSION (flags))
   15076     {
   15077     case EF_ARM_EABI_UNKNOWN:
   15078       /* The following flag bits are GNU extensions and not part of the
   15079 	 official ARM ELF extended ABI.  Hence they are only decoded if
   15080 	 the EABI version is not set.  */
   15081       if (flags & EF_ARM_INTERWORK)
   15082 	fprintf (file, _(" [interworking enabled]"));
   15083 
   15084       if (flags & EF_ARM_APCS_26)
   15085 	fprintf (file, " [APCS-26]");
   15086       else
   15087 	fprintf (file, " [APCS-32]");
   15088 
   15089       if (flags & EF_ARM_VFP_FLOAT)
   15090 	fprintf (file, _(" [VFP float format]"));
   15091       else
   15092 	fprintf (file, _(" [FPA float format]"));
   15093 
   15094       if (flags & EF_ARM_APCS_FLOAT)
   15095 	fprintf (file, _(" [floats passed in float registers]"));
   15096 
   15097       if (flags & EF_ARM_PIC)
   15098 	fprintf (file, _(" [position independent]"));
   15099 
   15100       if (flags & EF_ARM_NEW_ABI)
   15101 	fprintf (file, _(" [new ABI]"));
   15102 
   15103       if (flags & EF_ARM_OLD_ABI)
   15104 	fprintf (file, _(" [old ABI]"));
   15105 
   15106       if (flags & EF_ARM_SOFT_FLOAT)
   15107 	fprintf (file, _(" [software FP]"));
   15108 
   15109       flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
   15110 		 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
   15111 		 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT);
   15112       break;
   15113 
   15114     case EF_ARM_EABI_VER1:
   15115       fprintf (file, _(" [Version1 EABI]"));
   15116 
   15117       if (flags & EF_ARM_SYMSARESORTED)
   15118 	fprintf (file, _(" [sorted symbol table]"));
   15119       else
   15120 	fprintf (file, _(" [unsorted symbol table]"));
   15121 
   15122       flags &= ~ EF_ARM_SYMSARESORTED;
   15123       break;
   15124 
   15125     case EF_ARM_EABI_VER2:
   15126       fprintf (file, _(" [Version2 EABI]"));
   15127 
   15128       if (flags & EF_ARM_SYMSARESORTED)
   15129 	fprintf (file, _(" [sorted symbol table]"));
   15130       else
   15131 	fprintf (file, _(" [unsorted symbol table]"));
   15132 
   15133       if (flags & EF_ARM_DYNSYMSUSESEGIDX)
   15134 	fprintf (file, _(" [dynamic symbols use segment index]"));
   15135 
   15136       if (flags & EF_ARM_MAPSYMSFIRST)
   15137 	fprintf (file, _(" [mapping symbols precede others]"));
   15138 
   15139       flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
   15140 		 | EF_ARM_MAPSYMSFIRST);
   15141       break;
   15142 
   15143     case EF_ARM_EABI_VER3:
   15144       fprintf (file, _(" [Version3 EABI]"));
   15145       break;
   15146 
   15147     case EF_ARM_EABI_VER4:
   15148       fprintf (file, _(" [Version4 EABI]"));
   15149       goto eabi;
   15150 
   15151     case EF_ARM_EABI_VER5:
   15152       fprintf (file, _(" [Version5 EABI]"));
   15153 
   15154       if (flags & EF_ARM_ABI_FLOAT_SOFT)
   15155 	fprintf (file, _(" [soft-float ABI]"));
   15156 
   15157       if (flags & EF_ARM_ABI_FLOAT_HARD)
   15158 	fprintf (file, _(" [hard-float ABI]"));
   15159 
   15160       flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
   15161 
   15162     eabi:
   15163       if (flags & EF_ARM_BE8)
   15164 	fprintf (file, _(" [BE8]"));
   15165 
   15166       if (flags & EF_ARM_LE8)
   15167 	fprintf (file, _(" [LE8]"));
   15168 
   15169       flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
   15170       break;
   15171 
   15172     default:
   15173       fprintf (file, _(" <EABI version unrecognised>"));
   15174       break;
   15175     }
   15176 
   15177   flags &= ~ EF_ARM_EABIMASK;
   15178 
   15179   if (flags & EF_ARM_RELEXEC)
   15180     fprintf (file, _(" [relocatable executable]"));
   15181 
   15182   if (flags & EF_ARM_PIC)
   15183     fprintf (file, _(" [position independent]"));
   15184 
   15185   if (elf_elfheader (abfd)->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC)
   15186     fprintf (file, _(" [FDPIC ABI supplement]"));
   15187 
   15188   flags &= ~ (EF_ARM_RELEXEC | EF_ARM_PIC);
   15189 
   15190   if (flags)
   15191     fprintf (file, _(" <Unrecognised flag bits set>"));
   15192 
   15193   fputc ('\n', file);
   15194 
   15195   return true;
   15196 }
   15197 
   15198 static int
   15199 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
   15200 {
   15201   switch (ELF_ST_TYPE (elf_sym->st_info))
   15202     {
   15203     case STT_ARM_TFUNC:
   15204       return ELF_ST_TYPE (elf_sym->st_info);
   15205 
   15206     case STT_ARM_16BIT:
   15207       /* If the symbol is not an object, return the STT_ARM_16BIT flag.
   15208 	 This allows us to distinguish between data used by Thumb instructions
   15209 	 and non-data (which is probably code) inside Thumb regions of an
   15210 	 executable.  */
   15211       if (type != STT_OBJECT && type != STT_TLS)
   15212 	return ELF_ST_TYPE (elf_sym->st_info);
   15213       break;
   15214 
   15215     default:
   15216       break;
   15217     }
   15218 
   15219   return type;
   15220 }
   15221 
   15222 static asection *
   15223 elf32_arm_gc_mark_hook (asection *sec,
   15224 			struct bfd_link_info *info,
   15225 			struct elf_reloc_cookie *cookie,
   15226 			struct elf_link_hash_entry *h,
   15227 			unsigned int symndx)
   15228 {
   15229   if (h != NULL)
   15230     switch (ELF32_R_TYPE (cookie->rel->r_info))
   15231       {
   15232       case R_ARM_GNU_VTINHERIT:
   15233       case R_ARM_GNU_VTENTRY:
   15234 	return NULL;
   15235       }
   15236 
   15237   return _bfd_elf_gc_mark_hook (sec, info, cookie, h, symndx);
   15238 }
   15239 
   15240 /* Look through the relocs for a section during the first phase.  */
   15241 
   15242 static bool
   15243 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
   15244 			asection *sec, const Elf_Internal_Rela *relocs)
   15245 {
   15246   Elf_Internal_Shdr *symtab_hdr;
   15247   struct elf_link_hash_entry **sym_hashes;
   15248   const Elf_Internal_Rela *rel;
   15249   const Elf_Internal_Rela *rel_end;
   15250   bfd *dynobj;
   15251   asection *sreloc;
   15252   struct elf32_arm_link_hash_table *htab;
   15253   bool call_reloc_p;
   15254   bool may_become_dynamic_p;
   15255   bool may_need_local_target_p;
   15256   unsigned long nsyms;
   15257 
   15258   if (bfd_link_relocatable (info))
   15259     return true;
   15260 
   15261   BFD_ASSERT (is_arm_elf (abfd));
   15262 
   15263   htab = elf32_arm_hash_table (info);
   15264   if (htab == NULL)
   15265     return false;
   15266 
   15267   sreloc = NULL;
   15268 
   15269   if (htab->root.dynobj == NULL)
   15270     htab->root.dynobj = abfd;
   15271   if (!create_ifunc_sections (info))
   15272     return false;
   15273 
   15274   dynobj = htab->root.dynobj;
   15275 
   15276   symtab_hdr = & elf_symtab_hdr (abfd);
   15277   sym_hashes = elf_sym_hashes (abfd);
   15278   nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
   15279 
   15280   rel_end = relocs + sec->reloc_count;
   15281   for (rel = relocs; rel < rel_end; rel++)
   15282     {
   15283       Elf_Internal_Sym *isym;
   15284       struct elf_link_hash_entry *h;
   15285       struct elf32_arm_link_hash_entry *eh;
   15286       unsigned int r_symndx;
   15287       int r_type;
   15288 
   15289       r_symndx = ELF32_R_SYM (rel->r_info);
   15290       r_type = ELF32_R_TYPE (rel->r_info);
   15291       r_type = arm_real_reloc_type (htab, r_type);
   15292 
   15293       if (r_symndx >= nsyms
   15294 	  /* PR 9934: It is possible to have relocations that do not
   15295 	     refer to symbols, thus it is also possible to have an
   15296 	     object file containing relocations but no symbol table.  */
   15297 	  && (r_symndx > STN_UNDEF || nsyms > 0))
   15298 	{
   15299 	  _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
   15300 			      r_symndx);
   15301 	  return false;
   15302 	}
   15303 
   15304       h = NULL;
   15305       isym = NULL;
   15306       if (nsyms > 0)
   15307 	{
   15308 	  if (r_symndx < symtab_hdr->sh_info)
   15309 	    {
   15310 	      /* A local symbol.  */
   15311 	      isym = bfd_sym_from_r_symndx (&htab->root.sym_cache,
   15312 					    abfd, r_symndx);
   15313 	      if (isym == NULL)
   15314 		return false;
   15315 	    }
   15316 	  else
   15317 	    {
   15318 	      h = sym_hashes[r_symndx - symtab_hdr->sh_info];
   15319 	      while (h->root.type == bfd_link_hash_indirect
   15320 		     || h->root.type == bfd_link_hash_warning)
   15321 		h = (struct elf_link_hash_entry *) h->root.u.i.link;
   15322 	    }
   15323 	}
   15324 
   15325       eh = (struct elf32_arm_link_hash_entry *) h;
   15326 
   15327       call_reloc_p = false;
   15328       may_become_dynamic_p = false;
   15329       may_need_local_target_p = false;
   15330 
   15331       /* Could be done earlier, if h were already available.  */
   15332       r_type = elf32_arm_tls_transition (info, r_type, h);
   15333       switch (r_type)
   15334 	{
   15335 	case R_ARM_GOTOFFFUNCDESC:
   15336 	  {
   15337 	    if (h == NULL)
   15338 	      {
   15339 		if (!elf32_arm_allocate_local_sym_info (abfd))
   15340 		  return false;
   15341 		if (r_symndx >= elf32_arm_num_entries (abfd))
   15342 		  return false;
   15343 		elf32_arm_local_fdpic_cnts (abfd) [r_symndx].gotofffuncdesc_cnt += 1;
   15344 		elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
   15345 	      }
   15346 	    else
   15347 	      {
   15348 		eh->fdpic_cnts.gotofffuncdesc_cnt++;
   15349 	      }
   15350 	  }
   15351 	  break;
   15352 
   15353 	case R_ARM_GOTFUNCDESC:
   15354 	  {
   15355 	    if (h == NULL)
   15356 	      {
   15357 		/* Such a relocation is not supposed to be generated
   15358 		   by gcc on a static function.  */
   15359 		/* Anyway if needed it could be handled.  */
   15360 		return false;
   15361 	      }
   15362 	    else
   15363 	      {
   15364 		eh->fdpic_cnts.gotfuncdesc_cnt++;
   15365 	      }
   15366 	  }
   15367 	  break;
   15368 
   15369 	case R_ARM_FUNCDESC:
   15370 	  {
   15371 	    if (h == NULL)
   15372 	      {
   15373 		if (!elf32_arm_allocate_local_sym_info (abfd))
   15374 		  return false;
   15375 		if (r_symndx >= elf32_arm_num_entries (abfd))
   15376 		  return false;
   15377 		elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_cnt += 1;
   15378 		elf32_arm_local_fdpic_cnts (abfd) [r_symndx].funcdesc_offset = -1;
   15379 	      }
   15380 	    else
   15381 	      {
   15382 		eh->fdpic_cnts.funcdesc_cnt++;
   15383 	      }
   15384 	  }
   15385 	  break;
   15386 
   15387 	  case R_ARM_GOT32:
   15388 	  case R_ARM_GOT_PREL:
   15389 	  case R_ARM_TLS_GD32:
   15390 	  case R_ARM_TLS_GD32_FDPIC:
   15391 	  case R_ARM_TLS_IE32:
   15392 	  case R_ARM_TLS_IE32_FDPIC:
   15393 	  case R_ARM_TLS_GOTDESC:
   15394 	  case R_ARM_TLS_DESCSEQ:
   15395 	  case R_ARM_THM_TLS_DESCSEQ:
   15396 	  case R_ARM_TLS_CALL:
   15397 	  case R_ARM_THM_TLS_CALL:
   15398 	    /* This symbol requires a global offset table entry.  */
   15399 	    {
   15400 	      int tls_type, old_tls_type;
   15401 
   15402 	      switch (r_type)
   15403 		{
   15404 		case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
   15405 		case R_ARM_TLS_GD32_FDPIC: tls_type = GOT_TLS_GD; break;
   15406 
   15407 		case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
   15408 		case R_ARM_TLS_IE32_FDPIC: tls_type = GOT_TLS_IE; break;
   15409 
   15410 		case R_ARM_TLS_GOTDESC:
   15411 		case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
   15412 		case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
   15413 		  tls_type = GOT_TLS_GDESC; break;
   15414 
   15415 		default: tls_type = GOT_NORMAL; break;
   15416 		}
   15417 
   15418 	      if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
   15419 		info->flags |= DF_STATIC_TLS;
   15420 
   15421 	      if (h != NULL)
   15422 		{
   15423 		  h->got.refcount++;
   15424 		  old_tls_type = elf32_arm_hash_entry (h)->tls_type;
   15425 		}
   15426 	      else
   15427 		{
   15428 		  /* This is a global offset table entry for a local symbol.  */
   15429 		  if (!elf32_arm_allocate_local_sym_info (abfd))
   15430 		    return false;
   15431 		  if (r_symndx >= elf32_arm_num_entries (abfd))
   15432 		    {
   15433 		      _bfd_error_handler (_("%pB: bad symbol index: %d"), abfd,
   15434 					  r_symndx);
   15435 		      return false;
   15436 		    }
   15437 
   15438 		  elf_local_got_refcounts (abfd)[r_symndx] += 1;
   15439 		  old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
   15440 		}
   15441 
   15442 	      /* If a variable is accessed with both tls methods, two
   15443 		 slots may be created.  */
   15444 	      if (GOT_TLS_GD_ANY_P (old_tls_type)
   15445 		  && GOT_TLS_GD_ANY_P (tls_type))
   15446 		tls_type |= old_tls_type;
   15447 
   15448 	      /* We will already have issued an error message if there
   15449 		 is a TLS/non-TLS mismatch, based on the symbol
   15450 		 type.  So just combine any TLS types needed.  */
   15451 	      if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
   15452 		  && tls_type != GOT_NORMAL)
   15453 		tls_type |= old_tls_type;
   15454 
   15455 	      /* If the symbol is accessed in both IE and GDESC
   15456 		 method, we're able to relax. Turn off the GDESC flag,
   15457 		 without messing up with any other kind of tls types
   15458 		 that may be involved.  */
   15459 	      if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
   15460 		tls_type &= ~GOT_TLS_GDESC;
   15461 
   15462 	      if (old_tls_type != tls_type)
   15463 		{
   15464 		  if (h != NULL)
   15465 		    elf32_arm_hash_entry (h)->tls_type = tls_type;
   15466 		  else
   15467 		    elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
   15468 		}
   15469 	    }
   15470 	    /* Fall through.  */
   15471 
   15472 	  case R_ARM_TLS_LDM32:
   15473 	  case R_ARM_TLS_LDM32_FDPIC:
   15474 	    if (r_type == R_ARM_TLS_LDM32 || r_type == R_ARM_TLS_LDM32_FDPIC)
   15475 		htab->tls_ldm_got.refcount++;
   15476 	    /* Fall through.  */
   15477 
   15478 	  case R_ARM_GOTOFF32:
   15479 	  case R_ARM_GOTPC:
   15480 	    if (htab->root.sgot == NULL
   15481 		&& !create_got_section (htab->root.dynobj, info))
   15482 	      return false;
   15483 	    break;
   15484 
   15485 	  case R_ARM_PC24:
   15486 	  case R_ARM_PLT32:
   15487 	  case R_ARM_CALL:
   15488 	  case R_ARM_JUMP24:
   15489 	  case R_ARM_PREL31:
   15490 	  case R_ARM_THM_CALL:
   15491 	  case R_ARM_THM_JUMP24:
   15492 	  case R_ARM_THM_JUMP19:
   15493 	    call_reloc_p = true;
   15494 	    may_need_local_target_p = true;
   15495 	    break;
   15496 
   15497 	  case R_ARM_ABS12:
   15498 	    /* VxWorks uses dynamic R_ARM_ABS12 relocations for
   15499 	       ldr __GOTT_INDEX__ offsets.  */
   15500 	    if (htab->root.target_os != is_vxworks)
   15501 	      {
   15502 		may_need_local_target_p = true;
   15503 		break;
   15504 	      }
   15505 	    else goto jump_over;
   15506 
   15507 	    /* Fall through.  */
   15508 
   15509 	  case R_ARM_MOVW_ABS_NC:
   15510 	  case R_ARM_MOVT_ABS:
   15511 	  case R_ARM_THM_MOVW_ABS_NC:
   15512 	  case R_ARM_THM_MOVT_ABS:
   15513 	    if (bfd_link_pic (info))
   15514 	      {
   15515 		_bfd_error_handler
   15516 		  (_("%pB: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
   15517 		   abfd, elf32_arm_howto_table_1[r_type].name,
   15518 		   (h) ? h->root.root.string : "a local symbol");
   15519 		bfd_set_error (bfd_error_bad_value);
   15520 		return false;
   15521 	      }
   15522 
   15523 	    /* Fall through.  */
   15524 	  case R_ARM_ABS32:
   15525 	  case R_ARM_ABS32_NOI:
   15526 	jump_over:
   15527 	    if (h != NULL && bfd_link_executable (info))
   15528 	      {
   15529 		h->pointer_equality_needed = 1;
   15530 	      }
   15531 	    /* Fall through.  */
   15532 	  case R_ARM_REL32:
   15533 	  case R_ARM_REL32_NOI:
   15534 	  case R_ARM_MOVW_PREL_NC:
   15535 	  case R_ARM_MOVT_PREL:
   15536 	  case R_ARM_THM_MOVW_PREL_NC:
   15537 	  case R_ARM_THM_MOVT_PREL:
   15538 
   15539 	    /* Should the interworking branches be listed here?  */
   15540 	    if ((bfd_link_pic (info)
   15541 		 || htab->fdpic_p)
   15542 		&& (sec->flags & SEC_ALLOC) != 0)
   15543 	      {
   15544 		if (h == NULL
   15545 		    && elf32_arm_howto_from_type (r_type)->pc_relative)
   15546 		  {
   15547 		    /* In shared libraries and relocatable executables,
   15548 		       we treat local relative references as calls;
   15549 		       see the related SYMBOL_CALLS_LOCAL code in
   15550 		       allocate_dynrelocs.  */
   15551 		    call_reloc_p = true;
   15552 		    may_need_local_target_p = true;
   15553 		  }
   15554 		else
   15555 		  /* We are creating a shared library or relocatable
   15556 		     executable, and this is a reloc against a global symbol,
   15557 		     or a non-PC-relative reloc against a local symbol.
   15558 		     We may need to copy the reloc into the output.  */
   15559 		  may_become_dynamic_p = true;
   15560 	      }
   15561 	    else
   15562 	      may_need_local_target_p = true;
   15563 	    break;
   15564 
   15565 	/* This relocation describes the C++ object vtable hierarchy.
   15566 	   Reconstruct it for later use during GC.  */
   15567 	case R_ARM_GNU_VTINHERIT:
   15568 	  if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
   15569 	    return false;
   15570 	  break;
   15571 
   15572 	/* This relocation describes which C++ vtable entries are actually
   15573 	   used.  Record for later use during GC.  */
   15574 	case R_ARM_GNU_VTENTRY:
   15575 	  if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
   15576 	    return false;
   15577 	  break;
   15578 	}
   15579 
   15580       if (h != NULL)
   15581 	{
   15582 	  if (call_reloc_p)
   15583 	    /* We may need a .plt entry if the function this reloc
   15584 	       refers to is in a different object, regardless of the
   15585 	       symbol's type.  We can't tell for sure yet, because
   15586 	       something later might force the symbol local.  */
   15587 	    h->needs_plt = 1;
   15588 	  else if (may_need_local_target_p)
   15589 	    /* If this reloc is in a read-only section, we might
   15590 	       need a copy reloc.  We can't check reliably at this
   15591 	       stage whether the section is read-only, as input
   15592 	       sections have not yet been mapped to output sections.
   15593 	       Tentatively set the flag for now, and correct in
   15594 	       adjust_dynamic_symbol.  */
   15595 	    h->non_got_ref = 1;
   15596 	}
   15597 
   15598       if (may_need_local_target_p
   15599 	  && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
   15600 	{
   15601 	  union gotplt_union *root_plt;
   15602 	  struct arm_plt_info *arm_plt;
   15603 	  struct arm_local_iplt_info *local_iplt;
   15604 
   15605 	  if (h != NULL)
   15606 	    {
   15607 	      root_plt = &h->plt;
   15608 	      arm_plt = &eh->plt;
   15609 	    }
   15610 	  else
   15611 	    {
   15612 	      local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
   15613 	      if (local_iplt == NULL)
   15614 		return false;
   15615 	      root_plt = &local_iplt->root;
   15616 	      arm_plt = &local_iplt->arm;
   15617 	    }
   15618 
   15619 	  /* If the symbol is a function that doesn't bind locally,
   15620 	     this relocation will need a PLT entry.  */
   15621 	  if (root_plt->refcount != -1)
   15622 	    root_plt->refcount += 1;
   15623 
   15624 	  if (!call_reloc_p)
   15625 	    arm_plt->noncall_refcount++;
   15626 
   15627 	  /* It's too early to use htab->use_blx here, so we have to
   15628 	     record possible blx references separately from
   15629 	     relocs that definitely need a thumb stub.  */
   15630 
   15631 	  if (r_type == R_ARM_THM_CALL)
   15632 	    arm_plt->maybe_thumb_refcount += 1;
   15633 
   15634 	  if (r_type == R_ARM_THM_JUMP24
   15635 	      || r_type == R_ARM_THM_JUMP19)
   15636 	    arm_plt->thumb_refcount += 1;
   15637 	}
   15638 
   15639       if (may_become_dynamic_p)
   15640 	{
   15641 	  struct elf_dyn_relocs *p, **head;
   15642 
   15643 	  /* Create a reloc section in dynobj.  */
   15644 	  if (sreloc == NULL)
   15645 	    {
   15646 	      sreloc = _bfd_elf_make_dynamic_reloc_section
   15647 		(sec, dynobj, 2, abfd, ! htab->use_rel);
   15648 
   15649 	      if (sreloc == NULL)
   15650 		return false;
   15651 	    }
   15652 
   15653 	  /* If this is a global symbol, count the number of
   15654 	     relocations we need for this symbol.  */
   15655 	  if (h != NULL)
   15656 	    head = &h->dyn_relocs;
   15657 	  else
   15658 	    {
   15659 	      head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
   15660 	      if (head == NULL)
   15661 		return false;
   15662 	    }
   15663 
   15664 	  p = *head;
   15665 	  if (p == NULL || p->sec != sec)
   15666 	    {
   15667 	      size_t amt = sizeof *p;
   15668 
   15669 	      p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
   15670 	      if (p == NULL)
   15671 		return false;
   15672 	      p->next = *head;
   15673 	      *head = p;
   15674 	      p->sec = sec;
   15675 	      p->count = 0;
   15676 	      p->pc_count = 0;
   15677 	    }
   15678 
   15679 	  if (elf32_arm_howto_from_type (r_type)->pc_relative)
   15680 	    p->pc_count += 1;
   15681 	  p->count += 1;
   15682 	  if (h == NULL && htab->fdpic_p && !bfd_link_pic (info)
   15683 	      && r_type != R_ARM_ABS32 && r_type != R_ARM_ABS32_NOI)
   15684 	    {
   15685 	      /* Here we only support R_ARM_ABS32 and R_ARM_ABS32_NOI
   15686 		 that will become rofixup.  */
   15687 	      /* This is due to the fact that we suppose all will become rofixup.  */
   15688 	      _bfd_error_handler
   15689 		(_("FDPIC does not yet support %s relocation"
   15690 		   " to become dynamic for executable"),
   15691 		 elf32_arm_howto_table_1[r_type].name);
   15692 	      abort ();
   15693 	    }
   15694 	}
   15695     }
   15696 
   15697   return true;
   15698 }
   15699 
   15700 static void
   15701 elf32_arm_update_relocs (asection *o,
   15702 			 struct bfd_elf_section_reloc_data *reldata)
   15703 {
   15704   void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
   15705   void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
   15706   elf_backend_data *bed;
   15707   _arm_elf_section_data *eado;
   15708   struct bfd_link_order *p;
   15709   bfd_byte *erela_head, *erela;
   15710   Elf_Internal_Rela *irela_head, *irela;
   15711   Elf_Internal_Shdr *rel_hdr;
   15712   bfd *abfd;
   15713   unsigned int count;
   15714 
   15715   eado = get_arm_elf_section_data (o);
   15716 
   15717   if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
   15718     return;
   15719 
   15720   abfd = o->owner;
   15721   bed = get_elf_backend_data (abfd);
   15722   rel_hdr = reldata->hdr;
   15723 
   15724   if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
   15725     {
   15726       swap_in = bed->s->swap_reloc_in;
   15727       swap_out = bed->s->swap_reloc_out;
   15728     }
   15729   else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
   15730     {
   15731       swap_in = bed->s->swap_reloca_in;
   15732       swap_out = bed->s->swap_reloca_out;
   15733     }
   15734   else
   15735     abort ();
   15736 
   15737   erela_head = rel_hdr->contents;
   15738   irela_head = (Elf_Internal_Rela *) bfd_zmalloc
   15739     ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
   15740 
   15741   erela = erela_head;
   15742   irela = irela_head;
   15743   count = 0;
   15744 
   15745   for (p = o->map_head.link_order; p; p = p->next)
   15746     {
   15747       if (p->type == bfd_section_reloc_link_order
   15748 	  || p->type == bfd_symbol_reloc_link_order)
   15749 	{
   15750 	  (*swap_in) (abfd, erela, irela);
   15751 	  erela += rel_hdr->sh_entsize;
   15752 	  irela++;
   15753 	  count++;
   15754 	}
   15755       else if (p->type == bfd_indirect_link_order)
   15756 	{
   15757 	  struct bfd_elf_section_reloc_data *input_reldata;
   15758 	  arm_unwind_table_edit *edit_list, *edit_tail;
   15759 	  _arm_elf_section_data *eadi;
   15760 	  bfd_size_type j;
   15761 	  bfd_vma offset;
   15762 	  asection *i;
   15763 
   15764 	  i = p->u.indirect.section;
   15765 
   15766 	  eadi = get_arm_elf_section_data (i);
   15767 	  edit_list = eadi->u.exidx.unwind_edit_list;
   15768 	  edit_tail = eadi->u.exidx.unwind_edit_tail;
   15769 	  offset = i->output_offset;
   15770 
   15771 	  if (eadi->elf.rel.hdr &&
   15772 	      eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
   15773 	    input_reldata = &eadi->elf.rel;
   15774 	  else if (eadi->elf.rela.hdr &&
   15775 		   eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
   15776 	    input_reldata = &eadi->elf.rela;
   15777 	  else
   15778 	    abort ();
   15779 
   15780 	  if (edit_list)
   15781 	    {
   15782 	      for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
   15783 		{
   15784 		  arm_unwind_table_edit *edit_node, *edit_next;
   15785 		  bfd_vma bias;
   15786 		  bfd_vma reloc_index;
   15787 
   15788 		  (*swap_in) (abfd, erela, irela);
   15789 		  reloc_index = (irela->r_offset - offset) / 8;
   15790 
   15791 		  bias = 0;
   15792 		  edit_node = edit_list;
   15793 		  for (edit_next = edit_list;
   15794 		       edit_next && edit_next->index <= reloc_index;
   15795 		       edit_next = edit_node->next)
   15796 		    {
   15797 		      bias++;
   15798 		      edit_node = edit_next;
   15799 		    }
   15800 
   15801 		  if (edit_node->type != DELETE_EXIDX_ENTRY
   15802 		      || edit_node->index != reloc_index)
   15803 		    {
   15804 		      irela->r_offset -= bias * 8;
   15805 		      irela++;
   15806 		      count++;
   15807 		    }
   15808 
   15809 		  erela += rel_hdr->sh_entsize;
   15810 		}
   15811 
   15812 	      if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
   15813 		{
   15814 		  /* New relocation entity.  */
   15815 		  asection *text_sec = edit_tail->linked_section;
   15816 		  asection *text_out = text_sec->output_section;
   15817 		  bfd_vma exidx_offset = offset + i->size - 8;
   15818 
   15819 		  irela->r_addend = 0;
   15820 		  irela->r_offset = exidx_offset;
   15821 		  irela->r_info = ELF32_R_INFO
   15822 		    (text_out->target_index, R_ARM_PREL31);
   15823 		  irela++;
   15824 		  count++;
   15825 		}
   15826 	    }
   15827 	  else
   15828 	    {
   15829 	      for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
   15830 		{
   15831 		  (*swap_in) (abfd, erela, irela);
   15832 		  erela += rel_hdr->sh_entsize;
   15833 		  irela++;
   15834 		}
   15835 
   15836 	      count += NUM_SHDR_ENTRIES (input_reldata->hdr);
   15837 	    }
   15838 	}
   15839     }
   15840 
   15841   reldata->count = count;
   15842   rel_hdr->sh_size = count * rel_hdr->sh_entsize;
   15843 
   15844   erela = erela_head;
   15845   irela = irela_head;
   15846   while (count > 0)
   15847     {
   15848       (*swap_out) (abfd, irela, erela);
   15849       erela += rel_hdr->sh_entsize;
   15850       irela++;
   15851       count--;
   15852     }
   15853 
   15854   free (irela_head);
   15855 
   15856   /* Hashes are no longer valid.  */
   15857   free (reldata->hashes);
   15858   reldata->hashes = NULL;
   15859 }
   15860 
   15861 /* Unwinding tables are not referenced directly.  This pass marks them as
   15862    required if the corresponding code section is marked.  Similarly, ARMv8-M
   15863    secure entry functions can only be referenced by SG veneers which are
   15864    created after the GC process. They need to be marked in case they reside in
   15865    their own section (as would be the case if code was compiled with
   15866    -ffunction-sections).  */
   15867 
   15868 static bool
   15869 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
   15870 				  elf_gc_mark_hook_fn gc_mark_hook)
   15871 {
   15872   bfd *sub;
   15873   Elf_Internal_Shdr **elf_shdrp;
   15874   asection *cmse_sec;
   15875   obj_attribute *out_attr;
   15876   Elf_Internal_Shdr *symtab_hdr;
   15877   unsigned i, sym_count, ext_start;
   15878   elf_backend_data *bed;
   15879   struct elf_link_hash_entry **sym_hashes;
   15880   struct elf32_arm_link_hash_entry *cmse_hash;
   15881   bool again, is_v8m, first_bfd_browse = true;
   15882   bool extra_marks_added = false;
   15883   asection *isec;
   15884 
   15885   _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
   15886 
   15887   out_attr = elf_known_obj_attributes_proc (info->output_bfd);
   15888   is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
   15889 	   && out_attr[Tag_CPU_arch_profile].i == 'M';
   15890 
   15891   /* Marking EH data may cause additional code sections to be marked,
   15892      requiring multiple passes.  */
   15893   again = true;
   15894   while (again)
   15895     {
   15896       again = false;
   15897       for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
   15898 	{
   15899 	  asection *o;
   15900 
   15901 	  if (! is_arm_elf (sub))
   15902 	    continue;
   15903 
   15904 	  elf_shdrp = elf_elfsections (sub);
   15905 	  for (o = sub->sections; o != NULL; o = o->next)
   15906 	    {
   15907 	      Elf_Internal_Shdr *hdr;
   15908 
   15909 	      hdr = &elf_section_data (o)->this_hdr;
   15910 	      if (hdr->sh_type == SHT_ARM_EXIDX
   15911 		  && hdr->sh_link
   15912 		  && hdr->sh_link < elf_numsections (sub)
   15913 		  && !o->gc_mark
   15914 		  && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
   15915 		{
   15916 		  again = true;
   15917 		  if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
   15918 		    return false;
   15919 		}
   15920 	    }
   15921 
   15922 	  /* Mark section holding ARMv8-M secure entry functions.  We mark all
   15923 	     of them so no need for a second browsing.  */
   15924 	  if (is_v8m && first_bfd_browse)
   15925 	    {
   15926 	      bool debug_sec_need_to_be_marked = false;
   15927 
   15928 	      sym_hashes = elf_sym_hashes (sub);
   15929 	      bed = get_elf_backend_data (sub);
   15930 	      symtab_hdr = &elf_tdata (sub)->symtab_hdr;
   15931 	      sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
   15932 	      ext_start = symtab_hdr->sh_info;
   15933 
   15934 	      /* Scan symbols.  */
   15935 	      for (i = ext_start; i < sym_count; i++)
   15936 		{
   15937 		  cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
   15938 		  if (cmse_hash == NULL)
   15939 		    continue;
   15940 
   15941 		  /* Assume it is a special symbol.  If not, cmse_scan will
   15942 		     warn about it and user can do something about it.  */
   15943 		  if (startswith (cmse_hash->root.root.root.string,
   15944 				  CMSE_PREFIX))
   15945 		    {
   15946 		      cmse_sec = cmse_hash->root.root.u.def.section;
   15947 		      if (!cmse_sec->gc_mark
   15948 			  && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
   15949 			return false;
   15950 		      /* The debug sections related to these secure entry
   15951 			 functions are marked on enabling below flag.  */
   15952 		      debug_sec_need_to_be_marked = true;
   15953 		    }
   15954 		}
   15955 
   15956 	      if (debug_sec_need_to_be_marked)
   15957 		{
   15958 		  /* Looping over all the sections of the object file containing
   15959 		     Armv8-M secure entry functions and marking all the debug
   15960 		     sections.  */
   15961 		  for (isec = sub->sections; isec != NULL; isec = isec->next)
   15962 		    {
   15963 		      /* If not a debug sections, skip it.  */
   15964 		      if (!isec->gc_mark && (isec->flags & SEC_DEBUGGING))
   15965 			{
   15966 			  isec->gc_mark = 1;
   15967 			  extra_marks_added = true;
   15968 			}
   15969 		    }
   15970 		  debug_sec_need_to_be_marked = false;
   15971 		}
   15972 	    }
   15973 	}
   15974 
   15975       first_bfd_browse = false;
   15976     }
   15977 
   15978   /* PR 30354: If we have added extra marks then make sure that any
   15979      dependencies of the newly marked sections are also marked.  */
   15980   if (extra_marks_added)
   15981     _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
   15982 
   15983   return true;
   15984 }
   15985 
   15986 /* Treat mapping symbols as special target symbols.  */
   15987 
   15988 static bool
   15989 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
   15990 {
   15991   return bfd_is_arm_special_symbol_name (sym->name,
   15992 					 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
   15993 }
   15994 
   15995 /* If the ELF symbol SYM might be a function in SEC, return the
   15996    function size and set *CODE_OFF to the function's entry point,
   15997    otherwise return zero.  */
   15998 
   15999 static bfd_size_type
   16000 elf32_arm_maybe_function_sym (const asymbol *sym, asection *sec,
   16001 			      bfd_vma *code_off)
   16002 {
   16003   bfd_size_type size;
   16004   elf_symbol_type * elf_sym = (elf_symbol_type *) sym;
   16005 
   16006   if ((sym->flags & (BSF_SECTION_SYM | BSF_FILE | BSF_OBJECT
   16007 		     | BSF_THREAD_LOCAL | BSF_RELC | BSF_SRELC)) != 0
   16008       || sym->section != sec)
   16009     return 0;
   16010 
   16011   size = (sym->flags & BSF_SYNTHETIC) ? 0 : elf_sym->internal_elf_sym.st_size;
   16012 
   16013   if (!(sym->flags & BSF_SYNTHETIC))
   16014     switch (ELF_ST_TYPE (elf_sym->internal_elf_sym.st_info))
   16015       {
   16016 	case STT_NOTYPE:
   16017 	  /* Ignore symbols created by the annobin plugin for gcc and clang.
   16018 	     These symbols are hidden, local, notype and have a size of 0.  */
   16019 	  if (size == 0
   16020 	      && sym->flags & BSF_LOCAL
   16021 	      && ELF_ST_VISIBILITY (elf_sym->internal_elf_sym.st_other) == STV_HIDDEN)
   16022 	    return 0;
   16023 	  /* Fall through.  */
   16024 	case STT_FUNC:
   16025 	case STT_ARM_TFUNC:
   16026 	  /* FIXME: Allow STT_GNU_IFUNC as well ?  */
   16027 	  break;
   16028 	default:
   16029 	  return 0;
   16030       }
   16031 
   16032   if ((sym->flags & BSF_LOCAL)
   16033       && bfd_is_arm_special_symbol_name (sym->name,
   16034 					 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
   16035     return 0;
   16036 
   16037   *code_off = sym->value;
   16038 
   16039   /* Do not return 0 for the function's size.  */
   16040   return size ? size : 1;
   16041 
   16042 }
   16043 
   16044 static bool
   16045 elf32_arm_find_inliner_info (bfd *	    abfd,
   16046 			     const char **  filename_ptr,
   16047 			     const char **  functionname_ptr,
   16048 			     unsigned int * line_ptr)
   16049 {
   16050   bool found;
   16051   found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
   16052 					 functionname_ptr, line_ptr,
   16053 					 & elf_tdata (abfd)->dwarf2_find_line_info);
   16054   return found;
   16055 }
   16056 
   16057 /* Adjust a symbol defined by a dynamic object and referenced by a
   16058    regular object.  The current definition is in some section of the
   16059    dynamic object, but we're not including those sections.  We have to
   16060    change the definition to something the rest of the link can
   16061    understand.  */
   16062 
   16063 static bool
   16064 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
   16065 				 struct elf_link_hash_entry * h)
   16066 {
   16067   bfd * dynobj;
   16068   asection *s, *srel;
   16069   struct elf32_arm_link_hash_entry * eh;
   16070   struct elf32_arm_link_hash_table *globals;
   16071 
   16072   globals = elf32_arm_hash_table (info);
   16073   if (globals == NULL)
   16074     return false;
   16075 
   16076   dynobj = elf_hash_table (info)->dynobj;
   16077 
   16078   /* Make sure we know what is going on here.  */
   16079   BFD_ASSERT (dynobj != NULL
   16080 	      && (h->needs_plt
   16081 		  || h->type == STT_GNU_IFUNC
   16082 		  || h->is_weakalias
   16083 		  || (h->def_dynamic
   16084 		      && h->ref_regular
   16085 		      && !h->def_regular)));
   16086 
   16087   eh = (struct elf32_arm_link_hash_entry *) h;
   16088 
   16089   /* If this is a function, put it in the procedure linkage table.  We
   16090      will fill in the contents of the procedure linkage table later,
   16091      when we know the address of the .got section.  */
   16092   if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
   16093     {
   16094       /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
   16095 	 symbol binds locally.  */
   16096       if (h->plt.refcount <= 0
   16097 	  || (h->type != STT_GNU_IFUNC
   16098 	      && (SYMBOL_CALLS_LOCAL (info, h)
   16099 		  || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
   16100 		      && h->root.type == bfd_link_hash_undefweak))))
   16101 	{
   16102 	  /* This case can occur if we saw a PLT32 reloc in an input
   16103 	     file, but the symbol was never referred to by a dynamic
   16104 	     object, or if all references were garbage collected.  In
   16105 	     such a case, we don't actually need to build a procedure
   16106 	     linkage table, and we can just do a PC24 reloc instead.  */
   16107 	  h->plt.offset = (bfd_vma) -1;
   16108 	  eh->plt.thumb_refcount = 0;
   16109 	  eh->plt.maybe_thumb_refcount = 0;
   16110 	  eh->plt.noncall_refcount = 0;
   16111 	  h->needs_plt = 0;
   16112 	}
   16113 
   16114       return true;
   16115     }
   16116   else
   16117     {
   16118       /* It's possible that we incorrectly decided a .plt reloc was
   16119 	 needed for an R_ARM_PC24 or similar reloc to a non-function sym
   16120 	 in check_relocs.  We can't decide accurately between function
   16121 	 and non-function syms in check-relocs; Objects loaded later in
   16122 	 the link may change h->type.  So fix it now.  */
   16123       h->plt.offset = (bfd_vma) -1;
   16124       eh->plt.thumb_refcount = 0;
   16125       eh->plt.maybe_thumb_refcount = 0;
   16126       eh->plt.noncall_refcount = 0;
   16127     }
   16128 
   16129   /* If this is a weak symbol, and there is a real definition, the
   16130      processor independent code will have arranged for us to see the
   16131      real definition first, and we can just use the same value.  */
   16132   if (h->is_weakalias)
   16133     {
   16134       struct elf_link_hash_entry *def = weakdef (h);
   16135       BFD_ASSERT (def->root.type == bfd_link_hash_defined);
   16136       h->root.u.def.section = def->root.u.def.section;
   16137       h->root.u.def.value = def->root.u.def.value;
   16138       return true;
   16139     }
   16140 
   16141   /* If there are no non-GOT references, we do not need a copy
   16142      relocation.  */
   16143   if (!h->non_got_ref)
   16144     return true;
   16145 
   16146   /* This is a reference to a symbol defined by a dynamic object which
   16147      is not a function.  */
   16148 
   16149   /* If we are creating a shared library, we must presume that the
   16150      only references to the symbol are via the global offset table.
   16151      For such cases we need not do anything here; the relocations will
   16152      be handled correctly by relocate_section.  */
   16153   if (bfd_link_pic (info))
   16154     return true;
   16155 
   16156   /* We must allocate the symbol in our .dynbss section, which will
   16157      become part of the .bss section of the executable.  There will be
   16158      an entry for this symbol in the .dynsym section.  The dynamic
   16159      object will contain position independent code, so all references
   16160      from the dynamic object to this symbol will go through the global
   16161      offset table.  The dynamic linker will use the .dynsym entry to
   16162      determine the address it must put in the global offset table, so
   16163      both the dynamic object and the regular object will refer to the
   16164      same memory location for the variable.  */
   16165   /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
   16166      linker to copy the initial value out of the dynamic object and into
   16167      the runtime process image.  We need to remember the offset into the
   16168      .rel(a).bss section we are going to use.  */
   16169   if ((h->root.u.def.section->flags & SEC_READONLY) != 0)
   16170     {
   16171       s = globals->root.sdynrelro;
   16172       srel = globals->root.sreldynrelro;
   16173     }
   16174   else
   16175     {
   16176       s = globals->root.sdynbss;
   16177       srel = globals->root.srelbss;
   16178     }
   16179   if (info->nocopyreloc == 0
   16180       && (h->root.u.def.section->flags & SEC_ALLOC) != 0
   16181       && h->size != 0)
   16182     {
   16183       elf32_arm_allocate_dynrelocs (info, srel, 1);
   16184       h->needs_copy = 1;
   16185     }
   16186 
   16187   return _bfd_elf_adjust_dynamic_copy (info, h, s);
   16188 }
   16189 
   16190 /* Allocate space in .plt, .got and associated reloc sections for
   16191    dynamic relocs.  */
   16192 
   16193 static bool
   16194 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
   16195 {
   16196   struct bfd_link_info *info;
   16197   struct elf32_arm_link_hash_table *htab;
   16198   struct elf32_arm_link_hash_entry *eh;
   16199   struct elf_dyn_relocs *p;
   16200 
   16201   if (h->root.type == bfd_link_hash_indirect)
   16202     return true;
   16203 
   16204   eh = (struct elf32_arm_link_hash_entry *) h;
   16205 
   16206   info = (struct bfd_link_info *) inf;
   16207   htab = elf32_arm_hash_table (info);
   16208   if (htab == NULL)
   16209     return false;
   16210 
   16211   if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
   16212       && h->plt.refcount > 0)
   16213     {
   16214       /* Make sure this symbol is output as a dynamic symbol.
   16215 	 Undefined weak syms won't yet be marked as dynamic.  */
   16216       if (h->dynindx == -1 && !h->forced_local
   16217 	  && h->root.type == bfd_link_hash_undefweak)
   16218 	{
   16219 	  if (! bfd_elf_link_record_dynamic_symbol (info, h))
   16220 	    return false;
   16221 	}
   16222 
   16223       /* If the call in the PLT entry binds locally, the associated
   16224 	 GOT entry should use an R_ARM_IRELATIVE relocation instead of
   16225 	 the usual R_ARM_JUMP_SLOT.  Put it in the .iplt section rather
   16226 	 than the .plt section.  */
   16227       if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
   16228 	{
   16229 	  eh->is_iplt = 1;
   16230 	  if (eh->plt.noncall_refcount == 0
   16231 	      && SYMBOL_REFERENCES_LOCAL (info, h))
   16232 	    /* All non-call references can be resolved directly.
   16233 	       This means that they can (and in some cases, must)
   16234 	       resolve directly to the run-time target, rather than
   16235 	       to the PLT.  That in turns means that any .got entry
   16236 	       would be equal to the .igot.plt entry, so there's
   16237 	       no point having both.  */
   16238 	    h->got.refcount = 0;
   16239 	}
   16240 
   16241       if (bfd_link_pic (info)
   16242 	  || eh->is_iplt
   16243 	  || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
   16244 	{
   16245 	  elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
   16246 
   16247 	  /* If this symbol is not defined in a regular file, and we are
   16248 	     not generating a shared library, then set the symbol to this
   16249 	     location in the .plt.  This is required to make function
   16250 	     pointers compare as equal between the normal executable and
   16251 	     the shared library.  */
   16252 	  if (! bfd_link_pic (info)
   16253 	      && !h->def_regular)
   16254 	    {
   16255 	      h->root.u.def.section = htab->root.splt;
   16256 	      h->root.u.def.value = h->plt.offset;
   16257 
   16258 	      /* Make sure the function is not marked as Thumb, in case
   16259 		 it is the target of an ABS32 relocation, which will
   16260 		 point to the PLT entry.  */
   16261 	      ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
   16262 	    }
   16263 
   16264 	  /* VxWorks executables have a second set of relocations for
   16265 	     each PLT entry.  They go in a separate relocation section,
   16266 	     which is processed by the kernel loader.  */
   16267 	  if (htab->root.target_os == is_vxworks && !bfd_link_pic (info))
   16268 	    {
   16269 	      /* There is a relocation for the initial PLT entry:
   16270 		 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_.  */
   16271 	      if (h->plt.offset == htab->plt_header_size)
   16272 		elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
   16273 
   16274 	      /* There are two extra relocations for each subsequent
   16275 		 PLT entry: an R_ARM_32 relocation for the GOT entry,
   16276 		 and an R_ARM_32 relocation for the PLT entry.  */
   16277 	      elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
   16278 	    }
   16279 	}
   16280       else
   16281 	{
   16282 	  h->plt.offset = (bfd_vma) -1;
   16283 	  h->needs_plt = 0;
   16284 	}
   16285     }
   16286   else
   16287     {
   16288       h->plt.offset = (bfd_vma) -1;
   16289       h->needs_plt = 0;
   16290     }
   16291 
   16292   eh = (struct elf32_arm_link_hash_entry *) h;
   16293   eh->tlsdesc_got = (bfd_vma) -1;
   16294 
   16295   if (h->got.refcount > 0)
   16296     {
   16297       asection *s;
   16298       bool dyn;
   16299       int tls_type = elf32_arm_hash_entry (h)->tls_type;
   16300       int indx;
   16301 
   16302       /* Make sure this symbol is output as a dynamic symbol.
   16303 	 Undefined weak syms won't yet be marked as dynamic.  */
   16304       if (htab->root.dynamic_sections_created
   16305 	  && h->dynindx == -1
   16306 	  && !h->forced_local
   16307 	  && h->root.type == bfd_link_hash_undefweak)
   16308 	{
   16309 	  if (! bfd_elf_link_record_dynamic_symbol (info, h))
   16310 	    return false;
   16311 	}
   16312 
   16313       s = htab->root.sgot;
   16314       h->got.offset = s->size;
   16315 
   16316       if (tls_type == GOT_UNKNOWN)
   16317 	abort ();
   16318 
   16319       if (tls_type == GOT_NORMAL)
   16320 	/* Non-TLS symbols need one GOT slot.  */
   16321 	s->size += 4;
   16322       else
   16323 	{
   16324 	  if (tls_type & GOT_TLS_GDESC)
   16325 	    {
   16326 	      /* R_ARM_TLS_DESC needs 2 GOT slots.  */
   16327 	      eh->tlsdesc_got
   16328 		= (htab->root.sgotplt->size
   16329 		   - elf32_arm_compute_jump_table_size (htab));
   16330 	      htab->root.sgotplt->size += 8;
   16331 	      h->got.offset = (bfd_vma) -2;
   16332 	      /* plt.got_offset needs to know there's a TLS_DESC
   16333 		 reloc in the middle of .got.plt.  */
   16334 	      htab->num_tls_desc++;
   16335 	    }
   16336 
   16337 	  if (tls_type & GOT_TLS_GD)
   16338 	    {
   16339 	      /* R_ARM_TLS_GD32 and R_ARM_TLS_GD32_FDPIC need two
   16340 		 consecutive GOT slots.  If the symbol is both GD
   16341 		 and GDESC, got.offset may have been
   16342 		 overwritten.  */
   16343 	      h->got.offset = s->size;
   16344 	      s->size += 8;
   16345 	    }
   16346 
   16347 	  if (tls_type & GOT_TLS_IE)
   16348 	    /* R_ARM_TLS_IE32/R_ARM_TLS_IE32_FDPIC need one GOT
   16349 	       slot.  */
   16350 	    s->size += 4;
   16351 	}
   16352 
   16353       dyn = htab->root.dynamic_sections_created;
   16354 
   16355       indx = 0;
   16356       if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
   16357 	  && (!bfd_link_pic (info)
   16358 	      || !SYMBOL_REFERENCES_LOCAL (info, h)))
   16359 	indx = h->dynindx;
   16360 
   16361       if (tls_type != GOT_NORMAL
   16362 	  && (bfd_link_dll (info) || indx != 0)
   16363 	  && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
   16364 	      || h->root.type != bfd_link_hash_undefweak))
   16365 	{
   16366 	  if (tls_type & GOT_TLS_IE)
   16367 	    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16368 
   16369 	  if (tls_type & GOT_TLS_GD)
   16370 	    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16371 
   16372 	  if (tls_type & GOT_TLS_GDESC)
   16373 	    {
   16374 	      elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
   16375 	      /* GDESC needs a trampoline to jump to.  */
   16376 	      htab->tls_trampoline = -1;
   16377 	    }
   16378 
   16379 	  /* Only GD needs it.  GDESC just emits one relocation per
   16380 	     2 entries.  */
   16381 	  if ((tls_type & GOT_TLS_GD) && indx != 0)
   16382 	    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16383 	}
   16384       else if (((indx != -1) || htab->fdpic_p)
   16385 	       && !SYMBOL_REFERENCES_LOCAL (info, h))
   16386 	{
   16387 	  if (htab->root.dynamic_sections_created)
   16388 	    /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation.  */
   16389 	    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16390 	}
   16391       else if (h->type == STT_GNU_IFUNC
   16392 	       && eh->plt.noncall_refcount == 0)
   16393 	/* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
   16394 	   they all resolve dynamically instead.  Reserve room for the
   16395 	   GOT entry's R_ARM_IRELATIVE relocation.  */
   16396 	elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
   16397       else if (bfd_link_pic (info)
   16398 	       && !UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
   16399 	/* Reserve room for the GOT entry's R_ARM_RELATIVE relocation.  */
   16400 	elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16401       else if (htab->fdpic_p && tls_type == GOT_NORMAL)
   16402 	/* Reserve room for rofixup for FDPIC executable.  */
   16403 	/* TLS relocs do not need space since they are completely
   16404 	   resolved.  */
   16405 	htab->srofixup->size += 4;
   16406     }
   16407   else
   16408     h->got.offset = (bfd_vma) -1;
   16409 
   16410   /* FDPIC support.  */
   16411   if (eh->fdpic_cnts.gotofffuncdesc_cnt > 0)
   16412     {
   16413       /* Symbol musn't be exported.  */
   16414       if (h->dynindx != -1)
   16415 	abort ();
   16416 
   16417       /* We only allocate one function descriptor with its associated
   16418 	 relocation.  */
   16419       if (eh->fdpic_cnts.funcdesc_offset == -1)
   16420 	{
   16421 	  asection *s = htab->root.sgot;
   16422 
   16423 	  eh->fdpic_cnts.funcdesc_offset = s->size;
   16424 	  s->size += 8;
   16425 	  /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups.  */
   16426 	  if (bfd_link_pic (info))
   16427 	    elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16428 	  else
   16429 	    htab->srofixup->size += 8;
   16430 	}
   16431     }
   16432 
   16433   if (eh->fdpic_cnts.gotfuncdesc_cnt > 0)
   16434     {
   16435       asection *s = htab->root.sgot;
   16436 
   16437       if (htab->root.dynamic_sections_created && h->dynindx == -1
   16438 	  && !h->forced_local)
   16439 	if (! bfd_elf_link_record_dynamic_symbol (info, h))
   16440 	  return false;
   16441 
   16442       if (h->dynindx == -1)
   16443 	{
   16444 	  /* We only allocate one function descriptor with its
   16445 	     associated relocation.  */
   16446 	  if (eh->fdpic_cnts.funcdesc_offset == -1)
   16447 	    {
   16448 
   16449 	      eh->fdpic_cnts.funcdesc_offset = s->size;
   16450 	      s->size += 8;
   16451 	      /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
   16452 		 rofixups.  */
   16453 	      if (bfd_link_pic (info))
   16454 		elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16455 	      else
   16456 		htab->srofixup->size += 8;
   16457 	    }
   16458 	}
   16459 
   16460       /* Add one entry into the GOT and a R_ARM_FUNCDESC or
   16461 	 R_ARM_RELATIVE/rofixup relocation on it.  */
   16462       eh->fdpic_cnts.gotfuncdesc_offset = s->size;
   16463       s->size += 4;
   16464       if (h->dynindx == -1 && !bfd_link_pic (info))
   16465 	htab->srofixup->size += 4;
   16466       else
   16467 	elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16468     }
   16469 
   16470   if (eh->fdpic_cnts.funcdesc_cnt > 0)
   16471     {
   16472       if (htab->root.dynamic_sections_created && h->dynindx == -1
   16473 	  && !h->forced_local)
   16474 	if (! bfd_elf_link_record_dynamic_symbol (info, h))
   16475 	  return false;
   16476 
   16477       if (h->dynindx == -1)
   16478 	{
   16479 	  /* We only allocate one function descriptor with its
   16480 	     associated relocation.  */
   16481 	  if (eh->fdpic_cnts.funcdesc_offset == -1)
   16482 	    {
   16483 	      asection *s = htab->root.sgot;
   16484 
   16485 	      eh->fdpic_cnts.funcdesc_offset = s->size;
   16486 	      s->size += 8;
   16487 	      /* We will add an R_ARM_FUNCDESC_VALUE relocation or two
   16488 		 rofixups.  */
   16489 	      if (bfd_link_pic (info))
   16490 		elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16491 	      else
   16492 		htab->srofixup->size += 8;
   16493 	    }
   16494 	}
   16495       if (h->dynindx == -1 && !bfd_link_pic (info))
   16496 	{
   16497 	  /* For FDPIC executable we replace R_ARM_RELATIVE with a rofixup.  */
   16498 	  htab->srofixup->size += 4 * eh->fdpic_cnts.funcdesc_cnt;
   16499 	}
   16500       else
   16501 	{
   16502 	  /* Will need one dynamic reloc per reference. will be either
   16503 	     R_ARM_FUNCDESC or R_ARM_RELATIVE for hidden symbols.  */
   16504 	  elf32_arm_allocate_dynrelocs (info, htab->root.srelgot,
   16505 					eh->fdpic_cnts.funcdesc_cnt);
   16506 	}
   16507     }
   16508 
   16509   /* Allocate stubs for exported Thumb functions on v4t.  */
   16510   if (!htab->use_blx && h->dynindx != -1
   16511       && h->def_regular
   16512       && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
   16513       && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
   16514     {
   16515       struct elf_link_hash_entry * th;
   16516       struct bfd_link_hash_entry * bh;
   16517       struct elf_link_hash_entry * myh;
   16518       char name[1024];
   16519       asection *s;
   16520       bh = NULL;
   16521       /* Create a new symbol to regist the real location of the function.  */
   16522       s = h->root.u.def.section;
   16523       sprintf (name, "__real_%s", h->root.root.string);
   16524       _bfd_generic_link_add_one_symbol (info, s->owner,
   16525 					name, BSF_GLOBAL, s,
   16526 					h->root.u.def.value,
   16527 					NULL, true, false, &bh);
   16528 
   16529       myh = (struct elf_link_hash_entry *) bh;
   16530       myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   16531       myh->forced_local = 1;
   16532       ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
   16533       eh->export_glue = myh;
   16534       th = record_arm_to_thumb_glue (info, h);
   16535       /* Point the symbol at the stub.  */
   16536       h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
   16537       ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
   16538       h->root.u.def.section = th->root.u.def.section;
   16539       h->root.u.def.value = th->root.u.def.value & ~1;
   16540     }
   16541 
   16542   if (h->dyn_relocs == NULL)
   16543     return true;
   16544 
   16545   /* In the shared -Bsymbolic case, discard space allocated for
   16546      dynamic pc-relative relocs against symbols which turn out to be
   16547      defined in regular objects.  For the normal shared case, discard
   16548      space for pc-relative relocs that have become local due to symbol
   16549      visibility changes.  */
   16550 
   16551   if (bfd_link_pic (info)
   16552       || htab->fdpic_p)
   16553     {
   16554       /* Relocs that use pc_count are PC-relative forms, which will appear
   16555 	 on something like ".long foo - ." or "movw REG, foo - .".  We want
   16556 	 calls to protected symbols to resolve directly to the function
   16557 	 rather than going via the plt.  If people want function pointer
   16558 	 comparisons to work as expected then they should avoid writing
   16559 	 assembly like ".long foo - .".  */
   16560       if (SYMBOL_CALLS_LOCAL (info, h))
   16561 	{
   16562 	  struct elf_dyn_relocs **pp;
   16563 
   16564 	  for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
   16565 	    {
   16566 	      p->count -= p->pc_count;
   16567 	      p->pc_count = 0;
   16568 	      if (p->count == 0)
   16569 		*pp = p->next;
   16570 	      else
   16571 		pp = &p->next;
   16572 	    }
   16573 	}
   16574 
   16575       if (htab->root.target_os == is_vxworks)
   16576 	{
   16577 	  struct elf_dyn_relocs **pp;
   16578 
   16579 	  for (pp = &h->dyn_relocs; (p = *pp) != NULL; )
   16580 	    {
   16581 	      if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
   16582 		*pp = p->next;
   16583 	      else
   16584 		pp = &p->next;
   16585 	    }
   16586 	}
   16587 
   16588       /* Also discard relocs on undefined weak syms with non-default
   16589 	 visibility.  */
   16590       if (h->dyn_relocs != NULL
   16591 	  && h->root.type == bfd_link_hash_undefweak)
   16592 	{
   16593 	  if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
   16594 	      || UNDEFWEAK_NO_DYNAMIC_RELOC (info, h))
   16595 	    h->dyn_relocs = NULL;
   16596 
   16597 	  /* Make sure undefined weak symbols are output as a dynamic
   16598 	     symbol in PIEs.  */
   16599 	  else if (htab->root.dynamic_sections_created && h->dynindx == -1
   16600 		   && !h->forced_local)
   16601 	    {
   16602 	      if (! bfd_elf_link_record_dynamic_symbol (info, h))
   16603 		return false;
   16604 	    }
   16605 	}
   16606     }
   16607   else
   16608     {
   16609       /* For the non-shared case, discard space for relocs against
   16610 	 symbols which turn out to need copy relocs or are not
   16611 	 dynamic.  */
   16612 
   16613       if (!h->non_got_ref
   16614 	  && ((h->def_dynamic
   16615 	       && !h->def_regular)
   16616 	      || (htab->root.dynamic_sections_created
   16617 		  && (h->root.type == bfd_link_hash_undefweak
   16618 		      || h->root.type == bfd_link_hash_undefined))))
   16619 	{
   16620 	  /* Make sure this symbol is output as a dynamic symbol.
   16621 	     Undefined weak syms won't yet be marked as dynamic.  */
   16622 	  if (h->dynindx == -1 && !h->forced_local
   16623 	      && h->root.type == bfd_link_hash_undefweak)
   16624 	    {
   16625 	      if (! bfd_elf_link_record_dynamic_symbol (info, h))
   16626 		return false;
   16627 	    }
   16628 
   16629 	  /* If that succeeded, we know we'll be keeping all the
   16630 	     relocs.  */
   16631 	  if (h->dynindx != -1)
   16632 	    goto keep;
   16633 	}
   16634 
   16635       h->dyn_relocs = NULL;
   16636 
   16637     keep: ;
   16638     }
   16639 
   16640   /* Finally, allocate space.  */
   16641   for (p = h->dyn_relocs; p != NULL; p = p->next)
   16642     {
   16643       asection *sreloc = elf_section_data (p->sec)->sreloc;
   16644 
   16645       if (h->type == STT_GNU_IFUNC
   16646 	  && eh->plt.noncall_refcount == 0
   16647 	  && SYMBOL_REFERENCES_LOCAL (info, h))
   16648 	elf32_arm_allocate_irelocs (info, sreloc, p->count);
   16649       else if (h->dynindx != -1
   16650 	       && (!bfd_link_pic (info) || !info->symbolic || !h->def_regular))
   16651 	elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
   16652       else if (htab->fdpic_p && !bfd_link_pic (info))
   16653 	htab->srofixup->size += 4 * p->count;
   16654       else
   16655 	elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
   16656     }
   16657 
   16658   return true;
   16659 }
   16660 
   16661 void
   16662 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
   16663 				 int byteswap_code)
   16664 {
   16665   struct elf32_arm_link_hash_table *globals;
   16666 
   16667   globals = elf32_arm_hash_table (info);
   16668   if (globals == NULL)
   16669     return;
   16670 
   16671   globals->byteswap_code = byteswap_code;
   16672 }
   16673 
   16674 /* Set the sizes of the dynamic sections.  */
   16675 
   16676 static bool
   16677 elf32_arm_late_size_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
   16678 			      struct bfd_link_info * info)
   16679 {
   16680   bfd * dynobj;
   16681   asection * s;
   16682   bool relocs;
   16683   bfd *ibfd;
   16684   struct elf32_arm_link_hash_table *htab;
   16685 
   16686   htab = elf32_arm_hash_table (info);
   16687   if (htab == NULL)
   16688     return false;
   16689 
   16690   dynobj = elf_hash_table (info)->dynobj;
   16691   if (dynobj == NULL)
   16692     return true;
   16693 
   16694   check_use_blx (htab);
   16695 
   16696   if (elf_hash_table (info)->dynamic_sections_created)
   16697     {
   16698       /* Set the contents of the .interp section to the interpreter.  */
   16699       if (bfd_link_executable (info) && !info->nointerp)
   16700 	{
   16701 	  s = elf_hash_table (info)->interp;
   16702 	  BFD_ASSERT (s != NULL);
   16703 	  s->size = sizeof ELF_DYNAMIC_INTERPRETER;
   16704 	  s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
   16705 	  s->alloced = 1;
   16706 	}
   16707     }
   16708 
   16709   /* Set up .got offsets for local syms, and space for local dynamic
   16710      relocs.  */
   16711   for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
   16712     {
   16713       bfd_signed_vma *local_got;
   16714       bfd_signed_vma *end_local_got;
   16715       struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
   16716       char *local_tls_type;
   16717       bfd_vma *local_tlsdesc_gotent;
   16718       bfd_size_type locsymcount;
   16719       Elf_Internal_Shdr *symtab_hdr;
   16720       asection *srel;
   16721       unsigned int symndx;
   16722       struct fdpic_local *local_fdpic_cnts;
   16723 
   16724       if (! is_arm_elf (ibfd))
   16725 	continue;
   16726 
   16727       for (s = ibfd->sections; s != NULL; s = s->next)
   16728 	{
   16729 	  struct elf_dyn_relocs *p;
   16730 
   16731 	  for (p = (struct elf_dyn_relocs *)
   16732 		   elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
   16733 	    {
   16734 	      if (!bfd_is_abs_section (p->sec)
   16735 		  && bfd_is_abs_section (p->sec->output_section))
   16736 		{
   16737 		  /* Input section has been discarded, either because
   16738 		     it is a copy of a linkonce section or due to
   16739 		     linker script /DISCARD/, so we'll be discarding
   16740 		     the relocs too.  */
   16741 		}
   16742 	      else if (htab->root.target_os == is_vxworks
   16743 		       && strcmp (p->sec->output_section->name,
   16744 				  ".tls_vars") == 0)
   16745 		{
   16746 		  /* Relocations in vxworks .tls_vars sections are
   16747 		     handled specially by the loader.  */
   16748 		}
   16749 	      else if (p->count != 0)
   16750 		{
   16751 		  srel = elf_section_data (p->sec)->sreloc;
   16752 		  if (htab->fdpic_p && !bfd_link_pic (info))
   16753 		    htab->srofixup->size += 4 * p->count;
   16754 		  else
   16755 		    elf32_arm_allocate_dynrelocs (info, srel, p->count);
   16756 		  if ((p->sec->output_section->flags & SEC_READONLY) != 0)
   16757 		    info->flags |= DF_TEXTREL;
   16758 		}
   16759 	    }
   16760 	}
   16761 
   16762       local_got = elf_local_got_refcounts (ibfd);
   16763       if (local_got == NULL)
   16764 	continue;
   16765 
   16766       symtab_hdr = & elf_symtab_hdr (ibfd);
   16767       locsymcount = symtab_hdr->sh_info;
   16768       end_local_got = local_got + locsymcount;
   16769       local_iplt_ptr = elf32_arm_local_iplt (ibfd);
   16770       local_tls_type = elf32_arm_local_got_tls_type (ibfd);
   16771       local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
   16772       local_fdpic_cnts = elf32_arm_local_fdpic_cnts (ibfd);
   16773       symndx = 0;
   16774       s = htab->root.sgot;
   16775       srel = htab->root.srelgot;
   16776       for (; local_got < end_local_got;
   16777 	   ++local_got, ++local_iplt_ptr, ++local_tls_type,
   16778 	   ++local_tlsdesc_gotent, ++symndx, ++local_fdpic_cnts)
   16779 	{
   16780 	  if (symndx >= elf32_arm_num_entries (ibfd))
   16781 	    return false;
   16782 
   16783 	  *local_tlsdesc_gotent = (bfd_vma) -1;
   16784 	  local_iplt = *local_iplt_ptr;
   16785 
   16786 	  /* FDPIC support.  */
   16787 	  if (local_fdpic_cnts->gotofffuncdesc_cnt > 0)
   16788 	    {
   16789 	      if (local_fdpic_cnts->funcdesc_offset == -1)
   16790 		{
   16791 		  local_fdpic_cnts->funcdesc_offset = s->size;
   16792 		  s->size += 8;
   16793 
   16794 		  /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups.  */
   16795 		  if (bfd_link_pic (info))
   16796 		    elf32_arm_allocate_dynrelocs (info, srel, 1);
   16797 		  else
   16798 		    htab->srofixup->size += 8;
   16799 		}
   16800 	    }
   16801 
   16802 	  if (local_fdpic_cnts->funcdesc_cnt > 0)
   16803 	    {
   16804 	      if (local_fdpic_cnts->funcdesc_offset == -1)
   16805 		{
   16806 		  local_fdpic_cnts->funcdesc_offset = s->size;
   16807 		  s->size += 8;
   16808 
   16809 		  /* We will add an R_ARM_FUNCDESC_VALUE relocation or two rofixups.  */
   16810 		  if (bfd_link_pic (info))
   16811 		    elf32_arm_allocate_dynrelocs (info, srel, 1);
   16812 		  else
   16813 		    htab->srofixup->size += 8;
   16814 		}
   16815 
   16816 	      /* We will add n R_ARM_RELATIVE relocations or n rofixups.  */
   16817 	      if (bfd_link_pic (info))
   16818 		elf32_arm_allocate_dynrelocs (info, srel, local_fdpic_cnts->funcdesc_cnt);
   16819 	      else
   16820 		htab->srofixup->size += 4 * local_fdpic_cnts->funcdesc_cnt;
   16821 	    }
   16822 
   16823 	  if (local_iplt != NULL)
   16824 	    {
   16825 	      struct elf_dyn_relocs *p;
   16826 
   16827 	      if (local_iplt->root.refcount > 0)
   16828 		{
   16829 		  elf32_arm_allocate_plt_entry (info, true,
   16830 						&local_iplt->root,
   16831 						&local_iplt->arm);
   16832 		  if (local_iplt->arm.noncall_refcount == 0)
   16833 		    /* All references to the PLT are calls, so all
   16834 		       non-call references can resolve directly to the
   16835 		       run-time target.  This means that the .got entry
   16836 		       would be the same as the .igot.plt entry, so there's
   16837 		       no point creating both.  */
   16838 		    *local_got = 0;
   16839 		}
   16840 	      else
   16841 		{
   16842 		  BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
   16843 		  local_iplt->root.offset = (bfd_vma) -1;
   16844 		}
   16845 
   16846 	      for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
   16847 		{
   16848 		  asection *psrel;
   16849 
   16850 		  psrel = elf_section_data (p->sec)->sreloc;
   16851 		  if (local_iplt->arm.noncall_refcount == 0)
   16852 		    elf32_arm_allocate_irelocs (info, psrel, p->count);
   16853 		  else
   16854 		    elf32_arm_allocate_dynrelocs (info, psrel, p->count);
   16855 		}
   16856 	    }
   16857 	  if (*local_got > 0)
   16858 	    {
   16859 	      Elf_Internal_Sym *isym;
   16860 
   16861 	      *local_got = s->size;
   16862 	      if (*local_tls_type & GOT_TLS_GD)
   16863 		/* TLS_GD relocs need an 8-byte structure in the GOT.  */
   16864 		s->size += 8;
   16865 	      if (*local_tls_type & GOT_TLS_GDESC)
   16866 		{
   16867 		  *local_tlsdesc_gotent = htab->root.sgotplt->size
   16868 		    - elf32_arm_compute_jump_table_size (htab);
   16869 		  htab->root.sgotplt->size += 8;
   16870 		  *local_got = (bfd_vma) -2;
   16871 		  /* plt.got_offset needs to know there's a TLS_DESC
   16872 		     reloc in the middle of .got.plt.  */
   16873 		  htab->num_tls_desc++;
   16874 		}
   16875 	      if (*local_tls_type & GOT_TLS_IE)
   16876 		s->size += 4;
   16877 
   16878 	      if (*local_tls_type & GOT_NORMAL)
   16879 		{
   16880 		  /* If the symbol is both GD and GDESC, *local_got
   16881 		     may have been overwritten.  */
   16882 		  *local_got = s->size;
   16883 		  s->size += 4;
   16884 		}
   16885 
   16886 	      isym = bfd_sym_from_r_symndx (&htab->root.sym_cache, ibfd,
   16887 					    symndx);
   16888 	      if (isym == NULL)
   16889 		return false;
   16890 
   16891 	      /* If all references to an STT_GNU_IFUNC PLT are calls,
   16892 		 then all non-call references, including this GOT entry,
   16893 		 resolve directly to the run-time target.  */
   16894 	      if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
   16895 		  && (local_iplt == NULL
   16896 		      || local_iplt->arm.noncall_refcount == 0))
   16897 		elf32_arm_allocate_irelocs (info, srel, 1);
   16898 	      else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC || htab->fdpic_p)
   16899 		{
   16900 		  if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC)))
   16901 		    elf32_arm_allocate_dynrelocs (info, srel, 1);
   16902 		  else if (htab->fdpic_p && *local_tls_type & GOT_NORMAL)
   16903 		    htab->srofixup->size += 4;
   16904 
   16905 		  if ((bfd_link_pic (info) || htab->fdpic_p)
   16906 		      && *local_tls_type & GOT_TLS_GDESC)
   16907 		    {
   16908 		      elf32_arm_allocate_dynrelocs (info,
   16909 						    htab->root.srelplt, 1);
   16910 		      htab->tls_trampoline = -1;
   16911 		    }
   16912 		}
   16913 	    }
   16914 	  else
   16915 	    *local_got = (bfd_vma) -1;
   16916 	}
   16917     }
   16918 
   16919   if (htab->tls_ldm_got.refcount > 0)
   16920     {
   16921       /* Allocate two GOT entries and one dynamic relocation (if necessary)
   16922 	 for R_ARM_TLS_LDM32/R_ARM_TLS_LDM32_FDPIC relocations.  */
   16923       htab->tls_ldm_got.offset = htab->root.sgot->size;
   16924       htab->root.sgot->size += 8;
   16925       if (bfd_link_pic (info))
   16926 	elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
   16927     }
   16928   else
   16929     htab->tls_ldm_got.offset = -1;
   16930 
   16931   /* At the very end of the .rofixup section is a pointer to the GOT,
   16932      reserve space for it. */
   16933   if (htab->fdpic_p && htab->srofixup != NULL)
   16934     htab->srofixup->size += 4;
   16935 
   16936   /* Allocate global sym .plt and .got entries, and space for global
   16937      sym dynamic relocs.  */
   16938   elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
   16939 
   16940   /* Here we rummage through the found bfds to collect glue information.  */
   16941   for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
   16942     {
   16943       if (! is_arm_elf (ibfd))
   16944 	continue;
   16945 
   16946       /* Initialise mapping tables for code/data.  */
   16947       bfd_elf32_arm_init_maps (ibfd);
   16948 
   16949       if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
   16950 	  || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
   16951 	  || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
   16952 	_bfd_error_handler (_("errors encountered processing file %pB"), ibfd);
   16953     }
   16954 
   16955   /* Allocate space for the glue sections now that we've sized them.  */
   16956   bfd_elf32_arm_allocate_interworking_sections (info);
   16957 
   16958   /* For every jump slot reserved in the sgotplt, reloc_count is
   16959      incremented.  However, when we reserve space for TLS descriptors,
   16960      it's not incremented, so in order to compute the space reserved
   16961      for them, it suffices to multiply the reloc count by the jump
   16962      slot size.  */
   16963   if (htab->root.srelplt)
   16964     htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size (htab);
   16965 
   16966   if (htab->tls_trampoline)
   16967     {
   16968       if (htab->root.splt->size == 0)
   16969 	htab->root.splt->size += htab->plt_header_size;
   16970 
   16971       htab->tls_trampoline = htab->root.splt->size;
   16972       htab->root.splt->size += htab->plt_entry_size;
   16973 
   16974       /* If we're not using lazy TLS relocations, don't generate the
   16975 	 PLT and GOT entries they require.  */
   16976       if ((info->flags & DF_BIND_NOW))
   16977 	htab->root.tlsdesc_plt = 0;
   16978       else
   16979 	{
   16980 	  htab->root.tlsdesc_got = htab->root.sgot->size;
   16981 	  htab->root.sgot->size += 4;
   16982 
   16983 	  htab->root.tlsdesc_plt = htab->root.splt->size;
   16984 	  htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
   16985 	}
   16986     }
   16987 
   16988   /* The check_relocs and adjust_dynamic_symbol entry points have
   16989      determined the sizes of the various dynamic sections.  Allocate
   16990      memory for them.  */
   16991   relocs = false;
   16992   for (s = dynobj->sections; s != NULL; s = s->next)
   16993     {
   16994       const char * name;
   16995 
   16996       if ((s->flags & SEC_LINKER_CREATED) == 0)
   16997 	continue;
   16998 
   16999       /* It's OK to base decisions on the section name, because none
   17000 	 of the dynobj section names depend upon the input files.  */
   17001       name = bfd_section_name (s);
   17002 
   17003       if (s == htab->root.splt)
   17004 	{
   17005 	  /* Remember whether there is a PLT.  */
   17006 	  ;
   17007 	}
   17008       else if (startswith (name, ".rel"))
   17009 	{
   17010 	  if (s->size != 0)
   17011 	    {
   17012 	      /* Remember whether there are any reloc sections other
   17013 		 than .rel(a).plt and .rela.plt.unloaded.  */
   17014 	      if (s != htab->root.srelplt && s != htab->srelplt2)
   17015 		relocs = true;
   17016 
   17017 	      /* We use the reloc_count field as a counter if we need
   17018 		 to copy relocs into the output file.  */
   17019 	      s->reloc_count = 0;
   17020 	    }
   17021 	}
   17022       else if (s != htab->root.sgot
   17023 	       && s != htab->root.sgotplt
   17024 	       && s != htab->root.iplt
   17025 	       && s != htab->root.igotplt
   17026 	       && s != htab->root.sdynbss
   17027 	       && s != htab->root.sdynrelro
   17028 	       && s != htab->srofixup)
   17029 	{
   17030 	  /* It's not one of our sections, so don't allocate space.  */
   17031 	  continue;
   17032 	}
   17033 
   17034       if (s->size == 0)
   17035 	{
   17036 	  /* If we don't need this section, strip it from the
   17037 	     output file.  This is mostly to handle .rel(a).bss and
   17038 	     .rel(a).plt.  We must create both sections in
   17039 	     create_dynamic_sections, because they must be created
   17040 	     before the linker maps input sections to output
   17041 	     sections.  The linker does that before
   17042 	     adjust_dynamic_symbol is called, and it is that
   17043 	     function which decides whether anything needs to go
   17044 	     into these sections.  */
   17045 	  s->flags |= SEC_EXCLUDE;
   17046 	  continue;
   17047 	}
   17048 
   17049       if ((s->flags & SEC_HAS_CONTENTS) == 0)
   17050 	continue;
   17051 
   17052       /* Allocate memory for the section contents.  */
   17053       s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
   17054       if (s->contents == NULL)
   17055 	return false;
   17056       s->alloced = 1;
   17057     }
   17058 
   17059   return _bfd_elf_maybe_vxworks_add_dynamic_tags (output_bfd, info,
   17060 						  relocs);
   17061 }
   17062 
   17063 /* Size sections even though they're not dynamic.  We use it to setup
   17064    _TLS_MODULE_BASE_, if needed.  */
   17065 
   17066 static bool
   17067 elf32_arm_early_size_sections (bfd *output_bfd, struct bfd_link_info *info)
   17068 {
   17069   asection *tls_sec;
   17070   struct elf32_arm_link_hash_table *htab;
   17071 
   17072   htab = elf32_arm_hash_table (info);
   17073 
   17074   if (bfd_link_relocatable (info))
   17075     return true;
   17076 
   17077   tls_sec = elf_hash_table (info)->tls_sec;
   17078 
   17079   if (tls_sec)
   17080     {
   17081       struct elf_link_hash_entry *tlsbase;
   17082 
   17083       tlsbase = elf_link_hash_lookup
   17084 	(elf_hash_table (info), "_TLS_MODULE_BASE_", true, true, false);
   17085 
   17086       if (tlsbase)
   17087 	{
   17088 	  struct bfd_link_hash_entry *bh = NULL;
   17089 	  elf_backend_data *bed = get_elf_backend_data (output_bfd);
   17090 
   17091 	  if (!(_bfd_generic_link_add_one_symbol
   17092 		(info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
   17093 		 tls_sec, 0, NULL, false,
   17094 		 bed->collect, &bh)))
   17095 	    return false;
   17096 
   17097 	  tlsbase->type = STT_TLS;
   17098 	  tlsbase = (struct elf_link_hash_entry *)bh;
   17099 	  tlsbase->def_regular = 1;
   17100 	  tlsbase->other = STV_HIDDEN;
   17101 	  (*bed->elf_backend_hide_symbol) (info, tlsbase, true);
   17102 	}
   17103     }
   17104 
   17105   if (htab->fdpic_p && !bfd_link_relocatable (info)
   17106       && !bfd_elf_stack_segment_size (output_bfd, info,
   17107 				      "__stacksize", DEFAULT_STACK_SIZE))
   17108     return false;
   17109 
   17110   return true;
   17111 }
   17112 
   17113 /* Finish up dynamic symbol handling.  We set the contents of various
   17114    dynamic sections here.  */
   17115 
   17116 static bool
   17117 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
   17118 				 struct bfd_link_info * info,
   17119 				 struct elf_link_hash_entry * h,
   17120 				 Elf_Internal_Sym * sym)
   17121 {
   17122   struct elf32_arm_link_hash_table *htab;
   17123   struct elf32_arm_link_hash_entry *eh;
   17124 
   17125   htab = elf32_arm_hash_table (info);
   17126 
   17127   eh = (struct elf32_arm_link_hash_entry *) h;
   17128 
   17129   if (h->plt.offset != (bfd_vma) -1)
   17130     {
   17131       if (!eh->is_iplt)
   17132 	{
   17133 	  BFD_ASSERT (h->dynindx != -1);
   17134 	  if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
   17135 					      h->dynindx, 0))
   17136 	    return false;
   17137 	}
   17138 
   17139       if (!h->def_regular)
   17140 	{
   17141 	  /* Mark the symbol as undefined, rather than as defined in
   17142 	     the .plt section.  */
   17143 	  sym->st_shndx = SHN_UNDEF;
   17144 	  /* If the symbol is weak we need to clear the value.
   17145 	     Otherwise, the PLT entry would provide a definition for
   17146 	     the symbol even if the symbol wasn't defined anywhere,
   17147 	     and so the symbol would never be NULL.  Leave the value if
   17148 	     there were any relocations where pointer equality matters
   17149 	     (this is a clue for the dynamic linker, to make function
   17150 	     pointer comparisons work between an application and shared
   17151 	     library).  */
   17152 	  if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
   17153 	    sym->st_value = 0;
   17154 	}
   17155       else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
   17156 	{
   17157 	  /* At least one non-call relocation references this .iplt entry,
   17158 	     so the .iplt entry is the function's canonical address.  */
   17159 	  sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
   17160 	  ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
   17161 	  sym->st_shndx = (_bfd_elf_section_from_bfd_section
   17162 			   (output_bfd, htab->root.iplt->output_section));
   17163 	  sym->st_value = (h->plt.offset
   17164 			   + htab->root.iplt->output_section->vma
   17165 			   + htab->root.iplt->output_offset);
   17166 	}
   17167     }
   17168 
   17169   if (h->needs_copy)
   17170     {
   17171       asection * s;
   17172       Elf_Internal_Rela rel;
   17173 
   17174       /* This symbol needs a copy reloc.  Set it up.  */
   17175       BFD_ASSERT (h->dynindx != -1
   17176 		  && (h->root.type == bfd_link_hash_defined
   17177 		      || h->root.type == bfd_link_hash_defweak));
   17178 
   17179       rel.r_addend = 0;
   17180       rel.r_offset = (h->root.u.def.value
   17181 		      + h->root.u.def.section->output_section->vma
   17182 		      + h->root.u.def.section->output_offset);
   17183       rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
   17184       if (h->root.u.def.section == htab->root.sdynrelro)
   17185 	s = htab->root.sreldynrelro;
   17186       else
   17187 	s = htab->root.srelbss;
   17188       elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
   17189     }
   17190 
   17191   /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute.  On VxWorks,
   17192      and for FDPIC, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute:
   17193      it is relative to the ".got" section.  */
   17194   if (h == htab->root.hdynamic
   17195       || (!htab->fdpic_p
   17196 	  && htab->root.target_os != is_vxworks
   17197 	  && h == htab->root.hgot))
   17198     sym->st_shndx = SHN_ABS;
   17199 
   17200   return true;
   17201 }
   17202 
   17203 static void
   17204 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
   17205 		    void *contents,
   17206 		    const unsigned long *template, unsigned count)
   17207 {
   17208   unsigned ix;
   17209 
   17210   for (ix = 0; ix != count; ix++)
   17211     {
   17212       unsigned long insn = template[ix];
   17213 
   17214       /* Emit mov pc,rx if bx is not permitted.  */
   17215       if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
   17216 	insn = (insn & 0xf000000f) | 0x01a0f000;
   17217       put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
   17218     }
   17219 }
   17220 
   17221 /* Finish up the dynamic sections.  */
   17222 
   17223 static bool
   17224 elf32_arm_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info,
   17225 				   bfd_byte *buf ATTRIBUTE_UNUSED)
   17226 {
   17227   bfd * dynobj;
   17228   asection * sgot;
   17229   asection * sdyn;
   17230   struct elf32_arm_link_hash_table *htab;
   17231 
   17232   htab = elf32_arm_hash_table (info);
   17233   if (htab == NULL)
   17234     return false;
   17235 
   17236   dynobj = elf_hash_table (info)->dynobj;
   17237 
   17238   sgot = htab->root.sgotplt;
   17239   /* A broken linker script might have discarded the dynamic sections.
   17240      Catch this here so that we do not seg-fault later on.  */
   17241   if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
   17242     return false;
   17243   sdyn = bfd_get_linker_section (dynobj, ".dynamic");
   17244 
   17245   if (elf_hash_table (info)->dynamic_sections_created)
   17246     {
   17247       asection *splt;
   17248       Elf32_External_Dyn *dyncon, *dynconend;
   17249 
   17250       splt = htab->root.splt;
   17251       BFD_ASSERT (splt != NULL && sdyn != NULL);
   17252       BFD_ASSERT (sgot != NULL);
   17253 
   17254       dyncon = (Elf32_External_Dyn *) sdyn->contents;
   17255       dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
   17256 
   17257       for (; dyncon < dynconend; dyncon++)
   17258 	{
   17259 	  Elf_Internal_Dyn dyn;
   17260 	  const char * name;
   17261 	  asection * s;
   17262 
   17263 	  bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
   17264 
   17265 	  switch (dyn.d_tag)
   17266 	    {
   17267 	    default:
   17268 	      if (htab->root.target_os == is_vxworks
   17269 		  && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
   17270 		bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
   17271 	      break;
   17272 
   17273 	    case DT_HASH:
   17274 	    case DT_STRTAB:
   17275 	    case DT_SYMTAB:
   17276 	    case DT_VERSYM:
   17277 	    case DT_VERDEF:
   17278 	    case DT_VERNEED:
   17279 	      break;
   17280 
   17281 	    case DT_PLTGOT:
   17282 	      name = ".got.plt";
   17283 	      goto get_vma;
   17284 	    case DT_JMPREL:
   17285 	      name = RELOC_SECTION (htab, ".plt");
   17286 	    get_vma:
   17287 	      s = bfd_get_linker_section (dynobj, name);
   17288 	      if (s == NULL)
   17289 		{
   17290 		  _bfd_error_handler
   17291 		    (_("could not find section %s"), name);
   17292 		  bfd_set_error (bfd_error_invalid_operation);
   17293 		  return false;
   17294 		}
   17295 	      dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
   17296 	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
   17297 	      break;
   17298 
   17299 	    case DT_PLTRELSZ:
   17300 	      s = htab->root.srelplt;
   17301 	      BFD_ASSERT (s != NULL);
   17302 	      dyn.d_un.d_val = s->size;
   17303 	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
   17304 	      break;
   17305 
   17306 	    case DT_RELSZ:
   17307 	    case DT_RELASZ:
   17308 	    case DT_REL:
   17309 	    case DT_RELA:
   17310 	      break;
   17311 
   17312 	    case DT_TLSDESC_PLT:
   17313 	      s = htab->root.splt;
   17314 	      dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
   17315 				+ htab->root.tlsdesc_plt);
   17316 	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
   17317 	      break;
   17318 
   17319 	    case DT_TLSDESC_GOT:
   17320 	      s = htab->root.sgot;
   17321 	      dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
   17322 				+ htab->root.tlsdesc_got);
   17323 	      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
   17324 	      break;
   17325 
   17326 	      /* Set the bottom bit of DT_INIT/FINI if the
   17327 		 corresponding function is Thumb.  */
   17328 	    case DT_INIT:
   17329 	      name = info->init_function;
   17330 	      goto get_sym;
   17331 	    case DT_FINI:
   17332 	      name = info->fini_function;
   17333 	    get_sym:
   17334 	      /* If it wasn't set by elf_bfd_final_link
   17335 		 then there is nothing to adjust.  */
   17336 	      if (dyn.d_un.d_val != 0)
   17337 		{
   17338 		  struct elf_link_hash_entry * eh;
   17339 
   17340 		  eh = elf_link_hash_lookup (elf_hash_table (info), name,
   17341 					     false, false, true);
   17342 		  if (eh != NULL
   17343 		      && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
   17344 			 == ST_BRANCH_TO_THUMB)
   17345 		    {
   17346 		      dyn.d_un.d_val |= 1;
   17347 		      bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
   17348 		    }
   17349 		}
   17350 	      break;
   17351 	    }
   17352 	}
   17353 
   17354       /* Fill in the first entry in the procedure linkage table.  */
   17355       if (splt->size > 0 && htab->plt_header_size)
   17356 	{
   17357 	  const bfd_vma *plt0_entry;
   17358 	  bfd_vma got_address, plt_address, got_displacement;
   17359 
   17360 	  /* Calculate the addresses of the GOT and PLT.  */
   17361 	  got_address = sgot->output_section->vma + sgot->output_offset;
   17362 	  plt_address = splt->output_section->vma + splt->output_offset;
   17363 
   17364 	  if (htab->root.target_os == is_vxworks)
   17365 	    {
   17366 	      /* The VxWorks GOT is relocated by the dynamic linker.
   17367 		 Therefore, we must emit relocations rather than simply
   17368 		 computing the values now.  */
   17369 	      Elf_Internal_Rela rel;
   17370 
   17371 	      plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
   17372 	      put_arm_insn (htab, output_bfd, plt0_entry[0],
   17373 			    splt->contents + 0);
   17374 	      put_arm_insn (htab, output_bfd, plt0_entry[1],
   17375 			    splt->contents + 4);
   17376 	      put_arm_insn (htab, output_bfd, plt0_entry[2],
   17377 			    splt->contents + 8);
   17378 	      bfd_put_32 (output_bfd, got_address, splt->contents + 12);
   17379 
   17380 	      /* Generate a relocation for _GLOBAL_OFFSET_TABLE_.  */
   17381 	      rel.r_offset = plt_address + 12;
   17382 	      rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
   17383 	      rel.r_addend = 0;
   17384 	      SWAP_RELOC_OUT (htab) (output_bfd, &rel,
   17385 				     htab->srelplt2->contents);
   17386 	    }
   17387 	  else if (using_thumb_only (htab))
   17388 	    {
   17389 	      got_displacement = got_address - (plt_address + 12);
   17390 
   17391 	      plt0_entry = elf32_thumb2_plt0_entry;
   17392 	      put_arm_insn (htab, output_bfd, plt0_entry[0],
   17393 			    splt->contents + 0);
   17394 	      put_arm_insn (htab, output_bfd, plt0_entry[1],
   17395 			    splt->contents + 4);
   17396 	      put_arm_insn (htab, output_bfd, plt0_entry[2],
   17397 			    splt->contents + 8);
   17398 
   17399 	      bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
   17400 	    }
   17401 	  else
   17402 	    {
   17403 	      got_displacement = got_address - (plt_address + 16);
   17404 
   17405 	      plt0_entry = elf32_arm_plt0_entry;
   17406 	      put_arm_insn (htab, output_bfd, plt0_entry[0],
   17407 			    splt->contents + 0);
   17408 	      put_arm_insn (htab, output_bfd, plt0_entry[1],
   17409 			    splt->contents + 4);
   17410 	      put_arm_insn (htab, output_bfd, plt0_entry[2],
   17411 			    splt->contents + 8);
   17412 	      put_arm_insn (htab, output_bfd, plt0_entry[3],
   17413 			    splt->contents + 12);
   17414 
   17415 #ifdef FOUR_WORD_PLT
   17416 	      /* The displacement value goes in the otherwise-unused
   17417 		 last word of the second entry.  */
   17418 	      bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
   17419 #else
   17420 	      bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
   17421 #endif
   17422 	    }
   17423 	}
   17424 
   17425       /* UnixWare sets the entsize of .plt to 4, although that doesn't
   17426 	 really seem like the right value.  */
   17427       if (splt->output_section->owner == output_bfd)
   17428 	elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
   17429 
   17430       if (htab->root.tlsdesc_plt)
   17431 	{
   17432 	  bfd_vma got_address
   17433 	    = sgot->output_section->vma + sgot->output_offset;
   17434 	  bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
   17435 				    + htab->root.sgot->output_offset);
   17436 	  bfd_vma plt_address
   17437 	    = splt->output_section->vma + splt->output_offset;
   17438 
   17439 	  arm_put_trampoline (htab, output_bfd,
   17440 			      splt->contents + htab->root.tlsdesc_plt,
   17441 			      dl_tlsdesc_lazy_trampoline, 6);
   17442 
   17443 	  bfd_put_32 (output_bfd,
   17444 		      gotplt_address + htab->root.tlsdesc_got
   17445 		      - (plt_address + htab->root.tlsdesc_plt)
   17446 		      - dl_tlsdesc_lazy_trampoline[6],
   17447 		      splt->contents + htab->root.tlsdesc_plt + 24);
   17448 	  bfd_put_32 (output_bfd,
   17449 		      got_address - (plt_address + htab->root.tlsdesc_plt)
   17450 		      - dl_tlsdesc_lazy_trampoline[7],
   17451 		      splt->contents + htab->root.tlsdesc_plt + 24 + 4);
   17452 	}
   17453 
   17454       if (htab->tls_trampoline)
   17455 	{
   17456 	  arm_put_trampoline (htab, output_bfd,
   17457 			      splt->contents + htab->tls_trampoline,
   17458 			      tls_trampoline, 3);
   17459 #ifdef FOUR_WORD_PLT
   17460 	  bfd_put_32 (output_bfd, 0x00000000,
   17461 		      splt->contents + htab->tls_trampoline + 12);
   17462 #endif
   17463 	}
   17464 
   17465       if (htab->root.target_os == is_vxworks
   17466 	  && !bfd_link_pic (info)
   17467 	  && htab->root.splt->size > 0)
   17468 	{
   17469 	  /* Correct the .rel(a).plt.unloaded relocations.  They will have
   17470 	     incorrect symbol indexes.  */
   17471 	  int num_plts;
   17472 	  unsigned char *p;
   17473 
   17474 	  num_plts = ((htab->root.splt->size - htab->plt_header_size)
   17475 		      / htab->plt_entry_size);
   17476 	  p = htab->srelplt2->contents + RELOC_SIZE (htab);
   17477 
   17478 	  for (; num_plts; num_plts--)
   17479 	    {
   17480 	      Elf_Internal_Rela rel;
   17481 
   17482 	      SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
   17483 	      rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
   17484 	      SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
   17485 	      p += RELOC_SIZE (htab);
   17486 
   17487 	      SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
   17488 	      rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
   17489 	      SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
   17490 	      p += RELOC_SIZE (htab);
   17491 	    }
   17492 	}
   17493     }
   17494 
   17495   /* Fill in the first three entries in the global offset table.  */
   17496   if (sgot)
   17497     {
   17498       if (sgot->size > 0)
   17499 	{
   17500 	  if (sdyn == NULL)
   17501 	    bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
   17502 	  else
   17503 	    bfd_put_32 (output_bfd,
   17504 			sdyn->output_section->vma + sdyn->output_offset,
   17505 			sgot->contents);
   17506 	  bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
   17507 	  bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
   17508 	}
   17509 
   17510       elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
   17511     }
   17512 
   17513   /* At the very end of the .rofixup section is a pointer to the GOT.  */
   17514   if (htab->fdpic_p && htab->srofixup != NULL)
   17515     {
   17516       struct elf_link_hash_entry *hgot = htab->root.hgot;
   17517 
   17518       bfd_vma got_value = hgot->root.u.def.value
   17519 	+ hgot->root.u.def.section->output_section->vma
   17520 	+ hgot->root.u.def.section->output_offset;
   17521 
   17522       arm_elf_add_rofixup (output_bfd, htab->srofixup, got_value);
   17523 
   17524       /* Make sure we allocated and generated the same number of fixups.  */
   17525       BFD_ASSERT (htab->srofixup->reloc_count * 4 == htab->srofixup->size);
   17526     }
   17527 
   17528   return true;
   17529 }
   17530 
   17531 static bool
   17532 elf32_arm_init_file_header (bfd *abfd, struct bfd_link_info *link_info)
   17533 {
   17534   Elf_Internal_Ehdr * i_ehdrp;	/* ELF file header, internal form.  */
   17535   struct elf32_arm_link_hash_table *globals;
   17536   struct elf_segment_map *m;
   17537 
   17538   if (!_bfd_elf_init_file_header (abfd, link_info))
   17539     return false;
   17540 
   17541   i_ehdrp = elf_elfheader (abfd);
   17542 
   17543   if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
   17544     i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
   17545   i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
   17546 
   17547   if (link_info)
   17548     {
   17549       globals = elf32_arm_hash_table (link_info);
   17550       if (globals != NULL && globals->byteswap_code)
   17551 	i_ehdrp->e_flags |= EF_ARM_BE8;
   17552 
   17553       if (globals->fdpic_p)
   17554 	i_ehdrp->e_ident[EI_OSABI] |= ELFOSABI_ARM_FDPIC;
   17555     }
   17556 
   17557   if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
   17558       && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
   17559     {
   17560       int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
   17561       if (abi == AEABI_VFP_args_vfp)
   17562 	i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
   17563       else
   17564 	i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
   17565     }
   17566 
   17567   /* Scan segment to set p_flags attribute if it contains only sections with
   17568      SHF_ARM_PURECODE flag.  */
   17569   for (m = elf_seg_map (abfd); m != NULL; m = m->next)
   17570     {
   17571       unsigned int j;
   17572 
   17573       if (m->count == 0)
   17574 	continue;
   17575       for (j = 0; j < m->count; j++)
   17576 	{
   17577 	  if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
   17578 	    break;
   17579 	}
   17580       if (j == m->count)
   17581 	{
   17582 	  m->p_flags = PF_X;
   17583 	  m->p_flags_valid = 1;
   17584 	}
   17585     }
   17586   return true;
   17587 }
   17588 
   17589 static enum elf_reloc_type_class
   17590 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
   17591 			    const asection *rel_sec ATTRIBUTE_UNUSED,
   17592 			    const Elf_Internal_Rela *rela)
   17593 {
   17594   struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
   17595 
   17596   if (htab->root.dynsym != NULL
   17597       && htab->root.dynsym->contents != NULL)
   17598     {
   17599       /* Check relocation against STT_GNU_IFUNC symbol if there are
   17600 	 dynamic symbols.  */
   17601       bfd *abfd = info->output_bfd;
   17602       elf_backend_data *bed = get_elf_backend_data (abfd);
   17603       unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
   17604       if (r_symndx != STN_UNDEF)
   17605 	{
   17606 	  Elf_Internal_Sym sym;
   17607 	  if (!bed->s->swap_symbol_in (abfd,
   17608 				       (htab->root.dynsym->contents
   17609 					+ r_symndx * bed->s->sizeof_sym),
   17610 				       0, &sym))
   17611 	    {
   17612 	      /* xgettext:c-format */
   17613 	      _bfd_error_handler (_("%pB symbol number %lu references"
   17614 				    " nonexistent SHT_SYMTAB_SHNDX section"),
   17615 				  abfd, r_symndx);
   17616 	      /* Ideally an error class should be returned here.  */
   17617 	    }
   17618 	  else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
   17619 	    return reloc_class_ifunc;
   17620 	}
   17621     }
   17622 
   17623   switch ((int) ELF32_R_TYPE (rela->r_info))
   17624     {
   17625     case R_ARM_RELATIVE:
   17626       return reloc_class_relative;
   17627     case R_ARM_JUMP_SLOT:
   17628       return reloc_class_plt;
   17629     case R_ARM_COPY:
   17630       return reloc_class_copy;
   17631     case R_ARM_IRELATIVE:
   17632       return reloc_class_ifunc;
   17633     default:
   17634       return reloc_class_normal;
   17635     }
   17636 }
   17637 
   17638 static void
   17639 arm_final_write_processing (bfd *abfd)
   17640 {
   17641   bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
   17642 }
   17643 
   17644 static bool
   17645 elf32_arm_final_write_processing (bfd *abfd)
   17646 {
   17647   arm_final_write_processing (abfd);
   17648   return _bfd_elf_final_write_processing (abfd);
   17649 }
   17650 
   17651 /* Return TRUE if this is an unwinding table entry.  */
   17652 
   17653 static bool
   17654 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
   17655 {
   17656   return (startswith (name, ELF_STRING_ARM_unwind)
   17657 	  || startswith (name, ELF_STRING_ARM_unwind_once));
   17658 }
   17659 
   17660 
   17661 /* Set the type and flags for an ARM section.  We do this by
   17662    the section name, which is a hack, but ought to work.  */
   17663 
   17664 static bool
   17665 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
   17666 {
   17667   const char * name;
   17668 
   17669   name = bfd_section_name (sec);
   17670 
   17671   if (is_arm_elf_unwind_section_name (abfd, name))
   17672     {
   17673       hdr->sh_type = SHT_ARM_EXIDX;
   17674       hdr->sh_flags |= SHF_LINK_ORDER;
   17675     }
   17676 
   17677   if (sec->flags & SEC_ELF_PURECODE)
   17678     hdr->sh_flags |= SHF_ARM_PURECODE;
   17679 
   17680   return true;
   17681 }
   17682 
   17683 /* Handle an ARM specific section when reading an object file.  This is
   17684    called when bfd_section_from_shdr finds a section with an unknown
   17685    type.  */
   17686 
   17687 static bool
   17688 elf32_arm_section_from_shdr (bfd *abfd,
   17689 			     Elf_Internal_Shdr * hdr,
   17690 			     const char *name,
   17691 			     int shindex)
   17692 {
   17693   /* There ought to be a place to keep ELF backend specific flags, but
   17694      at the moment there isn't one.  We just keep track of the
   17695      sections by their name, instead.  Fortunately, the ABI gives
   17696      names for all the ARM specific sections, so we will probably get
   17697      away with this.  */
   17698   switch (hdr->sh_type)
   17699     {
   17700     case SHT_ARM_EXIDX:
   17701     case SHT_ARM_PREEMPTMAP:
   17702     case SHT_ARM_ATTRIBUTES:
   17703       break;
   17704 
   17705     default:
   17706       return false;
   17707     }
   17708 
   17709   if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
   17710     return false;
   17711 
   17712   return true;
   17713 }
   17714 
   17715 static _arm_elf_section_data *
   17716 get_arm_elf_section_data (asection * sec)
   17717 {
   17718   if (sec && sec->owner && is_arm_elf (sec->owner))
   17719     return elf32_arm_section_data (sec);
   17720   else
   17721     return NULL;
   17722 }
   17723 
   17724 typedef struct
   17725 {
   17726   void *flaginfo;
   17727   struct bfd_link_info *info;
   17728   asection *sec;
   17729   int sec_shndx;
   17730   int (*func) (void *, const char *, Elf_Internal_Sym *,
   17731 	       asection *, struct elf_link_hash_entry *);
   17732 } output_arch_syminfo;
   17733 
   17734 enum map_symbol_type
   17735 {
   17736   ARM_MAP_ARM,
   17737   ARM_MAP_THUMB,
   17738   ARM_MAP_DATA
   17739 };
   17740 
   17741 
   17742 /* Output a single mapping symbol.  */
   17743 
   17744 static bool
   17745 elf32_arm_output_map_sym (output_arch_syminfo *osi,
   17746 			  enum map_symbol_type type,
   17747 			  bfd_vma offset)
   17748 {
   17749   static const char *names[3] = {"$a", "$t", "$d"};
   17750   Elf_Internal_Sym sym;
   17751 
   17752   sym.st_value = osi->sec->output_section->vma
   17753 		 + osi->sec->output_offset
   17754 		 + offset;
   17755   sym.st_size = 0;
   17756   sym.st_other = 0;
   17757   sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
   17758   sym.st_shndx = osi->sec_shndx;
   17759   sym.st_target_internal = ST_BRANCH_TO_ARM;
   17760   elf32_arm_section_map_add (osi->sec, names[type][1], offset);
   17761   return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
   17762 }
   17763 
   17764 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
   17765    IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt.  */
   17766 
   17767 static bool
   17768 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
   17769 			    bool is_iplt_entry_p,
   17770 			    union gotplt_union *root_plt,
   17771 			    struct arm_plt_info *arm_plt)
   17772 {
   17773   struct elf32_arm_link_hash_table *htab;
   17774   bfd_vma addr, plt_header_size;
   17775 
   17776   if (root_plt->offset == (bfd_vma) -1)
   17777     return true;
   17778 
   17779   htab = elf32_arm_hash_table (osi->info);
   17780   if (htab == NULL)
   17781     return false;
   17782 
   17783   if (is_iplt_entry_p)
   17784     {
   17785       osi->sec = htab->root.iplt;
   17786       plt_header_size = 0;
   17787     }
   17788   else
   17789     {
   17790       osi->sec = htab->root.splt;
   17791       plt_header_size = htab->plt_header_size;
   17792     }
   17793   osi->sec_shndx = (_bfd_elf_section_from_bfd_section
   17794 		    (osi->info->output_bfd, osi->sec->output_section));
   17795 
   17796   addr = root_plt->offset & -2;
   17797   if (htab->root.target_os == is_vxworks)
   17798     {
   17799       if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
   17800 	return false;
   17801       if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
   17802 	return false;
   17803       if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
   17804 	return false;
   17805       if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
   17806 	return false;
   17807     }
   17808   else if (htab->fdpic_p)
   17809     {
   17810       enum map_symbol_type type = using_thumb_only (htab)
   17811 	? ARM_MAP_THUMB
   17812 	: ARM_MAP_ARM;
   17813 
   17814       if (elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt))
   17815 	if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
   17816 	  return false;
   17817       if (!elf32_arm_output_map_sym (osi, type, addr))
   17818 	return false;
   17819       if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
   17820 	return false;
   17821       if (htab->plt_entry_size == 4 * ARRAY_SIZE (elf32_arm_fdpic_plt_entry))
   17822 	if (!elf32_arm_output_map_sym (osi, type, addr + 24))
   17823 	  return false;
   17824     }
   17825   else if (using_thumb_only (htab))
   17826     {
   17827       if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
   17828 	return false;
   17829     }
   17830   else
   17831     {
   17832       bool thumb_stub_p;
   17833 
   17834       thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
   17835       if (thumb_stub_p)
   17836 	{
   17837 	  if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
   17838 	    return false;
   17839 	}
   17840 #ifdef FOUR_WORD_PLT
   17841       if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
   17842 	return false;
   17843       if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
   17844 	return false;
   17845 #else
   17846       /* A three-word PLT with no Thumb thunk contains only Arm code,
   17847 	 so only need to output a mapping symbol for the first PLT entry and
   17848 	 entries with thumb thunks.  */
   17849       if (thumb_stub_p || addr == plt_header_size)
   17850 	{
   17851 	  if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
   17852 	    return false;
   17853 	}
   17854 #endif
   17855     }
   17856 
   17857   return true;
   17858 }
   17859 
   17860 /* Output mapping symbols for PLT entries associated with H.  */
   17861 
   17862 static bool
   17863 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
   17864 {
   17865   output_arch_syminfo *osi = (output_arch_syminfo *) inf;
   17866   struct elf32_arm_link_hash_entry *eh;
   17867 
   17868   if (h->root.type == bfd_link_hash_indirect)
   17869     return true;
   17870 
   17871   if (h->root.type == bfd_link_hash_warning)
   17872     /* When warning symbols are created, they **replace** the "real"
   17873        entry in the hash table, thus we never get to see the real
   17874        symbol in a hash traversal.  So look at it now.  */
   17875     h = (struct elf_link_hash_entry *) h->root.u.i.link;
   17876 
   17877   eh = (struct elf32_arm_link_hash_entry *) h;
   17878   return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
   17879 				     &h->plt, &eh->plt);
   17880 }
   17881 
   17882 /* Bind a veneered symbol to its veneer identified by its hash entry
   17883    STUB_ENTRY.  The veneered location thus loose its symbol.  */
   17884 
   17885 static void
   17886 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
   17887 {
   17888   struct elf32_arm_link_hash_entry *hash = stub_entry->h;
   17889 
   17890   BFD_ASSERT (hash);
   17891   hash->root.root.u.def.section = stub_entry->stub_sec;
   17892   hash->root.root.u.def.value = stub_entry->stub_offset;
   17893   hash->root.size = stub_entry->stub_size;
   17894 }
   17895 
   17896 /* Output a single local symbol for a generated stub.  */
   17897 
   17898 static bool
   17899 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
   17900 			   bfd_vma offset, bfd_vma size)
   17901 {
   17902   Elf_Internal_Sym sym;
   17903 
   17904   sym.st_value = osi->sec->output_section->vma
   17905 		 + osi->sec->output_offset
   17906 		 + offset;
   17907   sym.st_size = size;
   17908   sym.st_other = 0;
   17909   sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
   17910   sym.st_shndx = osi->sec_shndx;
   17911   sym.st_target_internal = ST_BRANCH_TO_ARM;
   17912   return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
   17913 }
   17914 
   17915 static bool
   17916 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
   17917 		  void * in_arg)
   17918 {
   17919   struct elf32_arm_stub_hash_entry *stub_entry;
   17920   asection *stub_sec;
   17921   bfd_vma addr;
   17922   char *stub_name;
   17923   output_arch_syminfo *osi;
   17924   const insn_sequence *template_sequence;
   17925   enum stub_insn_type prev_type;
   17926   int size;
   17927   int i;
   17928   enum map_symbol_type sym_type;
   17929 
   17930   /* Massage our args to the form they really have.  */
   17931   stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
   17932   osi = (output_arch_syminfo *) in_arg;
   17933 
   17934   stub_sec = stub_entry->stub_sec;
   17935 
   17936   /* Ensure this stub is attached to the current section being
   17937      processed.  */
   17938   if (stub_sec != osi->sec)
   17939     return true;
   17940 
   17941   addr = (bfd_vma) stub_entry->stub_offset;
   17942   template_sequence = stub_entry->stub_template;
   17943 
   17944   if (arm_stub_sym_claimed (stub_entry->stub_type))
   17945     arm_stub_claim_sym (stub_entry);
   17946   else
   17947     {
   17948       stub_name = stub_entry->output_name;
   17949       switch (template_sequence[0].type)
   17950 	{
   17951 	case ARM_TYPE:
   17952 	  if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
   17953 					  stub_entry->stub_size))
   17954 	    return false;
   17955 	  break;
   17956 	case THUMB16_TYPE:
   17957 	case THUMB32_TYPE:
   17958 	  if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
   17959 					  stub_entry->stub_size))
   17960 	    return false;
   17961 	  break;
   17962 	default:
   17963 	  BFD_FAIL ();
   17964 	  return 0;
   17965 	}
   17966     }
   17967 
   17968   prev_type = DATA_TYPE;
   17969   size = 0;
   17970   for (i = 0; i < stub_entry->stub_template_size; i++)
   17971     {
   17972       switch (template_sequence[i].type)
   17973 	{
   17974 	case ARM_TYPE:
   17975 	  sym_type = ARM_MAP_ARM;
   17976 	  break;
   17977 
   17978 	case THUMB16_TYPE:
   17979 	case THUMB32_TYPE:
   17980 	  sym_type = ARM_MAP_THUMB;
   17981 	  break;
   17982 
   17983 	case DATA_TYPE:
   17984 	  sym_type = ARM_MAP_DATA;
   17985 	  break;
   17986 
   17987 	default:
   17988 	  BFD_FAIL ();
   17989 	  return false;
   17990 	}
   17991 
   17992       if (template_sequence[i].type != prev_type)
   17993 	{
   17994 	  prev_type = template_sequence[i].type;
   17995 	  if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
   17996 	    return false;
   17997 	}
   17998 
   17999       switch (template_sequence[i].type)
   18000 	{
   18001 	case ARM_TYPE:
   18002 	case THUMB32_TYPE:
   18003 	  size += 4;
   18004 	  break;
   18005 
   18006 	case THUMB16_TYPE:
   18007 	  size += 2;
   18008 	  break;
   18009 
   18010 	case DATA_TYPE:
   18011 	  size += 4;
   18012 	  break;
   18013 
   18014 	default:
   18015 	  BFD_FAIL ();
   18016 	  return false;
   18017 	}
   18018     }
   18019 
   18020   return true;
   18021 }
   18022 
   18023 /* Output mapping symbols for linker generated sections,
   18024    and for those data-only sections that do not have a
   18025    $d.  */
   18026 
   18027 static bool
   18028 elf32_arm_output_arch_local_syms (bfd *output_bfd,
   18029 				  struct bfd_link_info *info,
   18030 				  void *flaginfo,
   18031 				  int (*func) (void *, const char *,
   18032 					       Elf_Internal_Sym *,
   18033 					       asection *,
   18034 					       struct elf_link_hash_entry *))
   18035 {
   18036   output_arch_syminfo osi;
   18037   struct elf32_arm_link_hash_table *htab;
   18038   bfd_vma offset;
   18039   bfd_size_type size;
   18040   bfd *input_bfd;
   18041 
   18042   if (info->strip == strip_all
   18043       && !info->emitrelocations
   18044       && !bfd_link_relocatable (info))
   18045     return true;
   18046 
   18047   htab = elf32_arm_hash_table (info);
   18048   if (htab == NULL)
   18049     return false;
   18050 
   18051   check_use_blx (htab);
   18052 
   18053   osi.flaginfo = flaginfo;
   18054   osi.info = info;
   18055   osi.func = func;
   18056 
   18057   /* Add a $d mapping symbol to data-only sections that
   18058      don't have any mapping symbol.  This may result in (harmless) redundant
   18059      mapping symbols.  */
   18060   for (input_bfd = info->input_bfds;
   18061        input_bfd != NULL;
   18062        input_bfd = input_bfd->link.next)
   18063     {
   18064       if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
   18065 	for (osi.sec = input_bfd->sections;
   18066 	     osi.sec != NULL;
   18067 	     osi.sec = osi.sec->next)
   18068 	  {
   18069 	    if (osi.sec->output_section != NULL
   18070 		&& ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
   18071 		    != 0)
   18072 		&& (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
   18073 		   == SEC_HAS_CONTENTS
   18074 		&& get_arm_elf_section_data (osi.sec) != NULL
   18075 		&& get_arm_elf_section_data (osi.sec)->mapcount == 0
   18076 		&& osi.sec->size > 0
   18077 		&& (osi.sec->flags & SEC_EXCLUDE) == 0)
   18078 	      {
   18079 		osi.sec_shndx = _bfd_elf_section_from_bfd_section
   18080 		  (output_bfd, osi.sec->output_section);
   18081 		if (osi.sec_shndx != (int)SHN_BAD)
   18082 		  elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
   18083 	      }
   18084 	  }
   18085     }
   18086 
   18087   /* ARM->Thumb glue.  */
   18088   if (htab->arm_glue_size > 0)
   18089     {
   18090       osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
   18091 					ARM2THUMB_GLUE_SECTION_NAME);
   18092 
   18093       osi.sec_shndx = _bfd_elf_section_from_bfd_section
   18094 	  (output_bfd, osi.sec->output_section);
   18095       if (bfd_link_pic (info)
   18096 	  || htab->pic_veneer)
   18097 	size = ARM2THUMB_PIC_GLUE_SIZE;
   18098       else if (htab->use_blx)
   18099 	size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
   18100       else
   18101 	size = ARM2THUMB_STATIC_GLUE_SIZE;
   18102 
   18103       for (offset = 0; offset < htab->arm_glue_size; offset += size)
   18104 	{
   18105 	  elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
   18106 	  elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
   18107 	}
   18108     }
   18109 
   18110   /* Thumb->ARM glue.  */
   18111   if (htab->thumb_glue_size > 0)
   18112     {
   18113       osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
   18114 					THUMB2ARM_GLUE_SECTION_NAME);
   18115 
   18116       osi.sec_shndx = _bfd_elf_section_from_bfd_section
   18117 	  (output_bfd, osi.sec->output_section);
   18118       size = THUMB2ARM_GLUE_SIZE;
   18119 
   18120       for (offset = 0; offset < htab->thumb_glue_size; offset += size)
   18121 	{
   18122 	  elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
   18123 	  elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
   18124 	}
   18125     }
   18126 
   18127   /* ARMv4 BX veneers.  */
   18128   if (htab->bx_glue_size > 0)
   18129     {
   18130       osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
   18131 					ARM_BX_GLUE_SECTION_NAME);
   18132 
   18133       osi.sec_shndx = _bfd_elf_section_from_bfd_section
   18134 	  (output_bfd, osi.sec->output_section);
   18135 
   18136       elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
   18137     }
   18138 
   18139   /* Long calls stubs.  */
   18140   if (htab->stub_bfd && htab->stub_bfd->sections)
   18141     {
   18142       asection* stub_sec;
   18143 
   18144       for (stub_sec = htab->stub_bfd->sections;
   18145 	   stub_sec != NULL;
   18146 	   stub_sec = stub_sec->next)
   18147 	{
   18148 	  /* Ignore non-stub sections.  */
   18149 	  if (!strstr (stub_sec->name, STUB_SUFFIX))
   18150 	    continue;
   18151 
   18152 	  osi.sec = stub_sec;
   18153 
   18154 	  osi.sec_shndx = _bfd_elf_section_from_bfd_section
   18155 	    (output_bfd, osi.sec->output_section);
   18156 
   18157 	  bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
   18158 	}
   18159     }
   18160 
   18161   /* Finally, output mapping symbols for the PLT.  */
   18162   if (htab->root.splt && htab->root.splt->size > 0)
   18163     {
   18164       osi.sec = htab->root.splt;
   18165       osi.sec_shndx = (_bfd_elf_section_from_bfd_section
   18166 		       (output_bfd, osi.sec->output_section));
   18167 
   18168       /* Output mapping symbols for the plt header.  */
   18169       if (htab->root.target_os == is_vxworks)
   18170 	{
   18171 	  /* VxWorks shared libraries have no PLT header.  */
   18172 	  if (!bfd_link_pic (info))
   18173 	    {
   18174 	      if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
   18175 		return false;
   18176 	      if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
   18177 		return false;
   18178 	    }
   18179 	}
   18180       else if (using_thumb_only (htab) && !htab->fdpic_p)
   18181 	{
   18182 	  if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
   18183 	    return false;
   18184 	  if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
   18185 	    return false;
   18186 	  if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
   18187 	    return false;
   18188 	}
   18189       else if (!htab->fdpic_p)
   18190 	{
   18191 	  if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
   18192 	    return false;
   18193 #ifndef FOUR_WORD_PLT
   18194 	  if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
   18195 	    return false;
   18196 #endif
   18197 	}
   18198     }
   18199   if ((htab->root.splt && htab->root.splt->size > 0)
   18200       || (htab->root.iplt && htab->root.iplt->size > 0))
   18201     {
   18202       elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
   18203       for (input_bfd = info->input_bfds;
   18204 	   input_bfd != NULL;
   18205 	   input_bfd = input_bfd->link.next)
   18206 	{
   18207 	  struct arm_local_iplt_info **local_iplt;
   18208 	  unsigned int i, num_syms;
   18209 
   18210 	  if (!is_arm_elf (input_bfd))
   18211 	    continue;
   18212 
   18213 	  local_iplt = elf32_arm_local_iplt (input_bfd);
   18214 	  if (local_iplt != NULL)
   18215 	    {
   18216 	      num_syms = elf_symtab_hdr (input_bfd).sh_info;
   18217 	      if (num_syms > elf32_arm_num_entries (input_bfd))
   18218 		{
   18219 		  _bfd_error_handler (_("\
   18220 %pB: Number of symbols in input file has increased from %lu to %u\n"),
   18221 				      input_bfd,
   18222 				      (unsigned long) elf32_arm_num_entries (input_bfd),
   18223 				      num_syms);
   18224 		  return false;
   18225 		}
   18226 	      for (i = 0; i < num_syms; i++)
   18227 		if (local_iplt[i] != NULL
   18228 		    && !elf32_arm_output_plt_map_1 (&osi, true,
   18229 						    &local_iplt[i]->root,
   18230 						    &local_iplt[i]->arm))
   18231 		  return false;
   18232 	    }
   18233 	}
   18234     }
   18235   if (htab->root.tlsdesc_plt != 0)
   18236     {
   18237       /* Mapping symbols for the lazy tls trampoline.  */
   18238       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM,
   18239 				     htab->root.tlsdesc_plt))
   18240 	return false;
   18241 
   18242       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
   18243 				     htab->root.tlsdesc_plt + 24))
   18244 	return false;
   18245     }
   18246   if (htab->tls_trampoline != 0)
   18247     {
   18248       /* Mapping symbols for the tls trampoline.  */
   18249       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
   18250 	return false;
   18251 #ifdef FOUR_WORD_PLT
   18252       if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
   18253 				     htab->tls_trampoline + 12))
   18254 	return false;
   18255 #endif
   18256     }
   18257 
   18258   return true;
   18259 }
   18260 
   18261 /* Filter normal symbols of CMSE entry functions of ABFD to include in
   18262    the import library.  All SYMCOUNT symbols of ABFD can be examined
   18263    from their pointers in SYMS.  Pointers of symbols to keep should be
   18264    stored continuously at the beginning of that array.
   18265 
   18266    Returns the number of symbols to keep.  */
   18267 
   18268 static unsigned int
   18269 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
   18270 			       struct bfd_link_info *info,
   18271 			       asymbol **syms, long symcount)
   18272 {
   18273   size_t maxnamelen;
   18274   char *cmse_name;
   18275   long src_count, dst_count = 0;
   18276   struct elf32_arm_link_hash_table *htab;
   18277 
   18278   htab = elf32_arm_hash_table (info);
   18279   if (!htab->stub_bfd || !htab->stub_bfd->sections)
   18280     symcount = 0;
   18281 
   18282   maxnamelen = 128;
   18283   cmse_name = (char *) bfd_malloc (maxnamelen);
   18284   BFD_ASSERT (cmse_name);
   18285 
   18286   for (src_count = 0; src_count < symcount; src_count++)
   18287     {
   18288       struct elf32_arm_link_hash_entry *cmse_hash;
   18289       asymbol *sym;
   18290       flagword flags;
   18291       char *name;
   18292       size_t namelen;
   18293 
   18294       sym = syms[src_count];
   18295       flags = sym->flags;
   18296       name = (char *) bfd_asymbol_name (sym);
   18297 
   18298       if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
   18299 	continue;
   18300       if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
   18301 	continue;
   18302 
   18303       namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
   18304       if (namelen > maxnamelen)
   18305 	{
   18306 	  cmse_name = (char *)
   18307 	    bfd_realloc (cmse_name, namelen);
   18308 	  maxnamelen = namelen;
   18309 	}
   18310       snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
   18311       cmse_hash = (struct elf32_arm_link_hash_entry *)
   18312 	elf_link_hash_lookup (&(htab)->root, cmse_name, false, false, true);
   18313 
   18314       if (!cmse_hash
   18315 	  || (cmse_hash->root.root.type != bfd_link_hash_defined
   18316 	      && cmse_hash->root.root.type != bfd_link_hash_defweak)
   18317 	  || cmse_hash->root.type != STT_FUNC)
   18318 	continue;
   18319 
   18320       syms[dst_count++] = sym;
   18321     }
   18322   free (cmse_name);
   18323 
   18324   syms[dst_count] = NULL;
   18325 
   18326   return dst_count;
   18327 }
   18328 
   18329 /* Filter symbols of ABFD to include in the import library.  All
   18330    SYMCOUNT symbols of ABFD can be examined from their pointers in
   18331    SYMS.  Pointers of symbols to keep should be stored continuously at
   18332    the beginning of that array.
   18333 
   18334    Returns the number of symbols to keep.  */
   18335 
   18336 static unsigned int
   18337 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
   18338 				 struct bfd_link_info *info,
   18339 				 asymbol **syms, long symcount)
   18340 {
   18341   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
   18342 
   18343   /* Requirement 8 of "ARM v8-M Security Extensions: Requirements on
   18344      Development Tools" (ARM-ECM-0359818) mandates Secure Gateway import
   18345      library to be a relocatable object file.  */
   18346   BFD_ASSERT (!(bfd_get_file_flags (info->out_implib_bfd) & EXEC_P));
   18347   if (globals->cmse_implib)
   18348     return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
   18349   else
   18350     return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
   18351 }
   18352 
   18353 /* Allocate target specific section data.  */
   18354 
   18355 static bool
   18356 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
   18357 {
   18358   _arm_elf_section_data *sdata = bfd_zalloc (abfd, sizeof (*sdata));
   18359   if (sdata == NULL)
   18360     return false;
   18361   sec->used_by_bfd = sdata;
   18362 
   18363   return _bfd_elf_new_section_hook (abfd, sec);
   18364 }
   18365 
   18366 
   18367 /* Used to order a list of mapping symbols by address.  */
   18368 
   18369 static int
   18370 elf32_arm_compare_mapping (const void * a, const void * b)
   18371 {
   18372   const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
   18373   const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
   18374 
   18375   if (amap->vma > bmap->vma)
   18376     return 1;
   18377   else if (amap->vma < bmap->vma)
   18378     return -1;
   18379   else if (amap->type > bmap->type)
   18380     /* Ensure results do not depend on the host qsort for objects with
   18381        multiple mapping symbols at the same address by sorting on type
   18382        after vma.  */
   18383     return 1;
   18384   else if (amap->type < bmap->type)
   18385     return -1;
   18386   else
   18387     return 0;
   18388 }
   18389 
   18390 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified.  */
   18391 
   18392 static unsigned long
   18393 offset_prel31 (unsigned long addr, bfd_vma offset)
   18394 {
   18395   return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
   18396 }
   18397 
   18398 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
   18399    relocations.  */
   18400 
   18401 static void
   18402 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
   18403 {
   18404   unsigned long first_word = bfd_get_32 (output_bfd, from);
   18405   unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
   18406 
   18407   /* High bit of first word is supposed to be zero.  */
   18408   if ((first_word & 0x80000000ul) == 0)
   18409     first_word = offset_prel31 (first_word, offset);
   18410 
   18411   /* If the high bit of the first word is clear, and the bit pattern is not 0x1
   18412      (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry.  */
   18413   if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
   18414     second_word = offset_prel31 (second_word, offset);
   18415 
   18416   bfd_put_32 (output_bfd, first_word, to);
   18417   bfd_put_32 (output_bfd, second_word, to + 4);
   18418 }
   18419 
   18420 /* Data for make_branch_to_a8_stub().  */
   18421 
   18422 struct a8_branch_to_stub_data
   18423 {
   18424   asection *writing_section;
   18425   bfd_byte *contents;
   18426 };
   18427 
   18428 
   18429 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
   18430    places for a particular section.  */
   18431 
   18432 static bool
   18433 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
   18434 		       void *in_arg)
   18435 {
   18436   struct elf32_arm_stub_hash_entry *stub_entry;
   18437   struct a8_branch_to_stub_data *data;
   18438   bfd_byte *contents;
   18439   unsigned long branch_insn;
   18440   bfd_vma veneered_insn_loc, veneer_entry_loc;
   18441   bfd_signed_vma branch_offset;
   18442   bfd *abfd;
   18443   unsigned int loc;
   18444 
   18445   stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
   18446   data = (struct a8_branch_to_stub_data *) in_arg;
   18447 
   18448   if (stub_entry->target_section != data->writing_section
   18449       || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
   18450     return true;
   18451 
   18452   contents = data->contents;
   18453 
   18454   /* We use target_section as Cortex-A8 erratum workaround stubs are only
   18455      generated when both source and target are in the same section.  */
   18456   veneered_insn_loc = stub_entry->target_section->output_section->vma
   18457 		      + stub_entry->target_section->output_offset
   18458 		      + stub_entry->source_value;
   18459 
   18460   veneer_entry_loc = stub_entry->stub_sec->output_section->vma
   18461 		     + stub_entry->stub_sec->output_offset
   18462 		     + stub_entry->stub_offset;
   18463 
   18464   if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
   18465     veneered_insn_loc &= ~3u;
   18466 
   18467   branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
   18468 
   18469   abfd = stub_entry->target_section->owner;
   18470   loc = stub_entry->source_value;
   18471 
   18472   /* We attempt to avoid this condition by setting stubs_always_after_branch
   18473      in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
   18474      This check is just to be on the safe side...  */
   18475   if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
   18476     {
   18477       _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub is "
   18478 			    "allocated in unsafe location"), abfd);
   18479       return false;
   18480     }
   18481 
   18482   switch (stub_entry->stub_type)
   18483     {
   18484     case arm_stub_a8_veneer_b:
   18485     case arm_stub_a8_veneer_b_cond:
   18486       branch_insn = 0xf0009000;
   18487       goto jump24;
   18488 
   18489     case arm_stub_a8_veneer_blx:
   18490       branch_insn = 0xf000e800;
   18491       goto jump24;
   18492 
   18493     case arm_stub_a8_veneer_bl:
   18494       {
   18495 	unsigned int i1, j1, i2, j2, s;
   18496 
   18497 	branch_insn = 0xf000d000;
   18498 
   18499       jump24:
   18500 	if (branch_offset < -16777216 || branch_offset > 16777214)
   18501 	  {
   18502 	    /* There's not much we can do apart from complain if this
   18503 	       happens.  */
   18504 	    _bfd_error_handler (_("%pB: error: Cortex-A8 erratum stub out "
   18505 				  "of range (input file too large)"), abfd);
   18506 	    return false;
   18507 	  }
   18508 
   18509 	/* i1 = not(j1 eor s), so:
   18510 	   not i1 = j1 eor s
   18511 	   j1 = (not i1) eor s.  */
   18512 
   18513 	branch_insn |= (branch_offset >> 1) & 0x7ff;
   18514 	branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
   18515 	i2 = (branch_offset >> 22) & 1;
   18516 	i1 = (branch_offset >> 23) & 1;
   18517 	s = (branch_offset >> 24) & 1;
   18518 	j1 = (!i1) ^ s;
   18519 	j2 = (!i2) ^ s;
   18520 	branch_insn |= j2 << 11;
   18521 	branch_insn |= j1 << 13;
   18522 	branch_insn |= s << 26;
   18523       }
   18524       break;
   18525 
   18526     default:
   18527       BFD_FAIL ();
   18528       return false;
   18529     }
   18530 
   18531   bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
   18532   bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
   18533 
   18534   return true;
   18535 }
   18536 
   18537 /* Beginning of stm32l4xx work-around.  */
   18538 
   18539 /* Functions encoding instructions necessary for the emission of the
   18540    fix-stm32l4xx-629360.
   18541    Encoding is extracted from the
   18542    ARM (C) Architecture Reference Manual
   18543    ARMv7-A and ARMv7-R edition
   18544    ARM DDI 0406C.b (ID072512).  */
   18545 
   18546 static inline bfd_vma
   18547 create_instruction_branch_absolute (int branch_offset)
   18548 {
   18549   /* A8.8.18 B (A8-334)
   18550      B target_address (Encoding T4).  */
   18551   /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii.  */
   18552   /* jump offset is:  S:I1:I2:imm10:imm11:0.  */
   18553   /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S).  */
   18554 
   18555   int s = ((branch_offset & 0x1000000) >> 24);
   18556   int j1 = s ^ !((branch_offset & 0x800000) >> 23);
   18557   int j2 = s ^ !((branch_offset & 0x400000) >> 22);
   18558 
   18559   if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
   18560     BFD_ASSERT (0 && "Error: branch out of range.  Cannot create branch.");
   18561 
   18562   bfd_vma patched_inst = 0xf0009000
   18563     | s << 26 /* S.  */
   18564     | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10.  */
   18565     | j1 << 13 /* J1.  */
   18566     | j2 << 11 /* J2.  */
   18567     | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11.  */
   18568 
   18569   return patched_inst;
   18570 }
   18571 
   18572 static inline bfd_vma
   18573 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
   18574 {
   18575   /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
   18576      LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2).  */
   18577   bfd_vma patched_inst = 0xe8900000
   18578     | (/*W=*/wback << 21)
   18579     | (base_reg << 16)
   18580     | (reg_mask & 0x0000ffff);
   18581 
   18582   return patched_inst;
   18583 }
   18584 
   18585 static inline bfd_vma
   18586 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
   18587 {
   18588   /* A8.8.60 LDMDB/LDMEA (A8-402)
   18589      LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1).  */
   18590   bfd_vma patched_inst = 0xe9100000
   18591     | (/*W=*/wback << 21)
   18592     | (base_reg << 16)
   18593     | (reg_mask & 0x0000ffff);
   18594 
   18595   return patched_inst;
   18596 }
   18597 
   18598 static inline bfd_vma
   18599 create_instruction_mov (int target_reg, int source_reg)
   18600 {
   18601   /* A8.8.103 MOV (register) (A8-486)
   18602      MOV Rd, Rm (Encoding T1).  */
   18603   bfd_vma patched_inst = 0x4600
   18604     | (target_reg & 0x7)
   18605     | ((target_reg & 0x8) >> 3) << 7
   18606     | (source_reg << 3);
   18607 
   18608   return patched_inst;
   18609 }
   18610 
   18611 static inline bfd_vma
   18612 create_instruction_sub (int target_reg, int source_reg, int value)
   18613 {
   18614   /* A8.8.221 SUB (immediate) (A8-708)
   18615      SUB Rd, Rn, #value (Encoding T3).  */
   18616   bfd_vma patched_inst = 0xf1a00000
   18617     | (target_reg << 8)
   18618     | (source_reg << 16)
   18619     | (/*S=*/0 << 20)
   18620     | ((value & 0x800) >> 11) << 26
   18621     | ((value & 0x700) >>  8) << 12
   18622     | (value & 0x0ff);
   18623 
   18624   return patched_inst;
   18625 }
   18626 
   18627 static inline bfd_vma
   18628 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
   18629 			   int first_reg)
   18630 {
   18631   /* A8.8.332 VLDM (A8-922)
   18632      VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2).  */
   18633   bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
   18634     | (/*W=*/wback << 21)
   18635     | (base_reg << 16)
   18636     | (num_words & 0x000000ff)
   18637     | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
   18638     | (first_reg & 0x00000001) << 22;
   18639 
   18640   return patched_inst;
   18641 }
   18642 
   18643 static inline bfd_vma
   18644 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
   18645 			   int first_reg)
   18646 {
   18647   /* A8.8.332 VLDM (A8-922)
   18648      VLMD{MODE} Rn!, {} (Encoding T1 or T2).  */
   18649   bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
   18650     | (base_reg << 16)
   18651     | (num_words & 0x000000ff)
   18652     | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
   18653     | (first_reg & 0x00000001) << 22;
   18654 
   18655   return patched_inst;
   18656 }
   18657 
   18658 static inline bfd_vma
   18659 create_instruction_udf_w (int value)
   18660 {
   18661   /* A8.8.247 UDF (A8-758)
   18662      Undefined (Encoding T2).  */
   18663   bfd_vma patched_inst = 0xf7f0a000
   18664     | (value & 0x00000fff)
   18665     | (value & 0x000f0000) << 16;
   18666 
   18667   return patched_inst;
   18668 }
   18669 
   18670 static inline bfd_vma
   18671 create_instruction_udf (int value)
   18672 {
   18673   /* A8.8.247 UDF (A8-758)
   18674      Undefined (Encoding T1).  */
   18675   bfd_vma patched_inst = 0xde00
   18676     | (value & 0xff);
   18677 
   18678   return patched_inst;
   18679 }
   18680 
   18681 /* Functions writing an instruction in memory, returning the next
   18682    memory position to write to.  */
   18683 
   18684 static inline bfd_byte *
   18685 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
   18686 		    bfd * output_bfd, bfd_byte *pt, insn32 insn)
   18687 {
   18688   put_thumb2_insn (htab, output_bfd, insn, pt);
   18689   return pt + 4;
   18690 }
   18691 
   18692 static inline bfd_byte *
   18693 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
   18694 		    bfd * output_bfd, bfd_byte *pt, insn32 insn)
   18695 {
   18696   put_thumb_insn (htab, output_bfd, insn, pt);
   18697   return pt + 2;
   18698 }
   18699 
   18700 /* Function filling up a region in memory with T1 and T2 UDFs taking
   18701    care of alignment.  */
   18702 
   18703 static bfd_byte *
   18704 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
   18705 			 bfd *			 output_bfd,
   18706 			 const bfd_byte * const	 base_stub_contents,
   18707 			 bfd_byte * const	 from_stub_contents,
   18708 			 const bfd_byte * const	 end_stub_contents)
   18709 {
   18710   bfd_byte *current_stub_contents = from_stub_contents;
   18711 
   18712   /* Fill the remaining of the stub with deterministic contents : UDF
   18713      instructions.
   18714      Check if realignment is needed on modulo 4 frontier using T1, to
   18715      further use T2.  */
   18716   if ((current_stub_contents < end_stub_contents)
   18717       && !((current_stub_contents - base_stub_contents) % 2)
   18718       && ((current_stub_contents - base_stub_contents) % 4))
   18719     current_stub_contents =
   18720       push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
   18721 			  create_instruction_udf (0));
   18722 
   18723   for (; current_stub_contents < end_stub_contents;)
   18724     current_stub_contents =
   18725       push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18726 			  create_instruction_udf_w (0));
   18727 
   18728   return current_stub_contents;
   18729 }
   18730 
   18731 /* Functions writing the stream of instructions equivalent to the
   18732    derived sequence for ldmia, ldmdb, vldm respectively.  */
   18733 
   18734 static void
   18735 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
   18736 				       bfd * output_bfd,
   18737 				       const insn32 initial_insn,
   18738 				       const bfd_byte *const initial_insn_addr,
   18739 				       bfd_byte *const base_stub_contents)
   18740 {
   18741   int wback = (initial_insn & 0x00200000) >> 21;
   18742   int ri, rn = (initial_insn & 0x000F0000) >> 16;
   18743   int insn_all_registers = initial_insn & 0x0000ffff;
   18744   int insn_low_registers, insn_high_registers;
   18745   int usable_register_mask;
   18746   int nb_registers = elf32_arm_popcount (insn_all_registers);
   18747   int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
   18748   int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
   18749   bfd_byte *current_stub_contents = base_stub_contents;
   18750 
   18751   BFD_ASSERT (is_thumb2_ldmia (initial_insn));
   18752 
   18753   /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
   18754      smaller than 8 registers load sequences that do not cause the
   18755      hardware issue.  */
   18756   if (nb_registers <= 8)
   18757     {
   18758       /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}.  */
   18759       current_stub_contents =
   18760 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18761 			    initial_insn);
   18762 
   18763       /* B initial_insn_addr+4.  */
   18764       if (!restore_pc)
   18765 	current_stub_contents =
   18766 	  push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18767 			      create_instruction_branch_absolute
   18768 			      (initial_insn_addr - current_stub_contents));
   18769 
   18770       /* Fill the remaining of the stub with deterministic contents.  */
   18771       current_stub_contents =
   18772 	stm32l4xx_fill_stub_udf (htab, output_bfd,
   18773 				 base_stub_contents, current_stub_contents,
   18774 				 base_stub_contents +
   18775 				 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
   18776 
   18777       return;
   18778     }
   18779 
   18780   /* - reg_list[13] == 0.  */
   18781   BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
   18782 
   18783   /* - reg_list[14] & reg_list[15] != 1.  */
   18784   BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
   18785 
   18786   /* - if (wback==1) reg_list[rn] == 0.  */
   18787   BFD_ASSERT (!wback || !restore_rn);
   18788 
   18789   /* - nb_registers > 8.  */
   18790   BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
   18791 
   18792   /* At this point, LDMxx initial insn loads between 9 and 14 registers.  */
   18793 
   18794   /* In the following algorithm, we split this wide LDM using 2 LDM insns:
   18795     - One with the 7 lowest registers (register mask 0x007F)
   18796       This LDM will finally contain between 2 and 7 registers
   18797     - One with the 7 highest registers (register mask 0xDF80)
   18798       This ldm will finally contain between 2 and 7 registers.  */
   18799   insn_low_registers = insn_all_registers & 0x007F;
   18800   insn_high_registers = insn_all_registers & 0xDF80;
   18801 
   18802   /* A spare register may be needed during this veneer to temporarily
   18803      handle the base register.  This register will be restored with the
   18804      last LDM operation.
   18805      The usable register may be any general purpose register (that
   18806      excludes PC, SP, LR : register mask is 0x1FFF).  */
   18807   usable_register_mask = 0x1FFF;
   18808 
   18809   /* Generate the stub function.  */
   18810   if (wback)
   18811     {
   18812       /* LDMIA Rn!, {R-low-register-list} : (Encoding T2).  */
   18813       current_stub_contents =
   18814 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18815 			    create_instruction_ldmia
   18816 			    (rn, /*wback=*/1, insn_low_registers));
   18817 
   18818       /* LDMIA Rn!, {R-high-register-list} : (Encoding T2).  */
   18819       current_stub_contents =
   18820 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18821 			    create_instruction_ldmia
   18822 			    (rn, /*wback=*/1, insn_high_registers));
   18823       if (!restore_pc)
   18824 	{
   18825 	  /* B initial_insn_addr+4.  */
   18826 	  current_stub_contents =
   18827 	    push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18828 				create_instruction_branch_absolute
   18829 				(initial_insn_addr - current_stub_contents));
   18830        }
   18831     }
   18832   else /* if (!wback).  */
   18833     {
   18834       ri = rn;
   18835 
   18836       /* If Rn is not part of the high-register-list, move it there.  */
   18837       if (!(insn_high_registers & (1 << rn)))
   18838 	{
   18839 	  /* Choose a Ri in the high-register-list that will be restored.  */
   18840 	  ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
   18841 
   18842 	  /* MOV Ri, Rn.  */
   18843 	  current_stub_contents =
   18844 	    push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
   18845 				create_instruction_mov (ri, rn));
   18846 	}
   18847 
   18848       /* LDMIA Ri!, {R-low-register-list} : (Encoding T2).  */
   18849       current_stub_contents =
   18850 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18851 			    create_instruction_ldmia
   18852 			    (ri, /*wback=*/1, insn_low_registers));
   18853 
   18854       /* LDMIA Ri, {R-high-register-list} : (Encoding T2).  */
   18855       current_stub_contents =
   18856 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18857 			    create_instruction_ldmia
   18858 			    (ri, /*wback=*/0, insn_high_registers));
   18859 
   18860       if (!restore_pc)
   18861 	{
   18862 	  /* B initial_insn_addr+4.  */
   18863 	  current_stub_contents =
   18864 	    push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18865 				create_instruction_branch_absolute
   18866 				(initial_insn_addr - current_stub_contents));
   18867 	}
   18868     }
   18869 
   18870   /* Fill the remaining of the stub with deterministic contents.  */
   18871   current_stub_contents =
   18872     stm32l4xx_fill_stub_udf (htab, output_bfd,
   18873 			     base_stub_contents, current_stub_contents,
   18874 			     base_stub_contents +
   18875 			     STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
   18876 }
   18877 
   18878 static void
   18879 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
   18880 				       bfd * output_bfd,
   18881 				       const insn32 initial_insn,
   18882 				       const bfd_byte *const initial_insn_addr,
   18883 				       bfd_byte *const base_stub_contents)
   18884 {
   18885   int wback = (initial_insn & 0x00200000) >> 21;
   18886   int ri, rn = (initial_insn & 0x000f0000) >> 16;
   18887   int insn_all_registers = initial_insn & 0x0000ffff;
   18888   int insn_low_registers, insn_high_registers;
   18889   int usable_register_mask;
   18890   int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
   18891   int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
   18892   int nb_registers = elf32_arm_popcount (insn_all_registers);
   18893   bfd_byte *current_stub_contents = base_stub_contents;
   18894 
   18895   BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
   18896 
   18897   /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
   18898      smaller than 8 registers load sequences that do not cause the
   18899      hardware issue.  */
   18900   if (nb_registers <= 8)
   18901     {
   18902       /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}.  */
   18903       current_stub_contents =
   18904 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18905 			    initial_insn);
   18906 
   18907       /* B initial_insn_addr+4.  */
   18908       current_stub_contents =
   18909 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18910 			    create_instruction_branch_absolute
   18911 			    (initial_insn_addr - current_stub_contents));
   18912 
   18913       /* Fill the remaining of the stub with deterministic contents.  */
   18914       current_stub_contents =
   18915 	stm32l4xx_fill_stub_udf (htab, output_bfd,
   18916 				 base_stub_contents, current_stub_contents,
   18917 				 base_stub_contents +
   18918 				 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
   18919 
   18920       return;
   18921     }
   18922 
   18923   /* - reg_list[13] == 0.  */
   18924   BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
   18925 
   18926   /* - reg_list[14] & reg_list[15] != 1.  */
   18927   BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
   18928 
   18929   /* - if (wback==1) reg_list[rn] == 0.  */
   18930   BFD_ASSERT (!wback || !restore_rn);
   18931 
   18932   /* - nb_registers > 8.  */
   18933   BFD_ASSERT (elf32_arm_popcount (insn_all_registers) > 8);
   18934 
   18935   /* At this point, LDMxx initial insn loads between 9 and 14 registers.  */
   18936 
   18937   /* In the following algorithm, we split this wide LDM using 2 LDM insn:
   18938     - One with the 7 lowest registers (register mask 0x007F)
   18939       This LDM will finally contain between 2 and 7 registers
   18940     - One with the 7 highest registers (register mask 0xDF80)
   18941       This ldm will finally contain between 2 and 7 registers.  */
   18942   insn_low_registers = insn_all_registers & 0x007F;
   18943   insn_high_registers = insn_all_registers & 0xDF80;
   18944 
   18945   /* A spare register may be needed during this veneer to temporarily
   18946      handle the base register.  This register will be restored with
   18947      the last LDM operation.
   18948      The usable register may be any general purpose register (that excludes
   18949      PC, SP, LR : register mask is 0x1FFF).  */
   18950   usable_register_mask = 0x1FFF;
   18951 
   18952   /* Generate the stub function.  */
   18953   if (!wback && !restore_pc && !restore_rn)
   18954     {
   18955       /* Choose a Ri in the low-register-list that will be restored.  */
   18956       ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
   18957 
   18958       /* MOV Ri, Rn.  */
   18959       current_stub_contents =
   18960 	push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
   18961 			    create_instruction_mov (ri, rn));
   18962 
   18963       /* LDMDB Ri!, {R-high-register-list}.  */
   18964       current_stub_contents =
   18965 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18966 			    create_instruction_ldmdb
   18967 			    (ri, /*wback=*/1, insn_high_registers));
   18968 
   18969       /* LDMDB Ri, {R-low-register-list}.  */
   18970       current_stub_contents =
   18971 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18972 			    create_instruction_ldmdb
   18973 			    (ri, /*wback=*/0, insn_low_registers));
   18974 
   18975       /* B initial_insn_addr+4.  */
   18976       current_stub_contents =
   18977 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18978 			    create_instruction_branch_absolute
   18979 			    (initial_insn_addr - current_stub_contents));
   18980     }
   18981   else if (wback && !restore_pc && !restore_rn)
   18982     {
   18983       /* LDMDB Rn!, {R-high-register-list}.  */
   18984       current_stub_contents =
   18985 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18986 			    create_instruction_ldmdb
   18987 			    (rn, /*wback=*/1, insn_high_registers));
   18988 
   18989       /* LDMDB Rn!, {R-low-register-list}.  */
   18990       current_stub_contents =
   18991 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18992 			    create_instruction_ldmdb
   18993 			    (rn, /*wback=*/1, insn_low_registers));
   18994 
   18995       /* B initial_insn_addr+4.  */
   18996       current_stub_contents =
   18997 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   18998 			    create_instruction_branch_absolute
   18999 			    (initial_insn_addr - current_stub_contents));
   19000     }
   19001   else if (!wback && restore_pc && !restore_rn)
   19002     {
   19003       /* Choose a Ri in the high-register-list that will be restored.  */
   19004       ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
   19005 
   19006       /* SUB Ri, Rn, #(4*nb_registers).  */
   19007       current_stub_contents =
   19008 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19009 			    create_instruction_sub (ri, rn, (4 * nb_registers)));
   19010 
   19011       /* LDMIA Ri!, {R-low-register-list}.  */
   19012       current_stub_contents =
   19013 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19014 			    create_instruction_ldmia
   19015 			    (ri, /*wback=*/1, insn_low_registers));
   19016 
   19017       /* LDMIA Ri, {R-high-register-list}.  */
   19018       current_stub_contents =
   19019 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19020 			    create_instruction_ldmia
   19021 			    (ri, /*wback=*/0, insn_high_registers));
   19022     }
   19023   else if (wback && restore_pc && !restore_rn)
   19024     {
   19025       /* Choose a Ri in the high-register-list that will be restored.  */
   19026       ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
   19027 
   19028       /* SUB Rn, Rn, #(4*nb_registers)  */
   19029       current_stub_contents =
   19030 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19031 			    create_instruction_sub (rn, rn, (4 * nb_registers)));
   19032 
   19033       /* MOV Ri, Rn.  */
   19034       current_stub_contents =
   19035 	push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
   19036 			    create_instruction_mov (ri, rn));
   19037 
   19038       /* LDMIA Ri!, {R-low-register-list}.  */
   19039       current_stub_contents =
   19040 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19041 			    create_instruction_ldmia
   19042 			    (ri, /*wback=*/1, insn_low_registers));
   19043 
   19044       /* LDMIA Ri, {R-high-register-list}.  */
   19045       current_stub_contents =
   19046 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19047 			    create_instruction_ldmia
   19048 			    (ri, /*wback=*/0, insn_high_registers));
   19049     }
   19050   else if (!wback && !restore_pc && restore_rn)
   19051     {
   19052       ri = rn;
   19053       if (!(insn_low_registers & (1 << rn)))
   19054 	{
   19055 	  /* Choose a Ri in the low-register-list that will be restored.  */
   19056 	  ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
   19057 
   19058 	  /* MOV Ri, Rn.  */
   19059 	  current_stub_contents =
   19060 	    push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
   19061 				create_instruction_mov (ri, rn));
   19062 	}
   19063 
   19064       /* LDMDB Ri!, {R-high-register-list}.  */
   19065       current_stub_contents =
   19066 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19067 			    create_instruction_ldmdb
   19068 			    (ri, /*wback=*/1, insn_high_registers));
   19069 
   19070       /* LDMDB Ri, {R-low-register-list}.  */
   19071       current_stub_contents =
   19072 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19073 			    create_instruction_ldmdb
   19074 			    (ri, /*wback=*/0, insn_low_registers));
   19075 
   19076       /* B initial_insn_addr+4.  */
   19077       current_stub_contents =
   19078 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19079 			    create_instruction_branch_absolute
   19080 			    (initial_insn_addr - current_stub_contents));
   19081     }
   19082   else if (!wback && restore_pc && restore_rn)
   19083     {
   19084       ri = rn;
   19085       if (!(insn_high_registers & (1 << rn)))
   19086 	{
   19087 	  /* Choose a Ri in the high-register-list that will be restored.  */
   19088 	  ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
   19089 	}
   19090 
   19091       /* SUB Ri, Rn, #(4*nb_registers).  */
   19092       current_stub_contents =
   19093 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19094 			    create_instruction_sub (ri, rn, (4 * nb_registers)));
   19095 
   19096       /* LDMIA Ri!, {R-low-register-list}.  */
   19097       current_stub_contents =
   19098 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19099 			    create_instruction_ldmia
   19100 			    (ri, /*wback=*/1, insn_low_registers));
   19101 
   19102       /* LDMIA Ri, {R-high-register-list}.  */
   19103       current_stub_contents =
   19104 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19105 			    create_instruction_ldmia
   19106 			    (ri, /*wback=*/0, insn_high_registers));
   19107     }
   19108   else if (wback && restore_rn)
   19109     {
   19110       /* The assembler should not have accepted to encode this.  */
   19111       BFD_ASSERT (0 && "Cannot patch an instruction that has an "
   19112 	"undefined behavior.\n");
   19113     }
   19114 
   19115   /* Fill the remaining of the stub with deterministic contents.  */
   19116   current_stub_contents =
   19117     stm32l4xx_fill_stub_udf (htab, output_bfd,
   19118 			     base_stub_contents, current_stub_contents,
   19119 			     base_stub_contents +
   19120 			     STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
   19121 
   19122 }
   19123 
   19124 static void
   19125 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
   19126 				      bfd * output_bfd,
   19127 				      const insn32 initial_insn,
   19128 				      const bfd_byte *const initial_insn_addr,
   19129 				      bfd_byte *const base_stub_contents)
   19130 {
   19131   int num_words = initial_insn & 0xff;
   19132   bfd_byte *current_stub_contents = base_stub_contents;
   19133 
   19134   BFD_ASSERT (is_thumb2_vldm (initial_insn));
   19135 
   19136   /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
   19137      smaller than 8 words load sequences that do not cause the
   19138      hardware issue.  */
   19139   if (num_words <= 8)
   19140     {
   19141       /* Untouched instruction.  */
   19142       current_stub_contents =
   19143 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19144 			    initial_insn);
   19145 
   19146       /* B initial_insn_addr+4.  */
   19147       current_stub_contents =
   19148 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19149 			    create_instruction_branch_absolute
   19150 			    (initial_insn_addr - current_stub_contents));
   19151     }
   19152   else
   19153     {
   19154       bool is_dp = /* DP encoding.  */
   19155 	(initial_insn & 0xfe100f00) == 0xec100b00;
   19156       bool is_ia_nobang = /* (IA without !).  */
   19157 	(((initial_insn << 7) >> 28) & 0xd) == 0x4;
   19158       bool is_ia_bang = /* (IA with !) - includes VPOP.  */
   19159 	(((initial_insn << 7) >> 28) & 0xd) == 0x5;
   19160       bool is_db_bang = /* (DB with !).  */
   19161 	(((initial_insn << 7) >> 28) & 0xd) == 0x9;
   19162       int base_reg = ((unsigned int) initial_insn << 12) >> 28;
   19163       /* d = UInt (Vd:D);.  */
   19164       int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
   19165 	| (((unsigned int)initial_insn << 9) >> 31);
   19166 
   19167       /* Compute the number of 8-words chunks needed to split.  */
   19168       int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
   19169       int chunk;
   19170 
   19171       /* The test coverage has been done assuming the following
   19172 	 hypothesis that exactly one of the previous is_ predicates is
   19173 	 true.  */
   19174       BFD_ASSERT (    (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
   19175 		  && !(is_ia_nobang & is_ia_bang & is_db_bang));
   19176 
   19177       /* We treat the cutting of the words in one pass for all
   19178 	 cases, then we emit the adjustments:
   19179 
   19180 	 vldm rx, {...}
   19181 	 -> vldm rx!, {8_words_or_less} for each needed 8_word
   19182 	 -> sub rx, rx, #size (list)
   19183 
   19184 	 vldm rx!, {...}
   19185 	 -> vldm rx!, {8_words_or_less} for each needed 8_word
   19186 	 This also handles vpop instruction (when rx is sp)
   19187 
   19188 	 vldmd rx!, {...}
   19189 	 -> vldmb rx!, {8_words_or_less} for each needed 8_word.  */
   19190       for (chunk = 0; chunk < chunks; ++chunk)
   19191 	{
   19192 	  bfd_vma new_insn = 0;
   19193 
   19194 	  if (is_ia_nobang || is_ia_bang)
   19195 	    {
   19196 	      new_insn = create_instruction_vldmia
   19197 		(base_reg,
   19198 		 is_dp,
   19199 		 /*wback= .  */1,
   19200 		 chunks - (chunk + 1) ?
   19201 		 8 : num_words - chunk * 8,
   19202 		 first_reg + chunk * 8);
   19203 	    }
   19204 	  else if (is_db_bang)
   19205 	    {
   19206 	      new_insn = create_instruction_vldmdb
   19207 		(base_reg,
   19208 		 is_dp,
   19209 		 chunks - (chunk + 1) ?
   19210 		 8 : num_words - chunk * 8,
   19211 		 first_reg + chunk * 8);
   19212 	    }
   19213 
   19214 	  if (new_insn)
   19215 	    current_stub_contents =
   19216 	      push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19217 				  new_insn);
   19218 	}
   19219 
   19220       /* Only this case requires the base register compensation
   19221 	 subtract.  */
   19222       if (is_ia_nobang)
   19223 	{
   19224 	  current_stub_contents =
   19225 	    push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19226 				create_instruction_sub
   19227 				(base_reg, base_reg, 4*num_words));
   19228 	}
   19229 
   19230       /* B initial_insn_addr+4.  */
   19231       current_stub_contents =
   19232 	push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
   19233 			    create_instruction_branch_absolute
   19234 			    (initial_insn_addr - current_stub_contents));
   19235     }
   19236 
   19237   /* Fill the remaining of the stub with deterministic contents.  */
   19238   current_stub_contents =
   19239     stm32l4xx_fill_stub_udf (htab, output_bfd,
   19240 			     base_stub_contents, current_stub_contents,
   19241 			     base_stub_contents +
   19242 			     STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
   19243 }
   19244 
   19245 static void
   19246 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
   19247 				 bfd * output_bfd,
   19248 				 const insn32 wrong_insn,
   19249 				 const bfd_byte *const wrong_insn_addr,
   19250 				 bfd_byte *const stub_contents)
   19251 {
   19252   if (is_thumb2_ldmia (wrong_insn))
   19253     stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
   19254 					   wrong_insn, wrong_insn_addr,
   19255 					   stub_contents);
   19256   else if (is_thumb2_ldmdb (wrong_insn))
   19257     stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
   19258 					   wrong_insn, wrong_insn_addr,
   19259 					   stub_contents);
   19260   else if (is_thumb2_vldm (wrong_insn))
   19261     stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
   19262 					  wrong_insn, wrong_insn_addr,
   19263 					  stub_contents);
   19264 }
   19265 
   19266 /* End of stm32l4xx work-around.  */
   19267 
   19268 
   19269 /* Do code byteswapping.  Return FALSE afterwards so that the section is
   19270    written out as normal.  */
   19271 
   19272 static bool
   19273 elf32_arm_write_section (bfd *output_bfd,
   19274 			 struct bfd_link_info *link_info,
   19275 			 asection *sec,
   19276 			 bfd_byte *contents)
   19277 {
   19278   unsigned int mapcount, errcount;
   19279   _arm_elf_section_data *arm_data;
   19280   struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
   19281   elf32_arm_section_map *map;
   19282   elf32_vfp11_erratum_list *errnode;
   19283   elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
   19284   bfd_vma ptr;
   19285   bfd_vma end;
   19286   bfd_vma offset = sec->output_section->vma + sec->output_offset;
   19287   bfd_byte tmp;
   19288   unsigned int i;
   19289 
   19290   if (globals == NULL)
   19291     return false;
   19292 
   19293   /* If this section has not been allocated an _arm_elf_section_data
   19294      structure then we cannot record anything.  */
   19295   arm_data = get_arm_elf_section_data (sec);
   19296   if (arm_data == NULL)
   19297     return false;
   19298 
   19299   mapcount = arm_data->mapcount;
   19300   map = arm_data->map;
   19301   errcount = arm_data->erratumcount;
   19302 
   19303   if (errcount != 0)
   19304     {
   19305       unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
   19306 
   19307       for (errnode = arm_data->erratumlist; errnode != 0;
   19308 	   errnode = errnode->next)
   19309 	{
   19310 	  bfd_vma target = errnode->vma - offset;
   19311 
   19312 	  switch (errnode->type)
   19313 	    {
   19314 	    case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
   19315 	      {
   19316 		bfd_vma branch_to_veneer;
   19317 		/* Original condition code of instruction, plus bit mask for
   19318 		   ARM B instruction.  */
   19319 		unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
   19320 				  | 0x0a000000;
   19321 
   19322 		/* The instruction is before the label.  */
   19323 		target -= 4;
   19324 
   19325 		/* Above offset included in -4 below.  */
   19326 		branch_to_veneer = errnode->u.b.veneer->vma
   19327 				   - errnode->vma - 4;
   19328 
   19329 		if ((signed) branch_to_veneer < -(1 << 25)
   19330 		    || (signed) branch_to_veneer >= (1 << 25))
   19331 		  _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
   19332 					"range"), output_bfd);
   19333 
   19334 		insn |= (branch_to_veneer >> 2) & 0xffffff;
   19335 		contents[endianflip ^ target] = insn & 0xff;
   19336 		contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
   19337 		contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
   19338 		contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
   19339 	      }
   19340 	      break;
   19341 
   19342 	    case VFP11_ERRATUM_ARM_VENEER:
   19343 	      {
   19344 		bfd_vma branch_from_veneer;
   19345 		unsigned int insn;
   19346 
   19347 		/* Take size of veneer into account.  */
   19348 		branch_from_veneer = errnode->u.v.branch->vma
   19349 				     - errnode->vma - 12;
   19350 
   19351 		if ((signed) branch_from_veneer < -(1 << 25)
   19352 		    || (signed) branch_from_veneer >= (1 << 25))
   19353 		  _bfd_error_handler (_("%pB: error: VFP11 veneer out of "
   19354 					"range"), output_bfd);
   19355 
   19356 		/* Original instruction.  */
   19357 		insn = errnode->u.v.branch->u.b.vfp_insn;
   19358 		contents[endianflip ^ target] = insn & 0xff;
   19359 		contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
   19360 		contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
   19361 		contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
   19362 
   19363 		/* Branch back to insn after original insn.  */
   19364 		insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
   19365 		contents[endianflip ^ (target + 4)] = insn & 0xff;
   19366 		contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
   19367 		contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
   19368 		contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
   19369 	      }
   19370 	      break;
   19371 
   19372 	    default:
   19373 	      abort ();
   19374 	    }
   19375 	}
   19376     }
   19377 
   19378   if (arm_data->stm32l4xx_erratumcount != 0)
   19379     {
   19380       for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
   19381 	   stm32l4xx_errnode != 0;
   19382 	   stm32l4xx_errnode = stm32l4xx_errnode->next)
   19383 	{
   19384 	  bfd_vma target = stm32l4xx_errnode->vma - offset;
   19385 
   19386 	  switch (stm32l4xx_errnode->type)
   19387 	    {
   19388 	    case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
   19389 	      {
   19390 		unsigned int insn;
   19391 		bfd_vma branch_to_veneer =
   19392 		  stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
   19393 
   19394 		if ((signed) branch_to_veneer < -(1 << 24)
   19395 		    || (signed) branch_to_veneer >= (1 << 24))
   19396 		  {
   19397 		    bfd_vma out_of_range =
   19398 		      ((signed) branch_to_veneer < -(1 << 24)) ?
   19399 		      - branch_to_veneer - (1 << 24) :
   19400 		      ((signed) branch_to_veneer >= (1 << 24)) ?
   19401 		      branch_to_veneer - (1 << 24) : 0;
   19402 
   19403 		    _bfd_error_handler
   19404 		      (_("%pB(%#" PRIx64 "): error: "
   19405 			 "cannot create STM32L4XX veneer; "
   19406 			 "jump out of range by %" PRId64 " bytes; "
   19407 			 "cannot encode branch instruction"),
   19408 		       output_bfd,
   19409 		       (uint64_t) (stm32l4xx_errnode->vma - 4),
   19410 		       (int64_t) out_of_range);
   19411 		    continue;
   19412 		  }
   19413 
   19414 		insn = create_instruction_branch_absolute
   19415 		  (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
   19416 
   19417 		/* The instruction is before the label.  */
   19418 		target -= 4;
   19419 
   19420 		put_thumb2_insn (globals, output_bfd,
   19421 				 (bfd_vma) insn, contents + target);
   19422 	      }
   19423 	      break;
   19424 
   19425 	    case STM32L4XX_ERRATUM_VENEER:
   19426 	      {
   19427 		bfd_byte * veneer;
   19428 		bfd_byte * veneer_r;
   19429 		unsigned int insn;
   19430 
   19431 		veneer = contents + target;
   19432 		veneer_r = veneer
   19433 		  + stm32l4xx_errnode->u.b.veneer->vma
   19434 		  - stm32l4xx_errnode->vma - 4;
   19435 
   19436 		if ((signed) (veneer_r - veneer -
   19437 			      STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
   19438 			      STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
   19439 			      STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
   19440 			      STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
   19441 		    || (signed) (veneer_r - veneer) >= (1 << 24))
   19442 		  {
   19443 		    _bfd_error_handler (_("%pB: error: cannot create STM32L4XX "
   19444 					  "veneer"), output_bfd);
   19445 		     continue;
   19446 		  }
   19447 
   19448 		/* Original instruction.  */
   19449 		insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
   19450 
   19451 		stm32l4xx_create_replacing_stub
   19452 		  (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
   19453 	      }
   19454 	      break;
   19455 
   19456 	    default:
   19457 	      abort ();
   19458 	    }
   19459 	}
   19460     }
   19461 
   19462   if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
   19463     {
   19464       arm_unwind_table_edit *edit_node
   19465 	= arm_data->u.exidx.unwind_edit_list;
   19466       /* Now, sec->size is the size of the section we will write.  The original
   19467 	 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
   19468 	 markers) was sec->rawsize.  (This isn't the case if we perform no
   19469 	 edits, then rawsize will be zero and we should use size).  */
   19470       bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
   19471       unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
   19472       unsigned int in_index, out_index;
   19473       bfd_vma add_to_offsets = 0;
   19474 
   19475       if (edited_contents == NULL)
   19476 	return false;
   19477       for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
   19478 	{
   19479 	  if (edit_node)
   19480 	    {
   19481 	      unsigned int edit_index = edit_node->index;
   19482 
   19483 	      if (in_index < edit_index && in_index * 8 < input_size)
   19484 		{
   19485 		  copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
   19486 				    contents + in_index * 8, add_to_offsets);
   19487 		  out_index++;
   19488 		  in_index++;
   19489 		}
   19490 	      else if (in_index == edit_index
   19491 		       || (in_index * 8 >= input_size
   19492 			   && edit_index == UINT_MAX))
   19493 		{
   19494 		  switch (edit_node->type)
   19495 		    {
   19496 		    case DELETE_EXIDX_ENTRY:
   19497 		      in_index++;
   19498 		      add_to_offsets += 8;
   19499 		      break;
   19500 
   19501 		    case INSERT_EXIDX_CANTUNWIND_AT_END:
   19502 		      {
   19503 			asection *text_sec = edit_node->linked_section;
   19504 			bfd_vma text_offset = text_sec->output_section->vma
   19505 					      + text_sec->output_offset
   19506 					      + text_sec->size;
   19507 			bfd_vma exidx_offset = offset + out_index * 8;
   19508 			unsigned long prel31_offset;
   19509 
   19510 			/* Note: this is meant to be equivalent to an
   19511 			   R_ARM_PREL31 relocation.  These synthetic
   19512 			   EXIDX_CANTUNWIND markers are not relocated by the
   19513 			   usual BFD method.  */
   19514 			prel31_offset = (text_offset - exidx_offset)
   19515 					& 0x7ffffffful;
   19516 			if (bfd_link_relocatable (link_info))
   19517 			  {
   19518 			    /* Here relocation for new EXIDX_CANTUNWIND is
   19519 			       created, so there is no need to
   19520 			       adjust offset by hand.  */
   19521 			    prel31_offset = text_sec->output_offset
   19522 					    + text_sec->size;
   19523 			  }
   19524 
   19525 			/* First address we can't unwind.  */
   19526 			bfd_put_32 (output_bfd, prel31_offset,
   19527 				    &edited_contents[out_index * 8]);
   19528 
   19529 			/* Code for EXIDX_CANTUNWIND.  */
   19530 			bfd_put_32 (output_bfd, 0x1,
   19531 				    &edited_contents[out_index * 8 + 4]);
   19532 
   19533 			out_index++;
   19534 			add_to_offsets -= 8;
   19535 		      }
   19536 		      break;
   19537 		    }
   19538 
   19539 		  edit_node = edit_node->next;
   19540 		}
   19541 	    }
   19542 	  else
   19543 	    {
   19544 	      /* No more edits, copy remaining entries verbatim.  */
   19545 	      copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
   19546 				contents + in_index * 8, add_to_offsets);
   19547 	      out_index++;
   19548 	      in_index++;
   19549 	    }
   19550 	}
   19551 
   19552       if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
   19553 	bfd_set_section_contents (output_bfd, sec->output_section,
   19554 				  edited_contents,
   19555 				  (file_ptr) sec->output_offset, sec->size);
   19556 
   19557       return true;
   19558     }
   19559 
   19560   /* Fix code to point to Cortex-A8 erratum stubs.  */
   19561   if (globals->fix_cortex_a8)
   19562     {
   19563       struct a8_branch_to_stub_data data;
   19564 
   19565       data.writing_section = sec;
   19566       data.contents = contents;
   19567 
   19568       bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
   19569 			 & data);
   19570     }
   19571 
   19572   if (mapcount == 0)
   19573     return false;
   19574 
   19575   if (globals->byteswap_code)
   19576     {
   19577       qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
   19578 
   19579       ptr = map[0].vma;
   19580       for (i = 0; i < mapcount; i++)
   19581 	{
   19582 	  if (i == mapcount - 1)
   19583 	    end = sec->size;
   19584 	  else
   19585 	    end = map[i + 1].vma;
   19586 
   19587 	  switch (map[i].type)
   19588 	    {
   19589 	    case 'a':
   19590 	      /* Byte swap code words.  */
   19591 	      while (ptr + 3 < end)
   19592 		{
   19593 		  tmp = contents[ptr];
   19594 		  contents[ptr] = contents[ptr + 3];
   19595 		  contents[ptr + 3] = tmp;
   19596 		  tmp = contents[ptr + 1];
   19597 		  contents[ptr + 1] = contents[ptr + 2];
   19598 		  contents[ptr + 2] = tmp;
   19599 		  ptr += 4;
   19600 		}
   19601 	      break;
   19602 
   19603 	    case 't':
   19604 	      /* Byte swap code halfwords.  */
   19605 	      while (ptr + 1 < end)
   19606 		{
   19607 		  tmp = contents[ptr];
   19608 		  contents[ptr] = contents[ptr + 1];
   19609 		  contents[ptr + 1] = tmp;
   19610 		  ptr += 2;
   19611 		}
   19612 	      break;
   19613 
   19614 	    case 'd':
   19615 	      /* Leave data alone.  */
   19616 	      break;
   19617 	    }
   19618 	  ptr = end;
   19619 	}
   19620     }
   19621 
   19622   free (map);
   19623   arm_data->mapcount = -1;
   19624   arm_data->mapsize = 0;
   19625   arm_data->map = NULL;
   19626 
   19627   return false;
   19628 }
   19629 
   19630 /* Mangle thumb function symbols as we read them in.  */
   19631 
   19632 static bool
   19633 elf32_arm_swap_symbol_in (bfd * abfd,
   19634 			  const void *psrc,
   19635 			  const void *pshn,
   19636 			  Elf_Internal_Sym *dst)
   19637 {
   19638   if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
   19639     return false;
   19640   dst->st_target_internal = ST_BRANCH_TO_ARM;
   19641 
   19642   /* New EABI objects mark thumb function symbols by setting the low bit of
   19643      the address.  */
   19644   if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
   19645       || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
   19646     {
   19647       if (dst->st_value & 1)
   19648 	{
   19649 	  dst->st_value &= ~(bfd_vma) 1;
   19650 	  ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
   19651 				   ST_BRANCH_TO_THUMB);
   19652 	}
   19653       else
   19654 	ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
   19655     }
   19656   else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
   19657     {
   19658       dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
   19659       ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
   19660     }
   19661   else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
   19662     ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
   19663   else
   19664     ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
   19665 
   19666   return true;
   19667 }
   19668 
   19669 
   19670 /* Mangle thumb function symbols as we write them out.  */
   19671 
   19672 static void
   19673 elf32_arm_swap_symbol_out (bfd *abfd,
   19674 			   const Elf_Internal_Sym *src,
   19675 			   void *cdst,
   19676 			   void *shndx)
   19677 {
   19678   Elf_Internal_Sym newsym;
   19679 
   19680   /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
   19681      of the address set, as per the new EABI.  We do this unconditionally
   19682      because objcopy does not set the elf header flags until after
   19683      it writes out the symbol table.  */
   19684   if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
   19685     {
   19686       newsym = *src;
   19687       if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
   19688 	newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
   19689       if (newsym.st_shndx != SHN_UNDEF)
   19690 	{
   19691 	  /* Do this only for defined symbols. At link type, the static
   19692 	     linker will simulate the work of dynamic linker of resolving
   19693 	     symbols and will carry over the thumbness of found symbols to
   19694 	     the output symbol table. It's not clear how it happens, but
   19695 	     the thumbness of undefined symbols can well be different at
   19696 	     runtime, and writing '1' for them will be confusing for users
   19697 	     and possibly for dynamic linker itself.
   19698 	  */
   19699 	  newsym.st_value |= 1;
   19700 	}
   19701 
   19702       src = &newsym;
   19703     }
   19704   bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
   19705 }
   19706 
   19707 /* Add the PT_ARM_EXIDX program header.  */
   19708 
   19709 static bool
   19710 elf32_arm_modify_segment_map (bfd *abfd,
   19711 			      struct bfd_link_info *info ATTRIBUTE_UNUSED)
   19712 {
   19713   struct elf_segment_map *m;
   19714   asection *sec;
   19715 
   19716   sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
   19717   if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
   19718     {
   19719       /* If there is already a PT_ARM_EXIDX header, then we do not
   19720 	 want to add another one.  This situation arises when running
   19721 	 "strip"; the input binary already has the header.  */
   19722       m = elf_seg_map (abfd);
   19723       while (m && m->p_type != PT_ARM_EXIDX)
   19724 	m = m->next;
   19725       if (!m)
   19726 	{
   19727 	  m = (struct elf_segment_map *)
   19728 	      bfd_zalloc (abfd, sizeof (struct elf_segment_map));
   19729 	  if (m == NULL)
   19730 	    return false;
   19731 	  m->p_type = PT_ARM_EXIDX;
   19732 	  m->count = 1;
   19733 	  m->sections[0] = sec;
   19734 
   19735 	  m->next = elf_seg_map (abfd);
   19736 	  elf_seg_map (abfd) = m;
   19737 	}
   19738     }
   19739 
   19740   return true;
   19741 }
   19742 
   19743 /* We may add a PT_ARM_EXIDX program header.  */
   19744 
   19745 static int
   19746 elf32_arm_additional_program_headers (bfd *abfd,
   19747 				      struct bfd_link_info *info ATTRIBUTE_UNUSED)
   19748 {
   19749   asection *sec;
   19750 
   19751   sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
   19752   if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
   19753     return 1;
   19754   else
   19755     return 0;
   19756 }
   19757 
   19758 /* Hook called by the linker routine which adds symbols from an object
   19759    file.  */
   19760 
   19761 static bool
   19762 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
   19763 			   Elf_Internal_Sym *sym, const char **namep,
   19764 			   flagword *flagsp, asection **secp, bfd_vma *valp)
   19765 {
   19766   if (elf32_arm_hash_table (info) == NULL)
   19767     return false;
   19768 
   19769   if (elf32_arm_hash_table (info)->root.target_os == is_vxworks
   19770       && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
   19771 				       flagsp, secp, valp))
   19772     return false;
   19773 
   19774   return true;
   19775 }
   19776 
   19777 /* We use this to override swap_symbol_in and swap_symbol_out.  */
   19778 static const struct elf_size_info elf32_arm_size_info =
   19779 {
   19780   sizeof (Elf32_External_Ehdr),
   19781   sizeof (Elf32_External_Phdr),
   19782   sizeof (Elf32_External_Shdr),
   19783   sizeof (Elf32_External_Rel),
   19784   sizeof (Elf32_External_Rela),
   19785   sizeof (Elf32_External_Sym),
   19786   sizeof (Elf32_External_Dyn),
   19787   sizeof (Elf_External_Note),
   19788   4,
   19789   1,
   19790   32, 2,
   19791   ELFCLASS32, EV_CURRENT,
   19792   bfd_elf32_write_out_phdrs,
   19793   bfd_elf32_write_shdrs_and_ehdr,
   19794   bfd_elf32_checksum_contents,
   19795   bfd_elf32_write_relocs,
   19796   elf32_arm_swap_symbol_in,
   19797   elf32_arm_swap_symbol_out,
   19798   bfd_elf32_slurp_reloc_table,
   19799   bfd_elf32_slurp_symbol_table,
   19800   bfd_elf32_swap_dyn_in,
   19801   bfd_elf32_swap_dyn_out,
   19802   bfd_elf32_swap_reloc_in,
   19803   bfd_elf32_swap_reloc_out,
   19804   bfd_elf32_swap_reloca_in,
   19805   bfd_elf32_swap_reloca_out
   19806 };
   19807 
   19808 static bfd_vma
   19809 read_code32 (const bfd *abfd, const bfd_byte *addr)
   19810 {
   19811   /* V7 BE8 code is always little endian.  */
   19812   if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
   19813     return bfd_getl32 (addr);
   19814 
   19815   return bfd_get_32 (abfd, addr);
   19816 }
   19817 
   19818 static bfd_vma
   19819 read_code16 (const bfd *abfd, const bfd_byte *addr)
   19820 {
   19821   /* V7 BE8 code is always little endian.  */
   19822   if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
   19823     return bfd_getl16 (addr);
   19824 
   19825   return bfd_get_16 (abfd, addr);
   19826 }
   19827 
   19828 /* Return size of plt0 entry starting at ADDR
   19829    or (bfd_vma) -1 if size can not be determined.  */
   19830 
   19831 static bfd_vma
   19832 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr,
   19833 		     bfd_size_type data_size)
   19834 {
   19835   bfd_vma first_word;
   19836   bfd_vma plt0_size;
   19837 
   19838   if (data_size < 4)
   19839     return (bfd_vma) -1;
   19840 
   19841   first_word = read_code32 (abfd, addr);
   19842 
   19843   if (first_word == elf32_arm_plt0_entry[0])
   19844     plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
   19845   else if (first_word == elf32_thumb2_plt0_entry[0])
   19846     plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
   19847   else
   19848     /* We don't yet handle this PLT format.  */
   19849     return (bfd_vma) -1;
   19850 
   19851   return plt0_size;
   19852 }
   19853 
   19854 /* Return size of plt entry starting at offset OFFSET
   19855    of plt section located at address START
   19856    or (bfd_vma) -1 if size can not be determined.  */
   19857 
   19858 static bfd_vma
   19859 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset,
   19860 		    bfd_size_type data_size)
   19861 {
   19862   bfd_vma first_insn;
   19863   bfd_vma plt_size = 0;
   19864 
   19865   /* PLT entry size if fixed on Thumb-only platforms.  */
   19866   if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
   19867     return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
   19868 
   19869   /* Respect Thumb stub if necessary.  */
   19870   if (offset + 2 > data_size)
   19871     return (bfd_vma) -1;
   19872   if (read_code16 (abfd, start + offset) == elf32_arm_plt_thumb_stub[0])
   19873     {
   19874       plt_size += 2 * ARRAY_SIZE (elf32_arm_plt_thumb_stub);
   19875     }
   19876 
   19877   /* Strip immediate from first add.  */
   19878   if (offset + plt_size + 4 > data_size)
   19879     return (bfd_vma) -1;
   19880   first_insn = read_code32 (abfd, start + offset + plt_size) & 0xffffff00;
   19881 
   19882 #ifdef FOUR_WORD_PLT
   19883   if (first_insn == elf32_arm_plt_entry[0])
   19884     plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
   19885 #else
   19886   if (first_insn == elf32_arm_plt_entry_long[0])
   19887     plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
   19888   else if (first_insn == elf32_arm_plt_entry_short[0])
   19889     plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
   19890 #endif
   19891   else
   19892     /* We don't yet handle this PLT format.  */
   19893     return (bfd_vma) -1;
   19894 
   19895   return plt_size;
   19896 }
   19897 
   19898 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab.  */
   19899 
   19900 static long
   19901 elf32_arm_get_synthetic_symtab (bfd *abfd,
   19902 			       long symcount ATTRIBUTE_UNUSED,
   19903 			       asymbol **syms ATTRIBUTE_UNUSED,
   19904 			       long dynsymcount,
   19905 			       asymbol **dynsyms,
   19906 			       asymbol **ret)
   19907 {
   19908   asection *relplt;
   19909   asymbol *s;
   19910   arelent *p;
   19911   long count, i, n;
   19912   size_t size;
   19913   Elf_Internal_Shdr *hdr;
   19914   char *names;
   19915   asection *plt;
   19916   bfd_vma offset;
   19917   bfd_byte *data;
   19918 
   19919   *ret = NULL;
   19920 
   19921   if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
   19922     return 0;
   19923 
   19924   if (dynsymcount <= 0)
   19925     return 0;
   19926 
   19927   relplt = bfd_get_section_by_name (abfd, ".rel.plt");
   19928   if (relplt == NULL)
   19929     return 0;
   19930 
   19931   hdr = &elf_section_data (relplt)->this_hdr;
   19932   if (hdr->sh_link != elf_dynsymtab (abfd)
   19933       || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
   19934     return 0;
   19935 
   19936   plt = bfd_get_section_by_name (abfd, ".plt");
   19937   if (plt == NULL)
   19938     return 0;
   19939 
   19940   if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, true))
   19941     return -1;
   19942 
   19943   data = NULL;
   19944   if (!bfd_get_full_section_contents (abfd, plt, &data))
   19945     return -1;
   19946 
   19947   count = NUM_SHDR_ENTRIES (hdr);
   19948   size = count * sizeof (asymbol);
   19949   p = relplt->relocation;
   19950   for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
   19951     {
   19952       size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
   19953       if (p->addend != 0)
   19954 	size += sizeof ("+0x") - 1 + 8;
   19955     }
   19956 
   19957   offset = elf32_arm_plt0_size (abfd, data, plt->size);
   19958   if (offset == (bfd_vma) -1
   19959       || (s = *ret = (asymbol *) bfd_malloc (size)) == NULL)
   19960     {
   19961       free (data);
   19962       return -1;
   19963     }
   19964 
   19965   names = (char *) (s + count);
   19966   p = relplt->relocation;
   19967   n = 0;
   19968   for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
   19969     {
   19970       size_t len;
   19971 
   19972       bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset, plt->size);
   19973       if (plt_size == (bfd_vma) -1)
   19974 	break;
   19975 
   19976       *s = **p->sym_ptr_ptr;
   19977       /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set.  Since
   19978 	 we are defining a symbol, ensure one of them is set.  */
   19979       if ((s->flags & BSF_LOCAL) == 0)
   19980 	s->flags |= BSF_GLOBAL;
   19981       s->flags |= BSF_SYNTHETIC;
   19982       s->section = plt;
   19983       s->value = offset;
   19984       s->name = names;
   19985       s->udata.p = NULL;
   19986       len = strlen ((*p->sym_ptr_ptr)->name);
   19987       memcpy (names, (*p->sym_ptr_ptr)->name, len);
   19988       names += len;
   19989       if (p->addend != 0)
   19990 	{
   19991 	  char buf[30], *a;
   19992 
   19993 	  memcpy (names, "+0x", sizeof ("+0x") - 1);
   19994 	  names += sizeof ("+0x") - 1;
   19995 	  bfd_sprintf_vma (abfd, buf, p->addend);
   19996 	  for (a = buf; *a == '0'; ++a)
   19997 	    ;
   19998 	  len = strlen (a);
   19999 	  memcpy (names, a, len);
   20000 	  names += len;
   20001 	}
   20002       memcpy (names, "@plt", sizeof ("@plt"));
   20003       names += sizeof ("@plt");
   20004       ++s, ++n;
   20005       offset += plt_size;
   20006     }
   20007 
   20008   free (data);
   20009   return n;
   20010 }
   20011 
   20012 static bool
   20013 elf32_arm_section_flags (const Elf_Internal_Shdr *hdr)
   20014 {
   20015   if (hdr->sh_flags & SHF_ARM_PURECODE)
   20016     hdr->bfd_section->flags |= SEC_ELF_PURECODE;
   20017   return true;
   20018 }
   20019 
   20020 static flagword
   20021 elf32_arm_lookup_section_flags (char *flag_name)
   20022 {
   20023   if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
   20024     return SHF_ARM_PURECODE;
   20025 
   20026   return SEC_NO_FLAGS;
   20027 }
   20028 
   20029 static unsigned int
   20030 elf32_arm_count_additional_relocs (asection *sec)
   20031 {
   20032   struct _arm_elf_section_data *arm_data;
   20033   arm_data = get_arm_elf_section_data (sec);
   20034 
   20035   return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
   20036 }
   20037 
   20038 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
   20039    has a type >= SHT_LOOS.  Returns TRUE if these fields were initialised
   20040    FALSE otherwise.  ISECTION is the best guess matching section from the
   20041    input bfd IBFD, but it might be NULL.  */
   20042 
   20043 static bool
   20044 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
   20045 				       bfd *obfd ATTRIBUTE_UNUSED,
   20046 				       const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
   20047 				       Elf_Internal_Shdr *osection)
   20048 {
   20049   switch (osection->sh_type)
   20050     {
   20051     case SHT_ARM_EXIDX:
   20052       {
   20053 	Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
   20054 	Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
   20055 	unsigned i = 0;
   20056 
   20057 	osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
   20058 	osection->sh_info = 0;
   20059 
   20060 	/* The sh_link field must be set to the text section associated with
   20061 	   this index section.  Unfortunately the ARM EHABI does not specify
   20062 	   exactly how to determine this association.  Our caller does try
   20063 	   to match up OSECTION with its corresponding input section however
   20064 	   so that is a good first guess.  */
   20065 	if (isection != NULL
   20066 	    && osection->bfd_section != NULL
   20067 	    && isection->bfd_section != NULL
   20068 	    && isection->bfd_section->output_section != NULL
   20069 	    && isection->bfd_section->output_section == osection->bfd_section
   20070 	    && iheaders != NULL
   20071 	    && isection->sh_link > 0
   20072 	    && isection->sh_link < elf_numsections (ibfd)
   20073 	    && iheaders[isection->sh_link]->bfd_section != NULL
   20074 	    && iheaders[isection->sh_link]->bfd_section->output_section != NULL
   20075 	    )
   20076 	  {
   20077 	    for (i = elf_numsections (obfd); i-- > 0;)
   20078 	      if (oheaders[i]->bfd_section
   20079 		  == iheaders[isection->sh_link]->bfd_section->output_section)
   20080 		break;
   20081 	  }
   20082 
   20083 	if (i == 0)
   20084 	  {
   20085 	    /* Failing that we have to find a matching section ourselves.  If
   20086 	       we had the output section name available we could compare that
   20087 	       with input section names.  Unfortunately we don't.  So instead
   20088 	       we use a simple heuristic and look for the nearest executable
   20089 	       section before this one.  */
   20090 	    for (i = elf_numsections (obfd); i-- > 0;)
   20091 	      if (oheaders[i] == osection)
   20092 		break;
   20093 	    if (i == 0)
   20094 	      break;
   20095 
   20096 	    while (i-- > 0)
   20097 	      if (oheaders[i]->sh_type == SHT_PROGBITS
   20098 		  && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
   20099 		  == (SHF_ALLOC | SHF_EXECINSTR))
   20100 		break;
   20101 	  }
   20102 
   20103 	if (i)
   20104 	  {
   20105 	    osection->sh_link = i;
   20106 	    /* If the text section was part of a group
   20107 	       then the index section should be too.  */
   20108 	    if (oheaders[i]->sh_flags & SHF_GROUP)
   20109 	      osection->sh_flags |= SHF_GROUP;
   20110 	    return true;
   20111 	  }
   20112       }
   20113       break;
   20114 
   20115     case SHT_ARM_PREEMPTMAP:
   20116       osection->sh_flags = SHF_ALLOC;
   20117       break;
   20118 
   20119     case SHT_ARM_ATTRIBUTES:
   20120     case SHT_ARM_DEBUGOVERLAY:
   20121     case SHT_ARM_OVERLAYSECTION:
   20122     default:
   20123       break;
   20124     }
   20125 
   20126   return false;
   20127 }
   20128 
   20129 /* Returns TRUE if NAME is an ARM mapping symbol.
   20130    Traditionally the symbols $a, $d and $t have been used.
   20131    The ARM ELF standard also defines $x (for A64 code).  It also allows a
   20132    period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
   20133    Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
   20134    not support them here.  $t.x indicates the start of ThumbEE instructions.  */
   20135 
   20136 static bool
   20137 is_arm_mapping_symbol (const char * name)
   20138 {
   20139   return name != NULL /* Paranoia.  */
   20140     && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
   20141 			 the mapping symbols could have acquired a prefix.
   20142 			 We do not support this here, since such symbols no
   20143 			 longer conform to the ARM ELF ABI.  */
   20144     && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
   20145     && (name[2] == 0 || name[2] == '.');
   20146   /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
   20147      any characters that follow the period are legal characters for the body
   20148      of a symbol's name.  For now we just assume that this is the case.  */
   20149 }
   20150 
   20151 /* Make sure that mapping symbols in object files are not removed via the
   20152    "strip --strip-unneeded" tool.  These symbols are needed in order to
   20153    correctly generate interworking veneers, and for byte swapping code
   20154    regions.  Once an object file has been linked, it is safe to remove the
   20155    symbols as they will no longer be needed.  */
   20156 
   20157 static void
   20158 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
   20159 {
   20160   if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
   20161       && sym->section != bfd_abs_section_ptr
   20162       && is_arm_mapping_symbol (sym->name))
   20163     sym->flags |= BSF_KEEP;
   20164 }
   20165 
   20166 #undef  elf_backend_copy_special_section_fields
   20167 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
   20168 
   20169 #define ELF_ARCH			bfd_arch_arm
   20170 #define ELF_TARGET_ID			ARM_ELF_DATA
   20171 #define ELF_MACHINE_CODE		EM_ARM
   20172 #define ELF_MAXPAGESIZE			0x1000
   20173 #define ELF_COMMONPAGESIZE		0x1000
   20174 
   20175 #define bfd_elf32_mkobject			elf32_arm_mkobject
   20176 
   20177 #define bfd_elf32_bfd_copy_private_bfd_data	elf32_arm_copy_private_bfd_data
   20178 #define bfd_elf32_bfd_merge_private_bfd_data	elf32_arm_merge_private_bfd_data
   20179 #define bfd_elf32_bfd_set_private_flags		elf32_arm_set_private_flags
   20180 #define bfd_elf32_bfd_print_private_bfd_data	elf32_arm_print_private_bfd_data
   20181 #define bfd_elf32_bfd_link_hash_table_create	elf32_arm_link_hash_table_create
   20182 #define bfd_elf32_bfd_reloc_type_lookup		elf32_arm_reloc_type_lookup
   20183 #define bfd_elf32_bfd_reloc_name_lookup		elf32_arm_reloc_name_lookup
   20184 #define bfd_elf32_find_inliner_info		elf32_arm_find_inliner_info
   20185 #define bfd_elf32_new_section_hook		elf32_arm_new_section_hook
   20186 #define bfd_elf32_bfd_is_target_special_symbol	elf32_arm_is_target_special_symbol
   20187 #define bfd_elf32_bfd_final_link		elf32_arm_final_link
   20188 #define bfd_elf32_get_synthetic_symtab	elf32_arm_get_synthetic_symtab
   20189 
   20190 #define elf_backend_get_symbol_type		elf32_arm_get_symbol_type
   20191 #define elf_backend_maybe_function_sym		elf32_arm_maybe_function_sym
   20192 #define elf_backend_gc_mark_hook		elf32_arm_gc_mark_hook
   20193 #define elf_backend_gc_mark_extra_sections	elf32_arm_gc_mark_extra_sections
   20194 #define elf_backend_check_relocs		elf32_arm_check_relocs
   20195 #define elf_backend_update_relocs		elf32_arm_update_relocs
   20196 #define elf_backend_relocate_section		elf32_arm_relocate_section
   20197 #define elf_backend_write_section		elf32_arm_write_section
   20198 #define elf_backend_adjust_dynamic_symbol	elf32_arm_adjust_dynamic_symbol
   20199 #define elf_backend_create_dynamic_sections	elf32_arm_create_dynamic_sections
   20200 #define elf_backend_finish_dynamic_symbol	elf32_arm_finish_dynamic_symbol
   20201 #define elf_backend_finish_dynamic_sections	elf32_arm_finish_dynamic_sections
   20202 #define elf_backend_late_size_sections		elf32_arm_late_size_sections
   20203 #define elf_backend_early_size_sections		elf32_arm_early_size_sections
   20204 #define elf_backend_init_index_section		_bfd_elf_init_2_index_sections
   20205 #define elf_backend_init_file_header		elf32_arm_init_file_header
   20206 #define elf_backend_reloc_type_class		elf32_arm_reloc_type_class
   20207 #define elf_backend_object_p			elf32_arm_object_p
   20208 #define elf_backend_fake_sections		elf32_arm_fake_sections
   20209 #define elf_backend_section_from_shdr		elf32_arm_section_from_shdr
   20210 #define elf_backend_final_write_processing	elf32_arm_final_write_processing
   20211 #define elf_backend_copy_indirect_symbol	elf32_arm_copy_indirect_symbol
   20212 #define elf_backend_size_info			elf32_arm_size_info
   20213 #define elf_backend_modify_segment_map		elf32_arm_modify_segment_map
   20214 #define elf_backend_additional_program_headers	elf32_arm_additional_program_headers
   20215 #define elf_backend_output_arch_local_syms	elf32_arm_output_arch_local_syms
   20216 #define elf_backend_filter_implib_symbols	elf32_arm_filter_implib_symbols
   20217 #define elf_backend_begin_write_processing	elf32_arm_begin_write_processing
   20218 #define elf_backend_add_symbol_hook		elf32_arm_add_symbol_hook
   20219 #define elf_backend_count_additional_relocs	elf32_arm_count_additional_relocs
   20220 #define elf_backend_symbol_processing		elf32_arm_backend_symbol_processing
   20221 
   20222 #define elf_backend_can_refcount       1
   20223 #define elf_backend_can_gc_sections    1
   20224 #define elf_backend_plt_readonly       1
   20225 #define elf_backend_want_got_plt       1
   20226 #define elf_backend_want_plt_sym       0
   20227 #define elf_backend_want_dynrelro      1
   20228 #define elf_backend_may_use_rel_p      1
   20229 #define elf_backend_may_use_rela_p     0
   20230 #define elf_backend_default_use_rela_p 0
   20231 #define elf_backend_dtrel_excludes_plt 1
   20232 
   20233 #define elf_backend_got_header_size	12
   20234 #define elf_backend_extern_protected_data 0
   20235 
   20236 #undef	elf_backend_obj_attrs_vendor
   20237 #define elf_backend_obj_attrs_vendor		"aeabi"
   20238 #undef	elf_backend_obj_attrs_section
   20239 #define elf_backend_obj_attrs_section		".ARM.attributes"
   20240 #undef	elf_backend_obj_attrs_arg_type
   20241 #define elf_backend_obj_attrs_arg_type		elf32_arm_obj_attrs_arg_type
   20242 #undef	elf_backend_obj_attrs_section_type
   20243 #define elf_backend_obj_attrs_section_type	SHT_ARM_ATTRIBUTES
   20244 #define elf_backend_obj_attrs_order		elf32_arm_obj_attrs_order
   20245 #define elf_backend_obj_attrs_handle_unknown	elf32_arm_obj_attrs_handle_unknown
   20246 
   20247 #undef	elf_backend_section_flags
   20248 #define elf_backend_section_flags		elf32_arm_section_flags
   20249 #undef	elf_backend_lookup_section_flags_hook
   20250 #define elf_backend_lookup_section_flags_hook	elf32_arm_lookup_section_flags
   20251 
   20252 #define elf_backend_linux_prpsinfo32_ugid16	true
   20253 
   20254 #include "elf32-target.h"
   20255 
   20256 /* Reset to defaults.  */
   20257 #undef	elf_backend_plt_alignment
   20258 #undef	elf_backend_modify_segment_map
   20259 #define elf_backend_modify_segment_map		elf32_arm_modify_segment_map
   20260 #undef	elf_backend_modify_headers
   20261 #undef  elf_backend_final_write_processing
   20262 #define elf_backend_final_write_processing	elf32_arm_final_write_processing
   20263 #undef	ELF_MINPAGESIZE
   20264 #undef	ELF_COMMONPAGESIZE
   20265 #define ELF_COMMONPAGESIZE		0x1000
   20266 
   20267 
   20268 /* FDPIC Targets.  */
   20269 
   20270 #undef  TARGET_LITTLE_SYM
   20271 #define TARGET_LITTLE_SYM		arm_elf32_fdpic_le_vec
   20272 #undef  TARGET_LITTLE_NAME
   20273 #define TARGET_LITTLE_NAME		"elf32-littlearm-fdpic"
   20274 #undef  TARGET_BIG_SYM
   20275 #define TARGET_BIG_SYM			arm_elf32_fdpic_be_vec
   20276 #undef  TARGET_BIG_NAME
   20277 #define TARGET_BIG_NAME			"elf32-bigarm-fdpic"
   20278 #undef elf_match_priority
   20279 #define elf_match_priority		128
   20280 #undef ELF_OSABI
   20281 #define ELF_OSABI		ELFOSABI_ARM_FDPIC
   20282 #undef ELF_OSABI_EXACT
   20283 #define ELF_OSABI_EXACT		1
   20284 
   20285 /* Like elf32_arm_link_hash_table_create -- but overrides
   20286    appropriately for FDPIC.  */
   20287 
   20288 static struct bfd_link_hash_table *
   20289 elf32_arm_fdpic_link_hash_table_create (bfd *abfd)
   20290 {
   20291   struct bfd_link_hash_table *ret;
   20292 
   20293   ret = elf32_arm_link_hash_table_create (abfd);
   20294   if (ret)
   20295     {
   20296       struct elf32_arm_link_hash_table *htab = (struct elf32_arm_link_hash_table *) ret;
   20297 
   20298       htab->fdpic_p = 1;
   20299     }
   20300   return ret;
   20301 }
   20302 
   20303 /* We need dynamic symbols for every section, since segments can
   20304    relocate independently.  */
   20305 static bool
   20306 elf32_arm_fdpic_omit_section_dynsym (bfd *output_bfd ATTRIBUTE_UNUSED,
   20307 				    struct bfd_link_info *info
   20308 				    ATTRIBUTE_UNUSED,
   20309 				    asection *p ATTRIBUTE_UNUSED)
   20310 {
   20311   switch (elf_section_data (p)->this_hdr.sh_type)
   20312     {
   20313     case SHT_PROGBITS:
   20314     case SHT_NOBITS:
   20315       /* If sh_type is yet undecided, assume it could be
   20316 	 SHT_PROGBITS/SHT_NOBITS.  */
   20317     case SHT_NULL:
   20318       return false;
   20319 
   20320       /* There shouldn't be section relative relocations
   20321 	 against any other section.  */
   20322     default:
   20323       return true;
   20324     }
   20325 }
   20326 
   20327 #undef  elf32_bed
   20328 #define elf32_bed				elf32_arm_fdpic_bed
   20329 
   20330 #undef  bfd_elf32_bfd_link_hash_table_create
   20331 #define bfd_elf32_bfd_link_hash_table_create	elf32_arm_fdpic_link_hash_table_create
   20332 
   20333 #undef elf_backend_omit_section_dynsym
   20334 #define elf_backend_omit_section_dynsym		elf32_arm_fdpic_omit_section_dynsym
   20335 
   20336 #undef ELF_TARGET_OS
   20337 
   20338 #include "elf32-target.h"
   20339 
   20340 #undef elf_match_priority
   20341 #undef ELF_OSABI
   20342 #undef ELF_OSABI_EXACT
   20343 #undef elf_backend_omit_section_dynsym
   20344 
   20345 /* VxWorks Targets.  */
   20346 
   20347 #undef	TARGET_LITTLE_SYM
   20348 #define TARGET_LITTLE_SYM		arm_elf32_vxworks_le_vec
   20349 #undef	TARGET_LITTLE_NAME
   20350 #define TARGET_LITTLE_NAME		"elf32-littlearm-vxworks"
   20351 #undef	TARGET_BIG_SYM
   20352 #define TARGET_BIG_SYM			arm_elf32_vxworks_be_vec
   20353 #undef	TARGET_BIG_NAME
   20354 #define TARGET_BIG_NAME			"elf32-bigarm-vxworks"
   20355 
   20356 /* Like elf32_arm_link_hash_table_create -- but overrides
   20357    appropriately for VxWorks.  */
   20358 
   20359 static struct bfd_link_hash_table *
   20360 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
   20361 {
   20362   struct bfd_link_hash_table *ret;
   20363 
   20364   ret = elf32_arm_link_hash_table_create (abfd);
   20365   if (ret)
   20366     {
   20367       struct elf32_arm_link_hash_table *htab
   20368 	= (struct elf32_arm_link_hash_table *) ret;
   20369       htab->use_rel = 0;
   20370     }
   20371   return ret;
   20372 }
   20373 
   20374 static bool
   20375 elf32_arm_vxworks_final_write_processing (bfd *abfd)
   20376 {
   20377   arm_final_write_processing (abfd);
   20378   return elf_vxworks_final_write_processing (abfd);
   20379 }
   20380 
   20381 #undef  elf32_bed
   20382 #define elf32_bed elf32_arm_vxworks_bed
   20383 
   20384 #undef  bfd_elf32_bfd_link_hash_table_create
   20385 #define bfd_elf32_bfd_link_hash_table_create	elf32_arm_vxworks_link_hash_table_create
   20386 #undef  elf_backend_final_write_processing
   20387 #define elf_backend_final_write_processing	elf32_arm_vxworks_final_write_processing
   20388 #undef  elf_backend_emit_relocs
   20389 #define elf_backend_emit_relocs			elf_vxworks_emit_relocs
   20390 
   20391 #undef  elf_backend_may_use_rel_p
   20392 #define elf_backend_may_use_rel_p	0
   20393 #undef  elf_backend_may_use_rela_p
   20394 #define elf_backend_may_use_rela_p	1
   20395 #undef  elf_backend_default_use_rela_p
   20396 #define elf_backend_default_use_rela_p	1
   20397 #undef  elf_backend_want_plt_sym
   20398 #define elf_backend_want_plt_sym	1
   20399 #undef  ELF_MAXPAGESIZE
   20400 #define ELF_MAXPAGESIZE			0x1000
   20401 #undef ELF_TARGET_OS
   20402 #define ELF_TARGET_OS			is_vxworks
   20403 
   20404 #include "elf32-target.h"
   20405 
   20406 
   20407 /* Merge backend specific data from an object file to the output
   20408    object file when linking.  */
   20409 
   20410 static bool
   20411 elf32_arm_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
   20412 {
   20413   bfd *obfd = info->output_bfd;
   20414   flagword out_flags;
   20415   flagword in_flags;
   20416   bool flags_compatible = true;
   20417   asection *sec;
   20418 
   20419   /* Check if we have the same endianness.  */
   20420   if (! _bfd_generic_verify_endian_match (ibfd, info))
   20421     return false;
   20422 
   20423   if (! is_arm_elf (ibfd))
   20424     return true;
   20425 
   20426   if (!elf32_arm_merge_eabi_attributes (ibfd, info))
   20427     return false;
   20428 
   20429   /* The input BFD must have had its flags initialised.  */
   20430   /* The following seems bogus to me -- The flags are initialized in
   20431      the assembler but I don't think an elf_flags_init field is
   20432      written into the object.  */
   20433   /* BFD_ASSERT (elf_flags_init (ibfd)); */
   20434 
   20435   in_flags  = elf_elfheader (ibfd)->e_flags;
   20436   out_flags = elf_elfheader (obfd)->e_flags;
   20437 
   20438   /* In theory there is no reason why we couldn't handle this.  However
   20439      in practice it isn't even close to working and there is no real
   20440      reason to want it.  */
   20441   if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
   20442       && !(ibfd->flags & DYNAMIC)
   20443       && (in_flags & EF_ARM_BE8))
   20444     {
   20445       _bfd_error_handler (_("error: %pB is already in final BE8 format"),
   20446 			  ibfd);
   20447       return false;
   20448     }
   20449 
   20450   if (!elf_flags_init (obfd))
   20451     {
   20452       /* If the input has no flags set, then do not set the output flags.
   20453 	 This will allow future bfds to determine the desired output flags.
   20454 	 If no input bfds have any flags set, then neither will the output bfd.
   20455 
   20456 	 Note - we used to restrict this test to when the input architecture
   20457 	 variant was the default variant, but this does not allow for
   20458 	 linker scripts which override the default.  See PR 28910 for an
   20459 	 example.  */
   20460       if (in_flags == 0)
   20461 	return true;
   20462 
   20463       elf_flags_init (obfd) = true;
   20464       elf_elfheader (obfd)->e_flags = in_flags;
   20465 
   20466       if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
   20467 	  && bfd_get_arch_info (obfd)->the_default)
   20468 	return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
   20469 
   20470       return true;
   20471     }
   20472 
   20473   /* Determine what should happen if the input ARM architecture
   20474      does not match the output ARM architecture.  */
   20475   if (! bfd_arm_merge_machines (ibfd, obfd))
   20476     return false;
   20477 
   20478   /* Identical flags must be compatible.  */
   20479   if (in_flags == out_flags)
   20480     return true;
   20481 
   20482   /* Check to see if the input BFD actually contains any sections.  If
   20483      not, its flags may not have been initialised either, but it
   20484      cannot actually cause any incompatiblity.  Do not short-circuit
   20485      dynamic objects; their section list may be emptied by
   20486     elf_link_add_object_symbols.
   20487 
   20488     Also check to see if there are no code sections in the input.
   20489     In this case there is no need to check for code specific flags.
   20490     XXX - do we need to worry about floating-point format compatability
   20491     in data sections ?  */
   20492   if (!(ibfd->flags & DYNAMIC))
   20493     {
   20494       bool null_input_bfd = true;
   20495       bool only_data_sections = true;
   20496 
   20497       for (sec = ibfd->sections; sec != NULL; sec = sec->next)
   20498 	{
   20499 	  /* Ignore synthetic glue sections.  */
   20500 	  if (strcmp (sec->name, ".glue_7")
   20501 	      && strcmp (sec->name, ".glue_7t"))
   20502 	    {
   20503 	      if ((bfd_section_flags (sec)
   20504 		   & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
   20505 		  == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
   20506 		only_data_sections = false;
   20507 
   20508 	      null_input_bfd = false;
   20509 	      break;
   20510 	    }
   20511 	}
   20512 
   20513       if (null_input_bfd || only_data_sections)
   20514 	return true;
   20515     }
   20516 
   20517   /* Complain about various flag mismatches.  */
   20518   if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
   20519 				      EF_ARM_EABI_VERSION (out_flags)))
   20520     {
   20521       _bfd_error_handler
   20522 	(_("error: source object %pB has EABI version %d, but target %pB has EABI version %d"),
   20523 	 ibfd, (in_flags & EF_ARM_EABIMASK) >> 24,
   20524 	 obfd, (out_flags & EF_ARM_EABIMASK) >> 24);
   20525       return false;
   20526     }
   20527 
   20528   /* Not sure what needs to be checked for EABI versions >= 1.  */
   20529   /* VxWorks libraries do not use these flags.  */
   20530   if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
   20531       && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
   20532       && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
   20533     {
   20534       if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
   20535 	{
   20536 	  _bfd_error_handler
   20537 	    (_("error: %pB is compiled for APCS-%d, whereas target %pB uses APCS-%d"),
   20538 	     ibfd, in_flags & EF_ARM_APCS_26 ? 26 : 32,
   20539 	     obfd, out_flags & EF_ARM_APCS_26 ? 26 : 32);
   20540 	  flags_compatible = false;
   20541 	}
   20542 
   20543       if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
   20544 	{
   20545 	  if (in_flags & EF_ARM_APCS_FLOAT)
   20546 	    _bfd_error_handler
   20547 	      (_("error: %pB passes floats in float registers, whereas %pB passes them in integer registers"),
   20548 	       ibfd, obfd);
   20549 	  else
   20550 	    _bfd_error_handler
   20551 	      (_("error: %pB passes floats in integer registers, whereas %pB passes them in float registers"),
   20552 	       ibfd, obfd);
   20553 
   20554 	  flags_compatible = false;
   20555 	}
   20556 
   20557       if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
   20558 	{
   20559 	  if (in_flags & EF_ARM_VFP_FLOAT)
   20560 	    _bfd_error_handler
   20561 	      (_("error: %pB uses %s instructions, whereas %pB does not"),
   20562 	       ibfd, "VFP", obfd);
   20563 	  else
   20564 	    _bfd_error_handler
   20565 	      (_("error: %pB uses %s instructions, whereas %pB does not"),
   20566 	       ibfd, "FPA", obfd);
   20567 
   20568 	  flags_compatible = false;
   20569 	}
   20570 
   20571 #ifdef EF_ARM_SOFT_FLOAT
   20572       if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
   20573 	{
   20574 	  /* We can allow interworking between code that is VFP format
   20575 	     layout, and uses either soft float or integer regs for
   20576 	     passing floating point arguments and results.  We already
   20577 	     know that the APCS_FLOAT flags match; similarly for VFP
   20578 	     flags.  */
   20579 	  if ((in_flags & EF_ARM_APCS_FLOAT) != 0
   20580 	      || (in_flags & EF_ARM_VFP_FLOAT) == 0)
   20581 	    {
   20582 	      if (in_flags & EF_ARM_SOFT_FLOAT)
   20583 		_bfd_error_handler
   20584 		  (_("error: %pB uses software FP, whereas %pB uses hardware FP"),
   20585 		   ibfd, obfd);
   20586 	      else
   20587 		_bfd_error_handler
   20588 		  (_("error: %pB uses hardware FP, whereas %pB uses software FP"),
   20589 		   ibfd, obfd);
   20590 
   20591 	      flags_compatible = false;
   20592 	    }
   20593 	}
   20594 #endif
   20595 
   20596       /* Interworking mismatch is only a warning.  */
   20597       if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
   20598 	{
   20599 	  if (in_flags & EF_ARM_INTERWORK)
   20600 	    {
   20601 	      _bfd_error_handler
   20602 		(_("warning: %pB supports interworking, whereas %pB does not"),
   20603 		 ibfd, obfd);
   20604 	    }
   20605 	  else
   20606 	    {
   20607 	      _bfd_error_handler
   20608 		(_("warning: %pB does not support interworking, whereas %pB does"),
   20609 		 ibfd, obfd);
   20610 	    }
   20611 	}
   20612     }
   20613 
   20614   return flags_compatible;
   20615 }
   20616