m32c.cpu revision 1.1.1.2
1 ; Renesas M32C CPU description. -*- Scheme -*- 2 ; 3 ; Copyright 2005, 2006, 2007, 2009 Free Software Foundation, Inc. 4 ; 5 ; Contributed by Red Hat Inc; developed under contract from Renesas. 6 ; 7 ; This file is part of the GNU Binutils. 8 ; 9 ; This program is free software; you can redistribute it and/or modify 10 ; it under the terms of the GNU General Public License as published by 11 ; the Free Software Foundation; either version 3 of the License, or 12 ; (at your option) any later version. 13 ; 14 ; This program is distributed in the hope that it will be useful, 15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of 16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 ; GNU General Public License for more details. 18 ; 19 ; You should have received a copy of the GNU General Public License 20 ; along with this program; if not, write to the Free Software 21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 22 ; MA 02110-1301, USA. 23 24 (include "simplify.inc") 25 26 (define-arch 27 (name m32c) 28 (comment "Renesas M32C") 29 (default-alignment forced) 30 (insn-lsb0? #f) 31 (machs m16c m32c) 32 (isas m16c m32c) 33 ) 34 35 (define-isa 36 (name m16c) 37 38 (default-insn-bitsize 32) 39 40 ; Number of bytes of insn we can initially fetch. 41 (base-insn-bitsize 32) 42 43 ; Used in computing bit numbers. 44 (default-insn-word-bitsize 32) 45 46 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by. 47 48 ; fetches 1 insn at a time. 49 (liw-insns 1) 50 51 ; executes 1 insn at a time. 52 (parallel-insns 1) 53 ) 54 55 (define-isa 56 (name m32c) 57 58 (default-insn-bitsize 32) 59 60 ; Number of bytes of insn we can initially fetch. 61 (base-insn-bitsize 32) 62 63 ; Used in computing bit numbers. 64 (default-insn-word-bitsize 32) 65 66 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by. 67 68 ; fetches 1 insn at a time. 69 (liw-insns 1) 70 71 ; executes 1 insn at a time. 72 (parallel-insns 1) 73 ) 74 75 (define-cpu 76 ; cpu names must be distinct from the architecture name and machine names. 77 ; The "b" suffix stands for "base" and is the convention. 78 ; The "f" suffix stands for "family" and is the convention. 79 (name m16cbf) 80 (comment "Renesas M16C base family") 81 (insn-endian big) 82 (data-endian little) 83 (word-bitsize 16) 84 ) 85 86 (define-cpu 87 ; cpu names must be distinct from the architecture name and machine names. 88 ; The "b" suffix stands for "base" and is the convention. 89 ; The "f" suffix stands for "family" and is the convention. 90 (name m32cbf) 91 (comment "Renesas M32C base family") 92 (insn-endian big) 93 (data-endian little) 94 (word-bitsize 16) 95 ) 96 97 (define-mach 98 (name m16c) 99 (comment "Generic M16C cpu") 100 (cpu m32cbf) 101 ) 102 103 (define-mach 104 (name m32c) 105 (comment "Generic M32C cpu") 106 (cpu m32cbf) 107 ) 108 109 ; Model descriptions. 110 111 (define-model 112 (name m16c) 113 (comment "m16c") (attrs) 114 (mach m16c) 115 116 ; `state' is a list of variables for recording model state 117 ; (state) 118 (unit u-exec "Execution Unit" () 119 1 1 ; issue done 120 () ; state 121 () ; inputs 122 () ; outputs 123 () ; profile action (default) 124 ) 125 ) 126 127 (define-model 128 (name m32c) 129 (comment "m32c") (attrs) 130 (mach m32c) 131 132 ; `state' is a list of variables for recording model state 133 ; (state) 134 (unit u-exec "Execution Unit" () 135 1 1 ; issue done 136 () ; state 137 () ; inputs 138 () ; outputs 139 () ; profile action (default) 140 ) 141 ) 142 143 (define-attr 144 (type enum) 145 (name RL_TYPE) 146 (values NONE JUMP 1ADDR 2ADDR) 147 (default NONE) 148 ) 149 150 ; Macros to simplify MACH attribute specification. 151 152 (define-pmacro all-isas () (ISA m16c,m32c)) 153 (define-pmacro m16c-isa () (ISA m16c)) 154 (define-pmacro m32c-isa () (ISA m32c)) 155 156 (define-pmacro MACH16 (MACH m16c)) 157 (define-pmacro MACH32 (MACH m32c)) 158 159 (define-pmacro (machine size) 160 (MACH (.sym m size c)) (ISA (.sym m size c))) 161 162 (define-pmacro RL_JUMP (RL_TYPE JUMP)) 163 (define-pmacro RL_1ADDR (RL_TYPE 1ADDR)) 164 (define-pmacro RL_2ADDR (RL_TYPE 2ADDR)) 165 166 168 ;============================================================= 169 ; Fields 170 ;------------------------------------------------------------- 171 ; Main opcodes 172 ; 173 (dnf f-0-1 "opcode" (all-isas) 0 1) 174 (dnf f-0-2 "opcode" (all-isas) 0 2) 175 (dnf f-0-3 "opcode" (all-isas) 0 3) 176 (dnf f-0-4 "opcode" (all-isas) 0 4) 177 (dnf f-1-3 "opcode" (all-isas) 1 3) 178 (dnf f-2-2 "opcode" (all-isas) 2 2) 179 (dnf f-3-4 "opcode" (all-isas) 3 4) 180 (dnf f-3-1 "opcode" (all-isas) 3 1) 181 (dnf f-4-1 "opcode" (all-isas) 4 1) 182 (dnf f-4-3 "opcode" (all-isas) 4 3) 183 (dnf f-4-4 "opcode" (all-isas) 4 4) 184 (dnf f-4-6 "opcode" (all-isas) 4 6) 185 (dnf f-5-1 "opcode" (all-isas) 5 1) 186 (dnf f-5-3 "opcode" (all-isas) 5 3) 187 (dnf f-6-2 "opcode" (all-isas) 6 2) 188 (dnf f-7-1 "opcode" (all-isas) 7 1) 189 (dnf f-8-1 "opcode" (all-isas) 8 1) 190 (dnf f-8-2 "opcode" (all-isas) 8 2) 191 (dnf f-8-3 "opcode" (all-isas) 8 3) 192 (dnf f-8-4 "opcode" (all-isas) 8 4) 193 (dnf f-8-8 "opcode" (all-isas) 8 8) 194 (dnf f-9-3 "opcode" (all-isas) 9 3) 195 (dnf f-9-1 "opcode" (all-isas) 9 1) 196 (dnf f-10-1 "opcode" (all-isas) 10 1) 197 (dnf f-10-2 "opcode" (all-isas) 10 2) 198 (dnf f-10-3 "opcode" (all-isas) 10 3) 199 (dnf f-11-1 "opcode" (all-isas) 11 1) 200 (dnf f-12-1 "opcode" (all-isas) 12 1) 201 (dnf f-12-2 "opcode" (all-isas) 12 2) 202 (dnf f-12-3 "opcode" (all-isas) 12 3) 203 (dnf f-12-4 "opcode" (all-isas) 12 4) 204 (dnf f-12-6 "opcode" (all-isas) 12 6) 205 (dnf f-13-3 "opcode" (all-isas) 13 3) 206 (dnf f-14-1 "opcode" (all-isas) 14 1) 207 (dnf f-14-2 "opcode" (all-isas) 14 2) 208 (dnf f-15-1 "opcode" (all-isas) 15 1) 209 (dnf f-16-1 "opcode" (all-isas) 16 1) 210 (dnf f-16-2 "opcode" (all-isas) 16 2) 211 (dnf f-16-4 "opcode" (all-isas) 16 4) 212 (dnf f-16-8 "opcode" (all-isas) 16 8) 213 (dnf f-18-1 "opcode" (all-isas) 18 1) 214 (dnf f-18-2 "opcode" (all-isas) 18 2) 215 (dnf f-18-3 "opcode" (all-isas) 18 3) 216 (dnf f-20-1 "opcode" (all-isas) 20 1) 217 (dnf f-20-3 "opcode" (all-isas) 20 3) 218 (dnf f-20-2 "opcode" (all-isas) 20 2) 219 (dnf f-20-4 "opcode" (all-isas) 20 4) 220 (dnf f-21-3 "opcode" (all-isas) 21 3) 221 (dnf f-24-2 "opcode" (all-isas) 24 2) 222 (dnf f-24-8 "opcode" (all-isas) 24 8) 223 (dnf f-32-16 "opcode" (all-isas) 32 16) 224 225 ;------------------------------------------------------------- 226 ; Registers 227 ;------------------------------------------------------------- 228 229 (dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2) 230 (dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1) 231 232 (dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1) 233 (dnf f-src32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 19 1) 234 235 ; QI mode gr encoding for m32c is different than for m16c. The hardware 236 ; is indexed using the m16c encoding, so perform the transformation here. 237 ; register m16c m32c 238 ; ---------------------- 239 ; r0l 00'b 10'b 240 ; r0h 01'b 00'b 241 ; r1l 10'b 11'b 242 ; r1h 11'b 01'b 243 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT 244 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert 245 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 246 ) 247 ; QI mode gr encoding for m32c is different than for m16c. The hardware 248 ; is indexed using the m16c encoding, so perform the transformation here. 249 ; register m16c m32c 250 ; ---------------------- 251 ; r0l 00'b 10'b 252 ; r0h 01'b 00'b 253 ; r1l 10'b 11'b 254 ; r1h 11'b 01'b 255 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT 256 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert 257 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 258 ) 259 ; HI mode gr encoding for m32c is different than for m16c. The hardware 260 ; is indexed using the m16c encoding, so perform the transformation here. 261 ; register m16c m32c 262 ; ---------------------- 263 ; r0 00'b 10'b 264 ; r1 01'b 11'b 265 ; r2 10'b 00'b 266 ; r3 11'b 01'b 267 (df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT 268 ((value pc) (mod USI (add value 2) 4)) ; insert 269 ((value pc) (mod USI (add value 2) 4)) ; extract 270 ) 271 272 ; HI mode gr encoding for m32c is different than for m16c. The hardware 273 ; is indexed using the m16c encoding, so perform the transformation here. 274 ; register m16c m32c 275 ; ---------------------- 276 ; r0 00'b 10'b 277 ; r1 01'b 11'b 278 ; r2 10'b 00'b 279 ; r3 11'b 01'b 280 (df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT 281 ((value pc) (mod USI (add value 2) 4)) ; insert 282 ((value pc) (mod USI (add value 2) 4)) ; extract 283 ) 284 285 ; SI mode gr encoding for m32c is as follows: 286 ; register encoding index 287 ; ------------------------- 288 ; r2r0 10'b 0 289 ; r3r1 11'b 1 290 (df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT 291 ((value pc) (add USI value 2)) ; insert 292 ((value pc) (sub USI value 2)) ; extract 293 ) 294 (df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT 295 ((value pc) (add USI value 2)) ; insert 296 ((value pc) (sub USI value 2)) ; extract 297 ) 298 299 (dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1) 300 301 (dnf f-dst16-rn "destination Rn for m16c" (MACH16 m16c-isa) 14 2) 302 (dnf f-dst16-rn-ext "destination Rn for m16c" (MACH16 m16c-isa) 14 1) 303 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1) 304 305 (dnf f-dst16-an "destination An for m16c" (MACH16 m16c-isa) 15 1) 306 (dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa) 4 1) 307 308 (dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 9 1) 309 (dnf f-dst32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 17 1) 310 311 ; QI mode gr encoding for m32c is different than for m16c. The hardware 312 ; is indexed using the m16c encoding, so perform the transformation here. 313 ; register m16c m32c 314 ; ---------------------- 315 ; r0l 00'b 10'b 316 ; r0h 01'b 00'b 317 ; r1l 10'b 11'b 318 ; r1h 11'b 01'b 319 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT 320 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert 321 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 322 ) 323 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT 324 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert 325 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract 326 ) 327 ; HI mode gr encoding for m32c is different than for m16c. The hardware 328 ; is indexed using the m16c encoding, so perform the transformation here. 329 ; register m16c m32c 330 ; ---------------------- 331 ; r0 00'b 10'b 332 ; r1 01'b 11'b 333 ; r2 10'b 00'b 334 ; r3 11'b 01'b 335 (df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT 336 ((value pc) (mod USI (add value 2) 4)) ; insert 337 ((value pc) (mod USI (add value 2) 4)) ; extract 338 ) 339 (df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT 340 ((value pc) (mod USI (add value 2) 4)) ; insert 341 ((value pc) (mod USI (add value 2) 4)) ; extract 342 ) 343 ; SI mode gr encoding for m32c is as follows: 344 ; register encoding index 345 ; ------------------------- 346 ; r2r0 10'b 0 347 ; r3r1 11'b 1 348 (df f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT 349 ((value pc) (add USI value 2)) ; insert 350 ((value pc) (sub USI value 2)) ; extract 351 ) 352 (df f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT 353 ((value pc) (add USI value 2)) ; insert 354 ((value pc) (sub USI value 2)) ; extract 355 ) 356 357 (dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1) 358 359 ;------------------------------------------------------------- 360 ; Immediates embedded in the base insn 361 ;------------------------------------------------------------- 362 363 (df f-imm-8-s4 "4 bit signed" (all-isas) 8 4 INT #f #f) 364 (df f-imm-12-s4 "4 bit signed" (all-isas) 12 4 INT #f #f) 365 (df f-imm-13-u3 "3 bit unsigned" (all-isas) 13 3 UINT #f #f) 366 (df f-imm-20-s4 "4 bit signed" (all-isas) 20 4 INT #f #f) 367 368 (df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT 369 ((value pc) (sub USI value 1)) ; insert 370 ((value pc) (add USI value 1)) ; extract 371 ) 372 373 (dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT 374 (f-2-2 f-7-1) 375 (sequence () ; insert 376 (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1)) 377 (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3)) 378 ) 379 (sequence () ; extract 380 (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1) 381 (ifield f-7-1)) 382 1)) 383 ) 384 ) 385 386 ;------------------------------------------------------------- 387 ; Immediates and displacements beyond the base insn 388 ;------------------------------------------------------------- 389 390 (df f-dsp-8-u6 "6 bit unsigned" (all-isas) 8 6 UINT #f #f) 391 (df f-dsp-8-u8 "8 bit unsigned" (all-isas) 8 8 UINT #f #f) 392 (df f-dsp-8-s8 "8 bit signed" (all-isas) 8 8 INT #f #f) 393 (df f-dsp-10-u6 "6 bit unsigned" (all-isas) 10 6 UINT #f #f) 394 (df f-dsp-16-u8 "8 bit unsigned" (all-isas) 16 8 UINT #f #f) 395 (df f-dsp-16-s8 "8 bit signed" (all-isas) 16 8 INT #f #f) 396 (df f-dsp-24-u8 "8 bit unsigned" (all-isas) 24 8 UINT #f #f) 397 (df f-dsp-24-s8 "8 bit signed" (all-isas) 24 8 INT #f #f) 398 (df f-dsp-32-u8 "8 bit unsigned" (all-isas) 32 8 UINT #f #f) 399 (df f-dsp-32-s8 "8 bit signed" (all-isas) 32 8 INT #f #f) 400 (df f-dsp-40-u8 "8 bit unsigned" (all-isas) 40 8 UINT #f #f) 401 (df f-dsp-40-s8 "8 bit signed" (all-isas) 40 8 INT #f #f) 402 (df f-dsp-48-u8 "8 bit unsigned" (all-isas) 48 8 UINT #f #f) 403 (df f-dsp-48-s8 "8 bit signed" (all-isas) 48 8 INT #f #f) 404 (df f-dsp-56-u8 "8 bit unsigned" (all-isas) 56 8 UINT #f #f) 405 (df f-dsp-56-s8 "8 bit signed" (all-isas) 56 8 INT #f #f) 406 (df f-dsp-64-u8 "8 bit unsigned" (all-isas) 64 8 UINT #f #f) 407 (df f-dsp-64-s8 "8 bit signed" (all-isas) 64 8 INT #f #f) 408 409 ; Insn opcode endianness is big, but the immediate fields are stored 410 ; in little endian. Handle this here at the field level for all immediate 411 ; fields longer that 1 byte. 412 ; 413 ; CGEN can't handle a field which spans a 32 bit word boundary, so 414 ; handle those as multi ifields. 415 ; 416 ; Take care in expressions using 'srl' or 'sll' as part of some larger 417 ; expression meant to yield sign-extended values. CGEN translates 418 ; uses of those operators into C expressions whose type is 'unsigned 419 ; int', which tends to make the whole expression 'unsigned int'. 420 ; Expressions like (set (ifield foo) X), however, just take X and 421 ; store it in some member of 'struct cgen_fields', all of whose 422 ; members are 'long'. On machines where 'long' is larger than 423 ; 'unsigned int', assigning a "sign-extended" unsigned int to a long 424 ; just produces a very large positive value. insert_normal will 425 ; range-check the field's value and produce odd error messages like 426 ; this: 427 ; 428 ; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]' 429 ; 430 ; Annoyingly, the code will work fine on machines where 'long' and 431 ; 'unsigned int' are the same size: the assignment will produce a 432 ; negative number. 433 ; 434 ; Just tell yourself over and over: overflow detection is expensive, 435 ; and you're glad C doesn't do it, because it never happens in real 436 ; life. 437 438 (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT 439 ((value pc) (or UHI 440 (and (srl value 8) #x00ff) 441 (and (sll value 8) #xff00))) ; insert 442 ((value pc) (or UHI 443 (and UHI (srl UHI value 8) #x00ff) 444 (and UHI (sll UHI value 8) #xff00))) ; extract 445 ) 446 447 (df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT 448 ((value pc) (ext INT 449 (trunc HI 450 (or (and (srl value 8) #x00ff) 451 (and (sll value 8) #xff00))))) ; insert 452 ((value pc) (ext INT 453 (trunc HI 454 (or (and (srl value 8) #x00ff) 455 (and (sll value 8) #xff00))))) ; extract 456 ) 457 458 (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT 459 ((value pc) (or UHI 460 (and (srl value 8) #x00ff) 461 (and (sll value 8) #xff00))) ; insert 462 ((value pc) (or UHI 463 (and UHI (srl UHI value 8) #x00ff) 464 (and UHI (sll UHI value 8) #xff00))) ; extract 465 ) 466 467 (df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT 468 ((value pc) (ext INT 469 (trunc HI 470 (or (and (srl value 8) #x00ff) 471 (and (sll value 8) #xff00))))) ; insert 472 ((value pc) (ext INT 473 (trunc HI 474 (or (and (srl value 8) #x00ff) 475 (and (sll value 8) #xff00))))) ; extract 476 ) 477 478 (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT 479 (f-dsp-24-u8 f-dsp-32-u8) 480 (sequence () ; insert 481 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff)) 482 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff)) 483 ) 484 (sequence () ; extract 485 (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8) 486 (ifield f-dsp-24-u8))) 487 ) 488 ) 489 490 (dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT 491 (f-dsp-24-u8 f-dsp-32-u8) 492 (sequence () ; insert 493 (set (ifield f-dsp-24-u8) 494 (and (ifield f-dsp-24-s16) #xff)) 495 (set (ifield f-dsp-32-u8) 496 (and (srl (ifield f-dsp-24-s16) 8) #xff)) 497 ) 498 (sequence () ; extract 499 (set (ifield f-dsp-24-s16) 500 (ext INT 501 (trunc HI (or (sll (ifield f-dsp-32-u8) 8) 502 (ifield f-dsp-24-u8))))) 503 ) 504 ) 505 506 (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT 507 ((value pc) (or UHI 508 (and (srl value 8) #x00ff) 509 (and (sll value 8) #xff00))) ; insert 510 ((value pc) (or UHI 511 (and UHI (srl UHI value 8) #x00ff) 512 (and UHI (sll UHI value 8) #xff00))) ; extract 513 ) 514 515 (df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT 516 ((value pc) (ext INT 517 (trunc HI 518 (or (and (srl value 8) #x00ff) 519 (and (sll value 8) #xff00))))) ; insert 520 ((value pc) (ext INT 521 (trunc HI 522 (or (and (srl value 8) #x00ff) 523 (and (sll value 8) #xff00))))) ; extract 524 ) 525 526 (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT 527 ((value pc) (or UHI 528 (and (srl value 8) #x00ff) 529 (and (sll value 8) #xff00))) ; insert 530 ((value pc) (or UHI 531 (and UHI (srl UHI value 8) #x00ff) 532 (and UHI (sll UHI value 8) #xff00))) ; extract 533 ) 534 535 (df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT 536 ((value pc) (ext INT 537 (trunc HI 538 (or (and (srl value 8) #x00ff) 539 (and (sll value 8) #xff00))))) ; insert 540 ((value pc) (ext INT 541 (trunc HI 542 (or (and (srl value 8) #x00ff) 543 (and (sll value 8) #xff00))))) ; extract 544 ) 545 546 (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT 547 ((value pc) (or UHI 548 (and (srl value 8) #x00ff) 549 (and (sll value 8) #xff00))) ; insert 550 ((value pc) (or UHI 551 (and UHI (srl UHI value 8) #x00ff) 552 (and UHI (sll UHI value 8) #xff00))) ; extract 553 ) 554 555 (df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT 556 ((value pc) (ext INT 557 (trunc HI 558 (or (and (srl value 8) #x00ff) 559 (and (sll value 8) #xff00))))) ; insert 560 ((value pc) (ext INT 561 (trunc HI 562 (or (and (srl value 8) #x00ff) 563 (and (sll value 8) #xff00))))) ; extract 564 ) 565 566 (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT 567 ((value pc) (or UHI 568 (and (srl value 8) #x00ff) 569 (and (sll value 8) #xff00))) ; insert 570 ((value pc) (or UHI 571 (and UHI (srl UHI value 8) #x00ff) 572 (and UHI (sll UHI value 8) #xff00))) ; extract 573 ) 574 (df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT 575 ((value pc) (or SI 576 (or (and (srl value 16) #xff) (and value #xff00)) 577 (sll (ext INT (trunc QI (and value #xff))) 16))) 578 ((value pc) (or SI 579 (or (and (srl value 16) #xff) (and value #xff00)) 580 (sll (ext INT (trunc QI (and value #xff))) 16))) 581 ) 582 583 (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT 584 ((value pc) (or SI 585 (or (srl value 16) (and value #xff00)) 586 (sll (and value #xff) 16))) 587 ((value pc) (or SI 588 (or (srl value 16) (and value #xff00)) 589 (sll (and value #xff) 16))) 590 ) 591 592 (dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT 593 (f-dsp-16-u16 f-dsp-32-u8) 594 (sequence () ; insert 595 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff)) 596 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff)) 597 ) 598 (sequence () ; extract 599 (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16) 600 (ifield f-dsp-16-u16))) 601 ) 602 ) 603 604 (dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT 605 (f-dsp-24-u8 f-dsp-32-u16) 606 (sequence () ; insert 607 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff)) 608 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff)) 609 ) 610 (sequence () ; extract 611 (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8) 612 (ifield f-dsp-24-u8))) 613 ) 614 ) 615 616 (df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT 617 ((value pc) (or USI 618 (or USI 619 (and (srl value 16) #x0000ff) 620 (and value #x00ff00)) 621 (and (sll value 16) #xff0000))) ; insert 622 ((value pc) (or USI 623 (or USI 624 (and USI (srl value 16) #x0000ff) 625 (and USI value #x00ff00)) 626 (and USI (sll value 16) #xff0000))) ; extract 627 ) 628 629 (df f-dsp-40-u20 "20 bit unsigned" (all-isas) 40 20 UINT 630 ((value pc) (or USI 631 (or USI 632 (and (srl value 16) #x0000ff) 633 (and value #x00ff00)) 634 (and (sll value 16) #x0f0000))) ; insert 635 ((value pc) (or USI 636 (or USI 637 (and USI (srl value 16) #x0000ff) 638 (and USI value #x00ff00)) 639 (and USI (sll value 16) #x0f0000))) ; extract 640 ) 641 642 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT 643 ((value pc) (or USI 644 (or USI 645 (and (srl value 16) #x0000ff) 646 (and value #x00ff00)) 647 (and (sll value 16) #xff0000))) ; insert 648 ((value pc) (or USI 649 (or USI 650 (and USI (srl value 16) #x0000ff) 651 (and USI value #x00ff00)) 652 (and USI (sll value 16) #xff0000))) ; extract 653 ) 654 655 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT 656 (f-dsp-40-u24 f-dsp-64-u8) 657 (sequence () ; insert 658 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff)) 659 (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff)) 660 ) 661 (sequence () ; extract 662 (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff) 663 (and (sll (ifield f-dsp-64-u8) 24) #xff000000))) 664 ) 665 ) 666 667 (dnmf f-dsp-48-u20 "20 bit unsigned" (all-isas) UINT 668 (f-dsp-48-u16 f-dsp-64-u8) 669 (sequence () ; insert 670 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u20) 16) #x0f)) 671 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u20) #xffff)) 672 ) 673 (sequence () ; extract 674 (set (ifield f-dsp-48-u20) (or (and (ifield f-dsp-48-u16) #xffff) 675 (and (sll (ifield f-dsp-64-u8) 16) #x0f0000))) 676 ) 677 ) 678 (dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT 679 (f-dsp-48-u16 f-dsp-64-u8) 680 (sequence () ; insert 681 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff)) 682 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff)) 683 ) 684 (sequence () ; extract 685 (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff) 686 (and (sll (ifield f-dsp-64-u8) 16) #xff0000))) 687 ) 688 ) 689 690 (dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT 691 (f-dsp-16-u16 f-dsp-32-u16) 692 (sequence () ; insert 693 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff)) 694 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff)) 695 ) 696 (sequence () ; extract 697 (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff) 698 (and (sll (ifield f-dsp-32-u16) 16) #xffff0000))) 699 ) 700 ) 701 702 (dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT 703 (f-dsp-24-u8 f-dsp-32-u24) 704 (sequence () ; insert 705 (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff)) 706 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff)) 707 ) 708 (sequence () ; extract 709 (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff) 710 (and (sll (ifield f-dsp-32-u24) 8) #xffffff00))) 711 ) 712 ) 713 714 (df f-dsp-32-s32 "32 bit signed" (all-isas) 32 32 INT 715 ((value pc) 716 717 ;; insert 718 (ext INT 719 (or SI 720 (or SI 721 (and (srl value 24) #x000000ff) 722 (and (srl value 8) #x0000ff00)) 723 (or SI 724 (and (sll value 8) #x00ff0000) 725 (and (sll value 24) #xff000000))))) 726 727 ;; extract 728 ((value pc) 729 (ext INT 730 (or SI 731 (or SI 732 (and (srl value 24) #x000000ff) 733 (and (srl value 8) #x0000ff00)) 734 (or SI 735 (and (sll value 8) #x00ff0000) 736 (and (sll value 24) #xff000000))))) 737 ) 738 739 (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT 740 (f-dsp-48-u16 f-dsp-64-u16) 741 (sequence () ; insert 742 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff)) 743 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff)) 744 ) 745 (sequence () ; extract 746 (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff) 747 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000))) 748 ) 749 ) 750 751 (dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT 752 (f-dsp-48-u16 f-dsp-64-u16) 753 (sequence () ; insert 754 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff)) 755 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff)) 756 ) 757 (sequence () ; extract 758 (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff) 759 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000))) 760 ) 761 ) 762 763 (dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT 764 (f-dsp-56-u8 f-dsp-64-u8) 765 (sequence () ; insert 766 (set (ifield f-dsp-56-u8) 767 (and (ifield f-dsp-56-s16) #xff)) 768 (set (ifield f-dsp-64-u8) 769 (and (srl (ifield f-dsp-56-s16) 8) #xff)) 770 ) 771 (sequence () ; extract 772 (set (ifield f-dsp-56-s16) 773 (ext INT 774 (trunc HI (or (sll (ifield f-dsp-64-u8) 8) 775 (ifield f-dsp-56-u8))))) 776 ) 777 ) 778 779 (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT 780 ((value pc) (ext INT 781 (trunc HI 782 (or (and (srl value 8) #x00ff) 783 (and (sll value 8) #xff00))))) ; insert 784 ((value pc) (ext INT 785 (trunc HI 786 (or (and (srl value 8) #x00ff) 787 (and (sll value 8) #xff00))))) ; extract 788 ) 789 790 ;------------------------------------------------------------- 791 ; Bit indices 792 ;------------------------------------------------------------- 793 794 (dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3) 795 (dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3) 796 (dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3) 797 798 (dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT 799 (f-bitno16-S f-dsp-8-u8) 800 (sequence () ; insert 801 (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7)) 802 (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff)) 803 ) 804 (sequence () ; extract 805 (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3) 806 (ifield f-bitno16-S))) 807 ) 808 ) 809 810 (dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT 811 (f-bitno32-unprefixed f-dsp-16-u8) 812 (sequence () ; insert 813 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7)) 814 (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff)) 815 ) 816 (sequence () ; extract 817 (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3) 818 (ifield f-bitno32-unprefixed))) 819 ) 820 ) 821 (dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT 822 (f-bitno32-unprefixed f-dsp-16-s8) 823 (sequence () ; insert 824 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7)) 825 (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3)) 826 ) 827 (sequence () ; extract 828 (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3) 829 (ifield f-bitno32-unprefixed))) 830 ) 831 ) 832 (dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT 833 (f-bitno32-unprefixed f-dsp-16-u16) 834 (sequence () ; insert 835 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7)) 836 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff)) 837 ) 838 (sequence () ; extract 839 (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3) 840 (ifield f-bitno32-unprefixed))) 841 ) 842 ) 843 (dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT 844 (f-bitno32-unprefixed f-dsp-16-s16) 845 (sequence () ; insert 846 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7)) 847 (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3)) 848 ) 849 (sequence () ; extract 850 (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3) 851 (ifield f-bitno32-unprefixed))) 852 ) 853 ) 854 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 855 (dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT 856 (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8) 857 (sequence () ; insert 858 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7)) 859 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff)) 860 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff)) 861 ) 862 (sequence () ; extract 863 (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3) 864 (or (sll (ifield f-dsp-32-u8) 19) 865 (ifield f-bitno32-unprefixed)))) 866 ) 867 ) 868 (dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT 869 (f-bitno32-prefixed f-dsp-24-u8) 870 (sequence () ; insert 871 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7)) 872 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff)) 873 ) 874 (sequence () ; extract 875 (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 876 (ifield f-bitno32-prefixed))) 877 ) 878 ) 879 (dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT 880 (f-bitno32-prefixed f-dsp-24-s8) 881 (sequence () ; insert 882 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7)) 883 (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3)) 884 ) 885 (sequence () ; extract 886 (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3) 887 (ifield f-bitno32-prefixed))) 888 ) 889 ) 890 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 891 (dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT 892 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8) 893 (sequence () ; insert 894 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7)) 895 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 3) #xff)) 896 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff)) 897 ) 898 (sequence () ; extract 899 (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 900 (or (sll (ifield f-dsp-32-u8) 11) 901 (ifield f-bitno32-prefixed)))) 902 ) 903 ) 904 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 905 (dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT 906 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8) 907 (sequence () ; insert 908 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7)) 909 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff)) 910 (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11)) 911 ) 912 (sequence () ; extract 913 (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 914 (or (sll (ifield f-dsp-32-s8) 11) 915 (ifield f-bitno32-prefixed)))) 916 ) 917 ) 918 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-( 919 (dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT 920 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16) 921 (sequence () ; insert 922 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7)) 923 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff)) 924 (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff)) 925 ) 926 (sequence () ; extract 927 (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3) 928 (or (sll (ifield f-dsp-32-u16) 11) 929 (ifield f-bitno32-prefixed)))) 930 ) 931 ) 932 933 ;------------------------------------------------------------- 934 ; Labels 935 ;------------------------------------------------------------- 936 937 (df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT 938 ((value pc) (sub SI value (add SI pc 2))) ; insert 939 ((value pc) (add SI value (add SI pc 2))) ; extract 940 ) 941 (dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT 942 (f-2-2 f-7-1) 943 (sequence ((SI val)) ; insert 944 (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2)) 945 (set (ifield f-7-1) (and val #x1)) 946 (set (ifield f-2-2) (srl val 1)) 947 ) 948 (sequence () ; extract 949 (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1) 950 (ifield f-7-1)) 951 2))) 952 ) 953 ) 954 (df f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT 955 ((value pc) (sub SI value (add SI pc 1))) ; insert 956 ((value pc) (add SI value (add SI pc 1))) ; extract 957 ) 958 (df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT 959 ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8) 960 (srl (and (sub value (add pc 1)) #xffff) 8))) 961 ((value pc) (add SI (or (srl (and value #xffff) 8) 962 (sra (sll (and value #xff) 24) 16)) (add pc 1))) 963 ) 964 (df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT 965 ((value pc) (or SI 966 (or (srl value 16) (and value #xff00)) 967 (sll (and value #xff) 16))) 968 ((value pc) (or SI 969 (or (srl value 16) (and value #xff00)) 970 (sll (and value #xff) 16))) 971 ) 972 (df f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT 973 ((value pc) (sub SI value (add SI pc 2))) ; insert 974 ((value pc) (add SI value (add SI pc 2))) ; extract 975 ) 976 (df f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT 977 ((value pc) (sub SI value (add SI pc 2))) ; insert 978 ((value pc) (add SI value (add SI pc 2))) ; extract 979 ) 980 (df f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT 981 ((value pc) (sub SI value (add SI pc 2))) ; insert 982 ((value pc) (add SI value (add SI pc 2))) ; extract 983 ) 984 (df f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT 985 ((value pc) (sub SI value (add SI pc 2))) ; insert 986 ((value pc) (add SI value (add SI pc 2))) ; extract 987 ) 988 989 ;------------------------------------------------------------- 990 ; Condition codes 991 ;------------------------------------------------------------- 992 993 (dnf f-cond16 "condition code" (all-isas) 12 4) 994 (dnf f-cond16j-5 "condition code" (all-isas) 5 3) 995 996 (dnmf f-cond32 "condition code" (all-isas) UINT 997 (f-9-1 f-13-3) 998 (sequence () ; insert 999 (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1)) 1000 (set (ifield f-13-3) (and (ifield f-cond32) #x7)) 1001 ) 1002 (sequence () ; extract 1003 (set (ifield f-cond32) (or (sll (ifield f-9-1) 3) 1004 (ifield f-13-3))) 1005 ) 1006 ) 1007 1008 (dnmf f-cond32j "condition code" (all-isas) UINT 1009 (f-1-3 f-7-1) 1010 (sequence () ; insert 1011 (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7)) 1012 (set (ifield f-7-1) (and (ifield f-cond32j) #x1)) 1013 ) 1014 (sequence () ; extract 1015 (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1) 1016 (ifield f-7-1))) 1017 ) 1018 ) 1019 1021 ;============================================================= 1022 ; Hardware 1023 ; 1024 (dnh h-pc "program counter" (PC all-isas) (pc USI) () () ()) 1025 1026 ;------------------------------------------------------------- 1027 ; General registers 1028 ; The actual registers are 16 bits 1029 ;------------------------------------------------------------- 1030 1031 (define-hardware 1032 (name h-gr) 1033 (comment "general 16 bit registers") 1034 (attrs all-isas CACHE-ADDR) 1035 (type register HI (4)) 1036 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))) 1037 1038 ; Define different views of the grs as VIRTUAL with getter/setter specs 1039 ; 1040 (define-hardware 1041 (name h-gr-QI) 1042 (comment "general 8 bit registers") 1043 (attrs all-isas VIRTUAL) 1044 (type register QI (4)) 1045 (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3))) 1046 (get (index) (and (if SI (mod index 2) 1047 (srl (reg h-gr (div index 2)) 8) 1048 (reg h-gr (div index 2))) 1049 #xff)) 1050 (set (index newval) (set (reg h-gr (div index 2)) 1051 (if SI (mod index 2) 1052 (or (and (reg h-gr (div index 2)) #xff) 1053 (sll (and newval #xff) 8)) 1054 (or (and (reg h-gr (div index 2)) #xff00) 1055 (and newval #xff)))))) 1056 1057 (define-hardware 1058 (name h-gr-HI) 1059 (comment "general 16 bit registers") 1060 (attrs all-isas VIRTUAL) 1061 (type register HI (4)) 1062 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))) 1063 (get (index) (reg h-gr index)) 1064 (set (index newval) (set (reg h-gr index) newval))) 1065 1066 (define-hardware 1067 (name h-gr-SI) 1068 (comment "general 32 bit registers") 1069 (attrs all-isas VIRTUAL) 1070 (type register SI (2)) 1071 (indices keyword "" (("r2r0" 0) ("r3r1" 1))) 1072 (get (index) (or SI 1073 (and (reg h-gr index) #xffff) 1074 (and (sll (reg h-gr (add index 2)) 16) #xffff0000))) 1075 (set (index newval) (sequence () 1076 (set (reg h-gr index) (and newval #xffff)) 1077 (set (reg h-gr (add index 2)) (srl newval 16))))) 1078 1079 (define-hardware 1080 (name h-gr-ext-QI) 1081 (comment "general 16 bit registers") 1082 (attrs all-isas VIRTUAL) 1083 (type register HI (2)) 1084 (indices keyword "" (("r0l" 0) ("r1l" 1))) 1085 (get (index) (reg h-gr-QI (mul index 2))) 1086 (set (index newval) (set (reg h-gr (mul index 2)) newval))) 1087 1088 (define-hardware 1089 (name h-gr-ext-HI) 1090 (comment "general 16 bit registers") 1091 (attrs all-isas VIRTUAL) 1092 (type register SI (2)) 1093 (indices keyword "" (("r0" 0) ("r1" 1))) 1094 (get (index) (reg h-gr (mul index 2))) 1095 (set (index newval) (set (reg h-gr-SI index) newval))) 1096 1097 (define-hardware 1098 (name h-r0l) 1099 (comment "r0l register") 1100 (attrs all-isas VIRTUAL) 1101 (type register QI) 1102 (indices keyword "" (("r0l" 0))) 1103 (get () (reg h-gr-QI 0)) 1104 (set (newval) (set (reg h-gr-QI 0) newval))) 1105 1106 (define-hardware 1107 (name h-r0h) 1108 (comment "r0h register") 1109 (attrs all-isas VIRTUAL) 1110 (type register QI) 1111 (indices keyword "" (("r0h" 0))) 1112 (get () (reg h-gr-QI 1)) 1113 (set (newval) (set (reg h-gr-QI 1) newval))) 1114 1115 (define-hardware 1116 (name h-r1l) 1117 (comment "r1l register") 1118 (attrs all-isas VIRTUAL) 1119 (type register QI) 1120 (indices keyword "" (("r1l" 0))) 1121 (get () (reg h-gr-QI 2)) 1122 (set (newval) (set (reg h-gr-QI 2) newval))) 1123 1124 (define-hardware 1125 (name h-r1h) 1126 (comment "r1h register") 1127 (attrs all-isas VIRTUAL) 1128 (type register QI) 1129 (indices keyword "" (("r1h" 0))) 1130 (get () (reg h-gr-QI 3)) 1131 (set (newval) (set (reg h-gr-QI 3) newval))) 1132 1133 (define-hardware 1134 (name h-r0) 1135 (comment "r0 register") 1136 (attrs all-isas VIRTUAL) 1137 (type register HI) 1138 (indices keyword "" (("r0" 0))) 1139 (get () (reg h-gr 0)) 1140 (set (newval) (set (reg h-gr 0) newval))) 1141 1142 (define-hardware 1143 (name h-r1) 1144 (comment "r1 register") 1145 (attrs all-isas VIRTUAL) 1146 (type register HI) 1147 (indices keyword "" (("r1" 0))) 1148 (get () (reg h-gr 1)) 1149 (set (newval) (set (reg h-gr 1) newval))) 1150 1151 (define-hardware 1152 (name h-r2) 1153 (comment "r2 register") 1154 (attrs all-isas VIRTUAL) 1155 (type register HI) 1156 (indices keyword "" (("r2" 0))) 1157 (get () (reg h-gr 2)) 1158 (set (newval) (set (reg h-gr 2) newval))) 1159 1160 (define-hardware 1161 (name h-r3) 1162 (comment "r3 register") 1163 (attrs all-isas VIRTUAL) 1164 (type register HI) 1165 (indices keyword "" (("r3" 0))) 1166 (get () (reg h-gr 3)) 1167 (set (newval) (set (reg h-gr 3) newval))) 1168 1169 (define-hardware 1170 (name h-r0l-r0h) 1171 (comment "r0l or r0h") 1172 (attrs all-isas VIRTUAL) 1173 (type register QI (2)) 1174 (indices keyword "" (("r0l" 0) ("r0h" 1))) 1175 (get (index) (reg h-gr-QI index)) 1176 (set (index newval) (set (reg h-gr-QI index) newval))) 1177 1178 (define-hardware 1179 (name h-r2r0) 1180 (comment "r2r0 register") 1181 (attrs all-isas VIRTUAL) 1182 (type register SI) 1183 (indices keyword "" (("r2r0" 0))) 1184 (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0))) 1185 (set (newval) 1186 (sequence () 1187 (set (reg h-gr 0) newval) 1188 (set (reg h-gr 2) (sra newval 16))))) 1189 1190 (define-hardware 1191 (name h-r3r1) 1192 (comment "r3r1 register") 1193 (attrs all-isas VIRTUAL) 1194 (type register SI) 1195 (indices keyword "" (("r3r1" 0))) 1196 (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1))) 1197 (set (newval) 1198 (sequence () 1199 (set (reg h-gr 1) newval) 1200 (set (reg h-gr 3) (sra newval 16))))) 1201 1202 (define-hardware 1203 (name h-r1r2r0) 1204 (comment "r1r2r0 register") 1205 (attrs all-isas VIRTUAL) 1206 (type register DI) 1207 (indices keyword "" (("r1r2r0" 0))) 1208 (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0)))) 1209 (set (newval) 1210 (sequence () 1211 (set (reg h-gr 0) newval) 1212 (set (reg h-gr 2) (sra newval 16)) 1213 (set (reg h-gr 1) (sra newval 32))))) 1214 1215 ;------------------------------------------------------------- 1216 ; Address registers 1217 ;------------------------------------------------------------- 1218 1219 (define-hardware 1220 (name h-ar) 1221 (comment "address registers") 1222 (attrs all-isas) 1223 (type register USI (2)) 1224 (indices keyword "" (("a0" 0) ("a1" 1))) 1225 (get (index) (c-call USI "h_ar_get_handler" index)) 1226 (set (index newval) (c-call VOID "h_ar_set_handler" index newval))) 1227 1228 ; Define different views of the ars as VIRTUAL with getter/setter specs 1229 (define-hardware 1230 (name h-ar-QI) 1231 (comment "8 bit view of address register") 1232 (attrs all-isas VIRTUAL) 1233 (type register QI (2)) 1234 (indices keyword "" (("a0" 0) ("a1" 1))) 1235 (get (index) (reg h-ar index)) 1236 (set (index newval) (set (reg h-ar index) newval))) 1237 1238 (define-hardware 1239 (name h-ar-HI) 1240 (comment "16 bit view of address register") 1241 (attrs all-isas VIRTUAL) 1242 (type register HI (2)) 1243 (indices keyword "" (("a0" 0) ("a1" 1))) 1244 (get (index) (reg h-ar index)) 1245 (set (index newval) (set (reg h-ar index) newval))) 1246 1247 (define-hardware 1248 (name h-ar-SI) 1249 (comment "32 bit view of address register") 1250 (attrs all-isas VIRTUAL) 1251 (type register SI) 1252 (indices keyword "" (("a1a0" 0))) 1253 (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0)))) 1254 (set (newval) (sequence () 1255 (set (reg h-ar 0) (and newval #xffff)) 1256 (set (reg h-ar 1) (and (srl newval 16) #xffff))))) 1257 1258 (define-hardware 1259 (name h-a0) 1260 (comment "16 bit view of address register") 1261 (attrs all-isas VIRTUAL) 1262 (type register HI) 1263 (indices keyword "" (("a0" 0))) 1264 (get () (reg h-ar 0)) 1265 (set (newval) (set (reg h-ar 0) newval))) 1266 1267 (define-hardware 1268 (name h-a1) 1269 (comment "16 bit view of address register") 1270 (attrs all-isas VIRTUAL) 1271 (type register HI) 1272 (indices keyword "" (("a1" 1))) 1273 (get () (reg h-ar 1)) 1274 (set (newval) (set (reg h-ar 1) newval))) 1275 1276 ; SB Register 1277 (define-hardware 1278 (name h-sb) 1279 (comment "SB register") 1280 (attrs all-isas) 1281 (type register USI) 1282 (get () (c-call USI "h_sb_get_handler")) 1283 (set (newval) (c-call VOID "h_sb_set_handler" newval)) 1284 ) 1285 1286 ; FB Register 1287 (define-hardware 1288 (name h-fb) 1289 (comment "FB register") 1290 (attrs all-isas) 1291 (type register USI) 1292 (get () (c-call USI "h_fb_get_handler")) 1293 (set (newval) (c-call VOID "h_fb_set_handler" newval)) 1294 ) 1295 1296 ; SP Register 1297 (define-hardware 1298 (name h-sp) 1299 (comment "SP register") 1300 (attrs all-isas) 1301 (type register USI) 1302 (get () (c-call USI "h_sp_get_handler")) 1303 (set (newval) (c-call VOID "h_sp_set_handler" newval)) 1304 ) 1305 1306 ;------------------------------------------------------------- 1307 ; condition-code bits 1308 ;------------------------------------------------------------- 1309 1310 (define-hardware 1311 (name h-sbit) 1312 (comment "sign bit") 1313 (attrs all-isas) 1314 (type register BI) 1315 ) 1316 1317 (define-hardware 1318 (name h-zbit) 1319 (comment "zero bit") 1320 (attrs all-isas) 1321 (type register BI) 1322 ) 1323 1324 (define-hardware 1325 (name h-obit) 1326 (comment "overflow bit") 1327 (attrs all-isas) 1328 (type register BI) 1329 ) 1330 1331 (define-hardware 1332 (name h-cbit) 1333 (comment "carry bit") 1334 (attrs all-isas) 1335 (type register BI) 1336 ) 1337 1338 (define-hardware 1339 (name h-ubit) 1340 (comment "stack pointer select bit") 1341 (attrs all-isas) 1342 (type register BI) 1343 ) 1344 1345 (define-hardware 1346 (name h-ibit) 1347 (comment "interrupt enable bit") 1348 (attrs all-isas) 1349 (type register BI) 1350 ) 1351 1352 (define-hardware 1353 (name h-bbit) 1354 (comment "register bank select bit") 1355 (attrs all-isas) 1356 (type register BI) 1357 ) 1358 1359 (define-hardware 1360 (name h-dbit) 1361 (comment "debug bit") 1362 (attrs all-isas) 1363 (type register BI) 1364 ) 1365 1366 (define-hardware 1367 (name h-dct0) 1368 (comment "dma transfer count 000") 1369 (attrs all-isas) 1370 (type register UHI) 1371 ) 1372 (define-hardware 1373 (name h-dct1) 1374 (comment "dma transfer count 001") 1375 (attrs all-isas) 1376 (type register UHI) 1377 ) 1378 (define-hardware 1379 (name h-svf) 1380 (comment "save flag 011") 1381 (attrs all-isas) 1382 (type register UHI) 1383 ) 1384 (define-hardware 1385 (name h-drc0) 1386 (comment "dma transfer count reload 100") 1387 (attrs all-isas) 1388 (type register UHI) 1389 ) 1390 (define-hardware 1391 (name h-drc1) 1392 (comment "dma transfer count reload 101") 1393 (attrs all-isas) 1394 (type register UHI) 1395 ) 1396 (define-hardware 1397 (name h-dmd0) 1398 (comment "dma mode 110") 1399 (attrs all-isas) 1400 (type register UQI) 1401 ) 1402 (define-hardware 1403 (name h-dmd1) 1404 (comment "dma mode 111") 1405 (attrs all-isas) 1406 (type register UQI) 1407 ) 1408 (define-hardware 1409 (name h-intb) 1410 (comment "interrupt table 000") 1411 (attrs all-isas) 1412 (type register USI) 1413 ) 1414 (define-hardware 1415 (name h-svp) 1416 (comment "save pc 100") 1417 (attrs all-isas) 1418 (type register UHI) 1419 ) 1420 (define-hardware 1421 (name h-vct) 1422 (comment "vector 101") 1423 (attrs all-isas) 1424 (type register USI) 1425 ) 1426 (define-hardware 1427 (name h-isp) 1428 (comment "interrupt stack ptr 111") 1429 (attrs all-isas) 1430 (type register USI) 1431 ) 1432 (define-hardware 1433 (name h-dma0) 1434 (comment "dma mem addr 010") 1435 (attrs all-isas) 1436 (type register USI) 1437 ) 1438 (define-hardware 1439 (name h-dma1) 1440 (comment "dma mem addr 011") 1441 (attrs all-isas) 1442 (type register USI) 1443 ) 1444 (define-hardware 1445 (name h-dra0) 1446 (comment "dma mem addr reload 100") 1447 (attrs all-isas) 1448 (type register USI) 1449 ) 1450 (define-hardware 1451 (name h-dra1) 1452 (comment "dma mem addr reload 101") 1453 (attrs all-isas) 1454 (type register USI) 1455 ) 1456 (define-hardware 1457 (name h-dsa0) 1458 (comment "dma sfr addr 110") 1459 (attrs all-isas) 1460 (type register USI) 1461 ) 1462 (define-hardware 1463 (name h-dsa1) 1464 (comment "dma sfr addr 111") 1465 (attrs all-isas) 1466 (type register USI) 1467 ) 1468 1469 ;------------------------------------------------------------- 1470 ; Condition code operand hardware 1471 ;------------------------------------------------------------- 1472 1473 (define-hardware 1474 (name h-cond16) 1475 (comment "condition code hardware for m16c") 1476 (attrs m16c-isa MACH16) 1477 (type immediate UQI) 1478 (values keyword "" 1479 (("geu" #x00) ("c" #x00) 1480 ("gtu" #x01) 1481 ("eq" #x02) ("z" #x02) 1482 ("n" #x03) 1483 ("le" #x04) 1484 ("o" #x05) 1485 ("ge" #x06) 1486 ("ltu" #xf8) ("nc" #xf8) 1487 ("leu" #xf9) 1488 ("ne" #xfa) ("nz" #xfa) 1489 ("pz" #xfb) 1490 ("gt" #xfc) 1491 ("no" #xfd) 1492 ("lt" #xfe) 1493 ) 1494 ) 1495 ) 1496 (define-hardware 1497 (name h-cond16c) 1498 (comment "condition code hardware for m16c") 1499 (attrs m16c-isa MACH16) 1500 (type immediate UQI) 1501 (values keyword "" 1502 (("geu" #x00) ("c" #x00) 1503 ("gtu" #x01) 1504 ("eq" #x02) ("z" #x02) 1505 ("n" #x03) 1506 ("ltu" #x04) ("nc" #x04) 1507 ("leu" #x05) 1508 ("ne" #x06) ("nz" #x06) 1509 ("pz" #x07) 1510 ("le" #x08) 1511 ("o" #x09) 1512 ("ge" #x0a) 1513 ("gt" #x0c) 1514 ("no" #x0d) 1515 ("lt" #x0e) 1516 ) 1517 ) 1518 ) 1519 (define-hardware 1520 (name h-cond16j) 1521 (comment "condition code hardware for m16c") 1522 (attrs m16c-isa MACH16) 1523 (type immediate UQI) 1524 (values keyword "" 1525 (("le" #x08) 1526 ("o" #x09) 1527 ("ge" #x0a) 1528 ("gt" #x0c) 1529 ("no" #x0d) 1530 ("lt" #x0e) 1531 ) 1532 ) 1533 ) 1534 (define-hardware 1535 (name h-cond16j-5) 1536 (comment "condition code hardware for m16c") 1537 (attrs m16c-isa MACH16) 1538 (type immediate UQI) 1539 (values keyword "" 1540 (("geu" #x00) ("c" #x00) 1541 ("gtu" #x01) 1542 ("eq" #x02) ("z" #x02) 1543 ("n" #x03) 1544 ("ltu" #x04) ("nc" #x04) 1545 ("leu" #x05) 1546 ("ne" #x06) ("nz" #x06) 1547 ("pz" #x07) 1548 ) 1549 ) 1550 ) 1551 1552 (define-hardware 1553 (name h-cond32) 1554 (comment "condition code hardware for m32c") 1555 (attrs m32c-isa MACH32) 1556 (type immediate UQI) 1557 (values keyword "" 1558 (("ltu" #x00) ("nc" #x00) 1559 ("leu" #x01) 1560 ("ne" #x02) ("nz" #x02) 1561 ("pz" #x03) 1562 ("no" #x04) 1563 ("gt" #x05) 1564 ("ge" #x06) 1565 ("geu" #x08) ("c" #x08) 1566 ("gtu" #x09) 1567 ("eq" #x0a) ("z" #x0a) 1568 ("n" #x0b) 1569 ("o" #x0c) 1570 ("le" #x0d) 1571 ("lt" #x0e) 1572 ) 1573 ) 1574 ) 1575 1576 (define-hardware 1577 (name h-cr1-32) 1578 (comment "control registers") 1579 (attrs m32c-isa MACH32) 1580 (type immediate UQI) 1581 (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4) 1582 ("drc1" 5) ("dmd0" 6) ("dmd1" 7)))) 1583 (define-hardware 1584 (name h-cr2-32) 1585 (comment "control registers") 1586 (attrs m32c-isa MACH32) 1587 (type immediate UQI) 1588 (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4) 1589 ("vct" 5) ("isp" 7)))) 1590 1591 (define-hardware 1592 (name h-cr3-32) 1593 (comment "control registers") 1594 (attrs m32c-isa MACH32) 1595 (type immediate UQI) 1596 (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4) 1597 ("dra1" 5) ("dsa0" 6) ("dsa1" 7)))) 1598 (define-hardware 1599 (name h-cr-16) 1600 (comment "control registers") 1601 (attrs m16c-isa MACH16) 1602 (type immediate UQI) 1603 (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4) 1604 ("sp" 5) ("sb" 6) ("fb" 7)))) 1605 1606 (define-hardware 1607 (name h-flags) 1608 (comment "flag hardware for m32c") 1609 (attrs all-isas) 1610 (type immediate UQI) 1611 (values keyword "" 1612 (("c" #x0) 1613 ("d" #x1) 1614 ("z" #x2) 1615 ("s" #x3) 1616 ("b" #x4) 1617 ("o" #x5) 1618 ("i" #x6) 1619 ("u" #x7) 1620 ) 1621 ) 1622 ) 1623 1624 ;------------------------------------------------------------- 1625 ; Misc helper hardware 1626 ;------------------------------------------------------------- 1627 1628 (define-hardware 1629 (name h-shimm) 1630 (comment "shift immediate") 1631 (attrs all-isas) 1632 (type immediate (INT 4)) 1633 (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6) 1634 ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4) 1635 ("-6" -3) ("-7" -2) ("-8" -1) 1636 ))) 1637 (define-hardware 1638 (name h-bit-index) 1639 (comment "bit index for the next insn") 1640 (attrs m32c-isa MACH32) 1641 (type register UHI) 1642 ) 1643 (define-hardware 1644 (name h-src-index) 1645 (comment "source index for the next insn") 1646 (attrs m32c-isa MACH32) 1647 (type register UHI) 1648 ) 1649 (define-hardware 1650 (name h-dst-index) 1651 (comment "destination index for the next insn") 1652 (attrs m32c-isa MACH32) 1653 (type register UHI) 1654 ) 1655 (define-hardware 1656 (name h-src-indirect) 1657 (comment "indirect src for the next insn") 1658 (attrs all-isas) 1659 (type register UHI) 1660 ) 1661 (define-hardware 1662 (name h-dst-indirect) 1663 (comment "indirect dst for the next insn") 1664 (attrs all-isas) 1665 (type register UHI) 1666 ) 1667 (define-hardware 1668 (name h-none) 1669 (comment "for storing unused values") 1670 (attrs m32c-isa MACH32) 1671 (type register SI) 1672 ) 1673 1675 ;============================================================= 1676 ; Operands 1677 ;------------------------------------------------------------- 1678 ; Source Registers 1679 ;------------------------------------------------------------- 1680 1681 (dnop Src16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn) 1682 (dnop Src16RnHI "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn) 1683 1684 (dnop Src32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI) 1685 (dnop Src32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI) 1686 (dnop Src32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI) 1687 1688 (dnop Src32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI) 1689 (dnop Src32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI) 1690 (dnop Src32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI) 1691 1692 (dnop Src16An "address register" (MACH16 m16c-isa) h-ar f-src16-an) 1693 (dnop Src16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an) 1694 (dnop Src16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an) 1695 1696 (dnop Src32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed) 1697 (dnop Src32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed) 1698 (dnop Src32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed) 1699 (dnop Src32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed) 1700 1701 (dnop Src32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-prefixed) 1702 (dnop Src32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed) 1703 (dnop Src32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed) 1704 (dnop Src32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-prefixed) 1705 1706 ; Destination Registers 1707 ; 1708 (dnop Dst16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn) 1709 (dnop Dst16RnHI "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn) 1710 (dnop Dst16RnSI "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn) 1711 (dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext) 1712 1713 (dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil) 1714 (dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0 f-nil) 1715 1716 (dnop Dst32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI) 1717 (dnop Dst32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI) 1718 (dnop Dst32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI) 1719 (dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed) 1720 (dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed) 1721 1722 (dnop Dst32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI) 1723 (dnop Dst32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI) 1724 (dnop Dst32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI) 1725 1726 (dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s) 1727 1728 (dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s) 1729 1730 (dnop Bit16Rn "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn) 1731 1732 (dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI) 1733 (dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI) 1734 1735 (dnop R0 "r0" (all-isas) h-r0 f-nil) 1736 (dnop R1 "r1" (all-isas) h-r1 f-nil) 1737 (dnop R2 "r2" (all-isas) h-r2 f-nil) 1738 (dnop R3 "r3" (all-isas) h-r3 f-nil) 1739 (dnop R0l "r0l" (all-isas) h-r0l f-nil) 1740 (dnop R0h "r0h" (all-isas) h-r0h f-nil) 1741 (dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil) 1742 (dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil) 1743 (dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil) 1744 1745 (dnop Dst16An "address register" (MACH16 m16c-isa) h-ar f-dst16-an) 1746 (dnop Dst16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an) 1747 (dnop Dst16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an) 1748 (dnop Dst16AnSI "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an) 1749 (dnop Dst16An-S "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s) 1750 1751 (dnop Dst32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1752 (dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed) 1753 (dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed) 1754 (dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1755 1756 (dnop Dst32AnExtUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1757 1758 (dnop Dst32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed) 1759 (dnop Dst32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed) 1760 (dnop Dst32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed) 1761 (dnop Dst32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed) 1762 1763 (dnop Bit16An "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an) 1764 1765 (dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed) 1766 (dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed) 1767 1768 (dnop A0 "a0" (all-isas) h-a0 f-nil) 1769 (dnop A1 "a1" (all-isas) h-a1 f-nil) 1770 1771 (dnop sb "SB register" (all-isas SEM-ONLY) h-sb f-nil) 1772 (dnop fb "FB register" (all-isas SEM-ONLY) h-fb f-nil) 1773 (dnop sp "SP register" (all-isas SEM-ONLY) h-sp f-nil) 1774 1775 (define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa) 1776 h-sint DFLT f-5-1 1777 ((parse "r0l_r0h") (print "r0l_r0h")) () () 1778 ) 1779 1780 (define-full-operand Regsetpop "popm regset" (all-isas) h-uint 1781 DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ()) 1782 (define-full-operand Regsetpush "pushm regset" (all-isas) h-uint 1783 DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ()) 1784 1785 (dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1) 1786 (dnop An16-push-S "a[01]" (MACH16 m16c-isa) h-ar-HI f-4-1) 1787 1788 ;------------------------------------------------------------- 1789 ; Offsets and absolutes 1790 ;------------------------------------------------------------- 1791 1792 (define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas) 1793 h-uint DFLT f-dsp-8-u6 1794 ((parse "unsigned6")) () () 1795 ) 1796 (define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas) 1797 h-uint DFLT f-dsp-8-u8 1798 ((parse "unsigned8")) () () 1799 ) 1800 (define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas) 1801 h-uint DFLT f-dsp-8-u16 1802 ((parse "unsigned16")) () () 1803 ) 1804 (define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas) 1805 h-sint DFLT f-dsp-8-s8 1806 ((parse "signed8")) () () 1807 ) 1808 (define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas) 1809 h-sint DFLT f-dsp-8-s24 1810 ((parse "signed24")) () () 1811 ) 1812 (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas) 1813 h-uint DFLT f-dsp-8-u24 1814 ((parse "unsigned24")) () () 1815 ) 1816 (define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas) 1817 h-uint DFLT f-dsp-10-u6 1818 ((parse "unsigned6")) () () 1819 ) 1820 (define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas) 1821 h-uint DFLT f-dsp-16-u8 1822 ((parse "unsigned8")) () () 1823 ) 1824 (define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas) 1825 h-uint DFLT f-dsp-16-u16 1826 ((parse "unsigned16")) () () 1827 ) 1828 (define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas) 1829 h-uint DFLT f-dsp-16-u24 1830 ((parse "unsigned20")) () () 1831 ) 1832 (define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas) 1833 h-uint DFLT f-dsp-16-u24 1834 ((parse "unsigned24")) () () 1835 ) 1836 (define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas) 1837 h-sint DFLT f-dsp-16-s8 1838 ((parse "signed8")) () () 1839 ) 1840 (define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas) 1841 h-sint DFLT f-dsp-16-s16 1842 ((parse "signed16")) () () 1843 ) 1844 (define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas) 1845 h-uint DFLT f-dsp-24-u8 1846 ((parse "unsigned8")) () () 1847 ) 1848 (define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas) 1849 h-uint DFLT f-dsp-24-u16 1850 ((parse "unsigned16")) () () 1851 ) 1852 (define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas) 1853 h-uint DFLT f-dsp-24-u24 1854 ((parse "unsigned20")) () () 1855 ) 1856 (define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas) 1857 h-uint DFLT f-dsp-24-u24 1858 ((parse "unsigned24")) () () 1859 ) 1860 (define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas) 1861 h-sint DFLT f-dsp-24-s8 1862 ((parse "signed8")) () () 1863 ) 1864 (define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas) 1865 h-sint DFLT f-dsp-24-s16 1866 ((parse "signed16")) () () 1867 ) 1868 (define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas) 1869 h-uint DFLT f-dsp-32-u8 1870 ((parse "unsigned8")) () () 1871 ) 1872 (define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas) 1873 h-uint DFLT f-dsp-32-u16 1874 ((parse "unsigned16")) () () 1875 ) 1876 (define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas) 1877 h-uint DFLT f-dsp-32-u24 1878 ((parse "unsigned24")) () () 1879 ) 1880 (define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas) 1881 h-uint DFLT f-dsp-32-u24 1882 ((parse "unsigned20")) () () 1883 ) 1884 (define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas) 1885 h-sint DFLT f-dsp-32-s8 1886 ((parse "signed8")) () () 1887 ) 1888 (define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas) 1889 h-sint DFLT f-dsp-32-s16 1890 ((parse "signed16")) () () 1891 ) 1892 (define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas) 1893 h-uint DFLT f-dsp-40-u8 1894 ((parse "unsigned8")) () () 1895 ) 1896 (define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas) 1897 h-sint DFLT f-dsp-40-s8 1898 ((parse "signed8")) () () 1899 ) 1900 (define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas) 1901 h-uint DFLT f-dsp-40-u16 1902 ((parse "unsigned16")) () () 1903 ) 1904 (define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas) 1905 h-sint DFLT f-dsp-40-s16 1906 ((parse "signed16")) () () 1907 ) 1908 (define-full-operand Dsp-40-u20 "unsigned 20 bit displacement at offset 40 bits" (all-isas) 1909 h-uint DFLT f-dsp-40-u20 1910 ((parse "unsigned20")) () () 1911 ) 1912 (define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas) 1913 h-uint DFLT f-dsp-40-u24 1914 ((parse "unsigned24")) () () 1915 ) 1916 (define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas) 1917 h-uint DFLT f-dsp-48-u8 1918 ((parse "unsigned8")) () () 1919 ) 1920 (define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas) 1921 h-sint DFLT f-dsp-48-s8 1922 ((parse "signed8")) () () 1923 ) 1924 (define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas) 1925 h-uint DFLT f-dsp-48-u16 1926 ((parse "unsigned16")) () () 1927 ) 1928 (define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas) 1929 h-sint DFLT f-dsp-48-s16 1930 ((parse "signed16")) () () 1931 ) 1932 (define-full-operand Dsp-48-u20 "unsigned 24 bit displacement at offset 40 bits" (all-isas) 1933 h-uint DFLT f-dsp-48-u20 1934 ((parse "unsigned24")) () () 1935 ) 1936 (define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas) 1937 h-uint DFLT f-dsp-48-u24 1938 ((parse "unsigned24")) () () 1939 ) 1940 1941 (define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas) 1942 h-sint DFLT f-imm-8-s4 1943 ((parse "signed4")) () () 1944 ) 1945 (define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas) 1946 h-sint DFLT f-imm-8-s4 1947 ((parse "signed4n") (print "signed4n")) () () 1948 ) 1949 (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas) 1950 h-shimm DFLT f-imm-8-s4 1951 () () () 1952 ) 1953 (define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas) 1954 h-sint DFLT f-dsp-8-s8 1955 ((parse "signed8")) () () 1956 ) 1957 (define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas) 1958 h-sint DFLT f-dsp-8-s16 1959 ((parse "signed16")) () () 1960 ) 1961 (define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas) 1962 h-sint DFLT f-imm-12-s4 1963 ((parse "signed4")) () () 1964 ) 1965 (define-full-operand Imm-12-s4n "negated 4 bit immediate at offset 12 bits" (all-isas) 1966 h-sint DFLT f-imm-12-s4 1967 ((parse "signed4n") (print "signed4n")) () () 1968 ) 1969 (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas) 1970 h-shimm DFLT f-imm-12-s4 1971 () () () 1972 ) 1973 (define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas) 1974 h-sint DFLT f-imm-13-u3 1975 ((parse "signed4")) () () 1976 ) 1977 (define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas) 1978 h-sint DFLT f-imm-20-s4 1979 ((parse "signed4")) () () 1980 ) 1981 (define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas) 1982 h-shimm DFLT f-imm-20-s4 1983 () () () 1984 ) 1985 (define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas) 1986 h-sint DFLT f-dsp-16-s8 1987 ((parse "signed8")) () () 1988 ) 1989 (define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas) 1990 h-sint DFLT f-dsp-16-s16 1991 ((parse "signed16")) () () 1992 ) 1993 (define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas) 1994 h-sint DFLT f-dsp-16-s32 1995 ((parse "signed32")) () () 1996 ) 1997 (define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas) 1998 h-sint DFLT f-dsp-24-s8 1999 ((parse "signed8")) () () 2000 ) 2001 (define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas) 2002 h-sint DFLT f-dsp-24-s16 2003 ((parse "signed16")) () () 2004 ) 2005 (define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas) 2006 h-sint DFLT f-dsp-24-s32 2007 ((parse "signed32")) () () 2008 ) 2009 (define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas) 2010 h-sint DFLT f-dsp-32-s8 2011 ((parse "signed8")) () () 2012 ) 2013 (define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas) 2014 h-sint DFLT f-dsp-32-s32 2015 ((parse "signed32")) () () 2016 ) 2017 (define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas) 2018 h-sint DFLT f-dsp-32-s16 2019 ((parse "signed16")) () () 2020 ) 2021 (define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas) 2022 h-sint DFLT f-dsp-40-s8 2023 ((parse "signed8")) () () 2024 ) 2025 (define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas) 2026 h-sint DFLT f-dsp-40-s16 2027 ((parse "signed16")) () () 2028 ) 2029 (define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas) 2030 h-sint DFLT f-dsp-40-s32 2031 ((parse "signed32")) () () 2032 ) 2033 (define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas) 2034 h-sint DFLT f-dsp-48-s8 2035 ((parse "signed8")) () () 2036 ) 2037 (define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas) 2038 h-sint DFLT f-dsp-48-s16 2039 ((parse "signed16")) () () 2040 ) 2041 (define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas) 2042 h-sint DFLT f-dsp-48-s32 2043 ((parse "signed32")) () () 2044 ) 2045 (define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas) 2046 h-sint DFLT f-dsp-56-s8 2047 ((parse "signed8")) () () 2048 ) 2049 (define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas) 2050 h-sint DFLT f-dsp-56-s16 2051 ((parse "signed16")) () () 2052 ) 2053 (define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas) 2054 h-sint DFLT f-dsp-64-s16 2055 ((parse "signed16")) () () 2056 ) 2057 (define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa) 2058 h-sint DFLT f-imm1-S 2059 ((parse "imm1_S")) () () 2060 ) 2061 (define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa) 2062 h-sint DFLT f-imm3-S 2063 ((parse "imm3_S")) () () 2064 ) 2065 (define-full-operand Bit3-S "3 bit bit number" (m32c-isa) 2066 h-sint DFLT f-imm3-S 2067 ((parse "bit3_S")) () () 2068 ) 2069 2070 ;------------------------------------------------------------- 2071 ; Bit numbers 2072 ;------------------------------------------------------------- 2073 2074 (define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa) 2075 h-uint DFLT f-dsp-16-u8 2076 ((parse "Bitno16R")) () () 2077 ) 2078 (dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed) 2079 (dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed) 2080 2081 (define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa) 2082 h-uint DFLT f-dsp-16-u8 2083 ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () () 2084 ) 2085 (define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa) 2086 h-sint DFLT f-dsp-16-s8 2087 ((parse "signed_bitbase8") (print "signed_bitbase")) () () 2088 ) 2089 (define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa) 2090 h-uint DFLT f-dsp-16-u16 2091 ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () () 2092 ) 2093 (define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa) 2094 h-uint DFLT f-bitbase16-u11-S 2095 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () () 2096 ) 2097 2098 (define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa) 2099 h-uint DFLT f-bitbase32-16-u11-unprefixed 2100 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () () 2101 ) 2102 (define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa) 2103 h-sint DFLT f-bitbase32-16-s11-unprefixed 2104 ((parse "signed_bitbase11") (print "signed_bitbase")) () () 2105 ) 2106 (define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa) 2107 h-uint DFLT f-bitbase32-16-u19-unprefixed 2108 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () () 2109 ) 2110 (define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa) 2111 h-sint DFLT f-bitbase32-16-s19-unprefixed 2112 ((parse "signed_bitbase19") (print "signed_bitbase")) () () 2113 ) 2114 (define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa) 2115 h-uint DFLT f-bitbase32-16-u27-unprefixed 2116 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () () 2117 ) 2118 (define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa) 2119 h-uint DFLT f-bitbase32-24-u11-prefixed 2120 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () () 2121 ) 2122 (define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa) 2123 h-sint DFLT f-bitbase32-24-s11-prefixed 2124 ((parse "signed_bitbase11") (print "signed_bitbase")) () () 2125 ) 2126 (define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa) 2127 h-uint DFLT f-bitbase32-24-u19-prefixed 2128 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () () 2129 ) 2130 (define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa) 2131 h-sint DFLT f-bitbase32-24-s19-prefixed 2132 ((parse "signed_bitbase19") (print "signed_bitbase")) () () 2133 ) 2134 (define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa) 2135 h-uint DFLT f-bitbase32-24-u27-prefixed 2136 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () () 2137 ) 2138 ;------------------------------------------------------------- 2139 ; Labels 2140 ;------------------------------------------------------------- 2141 2142 (define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX) 2143 h-iaddr DFLT f-lab-5-3 2144 ((parse "lab_5_3")) () () ) 2145 2146 (define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX) 2147 h-iaddr DFLT f-lab32-jmp-s 2148 ((parse "lab_5_3")) () () ) 2149 2150 (dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8) 2151 (dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16) 2152 (dnop Lab-8-24 "24 bit label" (all-isas RELAX) h-iaddr f-lab-8-24) 2153 (dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8) 2154 (dnop Lab-24-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-24-8) 2155 (dnop Lab-32-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-32-8) 2156 (dnop Lab-40-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-40-8) 2157 2158 ;------------------------------------------------------------- 2159 ; Condition code bits 2160 ;------------------------------------------------------------- 2161 2162 (dnop sbit "negative bit" (SEM-ONLY all-isas) h-sbit f-nil) 2163 (dnop obit "overflow bit" (SEM-ONLY all-isas) h-obit f-nil) 2164 (dnop zbit "zero bit" (SEM-ONLY all-isas) h-zbit f-nil) 2165 (dnop cbit "carry bit" (SEM-ONLY all-isas) h-cbit f-nil) 2166 (dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil) 2167 (dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil) 2168 (dnop bbit "reg bank select bit" (SEM-ONLY all-isas) h-bbit f-nil) 2169 (dnop dbit "debug bit" (SEM-ONLY all-isas) h-dbit f-nil) 2170 2171 ;------------------------------------------------------------- 2172 ; Condition operands 2173 ;------------------------------------------------------------- 2174 2175 (define-pmacro (cond-operand mach offset) 2176 (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8)) 2177 ) 2178 2179 (cond-operand 16 16) 2180 (cond-operand 16 24) 2181 (cond-operand 16 32) 2182 (cond-operand 32 16) 2183 (cond-operand 32 24) 2184 (cond-operand 32 32) 2185 (cond-operand 32 40) 2186 2187 (dnop cond16c "condition" (m16c-isa) h-cond16c f-cond16) 2188 (dnop cond16j "condition" (m16c-isa) h-cond16j f-cond16) 2189 (dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5) 2190 (dnop cond32 "condition" (m32c-isa) h-cond32 f-cond32) 2191 (dnop cond32j "condition" (m32c-isa) h-cond32 f-cond32j) 2192 (dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16) 2193 (dnop flags16 "flags" (m16c-isa) h-flags f-9-3) 2194 (dnop flags32 "flags" (m32c-isa) h-flags f-13-3) 2195 (dnop cr16 "control" (m16c-isa) h-cr-16 f-9-3) 2196 (dnop cr1-Unprefixed-32 "control" (m32c-isa) h-cr1-32 f-13-3) 2197 (dnop cr1-Prefixed-32 "control" (m32c-isa) h-cr1-32 f-21-3) 2198 (dnop cr2-32 "control" (m32c-isa) h-cr2-32 f-13-3) 2199 (dnop cr3-Unprefixed-32 "control" (m32c-isa) h-cr3-32 f-13-3) 2200 (dnop cr3-Prefixed-32 "control" (m32c-isa) h-cr3-32 f-21-3) 2201 2202 ;------------------------------------------------------------- 2203 ; Suffixes 2204 ;------------------------------------------------------------- 2205 2206 (define-full-operand Z "Suffix for zero format insns" (all-isas) 2207 h-sint DFLT f-nil 2208 ((parse "Z") (print "Z")) () () 2209 ) 2210 (define-full-operand S "Suffix for short format insns" (all-isas) 2211 h-sint DFLT f-nil 2212 ((parse "S") (print "S")) () () 2213 ) 2214 (define-full-operand Q "Suffix for quick format insns" (all-isas) 2215 h-sint DFLT f-nil 2216 ((parse "Q") (print "Q")) () () 2217 ) 2218 (define-full-operand G "Suffix for general format insns" (all-isas) 2219 h-sint DFLT f-nil 2220 ((parse "G") (print "G")) () () 2221 ) 2222 (define-full-operand X "Empty suffix" (all-isas) 2223 h-sint DFLT f-nil 2224 ((parse "X") (print "X")) () () 2225 ) 2226 (define-full-operand size "any size specifier" (all-isas) 2227 h-sint DFLT f-nil 2228 ((parse "size") (print "size")) () () 2229 ) 2230 ;------------------------------------------------------------- 2231 ; Misc 2232 ;------------------------------------------------------------- 2233 2234 (dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil) 2235 (dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil) 2236 (dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil) 2237 (dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil) 2238 2240 ;============================================================= 2241 ; Derived Operands 2242 2243 ; Memory reference macros that clip addresses appropriately. Refer to 2244 ; memory at ADDRESS in MODE, clipped appropriately for either the m16c 2245 ; or m32c. 2246 (define-pmacro (mem16 mode address) 2247 (mem mode (and #xffff address))) 2248 2249 (define-pmacro (mem20 mode address) 2250 (mem mode (and #xfffff address))) 2251 2252 (define-pmacro (mem32 mode address) 2253 (mem mode (and #xffffff address))) 2254 2255 ; Like mem16 and mem32, but takes MACH as a parameter. MACH must be 2256 ; either 16 or 32. 2257 (define-pmacro (mem-mach mach mode address) 2258 ((.sym mem mach) mode address)) 2259 2260 ;------------------------------------------------------------- 2261 ; Source 2262 ;------------------------------------------------------------- 2263 ; Rn direct 2264 ;------------------------------------------------------------- 2265 2266 (define-pmacro (src16-Rn-direct-operand xmode) 2267 (begin 2268 (define-derived-operand 2269 (name (.sym src16-Rn-direct- xmode)) 2270 (comment (.str "m16c Rn direct source " xmode)) 2271 (attrs (machine 16)) 2272 (mode xmode) 2273 (args ((.sym Src16Rn xmode))) 2274 (syntax (.str "$Src16Rn" xmode)) 2275 (base-ifield f-8-4) 2276 (encoding (+ (f-8-2 0) (.sym Src16Rn xmode))) 2277 (ifield-assertion (eq f-8-2 0)) 2278 (getter (trunc xmode (.sym Src16Rn xmode))) 2279 (setter (set (.sym Src16Rn xmode) newval)) 2280 ) 2281 ) 2282 ) 2283 (src16-Rn-direct-operand QI) 2284 (src16-Rn-direct-operand HI) 2285 2286 (define-pmacro (src32-Rn-direct-operand group base xmode) 2287 (begin 2288 (define-derived-operand 2289 (name (.sym src32-Rn-direct- group - xmode)) 2290 (comment (.str "m32c Rn direct source " xmode)) 2291 (attrs (machine 32)) 2292 (mode xmode) 2293 (args ((.sym Src32Rn group xmode))) 2294 (syntax (.str "$Src32Rn" group xmode)) 2295 (base-ifield (.sym f- base -11)) 2296 (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode))) 2297 (ifield-assertion (eq (.sym f- base -3) 4)) 2298 (getter (trunc xmode (.sym Src32Rn group xmode))) 2299 (setter (set (.sym Src32Rn group xmode) newval)) 2300 ) 2301 ) 2302 ) 2303 2304 (src32-Rn-direct-operand Unprefixed 1 QI) 2305 (src32-Rn-direct-operand Prefixed 9 QI) 2306 (src32-Rn-direct-operand Unprefixed 1 HI) 2307 (src32-Rn-direct-operand Prefixed 9 HI) 2308 (src32-Rn-direct-operand Unprefixed 1 SI) 2309 (src32-Rn-direct-operand Prefixed 9 SI) 2310 2311 ;------------------------------------------------------------- 2312 ; An direct 2313 ;------------------------------------------------------------- 2314 2315 (define-pmacro (src16-An-direct-operand xmode) 2316 (begin 2317 (define-derived-operand 2318 (name (.sym src16-An-direct- xmode)) 2319 (comment (.str "m16c An direct destination " xmode)) 2320 (attrs (machine 16)) 2321 (mode xmode) 2322 (args ((.sym Src16An xmode))) 2323 (syntax (.str "$Src16An" xmode)) 2324 (base-ifield f-8-4) 2325 (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode))) 2326 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0))) 2327 (getter (trunc xmode (.sym Src16An xmode))) 2328 (setter (set (.sym Src16An xmode) newval)) 2329 ) 2330 ) 2331 ) 2332 (src16-An-direct-operand QI) 2333 (src16-An-direct-operand HI) 2334 2335 (define-pmacro (src32-An-direct-operand group base1 base2 xmode) 2336 (begin 2337 (define-derived-operand 2338 (name (.sym src32-An-direct- group - xmode)) 2339 (comment (.str "m32c An direct destination " xmode)) 2340 (attrs (machine 32)) 2341 (mode xmode) 2342 (args ((.sym Src32An group xmode))) 2343 (syntax (.str "$Src32An" group xmode)) 2344 (base-ifield (.sym f- base1 -11)) 2345 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode))) 2346 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1))) 2347 (getter (trunc xmode (.sym Src32An group xmode))) 2348 (setter (set (.sym Src32An group xmode) newval)) 2349 ) 2350 ) 2351 ) 2352 2353 (src32-An-direct-operand Unprefixed 1 10 QI) 2354 (src32-An-direct-operand Unprefixed 1 10 HI) 2355 (src32-An-direct-operand Unprefixed 1 10 SI) 2356 (src32-An-direct-operand Prefixed 9 18 QI) 2357 (src32-An-direct-operand Prefixed 9 18 HI) 2358 (src32-An-direct-operand Prefixed 9 18 SI) 2359 2360 ;------------------------------------------------------------- 2361 ; An indirect 2362 ;------------------------------------------------------------- 2363 2364 (define-pmacro (src16-An-indirect-operand xmode) 2365 (begin 2366 (define-derived-operand 2367 (name (.sym src16-An-indirect- xmode)) 2368 (comment (.str "m16c An indirect destination " xmode)) 2369 (attrs (machine 16)) 2370 (mode xmode) 2371 (args (Src16An)) 2372 (syntax "[$Src16An]") 2373 (base-ifield f-8-4) 2374 (encoding (+ (f-8-2 1) (f-10-1 1) Src16An)) 2375 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1))) 2376 (getter (mem16 xmode Src16An)) 2377 (setter (set (mem16 xmode Src16An) newval)) 2378 ) 2379 ) 2380 ) 2381 (src16-An-indirect-operand QI) 2382 (src16-An-indirect-operand HI) 2383 2384 (define-pmacro (src32-An-indirect-operand group base1 base2 xmode) 2385 (begin 2386 (define-derived-operand 2387 (name (.sym src32-An-indirect- group - xmode)) 2388 (comment (.str "m32c An indirect destination " xmode)) 2389 (attrs (machine 32)) 2390 (mode xmode) 2391 (args ((.sym Src32An group))) 2392 (syntax (.str "[$Src32An" group "]")) 2393 (base-ifield (.sym f- base1 -11)) 2394 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group))) 2395 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0))) 2396 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) 2397 (const 0))) 2398 (setter (c-call DFLT (.str "operand_setter_" xmode) newval 2399 (.sym Src32An group) (const 0))) 2400 ; (getter (mem32 xmode (.sym Src32An group))) 2401 ; (setter (set (mem32 xmode (.sym Src32An group)) newval)) 2402 ) 2403 ) 2404 ) 2405 2406 (src32-An-indirect-operand Unprefixed 1 10 QI) 2407 (src32-An-indirect-operand Unprefixed 1 10 HI) 2408 (src32-An-indirect-operand Unprefixed 1 10 SI) 2409 (src32-An-indirect-operand Prefixed 9 18 QI) 2410 (src32-An-indirect-operand Prefixed 9 18 HI) 2411 (src32-An-indirect-operand Prefixed 9 18 SI) 2412 2413 ;------------------------------------------------------------- 2414 ; dsp:d[r] relative 2415 ;------------------------------------------------------------- 2416 2417 (define-pmacro (src16-relative-operand xmode) 2418 (begin 2419 (define-derived-operand 2420 (name (.sym src16-16-8-SB-relative- xmode)) 2421 (comment (.str "m16c dsp:8[sb] relative destination " xmode)) 2422 (attrs (machine 16)) 2423 (mode xmode) 2424 (args (Dsp-16-u8)) 2425 (syntax "${Dsp-16-u8}[sb]") 2426 (base-ifield f-8-4) 2427 (encoding (+ (f-8-4 #xA) Dsp-16-u8)) 2428 (ifield-assertion (eq f-8-4 #xA)) 2429 (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb)))) 2430 (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval)) 2431 ) 2432 (define-derived-operand 2433 (name (.sym src16-16-16-SB-relative- xmode)) 2434 (comment (.str "m16c dsp:16[sb] relative destination " xmode)) 2435 (attrs (machine 16)) 2436 (mode xmode) 2437 (args (Dsp-16-u16)) 2438 (syntax "${Dsp-16-u16}[sb]") 2439 (base-ifield f-8-4) 2440 (encoding (+ (f-8-4 #xE) Dsp-16-u16)) 2441 (ifield-assertion (eq f-8-4 #xE)) 2442 (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb)))) 2443 (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval)) 2444 ) 2445 (define-derived-operand 2446 (name (.sym src16-16-8-FB-relative- xmode)) 2447 (comment (.str "m16c dsp:8[fb] relative destination " xmode)) 2448 (attrs (machine 16)) 2449 (mode xmode) 2450 (args (Dsp-16-s8)) 2451 (syntax "${Dsp-16-s8}[fb]") 2452 (base-ifield f-8-4) 2453 (encoding (+ (f-8-4 #xB) Dsp-16-s8)) 2454 (ifield-assertion (eq f-8-4 #xB)) 2455 (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb)))) 2456 (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval)) 2457 ) 2458 (define-derived-operand 2459 (name (.sym src16-16-8-An-relative- xmode)) 2460 (comment (.str "m16c dsp:8[An] relative destination " xmode)) 2461 (attrs (machine 16)) 2462 (mode xmode) 2463 (args (Src16An Dsp-16-u8)) 2464 (syntax "${Dsp-16-u8}[$Src16An]") 2465 (base-ifield f-8-4) 2466 (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An)) 2467 (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0))) 2468 (getter (mem16 xmode (add Dsp-16-u8 Src16An))) 2469 (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval)) 2470 ) 2471 (define-derived-operand 2472 (name (.sym src16-16-16-An-relative- xmode)) 2473 (comment (.str "m16c dsp:16[An] relative destination " xmode)) 2474 (attrs (machine 16)) 2475 (mode xmode) 2476 (args (Src16An Dsp-16-u16)) 2477 (syntax "${Dsp-16-u16}[$Src16An]") 2478 (base-ifield f-8-4) 2479 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An)) 2480 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0))) 2481 (getter (mem16 xmode (add Dsp-16-u16 Src16An))) 2482 (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval)) 2483 ) 2484 (define-derived-operand 2485 (name (.sym src16-16-20-An-relative- xmode)) 2486 (comment (.str "m16c dsp:20[An] relative destination " xmode)) 2487 (attrs (machine 16)) 2488 (mode xmode) 2489 (args (Src16An Dsp-16-u20)) 2490 (syntax "${Dsp-16-u20}[$Src16An]") 2491 (base-ifield f-8-4) 2492 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u20 Src16An)) 2493 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0))) 2494 (getter (mem20 xmode (add Dsp-16-u20 Src16An))) 2495 (setter (set (mem20 xmode (add Dsp-16-u20 Src16An)) newval)) 2496 ) 2497 ) 2498 ) 2499 2500 (src16-relative-operand QI) 2501 (src16-relative-operand HI) 2502 2503 (define-pmacro (src32-relative-operand offset group base1 base2 xmode) 2504 (begin 2505 (define-derived-operand 2506 (name (.sym src32- offset -8-SB-relative- group - xmode)) 2507 (comment (.str "m32c dsp:8[sb] relative destination " xmode)) 2508 (attrs (machine 32)) 2509 (mode xmode) 2510 (args ((.sym Dsp- offset -u8))) 2511 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 2512 (base-ifield (.sym f- base1 -11)) 2513 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8))) 2514 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2))) 2515 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8))) 2516 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8))) 2517 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb)))) 2518 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 2519 ) 2520 (define-derived-operand 2521 (name (.sym src32- offset -16-SB-relative- group - xmode)) 2522 (comment (.str "m32c dsp:16[sb] relative destination " xmode)) 2523 (attrs (machine 32)) 2524 (mode xmode) 2525 (args ((.sym Dsp- offset -u16))) 2526 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 2527 (base-ifield (.sym f- base1 -11)) 2528 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16))) 2529 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2))) 2530 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16))) 2531 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16))) 2532 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb)))) 2533 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 2534 ) 2535 (define-derived-operand 2536 (name (.sym src32- offset -8-FB-relative- group - xmode)) 2537 (comment (.str "m32c dsp:8[fb] relative destination " xmode)) 2538 (attrs (machine 32)) 2539 (mode xmode) 2540 (args ((.sym Dsp- offset -s8))) 2541 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 2542 (base-ifield (.sym f- base1 -11)) 2543 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8))) 2544 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3))) 2545 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8))) 2546 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8))) 2547 ; (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb)))) 2548 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 2549 ) 2550 (define-derived-operand 2551 (name (.sym src32- offset -16-FB-relative- group - xmode)) 2552 (comment (.str "m32c dsp:16[fb] relative destination " xmode)) 2553 (attrs (machine 32)) 2554 (mode xmode) 2555 (args ((.sym Dsp- offset -s16))) 2556 (syntax (.str "${Dsp-" offset "-s16}[fb]")) 2557 (base-ifield (.sym f- base1 -11)) 2558 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16))) 2559 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3))) 2560 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16))) 2561 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16))) 2562 ; (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb)))) 2563 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval)) 2564 ) 2565 (define-derived-operand 2566 (name (.sym src32- offset -8-An-relative- group - xmode)) 2567 (comment (.str "m32c dsp:8[An] relative destination " xmode)) 2568 (attrs (machine 32)) 2569 (mode xmode) 2570 (args ((.sym Src32An group) (.sym Dsp- offset -u8))) 2571 (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]")) 2572 (base-ifield (.sym f- base1 -11)) 2573 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group))) 2574 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0))) 2575 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8))) 2576 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8))) 2577 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group)))) 2578 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval)) 2579 ) 2580 (define-derived-operand 2581 (name (.sym src32- offset -16-An-relative- group - xmode)) 2582 (comment (.str "m32c dsp:16[An] relative destination " xmode)) 2583 (attrs (machine 32)) 2584 (mode xmode) 2585 (args ((.sym Src32An group) (.sym Dsp- offset -u16))) 2586 (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]")) 2587 (base-ifield (.sym f- base1 -11)) 2588 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group))) 2589 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0))) 2590 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16))) 2591 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16))) 2592 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group)))) 2593 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval)) 2594 ) 2595 (define-derived-operand 2596 (name (.sym src32- offset -24-An-relative- group - xmode)) 2597 (comment (.str "m32c dsp:16[An] relative destination " xmode)) 2598 (attrs (machine 32)) 2599 (mode xmode) 2600 (args ((.sym Src32An group) (.sym Dsp- offset -u24))) 2601 (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]")) 2602 (base-ifield (.sym f- base1 -11)) 2603 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group))) 2604 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0))) 2605 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) )) 2606 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24))) 2607 ; (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group)))) 2608 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval)) 2609 ) 2610 ) 2611 ) 2612 2613 (src32-relative-operand 16 Unprefixed 1 10 QI) 2614 (src32-relative-operand 16 Unprefixed 1 10 HI) 2615 (src32-relative-operand 16 Unprefixed 1 10 SI) 2616 (src32-relative-operand 24 Prefixed 9 18 QI) 2617 (src32-relative-operand 24 Prefixed 9 18 HI) 2618 (src32-relative-operand 24 Prefixed 9 18 SI) 2619 2620 ;------------------------------------------------------------- 2621 ; Absolute address 2622 ;------------------------------------------------------------- 2623 2624 (define-pmacro (src16-absolute xmode) 2625 (begin 2626 (define-derived-operand 2627 (name (.sym src16-16-16-absolute- xmode)) 2628 (comment (.str "m16c absolute address " xmode)) 2629 (attrs (machine 16)) 2630 (mode xmode) 2631 (args (Dsp-16-u16)) 2632 (syntax (.str "${Dsp-16-u16}")) 2633 (base-ifield f-8-4) 2634 (encoding (+ (f-8-4 #xF) Dsp-16-u16)) 2635 (ifield-assertion (eq f-8-4 #xF)) 2636 (getter (mem16 xmode Dsp-16-u16)) 2637 (setter (set (mem16 xmode Dsp-16-u16) newval)) 2638 ) 2639 ) 2640 ) 2641 2642 (src16-absolute QI) 2643 (src16-absolute HI) 2644 2645 (define-pmacro (src32-absolute offset group base1 base2 xmode) 2646 (begin 2647 (define-derived-operand 2648 (name (.sym src32- offset -16-absolute- group - xmode)) 2649 (comment (.str "m32c absolute address " xmode)) 2650 (attrs (machine 32)) 2651 (mode xmode) 2652 (args ((.sym Dsp- offset -u16))) 2653 (syntax (.str "${Dsp-" offset "-u16}")) 2654 (base-ifield (.sym f- base1 -11)) 2655 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16))) 2656 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 2657 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16))) 2658 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16))) 2659 ; (getter (mem32 xmode (.sym Dsp- offset -u16))) 2660 ; (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval)) 2661 ) 2662 (define-derived-operand 2663 (name (.sym src32- offset -24-absolute- group - xmode)) 2664 (comment (.str "m32c absolute address " xmode)) 2665 (attrs (machine 32)) 2666 (mode xmode) 2667 (args ((.sym Dsp- offset -u24))) 2668 (syntax (.str "${Dsp-" offset "-u24}")) 2669 (base-ifield (.sym f- base1 -11)) 2670 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24))) 2671 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 2672 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24))) 2673 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24))) 2674 ; (getter (mem32 xmode (.sym Dsp- offset -u24))) 2675 ; (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval)) 2676 ) 2677 ) 2678 ) 2679 2680 (src32-absolute 16 Unprefixed 1 10 QI) 2681 (src32-absolute 16 Unprefixed 1 10 HI) 2682 (src32-absolute 16 Unprefixed 1 10 SI) 2683 (src32-absolute 24 Prefixed 9 18 QI) 2684 (src32-absolute 24 Prefixed 9 18 HI) 2685 (src32-absolute 24 Prefixed 9 18 SI) 2686 2687 ;------------------------------------------------------------- 2688 ; An indirect indirect 2689 ; 2690 ; Double indirect addressing uses the lower 3 bytes of the value stored 2691 ; at the address referenced by 'op' as the effective address. 2692 ;------------------------------------------------------------- 2693 2694 (define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff)) 2695 2696 ; (define-pmacro (src-An-indirect-indirect-operand xmode) 2697 ; (define-derived-operand 2698 ; (name (.sym src32-An-indirect-indirect- xmode)) 2699 ; (comment (.str "m32c An indirect indirect destination " xmode)) 2700 ; (attrs (machine 32)) 2701 ; (mode xmode) 2702 ; (args (Src32AnPrefixed)) 2703 ; (syntax (.str "[[$Src32AnPrefixed]]")) 2704 ; (base-ifield f-9-11) 2705 ; (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed)) 2706 ; (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0))) 2707 ; (getter (mem32 xmode (indirect-addr Src32AnPrefixed))) 2708 ; (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval)) 2709 ; ) 2710 ; ) 2711 2712 ; (src-An-indirect-indirect-operand QI) 2713 ; (src-An-indirect-indirect-operand HI) 2714 ; (src-An-indirect-indirect-operand SI) 2715 2716 ;------------------------------------------------------------- 2717 ; Relative indirect 2718 ;------------------------------------------------------------- 2719 2720 (define-pmacro (src-relative-indirect-operand xmode) 2721 (begin 2722 ; (define-derived-operand 2723 ; (name (.sym src32-24-8-SB-relative-indirect- xmode)) 2724 ; (comment (.str "m32c dsp:8[sb] relative source " xmode)) 2725 ; (attrs (machine 32)) 2726 ; (mode xmode) 2727 ; (args (Dsp-24-u8)) 2728 ; (syntax "[${Dsp-24-u8}[sb]]") 2729 ; (base-ifield f-9-11) 2730 ; (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8)) 2731 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2))) 2732 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb))))) 2733 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval)) 2734 ; ) 2735 ; (define-derived-operand 2736 ; (name (.sym src32-24-16-SB-relative-indirect- xmode)) 2737 ; (comment (.str "m32c dsp:16[sb] relative source " xmode)) 2738 ; (attrs (machine 32)) 2739 ; (mode xmode) 2740 ; (args (Dsp-24-u16)) 2741 ; (syntax "[${Dsp-24-u16}[sb]]") 2742 ; (base-ifield f-9-11) 2743 ; (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16)) 2744 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2))) 2745 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb))))) 2746 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval)) 2747 ; ) 2748 ; (define-derived-operand 2749 ; (name (.sym src32-24-8-FB-relative-indirect- xmode)) 2750 ; (comment (.str "m32c dsp:8[fb] relative source " xmode)) 2751 ; (attrs (machine 32)) 2752 ; (mode xmode) 2753 ; (args (Dsp-24-s8)) 2754 ; (syntax "[${Dsp-24-s8}[fb]]") 2755 ; (base-ifield f-9-11) 2756 ; (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8)) 2757 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3))) 2758 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb))))) 2759 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval)) 2760 ; ) 2761 ; (define-derived-operand 2762 ; (name (.sym src32-24-16-FB-relative-indirect- xmode)) 2763 ; (comment (.str "m32c dsp:16[fb] relative source " xmode)) 2764 ; (attrs (machine 32)) 2765 ; (mode xmode) 2766 ; (args (Dsp-24-s16)) 2767 ; (syntax "[${Dsp-24-s16}[fb]]") 2768 ; (base-ifield f-9-11) 2769 ; (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16)) 2770 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3))) 2771 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb))))) 2772 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval)) 2773 ; ) 2774 ; (define-derived-operand 2775 ; (name (.sym src32-24-8-An-relative-indirect- xmode)) 2776 ; (comment (.str "m32c dsp:8[An] relative indirect source " xmode)) 2777 ; (attrs (machine 32)) 2778 ; (mode xmode) 2779 ; (args (Src32AnPrefixed Dsp-24-u8)) 2780 ; (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]") 2781 ; (base-ifield f-9-11) 2782 ; (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed)) 2783 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0))) 2784 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed)))) 2785 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval)) 2786 ; ) 2787 ; (define-derived-operand 2788 ; (name (.sym src32-24-16-An-relative-indirect- xmode)) 2789 ; (comment (.str "m32c dsp:16[An] relative source " xmode)) 2790 ; (attrs (machine 32)) 2791 ; (mode xmode) 2792 ; (args (Src32AnPrefixed Dsp-24-u16)) 2793 ; (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]") 2794 ; (base-ifield f-9-11) 2795 ; (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed)) 2796 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0))) 2797 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed)))) 2798 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval)) 2799 ; ) 2800 ; (define-derived-operand 2801 ; (name (.sym src32-24-24-An-relative-indirect- xmode)) 2802 ; (comment (.str "m32c dsp:24[An] relative source " xmode)) 2803 ; (attrs (machine 32)) 2804 ; (mode xmode) 2805 ; (args (Src32AnPrefixed Dsp-24-u24)) 2806 ; (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]") 2807 ; (base-ifield f-9-11) 2808 ; (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed)) 2809 ; (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0))) 2810 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed)))) 2811 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval)) 2812 ; ) 2813 ) 2814 ) 2815 2816 ; (src-relative-indirect-operand QI) 2817 ; (src-relative-indirect-operand HI) 2818 ; (src-relative-indirect-operand SI) 2819 2820 ;------------------------------------------------------------- 2821 ; Absolute Indirect address 2822 ;------------------------------------------------------------- 2823 2824 (define-pmacro (src32-absolute-indirect offset base1 base2 xmode) 2825 (begin 2826 ; (define-derived-operand 2827 ; (name (.sym src32- offset -16-absolute-indirect-derived- xmode)) 2828 ; (comment (.str "m32c absolute indirect address " xmode)) 2829 ; (attrs (machine 32)) 2830 ; (mode xmode) 2831 ; (args ((.sym Dsp- offset -u16))) 2832 ; (syntax (.str "[${Dsp-" offset "-u16}]")) 2833 ; (base-ifield (.sym f- base1 -11)) 2834 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16))) 2835 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 2836 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16)))) 2837 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval)) 2838 ; ) 2839 ; (define-derived-operand 2840 ; (name (.sym src32- offset -24-absolute-indirect-derived- xmode)) 2841 ; (comment (.str "m32c absolute indirect address " xmode)) 2842 ; (attrs (machine 32)) 2843 ; (mode xmode) 2844 ; (args ((.sym Dsp- offset -u24))) 2845 ; (syntax (.str "[${Dsp-" offset "-u24}]")) 2846 ; (base-ifield (.sym f- base1 -11)) 2847 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24))) 2848 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 2849 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24)))) 2850 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval)) 2851 ; ) 2852 ) 2853 ) 2854 2855 (src32-absolute-indirect 24 9 18 QI) 2856 (src32-absolute-indirect 24 9 18 HI) 2857 (src32-absolute-indirect 24 9 18 SI) 2858 2859 ;------------------------------------------------------------- 2860 ; Register relative source operands for short format insns 2861 ;------------------------------------------------------------- 2862 2863 (define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3) 2864 (begin 2865 (define-derived-operand 2866 (name (.sym src mach -2-S-8-SB-relative- xmode)) 2867 (comment (.str "m" mach "c SB relative address")) 2868 (attrs (machine mach)) 2869 (mode xmode) 2870 (args (Dsp-8-u8)) 2871 (syntax "${Dsp-8-u8}[sb]") 2872 (base-ifield (.sym f- base -2)) 2873 (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8)) 2874 (ifield-assertion (eq (.sym f- base -2) opc1)) 2875 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8)) 2876 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8)) 2877 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8)))) 2878 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval)) 2879 ) 2880 (define-derived-operand 2881 (name (.sym src mach -2-S-8-FB-relative- xmode)) 2882 (comment (.str "m" mach "c FB relative address")) 2883 (attrs (machine mach)) 2884 (mode xmode) 2885 (args (Dsp-8-s8)) 2886 (syntax "${Dsp-8-s8}[fb]") 2887 (base-ifield (.sym f- base -2)) 2888 (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8)) 2889 (ifield-assertion (eq (.sym f- base -2) opc2)) 2890 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8)) 2891 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8)) 2892 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8)))) 2893 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval)) 2894 ) 2895 (define-derived-operand 2896 (name (.sym src mach -2-S-16-absolute- xmode)) 2897 (comment (.str "m" mach "c absolute address")) 2898 (attrs (machine mach)) 2899 (mode xmode) 2900 (args (Dsp-8-u16)) 2901 (syntax "${Dsp-8-u16}") 2902 (base-ifield (.sym f- base -2)) 2903 (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16)) 2904 (ifield-assertion (eq (.sym f- base -2) opc3)) 2905 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16)) 2906 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16)) 2907 ; (getter (mem-mach mach xmode Dsp-8-u16)) 2908 ; (setter (set (mem-mach mach xmode Dsp-8-u16) newval)) 2909 ) 2910 ) 2911 ) 2912 2913 (src-2-S-operands 16 QI 6 1 2 3) 2914 (src-2-S-operands 32 QI 2 2 3 1) 2915 (src-2-S-operands 32 HI 2 2 3 1) 2916 2917 ;============================================================= 2918 ; Derived Operands 2919 ;------------------------------------------------------------- 2920 ; Destination 2921 ;------------------------------------------------------------- 2922 ; Rn direct 2923 ;------------------------------------------------------------- 2924 2925 (define-pmacro (dst16-Rn-direct-operand xmode) 2926 (begin 2927 (define-derived-operand 2928 (name (.sym dst16-Rn-direct- xmode)) 2929 (comment (.str "m16c Rn direct destination " xmode)) 2930 (attrs (machine 16)) 2931 (mode xmode) 2932 (args ((.sym Dst16Rn xmode))) 2933 (syntax (.str "$Dst16Rn" xmode)) 2934 (base-ifield f-12-4) 2935 (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode))) 2936 (ifield-assertion (eq f-12-2 0)) 2937 (getter (trunc xmode (.sym Dst16Rn xmode))) 2938 (setter (set (.sym Dst16Rn xmode) newval)) 2939 ) 2940 ) 2941 ) 2942 2943 (dst16-Rn-direct-operand QI) 2944 (dst16-Rn-direct-operand HI) 2945 (dst16-Rn-direct-operand SI) 2946 2947 (define-derived-operand 2948 (name dst16-Rn-direct-Ext-QI) 2949 (comment "m16c Rn direct destination QI") 2950 (attrs (machine 16)) 2951 (mode HI) 2952 (args (Dst16RnExtQI)) 2953 (syntax "$Dst16RnExtQI") 2954 (base-ifield f-12-4) 2955 (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0))) 2956 (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0))) 2957 (getter (trunc QI (.sym Dst16RnExtQI))) 2958 (setter (set Dst16RnExtQI newval)) 2959 ) 2960 2961 (define-pmacro (dst32-Rn-direct-operand group base xmode) 2962 (begin 2963 (define-derived-operand 2964 (name (.sym dst32-Rn-direct- group - xmode)) 2965 (comment (.str "m32c Rn direct destination " xmode)) 2966 (attrs (machine 32)) 2967 (mode xmode) 2968 (args ((.sym Dst32Rn group xmode))) 2969 (syntax (.str "$Dst32Rn" group xmode)) 2970 (base-ifield (.sym f- base -6)) 2971 (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode))) 2972 (ifield-assertion (eq (.sym f- base -3) 4)) 2973 (getter (trunc xmode (.sym Dst32Rn group xmode))) 2974 (setter (set (.sym Dst32Rn group xmode) newval)) 2975 ) 2976 ) 2977 ) 2978 2979 (dst32-Rn-direct-operand Unprefixed 4 QI) 2980 (dst32-Rn-direct-operand Prefixed 12 QI) 2981 (dst32-Rn-direct-operand Unprefixed 4 HI) 2982 (dst32-Rn-direct-operand Prefixed 12 HI) 2983 (dst32-Rn-direct-operand Unprefixed 4 SI) 2984 (dst32-Rn-direct-operand Prefixed 12 SI) 2985 2986 (define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode) 2987 (begin 2988 (define-derived-operand 2989 (name (.sym dst32-Rn-direct- group - smode)) 2990 (comment (.str "m32c Rn direct destination " smode)) 2991 (attrs (machine 32)) 2992 (mode dmode) 2993 (args ((.sym Dst32Rn group smode))) 2994 (syntax (.str "$Dst32Rn" group smode)) 2995 (base-ifield (.sym f- base1 -6)) 2996 (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode))) 2997 (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1))) 2998 (getter (trunc smode (.sym Dst32Rn group smode))) 2999 (setter (set (.sym Dst32Rn group smode) newval)) 3000 ) 3001 ) 3002 ) 3003 3004 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI) 3005 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI) 3006 3007 (define-derived-operand 3008 (name dst32-R3-direct-Unprefixed-HI) 3009 (comment "m32c R3 direct HI") 3010 (attrs (machine 32)) 3011 (mode HI) 3012 (args (R3)) 3013 (syntax "$R3") 3014 (base-ifield f-4-6) 3015 (encoding (+ (f-4-3 4) (f-8-2 #x1))) 3016 (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1))) 3017 (getter (trunc HI R3)) 3018 (setter (set R3 newval)) 3019 ) 3020 ;------------------------------------------------------------- 3021 ; An direct 3022 ;------------------------------------------------------------- 3023 3024 (define-pmacro (dst16-An-direct-operand xmode) 3025 (begin 3026 (define-derived-operand 3027 (name (.sym dst16-An-direct- xmode)) 3028 (comment (.str "m16c An direct destination " xmode)) 3029 (attrs (machine 16)) 3030 (mode xmode) 3031 (args ((.sym Dst16An xmode))) 3032 (syntax (.str "$Dst16An" xmode)) 3033 (base-ifield f-12-4) 3034 (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode))) 3035 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0))) 3036 (getter (trunc xmode (.sym Dst16An xmode))) 3037 (setter (set (.sym Dst16An xmode) newval)) 3038 ) 3039 ) 3040 ) 3041 3042 (dst16-An-direct-operand QI) 3043 (dst16-An-direct-operand HI) 3044 (dst16-An-direct-operand SI) 3045 3046 (define-pmacro (dst32-An-direct-operand group base1 base2 xmode) 3047 (begin 3048 (define-derived-operand 3049 (name (.sym dst32-An-direct- group - xmode)) 3050 (comment (.str "m32c An direct destination " xmode)) 3051 (attrs (machine 32)) 3052 (mode xmode) 3053 (args ((.sym Dst32An group xmode))) 3054 (syntax (.str "$Dst32An" group xmode)) 3055 (base-ifield (.sym f- base1 -6)) 3056 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode))) 3057 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1))) 3058 (getter (trunc xmode (.sym Dst32An group xmode))) 3059 (setter (set (.sym Dst32An group xmode) newval)) 3060 ) 3061 ) 3062 ) 3063 3064 (dst32-An-direct-operand Unprefixed 4 8 QI) 3065 (dst32-An-direct-operand Prefixed 12 16 QI) 3066 (dst32-An-direct-operand Unprefixed 4 8 HI) 3067 (dst32-An-direct-operand Prefixed 12 16 HI) 3068 (dst32-An-direct-operand Unprefixed 4 8 SI) 3069 (dst32-An-direct-operand Prefixed 12 16 SI) 3070 3071 ;------------------------------------------------------------- 3072 ; An indirect 3073 ;------------------------------------------------------------- 3074 3075 (define-pmacro (dst16-An-indirect-operand xmode) 3076 (begin 3077 (define-derived-operand 3078 (name (.sym dst16-An-indirect- xmode)) 3079 (comment (.str "m16c An indirect destination " xmode)) 3080 (attrs (machine 16)) 3081 (mode xmode) 3082 (args (Dst16An)) 3083 (syntax "[$Dst16An]") 3084 (base-ifield f-12-4) 3085 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An)) 3086 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1))) 3087 (getter (mem16 xmode Dst16An)) 3088 (setter (set (mem16 xmode Dst16An) newval)) 3089 ) 3090 ) 3091 ) 3092 3093 (dst16-An-indirect-operand QI) 3094 (dst16-An-indirect-operand HI) 3095 (dst16-An-indirect-operand SI) 3096 3097 (define-derived-operand 3098 (name dst16-An-indirect-Ext-QI) 3099 (comment "m16c An indirect destination QI") 3100 (attrs (machine 16)) 3101 (mode HI) 3102 (args (Dst16An)) 3103 (syntax "[$Dst16An]") 3104 (base-ifield f-12-4) 3105 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An)) 3106 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1))) 3107 (getter (mem16 QI Dst16An)) 3108 (setter (set (mem16 HI Dst16An) newval)) 3109 ) 3110 3111 (define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode) 3112 (begin 3113 (define-derived-operand 3114 (name (.sym dst32-An-indirect- group - smode)) 3115 (comment (.str "m32c An indirect destination " smode)) 3116 (attrs (machine 32)) 3117 (mode dmode) 3118 (args ((.sym Dst32An group))) 3119 (syntax (.str "[$Dst32An" group "]")) 3120 (base-ifield (.sym f- base1 -6)) 3121 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group))) 3122 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0))) 3123 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) 3124 (const 0))) 3125 (setter (c-call DFLT (.str "operand_setter_" dmode) newval 3126 (.sym Dst32An group) (const 0))) 3127 ; (getter (mem32 smode (.sym Dst32An group))) 3128 ; (setter (set (mem32 dmode (.sym Dst32An group)) newval)) 3129 ) 3130 ) 3131 ) 3132 3133 (dst32-An-indirect-operand Unprefixed 4 8 QI QI) 3134 (dst32-An-indirect-operand Prefixed 12 16 QI QI) 3135 (dst32-An-indirect-operand Unprefixed 4 8 HI HI) 3136 (dst32-An-indirect-operand Prefixed 12 16 HI HI) 3137 (dst32-An-indirect-operand Unprefixed 4 8 SI SI) 3138 (dst32-An-indirect-operand Prefixed 12 16 SI SI) 3139 (dst32-An-indirect-operand ExtUnprefixed 4 8 QI HI) 3140 (dst32-An-indirect-operand ExtUnprefixed 4 8 HI SI) 3141 3142 ;------------------------------------------------------------- 3143 ; dsp:d[r] relative 3144 ;------------------------------------------------------------- 3145 3146 (define-pmacro (dst16-relative-operand offset xmode) 3147 (begin 3148 (define-derived-operand 3149 (name (.sym dst16- offset -8-SB-relative- xmode)) 3150 (comment (.str "m16c dsp:8[sb] relative destination " xmode)) 3151 (attrs (machine 16)) 3152 (mode xmode) 3153 (args ((.sym Dsp- offset -u8))) 3154 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 3155 (base-ifield f-12-4) 3156 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8))) 3157 (ifield-assertion (eq f-12-4 #xA)) 3158 (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb)))) 3159 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 3160 ) 3161 (define-derived-operand 3162 (name (.sym dst16- offset -16-SB-relative- xmode)) 3163 (comment (.str "m16c dsp:16[sb] relative destination " xmode)) 3164 (attrs (machine 16)) 3165 (mode xmode) 3166 (args ((.sym Dsp- offset -u16))) 3167 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 3168 (base-ifield f-12-4) 3169 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16))) 3170 (ifield-assertion (eq f-12-4 #xE)) 3171 (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb)))) 3172 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 3173 ) 3174 (define-derived-operand 3175 (name (.sym dst16- offset -8-FB-relative- xmode)) 3176 (comment (.str "m16c dsp:8[fb] relative destination " xmode)) 3177 (attrs (machine 16)) 3178 (mode xmode) 3179 (args ((.sym Dsp- offset -s8))) 3180 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 3181 (base-ifield f-12-4) 3182 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8))) 3183 (ifield-assertion (eq f-12-4 #xB)) 3184 (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb)))) 3185 (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 3186 ) 3187 (define-derived-operand 3188 (name (.sym dst16- offset -8-An-relative- xmode)) 3189 (comment (.str "m16c dsp:8[An] relative destination " xmode)) 3190 (attrs (machine 16)) 3191 (mode xmode) 3192 (args (Dst16An (.sym Dsp- offset -u8))) 3193 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]")) 3194 (base-ifield f-12-4) 3195 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An)) 3196 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0))) 3197 (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An))) 3198 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval)) 3199 ) 3200 (define-derived-operand 3201 (name (.sym dst16- offset -16-An-relative- xmode)) 3202 (comment (.str "m16c dsp:16[An] relative destination " xmode)) 3203 (attrs (machine 16)) 3204 (mode xmode) 3205 (args (Dst16An (.sym Dsp- offset -u16))) 3206 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]")) 3207 (base-ifield f-12-4) 3208 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An)) 3209 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3210 (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An))) 3211 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval)) 3212 ) 3213 (define-derived-operand 3214 (name (.sym dst16- offset -20-An-relative- xmode)) 3215 (comment (.str "m16c dsp:20[An] relative destination " xmode)) 3216 (attrs (machine 16)) 3217 (mode xmode) 3218 (args (Dst16An (.sym Dsp- offset -u20))) 3219 (syntax (.str "${Dsp-" offset "-u20}[$Dst16An]")) 3220 (base-ifield f-12-4) 3221 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u20) Dst16An)) 3222 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3223 (getter (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An))) 3224 (setter (set (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An)) newval)) 3225 ) 3226 ) 3227 ) 3228 3229 (dst16-relative-operand 16 QI) 3230 (dst16-relative-operand 24 QI) 3231 (dst16-relative-operand 32 QI) 3232 (dst16-relative-operand 40 QI) 3233 (dst16-relative-operand 48 QI) 3234 (dst16-relative-operand 16 HI) 3235 (dst16-relative-operand 24 HI) 3236 (dst16-relative-operand 32 HI) 3237 (dst16-relative-operand 40 HI) 3238 (dst16-relative-operand 48 HI) 3239 (dst16-relative-operand 16 SI) 3240 (dst16-relative-operand 24 SI) 3241 (dst16-relative-operand 32 SI) 3242 (dst16-relative-operand 40 SI) 3243 (dst16-relative-operand 48 SI) 3244 3245 (define-pmacro (dst16-relative-Ext-operand offset smode dmode) 3246 (begin 3247 (define-derived-operand 3248 (name (.sym dst16- offset -8-SB-relative-Ext- smode)) 3249 (comment (.str "m16c dsp:8[sb] relative destination " smode)) 3250 (attrs (machine 16)) 3251 (mode dmode) 3252 (args ((.sym Dsp- offset -u8))) 3253 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 3254 (base-ifield f-12-4) 3255 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8))) 3256 (ifield-assertion (eq f-12-4 #xA)) 3257 (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb)))) 3258 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 3259 ) 3260 (define-derived-operand 3261 (name (.sym dst16- offset -16-SB-relative-Ext- smode)) 3262 (comment (.str "m16c dsp:16[sb] relative destination " smode)) 3263 (attrs (machine 16)) 3264 (mode dmode) 3265 (args ((.sym Dsp- offset -u16))) 3266 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 3267 (base-ifield f-12-4) 3268 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16))) 3269 (ifield-assertion (eq f-12-4 #xE)) 3270 (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb)))) 3271 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 3272 ) 3273 (define-derived-operand 3274 (name (.sym dst16- offset -8-FB-relative-Ext- smode)) 3275 (comment (.str "m16c dsp:8[fb] relative destination " smode)) 3276 (attrs (machine 16)) 3277 (mode dmode) 3278 (args ((.sym Dsp- offset -s8))) 3279 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 3280 (base-ifield f-12-4) 3281 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8))) 3282 (ifield-assertion (eq f-12-4 #xB)) 3283 (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb)))) 3284 (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 3285 ) 3286 (define-derived-operand 3287 (name (.sym dst16- offset -8-An-relative-Ext- smode)) 3288 (comment (.str "m16c dsp:8[An] relative destination " smode)) 3289 (attrs (machine 16)) 3290 (mode dmode) 3291 (args (Dst16An (.sym Dsp- offset -u8))) 3292 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]")) 3293 (base-ifield f-12-4) 3294 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An)) 3295 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0))) 3296 (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An))) 3297 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval)) 3298 ) 3299 (define-derived-operand 3300 (name (.sym dst16- offset -16-An-relative-Ext- smode)) 3301 (comment (.str "m16c dsp:16[An] relative destination " smode)) 3302 (attrs (machine 16)) 3303 (mode dmode) 3304 (args (Dst16An (.sym Dsp- offset -u16))) 3305 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]")) 3306 (base-ifield f-12-4) 3307 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An)) 3308 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3309 (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An))) 3310 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval)) 3311 ) 3312 ) 3313 ) 3314 3315 (dst16-relative-Ext-operand 16 QI HI) 3316 3317 (define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode) 3318 (begin 3319 (define-derived-operand 3320 (name (.sym dst32- offset -8-SB-relative- group - smode)) 3321 (comment (.str "m32c dsp:8[sb] relative destination " smode)) 3322 (attrs (machine 32)) 3323 (mode dmode) 3324 (args ((.sym Dsp- offset -u8))) 3325 (syntax (.str "${Dsp-" offset "-u8}[sb]")) 3326 (base-ifield (.sym f- base1 -6)) 3327 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8))) 3328 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2))) 3329 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8))) 3330 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8))) 3331 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb)))) 3332 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval)) 3333 ) 3334 (define-derived-operand 3335 (name (.sym dst32- offset -16-SB-relative- group - smode)) 3336 (comment (.str "m32c dsp:16[sb] relative destination " smode)) 3337 (attrs (machine 32)) 3338 (mode dmode) 3339 (args ((.sym Dsp- offset -u16))) 3340 (syntax (.str "${Dsp-" offset "-u16}[sb]")) 3341 (base-ifield (.sym f- base1 -6)) 3342 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16))) 3343 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2))) 3344 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16))) 3345 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16))) 3346 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb)))) 3347 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval)) 3348 ) 3349 (define-derived-operand 3350 (name (.sym dst32- offset -8-FB-relative- group - smode)) 3351 (comment (.str "m32c dsp:8[fb] relative destination " smode)) 3352 (attrs (machine 32)) 3353 (mode dmode) 3354 (args ((.sym Dsp- offset -s8))) 3355 (syntax (.str "${Dsp-" offset "-s8}[fb]")) 3356 (base-ifield (.sym f- base1 -6)) 3357 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8))) 3358 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3))) 3359 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8))) 3360 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8))) 3361 ; (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb)))) 3362 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval)) 3363 ) 3364 (define-derived-operand 3365 (name (.sym dst32- offset -16-FB-relative- group - smode)) 3366 (comment (.str "m32c dsp:16[fb] relative destination " smode)) 3367 (attrs (machine 32)) 3368 (mode dmode) 3369 (args ((.sym Dsp- offset -s16))) 3370 (syntax (.str "${Dsp-" offset "-s16}[fb]")) 3371 (base-ifield (.sym f- base1 -6)) 3372 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16))) 3373 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3))) 3374 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16))) 3375 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16))) 3376 ; (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb)))) 3377 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval)) 3378 ) 3379 (define-derived-operand 3380 (name (.sym dst32- offset -8-An-relative- group - smode)) 3381 (comment (.str "m32c dsp:8[An] relative destination " smode)) 3382 (attrs (machine 32)) 3383 (mode dmode) 3384 (args ((.sym Dst32An group) (.sym Dsp- offset -u8))) 3385 (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]")) 3386 (base-ifield (.sym f- base1 -6)) 3387 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group))) 3388 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0))) 3389 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8))) 3390 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8))) 3391 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group)))) 3392 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval)) 3393 ) 3394 (define-derived-operand 3395 (name (.sym dst32- offset -16-An-relative- group - smode)) 3396 (comment (.str "m32c dsp:16[An] relative destination " smode)) 3397 (attrs (machine 32)) 3398 (mode dmode) 3399 (args ((.sym Dst32An group) (.sym Dsp- offset -u16))) 3400 (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]")) 3401 (base-ifield (.sym f- base1 -6)) 3402 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group))) 3403 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0))) 3404 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16))) 3405 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16))) 3406 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group)))) 3407 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval)) 3408 ) 3409 (define-derived-operand 3410 (name (.sym dst32- offset -24-An-relative- group - smode)) 3411 (comment (.str "m32c dsp:16[An] relative destination " smode)) 3412 (attrs (machine 32)) 3413 (mode dmode) 3414 (args ((.sym Dst32An group) (.sym Dsp- offset -u24))) 3415 (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]")) 3416 (base-ifield (.sym f- base1 -6)) 3417 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group))) 3418 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0))) 3419 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24))) 3420 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24))) 3421 ; (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group)))) 3422 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval)) 3423 ) 3424 ) 3425 ) 3426 3427 (dst32-relative-operand 16 Unprefixed 4 8 QI QI) 3428 (dst32-relative-operand 24 Unprefixed 4 8 QI QI) 3429 (dst32-relative-operand 32 Unprefixed 4 8 QI QI) 3430 (dst32-relative-operand 40 Unprefixed 4 8 QI QI) 3431 (dst32-relative-operand 16 Unprefixed 4 8 HI HI) 3432 (dst32-relative-operand 24 Unprefixed 4 8 HI HI) 3433 (dst32-relative-operand 32 Unprefixed 4 8 HI HI) 3434 (dst32-relative-operand 40 Unprefixed 4 8 HI HI) 3435 (dst32-relative-operand 16 Unprefixed 4 8 SI SI) 3436 (dst32-relative-operand 24 Unprefixed 4 8 SI SI) 3437 (dst32-relative-operand 32 Unprefixed 4 8 SI SI) 3438 (dst32-relative-operand 40 Unprefixed 4 8 SI SI) 3439 3440 (dst32-relative-operand 24 Prefixed 12 16 QI QI) 3441 (dst32-relative-operand 32 Prefixed 12 16 QI QI) 3442 (dst32-relative-operand 40 Prefixed 12 16 QI QI) 3443 (dst32-relative-operand 48 Prefixed 12 16 QI QI) 3444 (dst32-relative-operand 24 Prefixed 12 16 HI HI) 3445 (dst32-relative-operand 32 Prefixed 12 16 HI HI) 3446 (dst32-relative-operand 40 Prefixed 12 16 HI HI) 3447 (dst32-relative-operand 48 Prefixed 12 16 HI HI) 3448 (dst32-relative-operand 24 Prefixed 12 16 SI SI) 3449 (dst32-relative-operand 32 Prefixed 12 16 SI SI) 3450 (dst32-relative-operand 40 Prefixed 12 16 SI SI) 3451 (dst32-relative-operand 48 Prefixed 12 16 SI SI) 3452 3453 (dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI) 3454 (dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI) 3455 3456 ;------------------------------------------------------------- 3457 ; Absolute address 3458 ;------------------------------------------------------------- 3459 3460 (define-pmacro (dst16-absolute offset xmode) 3461 (begin 3462 (define-derived-operand 3463 (name (.sym dst16- offset -16-absolute- xmode)) 3464 (comment (.str "m16c absolute address " xmode)) 3465 (attrs (machine 16)) 3466 (mode xmode) 3467 (args ((.sym Dsp- offset -u16))) 3468 (syntax (.str "${Dsp-" offset "-u16}")) 3469 (base-ifield f-12-4) 3470 (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16))) 3471 (ifield-assertion (eq f-12-4 #xF)) 3472 (getter (mem16 xmode (.sym Dsp- offset -u16))) 3473 (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval)) 3474 ) 3475 ) 3476 ) 3477 3478 (dst16-absolute 16 QI) 3479 (dst16-absolute 24 QI) 3480 (dst16-absolute 32 QI) 3481 (dst16-absolute 40 QI) 3482 (dst16-absolute 48 QI) 3483 (dst16-absolute 16 HI) 3484 (dst16-absolute 24 HI) 3485 (dst16-absolute 32 HI) 3486 (dst16-absolute 40 HI) 3487 (dst16-absolute 48 HI) 3488 (dst16-absolute 16 SI) 3489 (dst16-absolute 24 SI) 3490 (dst16-absolute 32 SI) 3491 (dst16-absolute 40 SI) 3492 (dst16-absolute 48 SI) 3493 3494 (define-derived-operand 3495 (name dst16-16-16-absolute-Ext-QI) 3496 (comment "m16c absolute address QI") 3497 (attrs (machine 16)) 3498 (mode HI) 3499 (args (Dsp-16-u16)) 3500 (syntax "${Dsp-16-u16}") 3501 (base-ifield f-12-4) 3502 (encoding (+ (f-12-4 #xF) Dsp-16-u16)) 3503 (ifield-assertion (eq f-12-4 #xF)) 3504 (getter (mem16 QI Dsp-16-u16)) 3505 (setter (set (mem16 HI Dsp-16-u16) newval)) 3506 ) 3507 3508 (define-pmacro (dst32-absolute offset group base1 base2 smode dmode) 3509 (begin 3510 (define-derived-operand 3511 (name (.sym dst32- offset -16-absolute- group - smode)) 3512 (comment (.str "m32c absolute address " smode)) 3513 (attrs (machine 32)) 3514 (mode dmode) 3515 (args ((.sym Dsp- offset -u16))) 3516 (syntax (.str "${Dsp-" offset "-u16}")) 3517 (base-ifield (.sym f- base1 -6)) 3518 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16))) 3519 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 3520 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16))) 3521 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16))) 3522 ; (getter (mem32 smode (.sym Dsp- offset -u16))) 3523 ; (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval)) 3524 ) 3525 (define-derived-operand 3526 (name (.sym dst32- offset -24-absolute- group - smode)) 3527 (comment (.str "m32c absolute address " smode)) 3528 (attrs (machine 32)) 3529 (mode dmode) 3530 (args ((.sym Dsp- offset -u24))) 3531 (syntax (.str "${Dsp-" offset "-u24}")) 3532 (base-ifield (.sym f- base1 -6)) 3533 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24))) 3534 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 3535 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24))) 3536 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24))) 3537 ; (getter (mem32 smode (.sym Dsp- offset -u24))) 3538 ; (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval)) 3539 ) 3540 ) 3541 ) 3542 3543 (dst32-absolute 16 Unprefixed 4 8 QI QI) 3544 (dst32-absolute 24 Unprefixed 4 8 QI QI) 3545 (dst32-absolute 32 Unprefixed 4 8 QI QI) 3546 (dst32-absolute 40 Unprefixed 4 8 QI QI) 3547 (dst32-absolute 16 Unprefixed 4 8 HI HI) 3548 (dst32-absolute 24 Unprefixed 4 8 HI HI) 3549 (dst32-absolute 32 Unprefixed 4 8 HI HI) 3550 (dst32-absolute 40 Unprefixed 4 8 HI HI) 3551 (dst32-absolute 16 Unprefixed 4 8 SI SI) 3552 (dst32-absolute 24 Unprefixed 4 8 SI SI) 3553 (dst32-absolute 32 Unprefixed 4 8 SI SI) 3554 (dst32-absolute 40 Unprefixed 4 8 SI SI) 3555 3556 (dst32-absolute 24 Prefixed 12 16 QI QI) 3557 (dst32-absolute 32 Prefixed 12 16 QI QI) 3558 (dst32-absolute 40 Prefixed 12 16 QI QI) 3559 (dst32-absolute 48 Prefixed 12 16 QI QI) 3560 (dst32-absolute 24 Prefixed 12 16 HI HI) 3561 (dst32-absolute 32 Prefixed 12 16 HI HI) 3562 (dst32-absolute 40 Prefixed 12 16 HI HI) 3563 (dst32-absolute 48 Prefixed 12 16 HI HI) 3564 (dst32-absolute 24 Prefixed 12 16 SI SI) 3565 (dst32-absolute 32 Prefixed 12 16 SI SI) 3566 (dst32-absolute 40 Prefixed 12 16 SI SI) 3567 (dst32-absolute 48 Prefixed 12 16 SI SI) 3568 3569 (dst32-absolute 16 ExtUnprefixed 4 8 QI HI) 3570 (dst32-absolute 16 ExtUnprefixed 4 8 HI SI) 3571 3572 ;------------------------------------------------------------- 3573 ; An indirect indirect 3574 ;------------------------------------------------------------- 3575 3576 ;(define-pmacro (dst-An-indirect-indirect-operand xmode) 3577 ; (define-derived-operand 3578 ; (name (.sym dst32-An-indirect-indirect- xmode)) 3579 ; (comment (.str "m32c An indirect indirect destination " xmode)) 3580 ; (attrs (machine 32)) 3581 ; (mode xmode) 3582 ; (args (Dst32AnPrefixed)) 3583 ; (syntax (.str "[[$Dst32AnPrefixed]]")) 3584 ; (base-ifield f-12-6) 3585 ; (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed)) 3586 ; (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0))) 3587 ; (getter (mem32 xmode (indirect-addr Dst32AnPrefixed))) 3588 ; (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval)) 3589 ; ) 3590 ;) 3591 3592 ; (dst-An-indirect-indirect-operand QI) 3593 ; (dst-An-indirect-indirect-operand HI) 3594 ; (dst-An-indirect-indirect-operand SI) 3595 3596 ;------------------------------------------------------------- 3597 ; Relative indirect 3598 ;------------------------------------------------------------- 3599 3600 (define-pmacro (dst-relative-indirect-operand offset xmode) 3601 (begin 3602 ; (define-derived-operand 3603 ; (name (.sym dst32- offset -8-SB-relative-indirect- xmode)) 3604 ; (comment (.str "m32c dsp:8[sb] relative destination " xmode)) 3605 ; (attrs (machine 32)) 3606 ; (mode xmode) 3607 ; (args ((.sym Dsp- offset -u8))) 3608 ; (syntax (.str "[${Dsp-" offset "-u8}[sb]]")) 3609 ; (base-ifield f-12-6) 3610 ; (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8))) 3611 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2))) 3612 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb))))) 3613 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval)) 3614 ; ) 3615 ; (define-derived-operand 3616 ; (name (.sym dst32- offset -16-SB-relative-indirect- xmode)) 3617 ; (comment (.str "m32c dsp:16[sb] relative destination " xmode)) 3618 ; (attrs (machine 32)) 3619 ; (mode xmode) 3620 ; (args ((.sym Dsp- offset -u16))) 3621 ; (syntax (.str "[${Dsp-" offset "-u16}[sb]]")) 3622 ; (base-ifield f-12-6) 3623 ; (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16))) 3624 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2))) 3625 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb))))) 3626 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval)) 3627 ; ) 3628 ; (define-derived-operand 3629 ; (name (.sym dst32- offset -8-FB-relative-indirect- xmode)) 3630 ; (comment (.str "m32c dsp:8[fb] relative destination " xmode)) 3631 ; (attrs (machine 32)) 3632 ; (mode xmode) 3633 ; (args ((.sym Dsp- offset -s8))) 3634 ; (syntax (.str "[${Dsp-" offset "-s8}[fb]]")) 3635 ; (base-ifield f-12-6) 3636 ; (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8))) 3637 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3))) 3638 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb))))) 3639 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval)) 3640 ; ) 3641 ; (define-derived-operand 3642 ; (name (.sym dst32- offset -16-FB-relative-indirect- xmode)) 3643 ; (comment (.str "m32c dsp:16[fb] relative destination " xmode)) 3644 ; (attrs (machine 32)) 3645 ; (mode xmode) 3646 ; (args ((.sym Dsp- offset -s16))) 3647 ; (syntax (.str "[${Dsp-" offset "-s16}[fb]]")) 3648 ; (base-ifield f-12-6) 3649 ; (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16))) 3650 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3))) 3651 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb))))) 3652 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval)) 3653 ; ) 3654 ; (define-derived-operand 3655 ; (name (.sym dst32- offset -8-An-relative-indirect- xmode)) 3656 ; (comment (.str "m32c dsp:8[An] relative indirect destination " xmode)) 3657 ; (attrs (machine 32)) 3658 ; (mode xmode) 3659 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u8))) 3660 ; (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]")) 3661 ; (base-ifield f-12-6) 3662 ; (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed)) 3663 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0))) 3664 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed)))) 3665 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval)) 3666 ; ) 3667 ; (define-derived-operand 3668 ; (name (.sym dst32- offset -16-An-relative-indirect- xmode)) 3669 ; (comment (.str "m32c dsp:16[An] relative destination " xmode)) 3670 ; (attrs (machine 32)) 3671 ; (mode xmode) 3672 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u16))) 3673 ; (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]")) 3674 ; (base-ifield f-12-6) 3675 ; (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed)) 3676 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0))) 3677 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed)))) 3678 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval)) 3679 ; ) 3680 ; (define-derived-operand 3681 ; (name (.sym dst32- offset -24-An-relative-indirect- xmode)) 3682 ; (comment (.str "m32c dsp:24[An] relative destination " xmode)) 3683 ; (attrs (machine 32)) 3684 ; (mode xmode) 3685 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u24))) 3686 ; (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]")) 3687 ; (base-ifield f-12-6) 3688 ; (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed)) 3689 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0))) 3690 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed)))) 3691 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval)) 3692 ; ) 3693 ) 3694 ) 3695 3696 ; (dst-relative-indirect-operand 24 QI) 3697 ; (dst-relative-indirect-operand 32 QI) 3698 ; (dst-relative-indirect-operand 40 QI) 3699 ; (dst-relative-indirect-operand 48 QI) 3700 ; (dst-relative-indirect-operand 24 HI) 3701 ; (dst-relative-indirect-operand 32 HI) 3702 ; (dst-relative-indirect-operand 40 HI) 3703 ; (dst-relative-indirect-operand 48 HI) 3704 ; (dst-relative-indirect-operand 24 SI) 3705 ; (dst-relative-indirect-operand 32 SI) 3706 ; (dst-relative-indirect-operand 40 SI) 3707 ; (dst-relative-indirect-operand 48 SI) 3708 3709 ;------------------------------------------------------------- 3710 ; Absolute indirect 3711 ;------------------------------------------------------------- 3712 3713 (define-pmacro (dst-absolute-indirect offset xmode) 3714 (begin 3715 ; (define-derived-operand 3716 ; (name (.sym dst32- offset -16-absolute-indirect-derived- xmode)) 3717 ; (comment (.str "m32c absolute indirect address " xmode)) 3718 ; (attrs (machine 32)) 3719 ; (mode xmode) 3720 ; (args ((.sym Dsp- offset -u16))) 3721 ; (syntax (.str "[${Dsp-" offset "-u16}]")) 3722 ; (base-ifield f-12-6) 3723 ; (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16))) 3724 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3))) 3725 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16)))) 3726 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval)) 3727 ; ) 3728 ; (define-derived-operand 3729 ; (name (.sym dst32- offset -24-absolute-indirect-derived- xmode)) 3730 ; (comment (.str "m32c absolute indirect address " xmode)) 3731 ; (attrs (machine 32)) 3732 ; (mode xmode) 3733 ; (args ((.sym Dsp- offset -u24))) 3734 ; (syntax (.str "[${Dsp-" offset "-u24}]")) 3735 ; (base-ifield f-12-6) 3736 ; (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24))) 3737 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2))) 3738 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24)))) 3739 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval)) 3740 ; ) 3741 ) 3742 ) 3743 3744 (dst-absolute-indirect 24 QI) 3745 (dst-absolute-indirect 32 QI) 3746 (dst-absolute-indirect 40 QI) 3747 (dst-absolute-indirect 48 QI) 3748 (dst-absolute-indirect 24 HI) 3749 (dst-absolute-indirect 32 HI) 3750 (dst-absolute-indirect 40 HI) 3751 (dst-absolute-indirect 48 HI) 3752 (dst-absolute-indirect 24 SI) 3753 (dst-absolute-indirect 32 SI) 3754 (dst-absolute-indirect 40 SI) 3755 (dst-absolute-indirect 48 SI) 3756 3757 ;------------------------------------------------------------- 3758 ; Bit operands 3759 ;------------------------------------------------------------- 3760 (define-pmacro (get-register-bit reg bitno) 3761 (and (srl reg bitno) 1) 3762 ) 3763 3764 (define-pmacro (set-register-bit reg bitno value) 3765 (set reg (or (and reg (inv (sll 1 bitno))) 3766 (sll (and QI value 1) bitno))) 3767 ) 3768 3769 (define-pmacro (get-memory-bit mach base bitno) 3770 (and (srl (mem-mach mach QI (add base (div bitno 8))) 3771 (mod bitno 8)) 3772 1) 3773 ) 3774 3775 (define-pmacro (set-memory-bit mach base bitno value) 3776 (sequence ((USI addr)) 3777 (set addr (add base (div bitno 8))) 3778 (set (mem-mach mach QI addr) 3779 (or (and (mem-mach mach QI addr) 3780 (inv (sll 1 (mod bitno 8)))) 3781 (sll (and QI value 1) (mod bitno 8))))) 3782 ) 3783 3784 ;------------------------------------------------------------- 3785 ; Rn direct 3786 ;------------------------------------------------------------- 3787 3788 (define-derived-operand 3789 (name bit16-Rn-direct) 3790 (comment "m16c Rn direct bit") 3791 (attrs (machine 16)) 3792 (mode BI) 3793 (args (Bitno16R Bit16Rn)) 3794 (syntax "$Bitno16R,$Bit16Rn") 3795 (base-ifield f-12-4) 3796 (encoding (+ (f-12-2 0) Bit16Rn Bitno16R)) 3797 (ifield-assertion (eq f-12-2 0)) 3798 (getter (get-register-bit Bit16Rn Bitno16R)) 3799 (setter (set-register-bit Bit16Rn Bitno16R newval)) 3800 ) 3801 3802 (define-pmacro (bit32-Rn-direct-operand group base) 3803 (begin 3804 (define-derived-operand 3805 (name (.sym bit32-Rn-direct- group)) 3806 (comment "m32c Rn direct bit") 3807 (attrs (machine 32)) 3808 (mode BI) 3809 (args ((.sym Bitno32 group) (.sym Bit32Rn group))) 3810 (syntax (.str "$Bitno32" group ",$Bit32Rn" group)) 3811 (base-ifield (.sym f- base -6)) 3812 (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group))) 3813 (ifield-assertion (eq (.sym f- base -3) 4)) 3814 (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group))) 3815 (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval)) 3816 ) 3817 ) 3818 ) 3819 3820 (bit32-Rn-direct-operand Unprefixed 4) 3821 (bit32-Rn-direct-operand Prefixed 12) 3822 3823 ;------------------------------------------------------------- 3824 ; An direct 3825 ;------------------------------------------------------------- 3826 3827 (define-derived-operand 3828 (name bit16-An-direct) 3829 (comment "m16c An direct bit") 3830 (attrs (machine 16)) 3831 (mode BI) 3832 (args (Bitno16R Bit16An)) 3833 (syntax "$Bitno16R,$Bit16An") 3834 (base-ifield f-12-4) 3835 (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R)) 3836 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0))) 3837 (getter (get-register-bit Bit16An Bitno16R)) 3838 (setter (set-register-bit Bit16An Bitno16R newval)) 3839 ) 3840 3841 (define-pmacro (bit32-An-direct-operand group base1 base2) 3842 (begin 3843 (define-derived-operand 3844 (name (.sym bit32-An-direct- group)) 3845 (comment "m32c An direct bit") 3846 (attrs (machine 32)) 3847 (mode BI) 3848 (args ((.sym Bitno32 group) (.sym Bit32An group))) 3849 (syntax (.str "$Bitno32" group ",$Bit32An" group)) 3850 (base-ifield (.sym f- base1 -6)) 3851 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group))) 3852 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1))) 3853 (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group))) 3854 (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval)) 3855 ) 3856 ) 3857 ) 3858 3859 (bit32-An-direct-operand Unprefixed 4 8) 3860 (bit32-An-direct-operand Prefixed 12 16) 3861 3862 ;------------------------------------------------------------- 3863 ; An indirect 3864 ;------------------------------------------------------------- 3865 3866 (define-derived-operand 3867 (name bit16-An-indirect) 3868 (comment "m16c An indirect bit") 3869 (attrs (machine 16)) 3870 (mode BI) 3871 (args (Bit16An)) 3872 (syntax "[$Bit16An]") 3873 (base-ifield f-12-4) 3874 (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An)) 3875 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1))) 3876 (getter (get-memory-bit 16 0 Bit16An)) 3877 (setter (set-memory-bit 16 0 Bit16An newval)) 3878 ) 3879 3880 (define-pmacro (bit32-An-indirect-operand group base1 base2) 3881 (begin 3882 (define-derived-operand 3883 (name (.sym bit32-An-indirect- group)) 3884 (comment "m32c An indirect destination ") 3885 (attrs (machine 32)) 3886 (mode BI) 3887 (args ((.sym Bitno32 group) (.sym Bit32An group))) 3888 (syntax (.str "$Bitno32" group ",[$Bit32An" group "]")) 3889 (base-ifield (.sym f- base1 -6)) 3890 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group))) 3891 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0))) 3892 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group))) 3893 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval)) 3894 ) 3895 ) 3896 ) 3897 3898 (bit32-An-indirect-operand Unprefixed 4 8) 3899 (bit32-An-indirect-operand Prefixed 12 16) 3900 3901 ;------------------------------------------------------------- 3902 ; dsp:d[r] relative 3903 ;------------------------------------------------------------- 3904 3905 (define-pmacro (bit16-relative-operand offset) 3906 (begin 3907 (define-derived-operand 3908 (name (.sym bit16- offset -8-SB-relative)) 3909 (comment (.str "m16c dsp:8[sb] relative bit " xmode)) 3910 (attrs (machine 16)) 3911 (mode BI) 3912 (args ((.sym BitBase16- offset -u8))) 3913 (syntax (.str "${BitBase16-" offset "-u8}[sb]")) 3914 (base-ifield f-12-4) 3915 (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8))) 3916 (ifield-assertion (eq f-12-4 #xA)) 3917 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8))) 3918 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval)) 3919 ) 3920 (define-derived-operand 3921 (name (.sym bit16- offset -16-SB-relative)) 3922 (comment (.str "m16c dsp:16[sb] relative bit " xmode)) 3923 (attrs (machine 16)) 3924 (mode BI) 3925 (args ((.sym BitBase16- offset -u16))) 3926 (syntax (.str "${BitBase16-" offset "-u16}[sb]")) 3927 (base-ifield f-12-4) 3928 (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16))) 3929 (ifield-assertion (eq f-12-4 #xE)) 3930 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16))) 3931 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval)) 3932 ) 3933 (define-derived-operand 3934 (name (.sym bit16- offset -8-FB-relative)) 3935 (comment (.str "m16c dsp:8[fb] relative bit " xmode)) 3936 (attrs (machine 16)) 3937 (mode BI) 3938 (args ((.sym BitBase16- offset -s8))) 3939 (syntax (.str "${BitBase16-" offset "-s8}[fb]")) 3940 (base-ifield f-12-4) 3941 (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8))) 3942 (ifield-assertion (eq f-12-4 #xB)) 3943 (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8))) 3944 (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval)) 3945 ) 3946 (define-derived-operand 3947 (name (.sym bit16- offset -8-An-relative)) 3948 (comment (.str "m16c dsp:8[An] relative bit " xmode)) 3949 (attrs (machine 16)) 3950 (mode BI) 3951 (args (Bit16An (.sym Dsp- offset -u8))) 3952 (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]")) 3953 (base-ifield f-12-4) 3954 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An)) 3955 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0))) 3956 (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An)) 3957 (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval)) 3958 ) 3959 (define-derived-operand 3960 (name (.sym bit16- offset -16-An-relative)) 3961 (comment (.str "m16c dsp:16[An] relative bit " xmode)) 3962 (attrs (machine 16)) 3963 (mode BI) 3964 (args (Bit16An (.sym Dsp- offset -u16))) 3965 (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]")) 3966 (base-ifield f-12-4) 3967 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An)) 3968 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0))) 3969 (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An)) 3970 (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval)) 3971 ) 3972 ) 3973 ) 3974 3975 (bit16-relative-operand 16) 3976 3977 (define-pmacro (bit32-relative-operand offset group base1 base2) 3978 (begin 3979 (define-derived-operand 3980 (name (.sym bit32- offset -11-SB-relative- group)) 3981 (comment "m32c bit,base:11[sb] relative bit") 3982 (attrs (machine 32)) 3983 (mode BI) 3984 (args ((.sym BitBase32- offset -u11- group))) 3985 (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]")) 3986 (base-ifield (.sym f- base1 -12)) 3987 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group))) 3988 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2))) 3989 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group))) 3990 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval)) 3991 ) 3992 (define-derived-operand 3993 (name (.sym bit32- offset -19-SB-relative- group)) 3994 (comment "m32c bit,base:19[sb] relative bit") 3995 (attrs (machine 32)) 3996 (mode BI) 3997 (args ((.sym BitBase32- offset -u19- group))) 3998 (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]")) 3999 (base-ifield (.sym f- base1 -12)) 4000 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group))) 4001 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2))) 4002 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group))) 4003 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval)) 4004 ) 4005 (define-derived-operand 4006 (name (.sym bit32- offset -11-FB-relative- group)) 4007 (comment "m32c bit,base:11[fb] relative bit") 4008 (attrs (machine 32)) 4009 (mode BI) 4010 (args ((.sym BitBase32- offset -s11- group))) 4011 (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]")) 4012 (base-ifield (.sym f- base1 -12)) 4013 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group))) 4014 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3))) 4015 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group))) 4016 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval)) 4017 ) 4018 (define-derived-operand 4019 (name (.sym bit32- offset -19-FB-relative- group)) 4020 (comment "m32c bit,base:19[fb] relative bit") 4021 (attrs (machine 32)) 4022 (mode BI) 4023 (args ((.sym BitBase32- offset -s19- group))) 4024 (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]")) 4025 (base-ifield (.sym f- base1 -12)) 4026 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group))) 4027 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3))) 4028 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group))) 4029 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval)) 4030 ) 4031 (define-derived-operand 4032 (name (.sym bit32- offset -11-An-relative- group)) 4033 (comment "m32c bit,base:11[An] relative bit") 4034 (attrs (machine 32)) 4035 (mode BI) 4036 (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group))) 4037 (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]")) 4038 (base-ifield (.sym f- base1 -12)) 4039 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group))) 4040 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0))) 4041 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group))) 4042 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval)) 4043 ) 4044 (define-derived-operand 4045 (name (.sym bit32- offset -19-An-relative- group)) 4046 (comment "m32c bit,base:19[An] relative bit") 4047 (attrs (machine 32)) 4048 (mode BI) 4049 (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group))) 4050 (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]")) 4051 (base-ifield (.sym f- base1 -12)) 4052 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group))) 4053 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0))) 4054 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group))) 4055 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval)) 4056 ) 4057 (define-derived-operand 4058 (name (.sym bit32- offset -27-An-relative- group)) 4059 (comment "m32c bit,base:27[An] relative bit") 4060 (attrs (machine 32)) 4061 (mode BI) 4062 (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group))) 4063 (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]")) 4064 (base-ifield (.sym f- base1 -12)) 4065 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group))) 4066 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0))) 4067 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group))) 4068 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval)) 4069 ) 4070 ) 4071 ) 4072 4073 (bit32-relative-operand 16 Unprefixed 4 8) 4074 (bit32-relative-operand 24 Prefixed 12 16) 4075 4076 (define-derived-operand 4077 (name bit16-11-SB-relative-S) 4078 (comment "m16c bit,base:11[sb] relative bit") 4079 (attrs (machine 16)) 4080 (mode BI) 4081 (args (BitBase16-8-u11-S)) 4082 (syntax "${BitBase16-8-u11-S}[sb]") 4083 (base-ifield (.sym f-5-3)) 4084 (encoding (+ BitBase16-8-u11-S)) 4085 ; (ifield-assertion (#t)) 4086 (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S)) 4087 (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval)) 4088 ) 4089 4090 (define-derived-operand 4091 (name Rn16-push-S-derived) 4092 (comment "m16c r0[lh] for push,pop short version") 4093 (attrs (machine 16)) 4094 (mode QI) 4095 (args (Rn16-push-S)) 4096 (syntax "${Rn16-push-S}") 4097 (base-ifield (.sym f-4-1)) 4098 (encoding (+ Rn16-push-S)) 4099 ; (ifield-assertion (#t)) 4100 (getter (trunc QI Rn16-push-S)) 4101 (setter (set Rn16-push-S newval)) 4102 ) 4103 4104 (define-derived-operand 4105 (name An16-push-S-derived) 4106 (comment "m16c r0[lh] for push,pop short version") 4107 (attrs (machine 16)) 4108 (mode HI) 4109 (args (An16-push-S)) 4110 (syntax "${An16-push-S}") 4111 (base-ifield (.sym f-4-1)) 4112 (encoding (+ An16-push-S)) 4113 ; (ifield-assertion (#t)) 4114 (getter (trunc QI An16-push-S)) 4115 (setter (set An16-push-S newval)) 4116 ) 4117 4118 ;------------------------------------------------------------- 4119 ; Absolute address 4120 ;------------------------------------------------------------- 4121 4122 (define-pmacro (bit16-absolute offset) 4123 (begin 4124 (define-derived-operand 4125 (name (.sym bit16- offset -16-absolute)) 4126 (comment "m16c absolute address") 4127 (attrs (machine 16)) 4128 (mode BI) 4129 (args ((.sym BitBase16- offset -u16))) 4130 (syntax (.str "${BitBase16-" offset "-u16}")) 4131 (base-ifield f-12-4) 4132 (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16))) 4133 (ifield-assertion (eq f-12-4 #xF)) 4134 (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16))) 4135 (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval)) 4136 ) 4137 ) 4138 ) 4139 4140 (bit16-absolute 16) 4141 4142 (define-pmacro (bit32-absolute offset group base1 base2) 4143 (begin 4144 (define-derived-operand 4145 (name (.sym bit32- offset -19-absolute- group)) 4146 (comment "m32c absolute address bit") 4147 (attrs (machine 32)) 4148 (mode BI) 4149 (args ((.sym BitBase32- offset -u19- group))) 4150 (syntax (.str "${BitBase32-" offset "-u19-" group "}")) 4151 (base-ifield (.sym f- base1 -12)) 4152 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group))) 4153 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3))) 4154 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group))) 4155 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval)) 4156 ) 4157 (define-derived-operand 4158 (name (.sym bit32- offset -27-absolute- group)) 4159 (comment "m32c absolute address bit") 4160 (attrs (machine 32)) 4161 (mode BI) 4162 (args ((.sym BitBase32- offset -u27- group))) 4163 (syntax (.str "${BitBase32-" offset "-u27-" group "}")) 4164 (base-ifield (.sym f- base1 -12)) 4165 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group))) 4166 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2))) 4167 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group))) 4168 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval)) 4169 ) 4170 ) 4171 ) 4172 4173 (bit32-absolute 16 Unprefixed 4 8) 4174 (bit32-absolute 24 Prefixed 12 16) 4175 4176 ;------------------------------------------------------------- 4177 ; Destination operands for short fomat insns 4178 ;------------------------------------------------------------- 4179 4180 (define-derived-operand 4181 (name dst16-3-S-R0l-direct-QI) 4182 (comment "m16c R0l direct QI") 4183 (attrs (machine 16)) 4184 (mode QI) 4185 (args (R0l)) 4186 (syntax "r0l") 4187 (base-ifield f-5-3) 4188 (encoding (+ (f-5-3 4))) 4189 (ifield-assertion (eq f-5-3 4)) 4190 (getter (trunc QI R0l)) 4191 (setter (set R0l newval)) 4192 ) 4193 (define-derived-operand 4194 (name dst16-3-S-R0h-direct-QI) 4195 (comment "m16c R0h direct QI") 4196 (attrs (machine 16)) 4197 (mode QI) 4198 (args (R0h)) 4199 (syntax "r0h") 4200 (base-ifield f-5-3) 4201 (encoding (+ (f-5-3 3))) 4202 (ifield-assertion (eq f-5-3 3)) 4203 (getter (trunc QI R0h)) 4204 (setter (set R0h newval)) 4205 ) 4206 (define-derived-operand 4207 (name dst16-3-S-8-8-SB-relative-QI) 4208 (comment "m16c SB relative QI") 4209 (attrs (machine 16)) 4210 (mode QI) 4211 (args (Dsp-8-u8)) 4212 (syntax "${Dsp-8-u8}[sb]") 4213 (base-ifield f-5-3) 4214 (encoding (+ (f-5-3 5) Dsp-8-u8)) 4215 (ifield-assertion (eq f-5-3 5)) 4216 (getter (mem16 QI (add Dsp-8-u8 (reg h-sb)))) 4217 (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval)) 4218 ) 4219 (define-derived-operand 4220 (name dst16-3-S-8-8-FB-relative-QI) 4221 (comment "m16c FB relative QI") 4222 (attrs (machine 16)) 4223 (mode QI) 4224 (args (Dsp-8-s8)) 4225 (syntax "${Dsp-8-s8}[fb]") 4226 (base-ifield f-5-3) 4227 (encoding (+ (f-5-3 6) Dsp-8-s8)) 4228 (ifield-assertion (eq f-5-3 6)) 4229 (getter (mem16 QI (add Dsp-8-s8 (reg h-fb)))) 4230 (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval)) 4231 ) 4232 (define-derived-operand 4233 (name dst16-3-S-8-16-absolute-QI) 4234 (comment "m16c absolute address QI") 4235 (attrs (machine 16)) 4236 (mode QI) 4237 (args (Dsp-8-u16)) 4238 (syntax "${Dsp-8-u16}") 4239 (base-ifield f-5-3) 4240 (encoding (+ (f-5-3 7) Dsp-8-u16)) 4241 (ifield-assertion (eq f-5-3 7)) 4242 (getter (mem16 QI Dsp-8-u16)) 4243 (setter (set (mem16 QI Dsp-8-u16) newval)) 4244 ) 4245 (define-derived-operand 4246 (name dst16-3-S-16-8-SB-relative-QI) 4247 (comment "m16c SB relative QI") 4248 (attrs (machine 16)) 4249 (mode QI) 4250 (args (Dsp-16-u8)) 4251 (syntax "${Dsp-16-u8}[sb]") 4252 (base-ifield f-5-3) 4253 (encoding (+ (f-5-3 5) Dsp-16-u8)) 4254 (ifield-assertion (eq f-5-3 5)) 4255 (getter (mem16 QI (add Dsp-16-u8 (reg h-sb)))) 4256 (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval)) 4257 ) 4258 (define-derived-operand 4259 (name dst16-3-S-16-8-FB-relative-QI) 4260 (comment "m16c FB relative QI") 4261 (attrs (machine 16)) 4262 (mode QI) 4263 (args (Dsp-16-s8)) 4264 (syntax "${Dsp-16-s8}[fb]") 4265 (base-ifield f-5-3) 4266 (encoding (+ (f-5-3 6) Dsp-16-s8)) 4267 (ifield-assertion (eq f-5-3 6)) 4268 (getter (mem16 QI (add Dsp-16-s8 (reg h-fb)))) 4269 (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval)) 4270 ) 4271 (define-derived-operand 4272 (name dst16-3-S-16-16-absolute-QI) 4273 (comment "m16c absolute address QI") 4274 (attrs (machine 16)) 4275 (mode QI) 4276 (args (Dsp-16-u16)) 4277 (syntax "${Dsp-16-u16}") 4278 (base-ifield f-5-3) 4279 (encoding (+ (f-5-3 7) Dsp-16-u16)) 4280 (ifield-assertion (eq f-5-3 7)) 4281 (getter (mem16 QI Dsp-16-u16)) 4282 (setter (set (mem16 QI Dsp-16-u16) newval)) 4283 ) 4284 (define-derived-operand 4285 (name srcdst16-r0l-r0h-S-derived) 4286 (comment "m16c r0l/r0h operand for short format insns") 4287 (attrs (machine 16)) 4288 (mode SI) 4289 (args (SrcDst16-r0l-r0h-S-normal)) 4290 (syntax "${SrcDst16-r0l-r0h-S-normal}") 4291 (base-ifield f-6-3) 4292 (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal)) 4293 (ifield-assertion (eq f-6-2 0)) 4294 (getter (trunc SI SrcDst16-r0l-r0h-S-normal)) 4295 (setter ()) ; no setter 4296 ) 4297 (define-derived-operand 4298 (name dst32-2-S-R0l-direct-QI) 4299 (comment "m32c R0l direct QI") 4300 (attrs (machine 32)) 4301 (mode QI) 4302 (args (R0l)) 4303 (syntax "r0l") 4304 (base-ifield f-2-2) 4305 (encoding (+ (f-2-2 0))) 4306 (ifield-assertion (eq f-2-2 0)) 4307 (getter (trunc QI R0l)) 4308 (setter (set R0l newval)) 4309 ) 4310 (define-derived-operand 4311 (name dst32-2-S-R0-direct-HI) 4312 (comment "m32c R0 direct HI") 4313 (attrs (machine 32)) 4314 (mode HI) 4315 (args (R0)) 4316 (syntax "r0") 4317 (base-ifield f-2-2) 4318 (encoding (+ (f-2-2 0))) 4319 (ifield-assertion (eq f-2-2 0)) 4320 (getter (trunc HI R0)) 4321 (setter (set R0 newval)) 4322 ) 4323 (define-derived-operand 4324 (name dst32-1-S-A0-direct-HI) 4325 (comment "m32c A0 direct HI") 4326 (attrs (machine 32)) 4327 (mode HI) 4328 (args (A0)) 4329 (syntax "a0") 4330 (base-ifield f-7-1) 4331 (encoding (+ (f-7-1 0))) 4332 (ifield-assertion (eq f-7-1 0)) 4333 (getter (trunc HI A0)) 4334 (setter (set A0 newval)) 4335 ) 4336 (define-derived-operand 4337 (name dst32-1-S-A1-direct-HI) 4338 (comment "m32c A1 direct HI") 4339 (attrs (machine 32)) 4340 (mode HI) 4341 (args (A1)) 4342 (syntax "a1") 4343 (base-ifield f-7-1) 4344 (encoding (+ (f-7-1 1))) 4345 (ifield-assertion (eq f-7-1 1)) 4346 (getter (trunc HI A1)) 4347 (setter (set A1 newval)) 4348 ) 4349 (define-pmacro (dst32-2-S-operands xmode) 4350 (begin 4351 (define-derived-operand 4352 (name (.sym dst32-2-S-8-SB-relative- xmode)) 4353 (comment "m32c SB relative for short binary insns") 4354 (attrs (machine 32)) 4355 (mode xmode) 4356 (args (Dsp-8-u8)) 4357 (syntax "${Dsp-8-u8}[sb]") 4358 (base-ifield f-2-2) 4359 (encoding (+ (f-2-2 2) Dsp-8-u8)) 4360 (ifield-assertion (eq f-2-2 2)) 4361 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8)) 4362 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8)) 4363 ; (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb)))) 4364 ; (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval)) 4365 ) 4366 (define-derived-operand 4367 (name (.sym dst32-2-S-8-FB-relative- xmode)) 4368 (comment "m32c FB relative for short binary insns") 4369 (attrs (machine 32)) 4370 (mode xmode) 4371 (args (Dsp-8-s8)) 4372 (syntax "${Dsp-8-s8}[fb]") 4373 (base-ifield f-2-2) 4374 (encoding (+ (f-2-2 3) Dsp-8-s8)) 4375 (ifield-assertion (eq f-2-2 3)) 4376 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8)) 4377 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8)) 4378 ; (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb)))) 4379 ; (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval)) 4380 ) 4381 (define-derived-operand 4382 (name (.sym dst32-2-S-16-absolute- xmode)) 4383 (comment "m32c absolute address for short binary insns") 4384 (attrs (machine 32)) 4385 (mode xmode) 4386 (args (Dsp-8-u16)) 4387 (syntax "${Dsp-8-u16}") 4388 (base-ifield f-2-2) 4389 (encoding (+ (f-2-2 1) Dsp-8-u16)) 4390 (ifield-assertion (eq f-2-2 1)) 4391 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16)) 4392 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16)) 4393 ; (getter (mem32 xmode Dsp-8-u16)) 4394 ; (setter (set (mem32 xmode Dsp-8-u16) newval)) 4395 ) 4396 ; (define-derived-operand 4397 ; (name (.sym dst32-2-S-8-SB-relative-indirect- xmode)) 4398 ; (comment "m32c SB relative for short binary insns") 4399 ; (attrs (machine 32)) 4400 ; (mode xmode) 4401 ; (args (Dsp-16-u8)) 4402 ; (syntax "[${Dsp-16-u8}[sb]]") 4403 ; (base-ifield f-10-2) 4404 ; (encoding (+ (f-10-2 2) Dsp-16-u8)) 4405 ; (ifield-assertion (eq f-10-2 2)) 4406 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb))))) 4407 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval)) 4408 ; ) 4409 ; (define-derived-operand 4410 ; (name (.sym dst32-2-S-8-FB-relative-indirect- xmode)) 4411 ; (comment "m32c FB relative for short binary insns") 4412 ; (attrs (machine 32)) 4413 ; (mode xmode) 4414 ; (args (Dsp-16-s8)) 4415 ; (syntax "[${Dsp-16-s8}[fb]]") 4416 ; (base-ifield f-10-2) 4417 ; (encoding (+ (f-10-2 3) Dsp-16-s8)) 4418 ; (ifield-assertion (eq f-10-2 3)) 4419 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb))))) 4420 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval)) 4421 ; ) 4422 ; (define-derived-operand 4423 ; (name (.sym dst32-2-S-16-absolute-indirect- xmode)) 4424 ; (comment "m32c absolute address for short binary insns") 4425 ; (attrs (machine 32)) 4426 ; (mode xmode) 4427 ; (args (Dsp-16-u16)) 4428 ; (syntax "[${Dsp-16-u16}]") 4429 ; (base-ifield f-10-2) 4430 ; (encoding (+ (f-10-2 1) Dsp-16-u16)) 4431 ; (ifield-assertion (eq f-10-2 1)) 4432 ; (getter (mem32 xmode (indirect-addr Dsp-16-u16))) 4433 ; (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval)) 4434 ; ) 4435 ) 4436 ) 4437 4438 (dst32-2-S-operands QI) 4439 (dst32-2-S-operands HI) 4440 (dst32-2-S-operands SI) 4441 4442 ;============================================================= 4443 ; Anyof operands 4444 ;------------------------------------------------------------- 4445 ; Source operands with no additional fields 4446 ;------------------------------------------------------------- 4447 4448 (define-pmacro (src16-basic-operand xmode) 4449 (begin 4450 (define-anyof-operand 4451 (name (.sym src16-basic- xmode)) 4452 (comment (.str "m16c source operand of size " xmode " with no additional fields")) 4453 (attrs (machine 16)) 4454 (mode xmode) 4455 (choices 4456 (.sym src16-Rn-direct- xmode) 4457 (.sym src16-An-direct- xmode) 4458 (.sym src16-An-indirect- xmode) 4459 ) 4460 ) 4461 ) 4462 ) 4463 (src16-basic-operand QI) 4464 (src16-basic-operand HI) 4465 4466 (define-pmacro (src32-basic-operand xmode) 4467 (begin 4468 (define-anyof-operand 4469 (name (.sym src32-basic-Unprefixed- xmode)) 4470 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4471 (attrs (machine 32)) 4472 (mode xmode) 4473 (choices 4474 (.sym src32-Rn-direct-Unprefixed- xmode) 4475 (.sym src32-An-direct-Unprefixed- xmode) 4476 (.sym src32-An-indirect-Unprefixed- xmode) 4477 ) 4478 ) 4479 (define-anyof-operand 4480 (name (.sym src32-basic-Prefixed- xmode)) 4481 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4482 (attrs (machine 32)) 4483 (mode xmode) 4484 (choices 4485 (.sym src32-Rn-direct-Prefixed- xmode) 4486 (.sym src32-An-direct-Prefixed- xmode) 4487 (.sym src32-An-indirect-Prefixed- xmode) 4488 ) 4489 ) 4490 ; (define-anyof-operand 4491 ; (name (.sym src32-basic-indirect- xmode)) 4492 ; (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields")) 4493 ; (attrs (machine 32)) 4494 ; (mode xmode) 4495 ; (choices 4496 ; (.sym src32-An-indirect-indirect- xmode) 4497 ; ) 4498 ; ) 4499 ) 4500 ) 4501 4502 (src32-basic-operand QI) 4503 (src32-basic-operand HI) 4504 (src32-basic-operand SI) 4505 4506 (define-anyof-operand 4507 (name src32-basic-ExtPrefixed-QI) 4508 (comment "m32c source operand of size QI with no additional fields") 4509 (attrs (machine 32)) 4510 (mode QI) 4511 (choices 4512 src32-Rn-direct-Prefixed-QI 4513 src32-An-indirect-Prefixed-QI 4514 ) 4515 ) 4516 4517 ;------------------------------------------------------------- 4518 ; Source operands with additional fields at offset 16 bits 4519 ;------------------------------------------------------------- 4520 4521 (define-pmacro (src16-16-operand xmode) 4522 (begin 4523 (define-anyof-operand 4524 (name (.sym src16-16-8- xmode)) 4525 (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16")) 4526 (attrs (machine 16)) 4527 (mode xmode) 4528 (choices 4529 (.sym src16-16-8-An-relative- xmode) 4530 (.sym src16-16-8-SB-relative- xmode) 4531 (.sym src16-16-8-FB-relative- xmode) 4532 ) 4533 ) 4534 (define-anyof-operand 4535 (name (.sym src16-16-16- xmode)) 4536 (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16")) 4537 (attrs (machine 16)) 4538 (mode xmode) 4539 (choices 4540 (.sym src16-16-16-An-relative- xmode) 4541 (.sym src16-16-16-SB-relative- xmode) 4542 (.sym src16-16-16-absolute- xmode) 4543 ) 4544 ) 4545 ) 4546 ) 4547 (src16-16-operand QI) 4548 (src16-16-operand HI) 4549 4550 (define-pmacro (src32-16-operand xmode) 4551 (begin 4552 (define-anyof-operand 4553 (name (.sym src32-16-8-Unprefixed- xmode)) 4554 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16")) 4555 (attrs (machine 32)) 4556 (mode xmode) 4557 (choices 4558 (.sym src32-16-8-An-relative-Unprefixed- xmode) 4559 (.sym src32-16-8-SB-relative-Unprefixed- xmode) 4560 (.sym src32-16-8-FB-relative-Unprefixed- xmode) 4561 ) 4562 ) 4563 (define-anyof-operand 4564 (name (.sym src32-16-16-Unprefixed- xmode)) 4565 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16")) 4566 (attrs (machine 32)) 4567 (mode xmode) 4568 (choices 4569 (.sym src32-16-16-An-relative-Unprefixed- xmode) 4570 (.sym src32-16-16-SB-relative-Unprefixed- xmode) 4571 (.sym src32-16-16-FB-relative-Unprefixed- xmode) 4572 (.sym src32-16-16-absolute-Unprefixed- xmode) 4573 ) 4574 ) 4575 (define-anyof-operand 4576 (name (.sym src32-16-24-Unprefixed- xmode)) 4577 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16")) 4578 (attrs (machine 32)) 4579 (mode xmode) 4580 (choices 4581 (.sym src32-16-24-An-relative-Unprefixed- xmode) 4582 (.sym src32-16-24-absolute-Unprefixed- xmode) 4583 ) 4584 ) 4585 ) 4586 ) 4587 4588 (src32-16-operand QI) 4589 (src32-16-operand HI) 4590 (src32-16-operand SI) 4591 4592 ;------------------------------------------------------------- 4593 ; Source operands with additional fields at offset 24 bits 4594 ;------------------------------------------------------------- 4595 4596 (define-pmacro (src-24-operand group xmode) 4597 (begin 4598 (define-anyof-operand 4599 (name (.sym src32-24-8- group - xmode)) 4600 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24")) 4601 (attrs (machine 32)) 4602 (mode xmode) 4603 (choices 4604 (.sym src32-24-8-An-relative- group - xmode) 4605 (.sym src32-24-8-SB-relative- group - xmode) 4606 (.sym src32-24-8-FB-relative- group - xmode) 4607 ) 4608 ) 4609 (define-anyof-operand 4610 (name (.sym src32-24-16- group - xmode)) 4611 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16")) 4612 (attrs (machine 32)) 4613 (mode xmode) 4614 (choices 4615 (.sym src32-24-16-An-relative- group - xmode) 4616 (.sym src32-24-16-SB-relative- group - xmode) 4617 (.sym src32-24-16-FB-relative- group - xmode) 4618 (.sym src32-24-16-absolute- group - xmode) 4619 ) 4620 ) 4621 (define-anyof-operand 4622 (name (.sym src32-24-24- group - xmode)) 4623 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16")) 4624 (attrs (machine 32)) 4625 (mode xmode) 4626 (choices 4627 (.sym src32-24-24-An-relative- group - xmode) 4628 (.sym src32-24-24-absolute- group - xmode) 4629 ) 4630 ) 4631 ) 4632 ) 4633 4634 (src-24-operand Prefixed QI) 4635 (src-24-operand Prefixed HI) 4636 (src-24-operand Prefixed SI) 4637 4638 (define-pmacro (src-24-indirect-operand xmode) 4639 (begin 4640 ; (define-anyof-operand 4641 ; (name (.sym src32-24-8-indirect- xmode)) 4642 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 4643 ; (attrs (machine 32)) 4644 ; (mode xmode) 4645 ; (choices 4646 ; (.sym src32-24-8-An-relative-indirect- xmode) 4647 ; (.sym src32-24-8-SB-relative-indirect- xmode) 4648 ; (.sym src32-24-8-FB-relative-indirect- xmode) 4649 ; ) 4650 ; ) 4651 ; (define-anyof-operand 4652 ; (name (.sym src32-24-16-indirect- xmode)) 4653 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 4654 ; (attrs (machine 32)) 4655 ; (mode xmode) 4656 ; (choices 4657 ; (.sym src32-24-16-An-relative-indirect- xmode) 4658 ; (.sym src32-24-16-SB-relative-indirect- xmode) 4659 ; (.sym src32-24-16-FB-relative-indirect- xmode) 4660 ; ) 4661 ; ) 4662 ; (define-anyof-operand 4663 ; (name (.sym src32-24-24-indirect- xmode)) 4664 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 4665 ; (attrs (machine 32)) 4666 ; (mode xmode) 4667 ; (choices 4668 ; (.sym src32-24-24-An-relative-indirect- xmode) 4669 ; ) 4670 ; ) 4671 ; (define-anyof-operand 4672 ; (name (.sym src32-24-16-absolute-indirect- xmode)) 4673 ; (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect")) 4674 ; (attrs (machine 32)) 4675 ; (mode xmode) 4676 ; (choices 4677 ; (.sym src32-24-16-absolute-indirect-derived- xmode) 4678 ; ) 4679 ; ) 4680 ; (define-anyof-operand 4681 ; (name (.sym src32-24-24-absolute-indirect- xmode)) 4682 ; (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect")) 4683 ; (attrs (machine 32)) 4684 ; (mode xmode) 4685 ; (choices 4686 ; (.sym src32-24-24-absolute-indirect-derived- xmode) 4687 ; ) 4688 ; ) 4689 ) 4690 ) 4691 4692 ; (src-24-indirect-operand QI) 4693 ; (src-24-indirect-operand HI) 4694 ; (src-24-indirect-operand SI) 4695 4696 ;------------------------------------------------------------- 4697 ; Destination operands with no additional fields 4698 ;------------------------------------------------------------- 4699 4700 (define-pmacro (dst16-basic-operand xmode) 4701 (begin 4702 (define-anyof-operand 4703 (name (.sym dst16-basic- xmode)) 4704 (comment (.str "m16c destination operand of size " xmode " with no additional fields")) 4705 (attrs (machine 16)) 4706 (mode xmode) 4707 (choices 4708 (.sym dst16-Rn-direct- xmode) 4709 (.sym dst16-An-direct- xmode) 4710 (.sym dst16-An-indirect- xmode) 4711 ) 4712 ) 4713 ) 4714 ) 4715 4716 (dst16-basic-operand QI) 4717 (dst16-basic-operand HI) 4718 (dst16-basic-operand SI) 4719 4720 (define-pmacro (dst32-basic-operand xmode) 4721 (begin 4722 (define-anyof-operand 4723 (name (.sym dst32-basic-Unprefixed- xmode)) 4724 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4725 (attrs (machine 32)) 4726 (mode xmode) 4727 (choices 4728 (.sym dst32-Rn-direct-Unprefixed- xmode) 4729 (.sym dst32-An-direct-Unprefixed- xmode) 4730 (.sym dst32-An-indirect-Unprefixed- xmode) 4731 ) 4732 ) 4733 (define-anyof-operand 4734 (name (.sym dst32-basic-Prefixed- xmode)) 4735 (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 4736 (attrs (machine 32)) 4737 (mode xmode) 4738 (choices 4739 (.sym dst32-Rn-direct-Prefixed- xmode) 4740 (.sym dst32-An-direct-Prefixed- xmode) 4741 (.sym dst32-An-indirect-Prefixed- xmode) 4742 ) 4743 ) 4744 ) 4745 ) 4746 4747 (dst32-basic-operand QI) 4748 (dst32-basic-operand HI) 4749 (dst32-basic-operand SI) 4750 4751 ;------------------------------------------------------------- 4752 ; Destination operands with possible additional fields at offset 16 bits 4753 ;------------------------------------------------------------- 4754 4755 (define-pmacro (dst16-16-operand xmode) 4756 (begin 4757 (define-anyof-operand 4758 (name (.sym dst16-16- xmode)) 4759 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4760 (attrs (machine 16)) 4761 (mode xmode) 4762 (choices 4763 (.sym dst16-Rn-direct- xmode) 4764 (.sym dst16-An-direct- xmode) 4765 (.sym dst16-An-indirect- xmode) 4766 (.sym dst16-16-8-An-relative- xmode) 4767 (.sym dst16-16-16-An-relative- xmode) 4768 (.sym dst16-16-8-SB-relative- xmode) 4769 (.sym dst16-16-16-SB-relative- xmode) 4770 (.sym dst16-16-8-FB-relative- xmode) 4771 (.sym dst16-16-16-absolute- xmode) 4772 ) 4773 ) 4774 (define-anyof-operand 4775 (name (.sym dst16-16-8- xmode)) 4776 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4777 (attrs (machine 16)) 4778 (mode xmode) 4779 (choices 4780 (.sym dst16-16-8-An-relative- xmode) 4781 (.sym dst16-16-8-SB-relative- xmode) 4782 (.sym dst16-16-8-FB-relative- xmode) 4783 ) 4784 ) 4785 (define-anyof-operand 4786 (name (.sym dst16-16-16- xmode)) 4787 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4788 (attrs (machine 16)) 4789 (mode xmode) 4790 (choices 4791 (.sym dst16-16-16-An-relative- xmode) 4792 (.sym dst16-16-16-SB-relative- xmode) 4793 (.sym dst16-16-16-absolute- xmode) 4794 ) 4795 ) 4796 (define-anyof-operand 4797 (name (.sym dst16-16-16sa- xmode)) 4798 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4799 (attrs (machine 16)) 4800 (mode xmode) 4801 (choices 4802 (.sym dst16-16-16-SB-relative- xmode) 4803 (.sym dst16-16-16-absolute- xmode) 4804 ) 4805 ) 4806 (define-anyof-operand 4807 (name (.sym dst16-16-20ar- xmode)) 4808 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16")) 4809 (attrs (machine 16)) 4810 (mode xmode) 4811 (choices 4812 (.sym dst16-16-20-An-relative- xmode) 4813 ) 4814 ) 4815 ) 4816 ) 4817 4818 (dst16-16-operand QI) 4819 (dst16-16-operand HI) 4820 (dst16-16-operand SI) 4821 4822 (define-anyof-operand 4823 (name dst16-16-Ext-QI) 4824 (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16") 4825 (attrs (machine 16)) 4826 (mode QI) 4827 (choices 4828 dst16-Rn-direct-Ext-QI 4829 dst16-An-indirect-Ext-QI 4830 dst16-16-8-An-relative-Ext-QI 4831 dst16-16-16-An-relative-Ext-QI 4832 dst16-16-8-SB-relative-Ext-QI 4833 dst16-16-16-SB-relative-Ext-QI 4834 dst16-16-8-FB-relative-Ext-QI 4835 dst16-16-16-absolute-Ext-QI 4836 ) 4837 ) 4838 4839 (define-derived-operand 4840 (name dst16-An-indirect-Mova-HI) 4841 (comment "m16c addressof An indirect destination HI") 4842 (attrs (ISA m16c)) 4843 (mode HI) 4844 (args (Dst16An)) 4845 (syntax "[$Dst16An]") 4846 (base-ifield f-12-4) 4847 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An)) 4848 (ifield-assertion 4849 (andif (eq f-12-2 1) (eq f-14-1 1))) 4850 (getter Dst16An) 4851 (setter (nop)) 4852 ) 4853 4854 (define-derived-operand 4855 (name dst16-16-8-An-relative-Mova-HI) 4856 (comment 4857 "m16c addressof dsp:8[An] relative destination HI") 4858 (attrs (ISA m16c)) 4859 (mode HI) 4860 (args (Dst16An Dsp-16-u8)) 4861 (syntax "${Dsp-16-u8}[$Dst16An]") 4862 (base-ifield f-12-4) 4863 (encoding 4864 (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An)) 4865 (ifield-assertion 4866 (andif (eq f-12-2 2) (eq f-14-1 0))) 4867 (getter (add Dsp-16-u8 Dst16An)) 4868 (setter (nop)) 4869 ) 4870 (define-derived-operand 4871 (name dst16-16-16-An-relative-Mova-HI) 4872 (comment 4873 "m16c addressof dsp:16[An] relative destination HI") 4874 (attrs (ISA m16c)) 4875 (mode HI) 4876 (args (Dst16An Dsp-16-u16)) 4877 (syntax "${Dsp-16-u16}[$Dst16An]") 4878 (base-ifield f-12-4) 4879 (encoding 4880 (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An)) 4881 (ifield-assertion 4882 (andif (eq f-12-2 3) (eq f-14-1 0))) 4883 (getter (add Dsp-16-u16 Dst16An)) 4884 (setter (nop)) 4885 ) 4886 (define-derived-operand 4887 (name dst16-16-8-SB-relative-Mova-HI) 4888 (comment 4889 "m16c addressof dsp:8[sb] relative destination HI") 4890 (attrs (ISA m16c)) 4891 (mode HI) 4892 (args (Dsp-16-u8)) 4893 (syntax "${Dsp-16-u8}[sb]") 4894 (base-ifield f-12-4) 4895 (encoding (+ (f-12-4 10) Dsp-16-u8)) 4896 (ifield-assertion (eq f-12-4 10)) 4897 (getter (add Dsp-16-u8 (reg h-sb))) 4898 (setter (nop)) 4899 ) 4900 (define-derived-operand 4901 (name dst16-16-16-SB-relative-Mova-HI) 4902 (comment 4903 "m16c addressof dsp:16[sb] relative destination HI") 4904 (attrs (ISA m16c)) 4905 (mode HI) 4906 (args (Dsp-16-u16)) 4907 (syntax "${Dsp-16-u16}[sb]") 4908 (base-ifield f-12-4) 4909 (encoding (+ (f-12-4 14) Dsp-16-u16)) 4910 (ifield-assertion (eq f-12-4 14)) 4911 (getter (add Dsp-16-u16 (reg h-sb))) 4912 (setter (nop)) 4913 ) 4914 (define-derived-operand 4915 (name dst16-16-8-FB-relative-Mova-HI) 4916 (comment 4917 "m16c addressof dsp:8[fb] relative destination HI") 4918 (attrs (ISA m16c)) 4919 (mode HI) 4920 (args (Dsp-16-s8)) 4921 (syntax "${Dsp-16-s8}[fb]") 4922 (base-ifield f-12-4) 4923 (encoding (+ (f-12-4 11) Dsp-16-s8)) 4924 (ifield-assertion (eq f-12-4 11)) 4925 (getter (add Dsp-16-s8 (reg h-fb))) 4926 (setter (nop)) 4927 ) 4928 (define-derived-operand 4929 (name dst16-16-16-absolute-Mova-HI) 4930 (comment "m16c addressof absolute address HI") 4931 (attrs (ISA m16c)) 4932 (mode HI) 4933 (args (Dsp-16-u16)) 4934 (syntax "${Dsp-16-u16}") 4935 (base-ifield f-12-4) 4936 (encoding (+ (f-12-4 15) Dsp-16-u16)) 4937 (ifield-assertion (eq f-12-4 15)) 4938 (getter Dsp-16-u16) 4939 (setter (nop)) 4940 ) 4941 4942 (define-anyof-operand 4943 (name dst16-16-Mova-HI) 4944 (comment "m16c addressof destination operand of size HI with additional fields at offset 16") 4945 (attrs (machine 16)) 4946 (mode HI) 4947 (choices 4948 dst16-An-indirect-Mova-HI 4949 dst16-16-8-An-relative-Mova-HI 4950 dst16-16-16-An-relative-Mova-HI 4951 dst16-16-8-SB-relative-Mova-HI 4952 dst16-16-16-SB-relative-Mova-HI 4953 dst16-16-8-FB-relative-Mova-HI 4954 dst16-16-16-absolute-Mova-HI 4955 ) 4956 ) 4957 4958 (define-derived-operand 4959 (name dst32-An-indirect-Unprefixed-Mova-SI) 4960 (comment "m32c addressof An indirect destination SI") 4961 (attrs (ISA m32c)) 4962 (mode SI) 4963 (args (Dst32AnUnprefixed)) 4964 (syntax "[$Dst32AnUnprefixed]") 4965 (base-ifield f-4-6) 4966 (encoding 4967 (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed)) 4968 (ifield-assertion 4969 (andif (eq f-4-3 0) (eq f-8-1 0))) 4970 (getter Dst32AnUnprefixed) 4971 (setter (nop)) 4972 ) 4973 4974 (define-derived-operand 4975 (name dst32-16-8-An-relative-Unprefixed-Mova-SI) 4976 (comment "m32c addressof dsp:8[An] relative destination SI") 4977 (attrs (ISA m32c)) 4978 (mode SI) 4979 (args (Dst32AnUnprefixed Dsp-16-u8)) 4980 (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]") 4981 (base-ifield f-4-6) 4982 (encoding 4983 (+ (f-4-3 1) 4984 (f-8-1 0) 4985 Dsp-16-u8 4986 Dst32AnUnprefixed)) 4987 (ifield-assertion 4988 (andif (eq f-4-3 1) (eq f-8-1 0))) 4989 (getter (add Dsp-16-u8 Dst32AnUnprefixed)) 4990 (setter (nop)) 4991 ) 4992 4993 (define-derived-operand 4994 (name dst32-16-16-An-relative-Unprefixed-Mova-SI) 4995 (comment 4996 "m32c addressof dsp:16[An] relative destination SI") 4997 (attrs (ISA m32c)) 4998 (mode SI) 4999 (args (Dst32AnUnprefixed Dsp-16-u16)) 5000 (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]") 5001 (base-ifield f-4-6) 5002 (encoding 5003 (+ (f-4-3 2) 5004 (f-8-1 0) 5005 Dsp-16-u16 5006 Dst32AnUnprefixed)) 5007 (ifield-assertion 5008 (andif (eq f-4-3 2) (eq f-8-1 0))) 5009 (getter (add Dsp-16-u16 Dst32AnUnprefixed)) 5010 (setter (nop)) 5011 ) 5012 5013 (define-derived-operand 5014 (name dst32-16-24-An-relative-Unprefixed-Mova-SI) 5015 (comment "addressof m32c dsp:16[An] relative destination SI") 5016 (attrs (ISA m32c)) 5017 (mode SI) 5018 (args (Dst32AnUnprefixed Dsp-16-u24)) 5019 (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]") 5020 (base-ifield f-4-6) 5021 (encoding 5022 (+ (f-4-3 3) 5023 (f-8-1 0) 5024 Dsp-16-u24 5025 Dst32AnUnprefixed)) 5026 (ifield-assertion 5027 (andif (eq f-4-3 3) (eq f-8-1 0))) 5028 (getter (add Dsp-16-u24 Dst32AnUnprefixed)) 5029 (setter (nop)) 5030 ) 5031 5032 (define-derived-operand 5033 (name dst32-16-8-SB-relative-Unprefixed-Mova-SI) 5034 (comment "m32c addressof dsp:8[sb] relative destination SI") 5035 (attrs (ISA m32c)) 5036 (mode SI) 5037 (args (Dsp-16-u8)) 5038 (syntax "${Dsp-16-u8}[sb]") 5039 (base-ifield f-4-6) 5040 (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8)) 5041 (ifield-assertion 5042 (andif (eq f-4-3 1) (eq f-8-2 2))) 5043 (getter (add Dsp-16-u8 (reg h-sb))) 5044 (setter (nop)) 5045 ) 5046 5047 (define-derived-operand 5048 (name dst32-16-16-SB-relative-Unprefixed-Mova-SI) 5049 (comment "m32c addressof dsp:16[sb] relative destination SI") 5050 (attrs (ISA m32c)) 5051 (mode SI) 5052 (args (Dsp-16-u16)) 5053 (syntax "${Dsp-16-u16}[sb]") 5054 (base-ifield f-4-6) 5055 (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16)) 5056 (ifield-assertion 5057 (andif (eq f-4-3 2) (eq f-8-2 2))) 5058 (getter (add Dsp-16-u16 (reg h-sb))) 5059 (setter (nop)) 5060 ) 5061 5062 (define-derived-operand 5063 (name dst32-16-8-FB-relative-Unprefixed-Mova-SI) 5064 (comment "m32c addressof dsp:8[fb] relative destination SI") 5065 (attrs (ISA m32c)) 5066 (mode SI) 5067 (args (Dsp-16-s8)) 5068 (syntax "${Dsp-16-s8}[fb]") 5069 (base-ifield f-4-6) 5070 (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8)) 5071 (ifield-assertion 5072 (andif (eq f-4-3 1) (eq f-8-2 3))) 5073 (getter (add Dsp-16-s8 (reg h-fb))) 5074 (setter (nop)) 5075 ) 5076 5077 (define-derived-operand 5078 (name dst32-16-16-FB-relative-Unprefixed-Mova-SI) 5079 (comment "m32c addressof dsp:16[fb] relative destination SI") 5080 (attrs (ISA m32c)) 5081 (mode SI) 5082 (args (Dsp-16-s16)) 5083 (syntax "${Dsp-16-s16}[fb]") 5084 (base-ifield f-4-6) 5085 (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16)) 5086 (ifield-assertion 5087 (andif (eq f-4-3 2) (eq f-8-2 3))) 5088 (getter (add Dsp-16-s16 (reg h-fb))) 5089 (setter (nop)) 5090 ) 5091 5092 (define-derived-operand 5093 (name dst32-16-16-absolute-Unprefixed-Mova-SI) 5094 (comment "m32c addressof absolute address SI") (attrs (ISA m32c)) 5095 (mode SI) 5096 (args (Dsp-16-u16)) 5097 (syntax "${Dsp-16-u16}") 5098 (base-ifield f-4-6) 5099 (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16)) 5100 (ifield-assertion 5101 (andif (eq f-4-3 3) (eq f-8-2 3))) 5102 (getter Dsp-16-u16) 5103 (setter (nop)) 5104 ) 5105 5106 (define-derived-operand 5107 (name dst32-16-24-absolute-Unprefixed-Mova-SI) 5108 (comment "m32c addressof absolute address SI") (attrs (ISA m32c)) 5109 (mode SI) 5110 (args (Dsp-16-u24)) 5111 (syntax "${Dsp-16-u24}") 5112 (base-ifield f-4-6) 5113 (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24)) 5114 (ifield-assertion 5115 (andif (eq f-4-3 3) (eq f-8-2 2))) 5116 (getter Dsp-16-u24) 5117 (setter (nop)) 5118 ) 5119 5120 (define-anyof-operand 5121 (name dst32-16-Unprefixed-Mova-SI) 5122 (comment 5123 "m32c addressof destination operand of size SI with additional fields at offset 16") 5124 (attrs (ISA m32c)) 5125 (mode SI) 5126 (choices 5127 dst32-An-indirect-Unprefixed-Mova-SI 5128 dst32-16-8-An-relative-Unprefixed-Mova-SI 5129 dst32-16-16-An-relative-Unprefixed-Mova-SI 5130 dst32-16-24-An-relative-Unprefixed-Mova-SI 5131 dst32-16-8-SB-relative-Unprefixed-Mova-SI 5132 dst32-16-16-SB-relative-Unprefixed-Mova-SI 5133 dst32-16-8-FB-relative-Unprefixed-Mova-SI 5134 dst32-16-16-FB-relative-Unprefixed-Mova-SI 5135 dst32-16-16-absolute-Unprefixed-Mova-SI 5136 dst32-16-24-absolute-Unprefixed-Mova-SI)) 5137 5138 (define-pmacro (dst32-16-operand xmode) 5139 (begin 5140 (define-anyof-operand 5141 (name (.sym dst32-16-Unprefixed- xmode)) 5142 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5143 (attrs (machine 32)) 5144 (mode xmode) 5145 (choices 5146 (.sym dst32-Rn-direct-Unprefixed- xmode) 5147 (.sym dst32-An-direct-Unprefixed- xmode) 5148 (.sym dst32-An-indirect-Unprefixed- xmode) 5149 (.sym dst32-16-8-An-relative-Unprefixed- xmode) 5150 (.sym dst32-16-16-An-relative-Unprefixed- xmode) 5151 (.sym dst32-16-24-An-relative-Unprefixed- xmode) 5152 (.sym dst32-16-8-SB-relative-Unprefixed- xmode) 5153 (.sym dst32-16-16-SB-relative-Unprefixed- xmode) 5154 (.sym dst32-16-8-FB-relative-Unprefixed- xmode) 5155 (.sym dst32-16-16-FB-relative-Unprefixed- xmode) 5156 (.sym dst32-16-16-absolute-Unprefixed- xmode) 5157 (.sym dst32-16-24-absolute-Unprefixed- xmode) 5158 ) 5159 ) 5160 (define-anyof-operand 5161 (name (.sym dst32-16-8-Unprefixed- xmode)) 5162 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5163 (attrs (machine 32)) 5164 (mode xmode) 5165 (choices 5166 (.sym dst32-16-8-An-relative-Unprefixed- xmode) 5167 (.sym dst32-16-8-SB-relative-Unprefixed- xmode) 5168 (.sym dst32-16-8-FB-relative-Unprefixed- xmode) 5169 ) 5170 ) 5171 (define-anyof-operand 5172 (name (.sym dst32-16-16-Unprefixed- xmode)) 5173 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5174 (attrs (machine 32)) 5175 (mode xmode) 5176 (choices 5177 (.sym dst32-16-16-An-relative-Unprefixed- xmode) 5178 (.sym dst32-16-16-SB-relative-Unprefixed- xmode) 5179 (.sym dst32-16-16-FB-relative-Unprefixed- xmode) 5180 (.sym dst32-16-16-absolute-Unprefixed- xmode) 5181 ) 5182 ) 5183 (define-anyof-operand 5184 (name (.sym dst32-16-16sa-Unprefixed- xmode)) 5185 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5186 (attrs (machine 32)) 5187 (mode xmode) 5188 (choices 5189 (.sym dst32-16-16-SB-relative-Unprefixed- xmode) 5190 (.sym dst32-16-16-FB-relative-Unprefixed- xmode) 5191 (.sym dst32-16-16-absolute-Unprefixed- xmode) 5192 ) 5193 ) 5194 (define-anyof-operand 5195 (name (.sym dst32-16-24-Unprefixed- xmode)) 5196 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16")) 5197 (attrs (machine 32)) 5198 (mode xmode) 5199 (choices 5200 (.sym dst32-16-24-An-relative-Unprefixed- xmode) 5201 (.sym dst32-16-24-absolute-Unprefixed- xmode) 5202 ) 5203 ) 5204 ) 5205 ) 5206 5207 (dst32-16-operand QI) 5208 (dst32-16-operand HI) 5209 (dst32-16-operand SI) 5210 5211 (define-pmacro (dst32-16-Ext-operand smode dmode) 5212 (begin 5213 (define-anyof-operand 5214 (name (.sym dst32-16-ExtUnprefixed- smode)) 5215 (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16")) 5216 (attrs (machine 32)) 5217 (mode dmode) 5218 (choices 5219 (.sym dst32-Rn-direct-ExtUnprefixed- smode) 5220 (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version 5221 (.sym dst32-An-indirect-ExtUnprefixed- smode) 5222 (.sym dst32-16-8-An-relative-ExtUnprefixed- smode) 5223 (.sym dst32-16-16-An-relative-ExtUnprefixed- smode) 5224 (.sym dst32-16-24-An-relative-ExtUnprefixed- smode) 5225 (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode) 5226 (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode) 5227 (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode) 5228 (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode) 5229 (.sym dst32-16-16-absolute-ExtUnprefixed- smode) 5230 (.sym dst32-16-24-absolute-ExtUnprefixed- smode) 5231 ) 5232 ) 5233 ) 5234 ) 5235 5236 (dst32-16-Ext-operand QI HI) 5237 (dst32-16-Ext-operand HI SI) 5238 5239 (define-anyof-operand 5240 (name dst32-16-Unprefixed-Mulex-HI) 5241 (comment "m32c destination operand of size HI with additional fields at offset 16") 5242 (attrs (machine 32)) 5243 (mode HI) 5244 (choices 5245 dst32-R3-direct-Unprefixed-HI 5246 dst32-An-direct-Unprefixed-HI 5247 dst32-An-indirect-Unprefixed-HI 5248 dst32-16-8-An-relative-Unprefixed-HI 5249 dst32-16-16-An-relative-Unprefixed-HI 5250 dst32-16-24-An-relative-Unprefixed-HI 5251 dst32-16-8-SB-relative-Unprefixed-HI 5252 dst32-16-16-SB-relative-Unprefixed-HI 5253 dst32-16-8-FB-relative-Unprefixed-HI 5254 dst32-16-16-FB-relative-Unprefixed-HI 5255 dst32-16-16-absolute-Unprefixed-HI 5256 dst32-16-24-absolute-Unprefixed-HI 5257 ) 5258 ) 5259 ;------------------------------------------------------------- 5260 ; Destination operands with possible additional fields at offset 24 bits 5261 ;------------------------------------------------------------- 5262 5263 (define-pmacro (dst16-24-operand xmode) 5264 (begin 5265 (define-anyof-operand 5266 (name (.sym dst16-24- xmode)) 5267 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24")) 5268 (attrs (machine 16)) 5269 (mode xmode) 5270 (choices 5271 (.sym dst16-Rn-direct- xmode) 5272 (.sym dst16-An-direct- xmode) 5273 (.sym dst16-An-indirect- xmode) 5274 (.sym dst16-24-8-An-relative- xmode) 5275 (.sym dst16-24-16-An-relative- xmode) 5276 (.sym dst16-24-8-SB-relative- xmode) 5277 (.sym dst16-24-16-SB-relative- xmode) 5278 (.sym dst16-24-8-FB-relative- xmode) 5279 (.sym dst16-24-16-absolute- xmode) 5280 ) 5281 ) 5282 ) 5283 ) 5284 5285 (dst16-24-operand QI) 5286 (dst16-24-operand HI) 5287 5288 (define-pmacro (dst32-24-operand xmode) 5289 (begin 5290 (define-anyof-operand 5291 (name (.sym dst32-24-Unprefixed- xmode)) 5292 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5293 (attrs (machine 32)) 5294 (mode xmode) 5295 (choices 5296 (.sym dst32-Rn-direct-Unprefixed- xmode) 5297 (.sym dst32-An-direct-Unprefixed- xmode) 5298 (.sym dst32-An-indirect-Unprefixed- xmode) 5299 (.sym dst32-24-8-An-relative-Unprefixed- xmode) 5300 (.sym dst32-24-16-An-relative-Unprefixed- xmode) 5301 (.sym dst32-24-24-An-relative-Unprefixed- xmode) 5302 (.sym dst32-24-8-SB-relative-Unprefixed- xmode) 5303 (.sym dst32-24-16-SB-relative-Unprefixed- xmode) 5304 (.sym dst32-24-8-FB-relative-Unprefixed- xmode) 5305 (.sym dst32-24-16-FB-relative-Unprefixed- xmode) 5306 (.sym dst32-24-16-absolute-Unprefixed- xmode) 5307 (.sym dst32-24-24-absolute-Unprefixed- xmode) 5308 ) 5309 ) 5310 (define-anyof-operand 5311 (name (.sym dst32-24-Prefixed- xmode)) 5312 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5313 (attrs (machine 32)) 5314 (mode xmode) 5315 (choices 5316 (.sym dst32-Rn-direct-Prefixed- xmode) 5317 (.sym dst32-An-direct-Prefixed- xmode) 5318 (.sym dst32-An-indirect-Prefixed- xmode) 5319 (.sym dst32-24-8-An-relative-Prefixed- xmode) 5320 (.sym dst32-24-16-An-relative-Prefixed- xmode) 5321 (.sym dst32-24-24-An-relative-Prefixed- xmode) 5322 (.sym dst32-24-8-SB-relative-Prefixed- xmode) 5323 (.sym dst32-24-16-SB-relative-Prefixed- xmode) 5324 (.sym dst32-24-8-FB-relative-Prefixed- xmode) 5325 (.sym dst32-24-16-FB-relative-Prefixed- xmode) 5326 (.sym dst32-24-16-absolute-Prefixed- xmode) 5327 (.sym dst32-24-24-absolute-Prefixed- xmode) 5328 ) 5329 ) 5330 (define-anyof-operand 5331 (name (.sym dst32-24-8-Prefixed- xmode)) 5332 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5333 (attrs (machine 32)) 5334 (mode xmode) 5335 (choices 5336 (.sym dst32-24-8-An-relative-Prefixed- xmode) 5337 (.sym dst32-24-8-SB-relative-Prefixed- xmode) 5338 (.sym dst32-24-8-FB-relative-Prefixed- xmode) 5339 ) 5340 ) 5341 (define-anyof-operand 5342 (name (.sym dst32-24-16-Prefixed- xmode)) 5343 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5344 (attrs (machine 32)) 5345 (mode xmode) 5346 (choices 5347 (.sym dst32-24-16-An-relative-Prefixed- xmode) 5348 (.sym dst32-24-16-SB-relative-Prefixed- xmode) 5349 (.sym dst32-24-16-FB-relative-Prefixed- xmode) 5350 (.sym dst32-24-16-absolute-Prefixed- xmode) 5351 ) 5352 ) 5353 (define-anyof-operand 5354 (name (.sym dst32-24-24-Prefixed- xmode)) 5355 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5356 (attrs (machine 32)) 5357 (mode xmode) 5358 (choices 5359 (.sym dst32-24-24-An-relative-Prefixed- xmode) 5360 (.sym dst32-24-24-absolute-Prefixed- xmode) 5361 ) 5362 ) 5363 ; (define-anyof-operand 5364 ; (name (.sym dst32-24-indirect- xmode)) 5365 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5366 ; (attrs (machine 32)) 5367 ; (mode xmode) 5368 ; (choices 5369 ; (.sym dst32-An-indirect-indirect- xmode) 5370 ; (.sym dst32-24-8-An-relative-indirect- xmode) 5371 ; (.sym dst32-24-16-An-relative-indirect- xmode) 5372 ; (.sym dst32-24-24-An-relative-indirect- xmode) 5373 ; (.sym dst32-24-8-SB-relative-indirect- xmode) 5374 ; (.sym dst32-24-16-SB-relative-indirect- xmode) 5375 ; (.sym dst32-24-8-FB-relative-indirect- xmode) 5376 ; (.sym dst32-24-16-FB-relative-indirect- xmode) 5377 ; ) 5378 ; ) 5379 ; (define-anyof-operand 5380 ; (name (.sym dst32-basic-indirect- xmode)) 5381 ; (comment (.str "m32c destination operand of size " xmode " with no additional fields")) 5382 ; (attrs (machine 32)) 5383 ; (mode xmode) 5384 ; (choices 5385 ; (.sym dst32-An-indirect-indirect- xmode) 5386 ; ) 5387 ; ) 5388 ; (define-anyof-operand 5389 ; (name (.sym dst32-24-8-indirect- xmode)) 5390 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5391 ; (attrs (machine 32)) 5392 ; (mode xmode) 5393 ; (choices 5394 ; (.sym dst32-24-8-An-relative-indirect- xmode) 5395 ; (.sym dst32-24-8-SB-relative-indirect- xmode) 5396 ; (.sym dst32-24-8-FB-relative-indirect- xmode) 5397 ; ) 5398 ; ) 5399 ; (define-anyof-operand 5400 ; (name (.sym dst32-24-16-indirect- xmode)) 5401 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5402 ; (attrs (machine 32)) 5403 ; (mode xmode) 5404 ; (choices 5405 ; (.sym dst32-24-16-An-relative-indirect- xmode) 5406 ; (.sym dst32-24-16-SB-relative-indirect- xmode) 5407 ; (.sym dst32-24-16-FB-relative-indirect- xmode) 5408 ; ) 5409 ; ) 5410 ; (define-anyof-operand 5411 ; (name (.sym dst32-24-24-indirect- xmode)) 5412 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24")) 5413 ; (attrs (machine 32)) 5414 ; (mode xmode) 5415 ; (choices 5416 ; (.sym dst32-24-24-An-relative-indirect- xmode) 5417 ; ) 5418 ; ) 5419 ; (define-anyof-operand 5420 ; (name (.sym dst32-24-absolute-indirect- xmode)) 5421 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5422 ; (attrs (machine 32)) 5423 ; (mode xmode) 5424 ; (choices 5425 ; (.sym dst32-24-16-absolute-indirect-derived- xmode) 5426 ; (.sym dst32-24-24-absolute-indirect-derived- xmode) 5427 ; ) 5428 ; ) 5429 ; (define-anyof-operand 5430 ; (name (.sym dst32-24-16-absolute-indirect- xmode)) 5431 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5432 ; (attrs (machine 32)) 5433 ; (mode xmode) 5434 ; (choices 5435 ; (.sym dst32-24-16-absolute-indirect-derived- xmode) 5436 ; ) 5437 ; ) 5438 ; (define-anyof-operand 5439 ; (name (.sym dst32-24-24-absolute-indirect- xmode)) 5440 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5441 ; (attrs (machine 32)) 5442 ; (mode xmode) 5443 ; (choices 5444 ; (.sym dst32-24-24-absolute-indirect-derived- xmode) 5445 ; ) 5446 ; ) 5447 ) 5448 ) 5449 5450 (dst32-24-operand QI) 5451 (dst32-24-operand HI) 5452 (dst32-24-operand SI) 5453 5454 ;------------------------------------------------------------- 5455 ; Destination operands with possible additional fields at offset 32 bits 5456 ;------------------------------------------------------------- 5457 5458 (define-pmacro (dst16-32-operand xmode) 5459 (begin 5460 (define-anyof-operand 5461 (name (.sym dst16-32- xmode)) 5462 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32")) 5463 (attrs (machine 16)) 5464 (mode xmode) 5465 (choices 5466 (.sym dst16-Rn-direct- xmode) 5467 (.sym dst16-An-direct- xmode) 5468 (.sym dst16-An-indirect- xmode) 5469 (.sym dst16-32-8-An-relative- xmode) 5470 (.sym dst16-32-16-An-relative- xmode) 5471 (.sym dst16-32-8-SB-relative- xmode) 5472 (.sym dst16-32-16-SB-relative- xmode) 5473 (.sym dst16-32-8-FB-relative- xmode) 5474 (.sym dst16-32-16-absolute- xmode) 5475 ) 5476 ) 5477 ) 5478 ) 5479 (dst16-32-operand QI) 5480 (dst16-32-operand HI) 5481 5482 ; This macro actually handles operands at offset 32, 40 and 48 bits 5483 (define-pmacro (dst32-32plus-operand offset xmode) 5484 (begin 5485 (define-anyof-operand 5486 (name (.sym dst32- offset -Unprefixed- xmode)) 5487 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5488 (attrs (machine 32)) 5489 (mode xmode) 5490 (choices 5491 (.sym dst32-Rn-direct-Unprefixed- xmode) 5492 (.sym dst32-An-direct-Unprefixed- xmode) 5493 (.sym dst32-An-indirect-Unprefixed- xmode) 5494 (.sym dst32- offset -8-An-relative-Unprefixed- xmode) 5495 (.sym dst32- offset -16-An-relative-Unprefixed- xmode) 5496 (.sym dst32- offset -24-An-relative-Unprefixed- xmode) 5497 (.sym dst32- offset -8-SB-relative-Unprefixed- xmode) 5498 (.sym dst32- offset -16-SB-relative-Unprefixed- xmode) 5499 (.sym dst32- offset -8-FB-relative-Unprefixed- xmode) 5500 (.sym dst32- offset -16-FB-relative-Unprefixed- xmode) 5501 (.sym dst32- offset -16-absolute-Unprefixed- xmode) 5502 (.sym dst32- offset -24-absolute-Unprefixed- xmode) 5503 ) 5504 ) 5505 (define-anyof-operand 5506 (name (.sym dst32- offset -Prefixed- xmode)) 5507 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5508 (attrs (machine 32)) 5509 (mode xmode) 5510 (choices 5511 (.sym dst32-Rn-direct-Prefixed- xmode) 5512 (.sym dst32-An-direct-Prefixed- xmode) 5513 (.sym dst32-An-indirect-Prefixed- xmode) 5514 (.sym dst32- offset -8-An-relative-Prefixed- xmode) 5515 (.sym dst32- offset -16-An-relative-Prefixed- xmode) 5516 (.sym dst32- offset -24-An-relative-Prefixed- xmode) 5517 (.sym dst32- offset -8-SB-relative-Prefixed- xmode) 5518 (.sym dst32- offset -16-SB-relative-Prefixed- xmode) 5519 (.sym dst32- offset -8-FB-relative-Prefixed- xmode) 5520 (.sym dst32- offset -16-FB-relative-Prefixed- xmode) 5521 (.sym dst32- offset -16-absolute-Prefixed- xmode) 5522 (.sym dst32- offset -24-absolute-Prefixed- xmode) 5523 ) 5524 ) 5525 ; (define-anyof-operand 5526 ; (name (.sym dst32- offset -indirect- xmode)) 5527 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5528 ; (attrs (machine 32)) 5529 ; (mode xmode) 5530 ; (choices 5531 ; (.sym dst32-An-indirect-indirect- xmode) 5532 ; (.sym dst32- offset -8-An-relative-indirect- xmode) 5533 ; (.sym dst32- offset -16-An-relative-indirect- xmode) 5534 ; (.sym dst32- offset -24-An-relative-indirect- xmode) 5535 ; (.sym dst32- offset -8-SB-relative-indirect- xmode) 5536 ; (.sym dst32- offset -16-SB-relative-indirect- xmode) 5537 ; (.sym dst32- offset -8-FB-relative-indirect- xmode) 5538 ; (.sym dst32- offset -16-FB-relative-indirect- xmode) 5539 ; ) 5540 ; ) 5541 ; (define-anyof-operand 5542 ; (name (.sym dst32- offset -absolute-indirect- xmode)) 5543 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5544 ; (attrs (machine 32)) 5545 ; (mode xmode) 5546 ; (choices 5547 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode) 5548 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode) 5549 ; ) 5550 ; ) 5551 ) 5552 ) 5553 5554 (dst32-32plus-operand 32 QI) 5555 (dst32-32plus-operand 32 HI) 5556 (dst32-32plus-operand 32 SI) 5557 (dst32-32plus-operand 40 QI) 5558 (dst32-32plus-operand 40 HI) 5559 (dst32-32plus-operand 40 SI) 5560 5561 ;------------------------------------------------------------- 5562 ; Destination operands with possible additional fields at offset 48 bits 5563 ;------------------------------------------------------------- 5564 5565 (define-pmacro (dst32-48-operand offset xmode) 5566 (begin 5567 (define-anyof-operand 5568 (name (.sym dst32- offset -Prefixed- xmode)) 5569 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5570 (attrs (machine 32)) 5571 (mode xmode) 5572 (choices 5573 (.sym dst32-Rn-direct-Prefixed- xmode) 5574 (.sym dst32-An-direct-Prefixed- xmode) 5575 (.sym dst32-An-indirect-Prefixed- xmode) 5576 (.sym dst32- offset -8-An-relative-Prefixed- xmode) 5577 (.sym dst32- offset -16-An-relative-Prefixed- xmode) 5578 (.sym dst32- offset -24-An-relative-Prefixed- xmode) 5579 (.sym dst32- offset -8-SB-relative-Prefixed- xmode) 5580 (.sym dst32- offset -16-SB-relative-Prefixed- xmode) 5581 (.sym dst32- offset -8-FB-relative-Prefixed- xmode) 5582 (.sym dst32- offset -16-FB-relative-Prefixed- xmode) 5583 (.sym dst32- offset -16-absolute-Prefixed- xmode) 5584 (.sym dst32- offset -24-absolute-Prefixed- xmode) 5585 ) 5586 ) 5587 ; (define-anyof-operand 5588 ; (name (.sym dst32- offset -indirect- xmode)) 5589 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32")) 5590 ; (attrs (machine 32)) 5591 ; (mode xmode) 5592 ; (choices 5593 ; (.sym dst32-An-indirect-indirect- xmode) 5594 ; (.sym dst32- offset -8-An-relative-indirect- xmode) 5595 ; (.sym dst32- offset -16-An-relative-indirect- xmode) 5596 ; (.sym dst32- offset -24-An-relative-indirect- xmode) 5597 ; (.sym dst32- offset -8-SB-relative-indirect- xmode) 5598 ; (.sym dst32- offset -16-SB-relative-indirect- xmode) 5599 ; (.sym dst32- offset -8-FB-relative-indirect- xmode) 5600 ; (.sym dst32- offset -16-FB-relative-indirect- xmode) 5601 ; ) 5602 ; ) 5603 ; (define-anyof-operand 5604 ; (name (.sym dst32- offset -absolute-indirect- xmode)) 5605 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect")) 5606 ; (attrs (machine 32)) 5607 ; (mode xmode) 5608 ; (choices 5609 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode) 5610 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode) 5611 ; ) 5612 ; ) 5613 ) 5614 ) 5615 5616 (dst32-48-operand 48 QI) 5617 (dst32-48-operand 48 HI) 5618 (dst32-48-operand 48 SI) 5619 5620 ;------------------------------------------------------------- 5621 ; Bit operands for m16c 5622 ;------------------------------------------------------------- 5623 5624 (define-pmacro (bit16-operand offset) 5625 (begin 5626 (define-anyof-operand 5627 (name (.sym bit16- offset)) 5628 (comment (.str "m16c bit operand with possible additional fields at offset 24")) 5629 (attrs (machine 16)) 5630 (mode BI) 5631 (choices 5632 bit16-Rn-direct 5633 bit16-An-direct 5634 bit16-An-indirect 5635 (.sym bit16- offset -8-An-relative) 5636 (.sym bit16- offset -16-An-relative) 5637 (.sym bit16- offset -8-SB-relative) 5638 (.sym bit16- offset -16-SB-relative) 5639 (.sym bit16- offset -8-FB-relative) 5640 (.sym bit16- offset -16-absolute) 5641 ) 5642 ) 5643 (define-anyof-operand 5644 (name (.sym bit16- offset -basic)) 5645 (comment (.str "m16c bit operand with no additional fields")) 5646 (attrs (machine 16)) 5647 (mode BI) 5648 (choices 5649 bit16-An-indirect 5650 ) 5651 ) 5652 (define-anyof-operand 5653 (name (.sym bit16- offset -8)) 5654 (comment (.str "m16c bit operand with possible additional fields at offset 24")) 5655 (attrs (machine 16)) 5656 (mode BI) 5657 (choices 5658 bit16-Rn-direct 5659 bit16-An-direct 5660 (.sym bit16- offset -8-An-relative) 5661 (.sym bit16- offset -8-SB-relative) 5662 (.sym bit16- offset -8-FB-relative) 5663 ) 5664 ) 5665 (define-anyof-operand 5666 (name (.sym bit16- offset -16)) 5667 (comment (.str "m16c bit operand with possible additional fields at offset 24")) 5668 (attrs (machine 16)) 5669 (mode BI) 5670 (choices 5671 (.sym bit16- offset -16-An-relative) 5672 (.sym bit16- offset -16-SB-relative) 5673 (.sym bit16- offset -16-absolute) 5674 ) 5675 ) 5676 ) 5677 ) 5678 5679 (bit16-operand 16) 5680 5681 ;------------------------------------------------------------- 5682 ; Bit operands for m32c 5683 ;------------------------------------------------------------- 5684 5685 (define-pmacro (bit32-operand offset group) 5686 (begin 5687 (define-anyof-operand 5688 (name (.sym bit32- offset - group)) 5689 (comment (.str "m32c bit operand with possible additional fields at offset 24")) 5690 (attrs (machine 32)) 5691 (mode BI) 5692 (choices 5693 (.sym bit32-Rn-direct- group) 5694 (.sym bit32-An-direct- group) 5695 (.sym bit32-An-indirect- group) 5696 (.sym bit32- offset -11-An-relative- group) 5697 (.sym bit32- offset -19-An-relative- group) 5698 (.sym bit32- offset -27-An-relative- group) 5699 (.sym bit32- offset -11-SB-relative- group) 5700 (.sym bit32- offset -19-SB-relative- group) 5701 (.sym bit32- offset -11-FB-relative- group) 5702 (.sym bit32- offset -19-FB-relative- group) 5703 (.sym bit32- offset -19-absolute- group) 5704 (.sym bit32- offset -27-absolute- group) 5705 ) 5706 ) 5707 ) 5708 ) 5709 5710 (bit32-operand 16 Unprefixed) 5711 (bit32-operand 24 Prefixed) 5712 5713 (define-anyof-operand 5714 (name bit32-basic-Unprefixed) 5715 (comment "m32c bit operand with no additional fields") 5716 (attrs (machine 32)) 5717 (mode BI) 5718 (choices 5719 bit32-Rn-direct-Unprefixed 5720 bit32-An-direct-Unprefixed 5721 bit32-An-indirect-Unprefixed 5722 ) 5723 ) 5724 5725 (define-anyof-operand 5726 (name bit32-16-8-Unprefixed) 5727 (comment "m32c bit operand with 8 bit additional fields") 5728 (attrs (machine 32)) 5729 (mode BI) 5730 (choices 5731 bit32-16-11-An-relative-Unprefixed 5732 bit32-16-11-SB-relative-Unprefixed 5733 bit32-16-11-FB-relative-Unprefixed 5734 ) 5735 ) 5736 5737 (define-anyof-operand 5738 (name bit32-16-16-Unprefixed) 5739 (comment "m32c bit operand with 16 bit additional fields") 5740 (attrs (machine 32)) 5741 (mode BI) 5742 (choices 5743 bit32-16-19-An-relative-Unprefixed 5744 bit32-16-19-SB-relative-Unprefixed 5745 bit32-16-19-FB-relative-Unprefixed 5746 bit32-16-19-absolute-Unprefixed 5747 ) 5748 ) 5749 5750 (define-anyof-operand 5751 (name bit32-16-24-Unprefixed) 5752 (comment "m32c bit operand with 24 bit additional fields") 5753 (attrs (machine 32)) 5754 (mode BI) 5755 (choices 5756 bit32-16-27-An-relative-Unprefixed 5757 bit32-16-27-absolute-Unprefixed 5758 ) 5759 ) 5760 5761 ;------------------------------------------------------------- 5762 ; Operands for short format binary insns 5763 ;------------------------------------------------------------- 5764 5765 (define-anyof-operand 5766 (name src16-2-S) 5767 (comment "m16c source operand of size QI for short format insns") 5768 (attrs (machine 16)) 5769 (mode QI) 5770 (choices 5771 src16-2-S-8-SB-relative-QI 5772 src16-2-S-8-FB-relative-QI 5773 src16-2-S-16-absolute-QI 5774 ) 5775 ) 5776 5777 (define-anyof-operand 5778 (name src32-2-S-QI) 5779 (comment "m32c source operand of size QI for short format insns") 5780 (attrs (machine 32)) 5781 (mode QI) 5782 (choices 5783 src32-2-S-8-SB-relative-QI 5784 src32-2-S-8-FB-relative-QI 5785 src32-2-S-16-absolute-QI 5786 ) 5787 ) 5788 5789 (define-anyof-operand 5790 (name src32-2-S-HI) 5791 (comment "m32c source operand of size QI for short format insns") 5792 (attrs (machine 32)) 5793 (mode HI) 5794 (choices 5795 src32-2-S-8-SB-relative-HI 5796 src32-2-S-8-FB-relative-HI 5797 src32-2-S-16-absolute-HI 5798 ) 5799 ) 5800 5801 (define-anyof-operand 5802 (name Dst16-3-S-8) 5803 (comment "m16c destination operand of size QI for short format insns") 5804 (attrs (machine 16)) 5805 (mode QI) 5806 (choices 5807 dst16-3-S-R0l-direct-QI 5808 dst16-3-S-R0h-direct-QI 5809 dst16-3-S-8-8-SB-relative-QI 5810 dst16-3-S-8-8-FB-relative-QI 5811 dst16-3-S-8-16-absolute-QI 5812 ) 5813 ) 5814 5815 (define-anyof-operand 5816 (name Dst16-3-S-16) 5817 (comment "m16c destination operand of size QI for short format insns") 5818 (attrs (machine 16)) 5819 (mode QI) 5820 (choices 5821 dst16-3-S-R0l-direct-QI 5822 dst16-3-S-R0h-direct-QI 5823 dst16-3-S-16-8-SB-relative-QI 5824 dst16-3-S-16-8-FB-relative-QI 5825 dst16-3-S-16-16-absolute-QI 5826 ) 5827 ) 5828 5829 (define-anyof-operand 5830 (name srcdst16-r0l-r0h-S) 5831 (comment "m16c r0l/r0h operand of size QI for short format insns") 5832 (attrs (machine 16)) 5833 (mode SI) 5834 (choices 5835 srcdst16-r0l-r0h-S-derived 5836 ) 5837 ) 5838 5839 (define-anyof-operand 5840 (name dst32-2-S-basic-QI) 5841 (comment "m32c r0l operand of size QI for short format binary insns") 5842 (attrs (machine 32)) 5843 (mode QI) 5844 (choices 5845 dst32-2-S-R0l-direct-QI 5846 ) 5847 ) 5848 5849 (define-anyof-operand 5850 (name dst32-2-S-basic-HI) 5851 (comment "m32c r0 operand of size HI for short format binary insns") 5852 (attrs (machine 32)) 5853 (mode HI) 5854 (choices 5855 dst32-2-S-R0-direct-HI 5856 ) 5857 ) 5858 5859 (define-pmacro (dst32-2-S-operands xmode) 5860 (begin 5861 (define-anyof-operand 5862 (name (.sym dst32-2-S-8- xmode)) 5863 (comment "m32c operand of size " xmode " for short format binary insns") 5864 (attrs (machine 32)) 5865 (mode xmode) 5866 (choices 5867 (.sym dst32-2-S-8-SB-relative- xmode) 5868 (.sym dst32-2-S-8-FB-relative- xmode) 5869 ) 5870 ) 5871 (define-anyof-operand 5872 (name (.sym dst32-2-S-16- xmode)) 5873 (comment "m32c operand of size " xmode " for short format binary insns") 5874 (attrs (machine 32)) 5875 (mode xmode) 5876 (choices 5877 (.sym dst32-2-S-16-absolute- xmode) 5878 ) 5879 ) 5880 ; (define-anyof-operand 5881 ; (name (.sym dst32-2-S-8-indirect- xmode)) 5882 ; (comment "m32c operand of size " xmode " for short format binary insns") 5883 ; (attrs (machine 32)) 5884 ; (mode xmode) 5885 ; (choices 5886 ; (.sym dst32-2-S-8-SB-relative-indirect- xmode) 5887 ; (.sym dst32-2-S-8-FB-relative-indirect- xmode) 5888 ; ) 5889 ; ) 5890 ; (define-anyof-operand 5891 ; (name (.sym dst32-2-S-absolute-indirect- xmode)) 5892 ; (comment "m32c operand of size " xmode " for short format binary insns") 5893 ; (attrs (machine 32)) 5894 ; (mode xmode) 5895 ; (choices 5896 ; (.sym dst32-2-S-16-absolute-indirect- xmode) 5897 ; ) 5898 ; ) 5899 ) 5900 ) 5901 5902 (dst32-2-S-operands QI) 5903 (dst32-2-S-operands HI) 5904 (dst32-2-S-operands SI) 5905 5906 (define-anyof-operand 5907 (name dst32-an-S) 5908 (comment "m32c An operand for short format binary insns") 5909 (attrs (machine 32)) 5910 (mode HI) 5911 (choices 5912 dst32-1-S-A0-direct-HI 5913 dst32-1-S-A1-direct-HI 5914 ) 5915 ) 5916 5917 (define-anyof-operand 5918 (name bit16-11-S) 5919 (comment "m16c bit operand for short format insns") 5920 (attrs (machine 16)) 5921 (mode BI) 5922 (choices 5923 bit16-11-SB-relative-S 5924 ) 5925 ) 5926 5927 (define-anyof-operand 5928 (name Rn16-push-S-anyof) 5929 (comment "m16c bit operand for short format insns") 5930 (attrs (machine 16)) 5931 (mode QI) 5932 (choices 5933 Rn16-push-S-derived 5934 ) 5935 ) 5936 5937 (define-anyof-operand 5938 (name An16-push-S-anyof) 5939 (comment "m16c bit operand for short format insns") 5940 (attrs (machine 16)) 5941 (mode HI) 5942 (choices 5943 An16-push-S-derived 5944 ) 5945 ) 5946 5947 ;============================================================= 5948 ; Common macros for instruction definitions 5949 ; 5950 (define-pmacro (set-z x) 5951 (sequence () 5952 (set zbit (zflag x))) 5953 5954 ) 5955 5956 (define-pmacro (set-s x) 5957 (sequence () 5958 (set sbit (nflag x))) 5959 ) 5960 5961 (define-pmacro (set-z-and-s x) 5962 (sequence () 5963 (set-z x) 5964 (set-s x)) 5965 ) 5966 5968 ;============================================================= 5969 ; Unary insn macros 5970 ;------------------------------------------------------------- 5971 5972 (define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg) 5973 (dni (.sym op mach wstr - group) 5974 (.str op wstr opg " dst" mach "-" group "-" mode) 5975 ((machine mach) RL_1ADDR) 5976 (.str op wstr opg " ${dst" mach "-" group "-" mode "}") 5977 encoding 5978 (sem mode (.sym dst mach - group - mode)) 5979 ()) 5980 ) 5981 5982 (define-pmacro (unary-insn-defn mach group mode wstr op encoding sem) 5983 (unary-insn-defn-g mach group mode wstr op encoding sem "") 5984 ) 5985 5986 5987 (define-pmacro (unary16-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg) 5988 (unary-insn-defn-g 16 16 mode wstr op 5989 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode)) 5990 sem opg) 5991 ) 5992 (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem) 5993 (unary-16-defn-g mode wstr wbit op opc1 opc2 opc3 sem "") 5994 ) 5995 5996 (define-pmacro (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg) 5997 (begin 5998 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 5999 ; define the absolute-indirect insns first in order to prevent them from being selected 6000 ; when the mode is register-indirect 6001 ; (unary-insn-defn 32 24-absolute-indirect mode wstr op 6002 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3)) 6003 ; sem) 6004 (unary-insn-defn-g 32 16-Unprefixed mode wstr op 6005 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3)) 6006 sem opg) 6007 ; (unary-insn-defn 32 24-indirect mode wstr op 6008 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3)) 6009 ; sem) 6010 ) 6011 ) 6012 (define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem) 6013 (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem "") 6014 ) 6015 6016 (define-pmacro (unary-insn-mach-g mach op opc1 opc2 opc3 sem opg) 6017 (begin 6018 (.apply (.sym unary mach -defn-g) (QI .b 0 op opc1 opc2 opc3 sem opg)) 6019 (.apply (.sym unary mach -defn-g) (HI .w 1 op opc1 opc2 opc3 sem opg)) 6020 ) 6021 ) 6022 (define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem) 6023 (unary-insn-mach-g mach op opc1 opc2 opc3 sem "") 6024 ) 6025 6026 (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6027 (begin 6028 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "") 6029 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "") 6030 ) 6031 ) 6032 6033 (define-pmacro (unary-insn-g op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6034 (begin 6035 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "$G") 6036 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "$G") 6037 ) 6038 ) 6039 6040 ;------------------------------------------------------------- 6041 ; Sign/zero extension macros 6042 ;------------------------------------------------------------- 6043 6044 (define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem) 6045 (dni (.sym op mach wstr - group) 6046 (.str op wstr " dst" mach "-" group "-" smode) 6047 ((machine mach)) 6048 (.str op wstr " ${dst" mach "-" group "-" smode "}") 6049 encoding 6050 (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode)) 6051 ()) 6052 ) 6053 6054 (define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem) 6055 (ext-insn-defn 16 16-Ext smode dmode wstr op 6056 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode)) 6057 sem) 6058 ) 6059 6060 (define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem) 6061 (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op 6062 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode)) 6063 sem) 6064 ) 6065 6066 (define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem) 6067 (dni (.sym op 32 wstr - src-group - dst-group) 6068 (.str op 32 wstr " src32-" src-group "-QI,dst32-" dst-group "-HI") 6069 ((machine 32)) 6070 (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}") 6071 encoding 6072 (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI)) 6073 ()) 6074 ) 6075 6076 (define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem) 6077 (begin 6078 (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr 6079 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2)) 6080 sem) 6081 (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr 6082 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2)) 6083 sem) 6084 (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr 6085 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2)) 6086 sem) 6087 (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr 6088 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2)) 6089 sem) 6090 ) 6091 ) 6092 6093 ;============================================================= 6094 ; Binary Arithmetic macros 6095 ; 6096 ;------------------------------------------------------------- 6097 ;<arith>.size:S src2,r0[l] -- for m32c 6098 ;------------------------------------------------------------- 6099 6100 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem) 6101 (dni (.sym op 32 wstr .S-src2-r0- xmode) 6102 (.str op 32 wstr ":S src2,r0[l]") 6103 ((machine 32)) 6104 (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}") 6105 (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit)) 6106 (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S)) 6107 ()) 6108 ) 6109 6110 ;------------------------------------------------------------- 6111 ;<arith>.b:S src2,r0l/r0h -- for m16c 6112 ;------------------------------------------------------------- 6113 6114 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem) 6115 (begin 6116 (dni (.sym op 16 .b.S-src2) 6117 (.str op ".b:S src2,r0[lh]") 6118 ((machine 16)) 6119 (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}") 6120 (+ opc1 opc2 Dst16RnQI-S src16-2-S) 6121 (sem QI src16-2-S Dst16RnQI-S) 6122 ()) 6123 (dni (.sym op 16 .b.S-r0l-r0h) 6124 (.str op ".b:S r0l/r0h") 6125 ((machine 16)) 6126 (.str op ".b$S ${srcdst16-r0l-r0h-S}") 6127 (+ opc1 opc2 srcdst16-r0l-r0h-S) 6128 (if (eq srcdst16-r0l-r0h-S 0) 6129 (sem QI R0h R0l) 6130 (sem QI R0l R0h)) 6131 ()) 6132 ) 6133 ) 6134 6135 ;------------------------------------------------------------- 6136 ;<arith>.b:S #imm8,dst3 -- for m16c 6137 ;------------------------------------------------------------- 6138 6139 (define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem) 6140 (dni (.sym op 16 .b.S-imm8-dst3) 6141 (.str op sz ":S imm8,dst3") 6142 ((machine 16)) 6143 (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}") 6144 (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI) 6145 (sem QI Imm-8-QI Dst16-3-S-16) 6146 ()) 6147 ) 6148 6149 ;------------------------------------------------------------- 6150 ;<arith>.size:Q #imm4,sp -- for m16c 6151 ;------------------------------------------------------------- 6152 6153 (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem) 6154 (dni (.sym op 16 -wQ-sp) 6155 (.str op ".w:q #imm4,sp") 6156 ((machine 16)) 6157 (.str op ".w$Q #${Imm-12-s4},sp") 6158 (+ opc1 opc2 opc3 Imm-12-s4) 6159 (sem QI Imm-12-s4 sp) 6160 ()) 6161 ) 6162 6163 ;------------------------------------------------------------- 6164 ;<arith>.size:G #imm,sp -- for m16c 6165 ;------------------------------------------------------------- 6166 6167 (define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem) 6168 (dni (.sym op 16 wstr - G-sp) 6169 (.str op wstr " imm-sp " mode) 6170 ((machine 16)) 6171 (.str op wstr "$G #${Imm-16-" mode "},sp") 6172 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode)) 6173 (sem mode (.sym Imm-16- mode) sp) 6174 ()) 6175 ) 6176 6177 (define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem) 6178 (begin 6179 (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem) 6180 (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem) 6181 ) 6182 ) 6183 6184 ;------------------------------------------------------------- 6185 ;<arith>.size:G #imm,dst -- for m16c and m32c 6186 ;------------------------------------------------------------- 6187 6188 (define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem) 6189 (dni (.sym op mach wstr - imm-G - dstgroup) 6190 (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode) 6191 ((machine mach) RL_1ADDR) 6192 (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}") 6193 encoding 6194 (sem dmode src (.sym dst mach - dstgroup - dmode)) 6195 ()) 6196 ) 6197 6198 ; m16c variants 6199 (define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6200 (begin 6201 (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix 6202 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode)) 6203 sem) 6204 (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix 6205 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode)) 6206 sem) 6207 (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix 6208 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode)) 6209 sem) 6210 ) 6211 ) 6212 6213 ; m32c Unprefixed variants 6214 (define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6215 (begin 6216 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix 6217 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode)) 6218 sem) 6219 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix 6220 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode)) 6221 sem) 6222 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix 6223 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode)) 6224 sem) 6225 (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix 6226 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode)) 6227 sem) 6228 ) 6229 ) 6230 6231 ; m32c Prefixed variants 6232 (define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6233 (begin 6234 (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix 6235 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode)) 6236 sem) 6237 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix 6238 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode)) 6239 sem) 6240 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix 6241 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode)) 6242 sem) 6243 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix 6244 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode)) 6245 sem) 6246 ) 6247 ) 6248 6249 ; All m32c variants 6250 (define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6251 (begin 6252 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6253 ; define the absolute-indirect insns first in order to prevent them from being selected 6254 ; when the mode is register-indirect 6255 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix 6256 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode)) 6257 ; sem) 6258 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix 6259 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode)) 6260 ; sem) 6261 ; Unprefixed modes next 6262 (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem) 6263 6264 ; Remaining indirect modes 6265 ; (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix 6266 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode)) 6267 ; sem) 6268 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix 6269 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode)) 6270 ; sem) 6271 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix 6272 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode)) 6273 ; sem) 6274 ; (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix 6275 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode)) 6276 ; sem) 6277 ) 6278 ) 6279 6280 (define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem) 6281 (begin 6282 (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem)) 6283 (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem)) 6284 ) 6285 ) 6286 6287 (define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6288 (begin 6289 (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem) 6290 (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem) 6291 ) 6292 ) 6293 6294 ;------------------------------------------------------------- 6295 ;<arith>.size:Q #imm4,dst -- for m16c and m32c 6296 ;------------------------------------------------------------- 6297 6298 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem) 6299 (dni (.sym op mach wstr - imm4-Q - dstgroup) 6300 (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode) 6301 ((machine mach) RL_1ADDR) 6302 (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}") 6303 encoding 6304 (sem mode src (.sym dst mach - dstgroup - mode)) 6305 ()) 6306 ) 6307 6308 ; m16c variants 6309 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6310 (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op 6311 (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode)) 6312 sem) 6313 ) 6314 6315 (define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6316 (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op 6317 (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode)) 6318 sem) 6319 ) 6320 6321 ; m32c variants 6322 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6323 (begin 6324 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6325 ; define the absolute-indirect insns first in order to prevent them from being selected 6326 ; when the mode is register-indirect 6327 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op 6328 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4) 6329 ; sem) 6330 (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op 6331 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4) 6332 sem) 6333 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op 6334 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4) 6335 ; sem) 6336 ) 6337 ) 6338 6339 (define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem) 6340 (begin 6341 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6342 ; define the absolute-indirect insns first in order to prevent them from being selected 6343 ; when the mode is register-indirect 6344 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op 6345 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4) 6346 ; sem) 6347 (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op 6348 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4) 6349 sem) 6350 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op 6351 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4) 6352 ; sem) 6353 ) 6354 ) 6355 6356 (define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem) 6357 (begin 6358 (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem)) 6359 (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem)) 6360 ) 6361 ) 6362 6363 (define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem) 6364 (begin 6365 (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem) 6366 (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem) 6367 ) 6368 ) 6369 6370 ;------------------------------------------------------------- 6371 ;<arith>.size:G src,dst -- for m16c and m32c 6372 ;------------------------------------------------------------- 6373 6374 (define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem) 6375 (dni (.sym op mach wstr - srcgroup - dstgroup) 6376 (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode) 6377 ((machine mach) RL_2ADDR) 6378 (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}") 6379 encoding 6380 (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode)) 6381 ()) 6382 ) 6383 6384 ; m16c variants 6385 (define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem) 6386 (begin 6387 (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix 6388 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode)) 6389 sem) 6390 (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix 6391 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode)) 6392 sem) 6393 (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix 6394 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode)) 6395 sem) 6396 ) 6397 ) 6398 6399 ; m32c Prefixed variants 6400 (define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem) 6401 (begin 6402 (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix 6403 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2)) 6404 sem) 6405 (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix 6406 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2)) 6407 sem) 6408 (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix 6409 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2)) 6410 sem) 6411 (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix 6412 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2)) 6413 sem) 6414 ) 6415 ) 6416 6417 ; all m32c variants 6418 (define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem) 6419 (begin 6420 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 6421 ; define the absolute-indirect insns first in order to prevent them from being selected 6422 ; when the mode is register-indirect 6423 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix 6424 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6425 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2)) 6426 ; sem) 6427 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix 6428 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6429 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2)) 6430 ; sem) 6431 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix 6432 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6433 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2)) 6434 ; sem) 6435 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix 6436 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6437 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2)) 6438 ; sem) 6439 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix 6440 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6441 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2)) 6442 ; sem) 6443 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix 6444 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6445 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2)) 6446 ; sem) 6447 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix 6448 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6449 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2)) 6450 ; sem) 6451 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix 6452 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6453 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2)) 6454 ; sem) 6455 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix 6456 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6457 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2)) 6458 ; sem) 6459 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix 6460 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6461 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2)) 6462 ; sem) 6463 ; (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix 6464 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6465 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2)) 6466 ; sem) 6467 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix 6468 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6469 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2)) 6470 ; sem) 6471 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix 6472 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6473 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2)) 6474 ; sem) 6475 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix 6476 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6477 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2)) 6478 ; sem) 6479 (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix 6480 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2)) 6481 sem) 6482 (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix 6483 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2)) 6484 sem) 6485 (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix 6486 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2)) 6487 sem) 6488 (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix 6489 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2)) 6490 sem) 6491 ; (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix 6492 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6493 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2)) 6494 ; sem) 6495 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix 6496 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6497 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2)) 6498 ; sem) 6499 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix 6500 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6501 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2)) 6502 ; sem) 6503 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix 6504 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) 6505 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2)) 6506 ; sem) 6507 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix 6508 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6509 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2)) 6510 ; sem) 6511 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix 6512 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6513 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2)) 6514 ; sem) 6515 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix 6516 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6517 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2)) 6518 ; sem) 6519 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix 6520 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6521 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2)) 6522 ; sem) 6523 ; (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix 6524 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6525 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2)) 6526 ; sem) 6527 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix 6528 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6529 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2)) 6530 ; sem) 6531 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix 6532 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6533 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2)) 6534 ; sem) 6535 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix 6536 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit) 6537 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2)) 6538 ; sem) 6539 ) 6540 ) 6541 6542 (define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem) 6543 (begin 6544 (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem)) 6545 (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem)) 6546 ) 6547 ) 6548 6549 (define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem) 6550 (begin 6551 (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem) 6552 (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem) 6553 ) 6554 ) 6555 6556 ;------------------------------------------------------------- 6557 ;<arith>.size:S #imm,dst -- for m32c 6558 ;------------------------------------------------------------- 6559 6560 (define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem) 6561 (dni (.sym op 32 wstr - imm-S - dstgroup) 6562 (.str op wstr " 32-imm-S-" dstgroup "-" mode) 6563 ((machine 32)) 6564 (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}") 6565 encoding 6566 (sem mode src (.sym dst32- dstgroup - mode)) 6567 ()) 6568 ) 6569 6570 (define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem) 6571 (dni (.sym op 32 wstr - imm-Z - dstgroup) 6572 (.str op wstr " 32-imm-Z-" dstgroup "-" mode) 6573 ((machine 32)) 6574 (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}") 6575 encoding 6576 (sem mode (const 0) (.sym dst32- dstgroup - mode)) 6577 ()) 6578 ) 6579 6580 (define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem) 6581 (begin 6582 ; (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op 6583 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode)) 6584 ; sem) 6585 (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op 6586 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode)) 6587 sem) 6588 (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op 6589 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode)) 6590 sem) 6591 (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op 6592 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode)) 6593 sem) 6594 ; (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op 6595 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode)) 6596 ; sem) 6597 ) 6598 ) 6599 6600 (define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem) 6601 (begin 6602 ; (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op 6603 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode)) 6604 ; sem) 6605 (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op 6606 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit)) 6607 sem) 6608 (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op 6609 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit)) 6610 sem) 6611 (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op 6612 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit)) 6613 sem) 6614 ; (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op 6615 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode)) 6616 ; sem) 6617 ) 6618 ) 6619 6620 ;------------------------------------------------------------- 6621 ;<arith>.L:S #imm1,An -- for m32c 6622 ;------------------------------------------------------------- 6623 6624 (define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem) 6625 (begin 6626 (dni (.sym op 32.l-s-imm1-S-an) 6627 (.str op ".l 32-imm1-S-an") 6628 ((machine 32)) 6629 (.str op ".l$S #${Imm1-S},${dst32-an-S}") 6630 (+ opc1 Imm1-S opc2 dst32-an-S) 6631 (sem SI Imm1-S dst32-an-S) 6632 ()) 6633 ) 6634 ) 6635 6636 ;------------------------------------------------------------- 6637 ;<arith>.L:Q #imm3,sp -- for m32c 6638 ;------------------------------------------------------------- 6639 6640 (define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem) 6641 (begin 6642 (dni (.sym op 32.l-imm3-Q) 6643 (.str op ".l 32-imm3-Q") 6644 ((machine 32)) 6645 (.str op ".l$Q #${Imm3-S},sp") 6646 (+ opc1 Imm3-S opc2) 6647 (sem SI Imm3-S sp) 6648 ()) 6649 ) 6650 ) 6651 6652 ;------------------------------------------------------------- 6653 ;<arith>.L:S #imm8,sp -- for m32c 6654 ;------------------------------------------------------------- 6655 6656 (define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem) 6657 (begin 6658 (dni (.sym op 32.l-imm8-S) 6659 (.str op ".l 32-imm8-S") 6660 ((machine 32)) 6661 (.str op ".l$S #${Imm-16-QI},sp") 6662 (+ opc1 opc2 opc3 opc4 Imm-16-QI) 6663 (sem SI Imm-16-QI sp) 6664 ()) 6665 ) 6666 ) 6667 6668 ;------------------------------------------------------------- 6669 ;<arith>.L:G #imm16,sp -- for m32c 6670 ;------------------------------------------------------------- 6671 6672 (define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem) 6673 (begin 6674 (dni (.sym op 32.l-imm16-G) 6675 (.str op ".l 32-imm16-G") 6676 ((machine 32)) 6677 (.str op ".l$G #${Imm-16-HI},sp") 6678 (+ opc1 opc2 opc3 opc4 Imm-16-HI) 6679 (sem SI Imm-16-HI sp) 6680 ()) 6681 ) 6682 ) 6683 6684 ;------------------------------------------------------------- 6685 ;<arith>jnz.size #imm4,dst,label -- for m16c and m32c 6686 ;------------------------------------------------------------- 6687 6688 (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem) 6689 (dni (.sym op mach wstr - imm4 - dstgroup) 6690 (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode) 6691 (RL_JUMP RELAXABLE (machine mach)) 6692 (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}") 6693 encoding 6694 (sem mode src (.sym dst mach - dstgroup - mode) label) 6695 ()) 6696 ) 6697 6698 ; m16c variants 6699 (define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem) 6700 (begin 6701 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) basic Lab-16-8 mode wstr op 6702 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8) 6703 sem) 6704 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op 6705 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-32-8) 6706 sem) 6707 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op 6708 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-24-8) 6709 sem) 6710 ) 6711 ) 6712 6713 ; m32c variants 6714 (define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem) 6715 (begin 6716 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) basic-Unprefixed Lab-16-8 mode wstr op 6717 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-16-8) 6718 sem) 6719 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-24-Unprefixed Lab-40-8 mode wstr op 6720 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-40-8) 6721 sem) 6722 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-16-Unprefixed Lab-32-8 mode wstr op 6723 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-32-8) 6724 sem) 6725 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-8-Unprefixed Lab-24-8 mode wstr op 6726 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-24-8) 6727 sem) 6728 ) 6729 ) 6730 6731 (define-pmacro (arith-jnz-imm4-dst-mach mach op i4n opc1 opc2 sem) 6732 (begin 6733 (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op i4n opc1 opc2 sem)) 6734 (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op i4n opc1 opc2 sem)) 6735 ) 6736 ) 6737 6738 (define-pmacro (arith-jnz-imm4-dst op i4n opc16-1 opc16-2 opc32-1 opc32-2 sem) 6739 (begin 6740 (arith-jnz-imm4-dst-mach 16 op i4n opc16-1 opc16-2 sem) 6741 (arith-jnz-imm4-dst-mach 32 op i4n opc32-1 opc32-2 sem) 6742 ) 6743 ) 6744 6745 ;------------------------------------------------------------- 6746 ;mov.size dsp8[sp],dst -- for m16c and m32c 6747 ;------------------------------------------------------------- 6748 (define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem) 6749 (dni (.sym op mach wstr -dspsp-dst- dstgroup) 6750 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) 6751 ((machine mach)) 6752 (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}") 6753 encoding 6754 (sem mach mode dsp (.sym dst mach - dstgroup - mode)) 6755 ()) 6756 ) 6757 (define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem) 6758 (dni (.sym op mach wstr -dst-dspsp- dstgroup) 6759 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode) 6760 ((machine mach)) 6761 (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]") 6762 encoding 6763 (sem mach mode (.sym dst mach - dstgroup - mode) dsp) 6764 ()) 6765 ) 6766 6767 ; m16c variants 6768 (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem) 6769 (begin 6770 (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op 6771 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8) 6772 sem) 6773 (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op 6774 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8) 6775 sem) 6776 (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op 6777 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8) 6778 sem) 6779 ) 6780 ) 6781 6782 (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem) 6783 (begin 6784 (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op 6785 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8) 6786 sem) 6787 (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op 6788 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8) 6789 sem) 6790 (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op 6791 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8) 6792 sem) 6793 ) 6794 ) 6795 6796 ; m32c variants 6797 (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem) 6798 (begin 6799 (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op 6800 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8) 6801 sem) 6802 (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op 6803 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8) 6804 sem) 6805 (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op 6806 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8) 6807 sem) 6808 (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op 6809 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8) 6810 sem) 6811 ) 6812 ) 6813 (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem) 6814 (begin 6815 (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op 6816 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8) 6817 sem) 6818 (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op 6819 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8) 6820 sem) 6821 (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op 6822 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8) 6823 sem) 6824 (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op 6825 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8) 6826 sem) 6827 ) 6828 ) 6829 6830 (define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem) 6831 (begin 6832 (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem)) 6833 (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem)) 6834 ) 6835 ) 6836 6837 (define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem) 6838 (begin 6839 (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem)) 6840 (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem)) 6841 ) 6842 ) 6843 6844 (define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6845 (begin 6846 (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem) 6847 (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem) 6848 ) 6849 ) 6850 (define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 6851 (begin 6852 (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem) 6853 (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem) 6854 ) 6855 ) 6856 6857 ;------------------------------------------------------------- 6858 ; lde dsp24,dst -- for m16c 6859 ;------------------------------------------------------------- 6860 6861 (define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp) 6862 (begin 6863 6864 (dni (.sym lde wstr - dstgroup -u20) 6865 (.str "lde" wstr "-" dstgroup "-u20") 6866 ((machine 16)) 6867 (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}") 6868 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8) 6869 (.sym dst16- dstgroup - mode) srcdisp) 6870 (nop) 6871 ()) 6872 6873 (dni (.sym lde wstr - dstgroup -u20a0) 6874 (.str "lde" wstr "-" dstgroup "-u20a0") 6875 ((machine 16)) 6876 (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}") 6877 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9) 6878 (.sym dst16- dstgroup - mode) srcdisp) 6879 (nop) 6880 ()) 6881 6882 (dni (.sym lde wstr - dstgroup -a1a0) 6883 (.str "lde" wstr "-" dstgroup "-a1a0") 6884 ((machine 16)) 6885 (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}") 6886 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa) 6887 (.sym dst16- dstgroup - mode)) 6888 (nop) 6889 ()) 6890 ) 6891 ) 6892 6893 (define-pmacro (lde-dst mode wstr wbit) 6894 (begin 6895 ; like: QI .b 0 6896 (lde-dst-dsp mode wstr wbit basic Dsp-16-u20) 6897 (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20) 6898 (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20) 6899 ) 6900 ) 6901 6902 ;------------------------------------------------------------- 6903 ; ste dst,dsp24 -- for m16c 6904 ;------------------------------------------------------------- 6905 6906 (define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp) 6907 (begin 6908 6909 (dni (.sym ste wstr - dstgroup -u20) 6910 (.str "ste" wstr "-" dstgroup "-u20") 6911 ((machine 16)) 6912 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}") 6913 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0) 6914 (.sym dst16- dstgroup - mode) srcdisp) 6915 (nop) 6916 ()) 6917 6918 (dni (.sym ste wstr - dstgroup -u20a0) 6919 (.str "ste" wstr "-" dstgroup "-u20a0") 6920 ((machine 16)) 6921 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]") 6922 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1) 6923 (.sym dst16- dstgroup - mode) srcdisp) 6924 (nop) 6925 ()) 6926 6927 (dni (.sym ste wstr - dstgroup -a1a0) 6928 (.str "ste" wstr "-" dstgroup "-a1a0") 6929 ((machine 16)) 6930 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]") 6931 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2) 6932 (.sym dst16- dstgroup - mode)) 6933 (nop) 6934 ()) 6935 ) 6936 ) 6937 6938 (define-pmacro (ste-dst mode wstr wbit) 6939 (begin 6940 ; like: QI .b 0 6941 (ste-dst-dsp mode wstr wbit basic Dsp-16-u20) 6942 (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20) 6943 (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20) 6944 ) 6945 ) 6946 6947 ;============================================================= 6948 ; Division 6949 ;------------------------------------------------------------- 6950 6951 (define-pmacro (div-sem divop modop opmode reg src quot rem max min) 6952 (sequence () 6953 (if (eq src 0) 6954 (set obit (const BI 1)) 6955 (sequence ((opmode quot-result) (opmode rem-result)) 6956 (set quot-result (divop opmode (ext opmode reg) src)) 6957 (set rem-result (modop opmode (ext opmode reg) src)) 6958 (set obit (orif (gt opmode quot-result max) 6959 (lt opmode quot-result min))) 6960 (set quot quot-result) 6961 (set rem rem-result)))) 6962 ) 6963 6964 ;<divop>.size #imm -- for m16c and m32c 6965 (define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem) 6966 (dni (.sym op mach wstr - src) 6967 (.str op mach wstr "-" src) 6968 ((machine mach)) 6969 (.str op wstr " #${" src "}") 6970 encoding 6971 (sem divop modop opmode reg src quot rem max min) 6972 ()) 6973 ) 6974 (define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem) 6975 (div-imm-defn 16 wstr op (.sym Imm-16 - smode) 6976 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode)) 6977 divop modop opmode reg quot rem max min 6978 sem) 6979 ) 6980 (define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem) 6981 (div-imm-defn 32 wstr op (.sym Imm-16 - smode) 6982 (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode)) 6983 divop modop opmode reg quot rem max min 6984 sem) 6985 ) 6986 (define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem) 6987 (begin 6988 (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem)) 6989 (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 opc4 sem)) 6990 ) 6991 ) 6992 (define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem) 6993 (begin 6994 (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem) 6995 (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem) 6996 ) 6997 ) 6998 6999 ;<divop>.size src -- for m16c and m32c 7000 (define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem) 7001 (dni (.sym op mach wstr - src) 7002 (.str op mach wstr "-" src) 7003 ((machine mach)) 7004 (.str op wstr " ${" src "}") 7005 encoding 7006 (sem divop modop opmode reg src quot rem max min) 7007 ()) 7008 ) 7009 (define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem) 7010 (div-src-defn 16 wstr op (.sym dst16-16 - smode) 7011 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode)) 7012 divop modop opmode reg quot rem max min 7013 sem) 7014 ) 7015 (define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem) 7016 (begin 7017 ; Multi insns are tried for assembly in the reverse order in which they appear here, so 7018 ; define the absolute-indirect insns first in order to prevent them from being selected 7019 ; when the mode is register-indirect 7020 ; (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode) 7021 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode)) 7022 ; divop modop opmode reg quot rem max min 7023 ; sem) 7024 (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode) 7025 (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode)) 7026 divop modop opmode reg quot rem max min 7027 sem) 7028 ; (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode) 7029 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode)) 7030 ; divop modop opmode reg quot rem max min 7031 ; sem) 7032 ) 7033 ) 7034 (define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem) 7035 (begin 7036 (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 sem)) 7037 (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 sem)) 7038 ) 7039 ) 7040 (define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7041 (begin 7042 (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem) 7043 (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem) 7044 ) 7045 ) 7046 7047 ;============================================================= 7048 ; Bit manipulation 7049 ; 7050 (define-pmacro (bit-insn-defn mach op suffix opnd encoding sem) 7051 (dni (.sym op mach - suffix - opnd) 7052 (.str op mach ":" suffix " " opnd) 7053 ((machine mach)) 7054 (.str op "$" suffix " ${" opnd "}") 7055 encoding 7056 (sem opnd) 7057 ()) 7058 ) 7059 7060 (define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem) 7061 (bit-insn-defn 16 op X bit16-16 7062 (+ opc1 opc2 opc3 bit16-16) 7063 sem) 7064 ) 7065 7066 (define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem) 7067 (begin 7068 (bit-insn-defn 32 op X bit32-24-Prefixed 7069 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3)) 7070 sem) 7071 ) 7072 ) 7073 7074 (define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7075 (begin 7076 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem) 7077 (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem) 7078 ) 7079 ) 7080 7081 (define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem) 7082 (begin 7083 (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem) 7084 (bit-insn-defn 16 op G bit16-16-16 (+ opc1 opc2 opc3 bit16-16-16) sem) 7085 (bit-insn-defn 16 op S bit16-11-S (+ opc4 opc5 opc6 bit16-11-S) sem) 7086 (bit-insn-defn 16 op G bit16-16-8 (+ opc1 opc2 opc3 bit16-16-8) sem) 7087 ) 7088 ) 7089 7090 (define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem) 7091 (begin 7092 (bit-insn-defn 32 op X bit32-16-Unprefixed 7093 (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3)) 7094 sem) 7095 ) 7096 ) 7097 7098 (define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7099 (begin 7100 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem) 7101 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem) 7102 ) 7103 ) 7104 7105 (define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem) 7106 (begin 7107 (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem) 7108 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem) 7109 ) 7110 ) 7111 7112 ;============================================================= 7113 ; Bit condition 7114 ; 7115 (define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem) 7116 (dni (.sym op mach - bit-opnd - cond-opnd) 7117 (.str op mach " " bit-opnd " " cond-opnd) 7118 ((machine mach)) 7119 (.str op "${" cond-opnd "} ${" bit-opnd "}") 7120 encoding 7121 (sem mach bit-opnd cond-opnd) 7122 ()) 7123 ) 7124 7125 (define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem) 7126 (begin 7127 (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem) 7128 (bitcond-insn-defn 16 op bit16-16-16 cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem) 7129 (bitcond-insn-defn 16 op bit16-16-8 cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem) 7130 ) 7131 ) 7132 7133 (define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem) 7134 (begin 7135 (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40 7136 (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40) 7137 sem) 7138 (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32 7139 (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32) 7140 sem) 7141 (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24 7142 (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24) 7143 sem) 7144 (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16 7145 (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16) 7146 sem) 7147 ) 7148 ) 7149 7150 (define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem) 7151 (begin 7152 (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem) 7153 (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem) 7154 ) 7155 ) 7156 7157 ;============================================================= 7158 ;<insn>.size #imm1,#imm2,dst -- for m32c 7159 ; 7160 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem) 7161 (dni (.sym op 32 wstr - src1 - src2 - dstgroup) 7162 (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode) 7163 ((machine 32)) 7164 (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}") 7165 encoding 7166 (sem xmode src1 src2 (.sym dst32- dstgroup - xmode)) 7167 ()) 7168 ) 7169 7170 ; m32c Prefixed variants 7171 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem) 7172 (begin 7173 (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op 7174 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7175 (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode)) 7176 sem) 7177 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op 7178 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7179 (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode)) 7180 sem) 7181 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op 7182 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7183 (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode)) 7184 sem) 7185 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op 7186 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) 7187 (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode)) 7188 sem) 7189 ) 7190 ) 7191 7192 ; m32c Unprefixed variants 7193 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem) 7194 (begin 7195 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op 7196 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7197 (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode)) 7198 sem) 7199 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op 7200 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7201 (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode)) 7202 sem) 7203 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op 7204 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7205 (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode)) 7206 sem) 7207 (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op 7208 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) 7209 (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode)) 7210 sem) 7211 ) 7212 ) 7213 7214 (define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem) 7215 (begin 7216 (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem) 7217 (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem) 7218 ) 7219 ) 7220 (define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem) 7221 (begin 7222 (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem) 7223 (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem) 7224 ) 7225 ) 7226 7228 ;============================================================= 7229 ; Insn definitions 7230 ;------------------------------------------------------------- 7231 ; abs - absolute 7232 ;------------------------------------------------------------- 7233 7234 (define-pmacro (abs-sem mode dst) 7235 (sequence ((mode result)) 7236 (set result (abs mode dst)) 7237 (set obit (eq result dst)) 7238 (set-z-and-s result) 7239 (set dst result)) 7240 ) 7241 (unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem) 7242 7243 ;------------------------------------------------------------- 7244 ; adcf - addition carry flag 7245 ;------------------------------------------------------------- 7246 7247 (define-pmacro (adcf-sem mode dst) 7248 (sequence ((mode result)) 7249 (set result (addc mode dst 0 cbit)) 7250 (set obit (add-oflag mode dst 0 cbit)) 7251 (set cbit (add-cflag mode dst 0 cbit)) 7252 (set-z-and-s result) 7253 (set dst result)) 7254 ) 7255 (unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem) 7256 7257 ;------------------------------------------------------------- 7258 ; add - binary addition 7259 ;------------------------------------------------------------- 7260 7261 (define-pmacro (add-sem mode src1 dst) 7262 (sequence ((mode result)) 7263 (set result (add mode src1 dst)) 7264 (set obit (add-oflag mode src1 dst 0)) 7265 (set cbit (add-cflag mode src1 dst 0)) 7266 (set-z-and-s result) 7267 (set dst result)) 7268 ) 7269 7270 ; add.L:G #imm32,dst (m32 #2) 7271 (binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem) 7272 ; add.size:G #imm,dst (m16 #1 m32 #1) 7273 (binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem) 7274 ; add.size:Q #imm4,dst (m16 #2 m32 #3) 7275 (binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem) 7276 (binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem) 7277 ; add.b:S #imm8,dst3 (m16 #3) 7278 (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem) 7279 ; add.BW:Q #imm4,sp (m16 #7) 7280 (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem) 7281 (dnmi add16-bQ-sp "add16-bQ-sp" () 7282 "add.b:q #${Imm-12-s4},sp" 7283 (emit add16-wQ-sp Imm-12-s4)) 7284 ; add.BW:G #imm,sp (m16 #6) 7285 (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem) 7286 ; add.BW:G src,dst (m16 #4 m32 #6) 7287 (binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem) 7288 ; add.B.S src2,r0l/r0h (m16 #5) 7289 (binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem) 7290 ; add.L:G src,dst (m32 #7) 7291 (binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem) 7292 ; add.L:S #imm{1,2},A0/A1 (m32 #5) 7293 (binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem) 7294 ; add.L:Q #imm3,sp (m32 #9) 7295 (binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem) 7296 ; add.L:S #imm8,sp (m32 #10) 7297 (binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem) 7298 ; add.L:G #imm16,sp (m32 #8) 7299 (binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem) 7300 ; add.BW:S #imm,dst2 (m32 #4) 7301 (binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem) 7302 (binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem) 7303 7304 ;------------------------------------------------------------- 7305 ; adc - binary add with carry 7306 ;------------------------------------------------------------- 7307 7308 (define-pmacro (addc-sem mode src dst) 7309 (sequence ((mode result)) 7310 (set result (addc mode src dst cbit)) 7311 (set obit (add-oflag mode src dst cbit)) 7312 (set cbit (add-cflag mode src dst cbit)) 7313 (set-z-and-s result) 7314 (set dst result)) 7315 ) 7316 7317 ; adc.size:G #imm,dst 7318 (binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem) 7319 (binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem) 7320 (binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem) 7321 (binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem) 7322 7323 ; adc.BW:G src,dst 7324 (binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem) 7325 (binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem) 7326 (binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem) 7327 (binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem) 7328 7329 ;------------------------------------------------------------- 7330 ; dadc - decimal add with carry 7331 ; dadd - decimal addition 7332 ;------------------------------------------------------------- 7333 7334 (define-pmacro (dadc-sem mode src dst) 7335 (sequence ((mode result)) 7336 (set result (subc mode dst src (not cbit))) 7337 (set cbit (sub-cflag mode dst src (not cbit))) 7338 (set-z-and-s result) 7339 (set dst result)) 7340 ) 7341 7342 (define-pmacro (decimal-subtraction16-insn op opc1 opc2) 7343 (begin 7344 ; op.b #imm8,r0l 7345 (dni (.sym op 16.b-imm8) 7346 (.str op ".b #imm8") 7347 ((machine 16)) 7348 (.str op ".b #${Imm-16-QI},r0l") 7349 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI) 7350 ((.sym op -sem) QI Imm-16-QI R0l) 7351 ()) 7352 ; op.w #imm16,r0 7353 (dni (.sym op 16.w-imm16) 7354 (.str op ".b #imm16") 7355 ((machine 16)) 7356 (.str op ".w #${Imm-16-HI},r0") 7357 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI) 7358 ((.sym op -sem) HI Imm-16-HI R0) 7359 ()) 7360 ; op.b #r0h,r0l 7361 (dni (.sym op 16.b-r0h-r0l) 7362 (.str op ".b r0h,r0l") 7363 ((machine 16)) 7364 (.str op ".b r0h,r0l") 7365 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2)) 7366 ((.sym op -sem) QI R0h R0l) 7367 ()) 7368 ; op.w #r1,r0 7369 (dni (.sym op 16.w-r1-r0) 7370 (.str op ".b r1,r0") 7371 ((machine 16)) 7372 (.str op ".w r1,r0") 7373 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2)) 7374 ((.sym op -sem) HI R1 R0) 7375 ()) 7376 ) 7377 ) 7378 7379 ; dadc for m16c 7380 (decimal-subtraction16-insn dadc #xE #x6 ) 7381 7382 ; dadc.size #imm,dst 7383 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem) 7384 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem) 7385 ; dadc.BW src,dst 7386 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem) 7387 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem) 7388 7389 (define-pmacro (dadd-sem mode src dst) 7390 (sequence ((mode result)) 7391 (set result (subc mode dst src 0)) 7392 (set cbit (sub-cflag mode dst src 0)) 7393 (set-z-and-s result) 7394 (set dst result)) 7395 ) 7396 7397 ; dadd for m16c 7398 (decimal-subtraction16-insn dadd #xC #x4) 7399 7400 ; dadd.size #imm,dst 7401 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem) 7402 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem) 7403 ; dadd.BW src,dst 7404 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem) 7405 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem) 7406 7407 ;-------------------------------------------------------------; 7408 ; addx - Add extend sign with no carry 7409 ;-------------------------------------------------------------; 7410 7411 (define-pmacro (addx-sem mode src dst) 7412 (sequence ((SI source) (SI result)) 7413 (set source (zext SI (trunc QI src))) 7414 (set result (add SI source dst)) 7415 (set obit (add-oflag SI source dst 0)) 7416 (set cbit (add-cflag SI source dst 0)) 7417 (set-z-and-s result) 7418 (set dst result)) 7419 ) 7420 7421 ; addx #imm,dst 7422 (binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem) 7423 ; addx src,dst 7424 (binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem) 7425 7426 ;------------------------------------------------------------- 7427 ; adjnz - Add/Sub and branch if not zero 7428 ;------------------------------------------------------------- 7429 7430 (define-pmacro (arith-jnz-sem mode src dst label) 7431 (sequence ((mode result)) 7432 (set result (add mode src dst)) 7433 (set dst result) 7434 (if (ne result 0) 7435 (set pc label))) 7436 ) 7437 7438 ; adjnz.size #imm4,dst,label 7439 (arith-jnz-imm4-dst adjnz s4 (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem) 7440 7441 ;------------------------------------------------------------- 7442 ; and - binary and 7443 ;------------------------------------------------------------- 7444 7445 (define-pmacro (and-sem mode src1 dst) 7446 (sequence ((mode result)) 7447 (set result (and mode src1 dst)) 7448 (set-z-and-s result) 7449 (set dst result)) 7450 ) 7451 7452 ; and.size:G #imm,dst (m16 #1 m32 #1) 7453 (binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem) 7454 ; and.b:S #imm8,dst3 (m16 #2) 7455 (binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem) 7456 ; and.BW:G src,dst (m16 #3 m32 #3) 7457 (binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem) 7458 ; and.B.S src2,r0l/r0h (m16 #4) 7459 (binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem) 7460 ; and.BW:S #imm,dst2 (m32 #2) 7461 (binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem) 7462 (binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem) 7463 7464 ;------------------------------------------------------------- 7465 ; band - bit and 7466 ;------------------------------------------------------------- 7467 7468 (define-pmacro (band-sem src) 7469 (set cbit (and src cbit)) 7470 ) 7471 (bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem) 7472 7473 ;------------------------------------------------------------- 7474 ; bclr - bit clear 7475 ;------------------------------------------------------------- 7476 7477 (define-pmacro (bclr-sem dst) 7478 (set dst 0) 7479 ) 7480 (bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem) 7481 7482 ;------------------------------------------------------------- 7483 ; bitindex - bit index 7484 ;------------------------------------------------------------- 7485 7486 (define-pmacro (bitindex-sem mode dst) 7487 (set BitIndex dst) 7488 ) 7489 (unary-insn-defn 32 16-Unprefixed QI .b bitindex 7490 (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE)) 7491 bitindex-sem) 7492 (unary-insn-defn 32 16-Unprefixed HI .w bitindex 7493 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE)) 7494 bitindex-sem) 7495 7496 ;------------------------------------------------------------- 7497 ; bmCnd - bit move condition 7498 ;------------------------------------------------------------- 7499 7500 (define-pmacro (test-condition16 cond) 7501 (case UQI cond 7502 ((#x00) (trunc BI cbit)) 7503 ((#x01) (not (or cbit zbit))) 7504 ((#x02) (trunc BI zbit)) 7505 ((#x03) (trunc BI sbit)) 7506 ((#x04) (or zbit (xor sbit obit))) 7507 ((#x05) (trunc BI obit)) 7508 ((#x06) (xor sbit obit)) 7509 ((#xf8) (not cbit)) 7510 ((#xf9) (or cbit zbit)) 7511 ((#xfa) (not zbit)) 7512 ((#xfb) (not sbit)) 7513 ((#xfc) (not (or zbit (xor sbit obit)))) 7514 ((#xfd) (not obit)) 7515 ((#xfe) (not (xor sbit obit))) 7516 (else (const BI 0)) 7517 ) 7518 ) 7519 7520 (define-pmacro (test-condition32 cond) 7521 (case UQI cond 7522 ((#x00) (not cbit)) 7523 ((#x01) (or cbit zbit)) 7524 ((#x02) (not zbit)) 7525 ((#x03) (not sbit)) 7526 ((#x04) (not obit)) 7527 ((#x05) (not (or zbit (xor sbit obit)))) 7528 ((#x06) (not (xor sbit obit))) 7529 ((#x08) (trunc BI cbit)) 7530 ((#x09) (not (or cbit zbit))) 7531 ((#x0a) (trunc BI zbit)) 7532 ((#x0b) (trunc BI sbit)) 7533 ((#x0c) (trunc BI obit)) 7534 ((#x0d) (or zbit (xor sbit obit))) 7535 ((#x0e) (xor sbit obit)) 7536 (else (const BI 0)) 7537 ) 7538 ) 7539 7540 (define-pmacro (bitcond-sem mach op cond) 7541 (if ((.sym test-condition mach) cond) 7542 (set op 1) 7543 (set op 0)) 7544 ) 7545 (bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem) 7546 7547 (dni bm16-c 7548 "bm16 C" 7549 ((machine 16)) 7550 "bm$cond16c c" 7551 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c) 7552 (bitcond-sem 16 cbit cond16c) 7553 ()) 7554 7555 (dni bm32-c 7556 "bm32 C" 7557 ((machine 32)) 7558 "bm$cond32 c" 7559 (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32) 7560 (bitcond-sem 32 cbit cond32) 7561 ()) 7562 7563 ;------------------------------------------------------------- 7564 ; bnand 7565 ;------------------------------------------------------------- 7566 7567 (define-pmacro (bnand-sem src) 7568 (set cbit (and (inv src) cbit)) 7569 ) 7570 (bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem) 7571 7572 ;------------------------------------------------------------- 7573 ; bnor 7574 ;------------------------------------------------------------- 7575 7576 (define-pmacro (bnor-sem src) 7577 (set cbit (or (inv src) cbit)) 7578 ) 7579 (bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem) 7580 7581 ;------------------------------------------------------------- 7582 ; bnot 7583 ;------------------------------------------------------------- 7584 7585 (define-pmacro (bnot-sem dst) 7586 (set dst (inv dst)) 7587 ) 7588 (bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem) 7589 7590 ;------------------------------------------------------------- 7591 ; bntst 7592 ;------------------------------------------------------------- 7593 7594 (define-pmacro (bntst-sem src) 7595 (set cbit (inv src)) 7596 (set zbit (inv src)) 7597 ) 7598 (bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem) 7599 7600 ;------------------------------------------------------------- 7601 ; bnxor 7602 ;------------------------------------------------------------- 7603 7604 (define-pmacro (bnxor-sem src) 7605 (set cbit (xor (inv src) cbit)) 7606 ) 7607 (bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem) 7608 7609 ;------------------------------------------------------------- 7610 ; bor 7611 ;------------------------------------------------------------- 7612 7613 (define-pmacro (bor-sem src) 7614 (set cbit (or src cbit)) 7615 ) 7616 (bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem) 7617 7618 ;------------------------------------------------------------- 7619 ; brk 7620 ;------------------------------------------------------------- 7621 7622 (dni brk16 7623 "brk" 7624 ((machine 16)) 7625 "brk" 7626 (+ (f-0-4 #x0) (f-4-4 #x0)) 7627 (nop) 7628 ()) 7629 7630 (dni brk32 7631 "brk" 7632 ((machine 32)) 7633 "brk" 7634 (+ (f-0-4 #x0) (f-4-4 #x0)) 7635 (nop) 7636 ()) 7637 7638 ;------------------------------------------------------------- 7639 ; brk2 7640 ;------------------------------------------------------------- 7641 7642 (dni brk232 7643 "brk2" 7644 ((machine 32)) 7645 "brk2" 7646 (+ (f-0-4 #x0) (f-4-4 #x8)) 7647 (nop) 7648 ()) 7649 7650 ;------------------------------------------------------------- 7651 ; bset 7652 ;------------------------------------------------------------- 7653 7654 (define-pmacro (bset-sem dst) 7655 (set dst 1) 7656 ) 7657 (bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem) 7658 7659 ;------------------------------------------------------------- 7660 ; btst 7661 ;------------------------------------------------------------- 7662 7663 (define-pmacro (btst-sem dst) 7664 (set zbit (inv dst)) 7665 (set cbit dst) 7666 ) 7667 (bitdst16-defn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) btst-sem) 7668 7669 (bit-insn-defn 32 btst G bit32-16-Unprefixed 7670 (+ (f-0-4 #xD) bit32-16-Unprefixed (f-7-1 #x0) (f-10-3 #x0)) 7671 btst-sem) 7672 7673 (dni btst.s "btst:s" ((machine 32)) 7674 "btst:s ${Bit3-S},${Dsp-8-u16}" 7675 (+ (f-0-2 #x0) (f-4-3 #x5) Bit3-S Dsp-8-u16) 7676 () ()) 7677 7678 ;------------------------------------------------------------- 7679 ; btstc 7680 ;------------------------------------------------------------- 7681 7682 (define-pmacro (btstc-sem dst) 7683 (set zbit (inv dst)) 7684 (set cbit dst) 7685 (set dst (const 0)) 7686 ) 7687 (bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem) 7688 7689 ;------------------------------------------------------------- 7690 ; btsts 7691 ;------------------------------------------------------------- 7692 7693 (define-pmacro (btsts-sem dst) 7694 (set zbit (inv dst)) 7695 (set cbit dst) 7696 (set dst (const 0)) 7697 ) 7698 (bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem) 7699 7700 ;------------------------------------------------------------- 7701 ; bxor 7702 ;------------------------------------------------------------- 7703 7704 (define-pmacro (bxor-sem src) 7705 (set cbit (xor src cbit)) 7706 ) 7707 (bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem) 7708 7709 ;------------------------------------------------------------- 7710 ; clip 7711 ;------------------------------------------------------------- 7712 7713 (define-pmacro (clip-sem mode imm1 imm2 dest) 7714 (sequence () 7715 (if (gt mode imm1 dest) 7716 (set dest imm1)) 7717 (if (lt mode imm2 dest) 7718 (set dest imm2))) 7719 ) 7720 7721 (insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem) 7722 7723 ;------------------------------------------------------------- 7724 ; cmp - binary compare 7725 ;------------------------------------------------------------- 7726 7727 (define-pmacro (cmp-sem mode src1 dst) 7728 (sequence ((mode result)) 7729 (set result (sub mode dst src1)) 7730 (set obit (sub-oflag mode dst src1 0)) 7731 (set cbit (not (sub-cflag mode dst src1 0))) 7732 (set-z-and-s result)) 7733 ) 7734 7735 ; cmp.L:G #imm32,dst (m32 #2) 7736 (binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem) 7737 ; cmp.size:G #imm,dst (m16 #1 m32 #1) 7738 (binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem) 7739 ; cmp.size:Q #imm4,dst (m16 #2 m32 #3) 7740 (binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem) 7741 ; cmp.b:S #imm8,dst3 (m16 #3) 7742 (binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem) 7743 ; cmp.BW:G src,dst (m16 #4 m32 #5) 7744 (binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem) 7745 ; cmp.B.S src2,r0l/r0h (m16 #5) 7746 (binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem) 7747 ; cmp.L:G src,dst (m32 #6) 7748 (binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem) 7749 ; cmp.BW:S #imm,dst2 (m32 #4) 7750 (binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem) 7751 (binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem) 7752 ; cmp.BW:s src2,r0[l] (m32 #7) 7753 (binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem) 7754 (binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem) 7755 7756 ;------------------------------------------------------------- 7757 ; cmpx - binary compare extend sign 7758 ;------------------------------------------------------------- 7759 7760 (define-pmacro (cmpx-sem mode src1 dst) 7761 (sequence ((mode result)) 7762 (set result (sub mode dst (ext mode src1))) 7763 (set obit (sub-oflag mode dst (ext mode src1) 0)) 7764 (set cbit (sub-cflag mode dst (ext mode src1) 0)) 7765 (set-z-and-s result)) 7766 ) 7767 7768 (binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem) 7769 7770 ;------------------------------------------------------------- 7771 ; dec - decrement 7772 ;------------------------------------------------------------- 7773 7774 (define-pmacro (dec-sem mode dest) 7775 (sequence ((mode result)) 7776 (set result (sub mode dest 1)) 7777 (set-z-and-s result) 7778 (set dest result)) 7779 ) 7780 7781 (dni dec16.b 7782 "dec.b Dst16-3-S-8" 7783 ((machine 16)) 7784 "dec.b ${Dst16-3-S-8}" 7785 (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8) 7786 (dec-sem QI Dst16-3-S-8) 7787 ()) 7788 7789 (dni dec16.w 7790 "dec.w Dst16An-S" 7791 ((machine 16)) 7792 "dec.w ${Dst16An-S}" 7793 (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S) 7794 (dec-sem HI Dst16An-S) 7795 ()) 7796 7797 (unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem) 7798 (unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem) 7799 7800 ;------------------------------------------------------------- 7801 ; div - divide 7802 ; divu - divide unsigned 7803 ; divx - divide extension 7804 ;------------------------------------------------------------- 7805 7806 ; div.BW #imm 7807 (div-imm div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem) 7808 (div-imm divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem) 7809 (div-imm divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem) 7810 ; div.BW src 7811 (div-src div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem) 7812 (div-src divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem) 7813 (div-src divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem) 7814 7815 (div-src-defn 32 .l div dst32-24-Prefixed-SI 7816 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI) 7817 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000) 7818 div-sem) 7819 (div-src-defn 32 .l divu dst32-24-Prefixed-SI 7820 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI) 7821 udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0 7822 div-sem) 7823 (div-src-defn 32 .l divx dst32-24-Prefixed-SI 7824 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI) 7825 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000) 7826 div-sem) 7827 7828 ;------------------------------------------------------------- 7829 ; dsbb - decimal subtraction with borrow 7830 ; dsub - decimal subtraction 7831 ;------------------------------------------------------------- 7832 7833 (define-pmacro (dsbb-sem mode src dst) 7834 (sequence ((mode result)) 7835 (set result (subc mode dst src (not cbit))) 7836 (set cbit (sub-cflag mode dst src (not cbit))) 7837 (set-z-and-s result) 7838 (set dst result)) 7839 ) 7840 7841 ; dsbb for m16c 7842 (decimal-subtraction16-insn dsbb #xF #x7) 7843 7844 ; dsbb.size #imm,dst 7845 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem) 7846 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem) 7847 ; dsbb.BW src,dst 7848 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem) 7849 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem) 7850 7851 (define-pmacro (dsub-sem mode src dst) 7852 (sequence ((mode result)) 7853 (set result (subc mode dst src 0)) 7854 (set cbit (sub-cflag mode dst src 0)) 7855 (set-z-and-s result) 7856 (set dst result)) 7857 ) 7858 7859 ; dsub for m16c 7860 (decimal-subtraction16-insn dsub #xD #x5) 7861 7862 ; dsub.size #imm,dst 7863 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem) 7864 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem) 7865 ; dsub.BW src,dst 7866 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem) 7867 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem) 7868 7869 ;------------------------------------------------------------- 7870 ; sub - binary subtraction 7871 ;------------------------------------------------------------- 7872 7873 (define-pmacro (sub-sem mode src1 dst) 7874 (sequence ((mode result)) 7875 (set result (sub mode dst src1)) 7876 (set obit (sub-oflag mode dst src1 0)) 7877 (set cbit (sub-cflag mode dst src1 0)) 7878 (set dst result) 7879 (set-z-and-s result))) 7880 7881 ; sub.size:G #imm,dst (m16 #1 m32 #1) 7882 (binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem) 7883 ; sub.b:S #imm8,dst3 (m16 #2) 7884 (binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem) 7885 ; sub.BW:G src,dst (m16 #3 m32 #4) 7886 (binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem) 7887 ; sub.B.S src2,r0l/r0h (m16 #4) 7888 (binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem) 7889 ; sub.L:G #imm32,dst (m32 #2) 7890 (binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem) 7891 ; sub.BW:S #imm,dst2 (m32 #3) 7892 (binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem) 7893 (binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem) 7894 ; sub.L:G src,dst (m32 #5) 7895 (binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem) 7896 7897 ;------------------------------------------------------------- 7898 ; enter - enter function 7899 ; exitd - exit and deallocate stack frame 7900 ;------------------------------------------------------------- 7901 7902 (define-pmacro (enter16-sem mach amt) 7903 (sequence () 7904 (set (reg h-sp) (sub (reg h-sp) 2)) 7905 (set (mem16 HI (reg h-sp)) (reg h-fb)) 7906 (set (reg h-fb) (reg h-sp)) 7907 (set (reg h-sp) (sub (reg h-sp) amt)))) 7908 7909 (define-pmacro (exit16-sem mach) 7910 (sequence ((SI newpc)) 7911 (set (reg h-sp) (reg h-fb)) 7912 (set (reg h-fb) (mem16 HI (reg h-sp))) 7913 (set (reg h-sp) (add (reg h-sp) 2)) 7914 (set newpc (mem16 HI (reg h-sp))) 7915 (set (reg h-sp) (add (reg h-sp) 2)) 7916 (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16)))) 7917 (set (reg h-sp) (add (reg h-sp) 1)) 7918 (set pc newpc))) 7919 7920 (define-pmacro (enter32-sem mach amt) 7921 (sequence () 7922 (set (reg h-sp) (sub (reg h-sp) 4)) 7923 (set (mem32 SI (reg h-sp)) (reg h-fb)) 7924 (set (reg h-fb) (reg h-sp)) 7925 (set (reg h-sp) (sub (reg h-sp) amt)))) 7926 7927 (define-pmacro (exit32-sem mach) 7928 (sequence ((SI newpc)) 7929 (set (reg h-sp) (reg h-fb)) 7930 (set (reg h-fb) (mem32 SI (reg h-sp))) 7931 (set (reg h-sp) (add (reg h-sp) 4)) 7932 (set newpc (mem32 SI (reg h-sp))) 7933 (set (reg h-sp) (add (reg h-sp) 4)) 7934 (set pc newpc))) 7935 7936 (dni enter16 "enter #Imm-16-QI" ((machine 16)) 7937 ("enter #${Dsp-16-u8}") 7938 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8) 7939 (enter16-sem 16 Dsp-16-u8) 7940 ()) 7941 7942 (dni exitd16 "exitd" ((machine 16)) 7943 ("exitd") 7944 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2)) 7945 (exit16-sem 16) 7946 ()) 7947 7948 (dni enter32 "enter #Imm-8-QI" ((machine 32)) 7949 ("enter #${Dsp-8-u8}") 7950 (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8) 7951 (enter32-sem 32 Dsp-8-u8) 7952 ()) 7953 7954 (dni exitd32 "exitd" ((machine 32)) 7955 ("exitd") 7956 (+ (f-0-4 #xF) (f-4-4 #xC)) 7957 (exit32-sem 32) 7958 ()) 7959 7960 ;------------------------------------------------------------- 7961 ; fclr - flag register clear 7962 ; fset - flag register set 7963 ;------------------------------------------------------------- 7964 7965 (define-pmacro (set-flags-sem flag) 7966 (sequence ((SI tmp)) 7967 (case DFLT flag 7968 ((#x0) (set cbit 1)) 7969 ((#x1) (set dbit 1)) 7970 ((#x2) (set zbit 1)) 7971 ((#x3) (set sbit 1)) 7972 ((#x4) (set bbit 1)) 7973 ((#x5) (set obit 1)) 7974 ((#x6) (set ibit 1)) 7975 ((#x7) (set ubit 1))) 7976 ) 7977 ) 7978 7979 (define-pmacro (clear-flags-sem flag) 7980 (sequence ((SI tmp)) 7981 (case DFLT flag 7982 ((#x0) (set cbit 0)) 7983 ((#x1) (set dbit 0)) 7984 ((#x2) (set zbit 0)) 7985 ((#x3) (set sbit 0)) 7986 ((#x4) (set bbit 0)) 7987 ((#x5) (set obit 0)) 7988 ((#x6) (set ibit 0)) 7989 ((#x7) (set ubit 0))) 7990 ) 7991 ) 7992 7993 (dni fclr16 "fclr flag" ((machine 16)) 7994 ("fclr ${flags16}") 7995 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5)) 7996 (clear-flags-sem flags16) 7997 ()) 7998 7999 (dni fset16 "fset flag" ((machine 16)) 8000 ("fset ${flags16}") 8001 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4)) 8002 (set-flags-sem flags16) 8003 ()) 8004 8005 (dni fclr "fclr" ((machine 32)) 8006 ("fclr ${flags32}") 8007 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32) 8008 (clear-flags-sem flags32) 8009 ()) 8010 8011 (dni fset "fset" ((machine 32)) 8012 ("fset ${flags32}") 8013 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32) 8014 (set-flags-sem flags32) 8015 ()) 8016 8017 ;------------------------------------------------------------- 8018 ; inc - increment 8019 ;------------------------------------------------------------- 8020 8021 (define-pmacro (inc-sem mode dest) 8022 (sequence ((mode result)) 8023 (set result (add mode dest 1)) 8024 (set-z-and-s result) 8025 (set dest result)) 8026 ) 8027 8028 (dni inc16.b 8029 "inc.b Dst16-3-S-8" 8030 ((machine 16)) 8031 "inc.b ${Dst16-3-S-8}" 8032 (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8) 8033 (inc-sem QI Dst16-3-S-8) 8034 ()) 8035 8036 (dni inc16.w 8037 "inc.w Dst16An-S" 8038 ((machine 16)) 8039 "inc.w ${Dst16An-S}" 8040 (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S) 8041 (inc-sem HI Dst16An-S) 8042 ()) 8043 8044 (unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem) 8045 (unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem) 8046 8047 ;------------------------------------------------------------- 8048 ; freit - fast return from interrupt (m32) 8049 ; int - interrupt 8050 ; into - interrupt on overflow 8051 ;------------------------------------------------------------- 8052 8053 ; ??? semantics 8054 (dni freit32 "FREIT" ((machine 32)) 8055 ("freit") 8056 (+ (f-0-4 9) (f-4-4 #xF)) 8057 (nop) 8058 ()) 8059 8060 (dni int16 "int Dsp-10-u6" ((machine 16)) 8061 ("int #${Dsp-10-u6}") 8062 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6) 8063 (c-call VOID "do_int" pc Dsp-10-u6) 8064 ()) 8065 8066 (dni into16 "into" ((machine 16)) 8067 ("into") 8068 (+ (f-0-4 #xF) (f-4-4 6)) 8069 (nop) 8070 ()) 8071 8072 (dni int32 "int Dsp-8-u6" ((machine 32)) 8073 ("int #${Dsp-8-u6}") 8074 (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0)) 8075 (c-call VOID "do_int" pc Dsp-8-u6) 8076 ()) 8077 8078 (dni into32 "into" ((machine 32)) 8079 ("into") 8080 (+ (f-0-4 #xB) (f-4-4 #xF)) 8081 (nop) 8082 ()) 8083 8084 ;------------------------------------------------------------- 8085 ; index (m32c) 8086 ;------------------------------------------------------------- 8087 8088 ; TODO add support to insns allowing index 8089 (define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d)) 8090 (define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d)) 8091 (define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0))) 8092 (define-pmacro (indexw-sem mode d) 8093 (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2)))) 8094 (define-pmacro (indexwd-sem mode d) 8095 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2)))) 8096 (define-pmacro (indexws-sem mode d) 8097 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0))) 8098 (define-pmacro (indexl-sem mode d) 8099 (set SrcIndex d) (set DstIndex (sll d (const 2)))) 8100 (define-pmacro (indexld-sem mode d) 8101 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2)))) 8102 (define-pmacro (indexls-sem mode d) 8103 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0))) 8104 8105 ; Note that "wbit" not where the size bit goes here, hence, it's 8106 ; always 0 in these calls but op2 differs instead. 8107 8108 ; indexb src (index byte) 8109 (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem) 8110 (unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem) 8111 ; indexbd src (index byte dest) 8112 (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem) 8113 (unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem) 8114 ; indexbs src (index byte src) 8115 (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem) 8116 (unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem) 8117 ; indexl src (index long) 8118 (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem) 8119 (unary32-defn HI .w 0 indexl 9 3 3 indexl-sem) 8120 ; indexld src (index long dest) 8121 (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem) 8122 (unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem) 8123 ; indexls src (index long src) 8124 (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem) 8125 (unary32-defn HI .w 0 indexls 9 1 3 indexls-sem) 8126 ; indexw src (index word) 8127 (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem) 8128 (unary32-defn HI .w 0 indexw 8 3 3 indexw-sem) 8129 ; indexwd src (index word dest) 8130 (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem) 8131 (unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem) 8132 ; indexws (index word src) 8133 (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem) 8134 (unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem) 8135 8136 ;------------------------------------------------------------- 8137 ; jcc - jump on condition 8138 ;------------------------------------------------------------- 8139 8140 (define-pmacro (jcnd32-sem cnd label) 8141 (sequence () 8142 (case DFLT cnd 8143 ((#x00) (if (not cbit) (set pc label))) ;ltu nc 8144 ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu 8145 ((#x02) (if (not zbit) (set pc label))) ;ne nz 8146 ((#x03) (if (not sbit) (set pc label))) ;pz 8147 ((#x04) (if (not obit) (set pc label))) ;no 8148 ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt 8149 ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge 8150 ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c 8151 ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu 8152 ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z 8153 ((#x0b) (if (trunc BI sbit) (set pc label))) ;n 8154 ((#x0c) (if (trunc BI obit) (set pc label))) ;o 8155 ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le 8156 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt 8157 ) 8158 ) 8159 ) 8160 8161 (define-pmacro (jcnd16-sem cnd label) 8162 (sequence () 8163 (case DFLT cnd 8164 ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c 8165 ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu 8166 ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z 8167 ((#x03) (if (trunc BI sbit) (set pc label))) ;n 8168 ((#x04) (if (not cbit) (set pc label))) ;ltu nc 8169 ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu 8170 ((#x06) (if (not zbit) (set pc label))) ;ne nz 8171 ((#x07) (if (not sbit) (set pc label))) ;pz 8172 ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le 8173 ((#x09) (if (trunc BI obit) (set pc label))) ;o 8174 ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge 8175 ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt 8176 ((#x0d) (if (not obit) (set pc label))) ;no 8177 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt 8178 ) 8179 ) 8180 ) 8181 8182 (dni jcnd16-5 8183 "jCnd label" 8184 (RL_JUMP RELAXABLE (machine 16)) 8185 "j$cond16j5 ${Lab-8-8}" 8186 (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8) 8187 (jcnd16-sem cond16j5 Lab-8-8) 8188 () 8189 ) 8190 8191 (dni jcnd16 8192 "jCnd label" 8193 (RL_JUMP RELAXABLE (machine 16)) 8194 "j$cond16j ${Lab-16-8}" 8195 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8) 8196 (jcnd16-sem cond16j Lab-16-8) 8197 () 8198 ) 8199 8200 (dni jcnd32 8201 "jCnd label" 8202 (RL_JUMP RELAXABLE (machine 32)) 8203 "j$cond32j ${Lab-8-8}" 8204 (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8) 8205 (jcnd32-sem cond32j Lab-8-8) 8206 () 8207 ) 8208 8209 ;------------------------------------------------------------- 8210 ; jmp - jump 8211 ;------------------------------------------------------------- 8212 8213 ; jmp.s label3 (m16 #1) 8214 (dni jmp16.s "jmp.s Lab-5-3" (RL_JUMP RELAXABLE (machine 16)) 8215 ("jmp.s ${Lab-5-3}") 8216 (+ (f-0-4 6) (f-4-1 0) Lab-5-3) 8217 (sequence () (set pc Lab-5-3)) 8218 ()) 8219 ; jmp.b label8 (m16 #2) 8220 (dni jmp16.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 16)) 8221 ("jmp.b ${Lab-8-8}") 8222 (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8) 8223 (sequence () (set pc Lab-8-8)) 8224 ()) 8225 ; jmp.w label16 (m16 #3) 8226 (dni jmp16.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16)) 8227 ("jmp.w ${Lab-8-16}") 8228 (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16) 8229 (sequence () (set pc Lab-8-16)) 8230 ()) 8231 ; jmp.a label24 (m16 #4) 8232 (dni jmp16.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16)) 8233 ("jmp.a ${Lab-8-24}") 8234 (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24) 8235 (sequence () (set pc Lab-8-24)) 8236 ()) 8237 8238 (define-pmacro (jmp16-sem mode dst) 8239 (set pc (and dst #xfffff)) 8240 ) 8241 (define-pmacro (jmp32-sem mode dst) 8242 (set pc dst) 8243 ) 8244 ; jmpi.w dst (m16 #1 m32 #2) 8245 (unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem) 8246 (unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem) 8247 ; jmpi.a dst (m16 #2 m32 #2) 8248 (unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem) 8249 (unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem) 8250 ; jmps imm8 (m16 #1) 8251 (dni jmps16 "jmps Imm-8-QI" ((machine 16)) 8252 ("jmps #${Imm-8-QI}") 8253 (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI) 8254 (sequence () (set pc Imm-8-QI)) 8255 ()) 8256 ; jmp.s label3 (m32 #1) 8257 (dni jmp32.s 8258 "jmp.s label" 8259 (RL_JUMP RELAXABLE (machine 32)) 8260 "jmp.s ${Lab32-jmp-s}" 8261 (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s) 8262 (set pc Lab32-jmp-s) 8263 () 8264 ) 8265 ; jmp.b label8 (m32 #2) 8266 (dni jmp32.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 32)) 8267 ("jmp.b ${Lab-8-8}") 8268 (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8) 8269 (set pc Lab-8-8) 8270 ()) 8271 ; jmp.w label16 (m32 #3) 8272 (dni jmp32.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 32)) 8273 ("jmp.w ${Lab-8-16}") 8274 (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16) 8275 (set pc Lab-8-16) 8276 ()) 8277 ; jmp.a label24 (m32 #4) 8278 (dni jmp32.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 32)) 8279 ("jmp.a ${Lab-8-24}") 8280 (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24) 8281 (set pc Lab-8-24) 8282 ()) 8283 ; jmp.s imm8 (m32 #1) 8284 (dni jmps32 "jmps Imm-8-QI" (RL_JUMP (machine 32)) 8285 ("jmps #${Imm-8-QI}") 8286 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI) 8287 (set pc Imm-8-QI) 8288 ()) 8289 8290 ;------------------------------------------------------------- 8291 ; jsr jump subroutine 8292 ;------------------------------------------------------------- 8293 8294 (define-pmacro (jsr16-sem length dst) 8295 (sequence ((SI tpc)) 8296 (set tpc (add pc length)) 8297 (set (reg h-sp) (sub (reg h-sp) 2)) 8298 (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8)) 8299 (set (reg h-sp) (sub (reg h-sp) 1)) 8300 (set (mem16 QI (reg h-sp)) (and tpc #xff)) 8301 (set pc dst) 8302 ) 8303 ) 8304 (define-pmacro (jsr32-sem length dst) 8305 (sequence ((SI tpc)) 8306 (set tpc (add pc length)) 8307 (set (reg h-sp) (sub (reg h-sp) 2)) 8308 (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16)) 8309 (set (reg h-sp) (sub (reg h-sp) 2)) 8310 (set (mem32 HI (reg h-sp)) (and tpc #xffff)) 8311 (set pc dst) 8312 ) 8313 ) 8314 8315 ; jsr.w label16 (m16 #1) 8316 (dni jsr16.w "jsr.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16)) 8317 ("jsr.w ${Lab-8-16}") 8318 (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16) 8319 (jsr16-sem 3 Lab-8-16) 8320 ()) 8321 ; jsr.a label24 (m16 #2) 8322 (dni jsr16.a "jsr.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16)) 8323 ("jsr.a ${Lab-8-24}") 8324 (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24) 8325 (jsr16-sem 4 Lab-8-24) 8326 ()) 8327 (define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3 op16-sem 8328 op32 op32-1 op32-2 op32-3 op32-4 op32-sem len) 8329 (begin 8330 (dni (.sym jsri16 mode - op16) 8331 (.str "jsri." mode " " op16) 8332 (RL_1ADDR (machine 16)) 8333 (.str "jsri." mode " ${" op16 "}") 8334 (+ op16-1 op16-2 op16-3 op16) 8335 (op16-sem len op16) 8336 ()) 8337 (dni (.sym jsri32 mode - op32) 8338 (.str "jsri." mode " " op32) 8339 (RL_1ADDR (machine 32)) 8340 (.str "jsri." mode " ${" op32 "}") 8341 (+ op32-1 op32-2 op32-3 op32-4 op32) 8342 (op32-sem len op32) 8343 ()) 8344 ) 8345 ) 8346 ; jsri.w dst (m16 #1 m32 #1)) 8347 (jsri-defn w dst16-16-20ar-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8348 dst32-16-24-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4) 8349 (jsri-defn w dst16-16-16sa-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8350 dst32-16-16sa-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4) 8351 (jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8352 dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3) 8353 (jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem 8354 dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2) 8355 8356 ; jsri.a (m16 #2 m32 #2) 8357 (jsri-defn a dst16-16-20ar-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8358 dst32-16-24-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4) 8359 (jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8360 dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3) 8361 (jsri-defn a dst16-16-16sa-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8362 dst32-16-16sa-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4) 8363 (jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem 8364 dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2) 8365 8366 (dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32)) 8367 ("jsri.a ${dst32-16-24-Unprefixed-SI}") 8368 (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1)) 8369 (jsr32-sem 6 dst32-16-24-Unprefixed-SI) 8370 ()) 8371 ; jsr.w label16 (m32 #1) 8372 (dni jsr32.w "jsr.w label" (RL_JUMP RELAXABLE (machine 32)) 8373 ("jsr.w ${Lab-8-16}") 8374 (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16) 8375 (jsr32-sem 3 Lab-8-16) 8376 ()) 8377 ; jsr.a label16 (m32 #2) 8378 (dni jsr32.a "jsr.a label" (RL_JUMP (machine 32)) 8379 ("jsr.a ${Lab-8-24}") 8380 (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24) 8381 (jsr32-sem 4 Lab-8-24) 8382 ()) 8383 ; jsrs imm8 (m16 #1) 8384 (dni jsrs16 "jsrs Imm-8-QI" ((machine 16)) 8385 ("jsrs #${Imm-8-QI}") 8386 (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI) 8387 (jsr16-sem 2 Imm-8-QI) 8388 ()) 8389 ; jsrs imm8 (m32 #1) 8390 (dni jsrs "jsrs #Imm-8-QI" ((machine 32)) 8391 ("jsrs #${Imm-8-QI}") 8392 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI) 8393 (jsr32-sem 2 Imm-8-QI) 8394 ()) 8395 8396 ;------------------------------------------------------------- 8397 ; ldc - load control register 8398 ; stc - store control register 8399 ;------------------------------------------------------------- 8400 8401 (define-pmacro (ldc32-cr1-sem src dst) 8402 (sequence () 8403 (case DFLT dst 8404 ((#x0) (set (reg h-dct0) src)) 8405 ((#x1) (set (reg h-dct1) src)) 8406 ((#x2) (sequence ((HI tflag)) 8407 (set tflag src) 8408 (if (and tflag #x1) (set cbit 1)) 8409 (if (and tflag #x2) (set dbit 1)) 8410 (if (and tflag #x4) (set zbit 1)) 8411 (if (and tflag #x8) (set sbit 1)) 8412 (if (and tflag #x10) (set bbit 1)) 8413 (if (and tflag #x20) (set obit 1)) 8414 (if (and tflag #x40) (set ibit 1)) 8415 (if (and tflag #x80) (set ubit 1)))) 8416 ((#x3) (set (reg h-svf) src)) 8417 ((#x4) (set (reg h-drc0) src)) 8418 ((#x5) (set (reg h-drc1) src)) 8419 ((#x6) (set (reg h-dmd0) src)) 8420 ((#x7) (set (reg h-dmd1) src)) 8421 ) 8422 ) 8423 ) 8424 (define-pmacro (ldc32-cr2-sem src dst) 8425 (sequence () 8426 (case DFLT dst 8427 ((#x0) (set (reg h-intb) src)) 8428 ((#x1) (set (reg h-sp) src)) 8429 ((#x2) (set (reg h-sb) src)) 8430 ((#x3) (set (reg h-fb) src)) 8431 ((#x4) (set (reg h-svp) src)) 8432 ((#x5) (set (reg h-vct) src)) 8433 ((#x7) (set (reg h-isp) src)) 8434 ) 8435 ) 8436 ) 8437 (define-pmacro (ldc32-cr3-sem src dst) 8438 (sequence () 8439 (case DFLT dst 8440 ((#x2) (set (reg h-dma0) src)) 8441 ((#x3) (set (reg h-dma1) src)) 8442 ((#x4) (set (reg h-dra0) src)) 8443 ((#x5) (set (reg h-dra1) src)) 8444 ((#x6) (set (reg h-dsa0) src)) 8445 ((#x7) (set (reg h-dsa1) src)) 8446 ) 8447 ) 8448 ) 8449 (define-pmacro (ldc16-sem src dst) 8450 (sequence () 8451 (case DFLT dst 8452 ((#x1) (set (reg h-intb) src)) 8453 ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16))))) 8454 ((#x3) (sequence ((HI tflag)) 8455 (set tflag src) 8456 (if (and tflag #x1) (set cbit 1)) 8457 (if (and tflag #x2) (set dbit 1)) 8458 (if (and tflag #x4) (set zbit 1)) 8459 (if (and tflag #x8) (set sbit 1)) 8460 (if (and tflag #x10) (set bbit 1)) 8461 (if (and tflag #x20) (set obit 1)) 8462 (if (and tflag #x40) (set ibit 1)) 8463 (if (and tflag #x80) (set ubit 1)))) 8464 ((#x4) (set (reg h-isp) src)) 8465 ((#x5) (set (reg h-sp) src)) 8466 ((#x6) (set (reg h-sb) src)) 8467 ((#x7) (set (reg h-fb) src)) 8468 ) 8469 ) 8470 ) 8471 8472 (define-pmacro (stc32-cr1-sem src dst) 8473 (sequence () 8474 (case DFLT src 8475 ((#x0) (set dst (reg h-dct0))) 8476 ((#x1) (set dst (reg h-dct1))) 8477 ((#x2) (sequence ((HI tflag)) 8478 (set tflag 0) 8479 (if (eq cbit 1) (set tflag (or tflag #x1))) 8480 (if (eq dbit 1) (set tflag (or tflag #x2))) 8481 (if (eq zbit 1) (set tflag (or tflag #x4))) 8482 (if (eq sbit 1) (set tflag (or tflag #x8))) 8483 (if (eq bbit 1) (set tflag (or tflag #x10))) 8484 (if (eq obit 1) (set tflag (or tflag #x20))) 8485 (if (eq ibit 1) (set tflag (or tflag #x40))) 8486 (if (eq ubit 1) (set tflag (or tflag #x80))) 8487 (set dst tflag))) 8488 ((#x3) (set dst (reg h-svf))) 8489 ((#x4) (set dst (reg h-drc0))) 8490 ((#x5) (set dst (reg h-drc1))) 8491 ((#x6) (set dst (reg h-dmd0))) 8492 ((#x7) (set dst (reg h-dmd1))) 8493 ) 8494 ) 8495 ) 8496 (define-pmacro (stc32-cr2-sem src dst) 8497 (sequence () 8498 (case DFLT src 8499 ((#x0) (set dst (reg h-intb))) 8500 ((#x1) (set dst (reg h-sp))) 8501 ((#x2) (set dst (reg h-sb))) 8502 ((#x3) (set dst (reg h-fb))) 8503 ((#x4) (set dst (reg h-svp))) 8504 ((#x5) (set dst (reg h-vct))) 8505 ((#x7) (set dst (reg h-isp))) 8506 ) 8507 ) 8508 ) 8509 (define-pmacro (stc32-cr3-sem src dst) 8510 (sequence () 8511 (case DFLT src 8512 ((#x2) (set dst (reg h-dma0))) 8513 ((#x3) (set dst (reg h-dma1))) 8514 ((#x4) (set dst (reg h-dra0))) 8515 ((#x5) (set dst (reg h-dra1))) 8516 ((#x6) (set dst (reg h-dsa0))) 8517 ((#x7) (set dst (reg h-dsa1))) 8518 ) 8519 ) 8520 ) 8521 (define-pmacro (stc16-sem src dst) 8522 (sequence () 8523 (case DFLT src 8524 ((#x1) (set dst (and (reg h-intb) (const #xffff)))) 8525 ((#x2) (set dst (srl (reg h-intb) (const 16)))) 8526 ((#x3) (sequence ((HI tflag)) 8527 (set tflag 0) 8528 (if (eq cbit 1) (set tflag (or tflag #x1))) 8529 (if (eq dbit 1) (set tflag (or tflag #x2))) 8530 (if (eq zbit 1) (set tflag (or tflag #x4))) 8531 (if (eq sbit 1) (set tflag (or tflag #x8))) 8532 (if (eq bbit 1) (set tflag (or tflag #x10))) 8533 (if (eq obit 1) (set tflag (or tflag #x20))) 8534 (if (eq ibit 1) (set tflag (or tflag #x40))) 8535 (if (eq ubit 1) (set tflag (or tflag #x80))) 8536 (set dst tflag))) 8537 ((#x4) (set dst (reg h-isp))) 8538 ((#x5) (set dst (reg h-sp))) 8539 ((#x6) (set dst (reg h-sb))) 8540 ((#x7) (set dst (reg h-fb))) 8541 ) 8542 ) 8543 ) 8544 8545 (dni ldc16.imm16 "ldc #imm,dst" ((machine 16)) 8546 ("ldc #${Imm-16-HI},${cr16}") 8547 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI) 8548 (ldc16-sem Imm-16-HI cr16) 8549 ()) 8550 8551 (dni ldc16.dst "ldc src,dest" ((machine 16)) 8552 ("ldc ${dst16-16-HI},${cr16}") 8553 (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI) 8554 (ldc16-sem dst16-16-HI cr16) 8555 ()) 8556 ; ldc src,dest (m32c #4) 8557 (dni ldc32.src-cr1 "ldc src,dst" ((machine 32)) 8558 ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}") 8559 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32) 8560 (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32) 8561 ()) 8562 ; ldc src,dest (m32c #5) 8563 (dni ldc32.src-cr2 "ldc src,dest" ((machine 32)) 8564 ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}") 8565 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32) 8566 (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32) 8567 ()) 8568 ; ldc src,dest (m32c #6) 8569 (dni ldc32.src-cr3 "ldc src,dst" ((machine 32)) 8570 ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}") 8571 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32) 8572 (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32) 8573 ()) 8574 ; ldc src,dest (m32c #1) 8575 (dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32)) 8576 ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}") 8577 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI) 8578 (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32) 8579 ()) 8580 ; ldc src,dest (m32c #2) 8581 (dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32)) 8582 ("ldc #${Dsp-16-u24},${cr2-32}") 8583 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1) cr2-32 Dsp-16-u24) 8584 (ldc32-cr2-sem Dsp-16-u24 cr2-32) 8585 ()) 8586 ; ldc src,dest (m32c #3) 8587 (dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32)) 8588 ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}") 8589 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24) 8590 (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32) 8591 ()) 8592 8593 (dni stc16.src "stc src,dest" ((machine 16)) 8594 ("stc ${cr16},${dst16-16-HI}") 8595 (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI) 8596 (stc16-sem cr16 dst16-16-HI ) 8597 ()) 8598 8599 (dni stc16.pc "stc pc,dest" ((machine 16)) 8600 ("stc pc,${dst16-16-HI}") 8601 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI) 8602 (sequence () (set dst16-16-HI (reg h-pc))) 8603 ()) 8604 8605 (dni stc32.src-cr1 "stc src,dst" ((machine 32)) 8606 ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}") 8607 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32) 8608 (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI ) 8609 ()) 8610 8611 (dni stc32.src-cr2 "stc src,dest" ((machine 32)) 8612 ("stc ${cr2-32},${dst32-16-Unprefixed-SI}") 8613 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32) 8614 (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI ) 8615 ()) 8616 8617 (dni stc32.src-cr3 "stc src,dst" ((machine 32)) 8618 ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}") 8619 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32) 8620 (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI ) 8621 ()) 8622 8623 ;------------------------------------------------------------- 8624 ; ldctx - load context 8625 ; stctx - store context 8626 ;------------------------------------------------------------- 8627 8628 ; ??? semantics 8629 (dni ldctx16 "ldctx abs16,abs24" ((machine 16)) 8630 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}") 8631 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24) 8632 (nop) 8633 ()) 8634 (dni ldctx32 "ldctx abs16,abs24" ((machine 32)) 8635 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}") 8636 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24) 8637 (nop) 8638 ()) 8639 (dni stctx16 "stctx abs16,abs24" ((machine 16)) 8640 ("stctx ${Dsp-16-u16},${Dsp-32-u24}") 8641 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24) 8642 (nop) 8643 ()) 8644 (dni stctx32 "stctx abs16,abs24" ((machine 32)) 8645 ("stctx ${Dsp-16-u16},${Dsp-32-u24}") 8646 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24) 8647 (nop) 8648 ()) 8649 8650 ;------------------------------------------------------------- 8651 ; lde - load from extra far data area (m16) 8652 ; ste - store to extra far data area (m16) 8653 ;------------------------------------------------------------- 8654 8655 (lde-dst QI .b 0) 8656 (lde-dst HI .w 1) 8657 8658 (ste-dst QI .b 0) 8659 (ste-dst HI .w 1) 8660 8661 ;------------------------------------------------------------- 8662 ; ldipl - load interrupt permission level 8663 ;------------------------------------------------------------- 8664 8665 ; ??? semantics 8666 ; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl 8667 8668 (dni ldipl16.imm "ldipl #imm" ((machine 16)) 8669 ("ldipl #${Imm-13-u3}") 8670 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3) 8671 (nop) 8672 ()) 8673 (dni ldipl32.imm "ldipl #imm" ((machine 32)) 8674 ("ldipl #${Imm-13-u3}") 8675 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3) 8676 (nop) 8677 ()) 8678 8679 8680 ;------------------------------------------------------------- 8681 ; max - maximum value 8682 ;------------------------------------------------------------- 8683 8684 ; TODO check semantics for min -1,0 8685 (define-pmacro (max-sem mode src dst) 8686 (sequence () 8687 (if (gt mode src dst) 8688 (set mode dst src))) 8689 ) 8690 8691 ; max.size:G #imm,dst 8692 (binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem) 8693 (binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem) 8694 8695 ; max.BW:G src,dst 8696 (binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem) 8697 (binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem) 8698 8699 ;------------------------------------------------------------- 8700 ; min - minimum value 8701 ;------------------------------------------------------------- 8702 8703 (define-pmacro (min-sem mode src dst) 8704 (sequence () 8705 (if (lt mode src dst) 8706 (set mode dst src))) 8707 ) 8708 8709 ; min.size:G #imm,dst 8710 (binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem) 8711 (binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem) 8712 8713 ; min.BW:G src,dst 8714 (binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem) 8715 (binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem) 8716 8717 ;------------------------------------------------------------- 8718 ; mov - move 8719 ;------------------------------------------------------------- 8720 8721 (define-pmacro (mov-sem mode src1 dst) 8722 (sequence ((mode result)) 8723 (set result src1) 8724 (set-z-and-s result) 8725 (set mode dst src1)) 8726 ) 8727 8728 (define-pmacro (mov-dspsp-dst-sem mach mode src1 dst) 8729 (set dst (mem-mach mach mode (add sp src1))) 8730 ) 8731 8732 (define-pmacro (mov-src-dspsp-sem mach mode src dst1) 8733 (set (mem-mach mach mode (add sp dst1)) src) 8734 ) 8735 8736 (define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2) 8737 (dni (.sym mov16. size .S-imm- regn) 8738 (.str "mov." size ":S " imm "," regn) 8739 ((machine 16)) 8740 (.str "mov." size "$S #${" imm "}," regn) 8741 (+ op1 op2 imm) 8742 (mov-sem mode imm (reg (.sym h- regn))) 8743 ()) 8744 ) 8745 ; mov.size:G #imm,dst (m16 #1 m32 #1) 8746 (binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem) 8747 ; mov.L:G #imm32,dst (m32 #2) 8748 (binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem) 8749 ; mov.BW:S #imm,dst2 (m32 #4) 8750 (binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem) 8751 (binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem) 8752 ; mov.b:S #imm8,dst3 (m16 #3) 8753 (binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem) 8754 ; mov.b:S #imm8,aN (m16 #4) 8755 (mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2)) 8756 (mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA)) 8757 (mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2)) 8758 (mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA)) 8759 ; mov.WL:S #imm,A0/A1 (m32 #5) 8760 (define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2) 8761 (dni (.sym mov32- sz - regn) 8762 (.str "mov." sz ":s" imm "," regn) 8763 ((machine 32)) 8764 (.str "mov." sz "$S #${" imm "}," regn) 8765 (+ (f-0-4 op1) (f-4-4 op2) imm) 8766 (mov-sem mode imm (reg (.sym h- regn))) 8767 ()) 8768 ) 8769 (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC) 8770 (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD) 8771 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC) 8772 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD) 8773 8774 ; mov.size:Q #imm4,dst (m16 #2 m32 #3) 8775 (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem) 8776 (binary-arith16-imm4-dst-defn HI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem) 8777 (binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem) 8778 (binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem) 8779 8780 ; mov.BW:Z #0,dst (m16 #5 m32 #6) 8781 (dni mov16.b-Z-imm8-dst3 8782 "mov.b:Z #0,Dst16-3-S-8" 8783 ((machine 16)) 8784 "mov.b$Z #0,${Dst16-3-S-8}" 8785 (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8) 8786 (mov-sem QI (const 0) Dst16-3-S-8) 8787 ()) 8788 ; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem) 8789 (binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem) 8790 (binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem) 8791 ; mov.BW:G src,dst (m16 #6 m32 #7) 8792 (binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem) 8793 ; mov.B:S src2,a0/a1 (m16 #7) 8794 (dni (.sym mov 16 .b.S-An) 8795 (.str mov ".b:S src2,a[01]") 8796 ((machine 16)) 8797 (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}") 8798 (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S) 8799 (mov-sem QI src16-2-S Dst16AnQI-S) 8800 ()) 8801 (define-pmacro (mov16-b-s-an-defn op1 op2 op2c) 8802 (dni (.sym mov16.b.S- op1 - op2) 8803 (.str mov ".b:S " op1 "," op2) 8804 ((machine 16)) 8805 (.str mov ".b$S " op1 "," op2) 8806 (+ (f-0-4 #x3) op2c) 8807 (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2))) 8808 ()) 8809 ) 8810 (mov16-b-s-an-defn r0l a1 (f-4-4 #x4)) 8811 (mov16-b-s-an-defn r0h a0 (f-4-4 #x0)) 8812 8813 ; mov.L:G src,dst (m32 #8) 8814 (binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem) 8815 ; mov.B:S r0l/r0h,dst2 (m16 #8) 8816 (dni (.sym mov 16 .b.S-Rn-An) 8817 (.str mov ".b:S r0[lh],src2") 8818 ((machine 16)) 8819 (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}") 8820 (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S) 8821 (mov-sem QI src16-2-S Dst16RnQI-S) 8822 ()) 8823 8824 ; mov.B.S src2,r0l/r0h (m16 #9) 8825 (binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem) 8826 8827 ; mov.BW:S src2,r0l/r0 (m32 #9) 8828 ; mov.BW:S src2,r1l/r1 (m32 #10) 8829 (define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2) 8830 (begin 8831 (dni (.sym mov32. sz - src - dst) 8832 (.str "mov." sz "src," dst) 8833 ((machine 32)) 8834 (.str "mov." sz "$S ${" (.sym src - mode) "}," dst) 8835 (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode)) 8836 (mov-sem mode (.sym src - mode) (reg (.sym h- dst))) 8837 ()) 8838 ) 8839 ) 8840 (mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4) 8841 (mov32-src-r w 1 HI dst32-2-S-16 r0 0 4) 8842 (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4) 8843 (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4) 8844 (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7) 8845 (mov32-src-r w 1 HI dst32-2-S-basic r1 1 7) 8846 (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7) 8847 (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7) 8848 (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7) 8849 (mov32-src-r w 1 HI dst32-2-S-8 r1 1 7) 8850 8851 ; mov.BW:S r0l/r0,dst2 (m32 #11) 8852 (define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2) 8853 (begin 8854 (dni (.sym mov32. sz - src - dst) 8855 (.str "mov." sz "src," dst) 8856 ((machine 32)) 8857 (.str "mov." sz "$S " src ",${" (.sym dst - mode) "}") 8858 (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode)) 8859 (mov-sem mode (reg (.sym h- src)) (.sym dst - mode)) 8860 ()) 8861 ) 8862 ) 8863 (mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0) 8864 (mov32-r-dest w 1 HI r0 dst32-2-S-16 0 0) 8865 (mov32-r-dest b 0 QI r0l dst32-2-S-8 0 0) 8866 (mov32-r-dest w 1 HI r0 dst32-2-S-8 0 0) 8867 8868 ; mov.L:S src,A0/A1 (m32 #12) 8869 (define-pmacro (mov32-src-a src dst dstcode opc1 opc2) 8870 (begin 8871 (dni (.sym mov32. sz - src - dst) 8872 (.str "mov." sz "src," dst) 8873 ((machine 32)) 8874 (.str "mov.l" "$S ${" (.sym src - SI) "}," dst) 8875 (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode)) 8876 (mov-sem SI (.sym src - SI) (reg (.sym h- dst))) 8877 ()) 8878 ) 8879 ) 8880 (mov32-src-a dst32-2-S-16 a0 0 1 4) 8881 (mov32-src-a dst32-2-S-16 a1 1 1 4) 8882 (mov32-src-a dst32-2-S-8 a0 0 1 4) 8883 (mov32-src-a dst32-2-S-8 a1 1 1 4) 8884 8885 ; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13) 8886 ; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14) 8887 (mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem) 8888 (mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem) 8889 8890 ;------------------------------------------------------------- 8891 ; mova - move effective address 8892 ;------------------------------------------------------------- 8893 8894 (define-pmacro (mov16a-defn dst dstop dstcode) 8895 (dni (.sym mova16. src - dst) 8896 (.str "mova src," dst) 8897 ((machine 16)) 8898 (.str "mova ${dst16-16-Mova-HI}," dst) 8899 (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode)) 8900 (sequence () (set HI (reg dstop) dst16-16-Mova-HI)) 8901 ()) 8902 ) 8903 (mov16a-defn r0 h-r0 0) 8904 (mov16a-defn r1 h-r1 1) 8905 (mov16a-defn r2 h-r2 2) 8906 (mov16a-defn r3 h-r3 3) 8907 (mov16a-defn a0 h-a0 4) 8908 (mov16a-defn a1 h-a1 5) 8909 8910 (define-pmacro (mov32a-defn dst dstop dstcode) 8911 (dni (.sym mova32. src - dst) 8912 (.str "mova src," dst) 8913 ((machine 32)) 8914 (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst) 8915 (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode)) 8916 (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI)) 8917 ()) 8918 ) 8919 (mov32a-defn r2r0 h-r2r0 0) 8920 (mov32a-defn r3r1 h-r3r1 1) 8921 (mov32a-defn a0 h-a0 2) 8922 (mov32a-defn a1 h-a1 3) 8923 8924 ;------------------------------------------------------------- 8925 ; movDir - move nibble 8926 ;------------------------------------------------------------- 8927 8928 (define-pmacro (movdir-sem nib src dst) 8929 (sequence ((SI tmp)) 8930 (case DFLT nib 8931 ((0) (set dst (or (and dst #xf0) (and src #xf)))) 8932 ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4)))) 8933 ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4)))) 8934 ((3) (set dst (or (and dst #x0f) (and src #xf0)))) 8935 ) 8936 ) 8937 ) 8938 ; movDir src,dst 8939 (define-pmacro (mov16dir-1-defn nib dircode dir) 8940 (dni (.sym mov nib 16 ".r0l-dst") 8941 (.str "mov" nib " r0l,dst") 8942 ((machine 16)) 8943 (.str "mov" nib " r0l,${dst16-16-QI}") 8944 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI) 8945 (movdir-sem dircode (reg h-r0l) dst16-16-QI) 8946 ()) 8947 ) 8948 (mov16dir-1-defn ll 0 8) 8949 (mov16dir-1-defn lh 1 #xA) 8950 (mov16dir-1-defn hl 2 9) 8951 (mov16dir-1-defn hh 3 #xB) 8952 (define-pmacro (mov16dir-2-defn nib dircode dir) 8953 (dni (.sym mov nib 16 ".src-r0l") 8954 (.str "mov" nib " src,r0l") 8955 ((machine 16)) 8956 (.str "mov" nib " ${dst16-16-QI},r0l") 8957 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI) 8958 (movdir-sem dircode dst16-16-QI (reg h-r0l)) 8959 ()) 8960 ) 8961 (mov16dir-2-defn ll 0 0) 8962 (mov16dir-2-defn lh 1 2) 8963 (mov16dir-2-defn hl 2 1) 8964 (mov16dir-2-defn hh 3 3) 8965 8966 (define-pmacro (mov32dir-1-defn nib o1o0) 8967 (dni (.sym mov nib 32 ".r0l-dst") 8968 (.str "mov" nib " r0l,dst") 8969 ((machine 32)) 8970 (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}") 8971 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE)) 8972 (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI) 8973 ()) 8974 ) 8975 (mov32dir-1-defn ll 0) 8976 (mov32dir-1-defn lh 1) 8977 (mov32dir-1-defn hl 2) 8978 (mov32dir-1-defn hh 3) 8979 (define-pmacro (mov32dir-2-defn nib o1o0) 8980 (dni (.sym mov nib 32 ".src-r0l") 8981 (.str "mov" nib " src,r0l") 8982 ((machine 32)) 8983 (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l") 8984 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE)) 8985 (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l)) 8986 ()) 8987 ) 8988 (mov32dir-2-defn ll 0) 8989 (mov32dir-2-defn lh 1) 8990 (mov32dir-2-defn hl 2) 8991 (mov32dir-2-defn hh 3) 8992 8993 ;------------------------------------------------------------- 8994 ; movx - move extend sign (m32) 8995 ;------------------------------------------------------------- 8996 8997 (define-pmacro (movx-sem mode src dst) 8998 (sequence ((SI source) (SI result)) 8999 (set SI result src) 9000 (set-z-and-s result) 9001 (set dst result)) 9002 ) 9003 9004 ; movx #imm,dst 9005 (binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem) 9006 9007 ;------------------------------------------------------------- 9008 ; mul - multiply 9009 ;------------------------------------------------------------- 9010 9011 (define-pmacro (mul-sem mode src1 dst) 9012 (sequence ((mode result)) 9013 (set obit (add-oflag mode src1 dst 0)) 9014 (set result (mul mode src1 dst)) 9015 (set dst result)) 9016 ) 9017 9018 ; mul.BW #imm,dst 9019 (binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem) 9020 ; mul.BW src,dst 9021 (binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem) 9022 9023 (dni mul_l "mul.l src,r2r0" ((machine 32)) 9024 ("mul.l ${dst32-24-Prefixed-SI},r2r0") 9025 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x1) (f-20-4 #xf) 9026 dst32-24-Prefixed-SI) 9027 () ()) 9028 9029 (dni mulu_l "mulu.l src,r2r0" ((machine 32)) 9030 ("mulu.l ${dst32-24-Prefixed-SI},r2r0") 9031 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x0) (f-20-4 #xf) 9032 dst32-24-Prefixed-SI) 9033 () ()) 9034 ;------------------------------------------------------------- 9035 ; mulex - multiple extend sign (m32) 9036 ;------------------------------------------------------------- 9037 9038 ; mulex src,dst 9039 ; (dni mulex-absolute-indirect "mulex [src]" ((machine 32)) 9040 ; ("mulex ${dst32-24-absolute-indirect-HI}") 9041 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE)) 9042 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI))) 9043 ; ()) 9044 (dni mulex "mulex src" ((machine 32)) 9045 ("mulex ${dst32-16-Unprefixed-Mulex-HI}") 9046 (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE)) 9047 (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI))) 9048 ()) 9049 ; (dni mulex-indirect "mulex [src]" ((machine 32)) 9050 ; ("mulex ${dst32-24-indirect-HI}") 9051 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE)) 9052 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI))) 9053 ; ()) 9054 9055 ;------------------------------------------------------------- 9056 ; mulu - multiply unsigned 9057 ;------------------------------------------------------------- 9058 9059 (define-pmacro (mulu-sem mode src1 dst) 9060 (sequence ((mode result)) 9061 (set obit (add-oflag mode src1 dst 0)) 9062 (set result (mul mode src1 dst)) 9063 (set dst result)) 9064 ) 9065 9066 ; mulu.BW #imm,dst 9067 (binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem) 9068 ; mulu.BW src,dst 9069 (binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem) 9070 9071 ;------------------------------------------------------------- 9072 ; neg - twos complement 9073 ;------------------------------------------------------------- 9074 9075 (define-pmacro (neg-sem mode dst) 9076 (sequence ((mode result)) 9077 (set result (neg mode dst)) 9078 (set-z-and-s result) 9079 (set dst result)) 9080 ) 9081 9082 ; neg.BW:G 9083 (unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem) 9084 9085 ;------------------------------------------------------------- 9086 ; not - twos complement 9087 ;------------------------------------------------------------- 9088 9089 (define-pmacro (not-sem mode dst) 9090 (sequence ((mode result)) 9091 (set result (not mode dst)) 9092 (set-z-and-s result) 9093 (set dst result)) 9094 ) 9095 9096 ; not.BW:G 9097 (unary-insn-g not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem) 9098 9099 (dni not16.b.s 9100 "not.b:s Dst16-3-S-8" 9101 ((machine 16)) 9102 "not.b:s ${Dst16-3-S-8}" 9103 (+ (f-0-4 #xb) (f-4-1 #x1) Dst16-3-S-8) 9104 (not-sem QI Dst16-3-S-8) 9105 ()) 9106 9107 ;------------------------------------------------------------- 9108 ; nop 9109 ;------------------------------------------------------------- 9110 9111 (dni nop16 9112 "nop" 9113 ((machine 16)) 9114 "nop" 9115 (+ (f-0-4 #x0) (f-4-4 #x4)) 9116 (nop) 9117 ()) 9118 9119 (dni nop32 9120 "nop" 9121 ((machine 32)) 9122 "nop" 9123 (+ (f-0-4 #xD) (f-4-4 #xE)) 9124 (nop) 9125 ()) 9126 9127 ;------------------------------------------------------------- 9128 ; or - logical or 9129 ;------------------------------------------------------------- 9130 9131 (define-pmacro (or-sem mode src1 dst) 9132 (sequence ((mode result)) 9133 (set result (or mode src1 dst)) 9134 (set-z-and-s result) 9135 (set dst result)) 9136 ) 9137 9138 ; or.BW #imm,dst (m16 #1 m32 #1) 9139 (binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem) 9140 ; or.b:S #imm8,dst3 (m16 #2 m32 #2) 9141 (binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem) 9142 (binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem) 9143 (binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem) 9144 ; or.BW src,dst (m16 #3 m32 #3) 9145 (binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem) 9146 ; or.b:S src,r0[lh] (m16) 9147 (binary-arith16-b-S-src2 or (f-0-4 1) (f-4-1 1) or-sem) 9148 9149 ;------------------------------------------------------------- 9150 ; pop - restore register/memory 9151 ;------------------------------------------------------------- 9152 9153 ; TODO future: split this into .b and .w semantics 9154 (define-pmacro (pop-sem-mach mach mode dst) 9155 (sequence ((mode b_or_w) (SI length)) 9156 (set b_or_w -1) 9157 (set b_or_w (srl b_or_w #x8)) 9158 (if (eq b_or_w #x0) 9159 (set length 1) ; .b 9160 (set length 2)) ; .w 9161 9162 (case DFLT length 9163 ((1) (set dst (mem-mach mach QI (reg h-sp)))) 9164 ((2) (set dst (mem-mach mach HI (reg h-sp))))) 9165 (set (reg h-sp) (add (reg h-sp) length)) 9166 ) 9167 ) 9168 9169 (define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest)) 9170 (define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest)) 9171 9172 ; pop.BW:G (m16 #1) 9173 (unary-insn-mach-g 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16 $G) 9174 ; pop.BW:G (m32 #1) 9175 (unary-insn-mach 32 pop #xB #x2 #xF pop-sem32) 9176 9177 ; pop.b:S r0l/r0h 9178 (dni pop16.b-s-rn "pop.b:S r0[lh]" ((machine 16)) 9179 "pop.b$S ${Rn16-push-S-anyof}" 9180 (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2)) 9181 (pop-sem16 QI Rn16-push-S-anyof) 9182 ()) 9183 ; pop.w:S a0/a1 9184 (dni pop16.b-s-an "pop.w:S a[01]" ((machine 16)) 9185 "pop.w$S ${An16-push-S-anyof}" 9186 (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2)) 9187 (pop-sem16 HI An16-push-S-anyof) 9188 ()) 9189 9190 ;------------------------------------------------------------- 9191 ; popc - pop control register 9192 ; pushc - push control register 9193 ;------------------------------------------------------------- 9194 9195 (define-pmacro (popc32-cr1-sem mode dst) 9196 (sequence () 9197 (case DFLT dst 9198 ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp)))) 9199 ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp)))) 9200 ((#x2) (sequence ((HI tflag)) 9201 (set tflag (mem32 mode (reg h-sp))) 9202 (if (and tflag #x1) (set cbit 1)) 9203 (if (and tflag #x2) (set dbit 1)) 9204 (if (and tflag #x4) (set zbit 1)) 9205 (if (and tflag #x8) (set sbit 1)) 9206 (if (and tflag #x10) (set bbit 1)) 9207 (if (and tflag #x20) (set obit 1)) 9208 (if (and tflag #x40) (set ibit 1)) 9209 (if (and tflag #x80) (set ubit 1)))) 9210 ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp)))) 9211 ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp)))) 9212 ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp)))) 9213 ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp)))) 9214 ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp)))) 9215 ) 9216 (set (reg h-sp) (add (reg h-sp) 2)) 9217 ) 9218 ) 9219 (define-pmacro (popc32-cr2-sem mode dst) 9220 (sequence () 9221 (case DFLT dst 9222 ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp)))) 9223 ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp)))) 9224 ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp)))) 9225 ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp)))) 9226 ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp)))) 9227 ) 9228 (set (reg h-sp) (add (reg h-sp) 4)) 9229 ) 9230 ) 9231 (define-pmacro (popc16-sem mode dst) 9232 (sequence () 9233 (case DFLT dst 9234 ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000) 9235 (mem16 mode (reg h-sp))))) 9236 ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000) 9237 (mem16 mode (reg h-sp))))) 9238 ((#x3) (sequence ((HI tflag)) 9239 (set tflag (mem16 mode (reg h-sp))) 9240 (if (and tflag #x1) (set cbit 1)) 9241 (if (and tflag #x2) (set dbit 1)) 9242 (if (and tflag #x4) (set zbit 1)) 9243 (if (and tflag #x8) (set sbit 1)) 9244 (if (and tflag #x10) (set bbit 1)) 9245 (if (and tflag #x20) (set obit 1)) 9246 (if (and tflag #x40) (set ibit 1)) 9247 (if (and tflag #x80) (set ubit 1)))) 9248 ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp)))) 9249 ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp)))) 9250 ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp)))) 9251 ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp)))) 9252 ) 9253 (set (reg h-sp) (add (reg h-sp) 2)) 9254 ) 9255 ) 9256 ; popc dest (m16c #1) 9257 (dni popc16.imm16 "popc dst" ((machine 16)) 9258 ("popc ${cr16}") 9259 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16) 9260 (popc16-sem HI cr16) 9261 ()) 9262 ; popc dest (m32c #1) 9263 (dni popc32.imm16-cr1 "popc dst" ((machine 32)) 9264 ("popc ${cr1-Unprefixed-32}") 9265 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32) 9266 (popc32-cr1-sem HI cr1-Unprefixed-32) 9267 ()) 9268 ; popc dest (m32c #2) 9269 (dni popc32.imm16-cr2 "popc dst" ((machine 32)) 9270 ("popc ${cr2-32}") 9271 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32) 9272 (popc32-cr2-sem SI cr2-32) 9273 ()) 9274 9275 (define-pmacro (pushc32-cr1-sem mode dst) 9276 (sequence () 9277 (set (reg h-sp) (sub (reg h-sp) 2)) 9278 (case DFLT dst 9279 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0))) 9280 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1))) 9281 ((#x2) (sequence ((HI tflag)) 9282 (set tflag 0) 9283 (if (eq cbit 1) (set tflag (or tflag #x1))) 9284 (if (eq dbit 1) (set tflag (or tflag #x2))) 9285 (if (eq zbit 1) (set tflag (or tflag #x4))) 9286 (if (eq sbit 1) (set tflag (or tflag #x8))) 9287 (if (eq bbit 1) (set tflag (or tflag #x10))) 9288 (if (eq obit 1) (set tflag (or tflag #x20))) 9289 (if (eq ibit 1) (set tflag (or tflag #x40))) 9290 (if (eq ubit 1) (set tflag (or tflag #x80))) 9291 (set (mem32 mode (reg h-sp)) tflag))) 9292 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf))) 9293 ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0))) 9294 ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1))) 9295 ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0))) 9296 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1))) 9297 ) 9298 ) 9299 ) 9300 (define-pmacro (pushc32-cr2-sem mode dst) 9301 (sequence () 9302 (set (reg h-sp) (sub (reg h-sp) 4)) 9303 (case DFLT dst 9304 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb))) 9305 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp))) 9306 ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb))) 9307 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb))) 9308 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp))) 9309 ) 9310 ) 9311 ) 9312 (define-pmacro (pushc16-sem mode dst) 9313 (sequence () 9314 (set (reg h-sp) (sub (reg h-sp) 2)) 9315 (case DFLT dst 9316 ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff))) 9317 ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000))) 9318 ((#x3) (sequence ((HI tflag)) 9319 (if (eq cbit 1) (set tflag (or tflag #x1))) 9320 (if (eq dbit 1) (set tflag (or tflag #x2))) 9321 (if (eq zbit 1) (set tflag (or tflag #x4))) 9322 (if (eq sbit 1) (set tflag (or tflag #x8))) 9323 (if (eq bbit 1) (set tflag (or tflag #x10))) 9324 (if (eq obit 1) (set tflag (or tflag #x20))) 9325 (if (eq ibit 1) (set tflag (or tflag #x40))) 9326 (if (eq ubit 1) (set tflag (or tflag #x80))) 9327 (set (mem16 mode (reg h-sp)) tflag))) 9328 9329 ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp))) 9330 ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp))) 9331 ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb))) 9332 ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb))) 9333 ) 9334 ) 9335 ) 9336 ; pushc src (m16c) 9337 (dni pushc16.imm16 "pushc dst" ((machine 16)) 9338 ("pushc ${cr16}") 9339 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16) 9340 (pushc16-sem HI cr16) 9341 ()) 9342 ; pushc src (m32c #1) 9343 (dni pushc32.imm16-cr1 "pushc dst" ((machine 32)) 9344 ("pushc ${cr1-Unprefixed-32}") 9345 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32) 9346 (pushc32-cr1-sem HI cr1-Unprefixed-32) 9347 ()) 9348 ; pushc src (m32c #2) 9349 (dni pushc32.imm16-cr2 "pushc dst" ((machine 32)) 9350 ("pushc ${cr2-32}") 9351 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32) 9352 (pushc32-cr2-sem SI cr2-32) 9353 ()) 9354 9355 ;------------------------------------------------------------- 9356 ; popm - pop multiple 9357 ; pushm - push multiple 9358 ;------------------------------------------------------------- 9359 9360 (define-pmacro (popm-sem machine dst) 9361 (sequence ((SI addrlen)) 9362 (if (eq machine 16) 9363 (set addrlen 2) 9364 (set addrlen 4)) 9365 (if (and dst 1) 9366 (sequence () (set R0 (mem-mach machine HI (reg h-sp))) 9367 (set (reg h-sp) (add (reg h-sp) 2)))) 9368 (if (and dst 2) 9369 (sequence () (set R1 (mem-mach machine HI (reg h-sp))) 9370 (set (reg h-sp) (add (reg h-sp) 2)))) 9371 (if (and dst 4) 9372 (sequence () (set R2 (mem-mach machine HI (reg h-sp))) 9373 (set (reg h-sp) (add (reg h-sp) 2)))) 9374 (if (and dst 8) 9375 (sequence () (set R3 (mem-mach machine HI (reg h-sp))) 9376 (set (reg h-sp) (add (reg h-sp) 2)))) 9377 (if (and dst 16) 9378 (sequence () (set A0 (mem-mach machine HI (reg h-sp))) 9379 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9380 (if (and dst 32) 9381 (sequence () (set A1 (mem-mach machine HI (reg h-sp))) 9382 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9383 (if (and dst 64) 9384 (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp))) 9385 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9386 (if (eq dst 128) 9387 (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp))) 9388 (set (reg h-sp) (add (reg h-sp) addrlen)))) 9389 ) 9390 ) 9391 9392 (define-pmacro (pushm-sem machine dst) 9393 (sequence ((SI count) (SI addrlen)) 9394 (if (eq machine 16) 9395 (set addrlen 2) 9396 (set addrlen 4)) 9397 (if (eq dst 1) 9398 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9399 (set (mem-mach machine HI (reg h-sp)) (reg h-fb)))) 9400 (if (and dst 2) 9401 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9402 (set (mem-mach machine HI (reg h-sp)) (reg h-sb)))) 9403 (if (and dst 4) 9404 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9405 (set (mem-mach machine HI (reg h-sp)) A1))) 9406 (if (and dst 8) 9407 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen)) 9408 (set (mem-mach machine HI (reg h-sp)) A0))) 9409 (if (and dst 16) 9410 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9411 (set (mem-mach machine HI (reg h-sp)) R3))) 9412 (if (and dst 32) 9413 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9414 (set (mem-mach machine HI (reg h-sp)) R2))) 9415 (if (and dst 64) 9416 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9417 (set (mem-mach machine HI (reg h-sp)) R1))) 9418 (if (and dst 128) 9419 (sequence () (set (reg h-sp) (sub (reg h-sp) 2)) 9420 (set (mem-mach machine HI (reg h-sp)) R0))) 9421 ) 9422 ) 9423 9424 (dni popm16 "popm regs" ((machine 16)) 9425 ("popm ${Regsetpop}") 9426 (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop) 9427 (popm-sem 16 Regsetpop) 9428 ()) 9429 (dni pushm16 "pushm regs" ((machine 16)) 9430 ("pushm ${Regsetpush}") 9431 (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush) 9432 (pushm-sem 16 Regsetpush) 9433 ()) 9434 (dni popm "popm regs" ((machine 32)) 9435 ("popm ${Regsetpop}") 9436 (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop) 9437 (popm-sem 32 Regsetpop) 9438 ()) 9439 (dni pushm "pushm regs" ((machine 32)) 9440 ("pushm ${Regsetpush}") 9441 (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush) 9442 (pushm-sem 32 Regsetpush) 9443 ()) 9444 9445 ;------------------------------------------------------------- 9446 ; push - Save register/memory/immediate data 9447 ;------------------------------------------------------------- 9448 9449 ; TODO future: split this into .b and .w semantics 9450 (define-pmacro (push-sem-mach mach mode dst) 9451 (sequence ((mode b_or_w) (SI length)) 9452 (set b_or_w -1) 9453 (set b_or_w (srl b_or_w #x8)) 9454 (if (eq b_or_w #x0) 9455 (set length 1) ; .b 9456 (if (eq b_or_w #xff) 9457 (set length 2) ; .w 9458 (set length 4))) ; .l 9459 (set (reg h-sp) (sub (reg h-sp) length)) 9460 (case DFLT length 9461 ((1) (set (mem-mach mach QI (reg h-sp)) dst)) 9462 ((2) (set (mem-mach mach HI (reg h-sp)) dst)) 9463 ((4) (set (mem-mach mach SI (reg h-sp)) dst))) 9464 ) 9465 ) 9466 9467 (define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst)) 9468 (define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst)) 9469 9470 ; push.BW:G imm (m16 #1 m32 #1) 9471 (dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16)) 9472 ("push.b$G #${Imm-16-QI}") 9473 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI) 9474 (push-sem16 QI Imm-16-QI) 9475 ()) 9476 9477 (dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16)) 9478 ("push.w$G #${Imm-16-HI}") 9479 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI) 9480 (push-sem16 HI Imm-16-HI) 9481 ()) 9482 9483 (dni push32.b.imm "push.b #Imm-8-QI" ((machine 32)) 9484 ("push.b #${Imm-8-QI}") 9485 (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI) 9486 (push-sem32 QI Imm-8-QI) 9487 ()) 9488 9489 (dni push32.w.imm "push.w #Imm-8-HI" ((machine 32)) 9490 ("push.w #${Imm-8-HI}") 9491 (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI) 9492 (push-sem32 HI Imm-8-HI) 9493 ()) 9494 9495 ; push.BW:G src (m16 #2) 9496 (unary-insn-mach-g 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16 $G) 9497 ; push.BW:G src (m32 #2) 9498 (unary-insn-mach 32 push #xC #x0 #xE push-sem32) 9499 9500 9501 ; push.b:S r0l/r0h (m16 #3) 9502 (dni push16.b-s-rn "push.b:S r0[lh]" ((machine 16)) 9503 "push.b$S ${Rn16-push-S-anyof}" 9504 (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2)) 9505 (push-sem16 QI Rn16-push-S-anyof) 9506 ()) 9507 ; push.w:S a0/a1 (m16 #4) 9508 (dni push16.b-s-an "push.w:S a[01]" ((machine 16)) 9509 "push.w$S ${An16-push-S-anyof}" 9510 (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2)) 9511 (push-sem16 HI An16-push-S-anyof) 9512 ()) 9513 9514 ; push.l imm32 (m32 #3) 9515 (dni push32.l.imm "push.l #Imm-16-SI" ((machine 32)) 9516 ("push.l #${Imm-16-SI}") 9517 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI) 9518 (push-sem32 SI Imm-16-SI) 9519 ()) 9520 ; push.l src (m32 #4) 9521 (unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32) 9522 9523 ;------------------------------------------------------------- 9524 ; pusha - push effective address 9525 ;------------------------------------------------------------ 9526 9527 (define-pmacro (push16a-sem mode dst) 9528 (sequence () 9529 (set (reg h-sp) (sub (reg h-sp) 2)) 9530 (set (mem16 HI (reg h-sp)) dst)) 9531 ) 9532 (define-pmacro (push32a-sem mode dst) 9533 (sequence () 9534 (set (reg h-sp) (sub (reg h-sp) 4)) 9535 (set (mem32 SI (reg h-sp)) dst)) 9536 ) 9537 (unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem) 9538 (unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem) 9539 9540 ;------------------------------------------------------------- 9541 ; reit - return from interrupt 9542 ;------------------------------------------------------------- 9543 9544 ; ??? semantics 9545 (dni reit16 "REIT" ((machine 16)) 9546 ("reit") 9547 (+ (f-0-4 #xF) (f-4-4 #xB)) 9548 (nop) 9549 ()) 9550 (dni reit32 "REIT" ((machine 32)) 9551 ("reit") 9552 (+ (f-0-4 9) (f-4-4 #xE)) 9553 (nop) 9554 ()) 9555 9556 ;------------------------------------------------------------- 9557 ; rmpa - repeat multiple and addition 9558 ;------------------------------------------------------------- 9559 9560 ; TODO semantics 9561 (dni rmpa16.b "rmpa.size" ((machine 16)) 9562 ("rmpa.b") 9563 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1)) 9564 (nop) 9565 ()) 9566 (dni rmpa16.w "rmpa.size" ((machine 16)) 9567 ("rmpa.w") 9568 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1)) 9569 (nop) 9570 ()) 9571 (dni rmpa32.b "rmpa.size" ((machine 32)) 9572 ("rmpa.b") 9573 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3)) 9574 (nop) 9575 ()) 9576 9577 (dni rmpa32.w "rmpa.size" ((machine 32)) 9578 ("rmpa.w") 9579 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3)) 9580 (nop) 9581 ()) 9582 9583 ;------------------------------------------------------------- 9584 ; rolc - rotate left with carry 9585 ;------------------------------------------------------------- 9586 9587 ; TODO check semantics 9588 ; TODO future: split this into .b and .w semantics 9589 (define-pmacro (rolc-sem mode dst) 9590 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask)) 9591 (set b_or_w -1) 9592 (set b_or_w (srl b_or_w #x8)) 9593 (if (eq b_or_w #x0) 9594 (set mask #x8000) ; .b 9595 (set mask #x80000000)) ; .w 9596 (set ocbit cbit) 9597 (set cbit (and dst mask)) 9598 (set result (sll mode dst 1)) 9599 (set result (or result ocbit)) 9600 (set-z-and-s result) 9601 (set dst result)) 9602 ) 9603 ; rolc.BW src,dst 9604 (unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem) 9605 9606 ;------------------------------------------------------------- 9607 ; rorc - rotate right with carry 9608 ;------------------------------------------------------------- 9609 9610 ; TODO check semantics 9611 ; TODO future: split this into .b and .w semantics 9612 (define-pmacro (rorc-sem mode dst) 9613 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt)) 9614 (set b_or_w -1) 9615 (set b_or_w (srl b_or_w #x8)) 9616 (if (eq b_or_w #x0) 9617 (sequence () (set mask #x7fff) (set shamt 15)) ; .b 9618 (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w 9619 (set ocbit cbit) 9620 (set cbit (and dst #x1)) 9621 (set result (srl mode dst (const 1))) 9622 (set result (or (and result mask) (sll ocbit shamt))) 9623 (set-z-and-s result) 9624 (set dst result)) 9625 ) 9626 ; rorc.BW src,dst 9627 (unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem) 9628 9629 ;------------------------------------------------------------- 9630 ; rot - rotate 9631 ;------------------------------------------------------------- 9632 9633 ; TODO future: split this into .b and .w semantics 9634 (define-pmacro (rot-1-sem mode src1 dst) 9635 (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift)) 9636 (case DFLT src1 9637 ((#x0) (set shift 1)) 9638 ((#x1) (set shift 2)) 9639 ((#x2) (set shift 3)) 9640 ((#x3) (set shift 4)) 9641 ((#x4) (set shift 5)) 9642 ((#x5) (set shift 6)) 9643 ((#x6) (set shift 7)) 9644 ((#x7) (set shift 8)) 9645 ((-8) (set shift -1)) 9646 ((-7) (set shift -2)) 9647 ((-6) (set shift -3)) 9648 ((-5) (set shift -4)) 9649 ((-4) (set shift -5)) 9650 ((-3) (set shift -6)) 9651 ((-2) (set shift -7)) 9652 ((-1) (set shift -8)) 9653 (else (set shift 0)) 9654 ) 9655 (set b_or_w -1) 9656 (set b_or_w (srl b_or_w #x8)) 9657 (if (eq b_or_w #x0) 9658 (set mask #x7fff) ; .b 9659 (set mask #x7fffffff)) ; .w 9660 (set tmp dst) 9661 (if (gt mode shift 0) 9662 (sequence () 9663 (set tmp (rol mode tmp shift)) 9664 (set cbit (and tmp #x1))) 9665 (sequence () 9666 (set tmp (ror mode tmp (mul shift -1))) 9667 (set cbit (and tmp mask)))) 9668 (set-z-and-s tmp) 9669 (set dst tmp)) 9670 ) 9671 (define-pmacro (rot-2-sem mode dst) 9672 (sequence ((mode tmp) (mode b_or_w) (USI mask)) 9673 (set b_or_w -1) 9674 (set b_or_w (srl b_or_w #x8)) 9675 (if (eq b_or_w #x0) 9676 (set mask #x7fff) ; .b 9677 (set mask #x7fffffff)) ; .w 9678 (set tmp dst) 9679 (if (gt mode (reg h-r1h) 0) 9680 (sequence () 9681 (set tmp (rol mode tmp (reg h-r1h))) 9682 (set cbit (and tmp #x1))) 9683 (sequence () 9684 (set tmp (ror mode tmp (reg h-r1h))) 9685 (set cbit (and tmp mask)))) 9686 (set-z-and-s tmp) 9687 (set dst tmp)) 9688 ) 9689 9690 ; rot.BW #imm4,dst 9691 (binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem) 9692 (binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem) 9693 (binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem) 9694 (binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem) 9695 ; rot.BW src,dst 9696 9697 (dni rot16.b-dst "rot r1h,dest" ((machine 16)) 9698 ("rot.b r1h,${dst16-16-QI}") 9699 (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI) 9700 (rot-2-sem QI dst16-16-QI) 9701 ()) 9702 (dni rot16.w-dst "rot r1h,dest" ((machine 16)) 9703 ("rot.w r1h,${dst16-16-HI}") 9704 (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI) 9705 (rot-2-sem HI dst16-16-HI) 9706 ()) 9707 9708 (dni rot32.b-dst "rot r1h,dest" ((machine 32)) 9709 ("rot.b r1h,${dst32-16-Unprefixed-QI}") 9710 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF)) 9711 (rot-2-sem QI dst32-16-Unprefixed-QI) 9712 ()) 9713 (dni rot32.w-dst "rot r1h,dest" ((machine 32)) 9714 ("rot.w r1h,${dst32-16-Unprefixed-HI}") 9715 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF)) 9716 (rot-2-sem HI dst32-16-Unprefixed-HI) 9717 ()) 9718 9719 ;------------------------------------------------------------- 9720 ; rts - return from subroutine 9721 ;------------------------------------------------------------- 9722 9723 (define-pmacro (rts16-sem) 9724 (sequence ((SI tpc)) 9725 (set tpc (mem16 HI (reg h-sp))) 9726 (set (reg h-sp) (add (reg h-sp) 2)) 9727 (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16))) 9728 (set (reg h-sp) (add (reg h-sp) 1)) 9729 (set pc tpc) 9730 ) 9731 ) 9732 (define-pmacro (rts32-sem) 9733 (sequence ((SI tpc)) 9734 (set tpc (mem32 HI (reg h-sp))) 9735 (set (reg h-sp) (add (reg h-sp) 2)) 9736 (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16))) 9737 (set (reg h-sp) (add (reg h-sp) 2)) 9738 (set pc tpc) 9739 ) 9740 ) 9741 9742 (dni rts16 "rts" ((machine 16)) 9743 ("rts") 9744 (+ (f-0-4 #xF) (f-4-4 3)) 9745 (rts16-sem) 9746 ()) 9747 9748 (dni rts32 "rts" ((machine 32)) 9749 ("rts") 9750 (+ (f-0-4 #xD) (f-4-4 #xF)) 9751 (rts32-sem) 9752 ()) 9753 9754 ;------------------------------------------------------------- 9755 ; sbb - subtract with borrow 9756 ;------------------------------------------------------------- 9757 9758 (define-pmacro (sbb-sem mode src dst) 9759 (sequence ((mode result)) 9760 (set result (subc mode dst src cbit)) 9761 (set obit (add-oflag mode dst src cbit)) 9762 (set cbit (add-oflag mode dst src cbit)) 9763 (set-z-and-s result) 9764 (set dst result)) 9765 ) 9766 9767 ; sbb.size:G #imm,dst 9768 (binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem) 9769 (binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem) 9770 (binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem) 9771 (binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem) 9772 9773 ; sbb.BW:G src,dst 9774 (binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem) 9775 (binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem) 9776 (binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem) 9777 (binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem) 9778 9779 ;------------------------------------------------------------- 9780 ; sbjnz - subtract then jump on not zero 9781 ;------------------------------------------------------------- 9782 9783 (define-pmacro (sub-jnz-sem mode src dst label) 9784 (sequence ((mode result)) 9785 (set result (sub mode dst src)) 9786 (set dst result) 9787 (if (ne result 0) 9788 (set pc label))) 9789 ) 9790 9791 ; sbjnz.size #imm4,dst,label 9792 (arith-jnz-imm4-dst sbjnz s4n (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem) 9793 9794 ;------------------------------------------------------------- 9795 ; sccnd - store condition on condition (m32) 9796 ;------------------------------------------------------------- 9797 9798 (define-pmacro (sccnd-sem cnd dst) 9799 (sequence () 9800 (set dst 0) 9801 (case DFLT cnd 9802 ((#x00) (if (not cbit) (set dst 1))) ;ltu nc 9803 ((#x01) (if (or cbit zbit) (set dst 1))) ;leu 9804 ((#x02) (if (not zbit) (set dst 1))) ;ne nz 9805 ((#x03) (if (not sbit) (set dst 1))) ;pz 9806 ((#x04) (if (not obit) (set dst 1))) ;no 9807 ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt 9808 ((#x06) (if (xor sbit obit) (set dst 1))) ;ge 9809 ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c 9810 ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu 9811 ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z 9812 ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n 9813 ((#x0c) (if (trunc BI obit) (set dst 1))) ;o 9814 ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le 9815 ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt 9816 ) 9817 ) 9818 ) 9819 9820 ; scCND dst 9821 (dni sccnd 9822 "sccnd dst" 9823 ((machine 32)) 9824 "sc$sccond32 ${dst32-16-Unprefixed-HI}" 9825 (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32) 9826 (sccnd-sem sccond32 dst32-16-Unprefixed-HI) 9827 ()) 9828 9829 ;------------------------------------------------------------- 9830 ; scmpu - string compare unequal (m32) 9831 ;------------------------------------------------------------- 9832 9833 ; TODO semantics 9834 (dni scmpu.b "scmpu.b" ((machine 32)) 9835 ("scmpu.b") 9836 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3)) 9837 (c-call VOID "scmpu_QI_semantics") 9838 ()) 9839 9840 (dni scmpu.w "scmpu.w" ((machine 32)) 9841 ("scmpu.w") 9842 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3)) 9843 (c-call VOID "scmpu_HI_semantics") 9844 ()) 9845 9846 ;------------------------------------------------------------- 9847 ; sha - shift arithmetic 9848 ;------------------------------------------------------------- 9849 9850 ; TODO future: split this into .b and .w semantics 9851 (define-pmacro (sha-sem mode src1 dst) 9852 (sequence ((mode result)(mode shift)(mode shmode)) 9853 (case DFLT src1 9854 ((#x0) (set shift 1)) 9855 ((#x1) (set shift 2)) 9856 ((#x2) (set shift 3)) 9857 ((#x3) (set shift 4)) 9858 ((#x4) (set shift 5)) 9859 ((#x5) (set shift 6)) 9860 ((#x6) (set shift 7)) 9861 ((#x7) (set shift 8)) 9862 ((-8) (set shift -1)) 9863 ((-7) (set shift -2)) 9864 ((-6) (set shift -3)) 9865 ((-5) (set shift -4)) 9866 ((-4) (set shift -5)) 9867 ((-3) (set shift -6)) 9868 ((-2) (set shift -7)) 9869 ((-1) (set shift -8)) 9870 (else (set shift 0)) 9871 ) 9872 (set shmode -1) 9873 (set shmode (srl shmode #x8)) 9874 (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1)))) 9875 (if (gt mode shift 0) (set result (sll mode dst shift))) 9876 (if (eq shmode #x0) ; QI 9877 (sequence 9878 ((mode cbitamt)) 9879 (if (lt mode shift #x0) 9880 (set cbitamt (sub #x8 shift)) ; sra 9881 (set cbitamt (sub shift 1))) ; sll 9882 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 9883 (set obit (ne (and dst #x80) (and result #x80))) 9884 )) 9885 (if (eq shmode #xff) ; HI 9886 (sequence 9887 ((mode cbitamt)) 9888 (if (lt mode shift #x0) 9889 (set cbitamt (sub 16 shift)) ; sra 9890 (set cbitamt (sub shift 1))) ; sll 9891 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 9892 (set obit (ne (and dst #x8000) (and result #x8000))) 9893 )) 9894 (set-z-and-s result) 9895 (set dst result)) 9896 ) 9897 (define-pmacro (shar1h-sem mode dst) 9898 (sequence ((mode result)(mode shmode)) 9899 (set shmode -1) 9900 (set shmode (srl shmode #x8)) 9901 (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h)))) 9902 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h)))) 9903 (if (eq shmode #x0) ; QI 9904 (sequence 9905 ((mode cbitamt)) 9906 (if (lt mode (reg h-r1h) #x0) 9907 (set cbitamt (sub #x8 (reg h-r1h))) ; sra 9908 (set cbitamt (sub (reg h-r1h) 1))) ; sll 9909 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 9910 (set obit (ne (and dst #x80) (and result #x80))) 9911 )) 9912 (if (eq shmode #xff) ; HI 9913 (sequence 9914 ((mode cbitamt)) 9915 (if (lt mode (reg h-r1h) #x0) 9916 (set cbitamt (sub 16 (reg h-r1h))) ; sra 9917 (set cbitamt (sub (reg h-r1h) 1))) ; sll 9918 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 9919 (set obit (ne (and dst #x8000) (and result #x8000))) 9920 )) 9921 (set-z-and-s result) 9922 (set dst result)) 9923 ) 9924 ; sha.BW #imm4,dst (m16 #1 m32 #1) 9925 (binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem) 9926 (binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem) 9927 (binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem) 9928 (binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem) 9929 ; sha.BW r1h,dst (m16 #2 m32 #3) 9930 (dni sha16.b-dst "sha.b r1h,dest" ((machine 16)) 9931 ("sha.b r1h,${dst16-16-QI}") 9932 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI) 9933 (shar1h-sem HI dst16-16-QI) 9934 ()) 9935 (dni sha16.w-dst "sha.w r1h,dest" ((machine 16)) 9936 ("sha.w r1h,${dst16-16-HI}") 9937 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI) 9938 (shar1h-sem HI dst16-16-HI) 9939 ()) 9940 (dni sha32.b-dst "sha.b r1h,dest" ((machine 32)) 9941 ("sha.b r1h,${dst32-16-Unprefixed-QI}") 9942 (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE)) 9943 (shar1h-sem QI dst32-16-Unprefixed-QI) 9944 ()) 9945 (dni sha32.w-dst "sha.w r1h,dest" ((machine 32)) 9946 ("sha.w r1h,${dst32-16-Unprefixed-HI}") 9947 (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE)) 9948 (shar1h-sem HI dst32-16-Unprefixed-HI) 9949 ()) 9950 ; sha.L #imm,dst (m16 #3) 9951 (dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16)) 9952 "sha.l #${Imm-sh-12-s4},r2r0" 9953 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4) 9954 (sha-sem SI Imm-sh-12-s4 (reg h-r2r0)) 9955 ()) 9956 (dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16)) 9957 "sha.l #${Imm-sh-12-s4},r3r1" 9958 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4) 9959 (sha-sem SI Imm-sh-12-s4 (reg h-r3r1)) 9960 ()) 9961 ; sha.L r1h,dst (m16 #4) 9962 (dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16)) 9963 "sha.l r1h,r2r0" 9964 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1)) 9965 (sha-sem SI (reg h-r1h) (reg h-r2r0)) 9966 ()) 9967 (dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16)) 9968 "sha.l r1h,r3r1" 9969 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1)) 9970 (sha-sem SI (reg h-r1h) (reg h-r3r1)) 9971 ()) 9972 ; sha.L #imm8,dst (m32 #2) 9973 (binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem) 9974 ; sha.L r1h,dst (m32 #4) 9975 (dni sha32.l-dst "sha.l r1h,dest" ((machine 32)) 9976 ("sha.l r1h,${dst32-16-Unprefixed-SI}") 9977 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1)) 9978 (shar1h-sem QI dst32-16-Unprefixed-SI) 9979 ()) 9980 9981 ;------------------------------------------------------------- 9982 ; shanc - shift arithmetic non carry (m32) 9983 ;------------------------------------------------------------- 9984 9985 ; TODO check semantics 9986 ; shanc.L #imm8,dst 9987 (binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem) 9988 9989 ;------------------------------------------------------------- 9990 ; shl - shift logical 9991 ;------------------------------------------------------------- 9992 9993 ; TODO future: split this into .b and .w semantics 9994 (define-pmacro (shl-sem mode src1 dst) 9995 (sequence ((mode result)(mode shift)(mode shmode)) 9996 (case DFLT src1 9997 ((#x0) (set shift 1)) 9998 ((#x1) (set shift 2)) 9999 ((#x2) (set shift 3)) 10000 ((#x3) (set shift 4)) 10001 ((#x4) (set shift 5)) 10002 ((#x5) (set shift 6)) 10003 ((#x6) (set shift 7)) 10004 ((#x7) (set shift 8)) 10005 ((-8) (set shift -1)) 10006 ((-7) (set shift -2)) 10007 ((-6) (set shift -3)) 10008 ((-5) (set shift -4)) 10009 ((-4) (set shift -5)) 10010 ((-3) (set shift -6)) 10011 ((-2) (set shift -7)) 10012 ((-1) (set shift -8)) 10013 (else (set shift 0)) 10014 ) 10015 (set shmode -1) 10016 (set shmode (srl shmode #x8)) 10017 (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1)))) 10018 (if (gt mode shift 0) (set result (sll mode dst shift))) 10019 (if (eq shmode #x0) ; QI 10020 (sequence 10021 ((mode cbitamt)) 10022 (if (lt mode shift #x0) 10023 (set cbitamt (sub #x8 shift)); srl 10024 (set cbitamt (sub shift 1))) ; sll 10025 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 10026 (set obit (ne (and dst #x80) (and result #x80))) 10027 )) 10028 (if (eq shmode #xff) ; HI 10029 (sequence 10030 ((mode cbitamt)) 10031 (if (lt mode shift #x0) 10032 (set cbitamt (sub 16 shift)) ; srl 10033 (set cbitamt (sub shift 1))) ; sll 10034 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 10035 (set obit (ne (and dst #x8000) (and result #x8000))) 10036 )) 10037 (set-z-and-s result) 10038 (set dst result)) 10039 ) 10040 (define-pmacro (shlr1h-sem mode dst) 10041 (sequence ((mode result)(mode shmode)) 10042 (set shmode -1) 10043 (set shmode (srl shmode #x8)) 10044 (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h)))) 10045 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h)))) 10046 (if (eq shmode #x0) ; QI 10047 (sequence 10048 ((mode cbitamt)) 10049 (if (lt mode (reg h-r1h) #x0) 10050 (set cbitamt (sub #x8 (reg h-r1h))) ; srl 10051 (set cbitamt (sub (reg h-r1h) 1))) ; sll 10052 (set cbit (srl (and (sll dst cbitamt) #x80) #x7)) 10053 (set obit (ne (and dst #x80) (and result #x80))) 10054 )) 10055 (if (eq shmode #xff) ; HI 10056 (sequence 10057 ((mode cbitamt)) 10058 (if (lt mode (reg h-r1h) #x0) 10059 (set cbitamt (sub 16 (reg h-r1h))) ; srl 10060 (set cbitamt (sub (reg h-r1h) 1))) ; sll 10061 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf)) 10062 (set obit (ne (and dst #x8000) (and result #x8000))) 10063 )) 10064 (set-z-and-s result) 10065 (set dst result)) 10066 ) 10067 ; shl.BW #imm4,dst (m16 #1 m32 #1) 10068 (binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem) 10069 (binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem) 10070 (binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem) 10071 (binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem) 10072 ; shl.BW r1h,dst (m16 #2 m32 #3) 10073 (dni shl16.b-dst "shl.b r1h,dest" ((machine 16)) 10074 ("shl.b r1h,${dst16-16-QI}") 10075 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI) 10076 (shlr1h-sem HI dst16-16-QI) 10077 ()) 10078 (dni shl16.w-dst "shl.w r1h,dest" ((machine 16)) 10079 ("shl.w r1h,${dst16-16-HI}") 10080 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI) 10081 (shlr1h-sem HI dst16-16-HI) 10082 ()) 10083 (dni shl32.b-dst "shl.b r1h,dest" ((machine 32)) 10084 ("shl.b r1h,${dst32-16-Unprefixed-QI}") 10085 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE)) 10086 (shlr1h-sem QI dst32-16-Unprefixed-QI) 10087 ()) 10088 (dni shl32.w-dst "shl.w r1h,dest" ((machine 32)) 10089 ("shl.w r1h,${dst32-16-Unprefixed-HI}") 10090 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE)) 10091 (shlr1h-sem HI dst32-16-Unprefixed-HI) 10092 ()) 10093 ; shl.L #imm,dst (m16 #3) 10094 (dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16)) 10095 "shl.l #${Imm-sh-12-s4},r2r0" 10096 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4) 10097 (shl-sem SI Imm-sh-12-s4 (reg h-r2r0)) 10098 ()) 10099 (dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16)) 10100 "shl.l #${Imm-sh-12-s4},r3r1" 10101 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4) 10102 (shl-sem SI Imm-sh-12-s4 (reg h-r3r1)) 10103 ()) 10104 ; shl.L r1h,dst (m16 #4) 10105 (dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16)) 10106 "shl.l r1h,r2r0" 10107 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1)) 10108 (shl-sem SI (reg h-r1h) (reg h-r2r0)) 10109 ()) 10110 (dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16)) 10111 "shl.l r1h,r3r1" 10112 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1)) 10113 (shl-sem SI (reg h-r1h) (reg h-r3r1)) 10114 ()) 10115 ; shl.L #imm8,dst (m32 #2) 10116 (binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem) 10117 ; shl.L r1h,dst (m32 #4) 10118 (dni shl32.l-dst "shl.l r1h,dest" ((machine 32)) 10119 ("shl.l r1h,${dst32-16-Unprefixed-SI}") 10120 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1)) 10121 (shlr1h-sem QI dst32-16-Unprefixed-SI) 10122 ()) 10123 10124 ;------------------------------------------------------------- 10125 ; shlnc - shift logical non carry 10126 ;------------------------------------------------------------- 10127 10128 ; TODO check semantics 10129 ; shlnc.L #imm8,dst 10130 (binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem) 10131 10132 ;------------------------------------------------------------- 10133 ; sin - string input (m32) 10134 ;------------------------------------------------------------- 10135 10136 ; TODO semantics 10137 (dni sin32.b "sin" ((machine 32)) 10138 ("sin.b") 10139 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3)) 10140 (c-call VOID "sin_QI_semantics") 10141 ()) 10142 10143 (dni sin32.w "sin" ((machine 32)) 10144 ("sin.w") 10145 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3)) 10146 (c-call VOID "sin_HI_semantics") 10147 ()) 10148 10149 ;------------------------------------------------------------- 10150 ; smovb - string move backward 10151 ;------------------------------------------------------------- 10152 10153 ; TODO semantics 10154 (dni smovb16.b "smovb.b" ((machine 16)) 10155 ("smovb.b") 10156 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9)) 10157 (c-call VOID "smovb_QI_semantics") 10158 ()) 10159 10160 (dni smovb16.w "smovb.w" ((machine 16)) 10161 ("smovb.w") 10162 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9)) 10163 (c-call VOID "smovb_HI_semantics") 10164 ()) 10165 10166 (dni smovb32.b "smovb.b" ((machine 32)) 10167 ("smovb.b") 10168 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3)) 10169 (c-call VOID "smovb_QI_semantics") 10170 ()) 10171 10172 (dni smovb32.w "smovb.w" ((machine 32)) 10173 ("smovb.w") 10174 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3)) 10175 (c-call VOID "smovb_HI_semantics") 10176 ()) 10177 10178 ;------------------------------------------------------------- 10179 ; smovf - string move forward (m32) 10180 ;------------------------------------------------------------- 10181 10182 ; TODO semantics 10183 (dni smovf16.b "smovf.b" ((machine 16)) 10184 ("smovf.b") 10185 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8)) 10186 (c-call VOID "smovf_QI_semantics") 10187 ()) 10188 10189 (dni smovf16.w "smovf.w" ((machine 16)) 10190 ("smovf.w") 10191 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8)) 10192 (c-call VOID "smovf_HI_semantics") 10193 ()) 10194 10195 (dni smovf32.b "smovf.b" ((machine 32)) 10196 ("smovf.b") 10197 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8) (f-12-4 3)) 10198 (c-call VOID "smovf_QI_semantics") 10199 ()) 10200 10201 (dni smovf32.w "smovf.w" ((machine 32)) 10202 ("smovf.w") 10203 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9) (f-12-4 3)) 10204 (c-call VOID "smovf_HI_semantics") 10205 ()) 10206 10207 ;------------------------------------------------------------- 10208 ; smovu - string move unequal (m32) 10209 ;------------------------------------------------------------- 10210 10211 ; TODO semantics 10212 (dni smovu.b "smovu.b" ((machine 32)) 10213 ("smovu.b") 10214 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8) (f-12-4 3)) 10215 (c-call VOID "smovu_QI_semantics") 10216 ()) 10217 10218 (dni smovu.w "smovu.w" ((machine 32)) 10219 ("smovu.w") 10220 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9) (f-12-4 3)) 10221 (c-call VOID "smovu_HI_semantics") 10222 ()) 10223 10224 ;------------------------------------------------------------- 10225 ; sout - string output (m32) 10226 ;------------------------------------------------------------- 10227 10228 ; TODO semantics 10229 (dni sout.b "sout.b" ((machine 32)) 10230 ("sout.b") 10231 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3)) 10232 (c-call VOID "sout_QI_semantics") 10233 ()) 10234 10235 (dni sout.w "sout" ((machine 32)) 10236 ("sout.w") 10237 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3)) 10238 (c-call VOID "sout_HI_semantics") 10239 ()) 10240 10241 ;------------------------------------------------------------- 10242 ; sstr - string store 10243 ;------------------------------------------------------------- 10244 10245 ; TODO semantics 10246 (dni sstr16.b "sstr.b" ((machine 16)) 10247 ("sstr.b") 10248 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA)) 10249 (c-call VOID "sstr_QI_semantics") 10250 ()) 10251 10252 (dni sstr16.w "sstr.w" ((machine 16)) 10253 ("sstr.w") 10254 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA)) 10255 (c-call VOID "sstr_HI_semantics") 10256 ()) 10257 10258 (dni sstr.b "sstr" ((machine 32)) 10259 ("sstr.b") 10260 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3)) 10261 (c-call VOID "sstr_QI_semantics") 10262 ()) 10263 10264 (dni sstr.w "sstr" ((machine 32)) 10265 ("sstr.w") 10266 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3)) 10267 (c-call VOID "sstr_HI_semantics") 10268 ()) 10269 10270 ;------------------------------------------------------------- 10271 ; stnz - store on not zero 10272 ;------------------------------------------------------------- 10273 10274 (define-pmacro (stnz-sem mode src dst) 10275 (sequence () 10276 (if (ne zbit (const 1)) 10277 (set dst src))) 10278 ) 10279 ; stnz #imm8,dst3 (m16) 10280 (binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem) 10281 ; stnz.BW #imm,dst (m32) 10282 (binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem) 10283 (binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem) 10284 10285 ;------------------------------------------------------------- 10286 ; stz - store on zero 10287 ;------------------------------------------------------------- 10288 10289 (define-pmacro (stz-sem mode src dst) 10290 (sequence () 10291 (if (eq zbit (const 1)) 10292 (set dst src))) 10293 ) 10294 ; stz #imm8,dst3 (m16) 10295 (binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem) 10296 ; stz.BW #imm,dst (m32) 10297 (binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem) 10298 (binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem) 10299 10300 ;------------------------------------------------------------- 10301 ; stzx - store on zero extention 10302 ;------------------------------------------------------------- 10303 10304 (define-pmacro (stzx-sem mode src1 src2 dst) 10305 (sequence () 10306 (if (eq zbit (const 1)) 10307 (set dst src1) 10308 (set dst src2))) 10309 ) 10310 ; stzx #imm8,dst3 (m16) 10311 (dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16)) 10312 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h") 10313 (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI) 10314 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h)) 10315 ()) 10316 (dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16)) 10317 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l") 10318 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI) 10319 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l)) 10320 ()) 10321 (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16)) 10322 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb]") 10323 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI) 10324 (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8))) 10325 ()) 10326 (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16)) 10327 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb]") 10328 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-s8 Imm-24-QI) 10329 (stzx-sem QI Imm-8-QI Imm-24-QI (mem16 QI (add (reg h-fb) Dsp-16-s8))) 10330 ()) 10331 (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16)) 10332 ("stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16}") 10333 (+ (f-0-4 #xD) (f-4-4 #xF) Imm-8-QI Dsp-16-u16 Imm-32-QI) 10334 (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16)) 10335 ()) 10336 ; stzx.BW #imm,dst (m32) 10337 (insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem) 10338 10339 ;------------------------------------------------------------- 10340 ; subx - subtract extend (m32) 10341 ;------------------------------------------------------------- 10342 10343 (define-pmacro (subx-sem mode src1 dst) 10344 (sequence ((mode result)) 10345 (set result (sub mode dst (ext mode src1))) 10346 (set obit (sub-oflag mode dst (ext mode src1) 0)) 10347 (set cbit (sub-cflag mode dst (ext mode src1) 0)) 10348 (set dst result) 10349 (set-z-and-s result))) 10350 ; subx #imm8,dst 10351 (binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem) 10352 ; subx src,dst 10353 (binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem) 10354 10355 ;------------------------------------------------------------- 10356 ; tst - test 10357 ;------------------------------------------------------------- 10358 10359 (define-pmacro (tst-sem mode src1 dst) 10360 (sequence ((mode result)) 10361 (set result (and mode dst src1)) 10362 (set-z-and-s result)) 10363 ) 10364 10365 ; tst.BW #imm,dst (m16 #1 m32 #1) 10366 (binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem) 10367 ; tst.BW src,dst (m16 #2 m32 #3) 10368 (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem) 10369 (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem) 10370 (binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem) 10371 (binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem) 10372 ; tst.BW:S #imm,dst2 (m32 #2) 10373 (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem) 10374 (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem) 10375 10376 ;------------------------------------------------------------- 10377 ; und - undefined 10378 ;------------------------------------------------------------- 10379 10380 (dni und16 "und" ((machine 16)) 10381 ("und") 10382 (+ (f-0-4 #xF) (f-4-4 #xF)) 10383 (nop) 10384 ()) 10385 10386 (dni und32 "und" ((machine 32)) 10387 ("und") 10388 (+ (f-0-4 #xF) (f-4-4 #xF)) 10389 (nop) 10390 ()) 10391 10392 ;------------------------------------------------------------- 10393 ; wait 10394 ;------------------------------------------------------------- 10395 10396 ; ??? semantics 10397 (dni wait16 "wait" ((machine 16)) 10398 ("wait") 10399 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3)) 10400 (nop) 10401 ()) 10402 10403 (dni wait "wait" ((machine 32)) 10404 ("wait") 10405 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3)) 10406 (nop) 10407 ()) 10408 10409 ;------------------------------------------------------------- 10410 ; xchg - exchange 10411 ;------------------------------------------------------------- 10412 10413 (define-pmacro (xchg-sem mode src dst) 10414 (sequence ((mode result)) 10415 (set result src) 10416 (set src dst) 10417 (set dst result)) 10418 ) 10419 (define-pmacro (xchg16-defn mode sz szc src srcreg) 10420 (dni (.sym xchg16 sz - srcreg) 10421 (.str "xchg" sz "-" srcreg ",dst16-16-" mode) 10422 ((machine 16)) 10423 (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}") 10424 (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode)) 10425 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode)) 10426 ()) 10427 ) 10428 (xchg16-defn QI b 0 0 r0l) 10429 (xchg16-defn QI b 0 1 r0h) 10430 (xchg16-defn QI b 0 2 r1l) 10431 (xchg16-defn QI b 0 3 r1h) 10432 (xchg16-defn HI w 1 0 r0) 10433 (xchg16-defn HI w 1 1 r1) 10434 (xchg16-defn HI w 1 2 r2) 10435 (xchg16-defn HI w 1 3 r3) 10436 (define-pmacro (xchg32-defn mode sz szc src srcreg) 10437 (dni (.sym xchg32 sz - srcreg) 10438 (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode) 10439 ((machine 32)) 10440 (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}") 10441 (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src)) 10442 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode)) 10443 ()) 10444 ) 10445 (xchg32-defn QI b 0 0 r0l) 10446 (xchg32-defn QI b 0 1 r1l) 10447 (xchg32-defn QI b 0 2 a0) 10448 (xchg32-defn QI b 0 3 a1) 10449 (xchg32-defn QI b 0 4 r0h) 10450 (xchg32-defn QI b 0 5 r1h) 10451 (xchg32-defn HI w 1 0 r0) 10452 (xchg32-defn HI w 1 1 r1) 10453 (xchg32-defn HI w 1 2 a0) 10454 (xchg32-defn HI w 1 3 a1) 10455 (xchg32-defn HI w 1 4 r2) 10456 (xchg32-defn HI w 1 5 r3) 10457 10458 ;------------------------------------------------------------- 10459 ; xor - exclusive or 10460 ;------------------------------------------------------------- 10461 10462 (define-pmacro (xor-sem mode src1 dst) 10463 (sequence ((mode result)) 10464 (set result (xor mode src1 dst)) 10465 (set-z-and-s result) 10466 (set dst result)) 10467 ) 10468 10469 ; xor.BW #imm,dst (m16 #1 m32 #1) 10470 (binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem) 10471 ; xor.BW src,dst (m16 #3 m32 #3) 10472 (binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem) 10473 10474 ;------------------------------------------------------------- 10475 ; Widening 10476 ;------------------------------------------------------------- 10477 10478 (define-pmacro (exts-sem smode dmode src dst) 10479 (set dst (ext dmode (trunc smode src))) 10480 ) 10481 (define-pmacro (extz-sem smode dmode src dst) 10482 (set dst (zext dmode (trunc smode src))) 10483 ) 10484 10485 ; exts.b dst for m16c 10486 (ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem) 10487 10488 ; exts.w r0 for m16c 10489 (dni exts16.w-r0 10490 "exts.w r0" 10491 ((machine 16)) 10492 "exts.w r0" 10493 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3)) 10494 (exts-sem HI SI R0 R2R0) 10495 ()) 10496 10497 ; exts.size dst for m32c 10498 (ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem) 10499 (ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem) 10500 ; exts.b src,dst for m32c 10501 (ext32-binary-defn exts .b #x1 #x7 exts-sem) 10502 10503 ; extz.b src,dst for m32c 10504 (ext32-binary-defn extz "" #x1 #xB extz-sem) 10505 10506 ;------------------------------------------------------------- 10507 ; Indirect 10508 ;------------------------------------------------------------- 10509 10510 ; TODO semantics 10511 (dni srcind "SRC-INDIRECT" ((machine 32)) 10512 ("src-indirect") 10513 (+ (f-0-4 4) (f-4-4 1)) 10514 (set (reg h-src-indirect) 1) 10515 ()) 10516 10517 (dni destind "DEST-INDIRECT" ((machine 32)) 10518 ("dest-indirect") 10519 (+ (f-0-4 0) (f-4-4 9)) 10520 (set (reg h-dst-indirect) 1) 10521 ()) 10522 10523 (dni srcdestind "SRC-DEST-INDIRECT" ((machine 32)) 10524 ("src-dest-indirect") 10525 (+ (f-0-4 4) (f-4-4 9)) 10526 (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1)) 10527 ()) 10528
Indexes created Mon Mar 02 05:31:46 UTC 2026