tc-alpha.c revision 1.4
1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU. 2 Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 4 Free Software Foundation, Inc. 5 Contributed by Carnegie Mellon University, 1993. 6 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files. 7 Modified by Ken Raeburn for gas-2.x and ECOFF support. 8 Modified by Richard Henderson for ELF support. 9 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support. 10 11 This file is part of GAS, the GNU Assembler. 12 13 GAS is free software; you can redistribute it and/or modify 14 it under the terms of the GNU General Public License as published by 15 the Free Software Foundation; either version 3, or (at your option) 16 any later version. 17 18 GAS is distributed in the hope that it will be useful, 19 but WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 GNU General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with GAS; see the file COPYING. If not, write to the Free 25 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 26 02110-1301, USA. */ 27 28 /* Mach Operating System 29 Copyright (c) 1993 Carnegie Mellon University 30 All Rights Reserved. 31 32 Permission to use, copy, modify and distribute this software and its 33 documentation is hereby granted, provided that both the copyright 34 notice and this permission notice appear in all copies of the 35 software, derivative works or modified versions, and any portions 36 thereof, and that both notices appear in supporting documentation. 37 38 CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS 39 CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 40 ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 41 42 Carnegie Mellon requests users of this software to return to 43 44 Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 45 School of Computer Science 46 Carnegie Mellon University 47 Pittsburgh PA 15213-3890 48 49 any improvements or extensions that they make and grant Carnegie the 50 rights to redistribute these changes. */ 51 52 #include "as.h" 53 #include "subsegs.h" 54 #include "struc-symbol.h" 55 #include "ecoff.h" 56 57 #include "opcode/alpha.h" 58 59 #ifdef OBJ_ELF 60 #include "elf/alpha.h" 61 #endif 62 63 #ifdef OBJ_EVAX 64 #include "vms.h" 65 #include "vms/egps.h" 66 #endif 67 68 #include "dwarf2dbg.h" 69 #include "dw2gencfi.h" 70 #include "safe-ctype.h" 71 72 /* Local types. */ 74 75 #define TOKENIZE_ERROR -1 76 #define TOKENIZE_ERROR_REPORT -2 77 #define MAX_INSN_FIXUPS 2 78 #define MAX_INSN_ARGS 5 79 80 /* Used since new relocation types are introduced in this 81 file (DUMMY_RELOC_LITUSE_*) */ 82 typedef int extended_bfd_reloc_code_real_type; 83 84 struct alpha_fixup 85 { 86 expressionS exp; 87 /* bfd_reloc_code_real_type reloc; */ 88 extended_bfd_reloc_code_real_type reloc; 89 #ifdef OBJ_EVAX 90 /* The symbol of the item in the linkage section. */ 91 symbolS *xtrasym; 92 93 /* The symbol of the procedure descriptor. */ 94 symbolS *procsym; 95 #endif 96 }; 97 98 struct alpha_insn 99 { 100 unsigned insn; 101 int nfixups; 102 struct alpha_fixup fixups[MAX_INSN_FIXUPS]; 103 long sequence; 104 }; 105 106 enum alpha_macro_arg 107 { 108 MACRO_EOA = 1, 109 MACRO_IR, 110 MACRO_PIR, 111 MACRO_OPIR, 112 MACRO_CPIR, 113 MACRO_FPR, 114 MACRO_EXP 115 }; 116 117 struct alpha_macro 118 { 119 const char *name; 120 void (*emit) (const expressionS *, int, const void *); 121 const void * arg; 122 enum alpha_macro_arg argsets[16]; 123 }; 124 125 /* Extra expression types. */ 126 127 #define O_pregister O_md1 /* O_register, in parentheses. */ 128 #define O_cpregister O_md2 /* + a leading comma. */ 129 130 /* The alpha_reloc_op table below depends on the ordering of these. */ 131 #define O_literal O_md3 /* !literal relocation. */ 132 #define O_lituse_addr O_md4 /* !lituse_addr relocation. */ 133 #define O_lituse_base O_md5 /* !lituse_base relocation. */ 134 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */ 135 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */ 136 #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */ 137 #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */ 138 #define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */ 139 #define O_gpdisp O_md11 /* !gpdisp relocation. */ 140 #define O_gprelhigh O_md12 /* !gprelhigh relocation. */ 141 #define O_gprellow O_md13 /* !gprellow relocation. */ 142 #define O_gprel O_md14 /* !gprel relocation. */ 143 #define O_samegp O_md15 /* !samegp relocation. */ 144 #define O_tlsgd O_md16 /* !tlsgd relocation. */ 145 #define O_tlsldm O_md17 /* !tlsldm relocation. */ 146 #define O_gotdtprel O_md18 /* !gotdtprel relocation. */ 147 #define O_dtprelhi O_md19 /* !dtprelhi relocation. */ 148 #define O_dtprello O_md20 /* !dtprello relocation. */ 149 #define O_dtprel O_md21 /* !dtprel relocation. */ 150 #define O_gottprel O_md22 /* !gottprel relocation. */ 151 #define O_tprelhi O_md23 /* !tprelhi relocation. */ 152 #define O_tprello O_md24 /* !tprello relocation. */ 153 #define O_tprel O_md25 /* !tprel relocation. */ 154 155 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1) 156 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2) 157 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3) 158 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4) 159 #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5) 160 #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6) 161 #define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7) 162 163 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel) 164 165 /* Macros for extracting the type and number of encoded register tokens. */ 166 167 #define is_ir_num(x) (((x) & 32) == 0) 168 #define is_fpr_num(x) (((x) & 32) != 0) 169 #define regno(x) ((x) & 31) 170 171 /* Something odd inherited from the old assembler. */ 172 173 #define note_gpreg(R) (alpha_gprmask |= (1 << (R))) 174 #define note_fpreg(R) (alpha_fprmask |= (1 << (R))) 175 176 /* Predicates for 16- and 32-bit ranges */ 177 /* XXX: The non-shift version appears to trigger a compiler bug when 178 cross-assembling from x86 w/ gcc 2.7.2. */ 179 180 #if 1 181 #define range_signed_16(x) \ 182 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1) 183 #define range_signed_32(x) \ 184 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1) 185 #else 186 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \ 187 (offsetT) (x) <= (offsetT) 0x7FFF) 188 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \ 189 (offsetT) (x) <= (offsetT) 0x7FFFFFFF) 190 #endif 191 192 /* Macros for sign extending from 16- and 32-bits. */ 193 /* XXX: The cast macros will work on all the systems that I care about, 194 but really a predicate should be found to use the non-cast forms. */ 195 196 #if 1 197 #define sign_extend_16(x) ((short) (x)) 198 #define sign_extend_32(x) ((int) (x)) 199 #else 200 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000) 201 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \ 202 ^ 0x80000000) - 0x80000000) 203 #endif 204 205 /* Macros to build tokens. */ 206 207 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \ 208 (t).X_op = O_register, \ 209 (t).X_add_number = (r)) 210 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \ 211 (t).X_op = O_pregister, \ 212 (t).X_add_number = (r)) 213 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \ 214 (t).X_op = O_cpregister, \ 215 (t).X_add_number = (r)) 216 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \ 217 (t).X_op = O_register, \ 218 (t).X_add_number = (r) + 32) 219 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \ 220 (t).X_op = O_symbol, \ 221 (t).X_add_symbol = (s), \ 222 (t).X_add_number = (a)) 223 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \ 224 (t).X_op = O_constant, \ 225 (t).X_add_number = (n)) 226 227 /* Generic assembler global variables which must be defined by all 229 targets. */ 230 231 /* Characters which always start a comment. */ 232 const char comment_chars[] = "#"; 233 234 /* Characters which start a comment at the beginning of a line. */ 235 const char line_comment_chars[] = "#"; 236 237 /* Characters which may be used to separate multiple commands on a 238 single line. */ 239 const char line_separator_chars[] = ";"; 240 241 /* Characters which are used to indicate an exponent in a floating 242 point number. */ 243 const char EXP_CHARS[] = "eE"; 244 245 /* Characters which mean that a number is a floating point constant, 246 as in 0d1.0. */ 247 /* XXX: Do all of these really get used on the alpha?? */ 248 char FLT_CHARS[] = "rRsSfFdDxXpP"; 249 250 #ifdef OBJ_EVAX 251 const char *md_shortopts = "Fm:g+1h:HG:"; 252 #else 253 const char *md_shortopts = "Fm:gG:"; 254 #endif 255 256 struct option md_longopts[] = 257 { 258 #define OPTION_32ADDR (OPTION_MD_BASE) 259 { "32addr", no_argument, NULL, OPTION_32ADDR }, 260 #define OPTION_RELAX (OPTION_32ADDR + 1) 261 { "relax", no_argument, NULL, OPTION_RELAX }, 262 #ifdef OBJ_ELF 263 #define OPTION_MDEBUG (OPTION_RELAX + 1) 264 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1) 265 { "mdebug", no_argument, NULL, OPTION_MDEBUG }, 266 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG }, 267 #endif 268 #ifdef OBJ_EVAX 269 #define OPTION_REPLACE (OPTION_RELAX + 1) 270 #define OPTION_NOREPLACE (OPTION_REPLACE+1) 271 { "replace", no_argument, NULL, OPTION_REPLACE }, 272 { "noreplace", no_argument, NULL, OPTION_NOREPLACE }, 273 #endif 274 { NULL, no_argument, NULL, 0 } 275 }; 276 277 size_t md_longopts_size = sizeof (md_longopts); 278 279 #ifdef OBJ_EVAX 281 #define AXP_REG_R0 0 282 #define AXP_REG_R16 16 283 #define AXP_REG_R17 17 284 #undef AXP_REG_T9 285 #define AXP_REG_T9 22 286 #undef AXP_REG_T10 287 #define AXP_REG_T10 23 288 #undef AXP_REG_T11 289 #define AXP_REG_T11 24 290 #undef AXP_REG_T12 291 #define AXP_REG_T12 25 292 #define AXP_REG_AI 25 293 #undef AXP_REG_FP 294 #define AXP_REG_FP 29 295 296 #undef AXP_REG_GP 297 #define AXP_REG_GP AXP_REG_PV 298 299 #endif /* OBJ_EVAX */ 300 301 /* The cpu for which we are generating code. */ 302 static unsigned alpha_target = AXP_OPCODE_BASE; 303 static const char *alpha_target_name = "<all>"; 304 305 /* The hash table of instruction opcodes. */ 306 static struct hash_control *alpha_opcode_hash; 307 308 /* The hash table of macro opcodes. */ 309 static struct hash_control *alpha_macro_hash; 310 311 #ifdef OBJ_ECOFF 312 /* The $gp relocation symbol. */ 313 static symbolS *alpha_gp_symbol; 314 315 /* XXX: what is this, and why is it exported? */ 316 valueT alpha_gp_value; 317 #endif 318 319 /* The current $gp register. */ 320 static int alpha_gp_register = AXP_REG_GP; 321 322 /* A table of the register symbols. */ 323 static symbolS *alpha_register_table[64]; 324 325 /* Constant sections, or sections of constants. */ 326 #ifdef OBJ_ECOFF 327 static segT alpha_lita_section; 328 #endif 329 #ifdef OBJ_EVAX 330 segT alpha_link_section; 331 #endif 332 #ifndef OBJ_EVAX 333 static segT alpha_lit8_section; 334 #endif 335 336 /* Symbols referring to said sections. */ 337 #ifdef OBJ_ECOFF 338 static symbolS *alpha_lita_symbol; 339 #endif 340 #ifdef OBJ_EVAX 341 static symbolS *alpha_link_symbol; 342 #endif 343 #ifndef OBJ_EVAX 344 static symbolS *alpha_lit8_symbol; 345 #endif 346 347 /* Literal for .litX+0x8000 within .lita. */ 348 #ifdef OBJ_ECOFF 349 static offsetT alpha_lit8_literal; 350 #endif 351 352 /* Is the assembler not allowed to use $at? */ 353 static int alpha_noat_on = 0; 354 355 /* Are macros enabled? */ 356 static int alpha_macros_on = 1; 357 358 /* Are floats disabled? */ 359 static int alpha_nofloats_on = 0; 360 361 /* Are addresses 32 bit? */ 362 static int alpha_addr32_on = 0; 363 364 /* Symbol labelling the current insn. When the Alpha gas sees 365 foo: 366 .quad 0 367 and the section happens to not be on an eight byte boundary, it 368 will align both the symbol and the .quad to an eight byte boundary. */ 369 static symbolS *alpha_insn_label; 370 #if defined(OBJ_ELF) || defined (OBJ_EVAX) 371 static symbolS *alpha_prologue_label; 372 #endif 373 374 #ifdef OBJ_EVAX 375 /* Symbol associate with the current jsr instruction. */ 376 static symbolS *alpha_linkage_symbol; 377 #endif 378 379 /* Whether we should automatically align data generation pseudo-ops. 380 .align 0 will turn this off. */ 381 static int alpha_auto_align_on = 1; 382 383 /* The known current alignment of the current section. */ 384 static int alpha_current_align; 385 386 /* These are exported to ECOFF code. */ 387 unsigned long alpha_gprmask, alpha_fprmask; 388 389 /* Whether the debugging option was seen. */ 390 static int alpha_debug; 391 392 #ifdef OBJ_ELF 393 /* Whether we are emitting an mdebug section. */ 394 int alpha_flag_mdebug = -1; 395 #endif 396 397 #ifdef OBJ_EVAX 398 /* Whether to perform the VMS procedure call optimization. */ 399 int alpha_flag_replace = 1; 400 #endif 401 402 /* Don't fully resolve relocations, allowing code movement in the linker. */ 403 static int alpha_flag_relax; 404 405 /* What value to give to bfd_set_gp_size. */ 406 static int g_switch_value = 8; 407 408 #ifdef OBJ_EVAX 409 /* Collect information about current procedure here. */ 410 struct alpha_evax_procs 411 { 412 symbolS *symbol; /* Proc pdesc symbol. */ 413 int pdsckind; 414 int framereg; /* Register for frame pointer. */ 415 int framesize; /* Size of frame. */ 416 int rsa_offset; 417 int ra_save; 418 int fp_save; 419 long imask; 420 long fmask; 421 int type; 422 int prologue; 423 symbolS *handler; 424 int handler_data; 425 }; 426 427 /* Linked list of .linkage fixups. */ 428 struct alpha_linkage_fixups *alpha_linkage_fixup_root; 429 static struct alpha_linkage_fixups *alpha_linkage_fixup_tail; 430 431 /* Current procedure descriptor. */ 432 static struct alpha_evax_procs *alpha_evax_proc; 433 static struct alpha_evax_procs alpha_evax_proc_data; 434 435 static int alpha_flag_hash_long_names = 0; /* -+ */ 436 static int alpha_flag_show_after_trunc = 0; /* -H */ 437 438 /* If the -+ switch is given, then a hash is appended to any name that is 439 longer than 64 characters, else longer symbol names are truncated. */ 440 441 #endif 442 443 #ifdef RELOC_OP_P 445 /* A table to map the spelling of a relocation operand into an appropriate 446 bfd_reloc_code_real_type type. The table is assumed to be ordered such 447 that op-O_literal indexes into it. */ 448 449 #define ALPHA_RELOC_TABLE(op) \ 450 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \ 451 ? (abort (), 0) \ 452 : (int) (op) - (int) O_literal) ]) 453 454 #define DEF(NAME, RELOC, REQ, ALLOW) \ 455 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW} 456 457 static const struct alpha_reloc_op_tag 458 { 459 const char *name; /* String to lookup. */ 460 size_t length; /* Size of the string. */ 461 operatorT op; /* Which operator to use. */ 462 extended_bfd_reloc_code_real_type reloc; 463 unsigned int require_seq : 1; /* Require a sequence number. */ 464 unsigned int allow_seq : 1; /* Allow a sequence number. */ 465 } 466 alpha_reloc_op[] = 467 { 468 DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1), 469 DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1), 470 DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1), 471 DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1), 472 DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1), 473 DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1), 474 DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1), 475 DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1), 476 DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1), 477 DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0), 478 DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0), 479 DEF (gprel, BFD_RELOC_GPREL16, 0, 0), 480 DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0), 481 DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1), 482 DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1), 483 DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0), 484 DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0), 485 DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0), 486 DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0), 487 DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0), 488 DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0), 489 DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0), 490 DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0), 491 }; 492 493 #undef DEF 494 495 static const int alpha_num_reloc_op 496 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op); 497 #endif /* RELOC_OP_P */ 498 499 /* Maximum # digits needed to hold the largest sequence #. */ 500 #define ALPHA_RELOC_DIGITS 25 501 502 /* Structure to hold explicit sequence information. */ 503 struct alpha_reloc_tag 504 { 505 fixS *master; /* The literal reloc. */ 506 #ifdef OBJ_EVAX 507 struct symbol *sym; /* Linkage section item symbol. */ 508 struct symbol *psym; /* Pdesc symbol. */ 509 #endif 510 fixS *slaves; /* Head of linked list of lituses. */ 511 segT segment; /* Segment relocs are in or undefined_section. */ 512 long sequence; /* Sequence #. */ 513 unsigned n_master; /* # of literals. */ 514 unsigned n_slaves; /* # of lituses. */ 515 unsigned saw_tlsgd : 1; /* True if ... */ 516 unsigned saw_tlsldm : 1; 517 unsigned saw_lu_tlsgd : 1; 518 unsigned saw_lu_tlsldm : 1; 519 unsigned multi_section_p : 1; /* True if more than one section was used. */ 520 char string[1]; /* Printable form of sequence to hash with. */ 521 }; 522 523 /* Hash table to link up literals with the appropriate lituse. */ 524 static struct hash_control *alpha_literal_hash; 525 526 /* Sequence numbers for internal use by macros. */ 527 static long next_sequence_num = -1; 528 529 /* A table of CPU names and opcode sets. */ 531 532 static const struct cpu_type 533 { 534 const char *name; 535 unsigned flags; 536 } 537 cpu_types[] = 538 { 539 /* Ad hoc convention: cpu number gets palcode, process code doesn't. 540 This supports usage under DU 4.0b that does ".arch ev4", and 541 usage in MILO that does -m21064. Probably something more 542 specific like -m21064-pal should be used, but oh well. */ 543 544 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 545 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 546 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 547 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 548 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 }, 549 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX }, 550 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX 551 |AXP_OPCODE_MAX) }, 552 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX 553 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, 554 { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX 555 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, 556 { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX 557 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, 558 559 { "ev4", AXP_OPCODE_BASE }, 560 { "ev45", AXP_OPCODE_BASE }, 561 { "lca45", AXP_OPCODE_BASE }, 562 { "ev5", AXP_OPCODE_BASE }, 563 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX }, 564 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX }, 565 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, 566 { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, 567 { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, 568 569 { "all", AXP_OPCODE_BASE }, 570 { 0, 0 } 571 }; 572 573 /* Some instruction sets indexed by lg(size). */ 574 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL }; 575 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" }; 576 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" }; 577 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" }; 578 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" }; 579 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" }; 580 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" }; 581 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" }; 582 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL }; 583 584 static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, extended_bfd_reloc_code_real_type); 585 static void emit_insn (struct alpha_insn *); 586 static void assemble_tokens (const char *, const expressionS *, int, int); 587 #ifdef OBJ_EVAX 588 static char *s_alpha_section_name (void); 589 static symbolS *add_to_link_pool (symbolS *, offsetT); 590 #endif 591 592 static struct alpha_reloc_tag * 594 get_alpha_reloc_tag (long sequence) 595 { 596 char buffer[ALPHA_RELOC_DIGITS]; 597 struct alpha_reloc_tag *info; 598 599 sprintf (buffer, "!%ld", sequence); 600 601 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer); 602 if (! info) 603 { 604 size_t len = strlen (buffer); 605 const char *errmsg; 606 607 info = (struct alpha_reloc_tag *) 608 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1); 609 610 info->segment = now_seg; 611 info->sequence = sequence; 612 strcpy (info->string, buffer); 613 errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info); 614 if (errmsg) 615 as_fatal ("%s", errmsg); 616 #ifdef OBJ_EVAX 617 info->sym = 0; 618 info->psym = 0; 619 #endif 620 } 621 622 return info; 623 } 624 625 #ifndef OBJ_EVAX 626 627 static void 628 alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED, 629 asection *sec, 630 void * ptr ATTRIBUTE_UNUSED) 631 { 632 segment_info_type *seginfo = seg_info (sec); 633 fixS **prevP; 634 fixS *fixp; 635 fixS *next; 636 fixS *slave; 637 638 /* If seginfo is NULL, we did not create this section; don't do 639 anything with it. By using a pointer to a pointer, we can update 640 the links in place. */ 641 if (seginfo == NULL) 642 return; 643 644 /* If there are no relocations, skip the section. */ 645 if (! seginfo->fix_root) 646 return; 647 648 /* First rebuild the fixup chain without the explicit lituse and 649 gpdisp_lo16 relocs. */ 650 prevP = &seginfo->fix_root; 651 for (fixp = seginfo->fix_root; fixp; fixp = next) 652 { 653 next = fixp->fx_next; 654 fixp->fx_next = (fixS *) 0; 655 656 switch (fixp->fx_r_type) 657 { 658 case BFD_RELOC_ALPHA_LITUSE: 659 if (fixp->tc_fix_data.info->n_master == 0) 660 as_bad_where (fixp->fx_file, fixp->fx_line, 661 _("No !literal!%ld was found"), 662 fixp->tc_fix_data.info->sequence); 663 #ifdef RELOC_OP_P 664 if (fixp->fx_offset == LITUSE_ALPHA_TLSGD) 665 { 666 if (! fixp->tc_fix_data.info->saw_tlsgd) 667 as_bad_where (fixp->fx_file, fixp->fx_line, 668 _("No !tlsgd!%ld was found"), 669 fixp->tc_fix_data.info->sequence); 670 } 671 else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM) 672 { 673 if (! fixp->tc_fix_data.info->saw_tlsldm) 674 as_bad_where (fixp->fx_file, fixp->fx_line, 675 _("No !tlsldm!%ld was found"), 676 fixp->tc_fix_data.info->sequence); 677 } 678 #endif 679 break; 680 681 case BFD_RELOC_ALPHA_GPDISP_LO16: 682 if (fixp->tc_fix_data.info->n_master == 0) 683 as_bad_where (fixp->fx_file, fixp->fx_line, 684 _("No ldah !gpdisp!%ld was found"), 685 fixp->tc_fix_data.info->sequence); 686 break; 687 688 case BFD_RELOC_ALPHA_ELF_LITERAL: 689 if (fixp->tc_fix_data.info 690 && (fixp->tc_fix_data.info->saw_tlsgd 691 || fixp->tc_fix_data.info->saw_tlsldm)) 692 break; 693 /* FALLTHRU */ 694 695 default: 696 *prevP = fixp; 697 prevP = &fixp->fx_next; 698 break; 699 } 700 } 701 702 /* Go back and re-chain dependent relocations. They are currently 703 linked through the next_reloc field in reverse order, so as we 704 go through the next_reloc chain, we effectively reverse the chain 705 once again. 706 707 Except if there is more than one !literal for a given sequence 708 number. In that case, the programmer and/or compiler is not sure 709 how control flows from literal to lituse, and we can't be sure to 710 get the relaxation correct. 711 712 ??? Well, actually we could, if there are enough lituses such that 713 we can make each literal have at least one of each lituse type 714 present. Not implemented. 715 716 Also suppress the optimization if the !literals/!lituses are spread 717 in different segments. This can happen with "intersting" uses of 718 inline assembly; examples are present in the Linux kernel semaphores. */ 719 720 for (fixp = seginfo->fix_root; fixp; fixp = next) 721 { 722 next = fixp->fx_next; 723 switch (fixp->fx_r_type) 724 { 725 case BFD_RELOC_ALPHA_TLSGD: 726 case BFD_RELOC_ALPHA_TLSLDM: 727 if (!fixp->tc_fix_data.info) 728 break; 729 if (fixp->tc_fix_data.info->n_master == 0) 730 break; 731 else if (fixp->tc_fix_data.info->n_master > 1) 732 { 733 as_bad_where (fixp->fx_file, fixp->fx_line, 734 _("too many !literal!%ld for %s"), 735 fixp->tc_fix_data.info->sequence, 736 (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD 737 ? "!tlsgd" : "!tlsldm")); 738 break; 739 } 740 741 fixp->tc_fix_data.info->master->fx_next = fixp->fx_next; 742 fixp->fx_next = fixp->tc_fix_data.info->master; 743 fixp = fixp->fx_next; 744 /* Fall through. */ 745 746 case BFD_RELOC_ALPHA_ELF_LITERAL: 747 if (fixp->tc_fix_data.info 748 && fixp->tc_fix_data.info->n_master == 1 749 && ! fixp->tc_fix_data.info->multi_section_p) 750 { 751 for (slave = fixp->tc_fix_data.info->slaves; 752 slave != (fixS *) 0; 753 slave = slave->tc_fix_data.next_reloc) 754 { 755 slave->fx_next = fixp->fx_next; 756 fixp->fx_next = slave; 757 } 758 } 759 break; 760 761 case BFD_RELOC_ALPHA_GPDISP_HI16: 762 if (fixp->tc_fix_data.info->n_slaves == 0) 763 as_bad_where (fixp->fx_file, fixp->fx_line, 764 _("No lda !gpdisp!%ld was found"), 765 fixp->tc_fix_data.info->sequence); 766 else 767 { 768 slave = fixp->tc_fix_data.info->slaves; 769 slave->fx_next = next; 770 fixp->fx_next = slave; 771 } 772 break; 773 774 default: 775 break; 776 } 777 } 778 } 779 780 /* Before the relocations are written, reorder them, so that user 781 supplied !lituse relocations follow the appropriate !literal 782 relocations, and similarly for !gpdisp relocations. */ 783 784 void 785 alpha_before_fix (void) 786 { 787 if (alpha_literal_hash) 788 bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL); 789 } 790 791 #endif 792 793 #ifdef DEBUG_ALPHA 795 static void 796 debug_exp (expressionS tok[], int ntok) 797 { 798 int i; 799 800 fprintf (stderr, "debug_exp: %d tokens", ntok); 801 for (i = 0; i < ntok; i++) 802 { 803 expressionS *t = &tok[i]; 804 const char *name; 805 806 switch (t->X_op) 807 { 808 default: name = "unknown"; break; 809 case O_illegal: name = "O_illegal"; break; 810 case O_absent: name = "O_absent"; break; 811 case O_constant: name = "O_constant"; break; 812 case O_symbol: name = "O_symbol"; break; 813 case O_symbol_rva: name = "O_symbol_rva"; break; 814 case O_register: name = "O_register"; break; 815 case O_big: name = "O_big"; break; 816 case O_uminus: name = "O_uminus"; break; 817 case O_bit_not: name = "O_bit_not"; break; 818 case O_logical_not: name = "O_logical_not"; break; 819 case O_multiply: name = "O_multiply"; break; 820 case O_divide: name = "O_divide"; break; 821 case O_modulus: name = "O_modulus"; break; 822 case O_left_shift: name = "O_left_shift"; break; 823 case O_right_shift: name = "O_right_shift"; break; 824 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break; 825 case O_bit_or_not: name = "O_bit_or_not"; break; 826 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break; 827 case O_bit_and: name = "O_bit_and"; break; 828 case O_add: name = "O_add"; break; 829 case O_subtract: name = "O_subtract"; break; 830 case O_eq: name = "O_eq"; break; 831 case O_ne: name = "O_ne"; break; 832 case O_lt: name = "O_lt"; break; 833 case O_le: name = "O_le"; break; 834 case O_ge: name = "O_ge"; break; 835 case O_gt: name = "O_gt"; break; 836 case O_logical_and: name = "O_logical_and"; break; 837 case O_logical_or: name = "O_logical_or"; break; 838 case O_index: name = "O_index"; break; 839 case O_pregister: name = "O_pregister"; break; 840 case O_cpregister: name = "O_cpregister"; break; 841 case O_literal: name = "O_literal"; break; 842 case O_lituse_addr: name = "O_lituse_addr"; break; 843 case O_lituse_base: name = "O_lituse_base"; break; 844 case O_lituse_bytoff: name = "O_lituse_bytoff"; break; 845 case O_lituse_jsr: name = "O_lituse_jsr"; break; 846 case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break; 847 case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break; 848 case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break; 849 case O_gpdisp: name = "O_gpdisp"; break; 850 case O_gprelhigh: name = "O_gprelhigh"; break; 851 case O_gprellow: name = "O_gprellow"; break; 852 case O_gprel: name = "O_gprel"; break; 853 case O_samegp: name = "O_samegp"; break; 854 case O_tlsgd: name = "O_tlsgd"; break; 855 case O_tlsldm: name = "O_tlsldm"; break; 856 case O_gotdtprel: name = "O_gotdtprel"; break; 857 case O_dtprelhi: name = "O_dtprelhi"; break; 858 case O_dtprello: name = "O_dtprello"; break; 859 case O_dtprel: name = "O_dtprel"; break; 860 case O_gottprel: name = "O_gottprel"; break; 861 case O_tprelhi: name = "O_tprelhi"; break; 862 case O_tprello: name = "O_tprello"; break; 863 case O_tprel: name = "O_tprel"; break; 864 } 865 866 fprintf (stderr, ", %s(%s, %s, %d)", name, 867 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--", 868 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--", 869 (int) t->X_add_number); 870 } 871 fprintf (stderr, "\n"); 872 fflush (stderr); 873 } 874 #endif 875 876 /* Parse the arguments to an opcode. */ 877 878 static int 879 tokenize_arguments (char *str, 880 expressionS tok[], 881 int ntok) 882 { 883 expressionS *end_tok = tok + ntok; 884 char *old_input_line_pointer; 885 int saw_comma = 0, saw_arg = 0; 886 #ifdef DEBUG_ALPHA 887 expressionS *orig_tok = tok; 888 #endif 889 #ifdef RELOC_OP_P 890 char *p; 891 const struct alpha_reloc_op_tag *r; 892 int c, i; 893 size_t len; 894 int reloc_found_p = 0; 895 #endif 896 897 memset (tok, 0, sizeof (*tok) * ntok); 898 899 /* Save and restore input_line_pointer around this function. */ 900 old_input_line_pointer = input_line_pointer; 901 input_line_pointer = str; 902 903 #ifdef RELOC_OP_P 904 /* ??? Wrest control of ! away from the regular expression parser. */ 905 is_end_of_line[(unsigned char) '!'] = 1; 906 #endif 907 908 while (tok < end_tok && *input_line_pointer) 909 { 910 SKIP_WHITESPACE (); 911 switch (*input_line_pointer) 912 { 913 case '\0': 914 goto fini; 915 916 #ifdef RELOC_OP_P 917 case '!': 918 /* A relocation operand can be placed after the normal operand on an 919 assembly language statement, and has the following form: 920 !relocation_type!sequence_number. */ 921 if (reloc_found_p) 922 { 923 /* Only support one relocation op per insn. */ 924 as_bad (_("More than one relocation op per insn")); 925 goto err_report; 926 } 927 928 if (!saw_arg) 929 goto err; 930 931 ++input_line_pointer; 932 SKIP_WHITESPACE (); 933 p = input_line_pointer; 934 c = get_symbol_end (); 935 936 /* Parse !relocation_type. */ 937 len = input_line_pointer - p; 938 if (len == 0) 939 { 940 as_bad (_("No relocation operand")); 941 goto err_report; 942 } 943 944 r = &alpha_reloc_op[0]; 945 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++) 946 if (len == r->length && memcmp (p, r->name, len) == 0) 947 break; 948 if (i < 0) 949 { 950 as_bad (_("Unknown relocation operand: !%s"), p); 951 goto err_report; 952 } 953 954 *input_line_pointer = c; 955 SKIP_WHITESPACE (); 956 if (*input_line_pointer != '!') 957 { 958 if (r->require_seq) 959 { 960 as_bad (_("no sequence number after !%s"), p); 961 goto err_report; 962 } 963 964 tok->X_add_number = 0; 965 } 966 else 967 { 968 if (! r->allow_seq) 969 { 970 as_bad (_("!%s does not use a sequence number"), p); 971 goto err_report; 972 } 973 974 input_line_pointer++; 975 976 /* Parse !sequence_number. */ 977 expression (tok); 978 if (tok->X_op != O_constant || tok->X_add_number <= 0) 979 { 980 as_bad (_("Bad sequence number: !%s!%s"), 981 r->name, input_line_pointer); 982 goto err_report; 983 } 984 } 985 986 tok->X_op = r->op; 987 reloc_found_p = 1; 988 ++tok; 989 break; 990 #endif /* RELOC_OP_P */ 991 992 case ',': 993 ++input_line_pointer; 994 if (saw_comma || !saw_arg) 995 goto err; 996 saw_comma = 1; 997 break; 998 999 case '(': 1000 { 1001 char *hold = input_line_pointer++; 1002 1003 /* First try for parenthesized register ... */ 1004 expression (tok); 1005 if (*input_line_pointer == ')' && tok->X_op == O_register) 1006 { 1007 tok->X_op = (saw_comma ? O_cpregister : O_pregister); 1008 saw_comma = 0; 1009 saw_arg = 1; 1010 ++input_line_pointer; 1011 ++tok; 1012 break; 1013 } 1014 1015 /* ... then fall through to plain expression. */ 1016 input_line_pointer = hold; 1017 } 1018 1019 default: 1020 if (saw_arg && !saw_comma) 1021 goto err; 1022 1023 expression (tok); 1024 if (tok->X_op == O_illegal || tok->X_op == O_absent) 1025 goto err; 1026 1027 saw_comma = 0; 1028 saw_arg = 1; 1029 ++tok; 1030 break; 1031 } 1032 } 1033 1034 fini: 1035 if (saw_comma) 1036 goto err; 1037 input_line_pointer = old_input_line_pointer; 1038 1039 #ifdef DEBUG_ALPHA 1040 debug_exp (orig_tok, ntok - (end_tok - tok)); 1041 #endif 1042 #ifdef RELOC_OP_P 1043 is_end_of_line[(unsigned char) '!'] = 0; 1044 #endif 1045 1046 return ntok - (end_tok - tok); 1047 1048 err: 1049 #ifdef RELOC_OP_P 1050 is_end_of_line[(unsigned char) '!'] = 0; 1051 #endif 1052 input_line_pointer = old_input_line_pointer; 1053 return TOKENIZE_ERROR; 1054 1055 #ifdef RELOC_OP_P 1056 err_report: 1057 is_end_of_line[(unsigned char) '!'] = 0; 1058 #endif 1059 input_line_pointer = old_input_line_pointer; 1060 return TOKENIZE_ERROR_REPORT; 1061 } 1062 1063 /* Search forward through all variants of an opcode looking for a 1064 syntax match. */ 1065 1066 static const struct alpha_opcode * 1067 find_opcode_match (const struct alpha_opcode *first_opcode, 1068 const expressionS *tok, 1069 int *pntok, 1070 int *pcpumatch) 1071 { 1072 const struct alpha_opcode *opcode = first_opcode; 1073 int ntok = *pntok; 1074 int got_cpu_match = 0; 1075 1076 do 1077 { 1078 const unsigned char *opidx; 1079 int tokidx = 0; 1080 1081 /* Don't match opcodes that don't exist on this architecture. */ 1082 if (!(opcode->flags & alpha_target)) 1083 goto match_failed; 1084 1085 got_cpu_match = 1; 1086 1087 for (opidx = opcode->operands; *opidx; ++opidx) 1088 { 1089 const struct alpha_operand *operand = &alpha_operands[*opidx]; 1090 1091 /* Only take input from real operands. */ 1092 if (operand->flags & AXP_OPERAND_FAKE) 1093 continue; 1094 1095 /* When we expect input, make sure we have it. */ 1096 if (tokidx >= ntok) 1097 { 1098 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0) 1099 goto match_failed; 1100 continue; 1101 } 1102 1103 /* Match operand type with expression type. */ 1104 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK) 1105 { 1106 case AXP_OPERAND_IR: 1107 if (tok[tokidx].X_op != O_register 1108 || !is_ir_num (tok[tokidx].X_add_number)) 1109 goto match_failed; 1110 break; 1111 case AXP_OPERAND_FPR: 1112 if (tok[tokidx].X_op != O_register 1113 || !is_fpr_num (tok[tokidx].X_add_number)) 1114 goto match_failed; 1115 break; 1116 case AXP_OPERAND_IR | AXP_OPERAND_PARENS: 1117 if (tok[tokidx].X_op != O_pregister 1118 || !is_ir_num (tok[tokidx].X_add_number)) 1119 goto match_failed; 1120 break; 1121 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA: 1122 if (tok[tokidx].X_op != O_cpregister 1123 || !is_ir_num (tok[tokidx].X_add_number)) 1124 goto match_failed; 1125 break; 1126 1127 case AXP_OPERAND_RELATIVE: 1128 case AXP_OPERAND_SIGNED: 1129 case AXP_OPERAND_UNSIGNED: 1130 switch (tok[tokidx].X_op) 1131 { 1132 case O_illegal: 1133 case O_absent: 1134 case O_register: 1135 case O_pregister: 1136 case O_cpregister: 1137 goto match_failed; 1138 1139 default: 1140 break; 1141 } 1142 break; 1143 1144 default: 1145 /* Everything else should have been fake. */ 1146 abort (); 1147 } 1148 ++tokidx; 1149 } 1150 1151 /* Possible match -- did we use all of our input? */ 1152 if (tokidx == ntok) 1153 { 1154 *pntok = ntok; 1155 return opcode; 1156 } 1157 1158 match_failed:; 1159 } 1160 while (++opcode - alpha_opcodes < (int) alpha_num_opcodes 1161 && !strcmp (opcode->name, first_opcode->name)); 1162 1163 if (*pcpumatch) 1164 *pcpumatch = got_cpu_match; 1165 1166 return NULL; 1167 } 1168 1169 /* Given an opcode name and a pre-tokenized set of arguments, assemble 1170 the insn, but do not emit it. 1171 1172 Note that this implies no macros allowed, since we can't store more 1173 than one insn in an insn structure. */ 1174 1175 static void 1176 assemble_tokens_to_insn (const char *opname, 1177 const expressionS *tok, 1178 int ntok, 1179 struct alpha_insn *insn) 1180 { 1181 const struct alpha_opcode *opcode; 1182 1183 /* Search opcodes. */ 1184 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); 1185 if (opcode) 1186 { 1187 int cpumatch; 1188 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); 1189 if (opcode) 1190 { 1191 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED); 1192 return; 1193 } 1194 else if (cpumatch) 1195 as_bad (_("inappropriate arguments for opcode `%s'"), opname); 1196 else 1197 as_bad (_("opcode `%s' not supported for target %s"), opname, 1198 alpha_target_name); 1199 } 1200 else 1201 as_bad (_("unknown opcode `%s'"), opname); 1202 } 1203 1204 /* Build a BFD section with its flags set appropriately for the .lita, 1205 .lit8, or .lit4 sections. */ 1206 1207 static void 1208 create_literal_section (const char *name, 1209 segT *secp, 1210 symbolS **symp) 1211 { 1212 segT current_section = now_seg; 1213 int current_subsec = now_subseg; 1214 segT new_sec; 1215 1216 *secp = new_sec = subseg_new (name, 0); 1217 subseg_set (current_section, current_subsec); 1218 bfd_set_section_alignment (stdoutput, new_sec, 4); 1219 bfd_set_section_flags (stdoutput, new_sec, 1220 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY 1221 | SEC_DATA); 1222 1223 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec)); 1224 } 1225 1226 /* Load a (partial) expression into a target register. 1227 1228 If poffset is not null, after the call it will either contain 1229 O_constant 0, or a 16-bit offset appropriate for any MEM format 1230 instruction. In addition, pbasereg will be modified to point to 1231 the base register to use in that MEM format instruction. 1232 1233 In any case, *pbasereg should contain a base register to add to the 1234 expression. This will normally be either AXP_REG_ZERO or 1235 alpha_gp_register. Symbol addresses will always be loaded via $gp, 1236 so "foo($0)" is interpreted as adding the address of foo to $0; 1237 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps, 1238 but this is what OSF/1 does. 1239 1240 If explicit relocations of the form !literal!<number> are allowed, 1241 and used, then explicit_reloc with be an expression pointer. 1242 1243 Finally, the return value is nonzero if the calling macro may emit 1244 a LITUSE reloc if otherwise appropriate; the return value is the 1245 sequence number to use. */ 1246 1247 static long 1248 load_expression (int targreg, 1249 const expressionS *exp, 1250 int *pbasereg, 1251 expressionS *poffset, 1252 const char *opname) 1253 { 1254 long emit_lituse = 0; 1255 offsetT addend = exp->X_add_number; 1256 int basereg = *pbasereg; 1257 struct alpha_insn insn; 1258 expressionS newtok[3]; 1259 1260 switch (exp->X_op) 1261 { 1262 case O_symbol: 1263 { 1264 #ifdef OBJ_ECOFF 1265 offsetT lit; 1266 1267 /* Attempt to reduce .lit load by splitting the offset from 1268 its symbol when possible, but don't create a situation in 1269 which we'd fail. */ 1270 if (!range_signed_32 (addend) && 1271 (alpha_noat_on || targreg == AXP_REG_AT)) 1272 { 1273 lit = add_to_literal_pool (exp->X_add_symbol, addend, 1274 alpha_lita_section, 8); 1275 addend = 0; 1276 } 1277 else 1278 lit = add_to_literal_pool (exp->X_add_symbol, 0, 1279 alpha_lita_section, 8); 1280 1281 if (lit >= 0x8000) 1282 as_fatal (_("overflow in literal (.lita) table")); 1283 1284 /* Emit "ldq r, lit(gp)". */ 1285 1286 if (basereg != alpha_gp_register && targreg == basereg) 1287 { 1288 if (alpha_noat_on) 1289 as_bad (_("macro requires $at register while noat in effect")); 1290 if (targreg == AXP_REG_AT) 1291 as_bad (_("macro requires $at while $at in use")); 1292 1293 set_tok_reg (newtok[0], AXP_REG_AT); 1294 } 1295 else 1296 set_tok_reg (newtok[0], targreg); 1297 1298 set_tok_sym (newtok[1], alpha_lita_symbol, lit); 1299 set_tok_preg (newtok[2], alpha_gp_register); 1300 1301 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1302 1303 gas_assert (insn.nfixups == 1); 1304 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; 1305 insn.sequence = emit_lituse = next_sequence_num--; 1306 #endif /* OBJ_ECOFF */ 1307 #ifdef OBJ_ELF 1308 /* Emit "ldq r, gotoff(gp)". */ 1309 1310 if (basereg != alpha_gp_register && targreg == basereg) 1311 { 1312 if (alpha_noat_on) 1313 as_bad (_("macro requires $at register while noat in effect")); 1314 if (targreg == AXP_REG_AT) 1315 as_bad (_("macro requires $at while $at in use")); 1316 1317 set_tok_reg (newtok[0], AXP_REG_AT); 1318 } 1319 else 1320 set_tok_reg (newtok[0], targreg); 1321 1322 /* XXX: Disable this .got minimizing optimization so that we can get 1323 better instruction offset knowledge in the compiler. This happens 1324 very infrequently anyway. */ 1325 if (1 1326 || (!range_signed_32 (addend) 1327 && (alpha_noat_on || targreg == AXP_REG_AT))) 1328 { 1329 newtok[1] = *exp; 1330 addend = 0; 1331 } 1332 else 1333 set_tok_sym (newtok[1], exp->X_add_symbol, 0); 1334 1335 set_tok_preg (newtok[2], alpha_gp_register); 1336 1337 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1338 1339 gas_assert (insn.nfixups == 1); 1340 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; 1341 insn.sequence = emit_lituse = next_sequence_num--; 1342 #endif /* OBJ_ELF */ 1343 #ifdef OBJ_EVAX 1344 /* Find symbol or symbol pointer in link section. */ 1345 1346 if (exp->X_add_symbol == alpha_evax_proc->symbol) 1347 { 1348 /* Linkage-relative expression. */ 1349 set_tok_reg (newtok[0], targreg); 1350 1351 if (range_signed_16 (addend)) 1352 { 1353 set_tok_const (newtok[1], addend); 1354 addend = 0; 1355 } 1356 else 1357 { 1358 set_tok_const (newtok[1], 0); 1359 } 1360 set_tok_preg (newtok[2], basereg); 1361 assemble_tokens_to_insn ("lda", newtok, 3, &insn); 1362 } 1363 else 1364 { 1365 const char *symname = S_GET_NAME (exp->X_add_symbol); 1366 const char *ptr1, *ptr2; 1367 int symlen = strlen (symname); 1368 1369 if ((symlen > 4 && 1370 strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0)) 1371 { 1372 /* Access to an item whose address is stored in the linkage 1373 section. Just read the address. */ 1374 set_tok_reg (newtok[0], targreg); 1375 1376 newtok[1] = *exp; 1377 newtok[1].X_op = O_subtract; 1378 newtok[1].X_op_symbol = alpha_evax_proc->symbol; 1379 1380 set_tok_preg (newtok[2], basereg); 1381 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1382 alpha_linkage_symbol = exp->X_add_symbol; 1383 1384 if (poffset) 1385 set_tok_const (*poffset, 0); 1386 1387 if (alpha_flag_replace && targreg == 26) 1388 { 1389 /* Add a NOP fixup for 'ldX $26,YYY..NAME..lk'. */ 1390 char *ensymname; 1391 symbolS *ensym; 1392 1393 /* Build the entry name as 'NAME..en'. */ 1394 ptr1 = strstr (symname, "..") + 2; 1395 if (ptr1 > ptr2) 1396 ptr1 = symname; 1397 ensymname = (char *) alloca (ptr2 - ptr1 + 5); 1398 memcpy (ensymname, ptr1, ptr2 - ptr1); 1399 memcpy (ensymname + (ptr2 - ptr1), "..en", 5); 1400 1401 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); 1402 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP; 1403 ensym = symbol_find_or_make (ensymname); 1404 symbol_mark_used (ensym); 1405 /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH 1406 case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker 1407 Utility Manual. */ 1408 insn.fixups[insn.nfixups].exp.X_op = O_symbol; 1409 insn.fixups[insn.nfixups].exp.X_add_symbol = ensym; 1410 insn.fixups[insn.nfixups].exp.X_add_number = 0; 1411 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; 1412 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; 1413 insn.nfixups++; 1414 1415 /* ??? Force bsym to be instantiated now, as it will be 1416 too late to do so in tc_gen_reloc. */ 1417 symbol_get_bfdsym (exp->X_add_symbol); 1418 } 1419 else if (alpha_flag_replace && targreg == 27) 1420 { 1421 /* Add a lda fixup for 'ldX $27,YYY.NAME..lk+8'. */ 1422 char *psymname; 1423 symbolS *psym; 1424 1425 /* Extract NAME. */ 1426 ptr1 = strstr (symname, "..") + 2; 1427 if (ptr1 > ptr2) 1428 ptr1 = symname; 1429 psymname = (char *) alloca (ptr2 - ptr1 + 1); 1430 memcpy (psymname, ptr1, ptr2 - ptr1); 1431 psymname [ptr2 - ptr1] = 0; 1432 1433 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); 1434 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA; 1435 psym = symbol_find_or_make (psymname); 1436 symbol_mark_used (psym); 1437 insn.fixups[insn.nfixups].exp.X_op = O_subtract; 1438 insn.fixups[insn.nfixups].exp.X_add_symbol = psym; 1439 insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol; 1440 insn.fixups[insn.nfixups].exp.X_add_number = 0; 1441 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; 1442 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; 1443 insn.nfixups++; 1444 } 1445 1446 emit_insn (&insn); 1447 return 0; 1448 } 1449 else 1450 { 1451 /* Not in the linkage section. Put the value into the linkage 1452 section. */ 1453 symbolS *linkexp; 1454 1455 if (!range_signed_32 (addend)) 1456 addend = sign_extend_32 (addend); 1457 linkexp = add_to_link_pool (exp->X_add_symbol, 0); 1458 set_tok_reg (newtok[0], targreg); 1459 set_tok_sym (newtok[1], linkexp, 0); 1460 set_tok_preg (newtok[2], basereg); 1461 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1462 } 1463 } 1464 #endif /* OBJ_EVAX */ 1465 1466 emit_insn (&insn); 1467 1468 #ifndef OBJ_EVAX 1469 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO) 1470 { 1471 /* Emit "addq r, base, r". */ 1472 1473 set_tok_reg (newtok[1], basereg); 1474 set_tok_reg (newtok[2], targreg); 1475 assemble_tokens ("addq", newtok, 3, 0); 1476 } 1477 #endif 1478 basereg = targreg; 1479 } 1480 break; 1481 1482 case O_constant: 1483 break; 1484 1485 case O_subtract: 1486 /* Assume that this difference expression will be resolved to an 1487 absolute value and that that value will fit in 16 bits. */ 1488 1489 set_tok_reg (newtok[0], targreg); 1490 newtok[1] = *exp; 1491 set_tok_preg (newtok[2], basereg); 1492 assemble_tokens (opname, newtok, 3, 0); 1493 1494 if (poffset) 1495 set_tok_const (*poffset, 0); 1496 return 0; 1497 1498 case O_big: 1499 if (exp->X_add_number > 0) 1500 as_bad (_("bignum invalid; zero assumed")); 1501 else 1502 as_bad (_("floating point number invalid; zero assumed")); 1503 addend = 0; 1504 break; 1505 1506 default: 1507 as_bad (_("can't handle expression")); 1508 addend = 0; 1509 break; 1510 } 1511 1512 if (!range_signed_32 (addend)) 1513 { 1514 #ifdef OBJ_EVAX 1515 symbolS *litexp; 1516 #else 1517 offsetT lit; 1518 long seq_num = next_sequence_num--; 1519 #endif 1520 1521 /* For 64-bit addends, just put it in the literal pool. */ 1522 #ifdef OBJ_EVAX 1523 /* Emit "ldq targreg, lit(basereg)". */ 1524 litexp = add_to_link_pool (section_symbol (absolute_section), addend); 1525 set_tok_reg (newtok[0], targreg); 1526 set_tok_sym (newtok[1], litexp, 0); 1527 set_tok_preg (newtok[2], alpha_gp_register); 1528 assemble_tokens ("ldq", newtok, 3, 0); 1529 #else 1530 1531 if (alpha_lit8_section == NULL) 1532 { 1533 create_literal_section (".lit8", 1534 &alpha_lit8_section, 1535 &alpha_lit8_symbol); 1536 1537 #ifdef OBJ_ECOFF 1538 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000, 1539 alpha_lita_section, 8); 1540 if (alpha_lit8_literal >= 0x8000) 1541 as_fatal (_("overflow in literal (.lita) table")); 1542 #endif 1543 } 1544 1545 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000; 1546 if (lit >= 0x8000) 1547 as_fatal (_("overflow in literal (.lit8) table")); 1548 1549 /* Emit "lda litreg, .lit8+0x8000". */ 1550 1551 if (targreg == basereg) 1552 { 1553 if (alpha_noat_on) 1554 as_bad (_("macro requires $at register while noat in effect")); 1555 if (targreg == AXP_REG_AT) 1556 as_bad (_("macro requires $at while $at in use")); 1557 1558 set_tok_reg (newtok[0], AXP_REG_AT); 1559 } 1560 else 1561 set_tok_reg (newtok[0], targreg); 1562 #ifdef OBJ_ECOFF 1563 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal); 1564 #endif 1565 #ifdef OBJ_ELF 1566 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000); 1567 #endif 1568 set_tok_preg (newtok[2], alpha_gp_register); 1569 1570 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1571 1572 gas_assert (insn.nfixups == 1); 1573 #ifdef OBJ_ECOFF 1574 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; 1575 #endif 1576 #ifdef OBJ_ELF 1577 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; 1578 #endif 1579 insn.sequence = seq_num; 1580 1581 emit_insn (&insn); 1582 1583 /* Emit "ldq litreg, lit(litreg)". */ 1584 1585 set_tok_const (newtok[1], lit); 1586 set_tok_preg (newtok[2], newtok[0].X_add_number); 1587 1588 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1589 1590 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 1591 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 1592 insn.fixups[insn.nfixups].exp.X_op = O_absent; 1593 insn.nfixups++; 1594 insn.sequence = seq_num; 1595 emit_lituse = 0; 1596 1597 emit_insn (&insn); 1598 1599 /* Emit "addq litreg, base, target". */ 1600 1601 if (basereg != AXP_REG_ZERO) 1602 { 1603 set_tok_reg (newtok[1], basereg); 1604 set_tok_reg (newtok[2], targreg); 1605 assemble_tokens ("addq", newtok, 3, 0); 1606 } 1607 #endif /* !OBJ_EVAX */ 1608 1609 if (poffset) 1610 set_tok_const (*poffset, 0); 1611 *pbasereg = targreg; 1612 } 1613 else 1614 { 1615 offsetT low, high, extra, tmp; 1616 1617 /* For 32-bit operands, break up the addend. */ 1618 1619 low = sign_extend_16 (addend); 1620 tmp = addend - low; 1621 high = sign_extend_16 (tmp >> 16); 1622 1623 if (tmp - (high << 16)) 1624 { 1625 extra = 0x4000; 1626 tmp -= 0x40000000; 1627 high = sign_extend_16 (tmp >> 16); 1628 } 1629 else 1630 extra = 0; 1631 1632 set_tok_reg (newtok[0], targreg); 1633 set_tok_preg (newtok[2], basereg); 1634 1635 if (extra) 1636 { 1637 /* Emit "ldah r, extra(r). */ 1638 set_tok_const (newtok[1], extra); 1639 assemble_tokens ("ldah", newtok, 3, 0); 1640 set_tok_preg (newtok[2], basereg = targreg); 1641 } 1642 1643 if (high) 1644 { 1645 /* Emit "ldah r, high(r). */ 1646 set_tok_const (newtok[1], high); 1647 assemble_tokens ("ldah", newtok, 3, 0); 1648 basereg = targreg; 1649 set_tok_preg (newtok[2], basereg); 1650 } 1651 1652 if ((low && !poffset) || (!poffset && basereg != targreg)) 1653 { 1654 /* Emit "lda r, low(base)". */ 1655 set_tok_const (newtok[1], low); 1656 assemble_tokens ("lda", newtok, 3, 0); 1657 basereg = targreg; 1658 low = 0; 1659 } 1660 1661 if (poffset) 1662 set_tok_const (*poffset, low); 1663 *pbasereg = basereg; 1664 } 1665 1666 return emit_lituse; 1667 } 1668 1669 /* The lda macro differs from the lda instruction in that it handles 1670 most simple expressions, particularly symbol address loads and 1671 large constants. */ 1672 1673 static void 1674 emit_lda (const expressionS *tok, 1675 int ntok, 1676 const void * unused ATTRIBUTE_UNUSED) 1677 { 1678 int basereg; 1679 1680 if (ntok == 2) 1681 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); 1682 else 1683 basereg = tok[2].X_add_number; 1684 1685 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda"); 1686 } 1687 1688 /* The ldah macro differs from the ldah instruction in that it has $31 1689 as an implied base register. */ 1690 1691 static void 1692 emit_ldah (const expressionS *tok, 1693 int ntok ATTRIBUTE_UNUSED, 1694 const void * unused ATTRIBUTE_UNUSED) 1695 { 1696 expressionS newtok[3]; 1697 1698 newtok[0] = tok[0]; 1699 newtok[1] = tok[1]; 1700 set_tok_preg (newtok[2], AXP_REG_ZERO); 1701 1702 assemble_tokens ("ldah", newtok, 3, 0); 1703 } 1704 1705 /* Called internally to handle all alignment needs. This takes care 1706 of eliding calls to frag_align if'n the cached current alignment 1707 says we've already got it, as well as taking care of the auto-align 1708 feature wrt labels. */ 1709 1710 static void 1711 alpha_align (int n, 1712 char *pfill, 1713 symbolS *label, 1714 int force ATTRIBUTE_UNUSED) 1715 { 1716 if (alpha_current_align >= n) 1717 return; 1718 1719 if (pfill == NULL) 1720 { 1721 if (subseg_text_p (now_seg)) 1722 frag_align_code (n, 0); 1723 else 1724 frag_align (n, 0, 0); 1725 } 1726 else 1727 frag_align (n, *pfill, 0); 1728 1729 alpha_current_align = n; 1730 1731 if (label != NULL && S_GET_SEGMENT (label) == now_seg) 1732 { 1733 symbol_set_frag (label, frag_now); 1734 S_SET_VALUE (label, (valueT) frag_now_fix ()); 1735 } 1736 1737 record_alignment (now_seg, n); 1738 1739 /* ??? If alpha_flag_relax && force && elf, record the requested alignment 1740 in a reloc for the linker to see. */ 1741 } 1742 1743 /* Actually output an instruction with its fixup. */ 1744 1745 static void 1746 emit_insn (struct alpha_insn *insn) 1747 { 1748 char *f; 1749 int i; 1750 1751 /* Take care of alignment duties. */ 1752 if (alpha_auto_align_on && alpha_current_align < 2) 1753 alpha_align (2, (char *) NULL, alpha_insn_label, 0); 1754 if (alpha_current_align > 2) 1755 alpha_current_align = 2; 1756 alpha_insn_label = NULL; 1757 1758 /* Write out the instruction. */ 1759 f = frag_more (4); 1760 md_number_to_chars (f, insn->insn, 4); 1761 1762 #ifdef OBJ_ELF 1763 dwarf2_emit_insn (4); 1764 #endif 1765 1766 /* Apply the fixups in order. */ 1767 for (i = 0; i < insn->nfixups; ++i) 1768 { 1769 const struct alpha_operand *operand = (const struct alpha_operand *) 0; 1770 struct alpha_fixup *fixup = &insn->fixups[i]; 1771 struct alpha_reloc_tag *info = NULL; 1772 int size, pcrel; 1773 fixS *fixP; 1774 1775 /* Some fixups are only used internally and so have no howto. */ 1776 if ((int) fixup->reloc < 0) 1777 { 1778 operand = &alpha_operands[-(int) fixup->reloc]; 1779 size = 4; 1780 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0); 1781 } 1782 else if (fixup->reloc > BFD_RELOC_UNUSED 1783 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16 1784 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16) 1785 { 1786 size = 2; 1787 pcrel = 0; 1788 } 1789 else 1790 { 1791 reloc_howto_type *reloc_howto = 1792 bfd_reloc_type_lookup (stdoutput, 1793 (bfd_reloc_code_real_type) fixup->reloc); 1794 gas_assert (reloc_howto); 1795 1796 size = bfd_get_reloc_size (reloc_howto); 1797 1798 switch (fixup->reloc) 1799 { 1800 #ifdef OBJ_EVAX 1801 case BFD_RELOC_ALPHA_NOP: 1802 case BFD_RELOC_ALPHA_BSR: 1803 case BFD_RELOC_ALPHA_LDA: 1804 case BFD_RELOC_ALPHA_BOH: 1805 break; 1806 #endif 1807 default: 1808 gas_assert (size >= 1 && size <= 4); 1809 } 1810 1811 pcrel = reloc_howto->pc_relative; 1812 } 1813 1814 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size, 1815 &fixup->exp, pcrel, (bfd_reloc_code_real_type) fixup->reloc); 1816 1817 /* Turn off complaints that the addend is too large for some fixups, 1818 and copy in the sequence number for the explicit relocations. */ 1819 switch (fixup->reloc) 1820 { 1821 case BFD_RELOC_ALPHA_HINT: 1822 case BFD_RELOC_GPREL32: 1823 case BFD_RELOC_GPREL16: 1824 case BFD_RELOC_ALPHA_GPREL_HI16: 1825 case BFD_RELOC_ALPHA_GPREL_LO16: 1826 case BFD_RELOC_ALPHA_GOTDTPREL16: 1827 case BFD_RELOC_ALPHA_DTPREL_HI16: 1828 case BFD_RELOC_ALPHA_DTPREL_LO16: 1829 case BFD_RELOC_ALPHA_DTPREL16: 1830 case BFD_RELOC_ALPHA_GOTTPREL16: 1831 case BFD_RELOC_ALPHA_TPREL_HI16: 1832 case BFD_RELOC_ALPHA_TPREL_LO16: 1833 case BFD_RELOC_ALPHA_TPREL16: 1834 fixP->fx_no_overflow = 1; 1835 break; 1836 1837 case BFD_RELOC_ALPHA_GPDISP_HI16: 1838 fixP->fx_no_overflow = 1; 1839 fixP->fx_addsy = section_symbol (now_seg); 1840 fixP->fx_offset = 0; 1841 1842 info = get_alpha_reloc_tag (insn->sequence); 1843 if (++info->n_master > 1) 1844 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence); 1845 if (info->segment != now_seg) 1846 as_bad (_("both insns for !gpdisp!%ld must be in the same section"), 1847 insn->sequence); 1848 fixP->tc_fix_data.info = info; 1849 break; 1850 1851 case BFD_RELOC_ALPHA_GPDISP_LO16: 1852 fixP->fx_no_overflow = 1; 1853 1854 info = get_alpha_reloc_tag (insn->sequence); 1855 if (++info->n_slaves > 1) 1856 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence); 1857 if (info->segment != now_seg) 1858 as_bad (_("both insns for !gpdisp!%ld must be in the same section"), 1859 insn->sequence); 1860 fixP->tc_fix_data.info = info; 1861 info->slaves = fixP; 1862 break; 1863 1864 case BFD_RELOC_ALPHA_LITERAL: 1865 case BFD_RELOC_ALPHA_ELF_LITERAL: 1866 fixP->fx_no_overflow = 1; 1867 1868 if (insn->sequence == 0) 1869 break; 1870 info = get_alpha_reloc_tag (insn->sequence); 1871 info->master = fixP; 1872 info->n_master++; 1873 if (info->segment != now_seg) 1874 info->multi_section_p = 1; 1875 fixP->tc_fix_data.info = info; 1876 break; 1877 1878 #ifdef RELOC_OP_P 1879 case DUMMY_RELOC_LITUSE_ADDR: 1880 fixP->fx_offset = LITUSE_ALPHA_ADDR; 1881 goto do_lituse; 1882 case DUMMY_RELOC_LITUSE_BASE: 1883 fixP->fx_offset = LITUSE_ALPHA_BASE; 1884 goto do_lituse; 1885 case DUMMY_RELOC_LITUSE_BYTOFF: 1886 fixP->fx_offset = LITUSE_ALPHA_BYTOFF; 1887 goto do_lituse; 1888 case DUMMY_RELOC_LITUSE_JSR: 1889 fixP->fx_offset = LITUSE_ALPHA_JSR; 1890 goto do_lituse; 1891 case DUMMY_RELOC_LITUSE_TLSGD: 1892 fixP->fx_offset = LITUSE_ALPHA_TLSGD; 1893 goto do_lituse; 1894 case DUMMY_RELOC_LITUSE_TLSLDM: 1895 fixP->fx_offset = LITUSE_ALPHA_TLSLDM; 1896 goto do_lituse; 1897 case DUMMY_RELOC_LITUSE_JSRDIRECT: 1898 fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT; 1899 goto do_lituse; 1900 do_lituse: 1901 fixP->fx_addsy = section_symbol (now_seg); 1902 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE; 1903 1904 info = get_alpha_reloc_tag (insn->sequence); 1905 if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD) 1906 info->saw_lu_tlsgd = 1; 1907 else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM) 1908 info->saw_lu_tlsldm = 1; 1909 if (++info->n_slaves > 1) 1910 { 1911 if (info->saw_lu_tlsgd) 1912 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"), 1913 insn->sequence); 1914 else if (info->saw_lu_tlsldm) 1915 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"), 1916 insn->sequence); 1917 } 1918 fixP->tc_fix_data.info = info; 1919 fixP->tc_fix_data.next_reloc = info->slaves; 1920 info->slaves = fixP; 1921 if (info->segment != now_seg) 1922 info->multi_section_p = 1; 1923 break; 1924 1925 case BFD_RELOC_ALPHA_TLSGD: 1926 fixP->fx_no_overflow = 1; 1927 1928 if (insn->sequence == 0) 1929 break; 1930 info = get_alpha_reloc_tag (insn->sequence); 1931 if (info->saw_tlsgd) 1932 as_bad (_("duplicate !tlsgd!%ld"), insn->sequence); 1933 else if (info->saw_tlsldm) 1934 as_bad (_("sequence number in use for !tlsldm!%ld"), 1935 insn->sequence); 1936 else 1937 info->saw_tlsgd = 1; 1938 fixP->tc_fix_data.info = info; 1939 break; 1940 1941 case BFD_RELOC_ALPHA_TLSLDM: 1942 fixP->fx_no_overflow = 1; 1943 1944 if (insn->sequence == 0) 1945 break; 1946 info = get_alpha_reloc_tag (insn->sequence); 1947 if (info->saw_tlsldm) 1948 as_bad (_("duplicate !tlsldm!%ld"), insn->sequence); 1949 else if (info->saw_tlsgd) 1950 as_bad (_("sequence number in use for !tlsgd!%ld"), 1951 insn->sequence); 1952 else 1953 info->saw_tlsldm = 1; 1954 fixP->tc_fix_data.info = info; 1955 break; 1956 #endif 1957 #ifdef OBJ_EVAX 1958 case BFD_RELOC_ALPHA_NOP: 1959 case BFD_RELOC_ALPHA_LDA: 1960 case BFD_RELOC_ALPHA_BSR: 1961 case BFD_RELOC_ALPHA_BOH: 1962 info = get_alpha_reloc_tag (next_sequence_num--); 1963 fixP->tc_fix_data.info = info; 1964 fixP->tc_fix_data.info->sym = fixup->xtrasym; 1965 fixP->tc_fix_data.info->psym = fixup->procsym; 1966 break; 1967 #endif 1968 1969 default: 1970 if ((int) fixup->reloc < 0) 1971 { 1972 if (operand->flags & AXP_OPERAND_NOOVERFLOW) 1973 fixP->fx_no_overflow = 1; 1974 } 1975 break; 1976 } 1977 } 1978 } 1979 1980 /* Insert an operand value into an instruction. */ 1981 1982 static unsigned 1983 insert_operand (unsigned insn, 1984 const struct alpha_operand *operand, 1985 offsetT val, 1986 char *file, 1987 unsigned line) 1988 { 1989 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW)) 1990 { 1991 offsetT min, max; 1992 1993 if (operand->flags & AXP_OPERAND_SIGNED) 1994 { 1995 max = (1 << (operand->bits - 1)) - 1; 1996 min = -(1 << (operand->bits - 1)); 1997 } 1998 else 1999 { 2000 max = (1 << operand->bits) - 1; 2001 min = 0; 2002 } 2003 2004 if (val < min || val > max) 2005 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 2006 } 2007 2008 if (operand->insert) 2009 { 2010 const char *errmsg = NULL; 2011 2012 insn = (*operand->insert) (insn, val, &errmsg); 2013 if (errmsg) 2014 as_warn ("%s", errmsg); 2015 } 2016 else 2017 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift); 2018 2019 return insn; 2020 } 2021 2022 /* Turn an opcode description and a set of arguments into 2023 an instruction and a fixup. */ 2024 2025 static void 2026 assemble_insn (const struct alpha_opcode *opcode, 2027 const expressionS *tok, 2028 int ntok, 2029 struct alpha_insn *insn, 2030 extended_bfd_reloc_code_real_type reloc) 2031 { 2032 const struct alpha_operand *reloc_operand = NULL; 2033 const expressionS *reloc_exp = NULL; 2034 const unsigned char *argidx; 2035 unsigned image; 2036 int tokidx = 0; 2037 2038 memset (insn, 0, sizeof (*insn)); 2039 image = opcode->opcode; 2040 2041 for (argidx = opcode->operands; *argidx; ++argidx) 2042 { 2043 const struct alpha_operand *operand = &alpha_operands[*argidx]; 2044 const expressionS *t = (const expressionS *) 0; 2045 2046 if (operand->flags & AXP_OPERAND_FAKE) 2047 { 2048 /* Fake operands take no value and generate no fixup. */ 2049 image = insert_operand (image, operand, 0, NULL, 0); 2050 continue; 2051 } 2052 2053 if (tokidx >= ntok) 2054 { 2055 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK) 2056 { 2057 case AXP_OPERAND_DEFAULT_FIRST: 2058 t = &tok[0]; 2059 break; 2060 case AXP_OPERAND_DEFAULT_SECOND: 2061 t = &tok[1]; 2062 break; 2063 case AXP_OPERAND_DEFAULT_ZERO: 2064 { 2065 static expressionS zero_exp; 2066 t = &zero_exp; 2067 zero_exp.X_op = O_constant; 2068 zero_exp.X_unsigned = 1; 2069 } 2070 break; 2071 default: 2072 abort (); 2073 } 2074 } 2075 else 2076 t = &tok[tokidx++]; 2077 2078 switch (t->X_op) 2079 { 2080 case O_register: 2081 case O_pregister: 2082 case O_cpregister: 2083 image = insert_operand (image, operand, regno (t->X_add_number), 2084 NULL, 0); 2085 break; 2086 2087 case O_constant: 2088 image = insert_operand (image, operand, t->X_add_number, NULL, 0); 2089 gas_assert (reloc_operand == NULL); 2090 reloc_operand = operand; 2091 reloc_exp = t; 2092 break; 2093 2094 default: 2095 /* This is only 0 for fields that should contain registers, 2096 which means this pattern shouldn't have matched. */ 2097 if (operand->default_reloc == 0) 2098 abort (); 2099 2100 /* There is one special case for which an insn receives two 2101 relocations, and thus the user-supplied reloc does not 2102 override the operand reloc. */ 2103 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT) 2104 { 2105 struct alpha_fixup *fixup; 2106 2107 if (insn->nfixups >= MAX_INSN_FIXUPS) 2108 as_fatal (_("too many fixups")); 2109 2110 fixup = &insn->fixups[insn->nfixups++]; 2111 fixup->exp = *t; 2112 fixup->reloc = BFD_RELOC_ALPHA_HINT; 2113 } 2114 else 2115 { 2116 if (reloc == BFD_RELOC_UNUSED) 2117 reloc = operand->default_reloc; 2118 2119 gas_assert (reloc_operand == NULL); 2120 reloc_operand = operand; 2121 reloc_exp = t; 2122 } 2123 break; 2124 } 2125 } 2126 2127 if (reloc != BFD_RELOC_UNUSED) 2128 { 2129 struct alpha_fixup *fixup; 2130 2131 if (insn->nfixups >= MAX_INSN_FIXUPS) 2132 as_fatal (_("too many fixups")); 2133 2134 /* ??? My but this is hacky. But the OSF/1 assembler uses the same 2135 relocation tag for both ldah and lda with gpdisp. Choose the 2136 correct internal relocation based on the opcode. */ 2137 if (reloc == BFD_RELOC_ALPHA_GPDISP) 2138 { 2139 if (strcmp (opcode->name, "ldah") == 0) 2140 reloc = BFD_RELOC_ALPHA_GPDISP_HI16; 2141 else if (strcmp (opcode->name, "lda") == 0) 2142 reloc = BFD_RELOC_ALPHA_GPDISP_LO16; 2143 else 2144 as_bad (_("invalid relocation for instruction")); 2145 } 2146 2147 /* If this is a real relocation (as opposed to a lituse hint), then 2148 the relocation width should match the operand width. 2149 Take care of -MDISP in operand table. */ 2150 else if (reloc < BFD_RELOC_UNUSED && reloc > 0) 2151 { 2152 reloc_howto_type *reloc_howto 2153 = bfd_reloc_type_lookup (stdoutput, 2154 (bfd_reloc_code_real_type) reloc); 2155 if (reloc_operand == NULL 2156 || reloc_howto->bitsize != reloc_operand->bits) 2157 { 2158 as_bad (_("invalid relocation for field")); 2159 return; 2160 } 2161 } 2162 2163 fixup = &insn->fixups[insn->nfixups++]; 2164 if (reloc_exp) 2165 fixup->exp = *reloc_exp; 2166 else 2167 fixup->exp.X_op = O_absent; 2168 fixup->reloc = reloc; 2169 } 2170 2171 insn->insn = image; 2172 } 2173 2174 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u, 2175 etc. They differ from the real instructions in that they do simple 2176 expressions like the lda macro. */ 2177 2178 static void 2179 emit_ir_load (const expressionS *tok, 2180 int ntok, 2181 const void * opname) 2182 { 2183 int basereg; 2184 long lituse; 2185 expressionS newtok[3]; 2186 struct alpha_insn insn; 2187 const char *symname 2188 = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): ""; 2189 int symlen = strlen (symname); 2190 2191 if (ntok == 2) 2192 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); 2193 else 2194 basereg = tok[2].X_add_number; 2195 2196 lituse = load_expression (tok[0].X_add_number, &tok[1], 2197 &basereg, &newtok[1], (const char *) opname); 2198 2199 if (basereg == alpha_gp_register && 2200 (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0)) 2201 return; 2202 2203 newtok[0] = tok[0]; 2204 set_tok_preg (newtok[2], basereg); 2205 2206 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); 2207 2208 if (lituse) 2209 { 2210 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2211 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2212 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2213 insn.nfixups++; 2214 insn.sequence = lituse; 2215 } 2216 2217 emit_insn (&insn); 2218 } 2219 2220 /* Handle fp register loads, and both integer and fp register stores. 2221 Again, we handle simple expressions. */ 2222 2223 static void 2224 emit_loadstore (const expressionS *tok, 2225 int ntok, 2226 const void * opname) 2227 { 2228 int basereg; 2229 long lituse; 2230 expressionS newtok[3]; 2231 struct alpha_insn insn; 2232 2233 if (ntok == 2) 2234 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); 2235 else 2236 basereg = tok[2].X_add_number; 2237 2238 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number)) 2239 { 2240 if (alpha_noat_on) 2241 as_bad (_("macro requires $at register while noat in effect")); 2242 2243 lituse = load_expression (AXP_REG_AT, &tok[1], 2244 &basereg, &newtok[1], (const char *) opname); 2245 } 2246 else 2247 { 2248 newtok[1] = tok[1]; 2249 lituse = 0; 2250 } 2251 2252 newtok[0] = tok[0]; 2253 set_tok_preg (newtok[2], basereg); 2254 2255 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); 2256 2257 if (lituse) 2258 { 2259 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2260 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2261 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2262 insn.nfixups++; 2263 insn.sequence = lituse; 2264 } 2265 2266 emit_insn (&insn); 2267 } 2268 2269 /* Load a half-word or byte as an unsigned value. */ 2270 2271 static void 2272 emit_ldXu (const expressionS *tok, 2273 int ntok, 2274 const void * vlgsize) 2275 { 2276 if (alpha_target & AXP_OPCODE_BWX) 2277 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]); 2278 else 2279 { 2280 expressionS newtok[3]; 2281 struct alpha_insn insn; 2282 int basereg; 2283 long lituse; 2284 2285 if (alpha_noat_on) 2286 as_bad (_("macro requires $at register while noat in effect")); 2287 2288 if (ntok == 2) 2289 basereg = (tok[1].X_op == O_constant 2290 ? AXP_REG_ZERO : alpha_gp_register); 2291 else 2292 basereg = tok[2].X_add_number; 2293 2294 /* Emit "lda $at, exp". */ 2295 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); 2296 2297 /* Emit "ldq_u targ, 0($at)". */ 2298 newtok[0] = tok[0]; 2299 set_tok_const (newtok[1], 0); 2300 set_tok_preg (newtok[2], basereg); 2301 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); 2302 2303 if (lituse) 2304 { 2305 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2306 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2307 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2308 insn.nfixups++; 2309 insn.sequence = lituse; 2310 } 2311 2312 emit_insn (&insn); 2313 2314 /* Emit "extXl targ, $at, targ". */ 2315 set_tok_reg (newtok[1], basereg); 2316 newtok[2] = newtok[0]; 2317 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn); 2318 2319 if (lituse) 2320 { 2321 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2322 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; 2323 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2324 insn.nfixups++; 2325 insn.sequence = lituse; 2326 } 2327 2328 emit_insn (&insn); 2329 } 2330 } 2331 2332 /* Load a half-word or byte as a signed value. */ 2333 2334 static void 2335 emit_ldX (const expressionS *tok, 2336 int ntok, 2337 const void * vlgsize) 2338 { 2339 emit_ldXu (tok, ntok, vlgsize); 2340 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); 2341 } 2342 2343 /* Load an integral value from an unaligned address as an unsigned 2344 value. */ 2345 2346 static void 2347 emit_uldXu (const expressionS *tok, 2348 int ntok, 2349 const void * vlgsize) 2350 { 2351 long lgsize = (long) vlgsize; 2352 expressionS newtok[3]; 2353 2354 if (alpha_noat_on) 2355 as_bad (_("macro requires $at register while noat in effect")); 2356 2357 /* Emit "lda $at, exp". */ 2358 memcpy (newtok, tok, sizeof (expressionS) * ntok); 2359 newtok[0].X_add_number = AXP_REG_AT; 2360 assemble_tokens ("lda", newtok, ntok, 1); 2361 2362 /* Emit "ldq_u $t9, 0($at)". */ 2363 set_tok_reg (newtok[0], AXP_REG_T9); 2364 set_tok_const (newtok[1], 0); 2365 set_tok_preg (newtok[2], AXP_REG_AT); 2366 assemble_tokens ("ldq_u", newtok, 3, 1); 2367 2368 /* Emit "ldq_u $t10, size-1($at)". */ 2369 set_tok_reg (newtok[0], AXP_REG_T10); 2370 set_tok_const (newtok[1], (1 << lgsize) - 1); 2371 assemble_tokens ("ldq_u", newtok, 3, 1); 2372 2373 /* Emit "extXl $t9, $at, $t9". */ 2374 set_tok_reg (newtok[0], AXP_REG_T9); 2375 set_tok_reg (newtok[1], AXP_REG_AT); 2376 set_tok_reg (newtok[2], AXP_REG_T9); 2377 assemble_tokens (extXl_op[lgsize], newtok, 3, 1); 2378 2379 /* Emit "extXh $t10, $at, $t10". */ 2380 set_tok_reg (newtok[0], AXP_REG_T10); 2381 set_tok_reg (newtok[2], AXP_REG_T10); 2382 assemble_tokens (extXh_op[lgsize], newtok, 3, 1); 2383 2384 /* Emit "or $t9, $t10, targ". */ 2385 set_tok_reg (newtok[0], AXP_REG_T9); 2386 set_tok_reg (newtok[1], AXP_REG_T10); 2387 newtok[2] = tok[0]; 2388 assemble_tokens ("or", newtok, 3, 1); 2389 } 2390 2391 /* Load an integral value from an unaligned address as a signed value. 2392 Note that quads should get funneled to the unsigned load since we 2393 don't have to do the sign extension. */ 2394 2395 static void 2396 emit_uldX (const expressionS *tok, 2397 int ntok, 2398 const void * vlgsize) 2399 { 2400 emit_uldXu (tok, ntok, vlgsize); 2401 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); 2402 } 2403 2404 /* Implement the ldil macro. */ 2405 2406 static void 2407 emit_ldil (const expressionS *tok, 2408 int ntok, 2409 const void * unused ATTRIBUTE_UNUSED) 2410 { 2411 expressionS newtok[2]; 2412 2413 memcpy (newtok, tok, sizeof (newtok)); 2414 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number); 2415 2416 assemble_tokens ("lda", newtok, ntok, 1); 2417 } 2418 2419 /* Store a half-word or byte. */ 2420 2421 static void 2422 emit_stX (const expressionS *tok, 2423 int ntok, 2424 const void * vlgsize) 2425 { 2426 int lgsize = (int) (long) vlgsize; 2427 2428 if (alpha_target & AXP_OPCODE_BWX) 2429 emit_loadstore (tok, ntok, stX_op[lgsize]); 2430 else 2431 { 2432 expressionS newtok[3]; 2433 struct alpha_insn insn; 2434 int basereg; 2435 long lituse; 2436 2437 if (alpha_noat_on) 2438 as_bad (_("macro requires $at register while noat in effect")); 2439 2440 if (ntok == 2) 2441 basereg = (tok[1].X_op == O_constant 2442 ? AXP_REG_ZERO : alpha_gp_register); 2443 else 2444 basereg = tok[2].X_add_number; 2445 2446 /* Emit "lda $at, exp". */ 2447 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); 2448 2449 /* Emit "ldq_u $t9, 0($at)". */ 2450 set_tok_reg (newtok[0], AXP_REG_T9); 2451 set_tok_const (newtok[1], 0); 2452 set_tok_preg (newtok[2], basereg); 2453 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); 2454 2455 if (lituse) 2456 { 2457 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2458 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2459 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2460 insn.nfixups++; 2461 insn.sequence = lituse; 2462 } 2463 2464 emit_insn (&insn); 2465 2466 /* Emit "insXl src, $at, $t10". */ 2467 newtok[0] = tok[0]; 2468 set_tok_reg (newtok[1], basereg); 2469 set_tok_reg (newtok[2], AXP_REG_T10); 2470 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn); 2471 2472 if (lituse) 2473 { 2474 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2475 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; 2476 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2477 insn.nfixups++; 2478 insn.sequence = lituse; 2479 } 2480 2481 emit_insn (&insn); 2482 2483 /* Emit "mskXl $t9, $at, $t9". */ 2484 set_tok_reg (newtok[0], AXP_REG_T9); 2485 newtok[2] = newtok[0]; 2486 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn); 2487 2488 if (lituse) 2489 { 2490 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2491 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; 2492 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2493 insn.nfixups++; 2494 insn.sequence = lituse; 2495 } 2496 2497 emit_insn (&insn); 2498 2499 /* Emit "or $t9, $t10, $t9". */ 2500 set_tok_reg (newtok[1], AXP_REG_T10); 2501 assemble_tokens ("or", newtok, 3, 1); 2502 2503 /* Emit "stq_u $t9, 0($at). */ 2504 set_tok_const(newtok[1], 0); 2505 set_tok_preg (newtok[2], AXP_REG_AT); 2506 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn); 2507 2508 if (lituse) 2509 { 2510 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2511 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2512 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2513 insn.nfixups++; 2514 insn.sequence = lituse; 2515 } 2516 2517 emit_insn (&insn); 2518 } 2519 } 2520 2521 /* Store an integer to an unaligned address. */ 2522 2523 static void 2524 emit_ustX (const expressionS *tok, 2525 int ntok, 2526 const void * vlgsize) 2527 { 2528 int lgsize = (int) (long) vlgsize; 2529 expressionS newtok[3]; 2530 2531 /* Emit "lda $at, exp". */ 2532 memcpy (newtok, tok, sizeof (expressionS) * ntok); 2533 newtok[0].X_add_number = AXP_REG_AT; 2534 assemble_tokens ("lda", newtok, ntok, 1); 2535 2536 /* Emit "ldq_u $9, 0($at)". */ 2537 set_tok_reg (newtok[0], AXP_REG_T9); 2538 set_tok_const (newtok[1], 0); 2539 set_tok_preg (newtok[2], AXP_REG_AT); 2540 assemble_tokens ("ldq_u", newtok, 3, 1); 2541 2542 /* Emit "ldq_u $10, size-1($at)". */ 2543 set_tok_reg (newtok[0], AXP_REG_T10); 2544 set_tok_const (newtok[1], (1 << lgsize) - 1); 2545 assemble_tokens ("ldq_u", newtok, 3, 1); 2546 2547 /* Emit "insXl src, $at, $t11". */ 2548 newtok[0] = tok[0]; 2549 set_tok_reg (newtok[1], AXP_REG_AT); 2550 set_tok_reg (newtok[2], AXP_REG_T11); 2551 assemble_tokens (insXl_op[lgsize], newtok, 3, 1); 2552 2553 /* Emit "insXh src, $at, $t12". */ 2554 set_tok_reg (newtok[2], AXP_REG_T12); 2555 assemble_tokens (insXh_op[lgsize], newtok, 3, 1); 2556 2557 /* Emit "mskXl $t9, $at, $t9". */ 2558 set_tok_reg (newtok[0], AXP_REG_T9); 2559 newtok[2] = newtok[0]; 2560 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1); 2561 2562 /* Emit "mskXh $t10, $at, $t10". */ 2563 set_tok_reg (newtok[0], AXP_REG_T10); 2564 newtok[2] = newtok[0]; 2565 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1); 2566 2567 /* Emit "or $t9, $t11, $t9". */ 2568 set_tok_reg (newtok[0], AXP_REG_T9); 2569 set_tok_reg (newtok[1], AXP_REG_T11); 2570 newtok[2] = newtok[0]; 2571 assemble_tokens ("or", newtok, 3, 1); 2572 2573 /* Emit "or $t10, $t12, $t10". */ 2574 set_tok_reg (newtok[0], AXP_REG_T10); 2575 set_tok_reg (newtok[1], AXP_REG_T12); 2576 newtok[2] = newtok[0]; 2577 assemble_tokens ("or", newtok, 3, 1); 2578 2579 /* Emit "stq_u $t10, size-1($at)". */ 2580 set_tok_reg (newtok[0], AXP_REG_T10); 2581 set_tok_const (newtok[1], (1 << lgsize) - 1); 2582 set_tok_preg (newtok[2], AXP_REG_AT); 2583 assemble_tokens ("stq_u", newtok, 3, 1); 2584 2585 /* Emit "stq_u $t9, 0($at)". */ 2586 set_tok_reg (newtok[0], AXP_REG_T9); 2587 set_tok_const (newtok[1], 0); 2588 assemble_tokens ("stq_u", newtok, 3, 1); 2589 } 2590 2591 /* Sign extend a half-word or byte. The 32-bit sign extend is 2592 implemented as "addl $31, $r, $t" in the opcode table. */ 2593 2594 static void 2595 emit_sextX (const expressionS *tok, 2596 int ntok, 2597 const void * vlgsize) 2598 { 2599 long lgsize = (long) vlgsize; 2600 2601 if (alpha_target & AXP_OPCODE_BWX) 2602 assemble_tokens (sextX_op[lgsize], tok, ntok, 0); 2603 else 2604 { 2605 int bitshift = 64 - 8 * (1 << lgsize); 2606 expressionS newtok[3]; 2607 2608 /* Emit "sll src,bits,dst". */ 2609 newtok[0] = tok[0]; 2610 set_tok_const (newtok[1], bitshift); 2611 newtok[2] = tok[ntok - 1]; 2612 assemble_tokens ("sll", newtok, 3, 1); 2613 2614 /* Emit "sra dst,bits,dst". */ 2615 newtok[0] = newtok[2]; 2616 assemble_tokens ("sra", newtok, 3, 1); 2617 } 2618 } 2619 2620 /* Implement the division and modulus macros. */ 2621 2622 #ifdef OBJ_EVAX 2623 2624 /* Make register usage like in normal procedure call. 2625 Don't clobber PV and RA. */ 2626 2627 static void 2628 emit_division (const expressionS *tok, 2629 int ntok, 2630 const void * symname) 2631 { 2632 /* DIVISION and MODULUS. Yech. 2633 2634 Convert 2635 OP x,y,result 2636 to 2637 mov x,R16 # if x != R16 2638 mov y,R17 # if y != R17 2639 lda AT,__OP 2640 jsr AT,(AT),0 2641 mov R0,result 2642 2643 with appropriate optimizations if R0,R16,R17 are the registers 2644 specified by the compiler. */ 2645 2646 int xr, yr, rr; 2647 symbolS *sym; 2648 expressionS newtok[3]; 2649 2650 xr = regno (tok[0].X_add_number); 2651 yr = regno (tok[1].X_add_number); 2652 2653 if (ntok < 3) 2654 rr = xr; 2655 else 2656 rr = regno (tok[2].X_add_number); 2657 2658 /* Move the operands into the right place. */ 2659 if (yr == AXP_REG_R16 && xr == AXP_REG_R17) 2660 { 2661 /* They are in exactly the wrong order -- swap through AT. */ 2662 if (alpha_noat_on) 2663 as_bad (_("macro requires $at register while noat in effect")); 2664 2665 set_tok_reg (newtok[0], AXP_REG_R16); 2666 set_tok_reg (newtok[1], AXP_REG_AT); 2667 assemble_tokens ("mov", newtok, 2, 1); 2668 2669 set_tok_reg (newtok[0], AXP_REG_R17); 2670 set_tok_reg (newtok[1], AXP_REG_R16); 2671 assemble_tokens ("mov", newtok, 2, 1); 2672 2673 set_tok_reg (newtok[0], AXP_REG_AT); 2674 set_tok_reg (newtok[1], AXP_REG_R17); 2675 assemble_tokens ("mov", newtok, 2, 1); 2676 } 2677 else 2678 { 2679 if (yr == AXP_REG_R16) 2680 { 2681 set_tok_reg (newtok[0], AXP_REG_R16); 2682 set_tok_reg (newtok[1], AXP_REG_R17); 2683 assemble_tokens ("mov", newtok, 2, 1); 2684 } 2685 2686 if (xr != AXP_REG_R16) 2687 { 2688 set_tok_reg (newtok[0], xr); 2689 set_tok_reg (newtok[1], AXP_REG_R16); 2690 assemble_tokens ("mov", newtok, 2, 1); 2691 } 2692 2693 if (yr != AXP_REG_R16 && yr != AXP_REG_R17) 2694 { 2695 set_tok_reg (newtok[0], yr); 2696 set_tok_reg (newtok[1], AXP_REG_R17); 2697 assemble_tokens ("mov", newtok, 2, 1); 2698 } 2699 } 2700 2701 sym = symbol_find_or_make ((const char *) symname); 2702 2703 set_tok_reg (newtok[0], AXP_REG_AT); 2704 set_tok_sym (newtok[1], sym, 0); 2705 assemble_tokens ("lda", newtok, 2, 1); 2706 2707 /* Call the division routine. */ 2708 set_tok_reg (newtok[0], AXP_REG_AT); 2709 set_tok_cpreg (newtok[1], AXP_REG_AT); 2710 set_tok_const (newtok[2], 0); 2711 assemble_tokens ("jsr", newtok, 3, 1); 2712 2713 /* Move the result to the right place. */ 2714 if (rr != AXP_REG_R0) 2715 { 2716 set_tok_reg (newtok[0], AXP_REG_R0); 2717 set_tok_reg (newtok[1], rr); 2718 assemble_tokens ("mov", newtok, 2, 1); 2719 } 2720 } 2721 2722 #else /* !OBJ_EVAX */ 2723 2724 static void 2725 emit_division (const expressionS *tok, 2726 int ntok, 2727 const void * symname) 2728 { 2729 /* DIVISION and MODULUS. Yech. 2730 Convert 2731 OP x,y,result 2732 to 2733 lda pv,__OP 2734 mov x,t10 2735 mov y,t11 2736 jsr t9,(pv),__OP 2737 mov t12,result 2738 2739 with appropriate optimizations if t10,t11,t12 are the registers 2740 specified by the compiler. */ 2741 2742 int xr, yr, rr; 2743 symbolS *sym; 2744 expressionS newtok[3]; 2745 2746 xr = regno (tok[0].X_add_number); 2747 yr = regno (tok[1].X_add_number); 2748 2749 if (ntok < 3) 2750 rr = xr; 2751 else 2752 rr = regno (tok[2].X_add_number); 2753 2754 sym = symbol_find_or_make ((const char *) symname); 2755 2756 /* Move the operands into the right place. */ 2757 if (yr == AXP_REG_T10 && xr == AXP_REG_T11) 2758 { 2759 /* They are in exactly the wrong order -- swap through AT. */ 2760 if (alpha_noat_on) 2761 as_bad (_("macro requires $at register while noat in effect")); 2762 2763 set_tok_reg (newtok[0], AXP_REG_T10); 2764 set_tok_reg (newtok[1], AXP_REG_AT); 2765 assemble_tokens ("mov", newtok, 2, 1); 2766 2767 set_tok_reg (newtok[0], AXP_REG_T11); 2768 set_tok_reg (newtok[1], AXP_REG_T10); 2769 assemble_tokens ("mov", newtok, 2, 1); 2770 2771 set_tok_reg (newtok[0], AXP_REG_AT); 2772 set_tok_reg (newtok[1], AXP_REG_T11); 2773 assemble_tokens ("mov", newtok, 2, 1); 2774 } 2775 else 2776 { 2777 if (yr == AXP_REG_T10) 2778 { 2779 set_tok_reg (newtok[0], AXP_REG_T10); 2780 set_tok_reg (newtok[1], AXP_REG_T11); 2781 assemble_tokens ("mov", newtok, 2, 1); 2782 } 2783 2784 if (xr != AXP_REG_T10) 2785 { 2786 set_tok_reg (newtok[0], xr); 2787 set_tok_reg (newtok[1], AXP_REG_T10); 2788 assemble_tokens ("mov", newtok, 2, 1); 2789 } 2790 2791 if (yr != AXP_REG_T10 && yr != AXP_REG_T11) 2792 { 2793 set_tok_reg (newtok[0], yr); 2794 set_tok_reg (newtok[1], AXP_REG_T11); 2795 assemble_tokens ("mov", newtok, 2, 1); 2796 } 2797 } 2798 2799 /* Call the division routine. */ 2800 set_tok_reg (newtok[0], AXP_REG_T9); 2801 set_tok_sym (newtok[1], sym, 0); 2802 assemble_tokens ("jsr", newtok, 2, 1); 2803 2804 /* Reload the GP register. */ 2805 #ifdef OBJ_AOUT 2806 FIXME 2807 #endif 2808 #if defined(OBJ_ECOFF) || defined(OBJ_ELF) 2809 set_tok_reg (newtok[0], alpha_gp_register); 2810 set_tok_const (newtok[1], 0); 2811 set_tok_preg (newtok[2], AXP_REG_T9); 2812 assemble_tokens ("ldgp", newtok, 3, 1); 2813 #endif 2814 2815 /* Move the result to the right place. */ 2816 if (rr != AXP_REG_T12) 2817 { 2818 set_tok_reg (newtok[0], AXP_REG_T12); 2819 set_tok_reg (newtok[1], rr); 2820 assemble_tokens ("mov", newtok, 2, 1); 2821 } 2822 } 2823 2824 #endif /* !OBJ_EVAX */ 2825 2826 /* The jsr and jmp macros differ from their instruction counterparts 2827 in that they can load the target address and default most 2828 everything. */ 2829 2830 static void 2831 emit_jsrjmp (const expressionS *tok, 2832 int ntok, 2833 const void * vopname) 2834 { 2835 const char *opname = (const char *) vopname; 2836 struct alpha_insn insn; 2837 expressionS newtok[3]; 2838 int r, tokidx = 0; 2839 long lituse = 0; 2840 2841 if (tokidx < ntok && tok[tokidx].X_op == O_register) 2842 r = regno (tok[tokidx++].X_add_number); 2843 else 2844 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA; 2845 2846 set_tok_reg (newtok[0], r); 2847 2848 if (tokidx < ntok && 2849 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) 2850 r = regno (tok[tokidx++].X_add_number); 2851 #ifdef OBJ_EVAX 2852 /* Keep register if jsr $n.<sym>. */ 2853 #else 2854 else 2855 { 2856 int basereg = alpha_gp_register; 2857 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], 2858 &basereg, NULL, opname); 2859 } 2860 #endif 2861 2862 set_tok_cpreg (newtok[1], r); 2863 2864 #ifndef OBJ_EVAX 2865 if (tokidx < ntok) 2866 newtok[2] = tok[tokidx]; 2867 else 2868 #endif 2869 set_tok_const (newtok[2], 0); 2870 2871 assemble_tokens_to_insn (opname, newtok, 3, &insn); 2872 2873 if (lituse) 2874 { 2875 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2876 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR; 2877 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2878 insn.nfixups++; 2879 insn.sequence = lituse; 2880 } 2881 2882 #ifdef OBJ_EVAX 2883 if (alpha_flag_replace 2884 && r == AXP_REG_RA 2885 && tok[tokidx].X_add_symbol 2886 && alpha_linkage_symbol) 2887 { 2888 /* Create a BOH reloc for 'jsr $27,NAME'. */ 2889 const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol); 2890 int symlen = strlen (symname); 2891 char *ensymname; 2892 2893 /* Build the entry name as 'NAME..en'. */ 2894 ensymname = (char *) alloca (symlen + 5); 2895 memcpy (ensymname, symname, symlen); 2896 memcpy (ensymname + symlen, "..en", 5); 2897 2898 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2899 if (insn.nfixups > 0) 2900 { 2901 memmove (&insn.fixups[1], &insn.fixups[0], 2902 sizeof(struct alpha_fixup) * insn.nfixups); 2903 } 2904 2905 /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP 2906 case in load_expression. See B.4.5.2 of the OpenVMS 2907 Linker Utility Manual. */ 2908 insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH; 2909 insn.fixups[0].exp.X_op = O_symbol; 2910 insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname); 2911 insn.fixups[0].exp.X_add_number = 0; 2912 insn.fixups[0].xtrasym = alpha_linkage_symbol; 2913 insn.fixups[0].procsym = alpha_evax_proc->symbol; 2914 insn.nfixups++; 2915 alpha_linkage_symbol = 0; 2916 } 2917 #endif 2918 2919 emit_insn (&insn); 2920 } 2921 2922 /* The ret and jcr instructions differ from their instruction 2923 counterparts in that everything can be defaulted. */ 2924 2925 static void 2926 emit_retjcr (const expressionS *tok, 2927 int ntok, 2928 const void * vopname) 2929 { 2930 const char *opname = (const char *) vopname; 2931 expressionS newtok[3]; 2932 int r, tokidx = 0; 2933 2934 if (tokidx < ntok && tok[tokidx].X_op == O_register) 2935 r = regno (tok[tokidx++].X_add_number); 2936 else 2937 r = AXP_REG_ZERO; 2938 2939 set_tok_reg (newtok[0], r); 2940 2941 if (tokidx < ntok && 2942 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) 2943 r = regno (tok[tokidx++].X_add_number); 2944 else 2945 r = AXP_REG_RA; 2946 2947 set_tok_cpreg (newtok[1], r); 2948 2949 if (tokidx < ntok) 2950 newtok[2] = tok[tokidx]; 2951 else 2952 set_tok_const (newtok[2], strcmp (opname, "ret") == 0); 2953 2954 assemble_tokens (opname, newtok, 3, 0); 2955 } 2956 2957 /* Implement the ldgp macro. */ 2958 2959 static void 2960 emit_ldgp (const expressionS *tok ATTRIBUTE_UNUSED, 2961 int ntok ATTRIBUTE_UNUSED, 2962 const void * unused ATTRIBUTE_UNUSED) 2963 { 2964 #ifdef OBJ_AOUT 2965 FIXME 2966 #endif 2967 #if defined(OBJ_ECOFF) || defined(OBJ_ELF) 2968 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)" 2969 with appropriate constants and relocations. */ 2970 struct alpha_insn insn; 2971 expressionS newtok[3]; 2972 expressionS addend; 2973 2974 #ifdef OBJ_ECOFF 2975 if (regno (tok[2].X_add_number) == AXP_REG_PV) 2976 ecoff_set_gp_prolog_size (0); 2977 #endif 2978 2979 newtok[0] = tok[0]; 2980 set_tok_const (newtok[1], 0); 2981 newtok[2] = tok[2]; 2982 2983 assemble_tokens_to_insn ("ldah", newtok, 3, &insn); 2984 2985 addend = tok[1]; 2986 2987 #ifdef OBJ_ECOFF 2988 if (addend.X_op != O_constant) 2989 as_bad (_("can not resolve expression")); 2990 addend.X_op = O_symbol; 2991 addend.X_add_symbol = alpha_gp_symbol; 2992 #endif 2993 2994 insn.nfixups = 1; 2995 insn.fixups[0].exp = addend; 2996 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16; 2997 insn.sequence = next_sequence_num; 2998 2999 emit_insn (&insn); 3000 3001 set_tok_preg (newtok[2], tok[0].X_add_number); 3002 3003 assemble_tokens_to_insn ("lda", newtok, 3, &insn); 3004 3005 #ifdef OBJ_ECOFF 3006 addend.X_add_number += 4; 3007 #endif 3008 3009 insn.nfixups = 1; 3010 insn.fixups[0].exp = addend; 3011 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16; 3012 insn.sequence = next_sequence_num--; 3013 3014 emit_insn (&insn); 3015 #endif /* OBJ_ECOFF || OBJ_ELF */ 3016 } 3017 3018 /* The macro table. */ 3019 3020 static const struct alpha_macro alpha_macros[] = 3021 { 3022 /* Load/Store macros. */ 3023 { "lda", emit_lda, NULL, 3024 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3025 { "ldah", emit_ldah, NULL, 3026 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3027 3028 { "ldl", emit_ir_load, "ldl", 3029 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3030 { "ldl_l", emit_ir_load, "ldl_l", 3031 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3032 { "ldq", emit_ir_load, "ldq", 3033 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3034 { "ldq_l", emit_ir_load, "ldq_l", 3035 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3036 { "ldq_u", emit_ir_load, "ldq_u", 3037 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3038 { "ldf", emit_loadstore, "ldf", 3039 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3040 { "ldg", emit_loadstore, "ldg", 3041 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3042 { "lds", emit_loadstore, "lds", 3043 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3044 { "ldt", emit_loadstore, "ldt", 3045 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3046 3047 { "ldb", emit_ldX, (void *) 0, 3048 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3049 { "ldbu", emit_ldXu, (void *) 0, 3050 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3051 { "ldw", emit_ldX, (void *) 1, 3052 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3053 { "ldwu", emit_ldXu, (void *) 1, 3054 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3055 3056 { "uldw", emit_uldX, (void *) 1, 3057 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3058 { "uldwu", emit_uldXu, (void *) 1, 3059 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3060 { "uldl", emit_uldX, (void *) 2, 3061 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3062 { "uldlu", emit_uldXu, (void *) 2, 3063 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3064 { "uldq", emit_uldXu, (void *) 3, 3065 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3066 3067 { "ldgp", emit_ldgp, NULL, 3068 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } }, 3069 3070 { "ldi", emit_lda, NULL, 3071 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3072 { "ldil", emit_ldil, NULL, 3073 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3074 { "ldiq", emit_lda, NULL, 3075 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3076 3077 { "stl", emit_loadstore, "stl", 3078 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3079 { "stl_c", emit_loadstore, "stl_c", 3080 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3081 { "stq", emit_loadstore, "stq", 3082 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3083 { "stq_c", emit_loadstore, "stq_c", 3084 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3085 { "stq_u", emit_loadstore, "stq_u", 3086 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3087 { "stf", emit_loadstore, "stf", 3088 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3089 { "stg", emit_loadstore, "stg", 3090 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3091 { "sts", emit_loadstore, "sts", 3092 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3093 { "stt", emit_loadstore, "stt", 3094 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3095 3096 { "stb", emit_stX, (void *) 0, 3097 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3098 { "stw", emit_stX, (void *) 1, 3099 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3100 { "ustw", emit_ustX, (void *) 1, 3101 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3102 { "ustl", emit_ustX, (void *) 2, 3103 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3104 { "ustq", emit_ustX, (void *) 3, 3105 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3106 3107 /* Arithmetic macros. */ 3108 3109 { "sextb", emit_sextX, (void *) 0, 3110 { MACRO_IR, MACRO_IR, MACRO_EOA, 3111 MACRO_IR, MACRO_EOA, 3112 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, 3113 { "sextw", emit_sextX, (void *) 1, 3114 { MACRO_IR, MACRO_IR, MACRO_EOA, 3115 MACRO_IR, MACRO_EOA, 3116 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, 3117 3118 { "divl", emit_division, "__divl", 3119 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3120 MACRO_IR, MACRO_IR, MACRO_EOA, 3121 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3122 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3123 { "divlu", emit_division, "__divlu", 3124 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3125 MACRO_IR, MACRO_IR, MACRO_EOA, 3126 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3127 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3128 { "divq", emit_division, "__divq", 3129 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3130 MACRO_IR, MACRO_IR, MACRO_EOA, 3131 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3132 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3133 { "divqu", emit_division, "__divqu", 3134 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3135 MACRO_IR, MACRO_IR, MACRO_EOA, 3136 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3137 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3138 { "reml", emit_division, "__reml", 3139 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3140 MACRO_IR, MACRO_IR, MACRO_EOA, 3141 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3142 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3143 { "remlu", emit_division, "__remlu", 3144 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3145 MACRO_IR, MACRO_IR, MACRO_EOA, 3146 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3147 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3148 { "remq", emit_division, "__remq", 3149 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3150 MACRO_IR, MACRO_IR, MACRO_EOA, 3151 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3152 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3153 { "remqu", emit_division, "__remqu", 3154 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3155 MACRO_IR, MACRO_IR, MACRO_EOA, 3156 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3157 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3158 3159 { "jsr", emit_jsrjmp, "jsr", 3160 { MACRO_PIR, MACRO_EXP, MACRO_EOA, 3161 MACRO_PIR, MACRO_EOA, 3162 MACRO_IR, MACRO_EXP, MACRO_EOA, 3163 MACRO_EXP, MACRO_EOA } }, 3164 { "jmp", emit_jsrjmp, "jmp", 3165 { MACRO_PIR, MACRO_EXP, MACRO_EOA, 3166 MACRO_PIR, MACRO_EOA, 3167 MACRO_IR, MACRO_EXP, MACRO_EOA, 3168 MACRO_EXP, MACRO_EOA } }, 3169 { "ret", emit_retjcr, "ret", 3170 { MACRO_IR, MACRO_EXP, MACRO_EOA, 3171 MACRO_IR, MACRO_EOA, 3172 MACRO_PIR, MACRO_EXP, MACRO_EOA, 3173 MACRO_PIR, MACRO_EOA, 3174 MACRO_EXP, MACRO_EOA, 3175 MACRO_EOA } }, 3176 { "jcr", emit_retjcr, "jcr", 3177 { MACRO_IR, MACRO_EXP, MACRO_EOA, 3178 MACRO_IR, MACRO_EOA, 3179 MACRO_PIR, MACRO_EXP, MACRO_EOA, 3180 MACRO_PIR, MACRO_EOA, 3181 MACRO_EXP, MACRO_EOA, 3182 MACRO_EOA } }, 3183 { "jsr_coroutine", emit_retjcr, "jcr", 3184 { MACRO_IR, MACRO_EXP, MACRO_EOA, 3185 MACRO_IR, MACRO_EOA, 3186 MACRO_PIR, MACRO_EXP, MACRO_EOA, 3187 MACRO_PIR, MACRO_EOA, 3188 MACRO_EXP, MACRO_EOA, 3189 MACRO_EOA } }, 3190 }; 3191 3192 static const unsigned int alpha_num_macros 3193 = sizeof (alpha_macros) / sizeof (*alpha_macros); 3194 3195 /* Search forward through all variants of a macro looking for a syntax 3196 match. */ 3197 3198 static const struct alpha_macro * 3199 find_macro_match (const struct alpha_macro *first_macro, 3200 const expressionS *tok, 3201 int *pntok) 3202 3203 { 3204 const struct alpha_macro *macro = first_macro; 3205 int ntok = *pntok; 3206 3207 do 3208 { 3209 const enum alpha_macro_arg *arg = macro->argsets; 3210 int tokidx = 0; 3211 3212 while (*arg) 3213 { 3214 switch (*arg) 3215 { 3216 case MACRO_EOA: 3217 if (tokidx == ntok) 3218 return macro; 3219 else 3220 tokidx = 0; 3221 break; 3222 3223 /* Index register. */ 3224 case MACRO_IR: 3225 if (tokidx >= ntok || tok[tokidx].X_op != O_register 3226 || !is_ir_num (tok[tokidx].X_add_number)) 3227 goto match_failed; 3228 ++tokidx; 3229 break; 3230 3231 /* Parenthesized index register. */ 3232 case MACRO_PIR: 3233 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister 3234 || !is_ir_num (tok[tokidx].X_add_number)) 3235 goto match_failed; 3236 ++tokidx; 3237 break; 3238 3239 /* Optional parenthesized index register. */ 3240 case MACRO_OPIR: 3241 if (tokidx < ntok && tok[tokidx].X_op == O_pregister 3242 && is_ir_num (tok[tokidx].X_add_number)) 3243 ++tokidx; 3244 break; 3245 3246 /* Leading comma with a parenthesized index register. */ 3247 case MACRO_CPIR: 3248 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister 3249 || !is_ir_num (tok[tokidx].X_add_number)) 3250 goto match_failed; 3251 ++tokidx; 3252 break; 3253 3254 /* Floating point register. */ 3255 case MACRO_FPR: 3256 if (tokidx >= ntok || tok[tokidx].X_op != O_register 3257 || !is_fpr_num (tok[tokidx].X_add_number)) 3258 goto match_failed; 3259 ++tokidx; 3260 break; 3261 3262 /* Normal expression. */ 3263 case MACRO_EXP: 3264 if (tokidx >= ntok) 3265 goto match_failed; 3266 switch (tok[tokidx].X_op) 3267 { 3268 case O_illegal: 3269 case O_absent: 3270 case O_register: 3271 case O_pregister: 3272 case O_cpregister: 3273 case O_literal: 3274 case O_lituse_base: 3275 case O_lituse_bytoff: 3276 case O_lituse_jsr: 3277 case O_gpdisp: 3278 case O_gprelhigh: 3279 case O_gprellow: 3280 case O_gprel: 3281 case O_samegp: 3282 goto match_failed; 3283 3284 default: 3285 break; 3286 } 3287 ++tokidx; 3288 break; 3289 3290 match_failed: 3291 while (*arg != MACRO_EOA) 3292 ++arg; 3293 tokidx = 0; 3294 break; 3295 } 3296 ++arg; 3297 } 3298 } 3299 while (++macro - alpha_macros < (int) alpha_num_macros 3300 && !strcmp (macro->name, first_macro->name)); 3301 3302 return NULL; 3303 } 3304 3305 /* Given an opcode name and a pre-tokenized set of arguments, take the 3306 opcode all the way through emission. */ 3307 3308 static void 3309 assemble_tokens (const char *opname, 3310 const expressionS *tok, 3311 int ntok, 3312 int local_macros_on) 3313 { 3314 int found_something = 0; 3315 const struct alpha_opcode *opcode; 3316 const struct alpha_macro *macro; 3317 int cpumatch = 1; 3318 extended_bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED; 3319 3320 #ifdef RELOC_OP_P 3321 /* If a user-specified relocation is present, this is not a macro. */ 3322 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op)) 3323 { 3324 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc; 3325 ntok--; 3326 } 3327 else 3328 #endif 3329 if (local_macros_on) 3330 { 3331 macro = ((const struct alpha_macro *) 3332 hash_find (alpha_macro_hash, opname)); 3333 if (macro) 3334 { 3335 found_something = 1; 3336 macro = find_macro_match (macro, tok, &ntok); 3337 if (macro) 3338 { 3339 (*macro->emit) (tok, ntok, macro->arg); 3340 return; 3341 } 3342 } 3343 } 3344 3345 /* Search opcodes. */ 3346 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); 3347 if (opcode) 3348 { 3349 found_something = 1; 3350 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); 3351 if (opcode) 3352 { 3353 struct alpha_insn insn; 3354 assemble_insn (opcode, tok, ntok, &insn, reloc); 3355 3356 /* Copy the sequence number for the reloc from the reloc token. */ 3357 if (reloc != BFD_RELOC_UNUSED) 3358 insn.sequence = tok[ntok].X_add_number; 3359 3360 emit_insn (&insn); 3361 return; 3362 } 3363 } 3364 3365 if (found_something) 3366 { 3367 if (cpumatch) 3368 as_bad (_("inappropriate arguments for opcode `%s'"), opname); 3369 else 3370 as_bad (_("opcode `%s' not supported for target %s"), opname, 3371 alpha_target_name); 3372 } 3373 else 3374 as_bad (_("unknown opcode `%s'"), opname); 3375 } 3376 3377 #ifdef OBJ_EVAX 3379 3380 /* Add sym+addend to link pool. 3381 Return offset from curent procedure value (pv) to entry in link pool. 3382 3383 Add new fixup only if offset isn't 16bit. */ 3384 3385 static symbolS * 3386 add_to_link_pool (symbolS *sym, offsetT addend) 3387 { 3388 symbolS *basesym; 3389 segT current_section = now_seg; 3390 int current_subsec = now_subseg; 3391 char *p; 3392 segment_info_type *seginfo = seg_info (alpha_link_section); 3393 fixS *fixp; 3394 symbolS *linksym, *expsym; 3395 expressionS e; 3396 3397 basesym = alpha_evax_proc->symbol; 3398 3399 /* @@ This assumes all entries in a given section will be of the same 3400 size... Probably correct, but unwise to rely on. */ 3401 /* This must always be called with the same subsegment. */ 3402 3403 if (seginfo->frchainP) 3404 for (fixp = seginfo->frchainP->fix_root; 3405 fixp != (fixS *) NULL; 3406 fixp = fixp->fx_next) 3407 { 3408 if (fixp->fx_addsy == sym 3409 && fixp->fx_offset == (valueT)addend 3410 && fixp->tc_fix_data.info 3411 && fixp->tc_fix_data.info->sym 3412 && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym) 3413 return fixp->tc_fix_data.info->sym; 3414 } 3415 3416 /* Not found, add a new entry. */ 3417 subseg_set (alpha_link_section, 0); 3418 linksym = symbol_new 3419 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 3420 p = frag_more (8); 3421 memset (p, 0, 8); 3422 3423 /* Create a symbol for 'basesym - linksym' (offset of the added entry). */ 3424 e.X_op = O_subtract; 3425 e.X_add_symbol = linksym; 3426 e.X_op_symbol = basesym; 3427 e.X_add_number = 0; 3428 expsym = make_expr_symbol (&e); 3429 3430 /* Create a fixup for the entry. */ 3431 fixp = fix_new 3432 (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64); 3433 fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--); 3434 fixp->tc_fix_data.info->sym = expsym; 3435 3436 subseg_set (current_section, current_subsec); 3437 3438 /* Return the symbol. */ 3439 return expsym; 3440 } 3441 #endif /* OBJ_EVAX */ 3442 3443 /* Assembler directives. */ 3445 3446 /* Handle the .text pseudo-op. This is like the usual one, but it 3447 clears alpha_insn_label and restores auto alignment. */ 3448 3449 static void 3450 s_alpha_text (int i) 3451 { 3452 #ifdef OBJ_ELF 3453 obj_elf_text (i); 3454 #else 3455 s_text (i); 3456 #endif 3457 #ifdef OBJ_EVAX 3458 { 3459 symbolS * symbolP; 3460 3461 symbolP = symbol_find (".text"); 3462 if (symbolP == NULL) 3463 { 3464 symbolP = symbol_make (".text"); 3465 S_SET_SEGMENT (symbolP, text_section); 3466 symbol_table_insert (symbolP); 3467 } 3468 } 3469 #endif 3470 alpha_insn_label = NULL; 3471 alpha_auto_align_on = 1; 3472 alpha_current_align = 0; 3473 } 3474 3475 /* Handle the .data pseudo-op. This is like the usual one, but it 3476 clears alpha_insn_label and restores auto alignment. */ 3477 3478 static void 3479 s_alpha_data (int i) 3480 { 3481 #ifdef OBJ_ELF 3482 obj_elf_data (i); 3483 #else 3484 s_data (i); 3485 #endif 3486 alpha_insn_label = NULL; 3487 alpha_auto_align_on = 1; 3488 alpha_current_align = 0; 3489 } 3490 3491 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX) 3492 3493 /* Handle the OSF/1 and openVMS .comm pseudo quirks. */ 3494 3495 static void 3496 s_alpha_comm (int ignore ATTRIBUTE_UNUSED) 3497 { 3498 char *name; 3499 char c; 3500 char *p; 3501 offsetT size; 3502 symbolS *symbolP; 3503 #ifdef OBJ_EVAX 3504 offsetT temp; 3505 int log_align = 0; 3506 #endif 3507 3508 name = input_line_pointer; 3509 c = get_symbol_end (); 3510 3511 /* Just after name is now '\0'. */ 3512 p = input_line_pointer; 3513 *p = c; 3514 3515 SKIP_WHITESPACE (); 3516 3517 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */ 3518 if (*input_line_pointer == ',') 3519 { 3520 input_line_pointer++; 3521 SKIP_WHITESPACE (); 3522 } 3523 if ((size = get_absolute_expression ()) < 0) 3524 { 3525 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 3526 ignore_rest_of_line (); 3527 return; 3528 } 3529 3530 *p = 0; 3531 symbolP = symbol_find_or_make (name); 3532 *p = c; 3533 3534 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 3535 { 3536 as_bad (_("Ignoring attempt to re-define symbol")); 3537 ignore_rest_of_line (); 3538 return; 3539 } 3540 3541 #ifdef OBJ_EVAX 3542 if (*input_line_pointer != ',') 3543 temp = 8; /* Default alignment. */ 3544 else 3545 { 3546 input_line_pointer++; 3547 SKIP_WHITESPACE (); 3548 temp = get_absolute_expression (); 3549 } 3550 3551 /* ??? Unlike on OSF/1, the alignment factor is not in log units. */ 3552 while ((temp >>= 1) != 0) 3553 ++log_align; 3554 3555 if (*input_line_pointer == ',') 3556 { 3557 /* Extended form of the directive 3558 3559 .comm symbol, size, alignment, section 3560 3561 where the "common" semantics is transferred to the section. 3562 The symbol is effectively an alias for the section name. */ 3563 3564 segT sec; 3565 char *sec_name; 3566 symbolS *sec_symbol; 3567 segT current_seg = now_seg; 3568 subsegT current_subseg = now_subseg; 3569 int cur_size; 3570 3571 input_line_pointer++; 3572 SKIP_WHITESPACE (); 3573 sec_name = s_alpha_section_name (); 3574 sec_symbol = symbol_find_or_make (sec_name); 3575 sec = subseg_new (sec_name, 0); 3576 S_SET_SEGMENT (sec_symbol, sec); 3577 symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM; 3578 bfd_vms_set_section_flags (stdoutput, sec, 0, 3579 EGPS__V_OVR | EGPS__V_GBL | EGPS__V_NOMOD); 3580 record_alignment (sec, log_align); 3581 3582 /* Reuse stab_string_size to store the size of the section. */ 3583 cur_size = seg_info (sec)->stabu.stab_string_size; 3584 if ((int) size > cur_size) 3585 { 3586 char *pfrag 3587 = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL, 3588 (valueT)size - (valueT)cur_size, NULL); 3589 *pfrag = 0; 3590 seg_info (sec)->stabu.stab_string_size = (int)size; 3591 } 3592 3593 S_SET_SEGMENT (symbolP, sec); 3594 3595 subseg_set (current_seg, current_subseg); 3596 } 3597 else 3598 { 3599 /* Regular form of the directive 3600 3601 .comm symbol, size, alignment 3602 3603 where the "common" semantics in on the symbol. 3604 These symbols are assembled in the .bss section. */ 3605 3606 char *pfrag; 3607 segT current_seg = now_seg; 3608 subsegT current_subseg = now_subseg; 3609 3610 subseg_set (bss_section, 1); 3611 frag_align (log_align, 0, 0); 3612 record_alignment (bss_section, log_align); 3613 3614 symbol_set_frag (symbolP, frag_now); 3615 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, 3616 size, NULL); 3617 *pfrag = 0; 3618 3619 S_SET_SEGMENT (symbolP, bss_section); 3620 3621 subseg_set (current_seg, current_subseg); 3622 } 3623 #endif 3624 3625 if (S_GET_VALUE (symbolP)) 3626 { 3627 if (S_GET_VALUE (symbolP) != (valueT) size) 3628 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), 3629 S_GET_NAME (symbolP), 3630 (long) S_GET_VALUE (symbolP), 3631 (long) size); 3632 } 3633 else 3634 { 3635 #ifndef OBJ_EVAX 3636 S_SET_VALUE (symbolP, (valueT) size); 3637 #endif 3638 S_SET_EXTERNAL (symbolP); 3639 } 3640 3641 #ifndef OBJ_EVAX 3642 know (symbolP->sy_frag == &zero_address_frag); 3643 #endif 3644 demand_empty_rest_of_line (); 3645 } 3646 3647 #endif /* ! OBJ_ELF */ 3648 3649 #ifdef OBJ_ECOFF 3650 3651 /* Handle the .rdata pseudo-op. This is like the usual one, but it 3652 clears alpha_insn_label and restores auto alignment. */ 3653 3654 static void 3655 s_alpha_rdata (int ignore ATTRIBUTE_UNUSED) 3656 { 3657 get_absolute_expression (); 3658 subseg_new (".rdata", 0); 3659 demand_empty_rest_of_line (); 3660 alpha_insn_label = NULL; 3661 alpha_auto_align_on = 1; 3662 alpha_current_align = 0; 3663 } 3664 3665 #endif 3666 3667 #ifdef OBJ_ECOFF 3668 3669 /* Handle the .sdata pseudo-op. This is like the usual one, but it 3670 clears alpha_insn_label and restores auto alignment. */ 3671 3672 static void 3673 s_alpha_sdata (int ignore ATTRIBUTE_UNUSED) 3674 { 3675 get_absolute_expression (); 3676 subseg_new (".sdata", 0); 3677 demand_empty_rest_of_line (); 3678 alpha_insn_label = NULL; 3679 alpha_auto_align_on = 1; 3680 alpha_current_align = 0; 3681 } 3682 #endif 3683 3684 #ifdef OBJ_ELF 3685 struct alpha_elf_frame_data 3686 { 3687 symbolS *func_sym; 3688 symbolS *func_end_sym; 3689 symbolS *prologue_sym; 3690 unsigned int mask; 3691 unsigned int fmask; 3692 int fp_regno; 3693 int ra_regno; 3694 offsetT frame_size; 3695 offsetT mask_offset; 3696 offsetT fmask_offset; 3697 3698 struct alpha_elf_frame_data *next; 3699 }; 3700 3701 static struct alpha_elf_frame_data *all_frame_data; 3702 static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data; 3703 static struct alpha_elf_frame_data *cur_frame_data; 3704 3705 /* Handle the .section pseudo-op. This is like the usual one, but it 3706 clears alpha_insn_label and restores auto alignment. */ 3707 3708 static void 3709 s_alpha_section (int ignore ATTRIBUTE_UNUSED) 3710 { 3711 obj_elf_section (ignore); 3712 3713 alpha_insn_label = NULL; 3714 alpha_auto_align_on = 1; 3715 alpha_current_align = 0; 3716 } 3717 3718 static void 3719 s_alpha_ent (int dummy ATTRIBUTE_UNUSED) 3720 { 3721 if (ECOFF_DEBUGGING) 3722 ecoff_directive_ent (0); 3723 else 3724 { 3725 char *name, name_end; 3726 name = input_line_pointer; 3727 name_end = get_symbol_end (); 3728 3729 if (! is_name_beginner (*name)) 3730 { 3731 as_warn (_(".ent directive has no name")); 3732 *input_line_pointer = name_end; 3733 } 3734 else 3735 { 3736 symbolS *sym; 3737 3738 if (cur_frame_data) 3739 as_warn (_("nested .ent directives")); 3740 3741 sym = symbol_find_or_make (name); 3742 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; 3743 3744 cur_frame_data = (struct alpha_elf_frame_data *) 3745 calloc (1, sizeof (*cur_frame_data)); 3746 cur_frame_data->func_sym = sym; 3747 3748 /* Provide sensible defaults. */ 3749 cur_frame_data->fp_regno = 30; /* sp */ 3750 cur_frame_data->ra_regno = 26; /* ra */ 3751 3752 *plast_frame_data = cur_frame_data; 3753 plast_frame_data = &cur_frame_data->next; 3754 3755 /* The .ent directive is sometimes followed by a number. Not sure 3756 what it really means, but ignore it. */ 3757 *input_line_pointer = name_end; 3758 SKIP_WHITESPACE (); 3759 if (*input_line_pointer == ',') 3760 { 3761 input_line_pointer++; 3762 SKIP_WHITESPACE (); 3763 } 3764 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-') 3765 (void) get_absolute_expression (); 3766 } 3767 demand_empty_rest_of_line (); 3768 } 3769 } 3770 3771 static void 3772 s_alpha_end (int dummy ATTRIBUTE_UNUSED) 3773 { 3774 if (ECOFF_DEBUGGING) 3775 ecoff_directive_end (0); 3776 else 3777 { 3778 char *name, name_end; 3779 name = input_line_pointer; 3780 name_end = get_symbol_end (); 3781 3782 if (! is_name_beginner (*name)) 3783 { 3784 as_warn (_(".end directive has no name")); 3785 *input_line_pointer = name_end; 3786 } 3787 else 3788 { 3789 symbolS *sym; 3790 3791 sym = symbol_find (name); 3792 if (!cur_frame_data) 3793 as_warn (_(".end directive without matching .ent")); 3794 else if (sym != cur_frame_data->func_sym) 3795 as_warn (_(".end directive names different symbol than .ent")); 3796 3797 /* Create an expression to calculate the size of the function. */ 3798 if (sym && cur_frame_data) 3799 { 3800 OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym); 3801 expressionS *exp = (expressionS *) xmalloc (sizeof (expressionS)); 3802 3803 obj->size = exp; 3804 exp->X_op = O_subtract; 3805 exp->X_add_symbol = symbol_temp_new_now (); 3806 exp->X_op_symbol = sym; 3807 exp->X_add_number = 0; 3808 3809 cur_frame_data->func_end_sym = exp->X_add_symbol; 3810 } 3811 3812 cur_frame_data = NULL; 3813 3814 *input_line_pointer = name_end; 3815 } 3816 demand_empty_rest_of_line (); 3817 } 3818 } 3819 3820 static void 3821 s_alpha_mask (int fp) 3822 { 3823 if (ECOFF_DEBUGGING) 3824 { 3825 if (fp) 3826 ecoff_directive_fmask (0); 3827 else 3828 ecoff_directive_mask (0); 3829 } 3830 else 3831 { 3832 long val; 3833 offsetT offset; 3834 3835 if (!cur_frame_data) 3836 { 3837 if (fp) 3838 as_warn (_(".fmask outside of .ent")); 3839 else 3840 as_warn (_(".mask outside of .ent")); 3841 discard_rest_of_line (); 3842 return; 3843 } 3844 3845 if (get_absolute_expression_and_terminator (&val) != ',') 3846 { 3847 if (fp) 3848 as_warn (_("bad .fmask directive")); 3849 else 3850 as_warn (_("bad .mask directive")); 3851 --input_line_pointer; 3852 discard_rest_of_line (); 3853 return; 3854 } 3855 3856 offset = get_absolute_expression (); 3857 demand_empty_rest_of_line (); 3858 3859 if (fp) 3860 { 3861 cur_frame_data->fmask = val; 3862 cur_frame_data->fmask_offset = offset; 3863 } 3864 else 3865 { 3866 cur_frame_data->mask = val; 3867 cur_frame_data->mask_offset = offset; 3868 } 3869 } 3870 } 3871 3872 static void 3873 s_alpha_frame (int dummy ATTRIBUTE_UNUSED) 3874 { 3875 if (ECOFF_DEBUGGING) 3876 ecoff_directive_frame (0); 3877 else 3878 { 3879 long val; 3880 3881 if (!cur_frame_data) 3882 { 3883 as_warn (_(".frame outside of .ent")); 3884 discard_rest_of_line (); 3885 return; 3886 } 3887 3888 cur_frame_data->fp_regno = tc_get_register (1); 3889 3890 SKIP_WHITESPACE (); 3891 if (*input_line_pointer++ != ',' 3892 || get_absolute_expression_and_terminator (&val) != ',') 3893 { 3894 as_warn (_("bad .frame directive")); 3895 --input_line_pointer; 3896 discard_rest_of_line (); 3897 return; 3898 } 3899 cur_frame_data->frame_size = val; 3900 3901 cur_frame_data->ra_regno = tc_get_register (0); 3902 3903 /* Next comes the "offset of saved $a0 from $sp". In gcc terms 3904 this is current_function_pretend_args_size. There's no place 3905 to put this value, so ignore it. */ 3906 s_ignore (42); 3907 } 3908 } 3909 3910 static void 3911 s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) 3912 { 3913 symbolS *sym; 3914 int arg; 3915 3916 arg = get_absolute_expression (); 3917 demand_empty_rest_of_line (); 3918 alpha_prologue_label = symbol_new 3919 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 3920 3921 if (ECOFF_DEBUGGING) 3922 sym = ecoff_get_cur_proc_sym (); 3923 else 3924 sym = cur_frame_data ? cur_frame_data->func_sym : NULL; 3925 3926 if (sym == NULL) 3927 { 3928 as_bad (_(".prologue directive without a preceding .ent directive")); 3929 return; 3930 } 3931 3932 switch (arg) 3933 { 3934 case 0: /* No PV required. */ 3935 S_SET_OTHER (sym, STO_ALPHA_NOPV 3936 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); 3937 break; 3938 case 1: /* Std GP load. */ 3939 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD 3940 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); 3941 break; 3942 case 2: /* Non-std use of PV. */ 3943 break; 3944 3945 default: 3946 as_bad (_("Invalid argument %d to .prologue."), arg); 3947 break; 3948 } 3949 3950 if (cur_frame_data) 3951 cur_frame_data->prologue_sym = symbol_temp_new_now (); 3952 } 3953 3954 static char *first_file_directive; 3955 3956 static void 3957 s_alpha_file (int ignore ATTRIBUTE_UNUSED) 3958 { 3959 /* Save the first .file directive we see, so that we can change our 3960 minds about whether ecoff debugging should or shouldn't be enabled. */ 3961 if (alpha_flag_mdebug < 0 && ! first_file_directive) 3962 { 3963 char *start = input_line_pointer; 3964 size_t len; 3965 3966 discard_rest_of_line (); 3967 3968 len = input_line_pointer - start; 3969 first_file_directive = (char *) xmalloc (len + 1); 3970 memcpy (first_file_directive, start, len); 3971 first_file_directive[len] = '\0'; 3972 3973 input_line_pointer = start; 3974 } 3975 3976 if (ECOFF_DEBUGGING) 3977 ecoff_directive_file (0); 3978 else 3979 dwarf2_directive_file (0); 3980 } 3981 3982 static void 3983 s_alpha_loc (int ignore ATTRIBUTE_UNUSED) 3984 { 3985 if (ECOFF_DEBUGGING) 3986 ecoff_directive_loc (0); 3987 else 3988 dwarf2_directive_loc (0); 3989 } 3990 3991 static void 3992 s_alpha_stab (int n) 3993 { 3994 /* If we've been undecided about mdebug, make up our minds in favour. */ 3995 if (alpha_flag_mdebug < 0) 3996 { 3997 segT sec = subseg_new (".mdebug", 0); 3998 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); 3999 bfd_set_section_alignment (stdoutput, sec, 3); 4000 4001 ecoff_read_begin_hook (); 4002 4003 if (first_file_directive) 4004 { 4005 char *save_ilp = input_line_pointer; 4006 input_line_pointer = first_file_directive; 4007 ecoff_directive_file (0); 4008 input_line_pointer = save_ilp; 4009 free (first_file_directive); 4010 } 4011 4012 alpha_flag_mdebug = 1; 4013 } 4014 s_stab (n); 4015 } 4016 4017 static void 4018 s_alpha_coff_wrapper (int which) 4019 { 4020 static void (* const fns[]) (int) = { 4021 ecoff_directive_begin, 4022 ecoff_directive_bend, 4023 ecoff_directive_def, 4024 ecoff_directive_dim, 4025 ecoff_directive_endef, 4026 ecoff_directive_scl, 4027 ecoff_directive_tag, 4028 ecoff_directive_val, 4029 }; 4030 4031 gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns))); 4032 4033 if (ECOFF_DEBUGGING) 4034 (*fns[which]) (0); 4035 else 4036 { 4037 as_bad (_("ECOFF debugging is disabled.")); 4038 ignore_rest_of_line (); 4039 } 4040 } 4041 4042 /* Called at the end of assembly. Here we emit unwind info for frames 4043 unless the compiler has done it for us. */ 4044 4045 void 4046 alpha_elf_md_end (void) 4047 { 4048 struct alpha_elf_frame_data *p; 4049 4050 if (cur_frame_data) 4051 as_warn (_(".ent directive without matching .end")); 4052 4053 /* If someone has generated the unwind info themselves, great. */ 4054 if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL) 4055 return; 4056 4057 /* ??? In theory we could look for functions for which we have 4058 generated unwind info via CFI directives, and those we have not. 4059 Those we have not could still get their unwind info from here. 4060 For now, do nothing if we've seen any CFI directives. Note that 4061 the above test will not trigger, as we've not emitted data yet. */ 4062 if (all_fde_data != NULL) 4063 return; 4064 4065 /* Generate .eh_frame data for the unwind directives specified. */ 4066 for (p = all_frame_data; p ; p = p->next) 4067 if (p->prologue_sym) 4068 { 4069 /* Create a temporary symbol at the same location as our 4070 function symbol. This prevents problems with globals. */ 4071 cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym), 4072 S_GET_VALUE (p->func_sym), 4073 symbol_get_frag (p->func_sym))); 4074 4075 cfi_set_return_column (p->ra_regno); 4076 cfi_add_CFA_def_cfa_register (30); 4077 if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size) 4078 { 4079 unsigned int mask; 4080 offsetT offset; 4081 4082 cfi_add_advance_loc (p->prologue_sym); 4083 4084 if (p->fp_regno != 30) 4085 if (p->frame_size != 0) 4086 cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size); 4087 else 4088 cfi_add_CFA_def_cfa_register (p->fp_regno); 4089 else if (p->frame_size != 0) 4090 cfi_add_CFA_def_cfa_offset (p->frame_size); 4091 4092 mask = p->mask; 4093 offset = p->mask_offset; 4094 4095 /* Recall that $26 is special-cased and stored first. */ 4096 if ((mask >> 26) & 1) 4097 { 4098 cfi_add_CFA_offset (26, offset); 4099 offset += 8; 4100 mask &= ~(1 << 26); 4101 } 4102 while (mask) 4103 { 4104 unsigned int i; 4105 i = mask & -mask; 4106 mask ^= i; 4107 i = ffs (i) - 1; 4108 4109 cfi_add_CFA_offset (i, offset); 4110 offset += 8; 4111 } 4112 4113 mask = p->fmask; 4114 offset = p->fmask_offset; 4115 while (mask) 4116 { 4117 unsigned int i; 4118 i = mask & -mask; 4119 mask ^= i; 4120 i = ffs (i) - 1; 4121 4122 cfi_add_CFA_offset (i + 32, offset); 4123 offset += 8; 4124 } 4125 } 4126 4127 cfi_end_fde (p->func_end_sym); 4128 } 4129 } 4130 4131 static void 4132 s_alpha_usepv (int unused ATTRIBUTE_UNUSED) 4133 { 4134 char *name, name_end; 4135 char *which, which_end; 4136 symbolS *sym; 4137 int other; 4138 4139 name = input_line_pointer; 4140 name_end = get_symbol_end (); 4141 4142 if (! is_name_beginner (*name)) 4143 { 4144 as_bad (_(".usepv directive has no name")); 4145 *input_line_pointer = name_end; 4146 ignore_rest_of_line (); 4147 return; 4148 } 4149 4150 sym = symbol_find_or_make (name); 4151 *input_line_pointer++ = name_end; 4152 4153 if (name_end != ',') 4154 { 4155 as_bad (_(".usepv directive has no type")); 4156 ignore_rest_of_line (); 4157 return; 4158 } 4159 4160 SKIP_WHITESPACE (); 4161 which = input_line_pointer; 4162 which_end = get_symbol_end (); 4163 4164 if (strcmp (which, "no") == 0) 4165 other = STO_ALPHA_NOPV; 4166 else if (strcmp (which, "std") == 0) 4167 other = STO_ALPHA_STD_GPLOAD; 4168 else 4169 { 4170 as_bad (_("unknown argument for .usepv")); 4171 other = 0; 4172 } 4173 4174 *input_line_pointer = which_end; 4175 demand_empty_rest_of_line (); 4176 4177 S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); 4178 } 4179 #endif /* OBJ_ELF */ 4180 4181 /* Standard calling conventions leaves the CFA at $30 on entry. */ 4182 4183 void 4184 alpha_cfi_frame_initial_instructions (void) 4185 { 4186 cfi_add_CFA_def_cfa_register (30); 4187 } 4188 4189 #ifdef OBJ_EVAX 4190 4191 /* Get name of section. */ 4192 static char * 4193 s_alpha_section_name (void) 4194 { 4195 char *name; 4196 4197 SKIP_WHITESPACE (); 4198 if (*input_line_pointer == '"') 4199 { 4200 int dummy; 4201 4202 name = demand_copy_C_string (&dummy); 4203 if (name == NULL) 4204 { 4205 ignore_rest_of_line (); 4206 return NULL; 4207 } 4208 } 4209 else 4210 { 4211 char *end = input_line_pointer; 4212 4213 while (0 == strchr ("\n\t,; ", *end)) 4214 end++; 4215 if (end == input_line_pointer) 4216 { 4217 as_warn (_("missing name")); 4218 ignore_rest_of_line (); 4219 return NULL; 4220 } 4221 4222 name = xmalloc (end - input_line_pointer + 1); 4223 memcpy (name, input_line_pointer, end - input_line_pointer); 4224 name[end - input_line_pointer] = '\0'; 4225 input_line_pointer = end; 4226 } 4227 SKIP_WHITESPACE (); 4228 return name; 4229 } 4230 4231 /* Put clear/set flags in one flagword. The LSBs are flags to be set, 4232 the MSBs are the flags to be cleared. */ 4233 4234 #define EGPS__V_NO_SHIFT 16 4235 #define EGPS__V_MASK 0xffff 4236 4237 /* Parse one VMS section flag. */ 4238 4239 static flagword 4240 s_alpha_section_word (char *str, size_t len) 4241 { 4242 int no = 0; 4243 flagword flag = 0; 4244 4245 if (len == 5 && strncmp (str, "NO", 2) == 0) 4246 { 4247 no = 1; 4248 str += 2; 4249 len -= 2; 4250 } 4251 4252 if (len == 3) 4253 { 4254 if (strncmp (str, "PIC", 3) == 0) 4255 flag = EGPS__V_PIC; 4256 else if (strncmp (str, "LIB", 3) == 0) 4257 flag = EGPS__V_LIB; 4258 else if (strncmp (str, "OVR", 3) == 0) 4259 flag = EGPS__V_OVR; 4260 else if (strncmp (str, "REL", 3) == 0) 4261 flag = EGPS__V_REL; 4262 else if (strncmp (str, "GBL", 3) == 0) 4263 flag = EGPS__V_GBL; 4264 else if (strncmp (str, "SHR", 3) == 0) 4265 flag = EGPS__V_SHR; 4266 else if (strncmp (str, "EXE", 3) == 0) 4267 flag = EGPS__V_EXE; 4268 else if (strncmp (str, "WRT", 3) == 0) 4269 flag = EGPS__V_WRT; 4270 else if (strncmp (str, "VEC", 3) == 0) 4271 flag = EGPS__V_VEC; 4272 else if (strncmp (str, "MOD", 3) == 0) 4273 { 4274 flag = no ? EGPS__V_NOMOD : EGPS__V_NOMOD << EGPS__V_NO_SHIFT; 4275 no = 0; 4276 } 4277 else if (strncmp (str, "COM", 3) == 0) 4278 flag = EGPS__V_COM; 4279 } 4280 4281 if (flag == 0) 4282 { 4283 char c = str[len]; 4284 str[len] = 0; 4285 as_warn (_("unknown section attribute %s"), str); 4286 str[len] = c; 4287 return 0; 4288 } 4289 4290 if (no) 4291 return flag << EGPS__V_NO_SHIFT; 4292 else 4293 return flag; 4294 } 4295 4296 /* Handle the section specific pseudo-op. */ 4297 4298 #define EVAX_SECTION_COUNT 5 4299 4300 static char *section_name[EVAX_SECTION_COUNT + 1] = 4301 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" }; 4302 4303 static void 4304 s_alpha_section (int secid) 4305 { 4306 char *name, *beg; 4307 segT sec; 4308 flagword vms_flags = 0; 4309 symbolS *symbol; 4310 4311 if (secid == 0) 4312 { 4313 name = s_alpha_section_name (); 4314 if (name == NULL) 4315 return; 4316 sec = subseg_new (name, 0); 4317 if (*input_line_pointer == ',') 4318 { 4319 /* Skip the comma. */ 4320 ++input_line_pointer; 4321 SKIP_WHITESPACE (); 4322 4323 do 4324 { 4325 char c; 4326 4327 SKIP_WHITESPACE (); 4328 beg = input_line_pointer; 4329 c = get_symbol_end (); 4330 *input_line_pointer = c; 4331 4332 vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg); 4333 4334 SKIP_WHITESPACE (); 4335 } 4336 while (*input_line_pointer++ == ','); 4337 --input_line_pointer; 4338 } 4339 4340 symbol = symbol_find_or_make (name); 4341 S_SET_SEGMENT (symbol, sec); 4342 symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM; 4343 bfd_vms_set_section_flags 4344 (stdoutput, sec, 4345 (vms_flags >> EGPS__V_NO_SHIFT) & EGPS__V_MASK, 4346 vms_flags & EGPS__V_MASK); 4347 } 4348 else 4349 { 4350 get_absolute_expression (); 4351 subseg_new (section_name[secid], 0); 4352 } 4353 4354 demand_empty_rest_of_line (); 4355 alpha_insn_label = NULL; 4356 alpha_auto_align_on = 1; 4357 alpha_current_align = 0; 4358 } 4359 4360 static void 4361 s_alpha_literals (int ignore ATTRIBUTE_UNUSED) 4362 { 4363 subseg_new (".literals", 0); 4364 demand_empty_rest_of_line (); 4365 alpha_insn_label = NULL; 4366 alpha_auto_align_on = 1; 4367 alpha_current_align = 0; 4368 } 4369 4370 /* Parse .ent directives. */ 4371 4372 static void 4373 s_alpha_ent (int ignore ATTRIBUTE_UNUSED) 4374 { 4375 symbolS *symbol; 4376 expressionS symexpr; 4377 4378 if (alpha_evax_proc != NULL) 4379 as_bad (_("previous .ent not closed by a .end")); 4380 4381 alpha_evax_proc = &alpha_evax_proc_data; 4382 4383 alpha_evax_proc->pdsckind = 0; 4384 alpha_evax_proc->framereg = -1; 4385 alpha_evax_proc->framesize = 0; 4386 alpha_evax_proc->rsa_offset = 0; 4387 alpha_evax_proc->ra_save = AXP_REG_RA; 4388 alpha_evax_proc->fp_save = -1; 4389 alpha_evax_proc->imask = 0; 4390 alpha_evax_proc->fmask = 0; 4391 alpha_evax_proc->prologue = 0; 4392 alpha_evax_proc->type = 0; 4393 alpha_evax_proc->handler = 0; 4394 alpha_evax_proc->handler_data = 0; 4395 4396 expression (&symexpr); 4397 4398 if (symexpr.X_op != O_symbol) 4399 { 4400 as_fatal (_(".ent directive has no symbol")); 4401 demand_empty_rest_of_line (); 4402 return; 4403 } 4404 4405 symbol = make_expr_symbol (&symexpr); 4406 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION; 4407 alpha_evax_proc->symbol = symbol; 4408 4409 demand_empty_rest_of_line (); 4410 } 4411 4412 static void 4413 s_alpha_handler (int is_data) 4414 { 4415 if (is_data) 4416 alpha_evax_proc->handler_data = get_absolute_expression (); 4417 else 4418 { 4419 char *name, name_end; 4420 name = input_line_pointer; 4421 name_end = get_symbol_end (); 4422 4423 if (! is_name_beginner (*name)) 4424 { 4425 as_warn (_(".handler directive has no name")); 4426 *input_line_pointer = name_end; 4427 } 4428 else 4429 { 4430 symbolS *sym; 4431 4432 sym = symbol_find_or_make (name); 4433 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; 4434 alpha_evax_proc->handler = sym; 4435 *input_line_pointer = name_end; 4436 } 4437 } 4438 demand_empty_rest_of_line (); 4439 } 4440 4441 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */ 4442 4443 static void 4444 s_alpha_frame (int ignore ATTRIBUTE_UNUSED) 4445 { 4446 long val; 4447 int ra; 4448 4449 alpha_evax_proc->framereg = tc_get_register (1); 4450 4451 SKIP_WHITESPACE (); 4452 if (*input_line_pointer++ != ',' 4453 || get_absolute_expression_and_terminator (&val) != ',') 4454 { 4455 as_warn (_("Bad .frame directive 1./2. param")); 4456 --input_line_pointer; 4457 demand_empty_rest_of_line (); 4458 return; 4459 } 4460 4461 alpha_evax_proc->framesize = val; 4462 4463 ra = tc_get_register (1); 4464 if (ra != AXP_REG_RA) 4465 as_warn (_("Bad RA (%d) register for .frame"), ra); 4466 4467 SKIP_WHITESPACE (); 4468 if (*input_line_pointer++ != ',') 4469 { 4470 as_warn (_("Bad .frame directive 3./4. param")); 4471 --input_line_pointer; 4472 demand_empty_rest_of_line (); 4473 return; 4474 } 4475 alpha_evax_proc->rsa_offset = get_absolute_expression (); 4476 } 4477 4478 /* Parse .prologue. */ 4479 4480 static void 4481 s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) 4482 { 4483 demand_empty_rest_of_line (); 4484 alpha_prologue_label = symbol_new 4485 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 4486 } 4487 4488 /* Parse .pdesc <entry_name>,{null|stack|reg} 4489 Insert a procedure descriptor. */ 4490 4491 static void 4492 s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED) 4493 { 4494 char *name; 4495 char name_end; 4496 register char *p; 4497 expressionS exp; 4498 symbolS *entry_sym; 4499 const char *entry_sym_name; 4500 const char *pdesc_sym_name; 4501 fixS *fixp; 4502 size_t len; 4503 4504 if (now_seg != alpha_link_section) 4505 { 4506 as_bad (_(".pdesc directive not in link (.link) section")); 4507 return; 4508 } 4509 4510 expression (&exp); 4511 if (exp.X_op != O_symbol) 4512 { 4513 as_bad (_(".pdesc directive has no entry symbol")); 4514 return; 4515 } 4516 4517 entry_sym = make_expr_symbol (&exp); 4518 entry_sym_name = S_GET_NAME (entry_sym); 4519 4520 /* Strip "..en". */ 4521 len = strlen (entry_sym_name); 4522 if (len < 4 || strcmp (entry_sym_name + len - 4, "..en") != 0) 4523 { 4524 as_bad (_(".pdesc has a bad entry symbol")); 4525 return; 4526 } 4527 len -= 4; 4528 pdesc_sym_name = S_GET_NAME (alpha_evax_proc->symbol); 4529 4530 if (!alpha_evax_proc 4531 || !S_IS_DEFINED (alpha_evax_proc->symbol) 4532 || strlen (pdesc_sym_name) != len 4533 || memcmp (entry_sym_name, pdesc_sym_name, len) != 0) 4534 { 4535 as_fatal (_(".pdesc doesn't match with last .ent")); 4536 return; 4537 } 4538 4539 /* Define pdesc symbol. */ 4540 symbol_set_value_now (alpha_evax_proc->symbol); 4541 4542 /* Save bfd symbol of proc entry in function symbol. */ 4543 ((struct evax_private_udata_struct *) 4544 symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym 4545 = symbol_get_bfdsym (entry_sym); 4546 4547 SKIP_WHITESPACE (); 4548 if (*input_line_pointer++ != ',') 4549 { 4550 as_warn (_("No comma after .pdesc <entryname>")); 4551 demand_empty_rest_of_line (); 4552 return; 4553 } 4554 4555 SKIP_WHITESPACE (); 4556 name = input_line_pointer; 4557 name_end = get_symbol_end (); 4558 4559 if (strncmp (name, "stack", 5) == 0) 4560 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK; 4561 4562 else if (strncmp (name, "reg", 3) == 0) 4563 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER; 4564 4565 else if (strncmp (name, "null", 4) == 0) 4566 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL; 4567 4568 else 4569 { 4570 as_fatal (_("unknown procedure kind")); 4571 demand_empty_rest_of_line (); 4572 return; 4573 } 4574 4575 *input_line_pointer = name_end; 4576 demand_empty_rest_of_line (); 4577 4578 #ifdef md_flush_pending_output 4579 md_flush_pending_output (); 4580 #endif 4581 4582 frag_align (3, 0, 0); 4583 p = frag_more (16); 4584 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0); 4585 fixp->fx_done = 1; 4586 4587 *p = alpha_evax_proc->pdsckind 4588 | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0) 4589 | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0) 4590 | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0); 4591 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET; 4592 4593 switch (alpha_evax_proc->pdsckind) 4594 { 4595 case PDSC_S_K_KIND_NULL: 4596 *(p + 2) = 0; 4597 *(p + 3) = 0; 4598 break; 4599 case PDSC_S_K_KIND_FP_REGISTER: 4600 *(p + 2) = alpha_evax_proc->fp_save; 4601 *(p + 3) = alpha_evax_proc->ra_save; 4602 break; 4603 case PDSC_S_K_KIND_FP_STACK: 4604 md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2); 4605 break; 4606 default: /* impossible */ 4607 break; 4608 } 4609 4610 *(p + 4) = 0; 4611 *(p + 5) = alpha_evax_proc->type & 0x0f; 4612 4613 /* Signature offset. */ 4614 md_number_to_chars (p + 6, (valueT) 0, 2); 4615 4616 fix_new_exp (frag_now, p - frag_now->fr_literal + 8, 4617 8, &exp, 0, BFD_RELOC_64); 4618 4619 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL) 4620 return; 4621 4622 /* pdesc+16: Size. */ 4623 p = frag_more (6); 4624 md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4); 4625 md_number_to_chars (p + 4, (valueT) 0, 2); 4626 4627 /* Entry length. */ 4628 exp.X_op = O_subtract; 4629 exp.X_add_symbol = alpha_prologue_label; 4630 exp.X_op_symbol = entry_sym; 4631 emit_expr (&exp, 2); 4632 4633 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER) 4634 return; 4635 4636 /* pdesc+24: register masks. */ 4637 p = frag_more (8); 4638 md_number_to_chars (p, alpha_evax_proc->imask, 4); 4639 md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4); 4640 4641 if (alpha_evax_proc->handler) 4642 { 4643 p = frag_more (8); 4644 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 4645 alpha_evax_proc->handler, 0, 0, BFD_RELOC_64); 4646 } 4647 4648 if (alpha_evax_proc->handler_data) 4649 { 4650 p = frag_more (8); 4651 md_number_to_chars (p, alpha_evax_proc->handler_data, 8); 4652 } 4653 } 4654 4655 /* Support for crash debug on vms. */ 4656 4657 static void 4658 s_alpha_name (int ignore ATTRIBUTE_UNUSED) 4659 { 4660 char *p; 4661 expressionS exp; 4662 4663 if (now_seg != alpha_link_section) 4664 { 4665 as_bad (_(".name directive not in link (.link) section")); 4666 demand_empty_rest_of_line (); 4667 return; 4668 } 4669 4670 expression (&exp); 4671 if (exp.X_op != O_symbol) 4672 { 4673 as_warn (_(".name directive has no symbol")); 4674 demand_empty_rest_of_line (); 4675 return; 4676 } 4677 4678 demand_empty_rest_of_line (); 4679 4680 #ifdef md_flush_pending_output 4681 md_flush_pending_output (); 4682 #endif 4683 4684 frag_align (3, 0, 0); 4685 p = frag_more (8); 4686 4687 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64); 4688 } 4689 4690 /* Parse .linkage <symbol>. 4691 Create a linkage pair relocation. */ 4692 4693 static void 4694 s_alpha_linkage (int ignore ATTRIBUTE_UNUSED) 4695 { 4696 expressionS exp; 4697 char *p; 4698 fixS *fixp; 4699 4700 #ifdef md_flush_pending_output 4701 md_flush_pending_output (); 4702 #endif 4703 4704 expression (&exp); 4705 if (exp.X_op != O_symbol) 4706 { 4707 as_fatal (_("No symbol after .linkage")); 4708 } 4709 else 4710 { 4711 struct alpha_linkage_fixups *linkage_fixup; 4712 4713 p = frag_more (LKP_S_K_SIZE); 4714 memset (p, 0, LKP_S_K_SIZE); 4715 fixp = fix_new_exp 4716 (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0, 4717 BFD_RELOC_ALPHA_LINKAGE); 4718 4719 if (alpha_insn_label == NULL) 4720 alpha_insn_label = symbol_new 4721 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 4722 4723 /* Create a linkage element. */ 4724 linkage_fixup = (struct alpha_linkage_fixups *) 4725 xmalloc (sizeof (struct alpha_linkage_fixups)); 4726 linkage_fixup->fixp = fixp; 4727 linkage_fixup->next = NULL; 4728 linkage_fixup->label = alpha_insn_label; 4729 4730 /* Append it to the list. */ 4731 if (alpha_linkage_fixup_root == NULL) 4732 alpha_linkage_fixup_root = linkage_fixup; 4733 else 4734 alpha_linkage_fixup_tail->next = linkage_fixup; 4735 alpha_linkage_fixup_tail = linkage_fixup; 4736 } 4737 demand_empty_rest_of_line (); 4738 } 4739 4740 /* Parse .code_address <symbol>. 4741 Create a code address relocation. */ 4742 4743 static void 4744 s_alpha_code_address (int ignore ATTRIBUTE_UNUSED) 4745 { 4746 expressionS exp; 4747 char *p; 4748 4749 #ifdef md_flush_pending_output 4750 md_flush_pending_output (); 4751 #endif 4752 4753 expression (&exp); 4754 if (exp.X_op != O_symbol) 4755 as_fatal (_("No symbol after .code_address")); 4756 else 4757 { 4758 p = frag_more (8); 4759 memset (p, 0, 8); 4760 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\ 4761 BFD_RELOC_ALPHA_CODEADDR); 4762 } 4763 demand_empty_rest_of_line (); 4764 } 4765 4766 static void 4767 s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED) 4768 { 4769 alpha_evax_proc->fp_save = tc_get_register (1); 4770 4771 demand_empty_rest_of_line (); 4772 } 4773 4774 static void 4775 s_alpha_mask (int ignore ATTRIBUTE_UNUSED) 4776 { 4777 long val; 4778 4779 if (get_absolute_expression_and_terminator (&val) != ',') 4780 { 4781 as_warn (_("Bad .mask directive")); 4782 --input_line_pointer; 4783 } 4784 else 4785 { 4786 alpha_evax_proc->imask = val; 4787 (void) get_absolute_expression (); 4788 } 4789 demand_empty_rest_of_line (); 4790 } 4791 4792 static void 4793 s_alpha_fmask (int ignore ATTRIBUTE_UNUSED) 4794 { 4795 long val; 4796 4797 if (get_absolute_expression_and_terminator (&val) != ',') 4798 { 4799 as_warn (_("Bad .fmask directive")); 4800 --input_line_pointer; 4801 } 4802 else 4803 { 4804 alpha_evax_proc->fmask = val; 4805 (void) get_absolute_expression (); 4806 } 4807 demand_empty_rest_of_line (); 4808 } 4809 4810 static void 4811 s_alpha_end (int ignore ATTRIBUTE_UNUSED) 4812 { 4813 char c; 4814 4815 c = get_symbol_end (); 4816 *input_line_pointer = c; 4817 demand_empty_rest_of_line (); 4818 alpha_evax_proc = NULL; 4819 } 4820 4821 static void 4822 s_alpha_file (int ignore ATTRIBUTE_UNUSED) 4823 { 4824 symbolS *s; 4825 int length; 4826 static char case_hack[32]; 4827 4828 sprintf (case_hack, "<CASE:%01d%01d>", 4829 alpha_flag_hash_long_names, alpha_flag_show_after_trunc); 4830 4831 s = symbol_find_or_make (case_hack); 4832 symbol_get_bfdsym (s)->flags |= BSF_FILE; 4833 4834 get_absolute_expression (); 4835 s = symbol_find_or_make (demand_copy_string (&length)); 4836 symbol_get_bfdsym (s)->flags |= BSF_FILE; 4837 demand_empty_rest_of_line (); 4838 } 4839 #endif /* OBJ_EVAX */ 4840 4841 /* Handle the .gprel32 pseudo op. */ 4842 4843 static void 4844 s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED) 4845 { 4846 expressionS e; 4847 char *p; 4848 4849 SKIP_WHITESPACE (); 4850 expression (&e); 4851 4852 #ifdef OBJ_ELF 4853 switch (e.X_op) 4854 { 4855 case O_constant: 4856 e.X_add_symbol = section_symbol (absolute_section); 4857 e.X_op = O_symbol; 4858 /* FALLTHRU */ 4859 case O_symbol: 4860 break; 4861 default: 4862 abort (); 4863 } 4864 #else 4865 #ifdef OBJ_ECOFF 4866 switch (e.X_op) 4867 { 4868 case O_constant: 4869 e.X_add_symbol = section_symbol (absolute_section); 4870 /* fall through */ 4871 case O_symbol: 4872 e.X_op = O_subtract; 4873 e.X_op_symbol = alpha_gp_symbol; 4874 break; 4875 default: 4876 abort (); 4877 } 4878 #endif 4879 #endif 4880 4881 if (alpha_auto_align_on && alpha_current_align < 2) 4882 alpha_align (2, (char *) NULL, alpha_insn_label, 0); 4883 if (alpha_current_align > 2) 4884 alpha_current_align = 2; 4885 alpha_insn_label = NULL; 4886 4887 p = frag_more (4); 4888 memset (p, 0, 4); 4889 fix_new_exp (frag_now, p - frag_now->fr_literal, 4, 4890 &e, 0, BFD_RELOC_GPREL32); 4891 } 4892 4893 /* Handle floating point allocation pseudo-ops. This is like the 4894 generic vresion, but it makes sure the current label, if any, is 4895 correctly aligned. */ 4896 4897 static void 4898 s_alpha_float_cons (int type) 4899 { 4900 int log_size; 4901 4902 switch (type) 4903 { 4904 default: 4905 case 'f': 4906 case 'F': 4907 log_size = 2; 4908 break; 4909 4910 case 'd': 4911 case 'D': 4912 case 'G': 4913 log_size = 3; 4914 break; 4915 4916 case 'x': 4917 case 'X': 4918 case 'p': 4919 case 'P': 4920 log_size = 4; 4921 break; 4922 } 4923 4924 if (alpha_auto_align_on && alpha_current_align < log_size) 4925 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); 4926 if (alpha_current_align > log_size) 4927 alpha_current_align = log_size; 4928 alpha_insn_label = NULL; 4929 4930 float_cons (type); 4931 } 4932 4933 /* Handle the .proc pseudo op. We don't really do much with it except 4934 parse it. */ 4935 4936 static void 4937 s_alpha_proc (int is_static ATTRIBUTE_UNUSED) 4938 { 4939 char *name; 4940 char c; 4941 char *p; 4942 symbolS *symbolP; 4943 int temp; 4944 4945 /* Takes ".proc name,nargs". */ 4946 SKIP_WHITESPACE (); 4947 name = input_line_pointer; 4948 c = get_symbol_end (); 4949 p = input_line_pointer; 4950 symbolP = symbol_find_or_make (name); 4951 *p = c; 4952 SKIP_WHITESPACE (); 4953 if (*input_line_pointer != ',') 4954 { 4955 *p = 0; 4956 as_warn (_("Expected comma after name \"%s\""), name); 4957 *p = c; 4958 temp = 0; 4959 ignore_rest_of_line (); 4960 } 4961 else 4962 { 4963 input_line_pointer++; 4964 temp = get_absolute_expression (); 4965 } 4966 /* *symbol_get_obj (symbolP) = (signed char) temp; */ 4967 (void) symbolP; 4968 as_warn (_("unhandled: .proc %s,%d"), name, temp); 4969 demand_empty_rest_of_line (); 4970 } 4971 4972 /* Handle the .set pseudo op. This is used to turn on and off most of 4973 the assembler features. */ 4974 4975 static void 4976 s_alpha_set (int x ATTRIBUTE_UNUSED) 4977 { 4978 char *name, ch, *s; 4979 int yesno = 1; 4980 4981 SKIP_WHITESPACE (); 4982 name = input_line_pointer; 4983 ch = get_symbol_end (); 4984 4985 s = name; 4986 if (s[0] == 'n' && s[1] == 'o') 4987 { 4988 yesno = 0; 4989 s += 2; 4990 } 4991 if (!strcmp ("reorder", s)) 4992 /* ignore */ ; 4993 else if (!strcmp ("at", s)) 4994 alpha_noat_on = !yesno; 4995 else if (!strcmp ("macro", s)) 4996 alpha_macros_on = yesno; 4997 else if (!strcmp ("move", s)) 4998 /* ignore */ ; 4999 else if (!strcmp ("volatile", s)) 5000 /* ignore */ ; 5001 else 5002 as_warn (_("Tried to .set unrecognized mode `%s'"), name); 5003 5004 *input_line_pointer = ch; 5005 demand_empty_rest_of_line (); 5006 } 5007 5008 /* Handle the .base pseudo op. This changes the assembler's notion of 5009 the $gp register. */ 5010 5011 static void 5012 s_alpha_base (int ignore ATTRIBUTE_UNUSED) 5013 { 5014 SKIP_WHITESPACE (); 5015 5016 if (*input_line_pointer == '$') 5017 { 5018 /* $rNN form. */ 5019 input_line_pointer++; 5020 if (*input_line_pointer == 'r') 5021 input_line_pointer++; 5022 } 5023 5024 alpha_gp_register = get_absolute_expression (); 5025 if (alpha_gp_register < 0 || alpha_gp_register > 31) 5026 { 5027 alpha_gp_register = AXP_REG_GP; 5028 as_warn (_("Bad base register, using $%d."), alpha_gp_register); 5029 } 5030 5031 demand_empty_rest_of_line (); 5032 } 5033 5034 /* Handle the .align pseudo-op. This aligns to a power of two. It 5035 also adjusts any current instruction label. We treat this the same 5036 way the MIPS port does: .align 0 turns off auto alignment. */ 5037 5038 static void 5039 s_alpha_align (int ignore ATTRIBUTE_UNUSED) 5040 { 5041 int align; 5042 char fill, *pfill; 5043 long max_alignment = 16; 5044 5045 align = get_absolute_expression (); 5046 if (align > max_alignment) 5047 { 5048 align = max_alignment; 5049 as_bad (_("Alignment too large: %d. assumed"), align); 5050 } 5051 else if (align < 0) 5052 { 5053 as_warn (_("Alignment negative: 0 assumed")); 5054 align = 0; 5055 } 5056 5057 if (*input_line_pointer == ',') 5058 { 5059 input_line_pointer++; 5060 fill = get_absolute_expression (); 5061 pfill = &fill; 5062 } 5063 else 5064 pfill = NULL; 5065 5066 if (align != 0) 5067 { 5068 alpha_auto_align_on = 1; 5069 alpha_align (align, pfill, NULL, 1); 5070 } 5071 else 5072 { 5073 alpha_auto_align_on = 0; 5074 } 5075 alpha_insn_label = NULL; 5076 5077 demand_empty_rest_of_line (); 5078 } 5079 5080 /* Hook the normal string processor to reset known alignment. */ 5081 5082 static void 5083 s_alpha_stringer (int terminate) 5084 { 5085 alpha_current_align = 0; 5086 alpha_insn_label = NULL; 5087 stringer (8 + terminate); 5088 } 5089 5090 /* Hook the normal space processing to reset known alignment. */ 5091 5092 static void 5093 s_alpha_space (int ignore) 5094 { 5095 alpha_current_align = 0; 5096 alpha_insn_label = NULL; 5097 s_space (ignore); 5098 } 5099 5100 /* Hook into cons for auto-alignment. */ 5101 5102 void 5103 alpha_cons_align (int size) 5104 { 5105 int log_size; 5106 5107 log_size = 0; 5108 while ((size >>= 1) != 0) 5109 ++log_size; 5110 5111 if (alpha_auto_align_on && alpha_current_align < log_size) 5112 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); 5113 if (alpha_current_align > log_size) 5114 alpha_current_align = log_size; 5115 alpha_insn_label = NULL; 5116 } 5117 5118 /* Here come the .uword, .ulong, and .uquad explicitly unaligned 5119 pseudos. We just turn off auto-alignment and call down to cons. */ 5120 5121 static void 5122 s_alpha_ucons (int bytes) 5123 { 5124 int hold = alpha_auto_align_on; 5125 alpha_auto_align_on = 0; 5126 cons (bytes); 5127 alpha_auto_align_on = hold; 5128 } 5129 5130 /* Switch the working cpu type. */ 5131 5132 static void 5133 s_alpha_arch (int ignored ATTRIBUTE_UNUSED) 5134 { 5135 char *name, ch; 5136 const struct cpu_type *p; 5137 5138 SKIP_WHITESPACE (); 5139 name = input_line_pointer; 5140 ch = get_symbol_end (); 5141 5142 for (p = cpu_types; p->name; ++p) 5143 if (strcmp (name, p->name) == 0) 5144 { 5145 alpha_target_name = p->name, alpha_target = p->flags; 5146 goto found; 5147 } 5148 as_warn (_("Unknown CPU identifier `%s'"), name); 5149 5150 found: 5151 *input_line_pointer = ch; 5152 demand_empty_rest_of_line (); 5153 } 5154 5155 #ifdef DEBUG1 5157 /* print token expression with alpha specific extension. */ 5158 5159 static void 5160 alpha_print_token (FILE *f, const expressionS *exp) 5161 { 5162 switch (exp->X_op) 5163 { 5164 case O_cpregister: 5165 putc (',', f); 5166 /* FALLTHRU */ 5167 case O_pregister: 5168 putc ('(', f); 5169 { 5170 expressionS nexp = *exp; 5171 nexp.X_op = O_register; 5172 print_expr_1 (f, &nexp); 5173 } 5174 putc (')', f); 5175 break; 5176 default: 5177 print_expr_1 (f, exp); 5178 break; 5179 } 5180 } 5181 #endif 5182 5183 /* The target specific pseudo-ops which we support. */ 5185 5186 const pseudo_typeS md_pseudo_table[] = 5187 { 5188 #ifdef OBJ_ECOFF 5189 {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */ 5190 {"rdata", s_alpha_rdata, 0}, 5191 #endif 5192 {"text", s_alpha_text, 0}, 5193 {"data", s_alpha_data, 0}, 5194 #ifdef OBJ_ECOFF 5195 {"sdata", s_alpha_sdata, 0}, 5196 #endif 5197 #ifdef OBJ_ELF 5198 {"section", s_alpha_section, 0}, 5199 {"section.s", s_alpha_section, 0}, 5200 {"sect", s_alpha_section, 0}, 5201 {"sect.s", s_alpha_section, 0}, 5202 #endif 5203 #ifdef OBJ_EVAX 5204 {"section", s_alpha_section, 0}, 5205 {"literals", s_alpha_literals, 0}, 5206 {"pdesc", s_alpha_pdesc, 0}, 5207 {"name", s_alpha_name, 0}, 5208 {"linkage", s_alpha_linkage, 0}, 5209 {"code_address", s_alpha_code_address, 0}, 5210 {"ent", s_alpha_ent, 0}, 5211 {"frame", s_alpha_frame, 0}, 5212 {"fp_save", s_alpha_fp_save, 0}, 5213 {"mask", s_alpha_mask, 0}, 5214 {"fmask", s_alpha_fmask, 0}, 5215 {"end", s_alpha_end, 0}, 5216 {"file", s_alpha_file, 0}, 5217 {"rdata", s_alpha_section, 1}, 5218 {"comm", s_alpha_comm, 0}, 5219 {"link", s_alpha_section, 3}, 5220 {"ctors", s_alpha_section, 4}, 5221 {"dtors", s_alpha_section, 5}, 5222 {"handler", s_alpha_handler, 0}, 5223 {"handler_data", s_alpha_handler, 1}, 5224 #endif 5225 #ifdef OBJ_ELF 5226 /* Frame related pseudos. */ 5227 {"ent", s_alpha_ent, 0}, 5228 {"end", s_alpha_end, 0}, 5229 {"mask", s_alpha_mask, 0}, 5230 {"fmask", s_alpha_mask, 1}, 5231 {"frame", s_alpha_frame, 0}, 5232 {"prologue", s_alpha_prologue, 0}, 5233 {"file", s_alpha_file, 5}, 5234 {"loc", s_alpha_loc, 9}, 5235 {"stabs", s_alpha_stab, 's'}, 5236 {"stabn", s_alpha_stab, 'n'}, 5237 {"usepv", s_alpha_usepv, 0}, 5238 /* COFF debugging related pseudos. */ 5239 {"begin", s_alpha_coff_wrapper, 0}, 5240 {"bend", s_alpha_coff_wrapper, 1}, 5241 {"def", s_alpha_coff_wrapper, 2}, 5242 {"dim", s_alpha_coff_wrapper, 3}, 5243 {"endef", s_alpha_coff_wrapper, 4}, 5244 {"scl", s_alpha_coff_wrapper, 5}, 5245 {"tag", s_alpha_coff_wrapper, 6}, 5246 {"val", s_alpha_coff_wrapper, 7}, 5247 #else 5248 #ifdef OBJ_EVAX 5249 {"prologue", s_alpha_prologue, 0}, 5250 #else 5251 {"prologue", s_ignore, 0}, 5252 #endif 5253 #endif 5254 {"gprel32", s_alpha_gprel32, 0}, 5255 {"t_floating", s_alpha_float_cons, 'd'}, 5256 {"s_floating", s_alpha_float_cons, 'f'}, 5257 {"f_floating", s_alpha_float_cons, 'F'}, 5258 {"g_floating", s_alpha_float_cons, 'G'}, 5259 {"d_floating", s_alpha_float_cons, 'D'}, 5260 5261 {"proc", s_alpha_proc, 0}, 5262 {"aproc", s_alpha_proc, 1}, 5263 {"set", s_alpha_set, 0}, 5264 {"reguse", s_ignore, 0}, 5265 {"livereg", s_ignore, 0}, 5266 {"base", s_alpha_base, 0}, /*??*/ 5267 {"option", s_ignore, 0}, 5268 {"aent", s_ignore, 0}, 5269 {"ugen", s_ignore, 0}, 5270 {"eflag", s_ignore, 0}, 5271 5272 {"align", s_alpha_align, 0}, 5273 {"double", s_alpha_float_cons, 'd'}, 5274 {"float", s_alpha_float_cons, 'f'}, 5275 {"single", s_alpha_float_cons, 'f'}, 5276 {"ascii", s_alpha_stringer, 0}, 5277 {"asciz", s_alpha_stringer, 1}, 5278 {"string", s_alpha_stringer, 1}, 5279 {"space", s_alpha_space, 0}, 5280 {"skip", s_alpha_space, 0}, 5281 {"zero", s_alpha_space, 0}, 5282 5283 /* Unaligned data pseudos. */ 5284 {"uword", s_alpha_ucons, 2}, 5285 {"ulong", s_alpha_ucons, 4}, 5286 {"uquad", s_alpha_ucons, 8}, 5287 5288 #ifdef OBJ_ELF 5289 /* Dwarf wants these versions of unaligned. */ 5290 {"2byte", s_alpha_ucons, 2}, 5291 {"4byte", s_alpha_ucons, 4}, 5292 {"8byte", s_alpha_ucons, 8}, 5293 #endif 5294 5295 /* We don't do any optimizing, so we can safely ignore these. */ 5296 {"noalias", s_ignore, 0}, 5297 {"alias", s_ignore, 0}, 5298 5299 {"arch", s_alpha_arch, 0}, 5300 5301 {NULL, 0, 0}, 5302 }; 5303 5304 #ifdef OBJ_ECOFF 5306 5307 /* @@@ GP selection voodoo. All of this seems overly complicated and 5308 unnecessary; which is the primary reason it's for ECOFF only. */ 5309 5310 static inline void 5311 maybe_set_gp (asection *sec) 5312 { 5313 bfd_vma vma; 5314 5315 if (!sec) 5316 return; 5317 vma = bfd_get_section_vma (sec->owner, sec); 5318 if (vma && vma < alpha_gp_value) 5319 alpha_gp_value = vma; 5320 } 5321 5322 static void 5323 select_gp_value (void) 5324 { 5325 gas_assert (alpha_gp_value == 0); 5326 5327 /* Get minus-one in whatever width... */ 5328 alpha_gp_value = 0; 5329 alpha_gp_value--; 5330 5331 /* Select the smallest VMA of these existing sections. */ 5332 maybe_set_gp (alpha_lita_section); 5333 5334 /* @@ Will a simple 0x8000 work here? If not, why not? */ 5335 #define GP_ADJUSTMENT (0x8000 - 0x10) 5336 5337 alpha_gp_value += GP_ADJUSTMENT; 5338 5339 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value); 5340 5341 #ifdef DEBUG1 5342 printf (_("Chose GP value of %lx\n"), alpha_gp_value); 5343 #endif 5344 } 5345 #endif /* OBJ_ECOFF */ 5346 5347 #ifdef OBJ_ELF 5348 /* Map 's' to SHF_ALPHA_GPREL. */ 5349 5350 bfd_vma 5351 alpha_elf_section_letter (int letter, char **ptr_msg) 5352 { 5353 if (letter == 's') 5354 return SHF_ALPHA_GPREL; 5355 5356 *ptr_msg = _("bad .section directive: want a,s,w,x,M,S,G,T in string"); 5357 return -1; 5358 } 5359 5360 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */ 5361 5362 flagword 5363 alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED) 5364 { 5365 if (attr & SHF_ALPHA_GPREL) 5366 flags |= SEC_SMALL_DATA; 5367 return flags; 5368 } 5369 #endif /* OBJ_ELF */ 5370 5371 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents 5372 of an rs_align_code fragment. */ 5373 5374 void 5375 alpha_handle_align (fragS *fragp) 5376 { 5377 static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f }; 5378 static char const nopunop[8] = 5379 { 5380 0x1f, 0x04, 0xff, 0x47, 5381 0x00, 0x00, 0xfe, 0x2f 5382 }; 5383 5384 int bytes, fix; 5385 char *p; 5386 5387 if (fragp->fr_type != rs_align_code) 5388 return; 5389 5390 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; 5391 p = fragp->fr_literal + fragp->fr_fix; 5392 fix = 0; 5393 5394 if (bytes & 3) 5395 { 5396 fix = bytes & 3; 5397 memset (p, 0, fix); 5398 p += fix; 5399 bytes -= fix; 5400 } 5401 5402 if (bytes & 4) 5403 { 5404 memcpy (p, unop, 4); 5405 p += 4; 5406 bytes -= 4; 5407 fix += 4; 5408 } 5409 5410 memcpy (p, nopunop, 8); 5411 5412 fragp->fr_fix += fix; 5413 fragp->fr_var = 8; 5414 } 5415 5416 /* Public interface functions. */ 5418 5419 /* This function is called once, at assembler startup time. It sets 5420 up all the tables, etc. that the MD part of the assembler will 5421 need, that can be determined before arguments are parsed. */ 5422 5423 void 5424 md_begin (void) 5425 { 5426 unsigned int i; 5427 5428 /* Verify that X_op field is wide enough. */ 5429 { 5430 expressionS e; 5431 5432 e.X_op = O_max; 5433 gas_assert (e.X_op == O_max); 5434 } 5435 5436 /* Create the opcode hash table. */ 5437 alpha_opcode_hash = hash_new (); 5438 5439 for (i = 0; i < alpha_num_opcodes;) 5440 { 5441 const char *name, *retval, *slash; 5442 5443 name = alpha_opcodes[i].name; 5444 retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]); 5445 if (retval) 5446 as_fatal (_("internal error: can't hash opcode `%s': %s"), 5447 name, retval); 5448 5449 /* Some opcodes include modifiers of various sorts with a "/mod" 5450 syntax, like the architecture manual suggests. However, for 5451 use with gcc at least, we also need access to those same opcodes 5452 without the "/". */ 5453 5454 if ((slash = strchr (name, '/')) != NULL) 5455 { 5456 char *p = (char *) xmalloc (strlen (name)); 5457 5458 memcpy (p, name, slash - name); 5459 strcpy (p + (slash - name), slash + 1); 5460 5461 (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]); 5462 /* Ignore failures -- the opcode table does duplicate some 5463 variants in different forms, like "hw_stq" and "hw_st/q". */ 5464 } 5465 5466 while (++i < alpha_num_opcodes 5467 && (alpha_opcodes[i].name == name 5468 || !strcmp (alpha_opcodes[i].name, name))) 5469 continue; 5470 } 5471 5472 /* Create the macro hash table. */ 5473 alpha_macro_hash = hash_new (); 5474 5475 for (i = 0; i < alpha_num_macros;) 5476 { 5477 const char *name, *retval; 5478 5479 name = alpha_macros[i].name; 5480 retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]); 5481 if (retval) 5482 as_fatal (_("internal error: can't hash macro `%s': %s"), 5483 name, retval); 5484 5485 while (++i < alpha_num_macros 5486 && (alpha_macros[i].name == name 5487 || !strcmp (alpha_macros[i].name, name))) 5488 continue; 5489 } 5490 5491 /* Construct symbols for each of the registers. */ 5492 for (i = 0; i < 32; ++i) 5493 { 5494 char name[4]; 5495 5496 sprintf (name, "$%d", i); 5497 alpha_register_table[i] = symbol_create (name, reg_section, i, 5498 &zero_address_frag); 5499 } 5500 5501 for (; i < 64; ++i) 5502 { 5503 char name[5]; 5504 5505 sprintf (name, "$f%d", i - 32); 5506 alpha_register_table[i] = symbol_create (name, reg_section, i, 5507 &zero_address_frag); 5508 } 5509 5510 /* Create the special symbols and sections we'll be using. */ 5511 5512 /* So .sbss will get used for tiny objects. */ 5513 bfd_set_gp_size (stdoutput, g_switch_value); 5514 5515 #ifdef OBJ_ECOFF 5516 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol); 5517 5518 /* For handling the GP, create a symbol that won't be output in the 5519 symbol table. We'll edit it out of relocs later. */ 5520 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000, 5521 &zero_address_frag); 5522 #endif 5523 5524 #ifdef OBJ_EVAX 5525 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol); 5526 #endif 5527 5528 #ifdef OBJ_ELF 5529 if (ECOFF_DEBUGGING) 5530 { 5531 segT sec = subseg_new (".mdebug", (subsegT) 0); 5532 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); 5533 bfd_set_section_alignment (stdoutput, sec, 3); 5534 } 5535 #endif 5536 5537 /* Create literal lookup hash table. */ 5538 alpha_literal_hash = hash_new (); 5539 5540 subseg_set (text_section, 0); 5541 } 5542 5543 /* The public interface to the instruction assembler. */ 5544 5545 void 5546 md_assemble (char *str) 5547 { 5548 /* Current maximum is 13. */ 5549 char opname[32]; 5550 expressionS tok[MAX_INSN_ARGS]; 5551 int ntok, trunclen; 5552 size_t opnamelen; 5553 5554 /* Split off the opcode. */ 5555 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819"); 5556 trunclen = (opnamelen < sizeof (opname) - 1 5557 ? opnamelen 5558 : sizeof (opname) - 1); 5559 memcpy (opname, str, trunclen); 5560 opname[trunclen] = '\0'; 5561 5562 /* Tokenize the rest of the line. */ 5563 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0) 5564 { 5565 if (ntok != TOKENIZE_ERROR_REPORT) 5566 as_bad (_("syntax error")); 5567 5568 return; 5569 } 5570 5571 /* Finish it off. */ 5572 assemble_tokens (opname, tok, ntok, alpha_macros_on); 5573 } 5574 5575 /* Round up a section's size to the appropriate boundary. */ 5576 5577 valueT 5578 md_section_align (segT seg, valueT size) 5579 { 5580 int align = bfd_get_section_alignment (stdoutput, seg); 5581 valueT mask = ((valueT) 1 << align) - 1; 5582 5583 return (size + mask) & ~mask; 5584 } 5585 5586 /* Turn a string in input_line_pointer into a floating point constant 5587 of type TYPE, and store the appropriate bytes in *LITP. The number 5588 of LITTLENUMS emitted is stored in *SIZEP. An error message is 5589 returned, or NULL on OK. */ 5590 5591 char * 5592 md_atof (int type, char *litP, int *sizeP) 5593 { 5594 extern char *vax_md_atof (int, char *, int *); 5595 5596 switch (type) 5597 { 5598 /* VAX floats. */ 5599 case 'G': 5600 /* vax_md_atof() doesn't like "G" for some reason. */ 5601 type = 'g'; 5602 case 'F': 5603 case 'D': 5604 return vax_md_atof (type, litP, sizeP); 5605 5606 default: 5607 return ieee_md_atof (type, litP, sizeP, FALSE); 5608 } 5609 } 5610 5611 /* Take care of the target-specific command-line options. */ 5612 5613 int 5614 md_parse_option (int c, char *arg) 5615 { 5616 switch (c) 5617 { 5618 case 'F': 5619 alpha_nofloats_on = 1; 5620 break; 5621 5622 case OPTION_32ADDR: 5623 alpha_addr32_on = 1; 5624 break; 5625 5626 case 'g': 5627 alpha_debug = 1; 5628 break; 5629 5630 case 'G': 5631 g_switch_value = atoi (arg); 5632 break; 5633 5634 case 'm': 5635 { 5636 const struct cpu_type *p; 5637 5638 for (p = cpu_types; p->name; ++p) 5639 if (strcmp (arg, p->name) == 0) 5640 { 5641 alpha_target_name = p->name, alpha_target = p->flags; 5642 goto found; 5643 } 5644 as_warn (_("Unknown CPU identifier `%s'"), arg); 5645 found:; 5646 } 5647 break; 5648 5649 #ifdef OBJ_EVAX 5650 case '+': /* For g++. Hash any name > 63 chars long. */ 5651 alpha_flag_hash_long_names = 1; 5652 break; 5653 5654 case 'H': /* Show new symbol after hash truncation. */ 5655 alpha_flag_show_after_trunc = 1; 5656 break; 5657 5658 case 'h': /* For gnu-c/vax compatibility. */ 5659 break; 5660 5661 case OPTION_REPLACE: 5662 alpha_flag_replace = 1; 5663 break; 5664 5665 case OPTION_NOREPLACE: 5666 alpha_flag_replace = 0; 5667 break; 5668 #endif 5669 5670 case OPTION_RELAX: 5671 alpha_flag_relax = 1; 5672 break; 5673 5674 #ifdef OBJ_ELF 5675 case OPTION_MDEBUG: 5676 alpha_flag_mdebug = 1; 5677 break; 5678 case OPTION_NO_MDEBUG: 5679 alpha_flag_mdebug = 0; 5680 break; 5681 #endif 5682 5683 default: 5684 return 0; 5685 } 5686 5687 return 1; 5688 } 5689 5690 /* Print a description of the command-line options that we accept. */ 5691 5692 void 5693 md_show_usage (FILE *stream) 5694 { 5695 fputs (_("\ 5696 Alpha options:\n\ 5697 -32addr treat addresses as 32-bit values\n\ 5698 -F lack floating point instructions support\n\ 5699 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\ 5700 specify variant of Alpha architecture\n\ 5701 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\ 5702 these variants include PALcode opcodes\n"), 5703 stream); 5704 #ifdef OBJ_EVAX 5705 fputs (_("\ 5706 VMS options:\n\ 5707 -+ encode (don't truncate) names longer than 64 characters\n\ 5708 -H show new symbol after hash truncation\n\ 5709 -replace/-noreplace enable or disable the optimization of procedure calls\n"), 5710 stream); 5711 #endif 5712 } 5713 5714 /* Decide from what point a pc-relative relocation is relative to, 5715 relative to the pc-relative fixup. Er, relatively speaking. */ 5716 5717 long 5718 md_pcrel_from (fixS *fixP) 5719 { 5720 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; 5721 5722 switch (fixP->fx_r_type) 5723 { 5724 case BFD_RELOC_23_PCREL_S2: 5725 case BFD_RELOC_ALPHA_HINT: 5726 case BFD_RELOC_ALPHA_BRSGP: 5727 return addr + 4; 5728 default: 5729 return addr; 5730 } 5731 } 5732 5733 /* Attempt to simplify or even eliminate a fixup. The return value is 5734 ignored; perhaps it was once meaningful, but now it is historical. 5735 To indicate that a fixup has been eliminated, set fixP->fx_done. 5736 5737 For ELF, here it is that we transform the GPDISP_HI16 reloc we used 5738 internally into the GPDISP reloc used externally. We had to do 5739 this so that we'd have the GPDISP_LO16 reloc as a tag to compute 5740 the distance to the "lda" instruction for setting the addend to 5741 GPDISP. */ 5742 5743 void 5744 md_apply_fix (fixS *fixP, valueT * valP, segT seg) 5745 { 5746 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where; 5747 valueT value = * valP; 5748 unsigned image, size; 5749 5750 switch (fixP->fx_r_type) 5751 { 5752 /* The GPDISP relocations are processed internally with a symbol 5753 referring to the current function's section; we need to drop 5754 in a value which, when added to the address of the start of 5755 the function, gives the desired GP. */ 5756 case BFD_RELOC_ALPHA_GPDISP_HI16: 5757 { 5758 fixS *next = fixP->fx_next; 5759 5760 /* With user-specified !gpdisp relocations, we can be missing 5761 the matching LO16 reloc. We will have already issued an 5762 error message. */ 5763 if (next) 5764 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where 5765 - fixP->fx_frag->fr_address - fixP->fx_where); 5766 5767 value = (value - sign_extend_16 (value)) >> 16; 5768 } 5769 #ifdef OBJ_ELF 5770 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP; 5771 #endif 5772 goto do_reloc_gp; 5773 5774 case BFD_RELOC_ALPHA_GPDISP_LO16: 5775 value = sign_extend_16 (value); 5776 fixP->fx_offset = 0; 5777 #ifdef OBJ_ELF 5778 fixP->fx_done = 1; 5779 #endif 5780 5781 do_reloc_gp: 5782 fixP->fx_addsy = section_symbol (seg); 5783 md_number_to_chars (fixpos, value, 2); 5784 break; 5785 5786 case BFD_RELOC_16: 5787 if (fixP->fx_pcrel) 5788 fixP->fx_r_type = BFD_RELOC_16_PCREL; 5789 size = 2; 5790 goto do_reloc_xx; 5791 5792 case BFD_RELOC_32: 5793 if (fixP->fx_pcrel) 5794 fixP->fx_r_type = BFD_RELOC_32_PCREL; 5795 size = 4; 5796 goto do_reloc_xx; 5797 5798 case BFD_RELOC_64: 5799 if (fixP->fx_pcrel) 5800 fixP->fx_r_type = BFD_RELOC_64_PCREL; 5801 size = 8; 5802 5803 do_reloc_xx: 5804 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) 5805 { 5806 md_number_to_chars (fixpos, value, size); 5807 goto done; 5808 } 5809 return; 5810 5811 #ifdef OBJ_ECOFF 5812 case BFD_RELOC_GPREL32: 5813 gas_assert (fixP->fx_subsy == alpha_gp_symbol); 5814 fixP->fx_subsy = 0; 5815 /* FIXME: inherited this obliviousness of `value' -- why? */ 5816 md_number_to_chars (fixpos, -alpha_gp_value, 4); 5817 break; 5818 #else 5819 case BFD_RELOC_GPREL32: 5820 #endif 5821 case BFD_RELOC_GPREL16: 5822 case BFD_RELOC_ALPHA_GPREL_HI16: 5823 case BFD_RELOC_ALPHA_GPREL_LO16: 5824 return; 5825 5826 case BFD_RELOC_23_PCREL_S2: 5827 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) 5828 { 5829 image = bfd_getl32 (fixpos); 5830 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF); 5831 goto write_done; 5832 } 5833 return; 5834 5835 case BFD_RELOC_ALPHA_HINT: 5836 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) 5837 { 5838 image = bfd_getl32 (fixpos); 5839 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); 5840 goto write_done; 5841 } 5842 return; 5843 5844 #ifdef OBJ_ELF 5845 case BFD_RELOC_ALPHA_BRSGP: 5846 return; 5847 5848 case BFD_RELOC_ALPHA_TLSGD: 5849 case BFD_RELOC_ALPHA_TLSLDM: 5850 case BFD_RELOC_ALPHA_GOTDTPREL16: 5851 case BFD_RELOC_ALPHA_DTPREL_HI16: 5852 case BFD_RELOC_ALPHA_DTPREL_LO16: 5853 case BFD_RELOC_ALPHA_DTPREL16: 5854 case BFD_RELOC_ALPHA_GOTTPREL16: 5855 case BFD_RELOC_ALPHA_TPREL_HI16: 5856 case BFD_RELOC_ALPHA_TPREL_LO16: 5857 case BFD_RELOC_ALPHA_TPREL16: 5858 if (fixP->fx_addsy) 5859 S_SET_THREAD_LOCAL (fixP->fx_addsy); 5860 return; 5861 #endif 5862 5863 #ifdef OBJ_ECOFF 5864 case BFD_RELOC_ALPHA_LITERAL: 5865 md_number_to_chars (fixpos, value, 2); 5866 return; 5867 #endif 5868 case BFD_RELOC_ALPHA_ELF_LITERAL: 5869 case BFD_RELOC_ALPHA_LITUSE: 5870 case BFD_RELOC_ALPHA_LINKAGE: 5871 case BFD_RELOC_ALPHA_CODEADDR: 5872 return; 5873 5874 #ifdef OBJ_EVAX 5875 case BFD_RELOC_ALPHA_NOP: 5876 value -= (8 + 4); /* PC-relative, base is jsr+4. */ 5877 5878 /* From B.4.5.2 of the OpenVMS Linker Utility Manual: 5879 "Finally, the ETIR$C_STC_BSR command passes the same address 5880 as ETIR$C_STC_NOP (so that they will fail or succeed together), 5881 and the same test is done again." */ 5882 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) 5883 { 5884 fixP->fx_addnumber = -value; 5885 return; 5886 } 5887 5888 if ((abs (value) >> 2) & ~0xfffff) 5889 goto done; 5890 else 5891 { 5892 /* Change to a nop. */ 5893 image = 0x47FF041F; 5894 goto write_done; 5895 } 5896 5897 case BFD_RELOC_ALPHA_LDA: 5898 /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute 5899 the value for an O_subtract. */ 5900 if (fixP->fx_addsy 5901 && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) 5902 { 5903 fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value; 5904 return; 5905 } 5906 5907 if ((abs (value)) & ~0x7fff) 5908 goto done; 5909 else 5910 { 5911 /* Change to an lda. */ 5912 image = 0x237B0000 | (value & 0xFFFF); 5913 goto write_done; 5914 } 5915 5916 case BFD_RELOC_ALPHA_BSR: 5917 case BFD_RELOC_ALPHA_BOH: 5918 value -= 4; /* PC-relative, base is jsr+4. */ 5919 5920 /* See comment in the BFD_RELOC_ALPHA_NOP case above. */ 5921 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) 5922 { 5923 fixP->fx_addnumber = -value; 5924 return; 5925 } 5926 5927 if ((abs (value) >> 2) & ~0xfffff) 5928 { 5929 /* Out of range. */ 5930 if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH) 5931 { 5932 /* Add a hint. */ 5933 image = bfd_getl32(fixpos); 5934 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); 5935 goto write_done; 5936 } 5937 goto done; 5938 } 5939 else 5940 { 5941 /* Change to a branch. */ 5942 image = 0xD3400000 | ((value >> 2) & 0x1FFFFF); 5943 goto write_done; 5944 } 5945 #endif 5946 5947 case BFD_RELOC_VTABLE_INHERIT: 5948 case BFD_RELOC_VTABLE_ENTRY: 5949 return; 5950 5951 default: 5952 { 5953 const struct alpha_operand *operand; 5954 5955 if ((int) fixP->fx_r_type >= 0) 5956 as_fatal (_("unhandled relocation type %s"), 5957 bfd_get_reloc_code_name (fixP->fx_r_type)); 5958 5959 gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands); 5960 operand = &alpha_operands[-(int) fixP->fx_r_type]; 5961 5962 /* The rest of these fixups only exist internally during symbol 5963 resolution and have no representation in the object file. 5964 Therefore they must be completely resolved as constants. */ 5965 5966 if (fixP->fx_addsy != 0 5967 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section) 5968 as_bad_where (fixP->fx_file, fixP->fx_line, 5969 _("non-absolute expression in constant field")); 5970 5971 image = bfd_getl32 (fixpos); 5972 image = insert_operand (image, operand, (offsetT) value, 5973 fixP->fx_file, fixP->fx_line); 5974 } 5975 goto write_done; 5976 } 5977 5978 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0) 5979 return; 5980 else 5981 { 5982 as_warn_where (fixP->fx_file, fixP->fx_line, 5983 _("type %d reloc done?\n"), (int) fixP->fx_r_type); 5984 goto done; 5985 } 5986 5987 write_done: 5988 md_number_to_chars (fixpos, image, 4); 5989 5990 done: 5991 fixP->fx_done = 1; 5992 } 5993 5994 /* Look for a register name in the given symbol. */ 5995 5996 symbolS * 5997 md_undefined_symbol (char *name) 5998 { 5999 if (*name == '$') 6000 { 6001 int is_float = 0, num; 6002 6003 switch (*++name) 6004 { 6005 case 'f': 6006 if (name[1] == 'p' && name[2] == '\0') 6007 return alpha_register_table[AXP_REG_FP]; 6008 is_float = 32; 6009 /* Fall through. */ 6010 6011 case 'r': 6012 if (!ISDIGIT (*++name)) 6013 break; 6014 /* Fall through. */ 6015 6016 case '0': case '1': case '2': case '3': case '4': 6017 case '5': case '6': case '7': case '8': case '9': 6018 if (name[1] == '\0') 6019 num = name[0] - '0'; 6020 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0') 6021 { 6022 num = (name[0] - '0') * 10 + name[1] - '0'; 6023 if (num >= 32) 6024 break; 6025 } 6026 else 6027 break; 6028 6029 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT) 6030 as_warn (_("Used $at without \".set noat\"")); 6031 return alpha_register_table[num + is_float]; 6032 6033 case 'a': 6034 if (name[1] == 't' && name[2] == '\0') 6035 { 6036 if (!alpha_noat_on) 6037 as_warn (_("Used $at without \".set noat\"")); 6038 return alpha_register_table[AXP_REG_AT]; 6039 } 6040 break; 6041 6042 case 'g': 6043 if (name[1] == 'p' && name[2] == '\0') 6044 return alpha_register_table[alpha_gp_register]; 6045 break; 6046 6047 case 's': 6048 if (name[1] == 'p' && name[2] == '\0') 6049 return alpha_register_table[AXP_REG_SP]; 6050 break; 6051 } 6052 } 6053 return NULL; 6054 } 6055 6056 #ifdef OBJ_ECOFF 6057 /* @@@ Magic ECOFF bits. */ 6058 6059 void 6060 alpha_frob_ecoff_data (void) 6061 { 6062 select_gp_value (); 6063 /* $zero and $f31 are read-only. */ 6064 alpha_gprmask &= ~1; 6065 alpha_fprmask &= ~1; 6066 } 6067 #endif 6068 6069 /* Hook to remember a recently defined label so that the auto-align 6070 code can adjust the symbol after we know what alignment will be 6071 required. */ 6072 6073 void 6074 alpha_define_label (symbolS *sym) 6075 { 6076 alpha_insn_label = sym; 6077 #ifdef OBJ_ELF 6078 dwarf2_emit_label (sym); 6079 #endif 6080 } 6081 6082 /* Return true if we must always emit a reloc for a type and false if 6083 there is some hope of resolving it at assembly time. */ 6084 6085 int 6086 alpha_force_relocation (fixS *f) 6087 { 6088 if (alpha_flag_relax) 6089 return 1; 6090 6091 switch (f->fx_r_type) 6092 { 6093 case BFD_RELOC_ALPHA_GPDISP_HI16: 6094 case BFD_RELOC_ALPHA_GPDISP_LO16: 6095 case BFD_RELOC_ALPHA_GPDISP: 6096 case BFD_RELOC_ALPHA_LITERAL: 6097 case BFD_RELOC_ALPHA_ELF_LITERAL: 6098 case BFD_RELOC_ALPHA_LITUSE: 6099 case BFD_RELOC_GPREL16: 6100 case BFD_RELOC_GPREL32: 6101 case BFD_RELOC_ALPHA_GPREL_HI16: 6102 case BFD_RELOC_ALPHA_GPREL_LO16: 6103 case BFD_RELOC_ALPHA_LINKAGE: 6104 case BFD_RELOC_ALPHA_CODEADDR: 6105 case BFD_RELOC_ALPHA_BRSGP: 6106 case BFD_RELOC_ALPHA_TLSGD: 6107 case BFD_RELOC_ALPHA_TLSLDM: 6108 case BFD_RELOC_ALPHA_GOTDTPREL16: 6109 case BFD_RELOC_ALPHA_DTPREL_HI16: 6110 case BFD_RELOC_ALPHA_DTPREL_LO16: 6111 case BFD_RELOC_ALPHA_DTPREL16: 6112 case BFD_RELOC_ALPHA_GOTTPREL16: 6113 case BFD_RELOC_ALPHA_TPREL_HI16: 6114 case BFD_RELOC_ALPHA_TPREL_LO16: 6115 case BFD_RELOC_ALPHA_TPREL16: 6116 #ifdef OBJ_EVAX 6117 case BFD_RELOC_ALPHA_NOP: 6118 case BFD_RELOC_ALPHA_BSR: 6119 case BFD_RELOC_ALPHA_LDA: 6120 case BFD_RELOC_ALPHA_BOH: 6121 #endif 6122 return 1; 6123 6124 default: 6125 break; 6126 } 6127 6128 return generic_force_reloc (f); 6129 } 6130 6131 /* Return true if we can partially resolve a relocation now. */ 6132 6133 int 6134 alpha_fix_adjustable (fixS *f) 6135 { 6136 /* Are there any relocation types for which we must generate a 6137 reloc but we can adjust the values contained within it? */ 6138 switch (f->fx_r_type) 6139 { 6140 case BFD_RELOC_ALPHA_GPDISP_HI16: 6141 case BFD_RELOC_ALPHA_GPDISP_LO16: 6142 case BFD_RELOC_ALPHA_GPDISP: 6143 return 0; 6144 6145 case BFD_RELOC_ALPHA_LITERAL: 6146 case BFD_RELOC_ALPHA_ELF_LITERAL: 6147 case BFD_RELOC_ALPHA_LITUSE: 6148 case BFD_RELOC_ALPHA_LINKAGE: 6149 case BFD_RELOC_ALPHA_CODEADDR: 6150 return 1; 6151 6152 case BFD_RELOC_VTABLE_ENTRY: 6153 case BFD_RELOC_VTABLE_INHERIT: 6154 return 0; 6155 6156 case BFD_RELOC_GPREL16: 6157 case BFD_RELOC_GPREL32: 6158 case BFD_RELOC_ALPHA_GPREL_HI16: 6159 case BFD_RELOC_ALPHA_GPREL_LO16: 6160 case BFD_RELOC_23_PCREL_S2: 6161 case BFD_RELOC_16: 6162 case BFD_RELOC_32: 6163 case BFD_RELOC_64: 6164 case BFD_RELOC_ALPHA_HINT: 6165 return 1; 6166 6167 case BFD_RELOC_ALPHA_TLSGD: 6168 case BFD_RELOC_ALPHA_TLSLDM: 6169 case BFD_RELOC_ALPHA_GOTDTPREL16: 6170 case BFD_RELOC_ALPHA_DTPREL_HI16: 6171 case BFD_RELOC_ALPHA_DTPREL_LO16: 6172 case BFD_RELOC_ALPHA_DTPREL16: 6173 case BFD_RELOC_ALPHA_GOTTPREL16: 6174 case BFD_RELOC_ALPHA_TPREL_HI16: 6175 case BFD_RELOC_ALPHA_TPREL_LO16: 6176 case BFD_RELOC_ALPHA_TPREL16: 6177 /* ??? No idea why we can't return a reference to .tbss+10, but 6178 we're preventing this in the other assemblers. Follow for now. */ 6179 return 0; 6180 6181 #ifdef OBJ_ELF 6182 case BFD_RELOC_ALPHA_BRSGP: 6183 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and 6184 let it get resolved at assembly time. */ 6185 { 6186 symbolS *sym = f->fx_addsy; 6187 const char *name; 6188 int offset = 0; 6189 6190 if (generic_force_reloc (f)) 6191 return 0; 6192 6193 switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD) 6194 { 6195 case STO_ALPHA_NOPV: 6196 break; 6197 case STO_ALPHA_STD_GPLOAD: 6198 offset = 8; 6199 break; 6200 default: 6201 if (S_IS_LOCAL (sym)) 6202 name = "<local>"; 6203 else 6204 name = S_GET_NAME (sym); 6205 as_bad_where (f->fx_file, f->fx_line, 6206 _("!samegp reloc against symbol without .prologue: %s"), 6207 name); 6208 break; 6209 } 6210 f->fx_r_type = BFD_RELOC_23_PCREL_S2; 6211 f->fx_offset += offset; 6212 return 1; 6213 } 6214 #endif 6215 #ifdef OBJ_EVAX 6216 case BFD_RELOC_ALPHA_NOP: 6217 case BFD_RELOC_ALPHA_BSR: 6218 case BFD_RELOC_ALPHA_LDA: 6219 case BFD_RELOC_ALPHA_BOH: 6220 return 1; 6221 #endif 6222 6223 default: 6224 return 1; 6225 } 6226 } 6227 6228 /* Generate the BFD reloc to be stuck in the object file from the 6229 fixup used internally in the assembler. */ 6230 6231 arelent * 6232 tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, 6233 fixS *fixp) 6234 { 6235 arelent *reloc; 6236 6237 reloc = (arelent *) xmalloc (sizeof (* reloc)); 6238 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 6239 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 6240 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 6241 6242 /* Make sure none of our internal relocations make it this far. 6243 They'd better have been fully resolved by this point. */ 6244 gas_assert ((int) fixp->fx_r_type > 0); 6245 6246 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 6247 if (reloc->howto == NULL) 6248 { 6249 as_bad_where (fixp->fx_file, fixp->fx_line, 6250 _("cannot represent `%s' relocation in object file"), 6251 bfd_get_reloc_code_name (fixp->fx_r_type)); 6252 return NULL; 6253 } 6254 6255 if (!fixp->fx_pcrel != !reloc->howto->pc_relative) 6256 as_fatal (_("internal error? cannot generate `%s' relocation"), 6257 bfd_get_reloc_code_name (fixp->fx_r_type)); 6258 6259 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative); 6260 6261 reloc->addend = fixp->fx_offset; 6262 6263 #ifdef OBJ_ECOFF 6264 /* Fake out bfd_perform_relocation. sigh. */ 6265 /* ??? Better would be to use the special_function hook. */ 6266 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL) 6267 reloc->addend = -alpha_gp_value; 6268 #endif 6269 6270 #ifdef OBJ_EVAX 6271 switch (fixp->fx_r_type) 6272 { 6273 struct evax_private_udata_struct *udata; 6274 const char *pname; 6275 int pname_len; 6276 6277 case BFD_RELOC_ALPHA_LINKAGE: 6278 /* Copy the linkage index. */ 6279 reloc->addend = fixp->fx_addnumber; 6280 break; 6281 6282 case BFD_RELOC_ALPHA_NOP: 6283 case BFD_RELOC_ALPHA_BSR: 6284 case BFD_RELOC_ALPHA_LDA: 6285 case BFD_RELOC_ALPHA_BOH: 6286 pname = symbol_get_bfdsym (fixp->fx_addsy)->name; 6287 6288 /* We need the non-suffixed name of the procedure. Beware that 6289 the main symbol might be equated so look it up and take its name. */ 6290 pname_len = strlen (pname); 6291 if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0) 6292 { 6293 symbolS *sym; 6294 char *my_pname = (char *) alloca (pname_len - 4 + 1); 6295 6296 memcpy (my_pname, pname, pname_len - 4); 6297 my_pname [pname_len - 4] = 0; 6298 sym = symbol_find (my_pname); 6299 if (sym == NULL) 6300 abort (); 6301 6302 while (symbol_equated_reloc_p (sym)) 6303 { 6304 symbolS *n = symbol_get_value_expression (sym)->X_add_symbol; 6305 6306 /* We must avoid looping, as that can occur with a badly 6307 written program. */ 6308 if (n == sym) 6309 break; 6310 sym = n; 6311 } 6312 pname = symbol_get_bfdsym (sym)->name; 6313 } 6314 6315 udata = (struct evax_private_udata_struct *) 6316 xmalloc (sizeof (struct evax_private_udata_struct)); 6317 udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy); 6318 udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym); 6319 udata->origname = (char *)pname; 6320 udata->lkindex = ((struct evax_private_udata_struct *) 6321 symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex; 6322 reloc->sym_ptr_ptr = (void *)udata; 6323 reloc->addend = fixp->fx_addnumber; 6324 6325 default: 6326 break; 6327 } 6328 #endif 6329 6330 return reloc; 6331 } 6332 6333 /* Parse a register name off of the input_line and return a register 6334 number. Gets md_undefined_symbol above to do the register name 6335 matching for us. 6336 6337 Only called as a part of processing the ECOFF .frame directive. */ 6338 6339 int 6340 tc_get_register (int frame ATTRIBUTE_UNUSED) 6341 { 6342 int framereg = AXP_REG_SP; 6343 6344 SKIP_WHITESPACE (); 6345 if (*input_line_pointer == '$') 6346 { 6347 char *s = input_line_pointer; 6348 char c = get_symbol_end (); 6349 symbolS *sym = md_undefined_symbol (s); 6350 6351 *strchr (s, '\0') = c; 6352 if (sym && (framereg = S_GET_VALUE (sym)) <= 31) 6353 goto found; 6354 } 6355 as_warn (_("frame reg expected, using $%d."), framereg); 6356 6357 found: 6358 note_gpreg (framereg); 6359 return framereg; 6360 } 6361 6362 /* This is called before the symbol table is processed. In order to 6363 work with gcc when using mips-tfile, we must keep all local labels. 6364 However, in other cases, we want to discard them. If we were 6365 called with -g, but we didn't see any debugging information, it may 6366 mean that gcc is smuggling debugging information through to 6367 mips-tfile, in which case we must generate all local labels. */ 6368 6369 #ifdef OBJ_ECOFF 6370 6371 void 6372 alpha_frob_file_before_adjust (void) 6373 { 6374 if (alpha_debug != 0 6375 && ! ecoff_debugging_seen) 6376 flag_keep_locals = 1; 6377 } 6378 6379 #endif /* OBJ_ECOFF */ 6380 6381 /* The Alpha has support for some VAX floating point types, as well as for 6382 IEEE floating point. We consider IEEE to be the primary floating point 6383 format, and sneak in the VAX floating point support here. */ 6384 #include "config/atof-vax.c" 6385
Indexes created Tue Mar 31 00:22:50 UTC 2026