tc-sh.c revision 1.1.1.7
1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright (C) 1993-2018 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21 /* Written By Steve Chamberlain <sac (at) cygnus.com> */ 22 23 #include "as.h" 24 #include "subsegs.h" 25 #define DEFINE_TABLE 26 #include "opcodes/sh-opc.h" 27 #include "safe-ctype.h" 28 #include "struc-symbol.h" 29 30 #ifdef OBJ_ELF 31 #include "elf/sh.h" 32 #endif 33 34 #include "dwarf2dbg.h" 35 #include "dw2gencfi.h" 36 37 typedef struct 38 { 39 sh_arg_type type; 40 int reg; 41 expressionS immediate; 42 } 43 sh_operand_info; 44 45 const char comment_chars[] = "!"; 46 const char line_separator_chars[] = ";"; 47 const char line_comment_chars[] = "!#"; 48 49 static void s_uses (int); 50 static void s_uacons (int); 51 52 #ifdef OBJ_ELF 53 static void sh_elf_cons (int); 54 55 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 56 #endif 57 58 static void 59 big (int ignore ATTRIBUTE_UNUSED) 60 { 61 if (! target_big_endian) 62 as_bad (_("directive .big encountered when option -big required")); 63 64 /* Stop further messages. */ 65 target_big_endian = 1; 66 } 67 68 static void 69 little (int ignore ATTRIBUTE_UNUSED) 70 { 71 if (target_big_endian) 72 as_bad (_("directive .little encountered when option -little required")); 73 74 /* Stop further messages. */ 75 target_big_endian = 0; 76 } 77 78 /* This table describes all the machine specific pseudo-ops the assembler 79 has to support. The fields are: 80 pseudo-op name without dot 81 function to call to execute this pseudo-op 82 Integer arg to pass to the function. */ 83 84 const pseudo_typeS md_pseudo_table[] = 85 { 86 #ifdef OBJ_ELF 87 {"long", sh_elf_cons, 4}, 88 {"int", sh_elf_cons, 4}, 89 {"word", sh_elf_cons, 2}, 90 {"short", sh_elf_cons, 2}, 91 #else 92 {"int", cons, 4}, 93 {"word", cons, 2}, 94 #endif /* OBJ_ELF */ 95 {"big", big, 0}, 96 {"form", listing_psize, 0}, 97 {"little", little, 0}, 98 {"heading", listing_title, 0}, 99 {"import", s_ignore, 0}, 100 {"page", listing_eject, 0}, 101 {"program", s_ignore, 0}, 102 {"uses", s_uses, 0}, 103 {"uaword", s_uacons, 2}, 104 {"ualong", s_uacons, 4}, 105 {"uaquad", s_uacons, 8}, 106 {"2byte", s_uacons, 2}, 107 {"4byte", s_uacons, 4}, 108 {"8byte", s_uacons, 8}, 109 {0, 0, 0} 110 }; 111 112 int sh_relax; /* set if -relax seen */ 113 114 /* Whether -small was seen. */ 115 116 int sh_small; 117 118 /* Flag to generate relocations against symbol values for local symbols. */ 119 120 static int dont_adjust_reloc_32; 121 122 /* Flag to indicate that '$' is allowed as a register prefix. */ 123 124 static int allow_dollar_register_prefix; 125 126 /* Preset architecture set, if given; zero otherwise. */ 127 128 static unsigned int preset_target_arch; 129 130 /* The bit mask of architectures that could 131 accommodate the insns seen so far. */ 132 static unsigned int valid_arch; 133 134 #ifdef OBJ_ELF 135 /* Whether --fdpic was given. */ 136 static int sh_fdpic; 137 #endif 138 139 const char EXP_CHARS[] = "eE"; 140 141 /* Chars that mean this number is a floating point constant. */ 142 /* As in 0f12.456 */ 143 /* or 0d1.2345e12 */ 144 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 145 146 #define C(a,b) ENCODE_RELAX(a,b) 147 148 #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 149 #define GET_WHAT(x) ((x>>4)) 150 151 /* These are the three types of relaxable instruction. */ 152 /* These are the types of relaxable instructions; except for END which is 153 a marker. */ 154 #define COND_JUMP 1 155 #define COND_JUMP_DELAY 2 156 #define UNCOND_JUMP 3 157 158 #define END 4 159 160 #define UNDEF_DISP 0 161 #define COND8 1 162 #define COND12 2 163 #define COND32 3 164 #define UNDEF_WORD_DISP 4 165 166 #define UNCOND12 1 167 #define UNCOND32 2 168 169 /* Branch displacements are from the address of the branch plus 170 four, thus all minimum and maximum values have 4 added to them. */ 171 #define COND8_F 258 172 #define COND8_M -252 173 #define COND8_LENGTH 2 174 175 /* There is one extra instruction before the branch, so we must add 176 two more bytes to account for it. */ 177 #define COND12_F 4100 178 #define COND12_M -4090 179 #define COND12_LENGTH 6 180 181 #define COND12_DELAY_LENGTH 4 182 183 /* ??? The minimum and maximum values are wrong, but this does not matter 184 since this relocation type is not supported yet. */ 185 #define COND32_F (1<<30) 186 #define COND32_M -(1<<30) 187 #define COND32_LENGTH 14 188 189 #define UNCOND12_F 4098 190 #define UNCOND12_M -4092 191 #define UNCOND12_LENGTH 2 192 193 /* ??? The minimum and maximum values are wrong, but this does not matter 194 since this relocation type is not supported yet. */ 195 #define UNCOND32_F (1<<30) 196 #define UNCOND32_M -(1<<30) 197 #define UNCOND32_LENGTH 14 198 199 #define EMPTY { 0, 0, 0, 0 } 200 201 const relax_typeS md_relax_table[C (END, 0)] = { 202 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 203 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 204 205 EMPTY, 206 /* C (COND_JUMP, COND8) */ 207 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 208 /* C (COND_JUMP, COND12) */ 209 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 210 /* C (COND_JUMP, COND32) */ 211 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 212 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 213 { 0, 0, COND32_LENGTH, 0, }, 214 EMPTY, EMPTY, EMPTY, 215 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 216 217 EMPTY, 218 /* C (COND_JUMP_DELAY, COND8) */ 219 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 220 /* C (COND_JUMP_DELAY, COND12) */ 221 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 222 /* C (COND_JUMP_DELAY, COND32) */ 223 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 224 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 225 { 0, 0, COND32_LENGTH, 0, }, 226 EMPTY, EMPTY, EMPTY, 227 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 228 229 EMPTY, 230 /* C (UNCOND_JUMP, UNCOND12) */ 231 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 232 /* C (UNCOND_JUMP, UNCOND32) */ 233 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 234 EMPTY, 235 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 236 { 0, 0, UNCOND32_LENGTH, 0, }, 237 EMPTY, EMPTY, EMPTY, 238 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 239 240 }; 241 242 #undef EMPTY 243 244 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ 245 246 247 #ifdef OBJ_ELF 249 /* Determine whether the symbol needs any kind of PIC relocation. */ 250 251 inline static int 252 sh_PIC_related_p (symbolS *sym) 253 { 254 expressionS *exp; 255 256 if (! sym) 257 return 0; 258 259 if (sym == GOT_symbol) 260 return 1; 261 262 exp = symbol_get_value_expression (sym); 263 264 return (exp->X_op == O_PIC_reloc 265 || sh_PIC_related_p (exp->X_add_symbol) 266 || sh_PIC_related_p (exp->X_op_symbol)); 267 } 268 269 /* Determine the relocation type to be used to represent the 270 expression, that may be rearranged. */ 271 272 static int 273 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 274 { 275 expressionS *exp = main_exp; 276 277 /* This is here for backward-compatibility only. GCC used to generated: 278 279 f@PLT + . - (.LPCS# + 2) 280 281 but we'd rather be able to handle this as a PIC-related reference 282 plus/minus a symbol. However, gas' parser gives us: 283 284 O_subtract (O_add (f@PLT, .), .LPCS#+2) 285 286 so we attempt to transform this into: 287 288 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 289 290 which we can handle simply below. */ 291 if (exp->X_op == O_subtract) 292 { 293 if (sh_PIC_related_p (exp->X_op_symbol)) 294 return 1; 295 296 exp = symbol_get_value_expression (exp->X_add_symbol); 297 298 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 299 return 1; 300 301 if (exp && exp->X_op == O_add 302 && sh_PIC_related_p (exp->X_add_symbol)) 303 { 304 symbolS *sym = exp->X_add_symbol; 305 306 exp->X_op = O_subtract; 307 exp->X_add_symbol = main_exp->X_op_symbol; 308 309 main_exp->X_op_symbol = main_exp->X_add_symbol; 310 main_exp->X_add_symbol = sym; 311 312 main_exp->X_add_number += exp->X_add_number; 313 exp->X_add_number = 0; 314 } 315 316 exp = main_exp; 317 } 318 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 319 return 1; 320 321 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 322 { 323 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 324 { 325 *r_type_p = BFD_RELOC_SH_GOTPC; 326 return 0; 327 } 328 exp = symbol_get_value_expression (exp->X_add_symbol); 329 if (! exp) 330 return 0; 331 } 332 333 if (exp->X_op == O_PIC_reloc) 334 { 335 switch (*r_type_p) 336 { 337 case BFD_RELOC_NONE: 338 case BFD_RELOC_UNUSED: 339 *r_type_p = exp->X_md; 340 break; 341 342 case BFD_RELOC_SH_DISP20: 343 switch (exp->X_md) 344 { 345 case BFD_RELOC_32_GOT_PCREL: 346 *r_type_p = BFD_RELOC_SH_GOT20; 347 break; 348 349 case BFD_RELOC_32_GOTOFF: 350 *r_type_p = BFD_RELOC_SH_GOTOFF20; 351 break; 352 353 case BFD_RELOC_SH_GOTFUNCDESC: 354 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; 355 break; 356 357 case BFD_RELOC_SH_GOTOFFFUNCDESC: 358 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; 359 break; 360 361 default: 362 abort (); 363 } 364 break; 365 366 default: 367 abort (); 368 } 369 if (exp == main_exp) 370 exp->X_op = O_symbol; 371 else 372 { 373 main_exp->X_add_symbol = exp->X_add_symbol; 374 main_exp->X_add_number += exp->X_add_number; 375 } 376 } 377 else 378 return (sh_PIC_related_p (exp->X_add_symbol) 379 || sh_PIC_related_p (exp->X_op_symbol)); 380 381 return 0; 382 } 383 384 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 385 386 void 387 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 388 bfd_reloc_code_real_type r_type) 389 { 390 r_type = BFD_RELOC_UNUSED; 391 392 if (sh_check_fixup (exp, &r_type)) 393 as_bad (_("Invalid PIC expression.")); 394 395 if (r_type == BFD_RELOC_UNUSED) 396 switch (size) 397 { 398 case 1: 399 r_type = BFD_RELOC_8; 400 break; 401 402 case 2: 403 r_type = BFD_RELOC_16; 404 break; 405 406 case 4: 407 r_type = BFD_RELOC_32; 408 break; 409 410 case 8: 411 r_type = BFD_RELOC_64; 412 break; 413 414 default: 415 goto error; 416 } 417 else if (size != 4) 418 { 419 error: 420 as_bad (_("unsupported BFD relocation size %u"), size); 421 r_type = BFD_RELOC_UNUSED; 422 } 423 424 fix_new_exp (frag, off, size, exp, 0, r_type); 425 } 426 427 /* The regular cons() function, that reads constants, doesn't support 428 suffixes such as @GOT, @GOTOFF and @PLT, that generate 429 machine-specific relocation types. So we must define it here. */ 430 /* Clobbers input_line_pointer, checks end-of-line. */ 431 /* NBYTES 1=.byte, 2=.word, 4=.long */ 432 static void 433 sh_elf_cons (int nbytes) 434 { 435 expressionS exp; 436 437 if (is_it_end_of_statement ()) 438 { 439 demand_empty_rest_of_line (); 440 return; 441 } 442 443 #ifdef md_cons_align 444 md_cons_align (nbytes); 445 #endif 446 447 do 448 { 449 expression (&exp); 450 emit_expr (&exp, (unsigned int) nbytes); 451 } 452 while (*input_line_pointer++ == ','); 453 454 input_line_pointer--; /* Put terminator back into stream. */ 455 if (*input_line_pointer == '#' || *input_line_pointer == '!') 456 { 457 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 458 } 459 else 460 demand_empty_rest_of_line (); 461 } 462 463 /* The regular frag_offset_fixed_p doesn't work for rs_align_test 464 frags. */ 465 466 static bfd_boolean 467 align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, 468 bfd_vma *offset) 469 { 470 const fragS *frag; 471 bfd_vma off; 472 473 /* Start with offset initialised to difference between the two frags. 474 Prior to assigning frag addresses this will be zero. */ 475 off = frag1->fr_address - frag2->fr_address; 476 if (frag1 == frag2) 477 { 478 *offset = off; 479 return TRUE; 480 } 481 482 /* Maybe frag2 is after frag1. */ 483 frag = frag1; 484 while (frag->fr_type == rs_fill 485 || frag->fr_type == rs_align_test) 486 { 487 if (frag->fr_type == rs_fill) 488 off += frag->fr_fix + frag->fr_offset * frag->fr_var; 489 else 490 off += frag->fr_fix; 491 frag = frag->fr_next; 492 if (frag == NULL) 493 break; 494 if (frag == frag2) 495 { 496 *offset = off; 497 return TRUE; 498 } 499 } 500 501 /* Maybe frag1 is after frag2. */ 502 off = frag1->fr_address - frag2->fr_address; 503 frag = frag2; 504 while (frag->fr_type == rs_fill 505 || frag->fr_type == rs_align_test) 506 { 507 if (frag->fr_type == rs_fill) 508 off -= frag->fr_fix + frag->fr_offset * frag->fr_var; 509 else 510 off -= frag->fr_fix; 511 frag = frag->fr_next; 512 if (frag == NULL) 513 break; 514 if (frag == frag1) 515 { 516 *offset = off; 517 return TRUE; 518 } 519 } 520 521 return FALSE; 522 } 523 524 /* Optimize a difference of symbols which have rs_align_test frag if 525 possible. */ 526 527 int 528 sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) 529 { 530 bfd_vma frag_off; 531 532 if (op == O_subtract 533 && l->X_op == O_symbol 534 && r->X_op == O_symbol 535 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) 536 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) 537 || r->X_add_symbol == l->X_add_symbol) 538 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), 539 symbol_get_frag (r->X_add_symbol), 540 &frag_off)) 541 { 542 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) 543 - S_GET_VALUE (r->X_add_symbol); 544 subtract_from_result (l, r->X_add_number, r->X_extrabit); 545 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); 546 add_to_result (l, symval_diff, symval_diff < 0); 547 l->X_op = O_constant; 548 l->X_add_symbol = 0; 549 return 1; 550 } 551 return 0; 552 } 553 #endif /* OBJ_ELF */ 554 555 /* This function is called once, at assembler startup time. This should 557 set up all the tables, etc that the MD part of the assembler needs. */ 558 559 void 560 md_begin (void) 561 { 562 const sh_opcode_info *opcode; 563 const char *prev_name = ""; 564 unsigned int target_arch; 565 566 target_arch 567 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 568 valid_arch = target_arch; 569 570 opcode_hash_control = hash_new (); 571 572 /* Insert unique names into hash table. */ 573 for (opcode = sh_table; opcode->name; opcode++) 574 { 575 if (strcmp (prev_name, opcode->name) != 0) 576 { 577 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 578 continue; 579 prev_name = opcode->name; 580 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 581 } 582 } 583 } 584 585 static int reg_m; 586 static int reg_n; 587 static int reg_x, reg_y; 588 static int reg_efg; 589 static int reg_b; 590 591 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 592 593 /* Try to parse a reg name. Return the number of chars consumed. */ 594 595 static unsigned int 596 parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg) 597 { 598 char l0 = TOLOWER (src[0]); 599 char l1 = l0 ? TOLOWER (src[1]) : 0; 600 601 /* We use ! IDENT_CHAR for the next character after the register name, to 602 make sure that we won't accidentally recognize a symbol name such as 603 'sram' or sr_ram as being a reference to the register 'sr'. */ 604 605 if (l0 == 'r') 606 { 607 if (l1 == '1') 608 { 609 if (src[2] >= '0' && src[2] <= '5' 610 && ! IDENT_CHAR ((unsigned char) src[3])) 611 { 612 *mode = A_REG_N; 613 *reg = 10 + src[2] - '0'; 614 return 3; 615 } 616 } 617 if (l1 >= '0' && l1 <= '9' 618 && ! IDENT_CHAR ((unsigned char) src[2])) 619 { 620 *mode = A_REG_N; 621 *reg = (l1 - '0'); 622 return 2; 623 } 624 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 625 && ! IDENT_CHAR ((unsigned char) src[7])) 626 { 627 *mode = A_REG_B; 628 *reg = (l1 - '0'); 629 return 7; 630 } 631 632 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 633 { 634 *mode = A_RE; 635 return 2; 636 } 637 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 638 { 639 *mode = A_RS; 640 return 2; 641 } 642 } 643 644 if (l0 == 'a') 645 { 646 if (l1 == '0') 647 { 648 if (! IDENT_CHAR ((unsigned char) src[2])) 649 { 650 *mode = DSP_REG_N; 651 *reg = A_A0_NUM; 652 return 2; 653 } 654 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 655 { 656 *mode = DSP_REG_N; 657 *reg = A_A0G_NUM; 658 return 3; 659 } 660 } 661 if (l1 == '1') 662 { 663 if (! IDENT_CHAR ((unsigned char) src[2])) 664 { 665 *mode = DSP_REG_N; 666 *reg = A_A1_NUM; 667 return 2; 668 } 669 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 670 { 671 *mode = DSP_REG_N; 672 *reg = A_A1G_NUM; 673 return 3; 674 } 675 } 676 677 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 678 && ! IDENT_CHAR ((unsigned char) src[3])) 679 { 680 *mode = A_REG_N; 681 *reg = 4 + (l1 - '0'); 682 return 3; 683 } 684 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 685 && ! IDENT_CHAR ((unsigned char) src[3])) 686 { 687 *mode = A_REG_N; 688 *reg = 6 + (l1 - '0'); 689 return 3; 690 } 691 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 692 && ! IDENT_CHAR ((unsigned char) src[3])) 693 { 694 int n = l1 - '0'; 695 696 *mode = A_REG_N; 697 *reg = n | ((~n & 2) << 1); 698 return 3; 699 } 700 } 701 702 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 703 { 704 if (l1 == 's') 705 { 706 *mode = A_REG_N; 707 *reg = 8; 708 return 2; 709 } 710 if (l1 == 'x') 711 { 712 *mode = A_REG_N; 713 *reg = 8; 714 return 2; 715 } 716 if (l1 == 'y') 717 { 718 *mode = A_REG_N; 719 *reg = 9; 720 return 2; 721 } 722 } 723 724 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 725 && ! IDENT_CHAR ((unsigned char) src[2])) 726 { 727 *mode = DSP_REG_N; 728 *reg = A_X0_NUM + l1 - '0'; 729 return 2; 730 } 731 732 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 733 && ! IDENT_CHAR ((unsigned char) src[2])) 734 { 735 *mode = DSP_REG_N; 736 *reg = A_Y0_NUM + l1 - '0'; 737 return 2; 738 } 739 740 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 741 && ! IDENT_CHAR ((unsigned char) src[2])) 742 { 743 *mode = DSP_REG_N; 744 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 745 return 2; 746 } 747 748 if (l0 == 's' 749 && l1 == 's' 750 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 751 { 752 *mode = A_SSR; 753 return 3; 754 } 755 756 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 757 && ! IDENT_CHAR ((unsigned char) src[3])) 758 { 759 *mode = A_SPC; 760 return 3; 761 } 762 763 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 764 && ! IDENT_CHAR ((unsigned char) src[3])) 765 { 766 *mode = A_SGR; 767 return 3; 768 } 769 770 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 771 && ! IDENT_CHAR ((unsigned char) src[3])) 772 { 773 *mode = A_DSR; 774 return 3; 775 } 776 777 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 778 && ! IDENT_CHAR ((unsigned char) src[3])) 779 { 780 *mode = A_DBR; 781 return 3; 782 } 783 784 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 785 { 786 *mode = A_SR; 787 return 2; 788 } 789 790 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 791 { 792 *mode = A_REG_N; 793 *reg = 15; 794 return 2; 795 } 796 797 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 798 { 799 *mode = A_PR; 800 return 2; 801 } 802 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 803 { 804 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 805 and use an uninitialized immediate. */ 806 *mode = A_PC; 807 return 2; 808 } 809 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 810 && ! IDENT_CHAR ((unsigned char) src[3])) 811 { 812 *mode = A_GBR; 813 return 3; 814 } 815 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 816 && ! IDENT_CHAR ((unsigned char) src[3])) 817 { 818 *mode = A_VBR; 819 return 3; 820 } 821 822 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 823 && ! IDENT_CHAR ((unsigned char) src[3])) 824 { 825 *mode = A_TBR; 826 return 3; 827 } 828 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 829 && ! IDENT_CHAR ((unsigned char) src[4])) 830 { 831 if (TOLOWER (src[3]) == 'l') 832 { 833 *mode = A_MACL; 834 return 4; 835 } 836 if (TOLOWER (src[3]) == 'h') 837 { 838 *mode = A_MACH; 839 return 4; 840 } 841 } 842 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 843 && ! IDENT_CHAR ((unsigned char) src[3])) 844 { 845 *mode = A_MOD; 846 return 3; 847 } 848 if (l0 == 'f' && l1 == 'r') 849 { 850 if (src[2] == '1') 851 { 852 if (src[3] >= '0' && src[3] <= '5' 853 && ! IDENT_CHAR ((unsigned char) src[4])) 854 { 855 *mode = F_REG_N; 856 *reg = 10 + src[3] - '0'; 857 return 4; 858 } 859 } 860 if (src[2] >= '0' && src[2] <= '9' 861 && ! IDENT_CHAR ((unsigned char) src[3])) 862 { 863 *mode = F_REG_N; 864 *reg = (src[2] - '0'); 865 return 3; 866 } 867 } 868 if (l0 == 'd' && l1 == 'r') 869 { 870 if (src[2] == '1') 871 { 872 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 873 && ! IDENT_CHAR ((unsigned char) src[4])) 874 { 875 *mode = D_REG_N; 876 *reg = 10 + src[3] - '0'; 877 return 4; 878 } 879 } 880 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 881 && ! IDENT_CHAR ((unsigned char) src[3])) 882 { 883 *mode = D_REG_N; 884 *reg = (src[2] - '0'); 885 return 3; 886 } 887 } 888 if (l0 == 'x' && l1 == 'd') 889 { 890 if (src[2] == '1') 891 { 892 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 893 && ! IDENT_CHAR ((unsigned char) src[4])) 894 { 895 *mode = X_REG_N; 896 *reg = 11 + src[3] - '0'; 897 return 4; 898 } 899 } 900 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 901 && ! IDENT_CHAR ((unsigned char) src[3])) 902 { 903 *mode = X_REG_N; 904 *reg = (src[2] - '0') + 1; 905 return 3; 906 } 907 } 908 if (l0 == 'f' && l1 == 'v') 909 { 910 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 911 { 912 *mode = V_REG_N; 913 *reg = 12; 914 return 4; 915 } 916 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 917 && ! IDENT_CHAR ((unsigned char) src[3])) 918 { 919 *mode = V_REG_N; 920 *reg = (src[2] - '0'); 921 return 3; 922 } 923 } 924 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 925 && TOLOWER (src[3]) == 'l' 926 && ! IDENT_CHAR ((unsigned char) src[4])) 927 { 928 *mode = FPUL_N; 929 return 4; 930 } 931 932 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 933 && TOLOWER (src[3]) == 'c' 934 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 935 { 936 *mode = FPSCR_N; 937 return 5; 938 } 939 940 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 941 && TOLOWER (src[3]) == 'r' 942 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 943 { 944 *mode = XMTRX_M4; 945 return 5; 946 } 947 948 return 0; 949 } 950 951 /* Like parse_reg_without_prefix, but this version supports 952 $-prefixed register names if enabled by the user. */ 953 954 static unsigned int 955 parse_reg (char *src, sh_arg_type *mode, int *reg) 956 { 957 unsigned int prefix; 958 unsigned int consumed; 959 960 if (src[0] == '$') 961 { 962 if (allow_dollar_register_prefix) 963 { 964 src ++; 965 prefix = 1; 966 } 967 else 968 return 0; 969 } 970 else 971 prefix = 0; 972 973 consumed = parse_reg_without_prefix (src, mode, reg); 974 975 if (consumed == 0) 976 return 0; 977 978 return consumed + prefix; 979 } 980 981 static char * 982 parse_exp (char *s, sh_operand_info *op) 983 { 984 char *save; 985 char *new_pointer; 986 987 save = input_line_pointer; 988 input_line_pointer = s; 989 expression (&op->immediate); 990 if (op->immediate.X_op == O_absent) 991 as_bad (_("missing operand")); 992 new_pointer = input_line_pointer; 993 input_line_pointer = save; 994 return new_pointer; 995 } 996 997 /* The many forms of operand: 998 999 Rn Register direct 1000 @Rn Register indirect 1001 @Rn+ Autoincrement 1002 @-Rn Autodecrement 1003 @(disp:4,Rn) 1004 @(disp:8,GBR) 1005 @(disp:8,PC) 1006 1007 @(R0,Rn) 1008 @(R0,GBR) 1009 1010 disp:8 1011 disp:12 1012 #imm8 1013 pr, gbr, vbr, macl, mach 1014 */ 1015 1016 static char * 1017 parse_at (char *src, sh_operand_info *op) 1018 { 1019 int len; 1020 sh_arg_type mode; 1021 src++; 1022 if (src[0] == '@') 1023 { 1024 src = parse_at (src, op); 1025 if (op->type == A_DISP_TBR) 1026 op->type = A_DISP2_TBR; 1027 else 1028 as_bad (_("illegal double indirection")); 1029 } 1030 else if (src[0] == '-') 1031 { 1032 /* Must be predecrement. */ 1033 src++; 1034 1035 len = parse_reg (src, &mode, &(op->reg)); 1036 if (mode != A_REG_N) 1037 as_bad (_("illegal register after @-")); 1038 1039 op->type = A_DEC_N; 1040 src += len; 1041 } 1042 else if (src[0] == '(') 1043 { 1044 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1045 @(r0, rn). */ 1046 src++; 1047 len = parse_reg (src, &mode, &(op->reg)); 1048 if (len && mode == A_REG_N) 1049 { 1050 src += len; 1051 if (op->reg != 0) 1052 { 1053 as_bad (_("must be @(r0,...)")); 1054 } 1055 if (src[0] == ',') 1056 { 1057 src++; 1058 /* Now can be rn or gbr. */ 1059 len = parse_reg (src, &mode, &(op->reg)); 1060 } 1061 else 1062 { 1063 len = 0; 1064 } 1065 if (len) 1066 { 1067 if (mode == A_GBR) 1068 { 1069 op->type = A_R0_GBR; 1070 } 1071 else if (mode == A_REG_N) 1072 { 1073 op->type = A_IND_R0_REG_N; 1074 } 1075 else 1076 { 1077 as_bad (_("syntax error in @(r0,...)")); 1078 } 1079 } 1080 else 1081 { 1082 as_bad (_("syntax error in @(r0...)")); 1083 } 1084 } 1085 else 1086 { 1087 /* Must be an @(disp,.. thing). */ 1088 src = parse_exp (src, op); 1089 if (src[0] == ',') 1090 src++; 1091 /* Now can be rn, gbr or pc. */ 1092 len = parse_reg (src, &mode, &op->reg); 1093 if (len) 1094 { 1095 if (mode == A_REG_N) 1096 { 1097 op->type = A_DISP_REG_N; 1098 } 1099 else if (mode == A_GBR) 1100 { 1101 op->type = A_DISP_GBR; 1102 } 1103 else if (mode == A_TBR) 1104 { 1105 op->type = A_DISP_TBR; 1106 } 1107 else if (mode == A_PC) 1108 { 1109 /* We want @(expr, pc) to uniformly address . + expr, 1110 no matter if expr is a constant, or a more complex 1111 expression, e.g. sym-. or sym1-sym2. 1112 However, we also used to accept @(sym,pc) 1113 as addressing sym, i.e. meaning the same as plain sym. 1114 Some existing code does use the @(sym,pc) syntax, so 1115 we give it the old semantics for now, but warn about 1116 its use, so that users have some time to fix their code. 1117 1118 Note that due to this backward compatibility hack, 1119 we'll get unexpected results when @(offset, pc) is used, 1120 and offset is a symbol that is set later to an an address 1121 difference, or an external symbol that is set to an 1122 address difference in another source file, so we want to 1123 eventually remove it. */ 1124 if (op->immediate.X_op == O_symbol) 1125 { 1126 op->type = A_DISP_PC; 1127 as_warn (_("Deprecated syntax.")); 1128 } 1129 else 1130 { 1131 op->type = A_DISP_PC_ABS; 1132 /* Such operands don't get corrected for PC==.+4, so 1133 make the correction here. */ 1134 op->immediate.X_add_number -= 4; 1135 } 1136 } 1137 else 1138 { 1139 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1140 } 1141 } 1142 else 1143 { 1144 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1145 } 1146 } 1147 src += len; 1148 if (src[0] != ')') 1149 as_bad (_("expecting )")); 1150 else 1151 src++; 1152 } 1153 else 1154 { 1155 src += parse_reg (src, &mode, &(op->reg)); 1156 if (mode != A_REG_N) 1157 as_bad (_("illegal register after @")); 1158 1159 if (src[0] == '+') 1160 { 1161 char l0, l1; 1162 1163 src++; 1164 l0 = TOLOWER (src[0]); 1165 l1 = TOLOWER (src[1]); 1166 1167 if ((l0 == 'r' && l1 == '8') 1168 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1169 { 1170 src += 2; 1171 op->type = AX_PMOD_N; 1172 } 1173 else if ( (l0 == 'r' && l1 == '9') 1174 || (l0 == 'i' && l1 == 'y')) 1175 { 1176 src += 2; 1177 op->type = AY_PMOD_N; 1178 } 1179 else 1180 op->type = A_INC_N; 1181 } 1182 else 1183 op->type = A_IND_N; 1184 } 1185 return src; 1186 } 1187 1188 static void 1189 get_operand (char **ptr, sh_operand_info *op) 1190 { 1191 char *src = *ptr; 1192 sh_arg_type mode = (sh_arg_type) -1; 1193 unsigned int len; 1194 1195 if (src[0] == '#') 1196 { 1197 src++; 1198 *ptr = parse_exp (src, op); 1199 op->type = A_IMM; 1200 return; 1201 } 1202 1203 else if (src[0] == '@') 1204 { 1205 *ptr = parse_at (src, op); 1206 return; 1207 } 1208 len = parse_reg (src, &mode, &(op->reg)); 1209 if (len) 1210 { 1211 *ptr = src + len; 1212 op->type = mode; 1213 return; 1214 } 1215 else 1216 { 1217 /* Not a reg, the only thing left is a displacement. */ 1218 *ptr = parse_exp (src, op); 1219 op->type = A_DISP_PC; 1220 return; 1221 } 1222 } 1223 1224 static char * 1225 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1226 { 1227 char *ptr = args; 1228 if (info->arg[0]) 1229 { 1230 /* The pre-processor will eliminate whitespace in front of '@' 1231 after the first argument; we may be called multiple times 1232 from assemble_ppi, so don't insist on finding whitespace here. */ 1233 if (*ptr == ' ') 1234 ptr++; 1235 1236 get_operand (&ptr, operand + 0); 1237 if (info->arg[1]) 1238 { 1239 if (*ptr == ',') 1240 { 1241 ptr++; 1242 } 1243 get_operand (&ptr, operand + 1); 1244 /* ??? Hack: psha/pshl have a varying operand number depending on 1245 the type of the first operand. We handle this by having the 1246 three-operand version first and reducing the number of operands 1247 parsed to two if we see that the first operand is an immediate. 1248 This works because no insn with three operands has an immediate 1249 as first operand. */ 1250 if (info->arg[2] && operand[0].type != A_IMM) 1251 { 1252 if (*ptr == ',') 1253 { 1254 ptr++; 1255 } 1256 get_operand (&ptr, operand + 2); 1257 } 1258 else 1259 { 1260 operand[2].type = 0; 1261 } 1262 } 1263 else 1264 { 1265 operand[1].type = 0; 1266 operand[2].type = 0; 1267 } 1268 } 1269 else 1270 { 1271 operand[0].type = 0; 1272 operand[1].type = 0; 1273 operand[2].type = 0; 1274 } 1275 return ptr; 1276 } 1277 1278 /* Passed a pointer to a list of opcodes which use different 1279 addressing modes, return the opcode which matches the opcodes 1280 provided. */ 1281 1282 static sh_opcode_info * 1283 get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1284 { 1285 sh_opcode_info *this_try = opcode; 1286 const char *name = opcode->name; 1287 int n = 0; 1288 1289 while (opcode->name) 1290 { 1291 this_try = opcode++; 1292 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1293 { 1294 /* We've looked so far down the table that we've run out of 1295 opcodes with the same name. */ 1296 return 0; 1297 } 1298 1299 /* Look at both operands needed by the opcodes and provided by 1300 the user - since an arg test will often fail on the same arg 1301 again and again, we'll try and test the last failing arg the 1302 first on each opcode try. */ 1303 for (n = 0; this_try->arg[n]; n++) 1304 { 1305 sh_operand_info *user = operands + n; 1306 sh_arg_type arg = this_try->arg[n]; 1307 1308 switch (arg) 1309 { 1310 case A_DISP_PC: 1311 if (user->type == A_DISP_PC_ABS) 1312 break; 1313 /* Fall through. */ 1314 case A_IMM: 1315 case A_BDISP12: 1316 case A_BDISP8: 1317 case A_DISP_GBR: 1318 case A_DISP2_TBR: 1319 case A_MACH: 1320 case A_PR: 1321 case A_MACL: 1322 if (user->type != arg) 1323 goto fail; 1324 break; 1325 case A_R0: 1326 /* opcode needs r0 */ 1327 if (user->type != A_REG_N || user->reg != 0) 1328 goto fail; 1329 break; 1330 case A_R0_GBR: 1331 if (user->type != A_R0_GBR || user->reg != 0) 1332 goto fail; 1333 break; 1334 case F_FR0: 1335 if (user->type != F_REG_N || user->reg != 0) 1336 goto fail; 1337 break; 1338 1339 case A_REG_N: 1340 case A_INC_N: 1341 case A_DEC_N: 1342 case A_IND_N: 1343 case A_IND_R0_REG_N: 1344 case A_DISP_REG_N: 1345 case F_REG_N: 1346 case D_REG_N: 1347 case X_REG_N: 1348 case V_REG_N: 1349 case FPUL_N: 1350 case FPSCR_N: 1351 case DSP_REG_N: 1352 /* Opcode needs rn */ 1353 if (user->type != arg) 1354 goto fail; 1355 reg_n = user->reg; 1356 break; 1357 case DX_REG_N: 1358 if (user->type != D_REG_N && user->type != X_REG_N) 1359 goto fail; 1360 reg_n = user->reg; 1361 break; 1362 case A_GBR: 1363 case A_TBR: 1364 case A_SR: 1365 case A_VBR: 1366 case A_DSR: 1367 case A_MOD: 1368 case A_RE: 1369 case A_RS: 1370 case A_SSR: 1371 case A_SPC: 1372 case A_SGR: 1373 case A_DBR: 1374 if (user->type != arg) 1375 goto fail; 1376 break; 1377 1378 case A_REG_B: 1379 if (user->type != arg) 1380 goto fail; 1381 reg_b = user->reg; 1382 break; 1383 1384 case A_INC_R15: 1385 if (user->type != A_INC_N) 1386 goto fail; 1387 if (user->reg != 15) 1388 goto fail; 1389 reg_n = user->reg; 1390 break; 1391 1392 case A_DEC_R15: 1393 if (user->type != A_DEC_N) 1394 goto fail; 1395 if (user->reg != 15) 1396 goto fail; 1397 reg_n = user->reg; 1398 break; 1399 1400 case A_REG_M: 1401 case A_INC_M: 1402 case A_DEC_M: 1403 case A_IND_M: 1404 case A_IND_R0_REG_M: 1405 case A_DISP_REG_M: 1406 case DSP_REG_M: 1407 /* Opcode needs rn */ 1408 if (user->type != arg - A_REG_M + A_REG_N) 1409 goto fail; 1410 reg_m = user->reg; 1411 break; 1412 1413 case AS_DEC_N: 1414 if (user->type != A_DEC_N) 1415 goto fail; 1416 if (user->reg < 2 || user->reg > 5) 1417 goto fail; 1418 reg_n = user->reg; 1419 break; 1420 1421 case AS_INC_N: 1422 if (user->type != A_INC_N) 1423 goto fail; 1424 if (user->reg < 2 || user->reg > 5) 1425 goto fail; 1426 reg_n = user->reg; 1427 break; 1428 1429 case AS_IND_N: 1430 if (user->type != A_IND_N) 1431 goto fail; 1432 if (user->reg < 2 || user->reg > 5) 1433 goto fail; 1434 reg_n = user->reg; 1435 break; 1436 1437 case AS_PMOD_N: 1438 if (user->type != AX_PMOD_N) 1439 goto fail; 1440 if (user->reg < 2 || user->reg > 5) 1441 goto fail; 1442 reg_n = user->reg; 1443 break; 1444 1445 case AX_INC_N: 1446 if (user->type != A_INC_N) 1447 goto fail; 1448 if (user->reg < 4 || user->reg > 5) 1449 goto fail; 1450 reg_n = user->reg; 1451 break; 1452 1453 case AX_IND_N: 1454 if (user->type != A_IND_N) 1455 goto fail; 1456 if (user->reg < 4 || user->reg > 5) 1457 goto fail; 1458 reg_n = user->reg; 1459 break; 1460 1461 case AX_PMOD_N: 1462 if (user->type != AX_PMOD_N) 1463 goto fail; 1464 if (user->reg < 4 || user->reg > 5) 1465 goto fail; 1466 reg_n = user->reg; 1467 break; 1468 1469 case AXY_INC_N: 1470 if (user->type != A_INC_N) 1471 goto fail; 1472 if ((user->reg < 4 || user->reg > 5) 1473 && (user->reg < 0 || user->reg > 1)) 1474 goto fail; 1475 reg_n = user->reg; 1476 break; 1477 1478 case AXY_IND_N: 1479 if (user->type != A_IND_N) 1480 goto fail; 1481 if ((user->reg < 4 || user->reg > 5) 1482 && (user->reg < 0 || user->reg > 1)) 1483 goto fail; 1484 reg_n = user->reg; 1485 break; 1486 1487 case AXY_PMOD_N: 1488 if (user->type != AX_PMOD_N) 1489 goto fail; 1490 if ((user->reg < 4 || user->reg > 5) 1491 && (user->reg < 0 || user->reg > 1)) 1492 goto fail; 1493 reg_n = user->reg; 1494 break; 1495 1496 case AY_INC_N: 1497 if (user->type != A_INC_N) 1498 goto fail; 1499 if (user->reg < 6 || user->reg > 7) 1500 goto fail; 1501 reg_n = user->reg; 1502 break; 1503 1504 case AY_IND_N: 1505 if (user->type != A_IND_N) 1506 goto fail; 1507 if (user->reg < 6 || user->reg > 7) 1508 goto fail; 1509 reg_n = user->reg; 1510 break; 1511 1512 case AY_PMOD_N: 1513 if (user->type != AY_PMOD_N) 1514 goto fail; 1515 if (user->reg < 6 || user->reg > 7) 1516 goto fail; 1517 reg_n = user->reg; 1518 break; 1519 1520 case AYX_INC_N: 1521 if (user->type != A_INC_N) 1522 goto fail; 1523 if ((user->reg < 6 || user->reg > 7) 1524 && (user->reg < 2 || user->reg > 3)) 1525 goto fail; 1526 reg_n = user->reg; 1527 break; 1528 1529 case AYX_IND_N: 1530 if (user->type != A_IND_N) 1531 goto fail; 1532 if ((user->reg < 6 || user->reg > 7) 1533 && (user->reg < 2 || user->reg > 3)) 1534 goto fail; 1535 reg_n = user->reg; 1536 break; 1537 1538 case AYX_PMOD_N: 1539 if (user->type != AY_PMOD_N) 1540 goto fail; 1541 if ((user->reg < 6 || user->reg > 7) 1542 && (user->reg < 2 || user->reg > 3)) 1543 goto fail; 1544 reg_n = user->reg; 1545 break; 1546 1547 case DSP_REG_A_M: 1548 if (user->type != DSP_REG_N) 1549 goto fail; 1550 if (user->reg != A_A0_NUM 1551 && user->reg != A_A1_NUM) 1552 goto fail; 1553 reg_m = user->reg; 1554 break; 1555 1556 case DSP_REG_AX: 1557 if (user->type != DSP_REG_N) 1558 goto fail; 1559 switch (user->reg) 1560 { 1561 case A_A0_NUM: 1562 reg_x = 0; 1563 break; 1564 case A_A1_NUM: 1565 reg_x = 2; 1566 break; 1567 case A_X0_NUM: 1568 reg_x = 1; 1569 break; 1570 case A_X1_NUM: 1571 reg_x = 3; 1572 break; 1573 default: 1574 goto fail; 1575 } 1576 break; 1577 1578 case DSP_REG_XY: 1579 if (user->type != DSP_REG_N) 1580 goto fail; 1581 switch (user->reg) 1582 { 1583 case A_X0_NUM: 1584 reg_x = 0; 1585 break; 1586 case A_X1_NUM: 1587 reg_x = 2; 1588 break; 1589 case A_Y0_NUM: 1590 reg_x = 1; 1591 break; 1592 case A_Y1_NUM: 1593 reg_x = 3; 1594 break; 1595 default: 1596 goto fail; 1597 } 1598 break; 1599 1600 case DSP_REG_AY: 1601 if (user->type != DSP_REG_N) 1602 goto fail; 1603 switch (user->reg) 1604 { 1605 case A_A0_NUM: 1606 reg_y = 0; 1607 break; 1608 case A_A1_NUM: 1609 reg_y = 1; 1610 break; 1611 case A_Y0_NUM: 1612 reg_y = 2; 1613 break; 1614 case A_Y1_NUM: 1615 reg_y = 3; 1616 break; 1617 default: 1618 goto fail; 1619 } 1620 break; 1621 1622 case DSP_REG_YX: 1623 if (user->type != DSP_REG_N) 1624 goto fail; 1625 switch (user->reg) 1626 { 1627 case A_Y0_NUM: 1628 reg_y = 0; 1629 break; 1630 case A_Y1_NUM: 1631 reg_y = 1; 1632 break; 1633 case A_X0_NUM: 1634 reg_y = 2; 1635 break; 1636 case A_X1_NUM: 1637 reg_y = 3; 1638 break; 1639 default: 1640 goto fail; 1641 } 1642 break; 1643 1644 case DSP_REG_X: 1645 if (user->type != DSP_REG_N) 1646 goto fail; 1647 switch (user->reg) 1648 { 1649 case A_X0_NUM: 1650 reg_x = 0; 1651 break; 1652 case A_X1_NUM: 1653 reg_x = 1; 1654 break; 1655 case A_A0_NUM: 1656 reg_x = 2; 1657 break; 1658 case A_A1_NUM: 1659 reg_x = 3; 1660 break; 1661 default: 1662 goto fail; 1663 } 1664 break; 1665 1666 case DSP_REG_Y: 1667 if (user->type != DSP_REG_N) 1668 goto fail; 1669 switch (user->reg) 1670 { 1671 case A_Y0_NUM: 1672 reg_y = 0; 1673 break; 1674 case A_Y1_NUM: 1675 reg_y = 1; 1676 break; 1677 case A_M0_NUM: 1678 reg_y = 2; 1679 break; 1680 case A_M1_NUM: 1681 reg_y = 3; 1682 break; 1683 default: 1684 goto fail; 1685 } 1686 break; 1687 1688 case DSP_REG_E: 1689 if (user->type != DSP_REG_N) 1690 goto fail; 1691 switch (user->reg) 1692 { 1693 case A_X0_NUM: 1694 reg_efg = 0 << 10; 1695 break; 1696 case A_X1_NUM: 1697 reg_efg = 1 << 10; 1698 break; 1699 case A_Y0_NUM: 1700 reg_efg = 2 << 10; 1701 break; 1702 case A_A1_NUM: 1703 reg_efg = 3 << 10; 1704 break; 1705 default: 1706 goto fail; 1707 } 1708 break; 1709 1710 case DSP_REG_F: 1711 if (user->type != DSP_REG_N) 1712 goto fail; 1713 switch (user->reg) 1714 { 1715 case A_Y0_NUM: 1716 reg_efg |= 0 << 8; 1717 break; 1718 case A_Y1_NUM: 1719 reg_efg |= 1 << 8; 1720 break; 1721 case A_X0_NUM: 1722 reg_efg |= 2 << 8; 1723 break; 1724 case A_A1_NUM: 1725 reg_efg |= 3 << 8; 1726 break; 1727 default: 1728 goto fail; 1729 } 1730 break; 1731 1732 case DSP_REG_G: 1733 if (user->type != DSP_REG_N) 1734 goto fail; 1735 switch (user->reg) 1736 { 1737 case A_M0_NUM: 1738 reg_efg |= 0 << 2; 1739 break; 1740 case A_M1_NUM: 1741 reg_efg |= 1 << 2; 1742 break; 1743 case A_A0_NUM: 1744 reg_efg |= 2 << 2; 1745 break; 1746 case A_A1_NUM: 1747 reg_efg |= 3 << 2; 1748 break; 1749 default: 1750 goto fail; 1751 } 1752 break; 1753 1754 case A_A0: 1755 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 1756 goto fail; 1757 break; 1758 case A_X0: 1759 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 1760 goto fail; 1761 break; 1762 case A_X1: 1763 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 1764 goto fail; 1765 break; 1766 case A_Y0: 1767 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 1768 goto fail; 1769 break; 1770 case A_Y1: 1771 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 1772 goto fail; 1773 break; 1774 1775 case F_REG_M: 1776 case D_REG_M: 1777 case X_REG_M: 1778 case V_REG_M: 1779 case FPUL_M: 1780 case FPSCR_M: 1781 /* Opcode needs rn */ 1782 if (user->type != arg - F_REG_M + F_REG_N) 1783 goto fail; 1784 reg_m = user->reg; 1785 break; 1786 case DX_REG_M: 1787 if (user->type != D_REG_N && user->type != X_REG_N) 1788 goto fail; 1789 reg_m = user->reg; 1790 break; 1791 case XMTRX_M4: 1792 if (user->type != XMTRX_M4) 1793 goto fail; 1794 reg_m = 4; 1795 break; 1796 1797 default: 1798 printf (_("unhandled %d\n"), arg); 1799 goto fail; 1800 } 1801 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 1802 && ( arg == A_DISP_REG_M 1803 || arg == A_DISP_REG_N)) 1804 { 1805 /* Check a few key IMM* fields for overflow. */ 1806 int opf; 1807 long val = user->immediate.X_add_number; 1808 1809 for (opf = 0; opf < 4; opf ++) 1810 switch (this_try->nibbles[opf]) 1811 { 1812 case IMM0_4: 1813 case IMM1_4: 1814 if (val < 0 || val > 15) 1815 goto fail; 1816 break; 1817 case IMM0_4BY2: 1818 case IMM1_4BY2: 1819 if (val < 0 || val > 15 * 2) 1820 goto fail; 1821 break; 1822 case IMM0_4BY4: 1823 case IMM1_4BY4: 1824 if (val < 0 || val > 15 * 4) 1825 goto fail; 1826 break; 1827 default: 1828 break; 1829 } 1830 } 1831 } 1832 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 1833 goto fail; 1834 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 1835 return this_try; 1836 fail: 1837 ; 1838 } 1839 1840 return 0; 1841 } 1842 1843 static void 1844 insert (char *where, bfd_reloc_code_real_type how, int pcrel, 1845 sh_operand_info *op) 1846 { 1847 fix_new_exp (frag_now, 1848 where - frag_now->fr_literal, 1849 2, 1850 &op->immediate, 1851 pcrel, 1852 how); 1853 } 1854 1855 static void 1856 insert4 (char * where, bfd_reloc_code_real_type how, int pcrel, 1857 sh_operand_info * op) 1858 { 1859 fix_new_exp (frag_now, 1860 where - frag_now->fr_literal, 1861 4, 1862 & op->immediate, 1863 pcrel, 1864 how); 1865 } 1866 static void 1867 build_relax (sh_opcode_info *opcode, sh_operand_info *op) 1868 { 1869 int high_byte = target_big_endian ? 0 : 1; 1870 char *p; 1871 1872 if (opcode->arg[0] == A_BDISP8) 1873 { 1874 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 1875 p = frag_var (rs_machine_dependent, 1876 md_relax_table[C (what, COND32)].rlx_length, 1877 md_relax_table[C (what, COND8)].rlx_length, 1878 C (what, 0), 1879 op->immediate.X_add_symbol, 1880 op->immediate.X_add_number, 1881 0); 1882 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 1883 } 1884 else if (opcode->arg[0] == A_BDISP12) 1885 { 1886 p = frag_var (rs_machine_dependent, 1887 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 1888 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 1889 C (UNCOND_JUMP, 0), 1890 op->immediate.X_add_symbol, 1891 op->immediate.X_add_number, 1892 0); 1893 p[high_byte] = (opcode->nibbles[0] << 4); 1894 } 1895 1896 } 1897 1898 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 1899 1900 static char * 1901 insert_loop_bounds (char *output, sh_operand_info *operand) 1902 { 1903 symbolS *end_sym; 1904 1905 /* Since the low byte of the opcode will be overwritten by the reloc, we 1906 can just stash the high byte into both bytes and ignore endianness. */ 1907 output[0] = 0x8c; 1908 output[1] = 0x8c; 1909 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1910 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1911 1912 if (sh_relax) 1913 { 1914 static int count = 0; 1915 char name[11]; 1916 1917 /* If the last loop insn is a two-byte-insn, it is in danger of being 1918 swapped with the insn after it. To prevent this, create a new 1919 symbol - complete with SH_LABEL reloc - after the last loop insn. 1920 If the last loop insn is four bytes long, the symbol will be 1921 right in the middle, but four byte insns are not swapped anyways. */ 1922 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 1923 Hence a 9 digit number should be enough to count all REPEATs. */ 1924 sprintf (name, "_R%x", count++ & 0x3fffffff); 1925 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); 1926 /* Make this a local symbol. */ 1927 #ifdef OBJ_COFF 1928 SF_SET_LOCAL (end_sym); 1929 #endif /* OBJ_COFF */ 1930 symbol_table_insert (end_sym); 1931 end_sym->sy_value = operand[1].immediate; 1932 end_sym->sy_value.X_add_number += 2; 1933 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 1934 } 1935 1936 output = frag_more (2); 1937 output[0] = 0x8e; 1938 output[1] = 0x8e; 1939 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1940 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1941 1942 return frag_more (2); 1943 } 1944 1945 /* Now we know what sort of opcodes it is, let's build the bytes. */ 1946 1947 static unsigned int 1948 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 1949 { 1950 int indx; 1951 char nbuf[8]; 1952 char *output; 1953 unsigned int size = 2; 1954 int low_byte = target_big_endian ? 1 : 0; 1955 int max_index = 4; 1956 bfd_reloc_code_real_type r_type; 1957 #ifdef OBJ_ELF 1958 int unhandled_pic = 0; 1959 #endif 1960 1961 nbuf[0] = 0; 1962 nbuf[1] = 0; 1963 nbuf[2] = 0; 1964 nbuf[3] = 0; 1965 nbuf[4] = 0; 1966 nbuf[5] = 0; 1967 nbuf[6] = 0; 1968 nbuf[7] = 0; 1969 1970 #ifdef OBJ_ELF 1971 for (indx = 0; indx < 3; indx++) 1972 if (opcode->arg[indx] == A_IMM 1973 && operand[indx].type == A_IMM 1974 && (operand[indx].immediate.X_op == O_PIC_reloc 1975 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) 1976 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) 1977 unhandled_pic = 1; 1978 #endif 1979 1980 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 1981 { 1982 output = frag_more (4); 1983 size = 4; 1984 max_index = 8; 1985 } 1986 else 1987 output = frag_more (2); 1988 1989 for (indx = 0; indx < max_index; indx++) 1990 { 1991 sh_nibble_type i = opcode->nibbles[indx]; 1992 if (i < 16) 1993 { 1994 nbuf[indx] = i; 1995 } 1996 else 1997 { 1998 switch (i) 1999 { 2000 case REG_N: 2001 case REG_N_D: 2002 nbuf[indx] = reg_n; 2003 break; 2004 case REG_M: 2005 nbuf[indx] = reg_m; 2006 break; 2007 case SDT_REG_N: 2008 if (reg_n < 2 || reg_n > 5) 2009 as_bad (_("Invalid register: 'r%d'"), reg_n); 2010 nbuf[indx] = (reg_n & 3) | 4; 2011 break; 2012 case REG_NM: 2013 nbuf[indx] = reg_n | (reg_m >> 2); 2014 break; 2015 case REG_B: 2016 nbuf[indx] = reg_b | 0x08; 2017 break; 2018 case REG_N_B01: 2019 nbuf[indx] = reg_n | 0x01; 2020 break; 2021 case IMM0_3s: 2022 nbuf[indx] |= 0x08; 2023 /* Fall through. */ 2024 case IMM0_3c: 2025 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2026 break; 2027 case IMM0_3Us: 2028 nbuf[indx] |= 0x80; 2029 /* Fall through. */ 2030 case IMM0_3Uc: 2031 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2032 break; 2033 case DISP0_12: 2034 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2035 break; 2036 case DISP0_12BY2: 2037 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2038 break; 2039 case DISP0_12BY4: 2040 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2041 break; 2042 case DISP0_12BY8: 2043 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2044 break; 2045 case DISP1_12: 2046 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2047 break; 2048 case DISP1_12BY2: 2049 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2050 break; 2051 case DISP1_12BY4: 2052 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2053 break; 2054 case DISP1_12BY8: 2055 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2056 break; 2057 case IMM0_20_4: 2058 break; 2059 case IMM0_20: 2060 r_type = BFD_RELOC_SH_DISP20; 2061 #ifdef OBJ_ELF 2062 if (sh_check_fixup (&operand->immediate, &r_type)) 2063 as_bad (_("Invalid PIC expression.")); 2064 unhandled_pic = 0; 2065 #endif 2066 insert4 (output, r_type, 0, operand); 2067 break; 2068 case IMM0_20BY8: 2069 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2070 break; 2071 case IMM0_4BY4: 2072 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2073 break; 2074 case IMM0_4BY2: 2075 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2076 break; 2077 case IMM0_4: 2078 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2079 break; 2080 case IMM1_4BY4: 2081 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2082 break; 2083 case IMM1_4BY2: 2084 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2085 break; 2086 case IMM1_4: 2087 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2088 break; 2089 case IMM0_8BY4: 2090 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2091 break; 2092 case IMM0_8BY2: 2093 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2094 break; 2095 case IMM0_8: 2096 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2097 break; 2098 case IMM1_8BY4: 2099 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2100 break; 2101 case IMM1_8BY2: 2102 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2103 break; 2104 case IMM1_8: 2105 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2106 break; 2107 case PCRELIMM_8BY4: 2108 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2109 operand->type != A_DISP_PC_ABS, operand); 2110 break; 2111 case PCRELIMM_8BY2: 2112 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2113 operand->type != A_DISP_PC_ABS, operand); 2114 break; 2115 case REPEAT: 2116 output = insert_loop_bounds (output, operand); 2117 nbuf[indx] = opcode->nibbles[3]; 2118 operand += 2; 2119 break; 2120 default: 2121 printf (_("failed for %d\n"), i); 2122 } 2123 } 2124 } 2125 #ifdef OBJ_ELF 2126 if (unhandled_pic) 2127 as_bad (_("misplaced PIC operand")); 2128 #endif 2129 if (!target_big_endian) 2130 { 2131 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2132 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2133 } 2134 else 2135 { 2136 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2137 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2138 } 2139 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2140 { 2141 if (!target_big_endian) 2142 { 2143 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2144 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2145 } 2146 else 2147 { 2148 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2149 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2150 } 2151 } 2152 return size; 2153 } 2154 2155 /* Find an opcode at the start of *STR_P in the hash table, and set 2156 *STR_P to the first character after the last one read. */ 2157 2158 static sh_opcode_info * 2159 find_cooked_opcode (char **str_p) 2160 { 2161 char *str = *str_p; 2162 unsigned char *op_start; 2163 unsigned char *op_end; 2164 char name[20]; 2165 unsigned int nlen = 0; 2166 2167 /* Drop leading whitespace. */ 2168 while (*str == ' ') 2169 str++; 2170 2171 /* Find the op code end. 2172 The pre-processor will eliminate whitespace in front of 2173 any '@' after the first argument; we may be called from 2174 assemble_ppi, so the opcode might be terminated by an '@'. */ 2175 for (op_start = op_end = (unsigned char *) str; 2176 *op_end 2177 && nlen < sizeof (name) - 1 2178 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2179 op_end++) 2180 { 2181 unsigned char c = op_start[nlen]; 2182 2183 /* The machine independent code will convert CMP/EQ into cmp/EQ 2184 because it thinks the '/' is the end of the symbol. Moreover, 2185 all but the first sub-insn is a parallel processing insn won't 2186 be capitalized. Instead of hacking up the machine independent 2187 code, we just deal with it here. */ 2188 c = TOLOWER (c); 2189 name[nlen] = c; 2190 nlen++; 2191 } 2192 2193 name[nlen] = 0; 2194 *str_p = (char *) op_end; 2195 2196 if (nlen == 0) 2197 as_bad (_("can't find opcode ")); 2198 2199 return (sh_opcode_info *) hash_find (opcode_hash_control, name); 2200 } 2201 2202 /* Assemble a parallel processing insn. */ 2203 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2204 2205 static unsigned int 2206 assemble_ppi (char *op_end, sh_opcode_info *opcode) 2207 { 2208 int movx = 0; 2209 int movy = 0; 2210 int cond = 0; 2211 int field_b = 0; 2212 char *output; 2213 int move_code; 2214 unsigned int size; 2215 2216 for (;;) 2217 { 2218 sh_operand_info operand[3]; 2219 2220 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2221 Make sure we encode a defined insn pattern. */ 2222 reg_x = 0; 2223 reg_y = 0; 2224 reg_n = 0; 2225 2226 if (opcode->arg[0] != A_END) 2227 op_end = get_operands (opcode, op_end, operand); 2228 try_another_opcode: 2229 opcode = get_specific (opcode, operand); 2230 if (opcode == 0) 2231 { 2232 /* Couldn't find an opcode which matched the operands. */ 2233 char *where = frag_more (2); 2234 size = 2; 2235 2236 where[0] = 0x0; 2237 where[1] = 0x0; 2238 as_bad (_("invalid operands for opcode")); 2239 return size; 2240 } 2241 2242 if (opcode->nibbles[0] != PPI) 2243 as_bad (_("insn can't be combined with parallel processing insn")); 2244 2245 switch (opcode->nibbles[1]) 2246 { 2247 2248 case NOPX: 2249 if (movx) 2250 as_bad (_("multiple movx specifications")); 2251 movx = DDT_BASE; 2252 break; 2253 case NOPY: 2254 if (movy) 2255 as_bad (_("multiple movy specifications")); 2256 movy = DDT_BASE; 2257 break; 2258 2259 case MOVX_NOPY: 2260 if (movx) 2261 as_bad (_("multiple movx specifications")); 2262 if ((reg_n < 4 || reg_n > 5) 2263 && (reg_n < 0 || reg_n > 1)) 2264 as_bad (_("invalid movx address register")); 2265 if (movy && movy != DDT_BASE) 2266 as_bad (_("insn cannot be combined with non-nopy")); 2267 movx = ((((reg_n & 1) != 0) << 9) 2268 + (((reg_n & 4) == 0) << 8) 2269 + (reg_x << 6) 2270 + (opcode->nibbles[2] << 4) 2271 + opcode->nibbles[3] 2272 + DDT_BASE); 2273 break; 2274 2275 case MOVY_NOPX: 2276 if (movy) 2277 as_bad (_("multiple movy specifications")); 2278 if ((reg_n < 6 || reg_n > 7) 2279 && (reg_n < 2 || reg_n > 3)) 2280 as_bad (_("invalid movy address register")); 2281 if (movx && movx != DDT_BASE) 2282 as_bad (_("insn cannot be combined with non-nopx")); 2283 movy = ((((reg_n & 1) != 0) << 8) 2284 + (((reg_n & 4) == 0) << 9) 2285 + (reg_y << 6) 2286 + (opcode->nibbles[2] << 4) 2287 + opcode->nibbles[3] 2288 + DDT_BASE); 2289 break; 2290 2291 case MOVX: 2292 if (movx) 2293 as_bad (_("multiple movx specifications")); 2294 if (movy & 0x2ac) 2295 as_bad (_("previous movy requires nopx")); 2296 if (reg_n < 4 || reg_n > 5) 2297 as_bad (_("invalid movx address register")); 2298 if (opcode->nibbles[2] & 8) 2299 { 2300 if (reg_m == A_A1_NUM) 2301 movx = 1 << 7; 2302 else if (reg_m != A_A0_NUM) 2303 as_bad (_("invalid movx dsp register")); 2304 } 2305 else 2306 { 2307 if (reg_x > 1) 2308 as_bad (_("invalid movx dsp register")); 2309 movx = reg_x << 7; 2310 } 2311 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2312 break; 2313 2314 case MOVY: 2315 if (movy) 2316 as_bad (_("multiple movy specifications")); 2317 if (movx & 0x153) 2318 as_bad (_("previous movx requires nopy")); 2319 if (opcode->nibbles[2] & 8) 2320 { 2321 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2322 so add 8 more. */ 2323 movy = 8; 2324 if (reg_m == A_A1_NUM) 2325 movy += 1 << 6; 2326 else if (reg_m != A_A0_NUM) 2327 as_bad (_("invalid movy dsp register")); 2328 } 2329 else 2330 { 2331 if (reg_y > 1) 2332 as_bad (_("invalid movy dsp register")); 2333 movy = reg_y << 6; 2334 } 2335 if (reg_n < 6 || reg_n > 7) 2336 as_bad (_("invalid movy address register")); 2337 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2338 break; 2339 2340 case PSH: 2341 if (operand[0].immediate.X_op != O_constant) 2342 as_bad (_("dsp immediate shift value not constant")); 2343 field_b = ((opcode->nibbles[2] << 12) 2344 | (operand[0].immediate.X_add_number & 127) << 4 2345 | reg_n); 2346 break; 2347 case PPI3NC: 2348 if (cond) 2349 { 2350 opcode++; 2351 goto try_another_opcode; 2352 } 2353 /* Fall through. */ 2354 case PPI3: 2355 if (field_b) 2356 as_bad (_("multiple parallel processing specifications")); 2357 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2358 + (reg_x << 6) + (reg_y << 4) + reg_n); 2359 switch (opcode->nibbles[4]) 2360 { 2361 case HEX_0: 2362 case HEX_XX00: 2363 case HEX_00YY: 2364 break; 2365 case HEX_1: 2366 case HEX_4: 2367 field_b += opcode->nibbles[4] << 4; 2368 break; 2369 default: 2370 abort (); 2371 } 2372 break; 2373 case PDC: 2374 if (cond) 2375 as_bad (_("multiple condition specifications")); 2376 cond = opcode->nibbles[2] << 8; 2377 if (*op_end) 2378 goto skip_cond_check; 2379 break; 2380 case PPIC: 2381 if (field_b) 2382 as_bad (_("multiple parallel processing specifications")); 2383 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2384 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2385 cond = 0; 2386 switch (opcode->nibbles[4]) 2387 { 2388 case HEX_0: 2389 case HEX_XX00: 2390 case HEX_00YY: 2391 break; 2392 case HEX_1: 2393 case HEX_4: 2394 field_b += opcode->nibbles[4] << 4; 2395 break; 2396 default: 2397 abort (); 2398 } 2399 break; 2400 case PMUL: 2401 if (field_b) 2402 { 2403 if ((field_b & 0xef00) == 0xa100) 2404 field_b -= 0x8100; 2405 /* pclr Dz pmuls Se,Sf,Dg */ 2406 else if ((field_b & 0xff00) == 0x8d00 2407 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2408 { 2409 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2410 field_b -= 0x8cf0; 2411 } 2412 else 2413 as_bad (_("insn cannot be combined with pmuls")); 2414 switch (field_b & 0xf) 2415 { 2416 case A_X0_NUM: 2417 field_b += 0 - A_X0_NUM; 2418 break; 2419 case A_Y0_NUM: 2420 field_b += 1 - A_Y0_NUM; 2421 break; 2422 case A_A0_NUM: 2423 field_b += 2 - A_A0_NUM; 2424 break; 2425 case A_A1_NUM: 2426 field_b += 3 - A_A1_NUM; 2427 break; 2428 default: 2429 as_bad (_("bad combined pmuls output operand")); 2430 } 2431 /* Generate warning if the destination register for padd / psub 2432 and pmuls is the same ( only for A0 or A1 ). 2433 If the last nibble is 1010 then A0 is used in both 2434 padd / psub and pmuls. If it is 1111 then A1 is used 2435 as destination register in both padd / psub and pmuls. */ 2436 2437 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2438 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2439 as_warn (_("destination register is same for parallel insns")); 2440 } 2441 field_b += 0x4000 + reg_efg; 2442 break; 2443 default: 2444 abort (); 2445 } 2446 if (cond) 2447 { 2448 as_bad (_("condition not followed by conditionalizable insn")); 2449 cond = 0; 2450 } 2451 if (! *op_end) 2452 break; 2453 skip_cond_check: 2454 opcode = find_cooked_opcode (&op_end); 2455 if (opcode == NULL) 2456 { 2457 (as_bad 2458 (_("unrecognized characters at end of parallel processing insn"))); 2459 break; 2460 } 2461 } 2462 2463 move_code = movx | movy; 2464 if (field_b) 2465 { 2466 /* Parallel processing insn. */ 2467 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2468 2469 output = frag_more (4); 2470 size = 4; 2471 if (! target_big_endian) 2472 { 2473 output[3] = ppi_code >> 8; 2474 output[2] = ppi_code; 2475 } 2476 else 2477 { 2478 output[2] = ppi_code >> 8; 2479 output[3] = ppi_code; 2480 } 2481 move_code |= 0xf800; 2482 } 2483 else 2484 { 2485 /* Just a double data transfer. */ 2486 output = frag_more (2); 2487 size = 2; 2488 } 2489 if (! target_big_endian) 2490 { 2491 output[1] = move_code >> 8; 2492 output[0] = move_code; 2493 } 2494 else 2495 { 2496 output[0] = move_code >> 8; 2497 output[1] = move_code; 2498 } 2499 return size; 2500 } 2501 2502 /* This is the guts of the machine-dependent assembler. STR points to a 2503 machine dependent instruction. This function is supposed to emit 2504 the frags/bytes it assembles to. */ 2505 2506 void 2507 md_assemble (char *str) 2508 { 2509 char *op_end; 2510 sh_operand_info operand[3]; 2511 sh_opcode_info *opcode; 2512 unsigned int size = 0; 2513 char *initial_str = str; 2514 2515 opcode = find_cooked_opcode (&str); 2516 op_end = str; 2517 2518 if (opcode == NULL) 2519 { 2520 /* The opcode is not in the hash table. 2521 This means we definitely have an assembly failure, 2522 but the instruction may be valid in another CPU variant. 2523 In this case emit something better than 'unknown opcode'. 2524 Search the full table in sh-opc.h to check. */ 2525 2526 char *name = initial_str; 2527 int name_length = 0; 2528 const sh_opcode_info *op; 2529 int found = 0; 2530 2531 /* identify opcode in string */ 2532 while (ISSPACE (*name)) 2533 { 2534 name++; 2535 } 2536 while (!ISSPACE (name[name_length])) 2537 { 2538 name_length++; 2539 } 2540 2541 /* search for opcode in full list */ 2542 for (op = sh_table; op->name; op++) 2543 { 2544 if (strncasecmp (op->name, name, name_length) == 0 2545 && op->name[name_length] == '\0') 2546 { 2547 found = 1; 2548 break; 2549 } 2550 } 2551 2552 if ( found ) 2553 { 2554 as_bad (_("opcode not valid for this cpu variant")); 2555 } 2556 else 2557 { 2558 as_bad (_("unknown opcode")); 2559 } 2560 return; 2561 } 2562 2563 if (sh_relax 2564 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2565 { 2566 /* Output a CODE reloc to tell the linker that the following 2567 bytes are instructions, not data. */ 2568 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2569 BFD_RELOC_SH_CODE); 2570 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2571 } 2572 2573 if (opcode->nibbles[0] == PPI) 2574 { 2575 size = assemble_ppi (op_end, opcode); 2576 } 2577 else 2578 { 2579 if (opcode->arg[0] == A_BDISP12 2580 || opcode->arg[0] == A_BDISP8) 2581 { 2582 /* Since we skip get_specific here, we have to check & update 2583 valid_arch now. */ 2584 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2585 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 2586 else 2587 as_bad (_("Delayed branches not available on SH1")); 2588 parse_exp (op_end + 1, &operand[0]); 2589 build_relax (opcode, &operand[0]); 2590 2591 /* All branches are currently 16 bit. */ 2592 size = 2; 2593 } 2594 else 2595 { 2596 if (opcode->arg[0] == A_END) 2597 { 2598 /* Ignore trailing whitespace. If there is any, it has already 2599 been compressed to a single space. */ 2600 if (*op_end == ' ') 2601 op_end++; 2602 } 2603 else 2604 { 2605 op_end = get_operands (opcode, op_end, operand); 2606 } 2607 opcode = get_specific (opcode, operand); 2608 2609 if (opcode == 0) 2610 { 2611 /* Couldn't find an opcode which matched the operands. */ 2612 char *where = frag_more (2); 2613 size = 2; 2614 2615 where[0] = 0x0; 2616 where[1] = 0x0; 2617 as_bad (_("invalid operands for opcode")); 2618 } 2619 else 2620 { 2621 if (*op_end) 2622 as_bad (_("excess operands: '%s'"), op_end); 2623 2624 size = build_Mytes (opcode, operand); 2625 } 2626 } 2627 } 2628 2629 dwarf2_emit_insn (size); 2630 } 2631 2632 /* This routine is called each time a label definition is seen. It 2633 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 2634 2635 void 2636 sh_frob_label (symbolS *sym) 2637 { 2638 static fragS *last_label_frag; 2639 static int last_label_offset; 2640 2641 if (sh_relax 2642 && seg_info (now_seg)->tc_segment_info_data.in_code) 2643 { 2644 int offset; 2645 2646 offset = frag_now_fix (); 2647 if (frag_now != last_label_frag 2648 || offset != last_label_offset) 2649 { 2650 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 2651 last_label_frag = frag_now; 2652 last_label_offset = offset; 2653 } 2654 } 2655 2656 dwarf2_emit_label (sym); 2657 } 2658 2659 /* This routine is called when the assembler is about to output some 2660 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 2661 2662 void 2663 sh_flush_pending_output (void) 2664 { 2665 if (sh_relax 2666 && seg_info (now_seg)->tc_segment_info_data.in_code) 2667 { 2668 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2669 BFD_RELOC_SH_DATA); 2670 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 2671 } 2672 } 2673 2674 symbolS * 2675 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 2676 { 2677 return 0; 2678 } 2679 2680 /* Various routines to kill one day. */ 2681 2682 const char * 2683 md_atof (int type, char *litP, int *sizeP) 2684 { 2685 return ieee_md_atof (type, litP, sizeP, target_big_endian); 2686 } 2687 2688 /* Handle the .uses pseudo-op. This pseudo-op is used just before a 2689 call instruction. It refers to a label of the instruction which 2690 loads the register which the call uses. We use it to generate a 2691 special reloc for the linker. */ 2692 2693 static void 2694 s_uses (int ignore ATTRIBUTE_UNUSED) 2695 { 2696 expressionS ex; 2697 2698 if (! sh_relax) 2699 as_warn (_(".uses pseudo-op seen when not relaxing")); 2700 2701 expression (&ex); 2702 2703 if (ex.X_op != O_symbol || ex.X_add_number != 0) 2704 { 2705 as_bad (_("bad .uses format")); 2706 ignore_rest_of_line (); 2707 return; 2708 } 2709 2710 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 2711 2712 demand_empty_rest_of_line (); 2713 } 2714 2715 enum options 2717 { 2718 OPTION_RELAX = OPTION_MD_BASE, 2719 OPTION_BIG, 2720 OPTION_LITTLE, 2721 OPTION_SMALL, 2722 OPTION_DSP, 2723 OPTION_ISA, 2724 OPTION_RENESAS, 2725 OPTION_ALLOW_REG_PREFIX, 2726 OPTION_H_TICK_HEX, 2727 #ifdef OBJ_ELF 2728 OPTION_FDPIC, 2729 #endif 2730 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 2731 }; 2732 2733 const char *md_shortopts = ""; 2734 struct option md_longopts[] = 2735 { 2736 {"relax", no_argument, NULL, OPTION_RELAX}, 2737 {"big", no_argument, NULL, OPTION_BIG}, 2738 {"little", no_argument, NULL, OPTION_LITTLE}, 2739 /* The next two switches are here because the 2740 generic parts of the linker testsuite uses them. */ 2741 {"EB", no_argument, NULL, OPTION_BIG}, 2742 {"EL", no_argument, NULL, OPTION_LITTLE}, 2743 {"small", no_argument, NULL, OPTION_SMALL}, 2744 {"dsp", no_argument, NULL, OPTION_DSP}, 2745 {"isa", required_argument, NULL, OPTION_ISA}, 2746 {"renesas", no_argument, NULL, OPTION_RENESAS}, 2747 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 2748 2749 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, 2750 2751 #ifdef OBJ_ELF 2752 {"fdpic", no_argument, NULL, OPTION_FDPIC}, 2753 #endif 2754 2755 {NULL, no_argument, NULL, 0} 2756 }; 2757 size_t md_longopts_size = sizeof (md_longopts); 2758 2759 int 2760 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 2761 { 2762 switch (c) 2763 { 2764 case OPTION_RELAX: 2765 sh_relax = 1; 2766 break; 2767 2768 case OPTION_BIG: 2769 target_big_endian = 1; 2770 break; 2771 2772 case OPTION_LITTLE: 2773 target_big_endian = 0; 2774 break; 2775 2776 case OPTION_SMALL: 2777 sh_small = 1; 2778 break; 2779 2780 case OPTION_DSP: 2781 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2782 break; 2783 2784 case OPTION_RENESAS: 2785 dont_adjust_reloc_32 = 1; 2786 break; 2787 2788 case OPTION_ALLOW_REG_PREFIX: 2789 allow_dollar_register_prefix = 1; 2790 break; 2791 2792 case OPTION_ISA: 2793 if (strcasecmp (arg, "dsp") == 0) 2794 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2795 else if (strcasecmp (arg, "fp") == 0) 2796 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 2797 else if (strcasecmp (arg, "any") == 0) 2798 preset_target_arch = arch_sh_up; 2799 else 2800 { 2801 extern const bfd_arch_info_type bfd_sh_arch; 2802 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2803 2804 preset_target_arch = 0; 2805 for (; bfd_arch; bfd_arch=bfd_arch->next) 2806 { 2807 int len = strlen(bfd_arch->printable_name); 2808 2809 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 2810 continue; 2811 2812 if (arg[len] == '\0') 2813 preset_target_arch = 2814 sh_get_arch_from_bfd_mach (bfd_arch->mach); 2815 else if (strcasecmp(&arg[len], "-up") == 0) 2816 preset_target_arch = 2817 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 2818 else 2819 continue; 2820 break; 2821 } 2822 2823 if (!preset_target_arch) 2824 as_bad (_("Invalid argument to --isa option: %s"), arg); 2825 } 2826 break; 2827 2828 case OPTION_H_TICK_HEX: 2829 enable_h_tick_hex = 1; 2830 break; 2831 2832 #ifdef OBJ_ELF 2833 case OPTION_FDPIC: 2834 sh_fdpic = TRUE; 2835 break; 2836 #endif /* OBJ_ELF */ 2837 2838 default: 2839 return 0; 2840 } 2841 2842 return 1; 2843 } 2844 2845 void 2846 md_show_usage (FILE *stream) 2847 { 2848 fprintf (stream, _("\ 2849 SH options:\n\ 2850 --little generate little endian code\n\ 2851 --big generate big endian code\n\ 2852 --relax alter jump instructions for long displacements\n\ 2853 --renesas disable optimization with section symbol for\n\ 2854 compatibility with Renesas assembler.\n\ 2855 --small align sections to 4 byte boundaries, not 16\n\ 2856 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 2857 --allow-reg-prefix allow '$' as a register name prefix.\n\ 2858 --isa=[any use most appropriate isa\n\ 2859 | dsp same as '-dsp'\n\ 2860 | fp")); 2861 { 2862 extern const bfd_arch_info_type bfd_sh_arch; 2863 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2864 2865 for (; bfd_arch; bfd_arch=bfd_arch->next) 2866 { 2867 fprintf (stream, "\n | %s", bfd_arch->printable_name); 2868 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 2869 } 2870 } 2871 fprintf (stream, "]\n"); 2872 #ifdef OBJ_ELF 2873 fprintf (stream, _("\ 2874 --fdpic generate an FDPIC object file\n")); 2875 #endif /* OBJ_ELF */ 2876 } 2877 2878 /* This struct is used to pass arguments to sh_count_relocs through 2880 bfd_map_over_sections. */ 2881 2882 struct sh_count_relocs 2883 { 2884 /* Symbol we are looking for. */ 2885 symbolS *sym; 2886 /* Count of relocs found. */ 2887 int count; 2888 }; 2889 2890 /* Count the number of fixups in a section which refer to a particular 2891 symbol. This is called via bfd_map_over_sections. */ 2892 2893 static void 2894 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 2895 { 2896 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 2897 segment_info_type *seginfo; 2898 symbolS *sym; 2899 fixS *fix; 2900 2901 seginfo = seg_info (sec); 2902 if (seginfo == NULL) 2903 return; 2904 2905 sym = info->sym; 2906 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2907 { 2908 if (fix->fx_addsy == sym) 2909 { 2910 ++info->count; 2911 fix->fx_tcbit = 1; 2912 } 2913 } 2914 } 2915 2916 /* Handle the count relocs for a particular section. 2917 This is called via bfd_map_over_sections. */ 2918 2919 static void 2920 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 2921 void *ignore ATTRIBUTE_UNUSED) 2922 { 2923 segment_info_type *seginfo; 2924 fixS *fix; 2925 2926 seginfo = seg_info (sec); 2927 if (seginfo == NULL) 2928 return; 2929 2930 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2931 { 2932 symbolS *sym; 2933 2934 sym = fix->fx_addsy; 2935 /* Check for a local_symbol. */ 2936 if (sym && sym->bsym == NULL) 2937 { 2938 struct local_symbol *ls = (struct local_symbol *)sym; 2939 /* See if it's been converted. If so, canonicalize. */ 2940 if (local_symbol_converted_p (ls)) 2941 fix->fx_addsy = local_symbol_get_real_symbol (ls); 2942 } 2943 } 2944 2945 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2946 { 2947 symbolS *sym; 2948 bfd_vma val; 2949 fixS *fscan; 2950 struct sh_count_relocs info; 2951 2952 if (fix->fx_r_type != BFD_RELOC_SH_USES) 2953 continue; 2954 2955 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 2956 symbol in the same section. */ 2957 sym = fix->fx_addsy; 2958 if (sym == NULL 2959 || fix->fx_subsy != NULL 2960 || fix->fx_addnumber != 0 2961 || S_GET_SEGMENT (sym) != sec 2962 || S_IS_EXTERNAL (sym)) 2963 { 2964 as_warn_where (fix->fx_file, fix->fx_line, 2965 _(".uses does not refer to a local symbol in the same section")); 2966 continue; 2967 } 2968 2969 /* Look through the fixups again, this time looking for one 2970 at the same location as sym. */ 2971 val = S_GET_VALUE (sym); 2972 for (fscan = seginfo->fix_root; 2973 fscan != NULL; 2974 fscan = fscan->fx_next) 2975 if (val == fscan->fx_frag->fr_address + fscan->fx_where 2976 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 2977 && fscan->fx_r_type != BFD_RELOC_SH_CODE 2978 && fscan->fx_r_type != BFD_RELOC_SH_DATA 2979 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 2980 break; 2981 if (fscan == NULL) 2982 { 2983 as_warn_where (fix->fx_file, fix->fx_line, 2984 _("can't find fixup pointed to by .uses")); 2985 continue; 2986 } 2987 2988 if (fscan->fx_tcbit) 2989 { 2990 /* We've already done this one. */ 2991 continue; 2992 } 2993 2994 /* The variable fscan should also be a fixup to a local symbol 2995 in the same section. */ 2996 sym = fscan->fx_addsy; 2997 if (sym == NULL 2998 || fscan->fx_subsy != NULL 2999 || fscan->fx_addnumber != 0 3000 || S_GET_SEGMENT (sym) != sec 3001 || S_IS_EXTERNAL (sym)) 3002 { 3003 as_warn_where (fix->fx_file, fix->fx_line, 3004 _(".uses target does not refer to a local symbol in the same section")); 3005 continue; 3006 } 3007 3008 /* Now we look through all the fixups of all the sections, 3009 counting the number of times we find a reference to sym. */ 3010 info.sym = sym; 3011 info.count = 0; 3012 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 3013 3014 if (info.count < 1) 3015 abort (); 3016 3017 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 3018 We have already adjusted the value of sym to include the 3019 fragment address, so we undo that adjustment here. */ 3020 subseg_change (sec, 0); 3021 fix_new (fscan->fx_frag, 3022 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3023 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3024 } 3025 } 3026 3027 /* This function is called after the symbol table has been completed, 3028 but before the relocs or section contents have been written out. 3029 If we have seen any .uses pseudo-ops, they point to an instruction 3030 which loads a register with the address of a function. We look 3031 through the fixups to find where the function address is being 3032 loaded from. We then generate a COUNT reloc giving the number of 3033 times that function address is referred to. The linker uses this 3034 information when doing relaxing, to decide when it can eliminate 3035 the stored function address entirely. */ 3036 3037 void 3038 sh_frob_file (void) 3039 { 3040 if (! sh_relax) 3041 return; 3042 3043 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3044 } 3045 3046 /* Called after relaxing. Set the correct sizes of the fragments, and 3047 create relocs so that md_apply_fix will fill in the correct values. */ 3048 3049 void 3050 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3051 { 3052 int donerelax = 0; 3053 3054 switch (fragP->fr_subtype) 3055 { 3056 case C (COND_JUMP, COND8): 3057 case C (COND_JUMP_DELAY, COND8): 3058 subseg_change (seg, 0); 3059 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3060 1, BFD_RELOC_SH_PCDISP8BY2); 3061 fragP->fr_fix += 2; 3062 fragP->fr_var = 0; 3063 break; 3064 3065 case C (UNCOND_JUMP, UNCOND12): 3066 subseg_change (seg, 0); 3067 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3068 1, BFD_RELOC_SH_PCDISP12BY2); 3069 fragP->fr_fix += 2; 3070 fragP->fr_var = 0; 3071 break; 3072 3073 case C (UNCOND_JUMP, UNCOND32): 3074 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3075 if (fragP->fr_symbol == NULL) 3076 as_bad_where (fragP->fr_file, fragP->fr_line, 3077 _("displacement overflows 12-bit field")); 3078 else if (S_IS_DEFINED (fragP->fr_symbol)) 3079 as_bad_where (fragP->fr_file, fragP->fr_line, 3080 _("displacement to defined symbol %s overflows 12-bit field"), 3081 S_GET_NAME (fragP->fr_symbol)); 3082 else 3083 as_bad_where (fragP->fr_file, fragP->fr_line, 3084 _("displacement to undefined symbol %s overflows 12-bit field"), 3085 S_GET_NAME (fragP->fr_symbol)); 3086 /* Stabilize this frag, so we don't trip an assert. */ 3087 fragP->fr_fix += fragP->fr_var; 3088 fragP->fr_var = 0; 3089 break; 3090 3091 case C (COND_JUMP, COND12): 3092 case C (COND_JUMP_DELAY, COND12): 3093 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3094 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3095 was due to gas incorrectly relaxing an out-of-range conditional 3096 branch with delay slot. It turned: 3097 bf.s L6 (slot mov.l r12,@(44,r0)) 3098 into: 3099 3100 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 3101 30: 00 09 nop 3102 32: 10 cb mov.l r12,@(44,r0) 3103 Therefore, branches with delay slots have to be handled 3104 differently from ones without delay slots. */ 3105 { 3106 unsigned char *buffer = 3107 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 3108 int highbyte = target_big_endian ? 0 : 1; 3109 int lowbyte = target_big_endian ? 1 : 0; 3110 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3111 3112 /* Toggle the true/false bit of the bcond. */ 3113 buffer[highbyte] ^= 0x2; 3114 3115 /* If this is a delayed branch, we may not put the bra in the 3116 slot. So we change it to a non-delayed branch, like that: 3117 b! cond slot_label; bra disp; slot_label: slot_insn 3118 ??? We should try if swapping the conditional branch and 3119 its delay-slot insn already makes the branch reach. */ 3120 3121 /* Build a relocation to six / four bytes farther on. */ 3122 subseg_change (seg, 0); 3123 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3124 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3125 1, BFD_RELOC_SH_PCDISP8BY2); 3126 3127 /* Set up a jump instruction. */ 3128 buffer[highbyte + 2] = 0xa0; 3129 buffer[lowbyte + 2] = 0; 3130 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3131 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3132 3133 if (delay) 3134 { 3135 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3136 fragP->fr_fix += 4; 3137 } 3138 else 3139 { 3140 /* Fill in a NOP instruction. */ 3141 buffer[highbyte + 4] = 0x0; 3142 buffer[lowbyte + 4] = 0x9; 3143 3144 fragP->fr_fix += 6; 3145 } 3146 fragP->fr_var = 0; 3147 donerelax = 1; 3148 } 3149 break; 3150 3151 case C (COND_JUMP, COND32): 3152 case C (COND_JUMP_DELAY, COND32): 3153 case C (COND_JUMP, UNDEF_WORD_DISP): 3154 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3155 if (fragP->fr_symbol == NULL) 3156 as_bad_where (fragP->fr_file, fragP->fr_line, 3157 _("displacement overflows 8-bit field")); 3158 else if (S_IS_DEFINED (fragP->fr_symbol)) 3159 as_bad_where (fragP->fr_file, fragP->fr_line, 3160 _("displacement to defined symbol %s overflows 8-bit field"), 3161 S_GET_NAME (fragP->fr_symbol)); 3162 else 3163 as_bad_where (fragP->fr_file, fragP->fr_line, 3164 _("displacement to undefined symbol %s overflows 8-bit field "), 3165 S_GET_NAME (fragP->fr_symbol)); 3166 /* Stabilize this frag, so we don't trip an assert. */ 3167 fragP->fr_fix += fragP->fr_var; 3168 fragP->fr_var = 0; 3169 break; 3170 3171 default: 3172 abort (); 3173 } 3174 3175 if (donerelax && !sh_relax) 3176 as_warn_where (fragP->fr_file, fragP->fr_line, 3177 _("overflow in branch to %s; converted into longer instruction sequence"), 3178 (fragP->fr_symbol != NULL 3179 ? S_GET_NAME (fragP->fr_symbol) 3180 : "")); 3181 } 3182 3183 valueT 3184 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3185 { 3186 #ifdef OBJ_ELF 3187 return size; 3188 #else /* ! OBJ_ELF */ 3189 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) 3190 & -(1 << bfd_get_section_alignment (stdoutput, seg))); 3191 #endif /* ! OBJ_ELF */ 3192 } 3193 3194 /* This static variable is set by s_uacons to tell sh_cons_align that 3195 the expression does not need to be aligned. */ 3196 3197 static int sh_no_align_cons = 0; 3198 3199 /* This handles the unaligned space allocation pseudo-ops, such as 3200 .uaword. .uaword is just like .word, but the value does not need 3201 to be aligned. */ 3202 3203 static void 3204 s_uacons (int bytes) 3205 { 3206 /* Tell sh_cons_align not to align this value. */ 3207 sh_no_align_cons = 1; 3208 cons (bytes); 3209 } 3210 3211 /* If a .word, et. al., pseud-op is seen, warn if the value is not 3212 aligned correctly. Note that this can cause warnings to be issued 3213 when assembling initialized structured which were declared with the 3214 packed attribute. FIXME: Perhaps we should require an option to 3215 enable this warning? */ 3216 3217 void 3218 sh_cons_align (int nbytes) 3219 { 3220 int nalign; 3221 3222 if (sh_no_align_cons) 3223 { 3224 /* This is an unaligned pseudo-op. */ 3225 sh_no_align_cons = 0; 3226 return; 3227 } 3228 3229 nalign = 0; 3230 while ((nbytes & 1) == 0) 3231 { 3232 ++nalign; 3233 nbytes >>= 1; 3234 } 3235 3236 if (nalign == 0) 3237 return; 3238 3239 if (now_seg == absolute_section) 3240 { 3241 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3242 as_warn (_("misaligned data")); 3243 return; 3244 } 3245 3246 frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3247 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3248 3249 record_alignment (now_seg, nalign); 3250 } 3251 3252 /* When relaxing, we need to output a reloc for any .align directive 3253 that requests alignment to a four byte boundary or larger. This is 3254 also where we check for misaligned data. */ 3255 3256 void 3257 sh_handle_align (fragS *frag) 3258 { 3259 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3260 3261 if (frag->fr_type == rs_align_code) 3262 { 3263 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3264 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3265 3266 char *p = frag->fr_literal + frag->fr_fix; 3267 3268 if (bytes & 1) 3269 { 3270 *p++ = 0; 3271 bytes--; 3272 frag->fr_fix += 1; 3273 } 3274 3275 if (target_big_endian) 3276 { 3277 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3278 frag->fr_var = sizeof big_nop_pattern; 3279 } 3280 else 3281 { 3282 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3283 frag->fr_var = sizeof little_nop_pattern; 3284 } 3285 } 3286 else if (frag->fr_type == rs_align_test) 3287 { 3288 if (bytes != 0) 3289 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3290 } 3291 3292 if (sh_relax 3293 && (frag->fr_type == rs_align 3294 || frag->fr_type == rs_align_code) 3295 && frag->fr_address + frag->fr_fix > 0 3296 && frag->fr_offset > 1 3297 && now_seg != bss_section) 3298 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3299 BFD_RELOC_SH_ALIGN); 3300 } 3301 3302 /* See whether the relocation should be resolved locally. */ 3303 3304 static bfd_boolean 3305 sh_local_pcrel (fixS *fix) 3306 { 3307 return (! sh_relax 3308 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3309 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3310 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3311 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3312 || fix->fx_r_type == BFD_RELOC_8_PCREL 3313 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3314 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3315 } 3316 3317 /* See whether we need to force a relocation into the output file. 3318 This is used to force out switch and PC relative relocations when 3319 relaxing. */ 3320 3321 int 3322 sh_force_relocation (fixS *fix) 3323 { 3324 /* These relocations can't make it into a DSO, so no use forcing 3325 them for global symbols. */ 3326 if (sh_local_pcrel (fix)) 3327 return 0; 3328 3329 /* Make sure some relocations get emitted. */ 3330 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3331 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3332 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3333 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3334 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3335 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3336 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3337 || generic_force_reloc (fix)) 3338 return 1; 3339 3340 if (! sh_relax) 3341 return 0; 3342 3343 return (fix->fx_pcrel 3344 || SWITCH_TABLE (fix) 3345 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3346 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3347 || fix->fx_r_type == BFD_RELOC_SH_CODE 3348 || fix->fx_r_type == BFD_RELOC_SH_DATA 3349 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3350 } 3351 3352 #ifdef OBJ_ELF 3353 bfd_boolean 3354 sh_fix_adjustable (fixS *fixP) 3355 { 3356 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3357 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3358 || fixP->fx_r_type == BFD_RELOC_SH_GOT20 3359 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3360 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC 3361 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 3362 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC 3363 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 3364 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC 3365 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3366 || fixP->fx_r_type == BFD_RELOC_RVA) 3367 return 0; 3368 3369 /* We need the symbol name for the VTABLE entries */ 3370 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3371 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3372 return 0; 3373 3374 return 1; 3375 } 3376 3377 void 3378 sh_elf_final_processing (void) 3379 { 3380 int val; 3381 3382 /* Set file-specific flags to indicate if this code needs 3383 a processor with the sh-dsp / sh2e ISA to execute. */ 3384 val = sh_find_elf_flags (valid_arch); 3385 3386 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3387 elf_elfheader (stdoutput)->e_flags |= val; 3388 3389 if (sh_fdpic) 3390 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; 3391 } 3392 #endif 3393 3394 #ifdef TE_UCLINUX 3395 /* Return the target format for uClinux. */ 3396 3397 const char * 3398 sh_uclinux_target_format (void) 3399 { 3400 if (sh_fdpic) 3401 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); 3402 else 3403 return (!target_big_endian ? "elf32-shl" : "elf32-sh"); 3404 } 3405 #endif 3406 3407 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its 3408 assembly-time value. If we're generating a reloc for FIXP, 3409 see whether the addend should be stored in-place or whether 3410 it should be in an ELF r_addend field. */ 3411 3412 static void 3413 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) 3414 { 3415 reloc_howto_type *howto; 3416 3417 if (fixP->fx_addsy != NULL || fixP->fx_pcrel) 3418 { 3419 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 3420 if (howto && !howto->partial_inplace) 3421 { 3422 fixP->fx_addnumber = val; 3423 return; 3424 } 3425 } 3426 md_number_to_chars (buf, val, size); 3427 } 3428 3429 /* Apply a fixup to the object file. */ 3430 3431 void 3432 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3433 { 3434 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3435 int lowbyte = target_big_endian ? 1 : 0; 3436 int highbyte = target_big_endian ? 0 : 1; 3437 long val = (long) *valP; 3438 long max, min; 3439 int shift; 3440 3441 /* A difference between two symbols, the second of which is in the 3442 current section, is transformed in a PC-relative relocation to 3443 the other symbol. We have to adjust the relocation type here. */ 3444 if (fixP->fx_pcrel) 3445 { 3446 switch (fixP->fx_r_type) 3447 { 3448 default: 3449 break; 3450 3451 case BFD_RELOC_32: 3452 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3453 break; 3454 3455 /* Currently, we only support 32-bit PCREL relocations. 3456 We'd need a new reloc type to handle 16_PCREL, and 3457 8_PCREL is already taken for R_SH_SWITCH8, which 3458 apparently does something completely different than what 3459 we need. FIXME. */ 3460 case BFD_RELOC_16: 3461 bfd_set_error (bfd_error_bad_value); 3462 return; 3463 3464 case BFD_RELOC_8: 3465 bfd_set_error (bfd_error_bad_value); 3466 return; 3467 } 3468 } 3469 3470 /* The function adjust_reloc_syms won't convert a reloc against a weak 3471 symbol into a reloc against a section, but bfd_install_relocation 3472 will screw up if the symbol is defined, so we have to adjust val here 3473 to avoid the screw up later. 3474 3475 For ordinary relocs, this does not happen for ELF, since for ELF, 3476 bfd_install_relocation uses the "special function" field of the 3477 howto, and does not execute the code that needs to be undone, as long 3478 as the special function does not return bfd_reloc_continue. 3479 It can happen for GOT- and PLT-type relocs the way they are 3480 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 3481 doesn't matter here since those relocs don't use VAL; see below. */ 3482 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 3483 && fixP->fx_addsy != NULL 3484 && S_IS_WEAK (fixP->fx_addsy)) 3485 val -= S_GET_VALUE (fixP->fx_addsy); 3486 3487 if (SWITCH_TABLE (fixP)) 3488 val -= S_GET_VALUE (fixP->fx_subsy); 3489 3490 max = min = 0; 3491 shift = 0; 3492 switch (fixP->fx_r_type) 3493 { 3494 case BFD_RELOC_SH_IMM3: 3495 max = 0x7; 3496 * buf = (* buf & 0xf8) | (val & 0x7); 3497 break; 3498 case BFD_RELOC_SH_IMM3U: 3499 max = 0x7; 3500 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 3501 break; 3502 case BFD_RELOC_SH_DISP12: 3503 max = 0xfff; 3504 buf[lowbyte] = val & 0xff; 3505 buf[highbyte] |= (val >> 8) & 0x0f; 3506 break; 3507 case BFD_RELOC_SH_DISP12BY2: 3508 max = 0xfff; 3509 shift = 1; 3510 buf[lowbyte] = (val >> 1) & 0xff; 3511 buf[highbyte] |= (val >> 9) & 0x0f; 3512 break; 3513 case BFD_RELOC_SH_DISP12BY4: 3514 max = 0xfff; 3515 shift = 2; 3516 buf[lowbyte] = (val >> 2) & 0xff; 3517 buf[highbyte] |= (val >> 10) & 0x0f; 3518 break; 3519 case BFD_RELOC_SH_DISP12BY8: 3520 max = 0xfff; 3521 shift = 3; 3522 buf[lowbyte] = (val >> 3) & 0xff; 3523 buf[highbyte] |= (val >> 11) & 0x0f; 3524 break; 3525 case BFD_RELOC_SH_DISP20: 3526 if (! target_big_endian) 3527 abort(); 3528 max = 0x7ffff; 3529 min = -0x80000; 3530 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 3531 buf[2] = (val >> 8) & 0xff; 3532 buf[3] = val & 0xff; 3533 break; 3534 case BFD_RELOC_SH_DISP20BY8: 3535 if (!target_big_endian) 3536 abort(); 3537 max = 0x7ffff; 3538 min = -0x80000; 3539 shift = 8; 3540 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 3541 buf[2] = (val >> 16) & 0xff; 3542 buf[3] = (val >> 8) & 0xff; 3543 break; 3544 3545 case BFD_RELOC_SH_IMM4: 3546 max = 0xf; 3547 *buf = (*buf & 0xf0) | (val & 0xf); 3548 break; 3549 3550 case BFD_RELOC_SH_IMM4BY2: 3551 max = 0xf; 3552 shift = 1; 3553 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 3554 break; 3555 3556 case BFD_RELOC_SH_IMM4BY4: 3557 max = 0xf; 3558 shift = 2; 3559 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 3560 break; 3561 3562 case BFD_RELOC_SH_IMM8BY2: 3563 max = 0xff; 3564 shift = 1; 3565 *buf = val >> 1; 3566 break; 3567 3568 case BFD_RELOC_SH_IMM8BY4: 3569 max = 0xff; 3570 shift = 2; 3571 *buf = val >> 2; 3572 break; 3573 3574 case BFD_RELOC_8: 3575 case BFD_RELOC_SH_IMM8: 3576 /* Sometimes the 8 bit value is sign extended (e.g., add) and 3577 sometimes it is not (e.g., and). We permit any 8 bit value. 3578 Note that adding further restrictions may invalidate 3579 reasonable looking assembly code, such as ``and -0x1,r0''. */ 3580 max = 0xff; 3581 min = -0xff; 3582 *buf++ = val; 3583 break; 3584 3585 case BFD_RELOC_SH_PCRELIMM8BY4: 3586 /* If we are dealing with a known destination ... */ 3587 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) 3588 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) 3589 { 3590 /* Don't silently move the destination due to misalignment. 3591 The absolute address is the fragment base plus the offset into 3592 the fragment plus the pc relative offset to the label. */ 3593 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) 3594 as_bad_where (fixP->fx_file, fixP->fx_line, 3595 _("offset to unaligned destination")); 3596 3597 /* The displacement cannot be zero or backward even if aligned. 3598 Allow -2 because val has already been adjusted somewhere. */ 3599 if (val < -2) 3600 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); 3601 } 3602 3603 /* The lower two bits of the PC are cleared before the 3604 displacement is added in. We can assume that the destination 3605 is on a 4 byte boundary. If this instruction is also on a 4 3606 byte boundary, then we want 3607 (target - here) / 4 3608 and target - here is a multiple of 4. 3609 Otherwise, we are on a 2 byte boundary, and we want 3610 (target - (here - 2)) / 4 3611 and target - here is not a multiple of 4. Computing 3612 (target - (here - 2)) / 4 == (target - here + 2) / 4 3613 works for both cases, since in the first case the addition of 3614 2 will be removed by the division. target - here is in the 3615 variable val. */ 3616 val = (val + 2) / 4; 3617 if (val & ~0xff) 3618 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3619 buf[lowbyte] = val; 3620 break; 3621 3622 case BFD_RELOC_SH_PCRELIMM8BY2: 3623 val /= 2; 3624 if (val & ~0xff) 3625 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3626 buf[lowbyte] = val; 3627 break; 3628 3629 case BFD_RELOC_SH_PCDISP8BY2: 3630 val /= 2; 3631 if (val < -0x80 || val > 0x7f) 3632 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3633 buf[lowbyte] = val; 3634 break; 3635 3636 case BFD_RELOC_SH_PCDISP12BY2: 3637 val /= 2; 3638 if (val < -0x800 || val > 0x7ff) 3639 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3640 buf[lowbyte] = val & 0xff; 3641 buf[highbyte] |= (val >> 8) & 0xf; 3642 break; 3643 3644 case BFD_RELOC_32: 3645 case BFD_RELOC_32_PCREL: 3646 apply_full_field_fix (fixP, buf, val, 4); 3647 break; 3648 3649 case BFD_RELOC_16: 3650 apply_full_field_fix (fixP, buf, val, 2); 3651 break; 3652 3653 case BFD_RELOC_SH_USES: 3654 /* Pass the value into sh_reloc(). */ 3655 fixP->fx_addnumber = val; 3656 break; 3657 3658 case BFD_RELOC_SH_COUNT: 3659 case BFD_RELOC_SH_ALIGN: 3660 case BFD_RELOC_SH_CODE: 3661 case BFD_RELOC_SH_DATA: 3662 case BFD_RELOC_SH_LABEL: 3663 /* Nothing to do here. */ 3664 break; 3665 3666 case BFD_RELOC_SH_LOOP_START: 3667 case BFD_RELOC_SH_LOOP_END: 3668 3669 case BFD_RELOC_VTABLE_INHERIT: 3670 case BFD_RELOC_VTABLE_ENTRY: 3671 fixP->fx_done = 0; 3672 return; 3673 3674 #ifdef OBJ_ELF 3675 case BFD_RELOC_32_PLT_PCREL: 3676 /* Make the jump instruction point to the address of the operand. At 3677 runtime we merely add the offset to the actual PLT entry. */ 3678 * valP = 0xfffffffc; 3679 val = fixP->fx_offset; 3680 if (fixP->fx_subsy) 3681 val -= S_GET_VALUE (fixP->fx_subsy); 3682 apply_full_field_fix (fixP, buf, val, 4); 3683 break; 3684 3685 case BFD_RELOC_SH_GOTPC: 3686 /* This is tough to explain. We end up with this one if we have 3687 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 3688 The goal here is to obtain the absolute address of the GOT, 3689 and it is strongly preferable from a performance point of 3690 view to avoid using a runtime relocation for this. There are 3691 cases where you have something like: 3692 3693 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 3694 3695 and here no correction would be required. Internally in the 3696 assembler we treat operands of this form as not being pcrel 3697 since the '.' is explicitly mentioned, and I wonder whether 3698 it would simplify matters to do it this way. Who knows. In 3699 earlier versions of the PIC patches, the pcrel_adjust field 3700 was used to store the correction, but since the expression is 3701 not pcrel, I felt it would be confusing to do it this way. */ 3702 * valP -= 1; 3703 apply_full_field_fix (fixP, buf, val, 4); 3704 break; 3705 3706 case BFD_RELOC_SH_TLS_GD_32: 3707 case BFD_RELOC_SH_TLS_LD_32: 3708 case BFD_RELOC_SH_TLS_IE_32: 3709 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3710 /* Fallthrough */ 3711 case BFD_RELOC_32_GOT_PCREL: 3712 case BFD_RELOC_SH_GOT20: 3713 case BFD_RELOC_SH_GOTPLT32: 3714 case BFD_RELOC_SH_GOTFUNCDESC: 3715 case BFD_RELOC_SH_GOTFUNCDESC20: 3716 case BFD_RELOC_SH_GOTOFFFUNCDESC: 3717 case BFD_RELOC_SH_GOTOFFFUNCDESC20: 3718 case BFD_RELOC_SH_FUNCDESC: 3719 * valP = 0; /* Fully resolved at runtime. No addend. */ 3720 apply_full_field_fix (fixP, buf, 0, 4); 3721 break; 3722 3723 case BFD_RELOC_SH_TLS_LDO_32: 3724 case BFD_RELOC_SH_TLS_LE_32: 3725 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3726 /* Fallthrough */ 3727 case BFD_RELOC_32_GOTOFF: 3728 case BFD_RELOC_SH_GOTOFF20: 3729 apply_full_field_fix (fixP, buf, val, 4); 3730 break; 3731 #endif 3732 3733 default: 3734 abort (); 3735 } 3736 3737 if (shift != 0) 3738 { 3739 if ((val & ((1 << shift) - 1)) != 0) 3740 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 3741 if (val >= 0) 3742 val >>= shift; 3743 else 3744 val = ((val >> shift) 3745 | ((long) -1 & ~ ((long) -1 >> shift))); 3746 } 3747 3748 /* Extend sign for 64-bit host. */ 3749 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; 3750 if (max != 0 && (val < min || val > max)) 3751 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 3752 else if (max != 0) 3753 /* Stop the generic code from trying to overflow check the value as well. 3754 It may not have the correct value anyway, as we do not store val back 3755 into *valP. */ 3756 fixP->fx_no_overflow = 1; 3757 3758 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 3759 fixP->fx_done = 1; 3760 } 3761 3762 /* Called just before address relaxation. Return the length 3763 by which a fragment must grow to reach it's destination. */ 3764 3765 int 3766 md_estimate_size_before_relax (fragS *fragP, segT segment_type) 3767 { 3768 int what; 3769 3770 switch (fragP->fr_subtype) 3771 { 3772 default: 3773 abort (); 3774 3775 case C (UNCOND_JUMP, UNDEF_DISP): 3776 /* Used to be a branch to somewhere which was unknown. */ 3777 if (!fragP->fr_symbol) 3778 { 3779 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3780 } 3781 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3782 { 3783 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3784 } 3785 else 3786 { 3787 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 3788 } 3789 break; 3790 3791 case C (COND_JUMP, UNDEF_DISP): 3792 case C (COND_JUMP_DELAY, UNDEF_DISP): 3793 what = GET_WHAT (fragP->fr_subtype); 3794 /* Used to be a branch to somewhere which was unknown. */ 3795 if (fragP->fr_symbol 3796 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3797 { 3798 /* Got a symbol and it's defined in this segment, become byte 3799 sized - maybe it will fix up. */ 3800 fragP->fr_subtype = C (what, COND8); 3801 } 3802 else if (fragP->fr_symbol) 3803 { 3804 /* It's got a segment, but it's not ours, so it will always be long. */ 3805 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 3806 } 3807 else 3808 { 3809 /* We know the abs value. */ 3810 fragP->fr_subtype = C (what, COND8); 3811 } 3812 break; 3813 3814 case C (UNCOND_JUMP, UNCOND12): 3815 case C (UNCOND_JUMP, UNCOND32): 3816 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3817 case C (COND_JUMP, COND8): 3818 case C (COND_JUMP, COND12): 3819 case C (COND_JUMP, COND32): 3820 case C (COND_JUMP, UNDEF_WORD_DISP): 3821 case C (COND_JUMP_DELAY, COND8): 3822 case C (COND_JUMP_DELAY, COND12): 3823 case C (COND_JUMP_DELAY, COND32): 3824 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3825 /* When relaxing a section for the second time, we don't need to 3826 do anything besides return the current size. */ 3827 break; 3828 } 3829 3830 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 3831 return fragP->fr_var; 3832 } 3833 3834 /* Put number into target byte order. */ 3835 3836 void 3837 md_number_to_chars (char *ptr, valueT use, int nbytes) 3838 { 3839 if (! target_big_endian) 3840 number_to_chars_littleendian (ptr, use, nbytes); 3841 else 3842 number_to_chars_bigendian (ptr, use, nbytes); 3843 } 3844 3845 /* This version is used in obj-coff.c eg. for the sh-hms target. */ 3846 3847 long 3848 md_pcrel_from (fixS *fixP) 3849 { 3850 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 3851 } 3852 3853 long 3854 md_pcrel_from_section (fixS *fixP, segT sec) 3855 { 3856 if (! sh_local_pcrel (fixP) 3857 && fixP->fx_addsy != (symbolS *) NULL 3858 && (generic_force_reloc (fixP) 3859 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 3860 { 3861 /* The symbol is undefined (or is defined but not in this section, 3862 or we're not sure about it being the final definition). Let the 3863 linker figure it out. We need to adjust the subtraction of a 3864 symbol to the position of the relocated data, though. */ 3865 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 3866 } 3867 3868 return md_pcrel_from (fixP); 3869 } 3870 3871 /* Create a reloc. */ 3872 3873 arelent * 3874 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 3875 { 3876 arelent *rel; 3877 bfd_reloc_code_real_type r_type; 3878 3879 rel = XNEW (arelent); 3880 rel->sym_ptr_ptr = XNEW (asymbol *); 3881 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 3882 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 3883 3884 r_type = fixp->fx_r_type; 3885 3886 if (SWITCH_TABLE (fixp)) 3887 { 3888 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 3889 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); 3890 if (r_type == BFD_RELOC_16) 3891 r_type = BFD_RELOC_SH_SWITCH16; 3892 else if (r_type == BFD_RELOC_8) 3893 r_type = BFD_RELOC_8_PCREL; 3894 else if (r_type == BFD_RELOC_32) 3895 r_type = BFD_RELOC_SH_SWITCH32; 3896 else 3897 abort (); 3898 } 3899 else if (r_type == BFD_RELOC_SH_USES) 3900 rel->addend = fixp->fx_addnumber; 3901 else if (r_type == BFD_RELOC_SH_COUNT) 3902 rel->addend = fixp->fx_offset; 3903 else if (r_type == BFD_RELOC_SH_ALIGN) 3904 rel->addend = fixp->fx_offset; 3905 else if (r_type == BFD_RELOC_VTABLE_INHERIT 3906 || r_type == BFD_RELOC_VTABLE_ENTRY) 3907 rel->addend = fixp->fx_offset; 3908 else if (r_type == BFD_RELOC_SH_LOOP_START 3909 || r_type == BFD_RELOC_SH_LOOP_END) 3910 rel->addend = fixp->fx_offset; 3911 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 3912 { 3913 rel->addend = 0; 3914 rel->address = rel->addend = fixp->fx_offset; 3915 } 3916 else 3917 rel->addend = fixp->fx_addnumber; 3918 3919 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 3920 3921 if (rel->howto == NULL) 3922 { 3923 as_bad_where (fixp->fx_file, fixp->fx_line, 3924 _("Cannot represent relocation type %s"), 3925 bfd_get_reloc_code_name (r_type)); 3926 /* Set howto to a garbage value so that we can keep going. */ 3927 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 3928 gas_assert (rel->howto != NULL); 3929 } 3930 #ifdef OBJ_ELF 3931 else if (rel->howto->type == R_SH_IND12W) 3932 rel->addend += fixp->fx_offset - 4; 3933 #endif 3934 3935 return rel; 3936 } 3937 3938 #ifdef OBJ_ELF 3939 inline static char * 3940 sh_end_of_match (char *cont, const char *what) 3941 { 3942 int len = strlen (what); 3943 3944 if (strncasecmp (cont, what, strlen (what)) == 0 3945 && ! is_part_of_name (cont[len])) 3946 return cont + len; 3947 3948 return NULL; 3949 } 3950 3951 int 3952 sh_parse_name (char const *name, 3953 expressionS *exprP, 3954 enum expr_mode mode, 3955 char *nextcharP) 3956 { 3957 char *next = input_line_pointer; 3958 char *next_end; 3959 int reloc_type; 3960 segT segment; 3961 3962 exprP->X_op_symbol = NULL; 3963 3964 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 3965 { 3966 if (! GOT_symbol) 3967 GOT_symbol = symbol_find_or_make (name); 3968 3969 exprP->X_add_symbol = GOT_symbol; 3970 no_suffix: 3971 /* If we have an absolute symbol or a reg, then we know its 3972 value now. */ 3973 segment = S_GET_SEGMENT (exprP->X_add_symbol); 3974 if (mode != expr_defer && segment == absolute_section) 3975 { 3976 exprP->X_op = O_constant; 3977 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3978 exprP->X_add_symbol = NULL; 3979 } 3980 else if (mode != expr_defer && segment == reg_section) 3981 { 3982 exprP->X_op = O_register; 3983 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3984 exprP->X_add_symbol = NULL; 3985 } 3986 else 3987 { 3988 exprP->X_op = O_symbol; 3989 exprP->X_add_number = 0; 3990 } 3991 3992 return 1; 3993 } 3994 3995 exprP->X_add_symbol = symbol_find_or_make (name); 3996 3997 if (*nextcharP != '@') 3998 goto no_suffix; 3999 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 4000 reloc_type = BFD_RELOC_32_GOTOFF; 4001 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 4002 reloc_type = BFD_RELOC_SH_GOTPLT32; 4003 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 4004 reloc_type = BFD_RELOC_32_GOT_PCREL; 4005 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 4006 reloc_type = BFD_RELOC_32_PLT_PCREL; 4007 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 4008 reloc_type = BFD_RELOC_SH_TLS_GD_32; 4009 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 4010 reloc_type = BFD_RELOC_SH_TLS_LD_32; 4011 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 4012 reloc_type = BFD_RELOC_SH_TLS_IE_32; 4013 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 4014 reloc_type = BFD_RELOC_SH_TLS_LE_32; 4015 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 4016 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 4017 else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) 4018 reloc_type = BFD_RELOC_32_PCREL; 4019 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) 4020 reloc_type = BFD_RELOC_SH_GOTFUNCDESC; 4021 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) 4022 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; 4023 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) 4024 reloc_type = BFD_RELOC_SH_FUNCDESC; 4025 else 4026 goto no_suffix; 4027 4028 *input_line_pointer = *nextcharP; 4029 input_line_pointer = next_end; 4030 *nextcharP = *input_line_pointer; 4031 *input_line_pointer = '\0'; 4032 4033 exprP->X_op = O_PIC_reloc; 4034 exprP->X_add_number = 0; 4035 exprP->X_md = reloc_type; 4036 4037 return 1; 4038 } 4039 4040 void 4041 sh_cfi_frame_initial_instructions (void) 4042 { 4043 cfi_add_CFA_def_cfa (15, 0); 4044 } 4045 4046 int 4047 sh_regname_to_dw2regnum (char *regname) 4048 { 4049 unsigned int regnum = -1; 4050 unsigned int i; 4051 const char *p; 4052 char *q; 4053 static struct { const char *name; int dw2regnum; } regnames[] = 4054 { 4055 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4056 { "macl", 21 }, { "fpul", 23 } 4057 }; 4058 4059 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4060 if (strcmp (regnames[i].name, regname) == 0) 4061 return regnames[i].dw2regnum; 4062 4063 if (regname[0] == 'r') 4064 { 4065 p = regname + 1; 4066 regnum = strtoul (p, &q, 10); 4067 if (p == q || *q || regnum >= 16) 4068 return -1; 4069 } 4070 else if (regname[0] == 'f' && regname[1] == 'r') 4071 { 4072 p = regname + 2; 4073 regnum = strtoul (p, &q, 10); 4074 if (p == q || *q || regnum >= 16) 4075 return -1; 4076 regnum += 25; 4077 } 4078 else if (regname[0] == 'x' && regname[1] == 'd') 4079 { 4080 p = regname + 2; 4081 regnum = strtoul (p, &q, 10); 4082 if (p == q || *q || regnum >= 8) 4083 return -1; 4084 regnum += 87; 4085 } 4086 return regnum; 4087 } 4088 #endif /* OBJ_ELF */ 4089
Indexes created Sat Mar 21 00:23:06 UTC 2026