tc-sh.c revision 1.1.1.8
1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright (C) 1993-2020 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21 /* Written By Steve Chamberlain <sac (at) cygnus.com> */ 22 23 #include "as.h" 24 #include "subsegs.h" 25 #define DEFINE_TABLE 26 #include "opcodes/sh-opc.h" 27 #include "safe-ctype.h" 28 29 #ifdef OBJ_ELF 30 #include "elf/sh.h" 31 #endif 32 33 #include "dwarf2dbg.h" 34 #include "dw2gencfi.h" 35 36 typedef struct 37 { 38 sh_arg_type type; 39 int reg; 40 expressionS immediate; 41 } 42 sh_operand_info; 43 44 const char comment_chars[] = "!"; 45 const char line_separator_chars[] = ";"; 46 const char line_comment_chars[] = "!#"; 47 48 static void s_uses (int); 49 static void s_uacons (int); 50 51 #ifdef OBJ_ELF 52 static void sh_elf_cons (int); 53 54 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 55 #endif 56 57 static void 58 big (int ignore ATTRIBUTE_UNUSED) 59 { 60 if (! target_big_endian) 61 as_bad (_("directive .big encountered when option -big required")); 62 63 /* Stop further messages. */ 64 target_big_endian = 1; 65 } 66 67 static void 68 little (int ignore ATTRIBUTE_UNUSED) 69 { 70 if (target_big_endian) 71 as_bad (_("directive .little encountered when option -little required")); 72 73 /* Stop further messages. */ 74 target_big_endian = 0; 75 } 76 77 /* This table describes all the machine specific pseudo-ops the assembler 78 has to support. The fields are: 79 pseudo-op name without dot 80 function to call to execute this pseudo-op 81 Integer arg to pass to the function. */ 82 83 const pseudo_typeS md_pseudo_table[] = 84 { 85 #ifdef OBJ_ELF 86 {"long", sh_elf_cons, 4}, 87 {"int", sh_elf_cons, 4}, 88 {"word", sh_elf_cons, 2}, 89 {"short", sh_elf_cons, 2}, 90 #else 91 {"int", cons, 4}, 92 {"word", cons, 2}, 93 #endif /* OBJ_ELF */ 94 {"big", big, 0}, 95 {"form", listing_psize, 0}, 96 {"little", little, 0}, 97 {"heading", listing_title, 0}, 98 {"import", s_ignore, 0}, 99 {"page", listing_eject, 0}, 100 {"program", s_ignore, 0}, 101 {"uses", s_uses, 0}, 102 {"uaword", s_uacons, 2}, 103 {"ualong", s_uacons, 4}, 104 {"uaquad", s_uacons, 8}, 105 {"2byte", s_uacons, 2}, 106 {"4byte", s_uacons, 4}, 107 {"8byte", s_uacons, 8}, 108 {0, 0, 0} 109 }; 110 111 int sh_relax; /* set if -relax seen */ 112 113 /* Whether -small was seen. */ 114 115 int sh_small; 116 117 /* Flag to generate relocations against symbol values for local symbols. */ 118 119 static int dont_adjust_reloc_32; 120 121 /* Flag to indicate that '$' is allowed as a register prefix. */ 122 123 static int allow_dollar_register_prefix; 124 125 /* Preset architecture set, if given; zero otherwise. */ 126 127 static unsigned int preset_target_arch; 128 129 /* The bit mask of architectures that could 130 accommodate the insns seen so far. */ 131 static unsigned int valid_arch; 132 133 #ifdef OBJ_ELF 134 /* Whether --fdpic was given. */ 135 static int sh_fdpic; 136 #endif 137 138 const char EXP_CHARS[] = "eE"; 139 140 /* Chars that mean this number is a floating point constant. */ 141 /* As in 0f12.456 */ 142 /* or 0d1.2345e12 */ 143 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 144 145 #define C(a,b) ENCODE_RELAX(a,b) 146 147 #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 148 #define GET_WHAT(x) ((x>>4)) 149 150 /* These are the three types of relaxable instruction. */ 151 /* These are the types of relaxable instructions; except for END which is 152 a marker. */ 153 #define COND_JUMP 1 154 #define COND_JUMP_DELAY 2 155 #define UNCOND_JUMP 3 156 157 #define END 4 158 159 #define UNDEF_DISP 0 160 #define COND8 1 161 #define COND12 2 162 #define COND32 3 163 #define UNDEF_WORD_DISP 4 164 165 #define UNCOND12 1 166 #define UNCOND32 2 167 168 /* Branch displacements are from the address of the branch plus 169 four, thus all minimum and maximum values have 4 added to them. */ 170 #define COND8_F 258 171 #define COND8_M -252 172 #define COND8_LENGTH 2 173 174 /* There is one extra instruction before the branch, so we must add 175 two more bytes to account for it. */ 176 #define COND12_F 4100 177 #define COND12_M -4090 178 #define COND12_LENGTH 6 179 180 #define COND12_DELAY_LENGTH 4 181 182 /* ??? The minimum and maximum values are wrong, but this does not matter 183 since this relocation type is not supported yet. */ 184 #define COND32_F (1<<30) 185 #define COND32_M -(1<<30) 186 #define COND32_LENGTH 14 187 188 #define UNCOND12_F 4098 189 #define UNCOND12_M -4092 190 #define UNCOND12_LENGTH 2 191 192 /* ??? The minimum and maximum values are wrong, but this does not matter 193 since this relocation type is not supported yet. */ 194 #define UNCOND32_F (1<<30) 195 #define UNCOND32_M -(1<<30) 196 #define UNCOND32_LENGTH 14 197 198 #define EMPTY { 0, 0, 0, 0 } 199 200 const relax_typeS md_relax_table[C (END, 0)] = { 201 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 202 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 203 204 EMPTY, 205 /* C (COND_JUMP, COND8) */ 206 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 207 /* C (COND_JUMP, COND12) */ 208 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 209 /* C (COND_JUMP, COND32) */ 210 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 211 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 212 { 0, 0, COND32_LENGTH, 0, }, 213 EMPTY, EMPTY, EMPTY, 214 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 215 216 EMPTY, 217 /* C (COND_JUMP_DELAY, COND8) */ 218 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 219 /* C (COND_JUMP_DELAY, COND12) */ 220 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 221 /* C (COND_JUMP_DELAY, COND32) */ 222 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 223 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 224 { 0, 0, COND32_LENGTH, 0, }, 225 EMPTY, EMPTY, EMPTY, 226 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 227 228 EMPTY, 229 /* C (UNCOND_JUMP, UNCOND12) */ 230 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 231 /* C (UNCOND_JUMP, UNCOND32) */ 232 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 233 EMPTY, 234 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 235 { 0, 0, UNCOND32_LENGTH, 0, }, 236 EMPTY, EMPTY, EMPTY, 237 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 238 239 }; 240 241 #undef EMPTY 242 243 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ 244 245 246 #ifdef OBJ_ELF 248 /* Determine whether the symbol needs any kind of PIC relocation. */ 249 250 inline static int 251 sh_PIC_related_p (symbolS *sym) 252 { 253 expressionS *exp; 254 255 if (! sym) 256 return 0; 257 258 if (sym == GOT_symbol) 259 return 1; 260 261 exp = symbol_get_value_expression (sym); 262 263 return (exp->X_op == O_PIC_reloc 264 || sh_PIC_related_p (exp->X_add_symbol) 265 || sh_PIC_related_p (exp->X_op_symbol)); 266 } 267 268 /* Determine the relocation type to be used to represent the 269 expression, that may be rearranged. */ 270 271 static int 272 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 273 { 274 expressionS *exp = main_exp; 275 276 /* This is here for backward-compatibility only. GCC used to generated: 277 278 f@PLT + . - (.LPCS# + 2) 279 280 but we'd rather be able to handle this as a PIC-related reference 281 plus/minus a symbol. However, gas' parser gives us: 282 283 O_subtract (O_add (f@PLT, .), .LPCS#+2) 284 285 so we attempt to transform this into: 286 287 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 288 289 which we can handle simply below. */ 290 if (exp->X_op == O_subtract) 291 { 292 if (sh_PIC_related_p (exp->X_op_symbol)) 293 return 1; 294 295 exp = symbol_get_value_expression (exp->X_add_symbol); 296 297 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 298 return 1; 299 300 if (exp && exp->X_op == O_add 301 && sh_PIC_related_p (exp->X_add_symbol)) 302 { 303 symbolS *sym = exp->X_add_symbol; 304 305 exp->X_op = O_subtract; 306 exp->X_add_symbol = main_exp->X_op_symbol; 307 308 main_exp->X_op_symbol = main_exp->X_add_symbol; 309 main_exp->X_add_symbol = sym; 310 311 main_exp->X_add_number += exp->X_add_number; 312 exp->X_add_number = 0; 313 } 314 315 exp = main_exp; 316 } 317 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 318 return 1; 319 320 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 321 { 322 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 323 { 324 *r_type_p = BFD_RELOC_SH_GOTPC; 325 return 0; 326 } 327 exp = symbol_get_value_expression (exp->X_add_symbol); 328 if (! exp) 329 return 0; 330 } 331 332 if (exp->X_op == O_PIC_reloc) 333 { 334 switch (*r_type_p) 335 { 336 case BFD_RELOC_NONE: 337 case BFD_RELOC_UNUSED: 338 *r_type_p = exp->X_md; 339 break; 340 341 case BFD_RELOC_SH_DISP20: 342 switch (exp->X_md) 343 { 344 case BFD_RELOC_32_GOT_PCREL: 345 *r_type_p = BFD_RELOC_SH_GOT20; 346 break; 347 348 case BFD_RELOC_32_GOTOFF: 349 *r_type_p = BFD_RELOC_SH_GOTOFF20; 350 break; 351 352 case BFD_RELOC_SH_GOTFUNCDESC: 353 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; 354 break; 355 356 case BFD_RELOC_SH_GOTOFFFUNCDESC: 357 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; 358 break; 359 360 default: 361 abort (); 362 } 363 break; 364 365 default: 366 abort (); 367 } 368 if (exp == main_exp) 369 exp->X_op = O_symbol; 370 else 371 { 372 main_exp->X_add_symbol = exp->X_add_symbol; 373 main_exp->X_add_number += exp->X_add_number; 374 } 375 } 376 else 377 return (sh_PIC_related_p (exp->X_add_symbol) 378 || sh_PIC_related_p (exp->X_op_symbol)); 379 380 return 0; 381 } 382 383 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 384 385 void 386 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 387 bfd_reloc_code_real_type r_type) 388 { 389 r_type = BFD_RELOC_UNUSED; 390 391 if (sh_check_fixup (exp, &r_type)) 392 as_bad (_("Invalid PIC expression.")); 393 394 if (r_type == BFD_RELOC_UNUSED) 395 switch (size) 396 { 397 case 1: 398 r_type = BFD_RELOC_8; 399 break; 400 401 case 2: 402 r_type = BFD_RELOC_16; 403 break; 404 405 case 4: 406 r_type = BFD_RELOC_32; 407 break; 408 409 case 8: 410 r_type = BFD_RELOC_64; 411 break; 412 413 default: 414 goto error; 415 } 416 else if (size != 4) 417 { 418 error: 419 as_bad (_("unsupported BFD relocation size %u"), size); 420 r_type = BFD_RELOC_UNUSED; 421 } 422 423 fix_new_exp (frag, off, size, exp, 0, r_type); 424 } 425 426 /* The regular cons() function, that reads constants, doesn't support 427 suffixes such as @GOT, @GOTOFF and @PLT, that generate 428 machine-specific relocation types. So we must define it here. */ 429 /* Clobbers input_line_pointer, checks end-of-line. */ 430 /* NBYTES 1=.byte, 2=.word, 4=.long */ 431 static void 432 sh_elf_cons (int nbytes) 433 { 434 expressionS exp; 435 436 if (is_it_end_of_statement ()) 437 { 438 demand_empty_rest_of_line (); 439 return; 440 } 441 442 #ifdef md_cons_align 443 md_cons_align (nbytes); 444 #endif 445 446 do 447 { 448 expression (&exp); 449 emit_expr (&exp, (unsigned int) nbytes); 450 } 451 while (*input_line_pointer++ == ','); 452 453 input_line_pointer--; /* Put terminator back into stream. */ 454 if (*input_line_pointer == '#' || *input_line_pointer == '!') 455 { 456 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 457 } 458 else 459 demand_empty_rest_of_line (); 460 } 461 462 /* The regular frag_offset_fixed_p doesn't work for rs_align_test 463 frags. */ 464 465 static bfd_boolean 466 align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, 467 bfd_vma *offset) 468 { 469 const fragS *frag; 470 bfd_vma off; 471 472 /* Start with offset initialised to difference between the two frags. 473 Prior to assigning frag addresses this will be zero. */ 474 off = frag1->fr_address - frag2->fr_address; 475 if (frag1 == frag2) 476 { 477 *offset = off; 478 return TRUE; 479 } 480 481 /* Maybe frag2 is after frag1. */ 482 frag = frag1; 483 while (frag->fr_type == rs_fill 484 || frag->fr_type == rs_align_test) 485 { 486 if (frag->fr_type == rs_fill) 487 off += frag->fr_fix + frag->fr_offset * frag->fr_var; 488 else 489 off += frag->fr_fix; 490 frag = frag->fr_next; 491 if (frag == NULL) 492 break; 493 if (frag == frag2) 494 { 495 *offset = off; 496 return TRUE; 497 } 498 } 499 500 /* Maybe frag1 is after frag2. */ 501 off = frag1->fr_address - frag2->fr_address; 502 frag = frag2; 503 while (frag->fr_type == rs_fill 504 || frag->fr_type == rs_align_test) 505 { 506 if (frag->fr_type == rs_fill) 507 off -= frag->fr_fix + frag->fr_offset * frag->fr_var; 508 else 509 off -= frag->fr_fix; 510 frag = frag->fr_next; 511 if (frag == NULL) 512 break; 513 if (frag == frag1) 514 { 515 *offset = off; 516 return TRUE; 517 } 518 } 519 520 return FALSE; 521 } 522 523 /* Optimize a difference of symbols which have rs_align_test frag if 524 possible. */ 525 526 int 527 sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) 528 { 529 bfd_vma frag_off; 530 531 if (op == O_subtract 532 && l->X_op == O_symbol 533 && r->X_op == O_symbol 534 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) 535 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) 536 || r->X_add_symbol == l->X_add_symbol) 537 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), 538 symbol_get_frag (r->X_add_symbol), 539 &frag_off)) 540 { 541 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) 542 - S_GET_VALUE (r->X_add_symbol); 543 subtract_from_result (l, r->X_add_number, r->X_extrabit); 544 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); 545 add_to_result (l, symval_diff, symval_diff < 0); 546 l->X_op = O_constant; 547 l->X_add_symbol = 0; 548 return 1; 549 } 550 return 0; 551 } 552 #endif /* OBJ_ELF */ 553 554 /* This function is called once, at assembler startup time. This should 556 set up all the tables, etc that the MD part of the assembler needs. */ 557 558 void 559 md_begin (void) 560 { 561 const sh_opcode_info *opcode; 562 const char *prev_name = ""; 563 unsigned int target_arch; 564 565 target_arch 566 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 567 valid_arch = target_arch; 568 569 opcode_hash_control = hash_new (); 570 571 /* Insert unique names into hash table. */ 572 for (opcode = sh_table; opcode->name; opcode++) 573 { 574 if (strcmp (prev_name, opcode->name) != 0) 575 { 576 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 577 continue; 578 prev_name = opcode->name; 579 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 580 } 581 } 582 } 583 584 static int reg_m; 585 static int reg_n; 586 static int reg_x, reg_y; 587 static int reg_efg; 588 static int reg_b; 589 590 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 591 592 /* Try to parse a reg name. Return the number of chars consumed. */ 593 594 static unsigned int 595 parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg) 596 { 597 char l0 = TOLOWER (src[0]); 598 char l1 = l0 ? TOLOWER (src[1]) : 0; 599 600 /* We use ! IDENT_CHAR for the next character after the register name, to 601 make sure that we won't accidentally recognize a symbol name such as 602 'sram' or sr_ram as being a reference to the register 'sr'. */ 603 604 if (l0 == 'r') 605 { 606 if (l1 == '1') 607 { 608 if (src[2] >= '0' && src[2] <= '5' 609 && ! IDENT_CHAR ((unsigned char) src[3])) 610 { 611 *mode = A_REG_N; 612 *reg = 10 + src[2] - '0'; 613 return 3; 614 } 615 } 616 if (l1 >= '0' && l1 <= '9' 617 && ! IDENT_CHAR ((unsigned char) src[2])) 618 { 619 *mode = A_REG_N; 620 *reg = (l1 - '0'); 621 return 2; 622 } 623 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 624 && ! IDENT_CHAR ((unsigned char) src[7])) 625 { 626 *mode = A_REG_B; 627 *reg = (l1 - '0'); 628 return 7; 629 } 630 631 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 632 { 633 *mode = A_RE; 634 return 2; 635 } 636 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 637 { 638 *mode = A_RS; 639 return 2; 640 } 641 } 642 643 if (l0 == 'a') 644 { 645 if (l1 == '0') 646 { 647 if (! IDENT_CHAR ((unsigned char) src[2])) 648 { 649 *mode = DSP_REG_N; 650 *reg = A_A0_NUM; 651 return 2; 652 } 653 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 654 { 655 *mode = DSP_REG_N; 656 *reg = A_A0G_NUM; 657 return 3; 658 } 659 } 660 if (l1 == '1') 661 { 662 if (! IDENT_CHAR ((unsigned char) src[2])) 663 { 664 *mode = DSP_REG_N; 665 *reg = A_A1_NUM; 666 return 2; 667 } 668 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 669 { 670 *mode = DSP_REG_N; 671 *reg = A_A1G_NUM; 672 return 3; 673 } 674 } 675 676 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 677 && ! IDENT_CHAR ((unsigned char) src[3])) 678 { 679 *mode = A_REG_N; 680 *reg = 4 + (l1 - '0'); 681 return 3; 682 } 683 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 684 && ! IDENT_CHAR ((unsigned char) src[3])) 685 { 686 *mode = A_REG_N; 687 *reg = 6 + (l1 - '0'); 688 return 3; 689 } 690 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 691 && ! IDENT_CHAR ((unsigned char) src[3])) 692 { 693 int n = l1 - '0'; 694 695 *mode = A_REG_N; 696 *reg = n | ((~n & 2) << 1); 697 return 3; 698 } 699 } 700 701 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 702 { 703 if (l1 == 's') 704 { 705 *mode = A_REG_N; 706 *reg = 8; 707 return 2; 708 } 709 if (l1 == 'x') 710 { 711 *mode = A_REG_N; 712 *reg = 8; 713 return 2; 714 } 715 if (l1 == 'y') 716 { 717 *mode = A_REG_N; 718 *reg = 9; 719 return 2; 720 } 721 } 722 723 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 724 && ! IDENT_CHAR ((unsigned char) src[2])) 725 { 726 *mode = DSP_REG_N; 727 *reg = A_X0_NUM + l1 - '0'; 728 return 2; 729 } 730 731 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 732 && ! IDENT_CHAR ((unsigned char) src[2])) 733 { 734 *mode = DSP_REG_N; 735 *reg = A_Y0_NUM + l1 - '0'; 736 return 2; 737 } 738 739 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 740 && ! IDENT_CHAR ((unsigned char) src[2])) 741 { 742 *mode = DSP_REG_N; 743 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 744 return 2; 745 } 746 747 if (l0 == 's' 748 && l1 == 's' 749 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 750 { 751 *mode = A_SSR; 752 return 3; 753 } 754 755 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 756 && ! IDENT_CHAR ((unsigned char) src[3])) 757 { 758 *mode = A_SPC; 759 return 3; 760 } 761 762 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 763 && ! IDENT_CHAR ((unsigned char) src[3])) 764 { 765 *mode = A_SGR; 766 return 3; 767 } 768 769 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 770 && ! IDENT_CHAR ((unsigned char) src[3])) 771 { 772 *mode = A_DSR; 773 return 3; 774 } 775 776 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 777 && ! IDENT_CHAR ((unsigned char) src[3])) 778 { 779 *mode = A_DBR; 780 return 3; 781 } 782 783 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 784 { 785 *mode = A_SR; 786 return 2; 787 } 788 789 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 790 { 791 *mode = A_REG_N; 792 *reg = 15; 793 return 2; 794 } 795 796 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 797 { 798 *mode = A_PR; 799 return 2; 800 } 801 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 802 { 803 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 804 and use an uninitialized immediate. */ 805 *mode = A_PC; 806 return 2; 807 } 808 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 809 && ! IDENT_CHAR ((unsigned char) src[3])) 810 { 811 *mode = A_GBR; 812 return 3; 813 } 814 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 815 && ! IDENT_CHAR ((unsigned char) src[3])) 816 { 817 *mode = A_VBR; 818 return 3; 819 } 820 821 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 822 && ! IDENT_CHAR ((unsigned char) src[3])) 823 { 824 *mode = A_TBR; 825 return 3; 826 } 827 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 828 && ! IDENT_CHAR ((unsigned char) src[4])) 829 { 830 if (TOLOWER (src[3]) == 'l') 831 { 832 *mode = A_MACL; 833 return 4; 834 } 835 if (TOLOWER (src[3]) == 'h') 836 { 837 *mode = A_MACH; 838 return 4; 839 } 840 } 841 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 842 && ! IDENT_CHAR ((unsigned char) src[3])) 843 { 844 *mode = A_MOD; 845 return 3; 846 } 847 if (l0 == 'f' && l1 == 'r') 848 { 849 if (src[2] == '1') 850 { 851 if (src[3] >= '0' && src[3] <= '5' 852 && ! IDENT_CHAR ((unsigned char) src[4])) 853 { 854 *mode = F_REG_N; 855 *reg = 10 + src[3] - '0'; 856 return 4; 857 } 858 } 859 if (src[2] >= '0' && src[2] <= '9' 860 && ! IDENT_CHAR ((unsigned char) src[3])) 861 { 862 *mode = F_REG_N; 863 *reg = (src[2] - '0'); 864 return 3; 865 } 866 } 867 if (l0 == 'd' && l1 == 'r') 868 { 869 if (src[2] == '1') 870 { 871 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 872 && ! IDENT_CHAR ((unsigned char) src[4])) 873 { 874 *mode = D_REG_N; 875 *reg = 10 + src[3] - '0'; 876 return 4; 877 } 878 } 879 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 880 && ! IDENT_CHAR ((unsigned char) src[3])) 881 { 882 *mode = D_REG_N; 883 *reg = (src[2] - '0'); 884 return 3; 885 } 886 } 887 if (l0 == 'x' && l1 == 'd') 888 { 889 if (src[2] == '1') 890 { 891 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 892 && ! IDENT_CHAR ((unsigned char) src[4])) 893 { 894 *mode = X_REG_N; 895 *reg = 11 + src[3] - '0'; 896 return 4; 897 } 898 } 899 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 900 && ! IDENT_CHAR ((unsigned char) src[3])) 901 { 902 *mode = X_REG_N; 903 *reg = (src[2] - '0') + 1; 904 return 3; 905 } 906 } 907 if (l0 == 'f' && l1 == 'v') 908 { 909 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 910 { 911 *mode = V_REG_N; 912 *reg = 12; 913 return 4; 914 } 915 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 916 && ! IDENT_CHAR ((unsigned char) src[3])) 917 { 918 *mode = V_REG_N; 919 *reg = (src[2] - '0'); 920 return 3; 921 } 922 } 923 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 924 && TOLOWER (src[3]) == 'l' 925 && ! IDENT_CHAR ((unsigned char) src[4])) 926 { 927 *mode = FPUL_N; 928 return 4; 929 } 930 931 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 932 && TOLOWER (src[3]) == 'c' 933 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 934 { 935 *mode = FPSCR_N; 936 return 5; 937 } 938 939 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 940 && TOLOWER (src[3]) == 'r' 941 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 942 { 943 *mode = XMTRX_M4; 944 return 5; 945 } 946 947 return 0; 948 } 949 950 /* Like parse_reg_without_prefix, but this version supports 951 $-prefixed register names if enabled by the user. */ 952 953 static unsigned int 954 parse_reg (char *src, sh_arg_type *mode, int *reg) 955 { 956 unsigned int prefix; 957 unsigned int consumed; 958 959 if (src[0] == '$') 960 { 961 if (allow_dollar_register_prefix) 962 { 963 src ++; 964 prefix = 1; 965 } 966 else 967 return 0; 968 } 969 else 970 prefix = 0; 971 972 consumed = parse_reg_without_prefix (src, mode, reg); 973 974 if (consumed == 0) 975 return 0; 976 977 return consumed + prefix; 978 } 979 980 static char * 981 parse_exp (char *s, sh_operand_info *op) 982 { 983 char *save; 984 char *new_pointer; 985 986 save = input_line_pointer; 987 input_line_pointer = s; 988 expression (&op->immediate); 989 if (op->immediate.X_op == O_absent) 990 as_bad (_("missing operand")); 991 new_pointer = input_line_pointer; 992 input_line_pointer = save; 993 return new_pointer; 994 } 995 996 /* The many forms of operand: 997 998 Rn Register direct 999 @Rn Register indirect 1000 @Rn+ Autoincrement 1001 @-Rn Autodecrement 1002 @(disp:4,Rn) 1003 @(disp:8,GBR) 1004 @(disp:8,PC) 1005 1006 @(R0,Rn) 1007 @(R0,GBR) 1008 1009 disp:8 1010 disp:12 1011 #imm8 1012 pr, gbr, vbr, macl, mach 1013 */ 1014 1015 static char * 1016 parse_at (char *src, sh_operand_info *op) 1017 { 1018 int len; 1019 sh_arg_type mode; 1020 src++; 1021 if (src[0] == '@') 1022 { 1023 src = parse_at (src, op); 1024 if (op->type == A_DISP_TBR) 1025 op->type = A_DISP2_TBR; 1026 else 1027 as_bad (_("illegal double indirection")); 1028 } 1029 else if (src[0] == '-') 1030 { 1031 /* Must be predecrement. */ 1032 src++; 1033 1034 len = parse_reg (src, &mode, &(op->reg)); 1035 if (mode != A_REG_N) 1036 as_bad (_("illegal register after @-")); 1037 1038 op->type = A_DEC_N; 1039 src += len; 1040 } 1041 else if (src[0] == '(') 1042 { 1043 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1044 @(r0, rn). */ 1045 src++; 1046 len = parse_reg (src, &mode, &(op->reg)); 1047 if (len && mode == A_REG_N) 1048 { 1049 src += len; 1050 if (op->reg != 0) 1051 { 1052 as_bad (_("must be @(r0,...)")); 1053 } 1054 if (src[0] == ',') 1055 { 1056 src++; 1057 /* Now can be rn or gbr. */ 1058 len = parse_reg (src, &mode, &(op->reg)); 1059 } 1060 else 1061 { 1062 len = 0; 1063 } 1064 if (len) 1065 { 1066 if (mode == A_GBR) 1067 { 1068 op->type = A_R0_GBR; 1069 } 1070 else if (mode == A_REG_N) 1071 { 1072 op->type = A_IND_R0_REG_N; 1073 } 1074 else 1075 { 1076 as_bad (_("syntax error in @(r0,...)")); 1077 } 1078 } 1079 else 1080 { 1081 as_bad (_("syntax error in @(r0...)")); 1082 } 1083 } 1084 else 1085 { 1086 /* Must be an @(disp,.. thing). */ 1087 src = parse_exp (src, op); 1088 if (src[0] == ',') 1089 src++; 1090 /* Now can be rn, gbr or pc. */ 1091 len = parse_reg (src, &mode, &op->reg); 1092 if (len) 1093 { 1094 if (mode == A_REG_N) 1095 { 1096 op->type = A_DISP_REG_N; 1097 } 1098 else if (mode == A_GBR) 1099 { 1100 op->type = A_DISP_GBR; 1101 } 1102 else if (mode == A_TBR) 1103 { 1104 op->type = A_DISP_TBR; 1105 } 1106 else if (mode == A_PC) 1107 { 1108 /* We want @(expr, pc) to uniformly address . + expr, 1109 no matter if expr is a constant, or a more complex 1110 expression, e.g. sym-. or sym1-sym2. 1111 However, we also used to accept @(sym,pc) 1112 as addressing sym, i.e. meaning the same as plain sym. 1113 Some existing code does use the @(sym,pc) syntax, so 1114 we give it the old semantics for now, but warn about 1115 its use, so that users have some time to fix their code. 1116 1117 Note that due to this backward compatibility hack, 1118 we'll get unexpected results when @(offset, pc) is used, 1119 and offset is a symbol that is set later to an an address 1120 difference, or an external symbol that is set to an 1121 address difference in another source file, so we want to 1122 eventually remove it. */ 1123 if (op->immediate.X_op == O_symbol) 1124 { 1125 op->type = A_DISP_PC; 1126 as_warn (_("Deprecated syntax.")); 1127 } 1128 else 1129 { 1130 op->type = A_DISP_PC_ABS; 1131 /* Such operands don't get corrected for PC==.+4, so 1132 make the correction here. */ 1133 op->immediate.X_add_number -= 4; 1134 } 1135 } 1136 else 1137 { 1138 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1139 } 1140 } 1141 else 1142 { 1143 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1144 } 1145 } 1146 src += len; 1147 if (src[0] != ')') 1148 as_bad (_("expecting )")); 1149 else 1150 src++; 1151 } 1152 else 1153 { 1154 src += parse_reg (src, &mode, &(op->reg)); 1155 if (mode != A_REG_N) 1156 as_bad (_("illegal register after @")); 1157 1158 if (src[0] == '+') 1159 { 1160 char l0, l1; 1161 1162 src++; 1163 l0 = TOLOWER (src[0]); 1164 l1 = TOLOWER (src[1]); 1165 1166 if ((l0 == 'r' && l1 == '8') 1167 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1168 { 1169 src += 2; 1170 op->type = AX_PMOD_N; 1171 } 1172 else if ( (l0 == 'r' && l1 == '9') 1173 || (l0 == 'i' && l1 == 'y')) 1174 { 1175 src += 2; 1176 op->type = AY_PMOD_N; 1177 } 1178 else 1179 op->type = A_INC_N; 1180 } 1181 else 1182 op->type = A_IND_N; 1183 } 1184 return src; 1185 } 1186 1187 static void 1188 get_operand (char **ptr, sh_operand_info *op) 1189 { 1190 char *src = *ptr; 1191 sh_arg_type mode = (sh_arg_type) -1; 1192 unsigned int len; 1193 1194 if (src[0] == '#') 1195 { 1196 src++; 1197 *ptr = parse_exp (src, op); 1198 op->type = A_IMM; 1199 return; 1200 } 1201 1202 else if (src[0] == '@') 1203 { 1204 *ptr = parse_at (src, op); 1205 return; 1206 } 1207 len = parse_reg (src, &mode, &(op->reg)); 1208 if (len) 1209 { 1210 *ptr = src + len; 1211 op->type = mode; 1212 return; 1213 } 1214 else 1215 { 1216 /* Not a reg, the only thing left is a displacement. */ 1217 *ptr = parse_exp (src, op); 1218 op->type = A_DISP_PC; 1219 return; 1220 } 1221 } 1222 1223 static char * 1224 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1225 { 1226 char *ptr = args; 1227 if (info->arg[0]) 1228 { 1229 /* The pre-processor will eliminate whitespace in front of '@' 1230 after the first argument; we may be called multiple times 1231 from assemble_ppi, so don't insist on finding whitespace here. */ 1232 if (*ptr == ' ') 1233 ptr++; 1234 1235 get_operand (&ptr, operand + 0); 1236 if (info->arg[1]) 1237 { 1238 if (*ptr == ',') 1239 { 1240 ptr++; 1241 } 1242 get_operand (&ptr, operand + 1); 1243 /* ??? Hack: psha/pshl have a varying operand number depending on 1244 the type of the first operand. We handle this by having the 1245 three-operand version first and reducing the number of operands 1246 parsed to two if we see that the first operand is an immediate. 1247 This works because no insn with three operands has an immediate 1248 as first operand. */ 1249 if (info->arg[2] && operand[0].type != A_IMM) 1250 { 1251 if (*ptr == ',') 1252 { 1253 ptr++; 1254 } 1255 get_operand (&ptr, operand + 2); 1256 } 1257 else 1258 { 1259 operand[2].type = 0; 1260 } 1261 } 1262 else 1263 { 1264 operand[1].type = 0; 1265 operand[2].type = 0; 1266 } 1267 } 1268 else 1269 { 1270 operand[0].type = 0; 1271 operand[1].type = 0; 1272 operand[2].type = 0; 1273 } 1274 return ptr; 1275 } 1276 1277 /* Passed a pointer to a list of opcodes which use different 1278 addressing modes, return the opcode which matches the opcodes 1279 provided. */ 1280 1281 static sh_opcode_info * 1282 get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1283 { 1284 sh_opcode_info *this_try = opcode; 1285 const char *name = opcode->name; 1286 int n = 0; 1287 1288 while (opcode->name) 1289 { 1290 this_try = opcode++; 1291 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1292 { 1293 /* We've looked so far down the table that we've run out of 1294 opcodes with the same name. */ 1295 return 0; 1296 } 1297 1298 /* Look at both operands needed by the opcodes and provided by 1299 the user - since an arg test will often fail on the same arg 1300 again and again, we'll try and test the last failing arg the 1301 first on each opcode try. */ 1302 for (n = 0; this_try->arg[n]; n++) 1303 { 1304 sh_operand_info *user = operands + n; 1305 sh_arg_type arg = this_try->arg[n]; 1306 1307 switch (arg) 1308 { 1309 case A_DISP_PC: 1310 if (user->type == A_DISP_PC_ABS) 1311 break; 1312 /* Fall through. */ 1313 case A_IMM: 1314 case A_BDISP12: 1315 case A_BDISP8: 1316 case A_DISP_GBR: 1317 case A_DISP2_TBR: 1318 case A_MACH: 1319 case A_PR: 1320 case A_MACL: 1321 if (user->type != arg) 1322 goto fail; 1323 break; 1324 case A_R0: 1325 /* opcode needs r0 */ 1326 if (user->type != A_REG_N || user->reg != 0) 1327 goto fail; 1328 break; 1329 case A_R0_GBR: 1330 if (user->type != A_R0_GBR || user->reg != 0) 1331 goto fail; 1332 break; 1333 case F_FR0: 1334 if (user->type != F_REG_N || user->reg != 0) 1335 goto fail; 1336 break; 1337 1338 case A_REG_N: 1339 case A_INC_N: 1340 case A_DEC_N: 1341 case A_IND_N: 1342 case A_IND_R0_REG_N: 1343 case A_DISP_REG_N: 1344 case F_REG_N: 1345 case D_REG_N: 1346 case X_REG_N: 1347 case V_REG_N: 1348 case FPUL_N: 1349 case FPSCR_N: 1350 case DSP_REG_N: 1351 /* Opcode needs rn */ 1352 if (user->type != arg) 1353 goto fail; 1354 reg_n = user->reg; 1355 break; 1356 case DX_REG_N: 1357 if (user->type != D_REG_N && user->type != X_REG_N) 1358 goto fail; 1359 reg_n = user->reg; 1360 break; 1361 case A_GBR: 1362 case A_TBR: 1363 case A_SR: 1364 case A_VBR: 1365 case A_DSR: 1366 case A_MOD: 1367 case A_RE: 1368 case A_RS: 1369 case A_SSR: 1370 case A_SPC: 1371 case A_SGR: 1372 case A_DBR: 1373 if (user->type != arg) 1374 goto fail; 1375 break; 1376 1377 case A_REG_B: 1378 if (user->type != arg) 1379 goto fail; 1380 reg_b = user->reg; 1381 break; 1382 1383 case A_INC_R15: 1384 if (user->type != A_INC_N) 1385 goto fail; 1386 if (user->reg != 15) 1387 goto fail; 1388 reg_n = user->reg; 1389 break; 1390 1391 case A_DEC_R15: 1392 if (user->type != A_DEC_N) 1393 goto fail; 1394 if (user->reg != 15) 1395 goto fail; 1396 reg_n = user->reg; 1397 break; 1398 1399 case A_REG_M: 1400 case A_INC_M: 1401 case A_DEC_M: 1402 case A_IND_M: 1403 case A_IND_R0_REG_M: 1404 case A_DISP_REG_M: 1405 case DSP_REG_M: 1406 /* Opcode needs rn */ 1407 if (user->type != arg - A_REG_M + A_REG_N) 1408 goto fail; 1409 reg_m = user->reg; 1410 break; 1411 1412 case AS_DEC_N: 1413 if (user->type != A_DEC_N) 1414 goto fail; 1415 if (user->reg < 2 || user->reg > 5) 1416 goto fail; 1417 reg_n = user->reg; 1418 break; 1419 1420 case AS_INC_N: 1421 if (user->type != A_INC_N) 1422 goto fail; 1423 if (user->reg < 2 || user->reg > 5) 1424 goto fail; 1425 reg_n = user->reg; 1426 break; 1427 1428 case AS_IND_N: 1429 if (user->type != A_IND_N) 1430 goto fail; 1431 if (user->reg < 2 || user->reg > 5) 1432 goto fail; 1433 reg_n = user->reg; 1434 break; 1435 1436 case AS_PMOD_N: 1437 if (user->type != AX_PMOD_N) 1438 goto fail; 1439 if (user->reg < 2 || user->reg > 5) 1440 goto fail; 1441 reg_n = user->reg; 1442 break; 1443 1444 case AX_INC_N: 1445 if (user->type != A_INC_N) 1446 goto fail; 1447 if (user->reg < 4 || user->reg > 5) 1448 goto fail; 1449 reg_n = user->reg; 1450 break; 1451 1452 case AX_IND_N: 1453 if (user->type != A_IND_N) 1454 goto fail; 1455 if (user->reg < 4 || user->reg > 5) 1456 goto fail; 1457 reg_n = user->reg; 1458 break; 1459 1460 case AX_PMOD_N: 1461 if (user->type != AX_PMOD_N) 1462 goto fail; 1463 if (user->reg < 4 || user->reg > 5) 1464 goto fail; 1465 reg_n = user->reg; 1466 break; 1467 1468 case AXY_INC_N: 1469 if (user->type != A_INC_N) 1470 goto fail; 1471 if ((user->reg < 4 || user->reg > 5) 1472 && (user->reg < 0 || user->reg > 1)) 1473 goto fail; 1474 reg_n = user->reg; 1475 break; 1476 1477 case AXY_IND_N: 1478 if (user->type != A_IND_N) 1479 goto fail; 1480 if ((user->reg < 4 || user->reg > 5) 1481 && (user->reg < 0 || user->reg > 1)) 1482 goto fail; 1483 reg_n = user->reg; 1484 break; 1485 1486 case AXY_PMOD_N: 1487 if (user->type != AX_PMOD_N) 1488 goto fail; 1489 if ((user->reg < 4 || user->reg > 5) 1490 && (user->reg < 0 || user->reg > 1)) 1491 goto fail; 1492 reg_n = user->reg; 1493 break; 1494 1495 case AY_INC_N: 1496 if (user->type != A_INC_N) 1497 goto fail; 1498 if (user->reg < 6 || user->reg > 7) 1499 goto fail; 1500 reg_n = user->reg; 1501 break; 1502 1503 case AY_IND_N: 1504 if (user->type != A_IND_N) 1505 goto fail; 1506 if (user->reg < 6 || user->reg > 7) 1507 goto fail; 1508 reg_n = user->reg; 1509 break; 1510 1511 case AY_PMOD_N: 1512 if (user->type != AY_PMOD_N) 1513 goto fail; 1514 if (user->reg < 6 || user->reg > 7) 1515 goto fail; 1516 reg_n = user->reg; 1517 break; 1518 1519 case AYX_INC_N: 1520 if (user->type != A_INC_N) 1521 goto fail; 1522 if ((user->reg < 6 || user->reg > 7) 1523 && (user->reg < 2 || user->reg > 3)) 1524 goto fail; 1525 reg_n = user->reg; 1526 break; 1527 1528 case AYX_IND_N: 1529 if (user->type != A_IND_N) 1530 goto fail; 1531 if ((user->reg < 6 || user->reg > 7) 1532 && (user->reg < 2 || user->reg > 3)) 1533 goto fail; 1534 reg_n = user->reg; 1535 break; 1536 1537 case AYX_PMOD_N: 1538 if (user->type != AY_PMOD_N) 1539 goto fail; 1540 if ((user->reg < 6 || user->reg > 7) 1541 && (user->reg < 2 || user->reg > 3)) 1542 goto fail; 1543 reg_n = user->reg; 1544 break; 1545 1546 case DSP_REG_A_M: 1547 if (user->type != DSP_REG_N) 1548 goto fail; 1549 if (user->reg != A_A0_NUM 1550 && user->reg != A_A1_NUM) 1551 goto fail; 1552 reg_m = user->reg; 1553 break; 1554 1555 case DSP_REG_AX: 1556 if (user->type != DSP_REG_N) 1557 goto fail; 1558 switch (user->reg) 1559 { 1560 case A_A0_NUM: 1561 reg_x = 0; 1562 break; 1563 case A_A1_NUM: 1564 reg_x = 2; 1565 break; 1566 case A_X0_NUM: 1567 reg_x = 1; 1568 break; 1569 case A_X1_NUM: 1570 reg_x = 3; 1571 break; 1572 default: 1573 goto fail; 1574 } 1575 break; 1576 1577 case DSP_REG_XY: 1578 if (user->type != DSP_REG_N) 1579 goto fail; 1580 switch (user->reg) 1581 { 1582 case A_X0_NUM: 1583 reg_x = 0; 1584 break; 1585 case A_X1_NUM: 1586 reg_x = 2; 1587 break; 1588 case A_Y0_NUM: 1589 reg_x = 1; 1590 break; 1591 case A_Y1_NUM: 1592 reg_x = 3; 1593 break; 1594 default: 1595 goto fail; 1596 } 1597 break; 1598 1599 case DSP_REG_AY: 1600 if (user->type != DSP_REG_N) 1601 goto fail; 1602 switch (user->reg) 1603 { 1604 case A_A0_NUM: 1605 reg_y = 0; 1606 break; 1607 case A_A1_NUM: 1608 reg_y = 1; 1609 break; 1610 case A_Y0_NUM: 1611 reg_y = 2; 1612 break; 1613 case A_Y1_NUM: 1614 reg_y = 3; 1615 break; 1616 default: 1617 goto fail; 1618 } 1619 break; 1620 1621 case DSP_REG_YX: 1622 if (user->type != DSP_REG_N) 1623 goto fail; 1624 switch (user->reg) 1625 { 1626 case A_Y0_NUM: 1627 reg_y = 0; 1628 break; 1629 case A_Y1_NUM: 1630 reg_y = 1; 1631 break; 1632 case A_X0_NUM: 1633 reg_y = 2; 1634 break; 1635 case A_X1_NUM: 1636 reg_y = 3; 1637 break; 1638 default: 1639 goto fail; 1640 } 1641 break; 1642 1643 case DSP_REG_X: 1644 if (user->type != DSP_REG_N) 1645 goto fail; 1646 switch (user->reg) 1647 { 1648 case A_X0_NUM: 1649 reg_x = 0; 1650 break; 1651 case A_X1_NUM: 1652 reg_x = 1; 1653 break; 1654 case A_A0_NUM: 1655 reg_x = 2; 1656 break; 1657 case A_A1_NUM: 1658 reg_x = 3; 1659 break; 1660 default: 1661 goto fail; 1662 } 1663 break; 1664 1665 case DSP_REG_Y: 1666 if (user->type != DSP_REG_N) 1667 goto fail; 1668 switch (user->reg) 1669 { 1670 case A_Y0_NUM: 1671 reg_y = 0; 1672 break; 1673 case A_Y1_NUM: 1674 reg_y = 1; 1675 break; 1676 case A_M0_NUM: 1677 reg_y = 2; 1678 break; 1679 case A_M1_NUM: 1680 reg_y = 3; 1681 break; 1682 default: 1683 goto fail; 1684 } 1685 break; 1686 1687 case DSP_REG_E: 1688 if (user->type != DSP_REG_N) 1689 goto fail; 1690 switch (user->reg) 1691 { 1692 case A_X0_NUM: 1693 reg_efg = 0 << 10; 1694 break; 1695 case A_X1_NUM: 1696 reg_efg = 1 << 10; 1697 break; 1698 case A_Y0_NUM: 1699 reg_efg = 2 << 10; 1700 break; 1701 case A_A1_NUM: 1702 reg_efg = 3 << 10; 1703 break; 1704 default: 1705 goto fail; 1706 } 1707 break; 1708 1709 case DSP_REG_F: 1710 if (user->type != DSP_REG_N) 1711 goto fail; 1712 switch (user->reg) 1713 { 1714 case A_Y0_NUM: 1715 reg_efg |= 0 << 8; 1716 break; 1717 case A_Y1_NUM: 1718 reg_efg |= 1 << 8; 1719 break; 1720 case A_X0_NUM: 1721 reg_efg |= 2 << 8; 1722 break; 1723 case A_A1_NUM: 1724 reg_efg |= 3 << 8; 1725 break; 1726 default: 1727 goto fail; 1728 } 1729 break; 1730 1731 case DSP_REG_G: 1732 if (user->type != DSP_REG_N) 1733 goto fail; 1734 switch (user->reg) 1735 { 1736 case A_M0_NUM: 1737 reg_efg |= 0 << 2; 1738 break; 1739 case A_M1_NUM: 1740 reg_efg |= 1 << 2; 1741 break; 1742 case A_A0_NUM: 1743 reg_efg |= 2 << 2; 1744 break; 1745 case A_A1_NUM: 1746 reg_efg |= 3 << 2; 1747 break; 1748 default: 1749 goto fail; 1750 } 1751 break; 1752 1753 case A_A0: 1754 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 1755 goto fail; 1756 break; 1757 case A_X0: 1758 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 1759 goto fail; 1760 break; 1761 case A_X1: 1762 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 1763 goto fail; 1764 break; 1765 case A_Y0: 1766 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 1767 goto fail; 1768 break; 1769 case A_Y1: 1770 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 1771 goto fail; 1772 break; 1773 1774 case F_REG_M: 1775 case D_REG_M: 1776 case X_REG_M: 1777 case V_REG_M: 1778 case FPUL_M: 1779 case FPSCR_M: 1780 /* Opcode needs rn */ 1781 if (user->type != arg - F_REG_M + F_REG_N) 1782 goto fail; 1783 reg_m = user->reg; 1784 break; 1785 case DX_REG_M: 1786 if (user->type != D_REG_N && user->type != X_REG_N) 1787 goto fail; 1788 reg_m = user->reg; 1789 break; 1790 case XMTRX_M4: 1791 if (user->type != XMTRX_M4) 1792 goto fail; 1793 reg_m = 4; 1794 break; 1795 1796 default: 1797 printf (_("unhandled %d\n"), arg); 1798 goto fail; 1799 } 1800 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 1801 && ( arg == A_DISP_REG_M 1802 || arg == A_DISP_REG_N)) 1803 { 1804 /* Check a few key IMM* fields for overflow. */ 1805 int opf; 1806 long val = user->immediate.X_add_number; 1807 1808 for (opf = 0; opf < 4; opf ++) 1809 switch (this_try->nibbles[opf]) 1810 { 1811 case IMM0_4: 1812 case IMM1_4: 1813 if (val < 0 || val > 15) 1814 goto fail; 1815 break; 1816 case IMM0_4BY2: 1817 case IMM1_4BY2: 1818 if (val < 0 || val > 15 * 2) 1819 goto fail; 1820 break; 1821 case IMM0_4BY4: 1822 case IMM1_4BY4: 1823 if (val < 0 || val > 15 * 4) 1824 goto fail; 1825 break; 1826 default: 1827 break; 1828 } 1829 } 1830 } 1831 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 1832 goto fail; 1833 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 1834 return this_try; 1835 fail: 1836 ; 1837 } 1838 1839 return 0; 1840 } 1841 1842 static void 1843 insert (char *where, bfd_reloc_code_real_type how, int pcrel, 1844 sh_operand_info *op) 1845 { 1846 fix_new_exp (frag_now, 1847 where - frag_now->fr_literal, 1848 2, 1849 &op->immediate, 1850 pcrel, 1851 how); 1852 } 1853 1854 static void 1855 insert4 (char * where, bfd_reloc_code_real_type how, int pcrel, 1856 sh_operand_info * op) 1857 { 1858 fix_new_exp (frag_now, 1859 where - frag_now->fr_literal, 1860 4, 1861 & op->immediate, 1862 pcrel, 1863 how); 1864 } 1865 static void 1866 build_relax (sh_opcode_info *opcode, sh_operand_info *op) 1867 { 1868 int high_byte = target_big_endian ? 0 : 1; 1869 char *p; 1870 1871 if (opcode->arg[0] == A_BDISP8) 1872 { 1873 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 1874 p = frag_var (rs_machine_dependent, 1875 md_relax_table[C (what, COND32)].rlx_length, 1876 md_relax_table[C (what, COND8)].rlx_length, 1877 C (what, 0), 1878 op->immediate.X_add_symbol, 1879 op->immediate.X_add_number, 1880 0); 1881 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 1882 } 1883 else if (opcode->arg[0] == A_BDISP12) 1884 { 1885 p = frag_var (rs_machine_dependent, 1886 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 1887 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 1888 C (UNCOND_JUMP, 0), 1889 op->immediate.X_add_symbol, 1890 op->immediate.X_add_number, 1891 0); 1892 p[high_byte] = (opcode->nibbles[0] << 4); 1893 } 1894 1895 } 1896 1897 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 1898 1899 static char * 1900 insert_loop_bounds (char *output, sh_operand_info *operand) 1901 { 1902 symbolS *end_sym; 1903 1904 /* Since the low byte of the opcode will be overwritten by the reloc, we 1905 can just stash the high byte into both bytes and ignore endianness. */ 1906 output[0] = 0x8c; 1907 output[1] = 0x8c; 1908 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1909 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1910 1911 if (sh_relax) 1912 { 1913 static int count = 0; 1914 char name[11]; 1915 expressionS *symval; 1916 1917 /* If the last loop insn is a two-byte-insn, it is in danger of being 1918 swapped with the insn after it. To prevent this, create a new 1919 symbol - complete with SH_LABEL reloc - after the last loop insn. 1920 If the last loop insn is four bytes long, the symbol will be 1921 right in the middle, but four byte insns are not swapped anyways. */ 1922 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 1923 Hence a 9 digit number should be enough to count all REPEATs. */ 1924 sprintf (name, "_R%x", count++ & 0x3fffffff); 1925 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); 1926 /* Make this a local symbol. */ 1927 #ifdef OBJ_COFF 1928 SF_SET_LOCAL (end_sym); 1929 #endif /* OBJ_COFF */ 1930 symbol_table_insert (end_sym); 1931 symval = symbol_get_value_expression (end_sym); 1932 *symval = operand[1].immediate; 1933 symval->X_add_number += 2; 1934 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 1935 } 1936 1937 output = frag_more (2); 1938 output[0] = 0x8e; 1939 output[1] = 0x8e; 1940 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1941 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1942 1943 return frag_more (2); 1944 } 1945 1946 /* Now we know what sort of opcodes it is, let's build the bytes. */ 1947 1948 static unsigned int 1949 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 1950 { 1951 int indx; 1952 char nbuf[8]; 1953 char *output; 1954 unsigned int size = 2; 1955 int low_byte = target_big_endian ? 1 : 0; 1956 int max_index = 4; 1957 bfd_reloc_code_real_type r_type; 1958 #ifdef OBJ_ELF 1959 int unhandled_pic = 0; 1960 #endif 1961 1962 nbuf[0] = 0; 1963 nbuf[1] = 0; 1964 nbuf[2] = 0; 1965 nbuf[3] = 0; 1966 nbuf[4] = 0; 1967 nbuf[5] = 0; 1968 nbuf[6] = 0; 1969 nbuf[7] = 0; 1970 1971 #ifdef OBJ_ELF 1972 for (indx = 0; indx < 3; indx++) 1973 if (opcode->arg[indx] == A_IMM 1974 && operand[indx].type == A_IMM 1975 && (operand[indx].immediate.X_op == O_PIC_reloc 1976 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) 1977 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) 1978 unhandled_pic = 1; 1979 #endif 1980 1981 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 1982 { 1983 output = frag_more (4); 1984 size = 4; 1985 max_index = 8; 1986 } 1987 else 1988 output = frag_more (2); 1989 1990 for (indx = 0; indx < max_index; indx++) 1991 { 1992 sh_nibble_type i = opcode->nibbles[indx]; 1993 if (i < 16) 1994 { 1995 nbuf[indx] = i; 1996 } 1997 else 1998 { 1999 switch (i) 2000 { 2001 case REG_N: 2002 case REG_N_D: 2003 nbuf[indx] = reg_n; 2004 break; 2005 case REG_M: 2006 nbuf[indx] = reg_m; 2007 break; 2008 case SDT_REG_N: 2009 if (reg_n < 2 || reg_n > 5) 2010 as_bad (_("Invalid register: 'r%d'"), reg_n); 2011 nbuf[indx] = (reg_n & 3) | 4; 2012 break; 2013 case REG_NM: 2014 nbuf[indx] = reg_n | (reg_m >> 2); 2015 break; 2016 case REG_B: 2017 nbuf[indx] = reg_b | 0x08; 2018 break; 2019 case REG_N_B01: 2020 nbuf[indx] = reg_n | 0x01; 2021 break; 2022 case IMM0_3s: 2023 nbuf[indx] |= 0x08; 2024 /* Fall through. */ 2025 case IMM0_3c: 2026 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2027 break; 2028 case IMM0_3Us: 2029 nbuf[indx] |= 0x80; 2030 /* Fall through. */ 2031 case IMM0_3Uc: 2032 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2033 break; 2034 case DISP0_12: 2035 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2036 break; 2037 case DISP0_12BY2: 2038 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2039 break; 2040 case DISP0_12BY4: 2041 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2042 break; 2043 case DISP0_12BY8: 2044 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2045 break; 2046 case DISP1_12: 2047 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2048 break; 2049 case DISP1_12BY2: 2050 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2051 break; 2052 case DISP1_12BY4: 2053 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2054 break; 2055 case DISP1_12BY8: 2056 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2057 break; 2058 case IMM0_20_4: 2059 break; 2060 case IMM0_20: 2061 r_type = BFD_RELOC_SH_DISP20; 2062 #ifdef OBJ_ELF 2063 if (sh_check_fixup (&operand->immediate, &r_type)) 2064 as_bad (_("Invalid PIC expression.")); 2065 unhandled_pic = 0; 2066 #endif 2067 insert4 (output, r_type, 0, operand); 2068 break; 2069 case IMM0_20BY8: 2070 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2071 break; 2072 case IMM0_4BY4: 2073 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2074 break; 2075 case IMM0_4BY2: 2076 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2077 break; 2078 case IMM0_4: 2079 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2080 break; 2081 case IMM1_4BY4: 2082 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2083 break; 2084 case IMM1_4BY2: 2085 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2086 break; 2087 case IMM1_4: 2088 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2089 break; 2090 case IMM0_8BY4: 2091 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2092 break; 2093 case IMM0_8BY2: 2094 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2095 break; 2096 case IMM0_8: 2097 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2098 break; 2099 case IMM1_8BY4: 2100 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2101 break; 2102 case IMM1_8BY2: 2103 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2104 break; 2105 case IMM1_8: 2106 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2107 break; 2108 case PCRELIMM_8BY4: 2109 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2110 operand->type != A_DISP_PC_ABS, operand); 2111 break; 2112 case PCRELIMM_8BY2: 2113 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2114 operand->type != A_DISP_PC_ABS, operand); 2115 break; 2116 case REPEAT: 2117 output = insert_loop_bounds (output, operand); 2118 nbuf[indx] = opcode->nibbles[3]; 2119 operand += 2; 2120 break; 2121 default: 2122 printf (_("failed for %d\n"), i); 2123 } 2124 } 2125 } 2126 #ifdef OBJ_ELF 2127 if (unhandled_pic) 2128 as_bad (_("misplaced PIC operand")); 2129 #endif 2130 if (!target_big_endian) 2131 { 2132 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2133 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2134 } 2135 else 2136 { 2137 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2138 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2139 } 2140 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2141 { 2142 if (!target_big_endian) 2143 { 2144 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2145 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2146 } 2147 else 2148 { 2149 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2150 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2151 } 2152 } 2153 return size; 2154 } 2155 2156 /* Find an opcode at the start of *STR_P in the hash table, and set 2157 *STR_P to the first character after the last one read. */ 2158 2159 static sh_opcode_info * 2160 find_cooked_opcode (char **str_p) 2161 { 2162 char *str = *str_p; 2163 unsigned char *op_start; 2164 unsigned char *op_end; 2165 char name[20]; 2166 unsigned int nlen = 0; 2167 2168 /* Drop leading whitespace. */ 2169 while (*str == ' ') 2170 str++; 2171 2172 /* Find the op code end. 2173 The pre-processor will eliminate whitespace in front of 2174 any '@' after the first argument; we may be called from 2175 assemble_ppi, so the opcode might be terminated by an '@'. */ 2176 for (op_start = op_end = (unsigned char *) str; 2177 *op_end 2178 && nlen < sizeof (name) - 1 2179 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2180 op_end++) 2181 { 2182 unsigned char c = op_start[nlen]; 2183 2184 /* The machine independent code will convert CMP/EQ into cmp/EQ 2185 because it thinks the '/' is the end of the symbol. Moreover, 2186 all but the first sub-insn is a parallel processing insn won't 2187 be capitalized. Instead of hacking up the machine independent 2188 code, we just deal with it here. */ 2189 c = TOLOWER (c); 2190 name[nlen] = c; 2191 nlen++; 2192 } 2193 2194 name[nlen] = 0; 2195 *str_p = (char *) op_end; 2196 2197 if (nlen == 0) 2198 as_bad (_("can't find opcode ")); 2199 2200 return (sh_opcode_info *) hash_find (opcode_hash_control, name); 2201 } 2202 2203 /* Assemble a parallel processing insn. */ 2204 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2205 2206 static unsigned int 2207 assemble_ppi (char *op_end, sh_opcode_info *opcode) 2208 { 2209 int movx = 0; 2210 int movy = 0; 2211 int cond = 0; 2212 int field_b = 0; 2213 char *output; 2214 int move_code; 2215 unsigned int size; 2216 2217 for (;;) 2218 { 2219 sh_operand_info operand[3]; 2220 2221 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2222 Make sure we encode a defined insn pattern. */ 2223 reg_x = 0; 2224 reg_y = 0; 2225 reg_n = 0; 2226 2227 if (opcode->arg[0] != A_END) 2228 op_end = get_operands (opcode, op_end, operand); 2229 try_another_opcode: 2230 opcode = get_specific (opcode, operand); 2231 if (opcode == 0) 2232 { 2233 /* Couldn't find an opcode which matched the operands. */ 2234 char *where = frag_more (2); 2235 size = 2; 2236 2237 where[0] = 0x0; 2238 where[1] = 0x0; 2239 as_bad (_("invalid operands for opcode")); 2240 return size; 2241 } 2242 2243 if (opcode->nibbles[0] != PPI) 2244 as_bad (_("insn can't be combined with parallel processing insn")); 2245 2246 switch (opcode->nibbles[1]) 2247 { 2248 2249 case NOPX: 2250 if (movx) 2251 as_bad (_("multiple movx specifications")); 2252 movx = DDT_BASE; 2253 break; 2254 case NOPY: 2255 if (movy) 2256 as_bad (_("multiple movy specifications")); 2257 movy = DDT_BASE; 2258 break; 2259 2260 case MOVX_NOPY: 2261 if (movx) 2262 as_bad (_("multiple movx specifications")); 2263 if ((reg_n < 4 || reg_n > 5) 2264 && (reg_n < 0 || reg_n > 1)) 2265 as_bad (_("invalid movx address register")); 2266 if (movy && movy != DDT_BASE) 2267 as_bad (_("insn cannot be combined with non-nopy")); 2268 movx = ((((reg_n & 1) != 0) << 9) 2269 + (((reg_n & 4) == 0) << 8) 2270 + (reg_x << 6) 2271 + (opcode->nibbles[2] << 4) 2272 + opcode->nibbles[3] 2273 + DDT_BASE); 2274 break; 2275 2276 case MOVY_NOPX: 2277 if (movy) 2278 as_bad (_("multiple movy specifications")); 2279 if ((reg_n < 6 || reg_n > 7) 2280 && (reg_n < 2 || reg_n > 3)) 2281 as_bad (_("invalid movy address register")); 2282 if (movx && movx != DDT_BASE) 2283 as_bad (_("insn cannot be combined with non-nopx")); 2284 movy = ((((reg_n & 1) != 0) << 8) 2285 + (((reg_n & 4) == 0) << 9) 2286 + (reg_y << 6) 2287 + (opcode->nibbles[2] << 4) 2288 + opcode->nibbles[3] 2289 + DDT_BASE); 2290 break; 2291 2292 case MOVX: 2293 if (movx) 2294 as_bad (_("multiple movx specifications")); 2295 if (movy & 0x2ac) 2296 as_bad (_("previous movy requires nopx")); 2297 if (reg_n < 4 || reg_n > 5) 2298 as_bad (_("invalid movx address register")); 2299 if (opcode->nibbles[2] & 8) 2300 { 2301 if (reg_m == A_A1_NUM) 2302 movx = 1 << 7; 2303 else if (reg_m != A_A0_NUM) 2304 as_bad (_("invalid movx dsp register")); 2305 } 2306 else 2307 { 2308 if (reg_x > 1) 2309 as_bad (_("invalid movx dsp register")); 2310 movx = reg_x << 7; 2311 } 2312 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2313 break; 2314 2315 case MOVY: 2316 if (movy) 2317 as_bad (_("multiple movy specifications")); 2318 if (movx & 0x153) 2319 as_bad (_("previous movx requires nopy")); 2320 if (opcode->nibbles[2] & 8) 2321 { 2322 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2323 so add 8 more. */ 2324 movy = 8; 2325 if (reg_m == A_A1_NUM) 2326 movy += 1 << 6; 2327 else if (reg_m != A_A0_NUM) 2328 as_bad (_("invalid movy dsp register")); 2329 } 2330 else 2331 { 2332 if (reg_y > 1) 2333 as_bad (_("invalid movy dsp register")); 2334 movy = reg_y << 6; 2335 } 2336 if (reg_n < 6 || reg_n > 7) 2337 as_bad (_("invalid movy address register")); 2338 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2339 break; 2340 2341 case PSH: 2342 if (operand[0].immediate.X_op != O_constant) 2343 as_bad (_("dsp immediate shift value not constant")); 2344 field_b = ((opcode->nibbles[2] << 12) 2345 | (operand[0].immediate.X_add_number & 127) << 4 2346 | reg_n); 2347 break; 2348 case PPI3NC: 2349 if (cond) 2350 { 2351 opcode++; 2352 goto try_another_opcode; 2353 } 2354 /* Fall through. */ 2355 case PPI3: 2356 if (field_b) 2357 as_bad (_("multiple parallel processing specifications")); 2358 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2359 + (reg_x << 6) + (reg_y << 4) + reg_n); 2360 switch (opcode->nibbles[4]) 2361 { 2362 case HEX_0: 2363 case HEX_XX00: 2364 case HEX_00YY: 2365 break; 2366 case HEX_1: 2367 case HEX_4: 2368 field_b += opcode->nibbles[4] << 4; 2369 break; 2370 default: 2371 abort (); 2372 } 2373 break; 2374 case PDC: 2375 if (cond) 2376 as_bad (_("multiple condition specifications")); 2377 cond = opcode->nibbles[2] << 8; 2378 if (*op_end) 2379 goto skip_cond_check; 2380 break; 2381 case PPIC: 2382 if (field_b) 2383 as_bad (_("multiple parallel processing specifications")); 2384 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2385 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2386 cond = 0; 2387 switch (opcode->nibbles[4]) 2388 { 2389 case HEX_0: 2390 case HEX_XX00: 2391 case HEX_00YY: 2392 break; 2393 case HEX_1: 2394 case HEX_4: 2395 field_b += opcode->nibbles[4] << 4; 2396 break; 2397 default: 2398 abort (); 2399 } 2400 break; 2401 case PMUL: 2402 if (field_b) 2403 { 2404 if ((field_b & 0xef00) == 0xa100) 2405 field_b -= 0x8100; 2406 /* pclr Dz pmuls Se,Sf,Dg */ 2407 else if ((field_b & 0xff00) == 0x8d00 2408 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2409 { 2410 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2411 field_b -= 0x8cf0; 2412 } 2413 else 2414 as_bad (_("insn cannot be combined with pmuls")); 2415 switch (field_b & 0xf) 2416 { 2417 case A_X0_NUM: 2418 field_b += 0 - A_X0_NUM; 2419 break; 2420 case A_Y0_NUM: 2421 field_b += 1 - A_Y0_NUM; 2422 break; 2423 case A_A0_NUM: 2424 field_b += 2 - A_A0_NUM; 2425 break; 2426 case A_A1_NUM: 2427 field_b += 3 - A_A1_NUM; 2428 break; 2429 default: 2430 as_bad (_("bad combined pmuls output operand")); 2431 } 2432 /* Generate warning if the destination register for padd / psub 2433 and pmuls is the same ( only for A0 or A1 ). 2434 If the last nibble is 1010 then A0 is used in both 2435 padd / psub and pmuls. If it is 1111 then A1 is used 2436 as destination register in both padd / psub and pmuls. */ 2437 2438 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2439 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2440 as_warn (_("destination register is same for parallel insns")); 2441 } 2442 field_b += 0x4000 + reg_efg; 2443 break; 2444 default: 2445 abort (); 2446 } 2447 if (cond) 2448 { 2449 as_bad (_("condition not followed by conditionalizable insn")); 2450 cond = 0; 2451 } 2452 if (! *op_end) 2453 break; 2454 skip_cond_check: 2455 opcode = find_cooked_opcode (&op_end); 2456 if (opcode == NULL) 2457 { 2458 (as_bad 2459 (_("unrecognized characters at end of parallel processing insn"))); 2460 break; 2461 } 2462 } 2463 2464 move_code = movx | movy; 2465 if (field_b) 2466 { 2467 /* Parallel processing insn. */ 2468 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2469 2470 output = frag_more (4); 2471 size = 4; 2472 if (! target_big_endian) 2473 { 2474 output[3] = ppi_code >> 8; 2475 output[2] = ppi_code; 2476 } 2477 else 2478 { 2479 output[2] = ppi_code >> 8; 2480 output[3] = ppi_code; 2481 } 2482 move_code |= 0xf800; 2483 } 2484 else 2485 { 2486 /* Just a double data transfer. */ 2487 output = frag_more (2); 2488 size = 2; 2489 } 2490 if (! target_big_endian) 2491 { 2492 output[1] = move_code >> 8; 2493 output[0] = move_code; 2494 } 2495 else 2496 { 2497 output[0] = move_code >> 8; 2498 output[1] = move_code; 2499 } 2500 return size; 2501 } 2502 2503 /* This is the guts of the machine-dependent assembler. STR points to a 2504 machine dependent instruction. This function is supposed to emit 2505 the frags/bytes it assembles to. */ 2506 2507 void 2508 md_assemble (char *str) 2509 { 2510 char *op_end; 2511 sh_operand_info operand[3]; 2512 sh_opcode_info *opcode; 2513 unsigned int size = 0; 2514 char *initial_str = str; 2515 2516 opcode = find_cooked_opcode (&str); 2517 op_end = str; 2518 2519 if (opcode == NULL) 2520 { 2521 /* The opcode is not in the hash table. 2522 This means we definitely have an assembly failure, 2523 but the instruction may be valid in another CPU variant. 2524 In this case emit something better than 'unknown opcode'. 2525 Search the full table in sh-opc.h to check. */ 2526 2527 char *name = initial_str; 2528 int name_length = 0; 2529 const sh_opcode_info *op; 2530 bfd_boolean found = FALSE; 2531 2532 /* Identify opcode in string. */ 2533 while (ISSPACE (*name)) 2534 name++; 2535 2536 while (name[name_length] != '\0' && !ISSPACE (name[name_length])) 2537 name_length++; 2538 2539 /* Search for opcode in full list. */ 2540 for (op = sh_table; op->name; op++) 2541 { 2542 if (strncasecmp (op->name, name, name_length) == 0 2543 && op->name[name_length] == '\0') 2544 { 2545 found = TRUE; 2546 break; 2547 } 2548 } 2549 2550 if (found) 2551 as_bad (_("opcode not valid for this cpu variant")); 2552 else 2553 as_bad (_("unknown opcode")); 2554 2555 return; 2556 } 2557 2558 if (sh_relax 2559 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2560 { 2561 /* Output a CODE reloc to tell the linker that the following 2562 bytes are instructions, not data. */ 2563 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2564 BFD_RELOC_SH_CODE); 2565 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2566 } 2567 2568 if (opcode->nibbles[0] == PPI) 2569 { 2570 size = assemble_ppi (op_end, opcode); 2571 } 2572 else 2573 { 2574 if (opcode->arg[0] == A_BDISP12 2575 || opcode->arg[0] == A_BDISP8) 2576 { 2577 /* Since we skip get_specific here, we have to check & update 2578 valid_arch now. */ 2579 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2580 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 2581 else 2582 as_bad (_("Delayed branches not available on SH1")); 2583 parse_exp (op_end + 1, &operand[0]); 2584 build_relax (opcode, &operand[0]); 2585 2586 /* All branches are currently 16 bit. */ 2587 size = 2; 2588 } 2589 else 2590 { 2591 if (opcode->arg[0] == A_END) 2592 { 2593 /* Ignore trailing whitespace. If there is any, it has already 2594 been compressed to a single space. */ 2595 if (*op_end == ' ') 2596 op_end++; 2597 } 2598 else 2599 { 2600 op_end = get_operands (opcode, op_end, operand); 2601 } 2602 opcode = get_specific (opcode, operand); 2603 2604 if (opcode == 0) 2605 { 2606 /* Couldn't find an opcode which matched the operands. */ 2607 char *where = frag_more (2); 2608 size = 2; 2609 2610 where[0] = 0x0; 2611 where[1] = 0x0; 2612 as_bad (_("invalid operands for opcode")); 2613 } 2614 else 2615 { 2616 if (*op_end) 2617 as_bad (_("excess operands: '%s'"), op_end); 2618 2619 size = build_Mytes (opcode, operand); 2620 } 2621 } 2622 } 2623 2624 dwarf2_emit_insn (size); 2625 } 2626 2627 /* This routine is called each time a label definition is seen. It 2628 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 2629 2630 void 2631 sh_frob_label (symbolS *sym) 2632 { 2633 static fragS *last_label_frag; 2634 static int last_label_offset; 2635 2636 if (sh_relax 2637 && seg_info (now_seg)->tc_segment_info_data.in_code) 2638 { 2639 int offset; 2640 2641 offset = frag_now_fix (); 2642 if (frag_now != last_label_frag 2643 || offset != last_label_offset) 2644 { 2645 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 2646 last_label_frag = frag_now; 2647 last_label_offset = offset; 2648 } 2649 } 2650 2651 dwarf2_emit_label (sym); 2652 } 2653 2654 /* This routine is called when the assembler is about to output some 2655 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 2656 2657 void 2658 sh_flush_pending_output (void) 2659 { 2660 if (sh_relax 2661 && seg_info (now_seg)->tc_segment_info_data.in_code) 2662 { 2663 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2664 BFD_RELOC_SH_DATA); 2665 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 2666 } 2667 } 2668 2669 symbolS * 2670 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 2671 { 2672 return 0; 2673 } 2674 2675 /* Various routines to kill one day. */ 2676 2677 const char * 2678 md_atof (int type, char *litP, int *sizeP) 2679 { 2680 return ieee_md_atof (type, litP, sizeP, target_big_endian); 2681 } 2682 2683 /* Handle the .uses pseudo-op. This pseudo-op is used just before a 2684 call instruction. It refers to a label of the instruction which 2685 loads the register which the call uses. We use it to generate a 2686 special reloc for the linker. */ 2687 2688 static void 2689 s_uses (int ignore ATTRIBUTE_UNUSED) 2690 { 2691 expressionS ex; 2692 2693 if (! sh_relax) 2694 as_warn (_(".uses pseudo-op seen when not relaxing")); 2695 2696 expression (&ex); 2697 2698 if (ex.X_op != O_symbol || ex.X_add_number != 0) 2699 { 2700 as_bad (_("bad .uses format")); 2701 ignore_rest_of_line (); 2702 return; 2703 } 2704 2705 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 2706 2707 demand_empty_rest_of_line (); 2708 } 2709 2710 enum options 2712 { 2713 OPTION_RELAX = OPTION_MD_BASE, 2714 OPTION_BIG, 2715 OPTION_LITTLE, 2716 OPTION_SMALL, 2717 OPTION_DSP, 2718 OPTION_ISA, 2719 OPTION_RENESAS, 2720 OPTION_ALLOW_REG_PREFIX, 2721 OPTION_H_TICK_HEX, 2722 #ifdef OBJ_ELF 2723 OPTION_FDPIC, 2724 #endif 2725 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 2726 }; 2727 2728 const char *md_shortopts = ""; 2729 struct option md_longopts[] = 2730 { 2731 {"relax", no_argument, NULL, OPTION_RELAX}, 2732 {"big", no_argument, NULL, OPTION_BIG}, 2733 {"little", no_argument, NULL, OPTION_LITTLE}, 2734 /* The next two switches are here because the 2735 generic parts of the linker testsuite uses them. */ 2736 {"EB", no_argument, NULL, OPTION_BIG}, 2737 {"EL", no_argument, NULL, OPTION_LITTLE}, 2738 {"small", no_argument, NULL, OPTION_SMALL}, 2739 {"dsp", no_argument, NULL, OPTION_DSP}, 2740 {"isa", required_argument, NULL, OPTION_ISA}, 2741 {"renesas", no_argument, NULL, OPTION_RENESAS}, 2742 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 2743 2744 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, 2745 2746 #ifdef OBJ_ELF 2747 {"fdpic", no_argument, NULL, OPTION_FDPIC}, 2748 #endif 2749 2750 {NULL, no_argument, NULL, 0} 2751 }; 2752 size_t md_longopts_size = sizeof (md_longopts); 2753 2754 int 2755 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 2756 { 2757 switch (c) 2758 { 2759 case OPTION_RELAX: 2760 sh_relax = 1; 2761 break; 2762 2763 case OPTION_BIG: 2764 target_big_endian = 1; 2765 break; 2766 2767 case OPTION_LITTLE: 2768 target_big_endian = 0; 2769 break; 2770 2771 case OPTION_SMALL: 2772 sh_small = 1; 2773 break; 2774 2775 case OPTION_DSP: 2776 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2777 break; 2778 2779 case OPTION_RENESAS: 2780 dont_adjust_reloc_32 = 1; 2781 break; 2782 2783 case OPTION_ALLOW_REG_PREFIX: 2784 allow_dollar_register_prefix = 1; 2785 break; 2786 2787 case OPTION_ISA: 2788 if (strcasecmp (arg, "dsp") == 0) 2789 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2790 else if (strcasecmp (arg, "fp") == 0) 2791 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 2792 else if (strcasecmp (arg, "any") == 0) 2793 preset_target_arch = arch_sh_up; 2794 else 2795 { 2796 extern const bfd_arch_info_type bfd_sh_arch; 2797 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2798 2799 preset_target_arch = 0; 2800 for (; bfd_arch; bfd_arch=bfd_arch->next) 2801 { 2802 int len = strlen(bfd_arch->printable_name); 2803 2804 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 2805 continue; 2806 2807 if (arg[len] == '\0') 2808 preset_target_arch = 2809 sh_get_arch_from_bfd_mach (bfd_arch->mach); 2810 else if (strcasecmp(&arg[len], "-up") == 0) 2811 preset_target_arch = 2812 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 2813 else 2814 continue; 2815 break; 2816 } 2817 2818 if (!preset_target_arch) 2819 as_bad (_("Invalid argument to --isa option: %s"), arg); 2820 } 2821 break; 2822 2823 case OPTION_H_TICK_HEX: 2824 enable_h_tick_hex = 1; 2825 break; 2826 2827 #ifdef OBJ_ELF 2828 case OPTION_FDPIC: 2829 sh_fdpic = TRUE; 2830 break; 2831 #endif /* OBJ_ELF */ 2832 2833 default: 2834 return 0; 2835 } 2836 2837 return 1; 2838 } 2839 2840 void 2841 md_show_usage (FILE *stream) 2842 { 2843 fprintf (stream, _("\ 2844 SH options:\n\ 2845 --little generate little endian code\n\ 2846 --big generate big endian code\n\ 2847 --relax alter jump instructions for long displacements\n\ 2848 --renesas disable optimization with section symbol for\n\ 2849 compatibility with Renesas assembler.\n\ 2850 --small align sections to 4 byte boundaries, not 16\n\ 2851 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 2852 --allow-reg-prefix allow '$' as a register name prefix.\n\ 2853 --isa=[any use most appropriate isa\n\ 2854 | dsp same as '-dsp'\n\ 2855 | fp")); 2856 { 2857 extern const bfd_arch_info_type bfd_sh_arch; 2858 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2859 2860 for (; bfd_arch; bfd_arch=bfd_arch->next) 2861 { 2862 fprintf (stream, "\n | %s", bfd_arch->printable_name); 2863 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 2864 } 2865 } 2866 fprintf (stream, "]\n"); 2867 #ifdef OBJ_ELF 2868 fprintf (stream, _("\ 2869 --fdpic generate an FDPIC object file\n")); 2870 #endif /* OBJ_ELF */ 2871 } 2872 2873 /* This struct is used to pass arguments to sh_count_relocs through 2875 bfd_map_over_sections. */ 2876 2877 struct sh_count_relocs 2878 { 2879 /* Symbol we are looking for. */ 2880 symbolS *sym; 2881 /* Count of relocs found. */ 2882 int count; 2883 }; 2884 2885 /* Count the number of fixups in a section which refer to a particular 2886 symbol. This is called via bfd_map_over_sections. */ 2887 2888 static void 2889 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 2890 { 2891 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 2892 segment_info_type *seginfo; 2893 symbolS *sym; 2894 fixS *fix; 2895 2896 seginfo = seg_info (sec); 2897 if (seginfo == NULL) 2898 return; 2899 2900 sym = info->sym; 2901 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2902 { 2903 if (fix->fx_addsy == sym) 2904 { 2905 ++info->count; 2906 fix->fx_tcbit = 1; 2907 } 2908 } 2909 } 2910 2911 /* Handle the count relocs for a particular section. 2912 This is called via bfd_map_over_sections. */ 2913 2914 static void 2915 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 2916 void *ignore ATTRIBUTE_UNUSED) 2917 { 2918 segment_info_type *seginfo; 2919 fixS *fix; 2920 2921 seginfo = seg_info (sec); 2922 if (seginfo == NULL) 2923 return; 2924 2925 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2926 { 2927 symbolS *sym; 2928 bfd_vma val; 2929 fixS *fscan; 2930 struct sh_count_relocs info; 2931 2932 if (fix->fx_r_type != BFD_RELOC_SH_USES) 2933 continue; 2934 2935 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 2936 symbol in the same section. */ 2937 sym = fix->fx_addsy; 2938 if (sym == NULL 2939 || fix->fx_subsy != NULL 2940 || fix->fx_addnumber != 0 2941 || S_GET_SEGMENT (sym) != sec 2942 || S_IS_EXTERNAL (sym)) 2943 { 2944 as_warn_where (fix->fx_file, fix->fx_line, 2945 _(".uses does not refer to a local symbol in the same section")); 2946 continue; 2947 } 2948 2949 /* Look through the fixups again, this time looking for one 2950 at the same location as sym. */ 2951 val = S_GET_VALUE (sym); 2952 for (fscan = seginfo->fix_root; 2953 fscan != NULL; 2954 fscan = fscan->fx_next) 2955 if (val == fscan->fx_frag->fr_address + fscan->fx_where 2956 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 2957 && fscan->fx_r_type != BFD_RELOC_SH_CODE 2958 && fscan->fx_r_type != BFD_RELOC_SH_DATA 2959 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 2960 break; 2961 if (fscan == NULL) 2962 { 2963 as_warn_where (fix->fx_file, fix->fx_line, 2964 _("can't find fixup pointed to by .uses")); 2965 continue; 2966 } 2967 2968 if (fscan->fx_tcbit) 2969 { 2970 /* We've already done this one. */ 2971 continue; 2972 } 2973 2974 /* The variable fscan should also be a fixup to a local symbol 2975 in the same section. */ 2976 sym = fscan->fx_addsy; 2977 if (sym == NULL 2978 || fscan->fx_subsy != NULL 2979 || fscan->fx_addnumber != 0 2980 || S_GET_SEGMENT (sym) != sec 2981 || S_IS_EXTERNAL (sym)) 2982 { 2983 as_warn_where (fix->fx_file, fix->fx_line, 2984 _(".uses target does not refer to a local symbol in the same section")); 2985 continue; 2986 } 2987 2988 /* Now we look through all the fixups of all the sections, 2989 counting the number of times we find a reference to sym. */ 2990 info.sym = sym; 2991 info.count = 0; 2992 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 2993 2994 if (info.count < 1) 2995 abort (); 2996 2997 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 2998 We have already adjusted the value of sym to include the 2999 fragment address, so we undo that adjustment here. */ 3000 subseg_change (sec, 0); 3001 fix_new (fscan->fx_frag, 3002 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3003 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3004 } 3005 } 3006 3007 /* This function is called after the symbol table has been completed, 3008 but before the relocs or section contents have been written out. 3009 If we have seen any .uses pseudo-ops, they point to an instruction 3010 which loads a register with the address of a function. We look 3011 through the fixups to find where the function address is being 3012 loaded from. We then generate a COUNT reloc giving the number of 3013 times that function address is referred to. The linker uses this 3014 information when doing relaxing, to decide when it can eliminate 3015 the stored function address entirely. */ 3016 3017 void 3018 sh_frob_file (void) 3019 { 3020 if (! sh_relax) 3021 return; 3022 3023 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3024 } 3025 3026 /* Called after relaxing. Set the correct sizes of the fragments, and 3027 create relocs so that md_apply_fix will fill in the correct values. */ 3028 3029 void 3030 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3031 { 3032 int donerelax = 0; 3033 3034 switch (fragP->fr_subtype) 3035 { 3036 case C (COND_JUMP, COND8): 3037 case C (COND_JUMP_DELAY, COND8): 3038 subseg_change (seg, 0); 3039 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3040 1, BFD_RELOC_SH_PCDISP8BY2); 3041 fragP->fr_fix += 2; 3042 fragP->fr_var = 0; 3043 break; 3044 3045 case C (UNCOND_JUMP, UNCOND12): 3046 subseg_change (seg, 0); 3047 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3048 1, BFD_RELOC_SH_PCDISP12BY2); 3049 fragP->fr_fix += 2; 3050 fragP->fr_var = 0; 3051 break; 3052 3053 case C (UNCOND_JUMP, UNCOND32): 3054 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3055 if (fragP->fr_symbol == NULL) 3056 as_bad_where (fragP->fr_file, fragP->fr_line, 3057 _("displacement overflows 12-bit field")); 3058 else if (S_IS_DEFINED (fragP->fr_symbol)) 3059 as_bad_where (fragP->fr_file, fragP->fr_line, 3060 _("displacement to defined symbol %s overflows 12-bit field"), 3061 S_GET_NAME (fragP->fr_symbol)); 3062 else 3063 as_bad_where (fragP->fr_file, fragP->fr_line, 3064 _("displacement to undefined symbol %s overflows 12-bit field"), 3065 S_GET_NAME (fragP->fr_symbol)); 3066 /* Stabilize this frag, so we don't trip an assert. */ 3067 fragP->fr_fix += fragP->fr_var; 3068 fragP->fr_var = 0; 3069 break; 3070 3071 case C (COND_JUMP, COND12): 3072 case C (COND_JUMP_DELAY, COND12): 3073 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3074 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3075 was due to gas incorrectly relaxing an out-of-range conditional 3076 branch with delay slot. It turned: 3077 bf.s L6 (slot mov.l r12,@(44,r0)) 3078 into: 3079 3080 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 3081 30: 00 09 nop 3082 32: 10 cb mov.l r12,@(44,r0) 3083 Therefore, branches with delay slots have to be handled 3084 differently from ones without delay slots. */ 3085 { 3086 unsigned char *buffer = 3087 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 3088 int highbyte = target_big_endian ? 0 : 1; 3089 int lowbyte = target_big_endian ? 1 : 0; 3090 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3091 3092 /* Toggle the true/false bit of the bcond. */ 3093 buffer[highbyte] ^= 0x2; 3094 3095 /* If this is a delayed branch, we may not put the bra in the 3096 slot. So we change it to a non-delayed branch, like that: 3097 b! cond slot_label; bra disp; slot_label: slot_insn 3098 ??? We should try if swapping the conditional branch and 3099 its delay-slot insn already makes the branch reach. */ 3100 3101 /* Build a relocation to six / four bytes farther on. */ 3102 subseg_change (seg, 0); 3103 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3104 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3105 1, BFD_RELOC_SH_PCDISP8BY2); 3106 3107 /* Set up a jump instruction. */ 3108 buffer[highbyte + 2] = 0xa0; 3109 buffer[lowbyte + 2] = 0; 3110 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3111 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3112 3113 if (delay) 3114 { 3115 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3116 fragP->fr_fix += 4; 3117 } 3118 else 3119 { 3120 /* Fill in a NOP instruction. */ 3121 buffer[highbyte + 4] = 0x0; 3122 buffer[lowbyte + 4] = 0x9; 3123 3124 fragP->fr_fix += 6; 3125 } 3126 fragP->fr_var = 0; 3127 donerelax = 1; 3128 } 3129 break; 3130 3131 case C (COND_JUMP, COND32): 3132 case C (COND_JUMP_DELAY, COND32): 3133 case C (COND_JUMP, UNDEF_WORD_DISP): 3134 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3135 if (fragP->fr_symbol == NULL) 3136 as_bad_where (fragP->fr_file, fragP->fr_line, 3137 _("displacement overflows 8-bit field")); 3138 else if (S_IS_DEFINED (fragP->fr_symbol)) 3139 as_bad_where (fragP->fr_file, fragP->fr_line, 3140 _("displacement to defined symbol %s overflows 8-bit field"), 3141 S_GET_NAME (fragP->fr_symbol)); 3142 else 3143 as_bad_where (fragP->fr_file, fragP->fr_line, 3144 _("displacement to undefined symbol %s overflows 8-bit field "), 3145 S_GET_NAME (fragP->fr_symbol)); 3146 /* Stabilize this frag, so we don't trip an assert. */ 3147 fragP->fr_fix += fragP->fr_var; 3148 fragP->fr_var = 0; 3149 break; 3150 3151 default: 3152 abort (); 3153 } 3154 3155 if (donerelax && !sh_relax) 3156 as_warn_where (fragP->fr_file, fragP->fr_line, 3157 _("overflow in branch to %s; converted into longer instruction sequence"), 3158 (fragP->fr_symbol != NULL 3159 ? S_GET_NAME (fragP->fr_symbol) 3160 : "")); 3161 } 3162 3163 valueT 3164 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3165 { 3166 #ifdef OBJ_ELF 3167 return size; 3168 #else /* ! OBJ_ELF */ 3169 return ((size + (1 << bfd_section_alignment (seg)) - 1) 3170 & -(1 << bfd_section_alignment (seg))); 3171 #endif /* ! OBJ_ELF */ 3172 } 3173 3174 /* This static variable is set by s_uacons to tell sh_cons_align that 3175 the expression does not need to be aligned. */ 3176 3177 static int sh_no_align_cons = 0; 3178 3179 /* This handles the unaligned space allocation pseudo-ops, such as 3180 .uaword. .uaword is just like .word, but the value does not need 3181 to be aligned. */ 3182 3183 static void 3184 s_uacons (int bytes) 3185 { 3186 /* Tell sh_cons_align not to align this value. */ 3187 sh_no_align_cons = 1; 3188 cons (bytes); 3189 } 3190 3191 /* If a .word, et. al., pseud-op is seen, warn if the value is not 3192 aligned correctly. Note that this can cause warnings to be issued 3193 when assembling initialized structured which were declared with the 3194 packed attribute. FIXME: Perhaps we should require an option to 3195 enable this warning? */ 3196 3197 void 3198 sh_cons_align (int nbytes) 3199 { 3200 int nalign; 3201 3202 if (sh_no_align_cons) 3203 { 3204 /* This is an unaligned pseudo-op. */ 3205 sh_no_align_cons = 0; 3206 return; 3207 } 3208 3209 nalign = 0; 3210 while ((nbytes & 1) == 0) 3211 { 3212 ++nalign; 3213 nbytes >>= 1; 3214 } 3215 3216 if (nalign == 0) 3217 return; 3218 3219 if (now_seg == absolute_section) 3220 { 3221 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3222 as_warn (_("misaligned data")); 3223 return; 3224 } 3225 3226 frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3227 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3228 3229 record_alignment (now_seg, nalign); 3230 } 3231 3232 /* When relaxing, we need to output a reloc for any .align directive 3233 that requests alignment to a four byte boundary or larger. This is 3234 also where we check for misaligned data. */ 3235 3236 void 3237 sh_handle_align (fragS *frag) 3238 { 3239 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3240 3241 if (frag->fr_type == rs_align_code) 3242 { 3243 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3244 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3245 3246 char *p = frag->fr_literal + frag->fr_fix; 3247 3248 if (bytes & 1) 3249 { 3250 *p++ = 0; 3251 bytes--; 3252 frag->fr_fix += 1; 3253 } 3254 3255 if (target_big_endian) 3256 { 3257 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3258 frag->fr_var = sizeof big_nop_pattern; 3259 } 3260 else 3261 { 3262 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3263 frag->fr_var = sizeof little_nop_pattern; 3264 } 3265 } 3266 else if (frag->fr_type == rs_align_test) 3267 { 3268 if (bytes != 0) 3269 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3270 } 3271 3272 if (sh_relax 3273 && (frag->fr_type == rs_align 3274 || frag->fr_type == rs_align_code) 3275 && frag->fr_address + frag->fr_fix > 0 3276 && frag->fr_offset > 1 3277 && now_seg != bss_section) 3278 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3279 BFD_RELOC_SH_ALIGN); 3280 } 3281 3282 /* See whether the relocation should be resolved locally. */ 3283 3284 static bfd_boolean 3285 sh_local_pcrel (fixS *fix) 3286 { 3287 return (! sh_relax 3288 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3289 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3290 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3291 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3292 || fix->fx_r_type == BFD_RELOC_8_PCREL 3293 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3294 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3295 } 3296 3297 /* See whether we need to force a relocation into the output file. 3298 This is used to force out switch and PC relative relocations when 3299 relaxing. */ 3300 3301 int 3302 sh_force_relocation (fixS *fix) 3303 { 3304 /* These relocations can't make it into a DSO, so no use forcing 3305 them for global symbols. */ 3306 if (sh_local_pcrel (fix)) 3307 return 0; 3308 3309 /* Make sure some relocations get emitted. */ 3310 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3311 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3312 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3313 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3314 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3315 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3316 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3317 || generic_force_reloc (fix)) 3318 return 1; 3319 3320 if (! sh_relax) 3321 return 0; 3322 3323 return (fix->fx_pcrel 3324 || SWITCH_TABLE (fix) 3325 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3326 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3327 || fix->fx_r_type == BFD_RELOC_SH_CODE 3328 || fix->fx_r_type == BFD_RELOC_SH_DATA 3329 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3330 } 3331 3332 #ifdef OBJ_ELF 3333 bfd_boolean 3334 sh_fix_adjustable (fixS *fixP) 3335 { 3336 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3337 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3338 || fixP->fx_r_type == BFD_RELOC_SH_GOT20 3339 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3340 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC 3341 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 3342 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC 3343 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 3344 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC 3345 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3346 || fixP->fx_r_type == BFD_RELOC_RVA) 3347 return 0; 3348 3349 /* We need the symbol name for the VTABLE entries */ 3350 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3351 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3352 return 0; 3353 3354 return 1; 3355 } 3356 3357 void 3358 sh_elf_final_processing (void) 3359 { 3360 int val; 3361 3362 /* Set file-specific flags to indicate if this code needs 3363 a processor with the sh-dsp / sh2e ISA to execute. */ 3364 val = sh_find_elf_flags (valid_arch); 3365 3366 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3367 elf_elfheader (stdoutput)->e_flags |= val; 3368 3369 if (sh_fdpic) 3370 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; 3371 } 3372 #endif 3373 3374 #ifdef TE_UCLINUX 3375 /* Return the target format for uClinux. */ 3376 3377 const char * 3378 sh_uclinux_target_format (void) 3379 { 3380 if (sh_fdpic) 3381 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); 3382 else 3383 return (!target_big_endian ? "elf32-shl" : "elf32-sh"); 3384 } 3385 #endif 3386 3387 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its 3388 assembly-time value. If we're generating a reloc for FIXP, 3389 see whether the addend should be stored in-place or whether 3390 it should be in an ELF r_addend field. */ 3391 3392 static void 3393 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) 3394 { 3395 reloc_howto_type *howto; 3396 3397 if (fixP->fx_addsy != NULL || fixP->fx_pcrel) 3398 { 3399 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 3400 if (howto && !howto->partial_inplace) 3401 { 3402 fixP->fx_addnumber = val; 3403 return; 3404 } 3405 } 3406 md_number_to_chars (buf, val, size); 3407 } 3408 3409 /* Apply a fixup to the object file. */ 3410 3411 void 3412 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3413 { 3414 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3415 int lowbyte = target_big_endian ? 1 : 0; 3416 int highbyte = target_big_endian ? 0 : 1; 3417 long val = (long) *valP; 3418 long max, min; 3419 int shift; 3420 3421 /* A difference between two symbols, the second of which is in the 3422 current section, is transformed in a PC-relative relocation to 3423 the other symbol. We have to adjust the relocation type here. */ 3424 if (fixP->fx_pcrel) 3425 { 3426 switch (fixP->fx_r_type) 3427 { 3428 default: 3429 break; 3430 3431 case BFD_RELOC_32: 3432 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3433 break; 3434 3435 /* Currently, we only support 32-bit PCREL relocations. 3436 We'd need a new reloc type to handle 16_PCREL, and 3437 8_PCREL is already taken for R_SH_SWITCH8, which 3438 apparently does something completely different than what 3439 we need. FIXME. */ 3440 case BFD_RELOC_16: 3441 bfd_set_error (bfd_error_bad_value); 3442 return; 3443 3444 case BFD_RELOC_8: 3445 bfd_set_error (bfd_error_bad_value); 3446 return; 3447 } 3448 } 3449 3450 /* The function adjust_reloc_syms won't convert a reloc against a weak 3451 symbol into a reloc against a section, but bfd_install_relocation 3452 will screw up if the symbol is defined, so we have to adjust val here 3453 to avoid the screw up later. 3454 3455 For ordinary relocs, this does not happen for ELF, since for ELF, 3456 bfd_install_relocation uses the "special function" field of the 3457 howto, and does not execute the code that needs to be undone, as long 3458 as the special function does not return bfd_reloc_continue. 3459 It can happen for GOT- and PLT-type relocs the way they are 3460 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 3461 doesn't matter here since those relocs don't use VAL; see below. */ 3462 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 3463 && fixP->fx_addsy != NULL 3464 && S_IS_WEAK (fixP->fx_addsy)) 3465 val -= S_GET_VALUE (fixP->fx_addsy); 3466 3467 if (SWITCH_TABLE (fixP)) 3468 val -= S_GET_VALUE (fixP->fx_subsy); 3469 3470 max = min = 0; 3471 shift = 0; 3472 switch (fixP->fx_r_type) 3473 { 3474 case BFD_RELOC_SH_IMM3: 3475 max = 0x7; 3476 * buf = (* buf & 0xf8) | (val & 0x7); 3477 break; 3478 case BFD_RELOC_SH_IMM3U: 3479 max = 0x7; 3480 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 3481 break; 3482 case BFD_RELOC_SH_DISP12: 3483 max = 0xfff; 3484 buf[lowbyte] = val & 0xff; 3485 buf[highbyte] |= (val >> 8) & 0x0f; 3486 break; 3487 case BFD_RELOC_SH_DISP12BY2: 3488 max = 0xfff; 3489 shift = 1; 3490 buf[lowbyte] = (val >> 1) & 0xff; 3491 buf[highbyte] |= (val >> 9) & 0x0f; 3492 break; 3493 case BFD_RELOC_SH_DISP12BY4: 3494 max = 0xfff; 3495 shift = 2; 3496 buf[lowbyte] = (val >> 2) & 0xff; 3497 buf[highbyte] |= (val >> 10) & 0x0f; 3498 break; 3499 case BFD_RELOC_SH_DISP12BY8: 3500 max = 0xfff; 3501 shift = 3; 3502 buf[lowbyte] = (val >> 3) & 0xff; 3503 buf[highbyte] |= (val >> 11) & 0x0f; 3504 break; 3505 case BFD_RELOC_SH_DISP20: 3506 if (! target_big_endian) 3507 abort(); 3508 max = 0x7ffff; 3509 min = -0x80000; 3510 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 3511 buf[2] = (val >> 8) & 0xff; 3512 buf[3] = val & 0xff; 3513 break; 3514 case BFD_RELOC_SH_DISP20BY8: 3515 if (!target_big_endian) 3516 abort(); 3517 max = 0x7ffff; 3518 min = -0x80000; 3519 shift = 8; 3520 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 3521 buf[2] = (val >> 16) & 0xff; 3522 buf[3] = (val >> 8) & 0xff; 3523 break; 3524 3525 case BFD_RELOC_SH_IMM4: 3526 max = 0xf; 3527 *buf = (*buf & 0xf0) | (val & 0xf); 3528 break; 3529 3530 case BFD_RELOC_SH_IMM4BY2: 3531 max = 0xf; 3532 shift = 1; 3533 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 3534 break; 3535 3536 case BFD_RELOC_SH_IMM4BY4: 3537 max = 0xf; 3538 shift = 2; 3539 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 3540 break; 3541 3542 case BFD_RELOC_SH_IMM8BY2: 3543 max = 0xff; 3544 shift = 1; 3545 *buf = val >> 1; 3546 break; 3547 3548 case BFD_RELOC_SH_IMM8BY4: 3549 max = 0xff; 3550 shift = 2; 3551 *buf = val >> 2; 3552 break; 3553 3554 case BFD_RELOC_8: 3555 case BFD_RELOC_SH_IMM8: 3556 /* Sometimes the 8 bit value is sign extended (e.g., add) and 3557 sometimes it is not (e.g., and). We permit any 8 bit value. 3558 Note that adding further restrictions may invalidate 3559 reasonable looking assembly code, such as ``and -0x1,r0''. */ 3560 max = 0xff; 3561 min = -0xff; 3562 *buf++ = val; 3563 break; 3564 3565 case BFD_RELOC_SH_PCRELIMM8BY4: 3566 /* If we are dealing with a known destination ... */ 3567 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) 3568 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) 3569 { 3570 /* Don't silently move the destination due to misalignment. 3571 The absolute address is the fragment base plus the offset into 3572 the fragment plus the pc relative offset to the label. */ 3573 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) 3574 as_bad_where (fixP->fx_file, fixP->fx_line, 3575 _("offset to unaligned destination")); 3576 3577 /* The displacement cannot be zero or backward even if aligned. 3578 Allow -2 because val has already been adjusted somewhere. */ 3579 if (val < -2) 3580 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); 3581 } 3582 3583 /* The lower two bits of the PC are cleared before the 3584 displacement is added in. We can assume that the destination 3585 is on a 4 byte boundary. If this instruction is also on a 4 3586 byte boundary, then we want 3587 (target - here) / 4 3588 and target - here is a multiple of 4. 3589 Otherwise, we are on a 2 byte boundary, and we want 3590 (target - (here - 2)) / 4 3591 and target - here is not a multiple of 4. Computing 3592 (target - (here - 2)) / 4 == (target - here + 2) / 4 3593 works for both cases, since in the first case the addition of 3594 2 will be removed by the division. target - here is in the 3595 variable val. */ 3596 val = (val + 2) / 4; 3597 if (val & ~0xff) 3598 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3599 buf[lowbyte] = val; 3600 break; 3601 3602 case BFD_RELOC_SH_PCRELIMM8BY2: 3603 val /= 2; 3604 if (val & ~0xff) 3605 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3606 buf[lowbyte] = val; 3607 break; 3608 3609 case BFD_RELOC_SH_PCDISP8BY2: 3610 val /= 2; 3611 if (val < -0x80 || val > 0x7f) 3612 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3613 buf[lowbyte] = val; 3614 break; 3615 3616 case BFD_RELOC_SH_PCDISP12BY2: 3617 val /= 2; 3618 if (val < -0x800 || val > 0x7ff) 3619 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3620 buf[lowbyte] = val & 0xff; 3621 buf[highbyte] |= (val >> 8) & 0xf; 3622 break; 3623 3624 case BFD_RELOC_32: 3625 case BFD_RELOC_32_PCREL: 3626 apply_full_field_fix (fixP, buf, val, 4); 3627 break; 3628 3629 case BFD_RELOC_16: 3630 apply_full_field_fix (fixP, buf, val, 2); 3631 break; 3632 3633 case BFD_RELOC_SH_USES: 3634 /* Pass the value into sh_reloc(). */ 3635 fixP->fx_addnumber = val; 3636 break; 3637 3638 case BFD_RELOC_SH_COUNT: 3639 case BFD_RELOC_SH_ALIGN: 3640 case BFD_RELOC_SH_CODE: 3641 case BFD_RELOC_SH_DATA: 3642 case BFD_RELOC_SH_LABEL: 3643 /* Nothing to do here. */ 3644 break; 3645 3646 case BFD_RELOC_SH_LOOP_START: 3647 case BFD_RELOC_SH_LOOP_END: 3648 3649 case BFD_RELOC_VTABLE_INHERIT: 3650 case BFD_RELOC_VTABLE_ENTRY: 3651 fixP->fx_done = 0; 3652 return; 3653 3654 #ifdef OBJ_ELF 3655 case BFD_RELOC_32_PLT_PCREL: 3656 /* Make the jump instruction point to the address of the operand. At 3657 runtime we merely add the offset to the actual PLT entry. */ 3658 * valP = 0xfffffffc; 3659 val = fixP->fx_offset; 3660 if (fixP->fx_subsy) 3661 val -= S_GET_VALUE (fixP->fx_subsy); 3662 apply_full_field_fix (fixP, buf, val, 4); 3663 break; 3664 3665 case BFD_RELOC_SH_GOTPC: 3666 /* This is tough to explain. We end up with this one if we have 3667 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 3668 The goal here is to obtain the absolute address of the GOT, 3669 and it is strongly preferable from a performance point of 3670 view to avoid using a runtime relocation for this. There are 3671 cases where you have something like: 3672 3673 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 3674 3675 and here no correction would be required. Internally in the 3676 assembler we treat operands of this form as not being pcrel 3677 since the '.' is explicitly mentioned, and I wonder whether 3678 it would simplify matters to do it this way. Who knows. In 3679 earlier versions of the PIC patches, the pcrel_adjust field 3680 was used to store the correction, but since the expression is 3681 not pcrel, I felt it would be confusing to do it this way. */ 3682 * valP -= 1; 3683 apply_full_field_fix (fixP, buf, val, 4); 3684 break; 3685 3686 case BFD_RELOC_SH_TLS_GD_32: 3687 case BFD_RELOC_SH_TLS_LD_32: 3688 case BFD_RELOC_SH_TLS_IE_32: 3689 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3690 /* Fallthrough */ 3691 case BFD_RELOC_32_GOT_PCREL: 3692 case BFD_RELOC_SH_GOT20: 3693 case BFD_RELOC_SH_GOTPLT32: 3694 case BFD_RELOC_SH_GOTFUNCDESC: 3695 case BFD_RELOC_SH_GOTFUNCDESC20: 3696 case BFD_RELOC_SH_GOTOFFFUNCDESC: 3697 case BFD_RELOC_SH_GOTOFFFUNCDESC20: 3698 case BFD_RELOC_SH_FUNCDESC: 3699 * valP = 0; /* Fully resolved at runtime. No addend. */ 3700 apply_full_field_fix (fixP, buf, 0, 4); 3701 break; 3702 3703 case BFD_RELOC_SH_TLS_LDO_32: 3704 case BFD_RELOC_SH_TLS_LE_32: 3705 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3706 /* Fallthrough */ 3707 case BFD_RELOC_32_GOTOFF: 3708 case BFD_RELOC_SH_GOTOFF20: 3709 apply_full_field_fix (fixP, buf, val, 4); 3710 break; 3711 #endif 3712 3713 default: 3714 abort (); 3715 } 3716 3717 if (shift != 0) 3718 { 3719 if ((val & ((1 << shift) - 1)) != 0) 3720 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 3721 if (val >= 0) 3722 val >>= shift; 3723 else 3724 val = ((val >> shift) 3725 | ((long) -1 & ~ ((long) -1 >> shift))); 3726 } 3727 3728 /* Extend sign for 64-bit host. */ 3729 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; 3730 if (max != 0 && (val < min || val > max)) 3731 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 3732 else if (max != 0) 3733 /* Stop the generic code from trying to overflow check the value as well. 3734 It may not have the correct value anyway, as we do not store val back 3735 into *valP. */ 3736 fixP->fx_no_overflow = 1; 3737 3738 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 3739 fixP->fx_done = 1; 3740 } 3741 3742 /* Called just before address relaxation. Return the length 3743 by which a fragment must grow to reach it's destination. */ 3744 3745 int 3746 md_estimate_size_before_relax (fragS *fragP, segT segment_type) 3747 { 3748 int what; 3749 3750 switch (fragP->fr_subtype) 3751 { 3752 default: 3753 abort (); 3754 3755 case C (UNCOND_JUMP, UNDEF_DISP): 3756 /* Used to be a branch to somewhere which was unknown. */ 3757 if (!fragP->fr_symbol) 3758 { 3759 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3760 } 3761 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3762 { 3763 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3764 } 3765 else 3766 { 3767 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 3768 } 3769 break; 3770 3771 case C (COND_JUMP, UNDEF_DISP): 3772 case C (COND_JUMP_DELAY, UNDEF_DISP): 3773 what = GET_WHAT (fragP->fr_subtype); 3774 /* Used to be a branch to somewhere which was unknown. */ 3775 if (fragP->fr_symbol 3776 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3777 { 3778 /* Got a symbol and it's defined in this segment, become byte 3779 sized - maybe it will fix up. */ 3780 fragP->fr_subtype = C (what, COND8); 3781 } 3782 else if (fragP->fr_symbol) 3783 { 3784 /* It's got a segment, but it's not ours, so it will always be long. */ 3785 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 3786 } 3787 else 3788 { 3789 /* We know the abs value. */ 3790 fragP->fr_subtype = C (what, COND8); 3791 } 3792 break; 3793 3794 case C (UNCOND_JUMP, UNCOND12): 3795 case C (UNCOND_JUMP, UNCOND32): 3796 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3797 case C (COND_JUMP, COND8): 3798 case C (COND_JUMP, COND12): 3799 case C (COND_JUMP, COND32): 3800 case C (COND_JUMP, UNDEF_WORD_DISP): 3801 case C (COND_JUMP_DELAY, COND8): 3802 case C (COND_JUMP_DELAY, COND12): 3803 case C (COND_JUMP_DELAY, COND32): 3804 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3805 /* When relaxing a section for the second time, we don't need to 3806 do anything besides return the current size. */ 3807 break; 3808 } 3809 3810 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 3811 return fragP->fr_var; 3812 } 3813 3814 /* Put number into target byte order. */ 3815 3816 void 3817 md_number_to_chars (char *ptr, valueT use, int nbytes) 3818 { 3819 if (! target_big_endian) 3820 number_to_chars_littleendian (ptr, use, nbytes); 3821 else 3822 number_to_chars_bigendian (ptr, use, nbytes); 3823 } 3824 3825 /* This version is used in obj-coff.c eg. for the sh-hms target. */ 3826 3827 long 3828 md_pcrel_from (fixS *fixP) 3829 { 3830 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 3831 } 3832 3833 long 3834 md_pcrel_from_section (fixS *fixP, segT sec) 3835 { 3836 if (! sh_local_pcrel (fixP) 3837 && fixP->fx_addsy != (symbolS *) NULL 3838 && (generic_force_reloc (fixP) 3839 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 3840 { 3841 /* The symbol is undefined (or is defined but not in this section, 3842 or we're not sure about it being the final definition). Let the 3843 linker figure it out. We need to adjust the subtraction of a 3844 symbol to the position of the relocated data, though. */ 3845 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 3846 } 3847 3848 return md_pcrel_from (fixP); 3849 } 3850 3851 /* Create a reloc. */ 3852 3853 arelent * 3854 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 3855 { 3856 arelent *rel; 3857 bfd_reloc_code_real_type r_type; 3858 3859 rel = XNEW (arelent); 3860 rel->sym_ptr_ptr = XNEW (asymbol *); 3861 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 3862 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 3863 3864 r_type = fixp->fx_r_type; 3865 3866 if (SWITCH_TABLE (fixp)) 3867 { 3868 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 3869 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); 3870 if (r_type == BFD_RELOC_16) 3871 r_type = BFD_RELOC_SH_SWITCH16; 3872 else if (r_type == BFD_RELOC_8) 3873 r_type = BFD_RELOC_8_PCREL; 3874 else if (r_type == BFD_RELOC_32) 3875 r_type = BFD_RELOC_SH_SWITCH32; 3876 else 3877 abort (); 3878 } 3879 else if (r_type == BFD_RELOC_SH_USES) 3880 rel->addend = fixp->fx_addnumber; 3881 else if (r_type == BFD_RELOC_SH_COUNT) 3882 rel->addend = fixp->fx_offset; 3883 else if (r_type == BFD_RELOC_SH_ALIGN) 3884 rel->addend = fixp->fx_offset; 3885 else if (r_type == BFD_RELOC_VTABLE_INHERIT 3886 || r_type == BFD_RELOC_VTABLE_ENTRY) 3887 rel->addend = fixp->fx_offset; 3888 else if (r_type == BFD_RELOC_SH_LOOP_START 3889 || r_type == BFD_RELOC_SH_LOOP_END) 3890 rel->addend = fixp->fx_offset; 3891 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 3892 { 3893 rel->addend = 0; 3894 rel->address = rel->addend = fixp->fx_offset; 3895 } 3896 else 3897 rel->addend = fixp->fx_addnumber; 3898 3899 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 3900 3901 if (rel->howto == NULL) 3902 { 3903 as_bad_where (fixp->fx_file, fixp->fx_line, 3904 _("Cannot represent relocation type %s"), 3905 bfd_get_reloc_code_name (r_type)); 3906 /* Set howto to a garbage value so that we can keep going. */ 3907 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 3908 gas_assert (rel->howto != NULL); 3909 } 3910 #ifdef OBJ_ELF 3911 else if (rel->howto->type == R_SH_IND12W) 3912 rel->addend += fixp->fx_offset - 4; 3913 #endif 3914 3915 return rel; 3916 } 3917 3918 #ifdef OBJ_ELF 3919 inline static char * 3920 sh_end_of_match (char *cont, const char *what) 3921 { 3922 int len = strlen (what); 3923 3924 if (strncasecmp (cont, what, strlen (what)) == 0 3925 && ! is_part_of_name (cont[len])) 3926 return cont + len; 3927 3928 return NULL; 3929 } 3930 3931 int 3932 sh_parse_name (char const *name, 3933 expressionS *exprP, 3934 enum expr_mode mode, 3935 char *nextcharP) 3936 { 3937 char *next = input_line_pointer; 3938 char *next_end; 3939 int reloc_type; 3940 segT segment; 3941 3942 exprP->X_op_symbol = NULL; 3943 3944 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 3945 { 3946 if (! GOT_symbol) 3947 GOT_symbol = symbol_find_or_make (name); 3948 3949 exprP->X_add_symbol = GOT_symbol; 3950 no_suffix: 3951 /* If we have an absolute symbol or a reg, then we know its 3952 value now. */ 3953 segment = S_GET_SEGMENT (exprP->X_add_symbol); 3954 if (mode != expr_defer && segment == absolute_section) 3955 { 3956 exprP->X_op = O_constant; 3957 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3958 exprP->X_add_symbol = NULL; 3959 } 3960 else if (mode != expr_defer && segment == reg_section) 3961 { 3962 exprP->X_op = O_register; 3963 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3964 exprP->X_add_symbol = NULL; 3965 } 3966 else 3967 { 3968 exprP->X_op = O_symbol; 3969 exprP->X_add_number = 0; 3970 } 3971 3972 return 1; 3973 } 3974 3975 exprP->X_add_symbol = symbol_find_or_make (name); 3976 3977 if (*nextcharP != '@') 3978 goto no_suffix; 3979 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 3980 reloc_type = BFD_RELOC_32_GOTOFF; 3981 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 3982 reloc_type = BFD_RELOC_SH_GOTPLT32; 3983 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 3984 reloc_type = BFD_RELOC_32_GOT_PCREL; 3985 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 3986 reloc_type = BFD_RELOC_32_PLT_PCREL; 3987 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 3988 reloc_type = BFD_RELOC_SH_TLS_GD_32; 3989 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 3990 reloc_type = BFD_RELOC_SH_TLS_LD_32; 3991 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 3992 reloc_type = BFD_RELOC_SH_TLS_IE_32; 3993 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 3994 reloc_type = BFD_RELOC_SH_TLS_LE_32; 3995 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 3996 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 3997 else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) 3998 reloc_type = BFD_RELOC_32_PCREL; 3999 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) 4000 reloc_type = BFD_RELOC_SH_GOTFUNCDESC; 4001 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) 4002 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; 4003 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) 4004 reloc_type = BFD_RELOC_SH_FUNCDESC; 4005 else 4006 goto no_suffix; 4007 4008 *input_line_pointer = *nextcharP; 4009 input_line_pointer = next_end; 4010 *nextcharP = *input_line_pointer; 4011 *input_line_pointer = '\0'; 4012 4013 exprP->X_op = O_PIC_reloc; 4014 exprP->X_add_number = 0; 4015 exprP->X_md = reloc_type; 4016 4017 return 1; 4018 } 4019 4020 void 4021 sh_cfi_frame_initial_instructions (void) 4022 { 4023 cfi_add_CFA_def_cfa (15, 0); 4024 } 4025 4026 int 4027 sh_regname_to_dw2regnum (char *regname) 4028 { 4029 unsigned int regnum = -1; 4030 unsigned int i; 4031 const char *p; 4032 char *q; 4033 static struct { const char *name; int dw2regnum; } regnames[] = 4034 { 4035 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4036 { "macl", 21 }, { "fpul", 23 } 4037 }; 4038 4039 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4040 if (strcmp (regnames[i].name, regname) == 0) 4041 return regnames[i].dw2regnum; 4042 4043 if (regname[0] == 'r') 4044 { 4045 p = regname + 1; 4046 regnum = strtoul (p, &q, 10); 4047 if (p == q || *q || regnum >= 16) 4048 return -1; 4049 } 4050 else if (regname[0] == 'f' && regname[1] == 'r') 4051 { 4052 p = regname + 2; 4053 regnum = strtoul (p, &q, 10); 4054 if (p == q || *q || regnum >= 16) 4055 return -1; 4056 regnum += 25; 4057 } 4058 else if (regname[0] == 'x' && regname[1] == 'd') 4059 { 4060 p = regname + 2; 4061 regnum = strtoul (p, &q, 10); 4062 if (p == q || *q || regnum >= 8) 4063 return -1; 4064 regnum += 87; 4065 } 4066 return regnum; 4067 } 4068 #endif /* OBJ_ELF */ 4069
Indexes created Sat Mar 21 00:23:06 UTC 2026