tc-sh.c revision 1.1.1.9.2.1
1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright (C) 1993-2024 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21 /* Written By Steve Chamberlain <sac (at) cygnus.com> */ 22 23 #include "as.h" 24 #include "subsegs.h" 25 #define DEFINE_TABLE 26 #include "opcodes/sh-opc.h" 27 #include "safe-ctype.h" 28 29 #ifdef OBJ_ELF 30 #include "elf/sh.h" 31 #endif 32 33 #include "dwarf2dbg.h" 34 #include "dw2gencfi.h" 35 36 typedef struct 37 { 38 sh_arg_type type; 39 int reg; 40 expressionS immediate; 41 } 42 sh_operand_info; 43 44 const char comment_chars[] = "!"; 45 const char line_separator_chars[] = ";"; 46 const char line_comment_chars[] = "!#"; 47 48 static void s_uses (int); 49 static void s_uacons (int); 50 51 #ifdef OBJ_ELF 52 static void sh_elf_cons (int); 53 54 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 55 #endif 56 57 static void 58 big (int ignore ATTRIBUTE_UNUSED) 59 { 60 if (! target_big_endian) 61 as_bad (_("directive .big encountered when option -big required")); 62 63 /* Stop further messages. */ 64 target_big_endian = 1; 65 } 66 67 static void 68 little (int ignore ATTRIBUTE_UNUSED) 69 { 70 if (target_big_endian) 71 as_bad (_("directive .little encountered when option -little required")); 72 73 /* Stop further messages. */ 74 target_big_endian = 0; 75 } 76 77 /* This table describes all the machine specific pseudo-ops the assembler 78 has to support. The fields are: 79 pseudo-op name without dot 80 function to call to execute this pseudo-op 81 Integer arg to pass to the function. */ 82 83 const pseudo_typeS md_pseudo_table[] = 84 { 85 #ifdef OBJ_ELF 86 {"long", sh_elf_cons, 4}, 87 {"int", sh_elf_cons, 4}, 88 {"word", sh_elf_cons, 2}, 89 {"short", sh_elf_cons, 2}, 90 #else 91 {"int", cons, 4}, 92 {"word", cons, 2}, 93 #endif /* OBJ_ELF */ 94 {"big", big, 0}, 95 {"form", listing_psize, 0}, 96 {"little", little, 0}, 97 {"heading", listing_title, 0}, 98 {"import", s_ignore, 0}, 99 {"page", listing_eject, 0}, 100 {"program", s_ignore, 0}, 101 {"uses", s_uses, 0}, 102 {"uaword", s_uacons, 2}, 103 {"ualong", s_uacons, 4}, 104 {"uaquad", s_uacons, 8}, 105 {"2byte", s_uacons, 2}, 106 {"4byte", s_uacons, 4}, 107 {"8byte", s_uacons, 8}, 108 {0, 0, 0} 109 }; 110 111 int sh_relax; /* set if -relax seen */ 112 113 /* Whether -small was seen. */ 114 115 int sh_small; 116 117 /* Flag to generate relocations against symbol values for local symbols. */ 118 119 static int dont_adjust_reloc_32; 120 121 /* Flag to indicate that '$' is allowed as a register prefix. */ 122 123 static int allow_dollar_register_prefix; 124 125 /* Preset architecture set, if given; zero otherwise. */ 126 127 static unsigned int preset_target_arch; 128 129 /* The bit mask of architectures that could 130 accommodate the insns seen so far. */ 131 static unsigned int valid_arch; 132 133 #ifdef OBJ_ELF 134 /* Whether --fdpic was given. */ 135 static int sh_fdpic; 136 #endif 137 138 const char EXP_CHARS[] = "eE"; 139 140 /* Chars that mean this number is a floating point constant. */ 141 /* As in 0f12.456 */ 142 /* or 0d1.2345e12 */ 143 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 144 145 #define C(a,b) ENCODE_RELAX(a,b) 146 147 #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 148 #define GET_WHAT(x) ((x>>4)) 149 150 /* These are the three types of relaxable instruction. */ 151 /* These are the types of relaxable instructions; except for END which is 152 a marker. */ 153 #define COND_JUMP 1 154 #define COND_JUMP_DELAY 2 155 #define UNCOND_JUMP 3 156 157 #define END 4 158 159 #define UNDEF_DISP 0 160 #define COND8 1 161 #define COND12 2 162 #define COND32 3 163 #define UNDEF_WORD_DISP 4 164 165 #define UNCOND12 1 166 #define UNCOND32 2 167 168 /* Branch displacements are from the address of the branch plus 169 four, thus all minimum and maximum values have 4 added to them. */ 170 #define COND8_F 258 171 #define COND8_M -252 172 #define COND8_LENGTH 2 173 174 /* There is one extra instruction before the branch, so we must add 175 two more bytes to account for it. */ 176 #define COND12_F 4100 177 #define COND12_M -4090 178 #define COND12_LENGTH 6 179 180 #define COND12_DELAY_LENGTH 4 181 182 /* ??? The minimum and maximum values are wrong, but this does not matter 183 since this relocation type is not supported yet. */ 184 #define COND32_F (1<<30) 185 #define COND32_M -(1<<30) 186 #define COND32_LENGTH 14 187 188 #define UNCOND12_F 4098 189 #define UNCOND12_M -4092 190 #define UNCOND12_LENGTH 2 191 192 /* ??? The minimum and maximum values are wrong, but this does not matter 193 since this relocation type is not supported yet. */ 194 #define UNCOND32_F (1<<30) 195 #define UNCOND32_M -(1<<30) 196 #define UNCOND32_LENGTH 14 197 198 #define EMPTY { 0, 0, 0, 0 } 199 200 const relax_typeS md_relax_table[C (END, 0)] = { 201 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 202 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 203 204 EMPTY, 205 /* C (COND_JUMP, COND8) */ 206 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 207 /* C (COND_JUMP, COND12) */ 208 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 209 /* C (COND_JUMP, COND32) */ 210 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 211 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 212 { 0, 0, COND32_LENGTH, 0, }, 213 EMPTY, EMPTY, EMPTY, 214 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 215 216 EMPTY, 217 /* C (COND_JUMP_DELAY, COND8) */ 218 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 219 /* C (COND_JUMP_DELAY, COND12) */ 220 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 221 /* C (COND_JUMP_DELAY, COND32) */ 222 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 223 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 224 { 0, 0, COND32_LENGTH, 0, }, 225 EMPTY, EMPTY, EMPTY, 226 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 227 228 EMPTY, 229 /* C (UNCOND_JUMP, UNCOND12) */ 230 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 231 /* C (UNCOND_JUMP, UNCOND32) */ 232 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 233 EMPTY, 234 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 235 { 0, 0, UNCOND32_LENGTH, 0, }, 236 EMPTY, EMPTY, EMPTY, 237 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 238 239 }; 240 241 #undef EMPTY 242 243 static htab_t opcode_hash_control; /* Opcode mnemonics */ 244 245 246 #ifdef OBJ_ELF 248 /* Determine whether the symbol needs any kind of PIC relocation. */ 249 250 inline static int 251 sh_PIC_related_p (symbolS *sym) 252 { 253 expressionS *exp; 254 255 if (! sym) 256 return 0; 257 258 if (sym == GOT_symbol) 259 return 1; 260 261 exp = symbol_get_value_expression (sym); 262 263 return (exp->X_op == O_PIC_reloc 264 || sh_PIC_related_p (exp->X_add_symbol) 265 || sh_PIC_related_p (exp->X_op_symbol)); 266 } 267 268 /* Determine the relocation type to be used to represent the 269 expression, that may be rearranged. */ 270 271 static int 272 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 273 { 274 expressionS *exp = main_exp; 275 276 /* This is here for backward-compatibility only. GCC used to generated: 277 278 f@PLT + . - (.LPCS# + 2) 279 280 but we'd rather be able to handle this as a PIC-related reference 281 plus/minus a symbol. However, gas' parser gives us: 282 283 O_subtract (O_add (f@PLT, .), .LPCS#+2) 284 285 so we attempt to transform this into: 286 287 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 288 289 which we can handle simply below. */ 290 if (exp->X_op == O_subtract) 291 { 292 if (sh_PIC_related_p (exp->X_op_symbol)) 293 return 1; 294 295 exp = symbol_get_value_expression (exp->X_add_symbol); 296 297 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 298 return 1; 299 300 if (exp && exp->X_op == O_add 301 && sh_PIC_related_p (exp->X_add_symbol)) 302 { 303 symbolS *sym = exp->X_add_symbol; 304 305 exp->X_op = O_subtract; 306 exp->X_add_symbol = main_exp->X_op_symbol; 307 308 main_exp->X_op_symbol = main_exp->X_add_symbol; 309 main_exp->X_add_symbol = sym; 310 311 main_exp->X_add_number += exp->X_add_number; 312 exp->X_add_number = 0; 313 } 314 315 exp = main_exp; 316 } 317 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 318 return 1; 319 320 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 321 { 322 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 323 { 324 *r_type_p = BFD_RELOC_SH_GOTPC; 325 return 0; 326 } 327 exp = symbol_get_value_expression (exp->X_add_symbol); 328 if (! exp) 329 return 0; 330 } 331 332 if (exp->X_op == O_PIC_reloc) 333 { 334 switch (*r_type_p) 335 { 336 case BFD_RELOC_NONE: 337 case BFD_RELOC_UNUSED: 338 *r_type_p = exp->X_md; 339 break; 340 341 case BFD_RELOC_SH_DISP20: 342 switch (exp->X_md) 343 { 344 case BFD_RELOC_32_GOT_PCREL: 345 *r_type_p = BFD_RELOC_SH_GOT20; 346 break; 347 348 case BFD_RELOC_32_GOTOFF: 349 *r_type_p = BFD_RELOC_SH_GOTOFF20; 350 break; 351 352 case BFD_RELOC_SH_GOTFUNCDESC: 353 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; 354 break; 355 356 case BFD_RELOC_SH_GOTOFFFUNCDESC: 357 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; 358 break; 359 360 default: 361 abort (); 362 } 363 break; 364 365 default: 366 abort (); 367 } 368 if (exp == main_exp) 369 exp->X_op = O_symbol; 370 else 371 { 372 main_exp->X_add_symbol = exp->X_add_symbol; 373 main_exp->X_add_number += exp->X_add_number; 374 } 375 } 376 else 377 return (sh_PIC_related_p (exp->X_add_symbol) 378 || sh_PIC_related_p (exp->X_op_symbol)); 379 380 return 0; 381 } 382 383 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 384 385 void 386 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 387 bfd_reloc_code_real_type r_type) 388 { 389 r_type = BFD_RELOC_UNUSED; 390 391 if (sh_check_fixup (exp, &r_type)) 392 as_bad (_("Invalid PIC expression.")); 393 394 if (r_type == BFD_RELOC_UNUSED) 395 switch (size) 396 { 397 case 1: 398 r_type = BFD_RELOC_8; 399 break; 400 401 case 2: 402 r_type = BFD_RELOC_16; 403 break; 404 405 case 4: 406 r_type = BFD_RELOC_32; 407 break; 408 409 case 8: 410 r_type = BFD_RELOC_64; 411 break; 412 413 default: 414 goto error; 415 } 416 else if (size != 4) 417 { 418 error: 419 as_bad (_("unsupported BFD relocation size %u"), size); 420 r_type = BFD_RELOC_UNUSED; 421 } 422 423 fix_new_exp (frag, off, size, exp, 0, r_type); 424 } 425 426 /* The regular cons() function, that reads constants, doesn't support 427 suffixes such as @GOT, @GOTOFF and @PLT, that generate 428 machine-specific relocation types. So we must define it here. */ 429 /* Clobbers input_line_pointer, checks end-of-line. */ 430 /* NBYTES 1=.byte, 2=.word, 4=.long */ 431 static void 432 sh_elf_cons (int nbytes) 433 { 434 expressionS exp; 435 436 if (is_it_end_of_statement ()) 437 { 438 demand_empty_rest_of_line (); 439 return; 440 } 441 442 #ifdef md_cons_align 443 md_cons_align (nbytes); 444 #endif 445 446 do 447 { 448 expression (&exp); 449 emit_expr (&exp, (unsigned int) nbytes); 450 } 451 while (*input_line_pointer++ == ','); 452 453 input_line_pointer--; /* Put terminator back into stream. */ 454 if (*input_line_pointer == '#' || *input_line_pointer == '!') 455 { 456 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 457 } 458 else 459 demand_empty_rest_of_line (); 460 } 461 462 /* The regular frag_offset_fixed_p doesn't work for rs_align_test 463 frags. */ 464 465 static bool 466 align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, 467 bfd_vma *offset) 468 { 469 const fragS *frag; 470 bfd_vma off; 471 472 /* Start with offset initialised to difference between the two frags. 473 Prior to assigning frag addresses this will be zero. */ 474 off = frag1->fr_address - frag2->fr_address; 475 if (frag1 == frag2) 476 { 477 *offset = off; 478 return true; 479 } 480 481 /* Maybe frag2 is after frag1. */ 482 frag = frag1; 483 while (frag->fr_type == rs_fill 484 || frag->fr_type == rs_align_test) 485 { 486 if (frag->fr_type == rs_fill) 487 off += frag->fr_fix + frag->fr_offset * frag->fr_var; 488 else 489 off += frag->fr_fix; 490 frag = frag->fr_next; 491 if (frag == NULL) 492 break; 493 if (frag == frag2) 494 { 495 *offset = off; 496 return true; 497 } 498 } 499 500 /* Maybe frag1 is after frag2. */ 501 off = frag1->fr_address - frag2->fr_address; 502 frag = frag2; 503 while (frag->fr_type == rs_fill 504 || frag->fr_type == rs_align_test) 505 { 506 if (frag->fr_type == rs_fill) 507 off -= frag->fr_fix + frag->fr_offset * frag->fr_var; 508 else 509 off -= frag->fr_fix; 510 frag = frag->fr_next; 511 if (frag == NULL) 512 break; 513 if (frag == frag1) 514 { 515 *offset = off; 516 return true; 517 } 518 } 519 520 return false; 521 } 522 523 /* Optimize a difference of symbols which have rs_align_test frag if 524 possible. */ 525 526 int 527 sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) 528 { 529 bfd_vma frag_off; 530 531 if (op == O_subtract 532 && l->X_op == O_symbol 533 && r->X_op == O_symbol 534 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) 535 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) 536 || r->X_add_symbol == l->X_add_symbol) 537 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), 538 symbol_get_frag (r->X_add_symbol), 539 &frag_off)) 540 { 541 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) 542 - S_GET_VALUE (r->X_add_symbol); 543 subtract_from_result (l, r->X_add_number, r->X_extrabit); 544 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); 545 add_to_result (l, symval_diff, symval_diff < 0); 546 l->X_op = O_constant; 547 l->X_add_symbol = 0; 548 return 1; 549 } 550 return 0; 551 } 552 #endif /* OBJ_ELF */ 553 554 /* This function is called once, at assembler startup time. This should 556 set up all the tables, etc that the MD part of the assembler needs. */ 557 558 void 559 md_begin (void) 560 { 561 const sh_opcode_info *opcode; 562 const char *prev_name = ""; 563 unsigned int target_arch; 564 565 target_arch 566 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 567 valid_arch = target_arch; 568 569 opcode_hash_control = str_htab_create (); 570 571 /* Insert unique names into hash table. */ 572 for (opcode = sh_table; opcode->name; opcode++) 573 { 574 if (strcmp (prev_name, opcode->name) != 0) 575 { 576 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 577 continue; 578 prev_name = opcode->name; 579 str_hash_insert (opcode_hash_control, opcode->name, opcode, 0); 580 } 581 } 582 } 583 584 static int reg_m; 585 static int reg_n; 586 static int reg_x, reg_y; 587 static int reg_efg; 588 static int reg_b; 589 590 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 591 592 /* Try to parse a reg name. Return the number of chars consumed. */ 593 594 static unsigned int 595 parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg) 596 { 597 char l0 = TOLOWER (src[0]); 598 char l1 = l0 ? TOLOWER (src[1]) : 0; 599 600 /* We use ! IDENT_CHAR for the next character after the register name, to 601 make sure that we won't accidentally recognize a symbol name such as 602 'sram' or sr_ram as being a reference to the register 'sr'. */ 603 604 if (l0 == 'r') 605 { 606 if (l1 == '1') 607 { 608 if (src[2] >= '0' && src[2] <= '5' 609 && ! IDENT_CHAR ((unsigned char) src[3])) 610 { 611 *mode = A_REG_N; 612 *reg = 10 + src[2] - '0'; 613 return 3; 614 } 615 } 616 if (l1 >= '0' && l1 <= '9' 617 && ! IDENT_CHAR ((unsigned char) src[2])) 618 { 619 *mode = A_REG_N; 620 *reg = (l1 - '0'); 621 return 2; 622 } 623 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 624 && ! IDENT_CHAR ((unsigned char) src[7])) 625 { 626 *mode = A_REG_B; 627 *reg = (l1 - '0'); 628 return 7; 629 } 630 631 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 632 { 633 *mode = A_RE; 634 return 2; 635 } 636 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 637 { 638 *mode = A_RS; 639 return 2; 640 } 641 } 642 643 if (l0 == 'a') 644 { 645 if (l1 == '0') 646 { 647 if (! IDENT_CHAR ((unsigned char) src[2])) 648 { 649 *mode = DSP_REG_N; 650 *reg = A_A0_NUM; 651 return 2; 652 } 653 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 654 { 655 *mode = DSP_REG_N; 656 *reg = A_A0G_NUM; 657 return 3; 658 } 659 } 660 if (l1 == '1') 661 { 662 if (! IDENT_CHAR ((unsigned char) src[2])) 663 { 664 *mode = DSP_REG_N; 665 *reg = A_A1_NUM; 666 return 2; 667 } 668 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 669 { 670 *mode = DSP_REG_N; 671 *reg = A_A1G_NUM; 672 return 3; 673 } 674 } 675 676 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 677 && ! IDENT_CHAR ((unsigned char) src[3])) 678 { 679 *mode = A_REG_N; 680 *reg = 4 + (l1 - '0'); 681 return 3; 682 } 683 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 684 && ! IDENT_CHAR ((unsigned char) src[3])) 685 { 686 *mode = A_REG_N; 687 *reg = 6 + (l1 - '0'); 688 return 3; 689 } 690 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 691 && ! IDENT_CHAR ((unsigned char) src[3])) 692 { 693 int n = l1 - '0'; 694 695 *mode = A_REG_N; 696 *reg = n | ((~n & 2) << 1); 697 return 3; 698 } 699 } 700 701 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 702 { 703 if (l1 == 's') 704 { 705 *mode = A_REG_N; 706 *reg = 8; 707 return 2; 708 } 709 if (l1 == 'x') 710 { 711 *mode = A_REG_N; 712 *reg = 8; 713 return 2; 714 } 715 if (l1 == 'y') 716 { 717 *mode = A_REG_N; 718 *reg = 9; 719 return 2; 720 } 721 } 722 723 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 724 && ! IDENT_CHAR ((unsigned char) src[2])) 725 { 726 *mode = DSP_REG_N; 727 *reg = A_X0_NUM + l1 - '0'; 728 return 2; 729 } 730 731 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 732 && ! IDENT_CHAR ((unsigned char) src[2])) 733 { 734 *mode = DSP_REG_N; 735 *reg = A_Y0_NUM + l1 - '0'; 736 return 2; 737 } 738 739 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 740 && ! IDENT_CHAR ((unsigned char) src[2])) 741 { 742 *mode = DSP_REG_N; 743 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 744 return 2; 745 } 746 747 if (l0 == 's' 748 && l1 == 's' 749 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 750 { 751 *mode = A_SSR; 752 return 3; 753 } 754 755 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 756 && ! IDENT_CHAR ((unsigned char) src[3])) 757 { 758 *mode = A_SPC; 759 return 3; 760 } 761 762 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 763 && ! IDENT_CHAR ((unsigned char) src[3])) 764 { 765 *mode = A_SGR; 766 return 3; 767 } 768 769 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 770 && ! IDENT_CHAR ((unsigned char) src[3])) 771 { 772 *mode = A_DSR; 773 return 3; 774 } 775 776 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 777 && ! IDENT_CHAR ((unsigned char) src[3])) 778 { 779 *mode = A_DBR; 780 return 3; 781 } 782 783 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 784 { 785 *mode = A_SR; 786 return 2; 787 } 788 789 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 790 { 791 *mode = A_REG_N; 792 *reg = 15; 793 return 2; 794 } 795 796 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 797 { 798 *mode = A_PR; 799 return 2; 800 } 801 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 802 { 803 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 804 and use an uninitialized immediate. */ 805 *mode = A_PC; 806 return 2; 807 } 808 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 809 && ! IDENT_CHAR ((unsigned char) src[3])) 810 { 811 *mode = A_GBR; 812 return 3; 813 } 814 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 815 && ! IDENT_CHAR ((unsigned char) src[3])) 816 { 817 *mode = A_VBR; 818 return 3; 819 } 820 821 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 822 && ! IDENT_CHAR ((unsigned char) src[3])) 823 { 824 *mode = A_TBR; 825 return 3; 826 } 827 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 828 && ! IDENT_CHAR ((unsigned char) src[4])) 829 { 830 if (TOLOWER (src[3]) == 'l') 831 { 832 *mode = A_MACL; 833 return 4; 834 } 835 if (TOLOWER (src[3]) == 'h') 836 { 837 *mode = A_MACH; 838 return 4; 839 } 840 } 841 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 842 && ! IDENT_CHAR ((unsigned char) src[3])) 843 { 844 *mode = A_MOD; 845 return 3; 846 } 847 if (l0 == 'f' && l1 == 'r') 848 { 849 if (src[2] == '1') 850 { 851 if (src[3] >= '0' && src[3] <= '5' 852 && ! IDENT_CHAR ((unsigned char) src[4])) 853 { 854 *mode = F_REG_N; 855 *reg = 10 + src[3] - '0'; 856 return 4; 857 } 858 } 859 if (src[2] >= '0' && src[2] <= '9' 860 && ! IDENT_CHAR ((unsigned char) src[3])) 861 { 862 *mode = F_REG_N; 863 *reg = (src[2] - '0'); 864 return 3; 865 } 866 } 867 if (l0 == 'd' && l1 == 'r') 868 { 869 if (src[2] == '1') 870 { 871 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 872 && ! IDENT_CHAR ((unsigned char) src[4])) 873 { 874 *mode = D_REG_N; 875 *reg = 10 + src[3] - '0'; 876 return 4; 877 } 878 } 879 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 880 && ! IDENT_CHAR ((unsigned char) src[3])) 881 { 882 *mode = D_REG_N; 883 *reg = (src[2] - '0'); 884 return 3; 885 } 886 } 887 if (l0 == 'x' && l1 == 'd') 888 { 889 if (src[2] == '1') 890 { 891 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 892 && ! IDENT_CHAR ((unsigned char) src[4])) 893 { 894 *mode = X_REG_N; 895 *reg = 11 + src[3] - '0'; 896 return 4; 897 } 898 } 899 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 900 && ! IDENT_CHAR ((unsigned char) src[3])) 901 { 902 *mode = X_REG_N; 903 *reg = (src[2] - '0') + 1; 904 return 3; 905 } 906 } 907 if (l0 == 'f' && l1 == 'v') 908 { 909 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 910 { 911 *mode = V_REG_N; 912 *reg = 12; 913 return 4; 914 } 915 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 916 && ! IDENT_CHAR ((unsigned char) src[3])) 917 { 918 *mode = V_REG_N; 919 *reg = (src[2] - '0'); 920 return 3; 921 } 922 } 923 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 924 && TOLOWER (src[3]) == 'l' 925 && ! IDENT_CHAR ((unsigned char) src[4])) 926 { 927 *mode = FPUL_N; 928 return 4; 929 } 930 931 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 932 && TOLOWER (src[3]) == 'c' 933 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 934 { 935 *mode = FPSCR_N; 936 return 5; 937 } 938 939 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 940 && TOLOWER (src[3]) == 'r' 941 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 942 { 943 *mode = XMTRX_M4; 944 return 5; 945 } 946 947 return 0; 948 } 949 950 /* Like parse_reg_without_prefix, but this version supports 951 $-prefixed register names if enabled by the user. */ 952 953 static unsigned int 954 parse_reg (char *src, sh_arg_type *mode, int *reg) 955 { 956 unsigned int prefix; 957 unsigned int consumed; 958 959 if (src[0] == '$') 960 { 961 if (allow_dollar_register_prefix) 962 { 963 src ++; 964 prefix = 1; 965 } 966 else 967 return 0; 968 } 969 else 970 prefix = 0; 971 972 consumed = parse_reg_without_prefix (src, mode, reg); 973 974 if (consumed == 0) 975 return 0; 976 977 return consumed + prefix; 978 } 979 980 static char * 981 parse_exp (char *s, sh_operand_info *op) 982 { 983 char *save; 984 char *new_pointer; 985 986 save = input_line_pointer; 987 input_line_pointer = s; 988 expression (&op->immediate); 989 if (op->immediate.X_op == O_absent) 990 as_bad (_("missing operand")); 991 new_pointer = input_line_pointer; 992 input_line_pointer = save; 993 return new_pointer; 994 } 995 996 /* The many forms of operand: 997 998 Rn Register direct 999 @Rn Register indirect 1000 @Rn+ Autoincrement 1001 @-Rn Autodecrement 1002 @(disp:4,Rn) 1003 @(disp:8,GBR) 1004 @(disp:8,PC) 1005 1006 @(R0,Rn) 1007 @(R0,GBR) 1008 1009 disp:8 1010 disp:12 1011 #imm8 1012 pr, gbr, vbr, macl, mach 1013 */ 1014 1015 static char * 1016 parse_at (char *src, sh_operand_info *op) 1017 { 1018 int len; 1019 sh_arg_type mode; 1020 src++; 1021 if (src[0] == '@') 1022 { 1023 src = parse_at (src, op); 1024 if (op->type == A_DISP_TBR) 1025 op->type = A_DISP2_TBR; 1026 else 1027 as_bad (_("illegal double indirection")); 1028 } 1029 else if (src[0] == '-') 1030 { 1031 /* Must be predecrement. */ 1032 src++; 1033 1034 len = parse_reg (src, &mode, &(op->reg)); 1035 if (mode != A_REG_N) 1036 as_bad (_("illegal register after @-")); 1037 1038 op->type = A_DEC_N; 1039 src += len; 1040 } 1041 else if (src[0] == '(') 1042 { 1043 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1044 @(r0, rn). */ 1045 src++; 1046 len = parse_reg (src, &mode, &(op->reg)); 1047 if (len && mode == A_REG_N) 1048 { 1049 src += len; 1050 if (op->reg != 0) 1051 { 1052 as_bad (_("must be @(r0,...)")); 1053 } 1054 if (src[0] == ',') 1055 { 1056 src++; 1057 /* Now can be rn or gbr. */ 1058 len = parse_reg (src, &mode, &(op->reg)); 1059 } 1060 else 1061 { 1062 len = 0; 1063 } 1064 if (len) 1065 { 1066 if (mode == A_GBR) 1067 { 1068 op->type = A_R0_GBR; 1069 } 1070 else if (mode == A_REG_N) 1071 { 1072 op->type = A_IND_R0_REG_N; 1073 } 1074 else 1075 { 1076 as_bad (_("syntax error in @(r0,...)")); 1077 } 1078 } 1079 else 1080 { 1081 as_bad (_("syntax error in @(r0...)")); 1082 } 1083 } 1084 else 1085 { 1086 /* Must be an @(disp,.. thing). */ 1087 src = parse_exp (src, op); 1088 if (src[0] == ',') 1089 src++; 1090 /* Now can be rn, gbr or pc. */ 1091 len = parse_reg (src, &mode, &op->reg); 1092 if (len) 1093 { 1094 if (mode == A_REG_N) 1095 { 1096 op->type = A_DISP_REG_N; 1097 } 1098 else if (mode == A_GBR) 1099 { 1100 op->type = A_DISP_GBR; 1101 } 1102 else if (mode == A_TBR) 1103 { 1104 op->type = A_DISP_TBR; 1105 } 1106 else if (mode == A_PC) 1107 { 1108 /* We want @(expr, pc) to uniformly address . + expr, 1109 no matter if expr is a constant, or a more complex 1110 expression, e.g. sym-. or sym1-sym2. 1111 However, we also used to accept @(sym,pc) 1112 as addressing sym, i.e. meaning the same as plain sym. 1113 Some existing code does use the @(sym,pc) syntax, so 1114 we give it the old semantics for now, but warn about 1115 its use, so that users have some time to fix their code. 1116 1117 Note that due to this backward compatibility hack, 1118 we'll get unexpected results when @(offset, pc) is used, 1119 and offset is a symbol that is set later to an an address 1120 difference, or an external symbol that is set to an 1121 address difference in another source file, so we want to 1122 eventually remove it. */ 1123 if (op->immediate.X_op == O_symbol) 1124 { 1125 op->type = A_DISP_PC; 1126 as_warn (_("Deprecated syntax.")); 1127 } 1128 else 1129 { 1130 op->type = A_DISP_PC_ABS; 1131 /* Such operands don't get corrected for PC==.+4, so 1132 make the correction here. */ 1133 op->immediate.X_add_number -= 4; 1134 } 1135 } 1136 else 1137 { 1138 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1139 } 1140 } 1141 else 1142 { 1143 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1144 } 1145 } 1146 src += len; 1147 if (src[0] != ')') 1148 as_bad (_("expecting )")); 1149 else 1150 src++; 1151 } 1152 else 1153 { 1154 src += parse_reg (src, &mode, &(op->reg)); 1155 if (mode != A_REG_N) 1156 as_bad (_("illegal register after @")); 1157 1158 if (src[0] == '+') 1159 { 1160 char l0, l1; 1161 1162 src++; 1163 l0 = TOLOWER (src[0]); 1164 l1 = TOLOWER (src[1]); 1165 1166 if ((l0 == 'r' && l1 == '8') 1167 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1168 { 1169 src += 2; 1170 op->type = AX_PMOD_N; 1171 } 1172 else if ( (l0 == 'r' && l1 == '9') 1173 || (l0 == 'i' && l1 == 'y')) 1174 { 1175 src += 2; 1176 op->type = AY_PMOD_N; 1177 } 1178 else 1179 op->type = A_INC_N; 1180 } 1181 else 1182 op->type = A_IND_N; 1183 } 1184 return src; 1185 } 1186 1187 static void 1188 get_operand (char **ptr, sh_operand_info *op) 1189 { 1190 char *src = *ptr; 1191 sh_arg_type mode = (sh_arg_type) -1; 1192 unsigned int len; 1193 1194 if (src[0] == '#') 1195 { 1196 src++; 1197 *ptr = parse_exp (src, op); 1198 op->type = A_IMM; 1199 return; 1200 } 1201 1202 else if (src[0] == '@') 1203 { 1204 *ptr = parse_at (src, op); 1205 return; 1206 } 1207 len = parse_reg (src, &mode, &(op->reg)); 1208 if (len) 1209 { 1210 *ptr = src + len; 1211 op->type = mode; 1212 return; 1213 } 1214 else 1215 { 1216 /* Not a reg, the only thing left is a displacement. */ 1217 *ptr = parse_exp (src, op); 1218 op->type = A_DISP_PC; 1219 return; 1220 } 1221 } 1222 1223 static char * 1224 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1225 { 1226 char *ptr = args; 1227 1228 operand[0].type = 0; 1229 operand[1].type = 0; 1230 operand[2].type = 0; 1231 if (info->arg[0]) 1232 { 1233 /* The pre-processor will eliminate whitespace in front of '@' 1234 after the first argument; we may be called multiple times 1235 from assemble_ppi, so don't insist on finding whitespace here. */ 1236 if (*ptr == ' ') 1237 ptr++; 1238 1239 get_operand (&ptr, operand + 0); 1240 if (info->arg[1]) 1241 { 1242 if (*ptr == ',') 1243 ptr++; 1244 get_operand (&ptr, operand + 1); 1245 /* ??? Hack: psha/pshl have a varying operand number depending on 1246 the type of the first operand. We handle this by having the 1247 three-operand version first and reducing the number of operands 1248 parsed to two if we see that the first operand is an immediate. 1249 This works because no insn with three operands has an immediate 1250 as first operand. */ 1251 if (info->arg[2] && operand[0].type != A_IMM) 1252 { 1253 if (*ptr == ',') 1254 ptr++; 1255 get_operand (&ptr, operand + 2); 1256 } 1257 } 1258 } 1259 return ptr; 1260 } 1261 1262 /* Passed a pointer to a list of opcodes which use different 1263 addressing modes, return the opcode which matches the opcodes 1264 provided. */ 1265 1266 static sh_opcode_info * 1267 get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1268 { 1269 sh_opcode_info *this_try = opcode; 1270 const char *name = opcode->name; 1271 int n = 0; 1272 1273 while (opcode->name) 1274 { 1275 this_try = opcode++; 1276 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1277 { 1278 /* We've looked so far down the table that we've run out of 1279 opcodes with the same name. */ 1280 return 0; 1281 } 1282 1283 /* Look at both operands needed by the opcodes and provided by 1284 the user - since an arg test will often fail on the same arg 1285 again and again, we'll try and test the last failing arg the 1286 first on each opcode try. */ 1287 for (n = 0; this_try->arg[n]; n++) 1288 { 1289 sh_operand_info *user = operands + n; 1290 sh_arg_type arg = this_try->arg[n]; 1291 1292 switch (arg) 1293 { 1294 case A_DISP_PC: 1295 if (user->type == A_DISP_PC_ABS) 1296 break; 1297 /* Fall through. */ 1298 case A_IMM: 1299 case A_BDISP12: 1300 case A_BDISP8: 1301 case A_DISP_GBR: 1302 case A_DISP2_TBR: 1303 case A_MACH: 1304 case A_PR: 1305 case A_MACL: 1306 if (user->type != arg) 1307 goto fail; 1308 break; 1309 case A_R0: 1310 /* opcode needs r0 */ 1311 if (user->type != A_REG_N || user->reg != 0) 1312 goto fail; 1313 break; 1314 case A_R0_GBR: 1315 if (user->type != A_R0_GBR || user->reg != 0) 1316 goto fail; 1317 break; 1318 case F_FR0: 1319 if (user->type != F_REG_N || user->reg != 0) 1320 goto fail; 1321 break; 1322 1323 case A_REG_N: 1324 case A_INC_N: 1325 case A_DEC_N: 1326 case A_IND_N: 1327 case A_IND_R0_REG_N: 1328 case A_DISP_REG_N: 1329 case F_REG_N: 1330 case D_REG_N: 1331 case X_REG_N: 1332 case V_REG_N: 1333 case FPUL_N: 1334 case FPSCR_N: 1335 case DSP_REG_N: 1336 /* Opcode needs rn */ 1337 if (user->type != arg) 1338 goto fail; 1339 reg_n = user->reg; 1340 break; 1341 case DX_REG_N: 1342 if (user->type != D_REG_N && user->type != X_REG_N) 1343 goto fail; 1344 reg_n = user->reg; 1345 break; 1346 case A_GBR: 1347 case A_TBR: 1348 case A_SR: 1349 case A_VBR: 1350 case A_DSR: 1351 case A_MOD: 1352 case A_RE: 1353 case A_RS: 1354 case A_SSR: 1355 case A_SPC: 1356 case A_SGR: 1357 case A_DBR: 1358 if (user->type != arg) 1359 goto fail; 1360 break; 1361 1362 case A_REG_B: 1363 if (user->type != arg) 1364 goto fail; 1365 reg_b = user->reg; 1366 break; 1367 1368 case A_INC_R15: 1369 if (user->type != A_INC_N) 1370 goto fail; 1371 if (user->reg != 15) 1372 goto fail; 1373 reg_n = user->reg; 1374 break; 1375 1376 case A_DEC_R15: 1377 if (user->type != A_DEC_N) 1378 goto fail; 1379 if (user->reg != 15) 1380 goto fail; 1381 reg_n = user->reg; 1382 break; 1383 1384 case A_REG_M: 1385 case A_INC_M: 1386 case A_DEC_M: 1387 case A_IND_M: 1388 case A_IND_R0_REG_M: 1389 case A_DISP_REG_M: 1390 case DSP_REG_M: 1391 /* Opcode needs rn */ 1392 if (user->type != arg - A_REG_M + A_REG_N) 1393 goto fail; 1394 reg_m = user->reg; 1395 break; 1396 1397 case AS_DEC_N: 1398 if (user->type != A_DEC_N) 1399 goto fail; 1400 if (user->reg < 2 || user->reg > 5) 1401 goto fail; 1402 reg_n = user->reg; 1403 break; 1404 1405 case AS_INC_N: 1406 if (user->type != A_INC_N) 1407 goto fail; 1408 if (user->reg < 2 || user->reg > 5) 1409 goto fail; 1410 reg_n = user->reg; 1411 break; 1412 1413 case AS_IND_N: 1414 if (user->type != A_IND_N) 1415 goto fail; 1416 if (user->reg < 2 || user->reg > 5) 1417 goto fail; 1418 reg_n = user->reg; 1419 break; 1420 1421 case AS_PMOD_N: 1422 if (user->type != AX_PMOD_N) 1423 goto fail; 1424 if (user->reg < 2 || user->reg > 5) 1425 goto fail; 1426 reg_n = user->reg; 1427 break; 1428 1429 case AX_INC_N: 1430 if (user->type != A_INC_N) 1431 goto fail; 1432 if (user->reg < 4 || user->reg > 5) 1433 goto fail; 1434 reg_n = user->reg; 1435 break; 1436 1437 case AX_IND_N: 1438 if (user->type != A_IND_N) 1439 goto fail; 1440 if (user->reg < 4 || user->reg > 5) 1441 goto fail; 1442 reg_n = user->reg; 1443 break; 1444 1445 case AX_PMOD_N: 1446 if (user->type != AX_PMOD_N) 1447 goto fail; 1448 if (user->reg < 4 || user->reg > 5) 1449 goto fail; 1450 reg_n = user->reg; 1451 break; 1452 1453 case AXY_INC_N: 1454 if (user->type != A_INC_N) 1455 goto fail; 1456 if ((user->reg < 4 || user->reg > 5) 1457 && (user->reg < 0 || user->reg > 1)) 1458 goto fail; 1459 reg_n = user->reg; 1460 break; 1461 1462 case AXY_IND_N: 1463 if (user->type != A_IND_N) 1464 goto fail; 1465 if ((user->reg < 4 || user->reg > 5) 1466 && (user->reg < 0 || user->reg > 1)) 1467 goto fail; 1468 reg_n = user->reg; 1469 break; 1470 1471 case AXY_PMOD_N: 1472 if (user->type != AX_PMOD_N) 1473 goto fail; 1474 if ((user->reg < 4 || user->reg > 5) 1475 && (user->reg < 0 || user->reg > 1)) 1476 goto fail; 1477 reg_n = user->reg; 1478 break; 1479 1480 case AY_INC_N: 1481 if (user->type != A_INC_N) 1482 goto fail; 1483 if (user->reg < 6 || user->reg > 7) 1484 goto fail; 1485 reg_n = user->reg; 1486 break; 1487 1488 case AY_IND_N: 1489 if (user->type != A_IND_N) 1490 goto fail; 1491 if (user->reg < 6 || user->reg > 7) 1492 goto fail; 1493 reg_n = user->reg; 1494 break; 1495 1496 case AY_PMOD_N: 1497 if (user->type != AY_PMOD_N) 1498 goto fail; 1499 if (user->reg < 6 || user->reg > 7) 1500 goto fail; 1501 reg_n = user->reg; 1502 break; 1503 1504 case AYX_INC_N: 1505 if (user->type != A_INC_N) 1506 goto fail; 1507 if ((user->reg < 6 || user->reg > 7) 1508 && (user->reg < 2 || user->reg > 3)) 1509 goto fail; 1510 reg_n = user->reg; 1511 break; 1512 1513 case AYX_IND_N: 1514 if (user->type != A_IND_N) 1515 goto fail; 1516 if ((user->reg < 6 || user->reg > 7) 1517 && (user->reg < 2 || user->reg > 3)) 1518 goto fail; 1519 reg_n = user->reg; 1520 break; 1521 1522 case AYX_PMOD_N: 1523 if (user->type != AY_PMOD_N) 1524 goto fail; 1525 if ((user->reg < 6 || user->reg > 7) 1526 && (user->reg < 2 || user->reg > 3)) 1527 goto fail; 1528 reg_n = user->reg; 1529 break; 1530 1531 case DSP_REG_A_M: 1532 if (user->type != DSP_REG_N) 1533 goto fail; 1534 if (user->reg != A_A0_NUM 1535 && user->reg != A_A1_NUM) 1536 goto fail; 1537 reg_m = user->reg; 1538 break; 1539 1540 case DSP_REG_AX: 1541 if (user->type != DSP_REG_N) 1542 goto fail; 1543 switch (user->reg) 1544 { 1545 case A_A0_NUM: 1546 reg_x = 0; 1547 break; 1548 case A_A1_NUM: 1549 reg_x = 2; 1550 break; 1551 case A_X0_NUM: 1552 reg_x = 1; 1553 break; 1554 case A_X1_NUM: 1555 reg_x = 3; 1556 break; 1557 default: 1558 goto fail; 1559 } 1560 break; 1561 1562 case DSP_REG_XY: 1563 if (user->type != DSP_REG_N) 1564 goto fail; 1565 switch (user->reg) 1566 { 1567 case A_X0_NUM: 1568 reg_x = 0; 1569 break; 1570 case A_X1_NUM: 1571 reg_x = 2; 1572 break; 1573 case A_Y0_NUM: 1574 reg_x = 1; 1575 break; 1576 case A_Y1_NUM: 1577 reg_x = 3; 1578 break; 1579 default: 1580 goto fail; 1581 } 1582 break; 1583 1584 case DSP_REG_AY: 1585 if (user->type != DSP_REG_N) 1586 goto fail; 1587 switch (user->reg) 1588 { 1589 case A_A0_NUM: 1590 reg_y = 0; 1591 break; 1592 case A_A1_NUM: 1593 reg_y = 1; 1594 break; 1595 case A_Y0_NUM: 1596 reg_y = 2; 1597 break; 1598 case A_Y1_NUM: 1599 reg_y = 3; 1600 break; 1601 default: 1602 goto fail; 1603 } 1604 break; 1605 1606 case DSP_REG_YX: 1607 if (user->type != DSP_REG_N) 1608 goto fail; 1609 switch (user->reg) 1610 { 1611 case A_Y0_NUM: 1612 reg_y = 0; 1613 break; 1614 case A_Y1_NUM: 1615 reg_y = 1; 1616 break; 1617 case A_X0_NUM: 1618 reg_y = 2; 1619 break; 1620 case A_X1_NUM: 1621 reg_y = 3; 1622 break; 1623 default: 1624 goto fail; 1625 } 1626 break; 1627 1628 case DSP_REG_X: 1629 if (user->type != DSP_REG_N) 1630 goto fail; 1631 switch (user->reg) 1632 { 1633 case A_X0_NUM: 1634 reg_x = 0; 1635 break; 1636 case A_X1_NUM: 1637 reg_x = 1; 1638 break; 1639 case A_A0_NUM: 1640 reg_x = 2; 1641 break; 1642 case A_A1_NUM: 1643 reg_x = 3; 1644 break; 1645 default: 1646 goto fail; 1647 } 1648 break; 1649 1650 case DSP_REG_Y: 1651 if (user->type != DSP_REG_N) 1652 goto fail; 1653 switch (user->reg) 1654 { 1655 case A_Y0_NUM: 1656 reg_y = 0; 1657 break; 1658 case A_Y1_NUM: 1659 reg_y = 1; 1660 break; 1661 case A_M0_NUM: 1662 reg_y = 2; 1663 break; 1664 case A_M1_NUM: 1665 reg_y = 3; 1666 break; 1667 default: 1668 goto fail; 1669 } 1670 break; 1671 1672 case DSP_REG_E: 1673 if (user->type != DSP_REG_N) 1674 goto fail; 1675 switch (user->reg) 1676 { 1677 case A_X0_NUM: 1678 reg_efg = 0 << 10; 1679 break; 1680 case A_X1_NUM: 1681 reg_efg = 1 << 10; 1682 break; 1683 case A_Y0_NUM: 1684 reg_efg = 2 << 10; 1685 break; 1686 case A_A1_NUM: 1687 reg_efg = 3 << 10; 1688 break; 1689 default: 1690 goto fail; 1691 } 1692 break; 1693 1694 case DSP_REG_F: 1695 if (user->type != DSP_REG_N) 1696 goto fail; 1697 switch (user->reg) 1698 { 1699 case A_Y0_NUM: 1700 reg_efg |= 0 << 8; 1701 break; 1702 case A_Y1_NUM: 1703 reg_efg |= 1 << 8; 1704 break; 1705 case A_X0_NUM: 1706 reg_efg |= 2 << 8; 1707 break; 1708 case A_A1_NUM: 1709 reg_efg |= 3 << 8; 1710 break; 1711 default: 1712 goto fail; 1713 } 1714 break; 1715 1716 case DSP_REG_G: 1717 if (user->type != DSP_REG_N) 1718 goto fail; 1719 switch (user->reg) 1720 { 1721 case A_M0_NUM: 1722 reg_efg |= 0 << 2; 1723 break; 1724 case A_M1_NUM: 1725 reg_efg |= 1 << 2; 1726 break; 1727 case A_A0_NUM: 1728 reg_efg |= 2 << 2; 1729 break; 1730 case A_A1_NUM: 1731 reg_efg |= 3 << 2; 1732 break; 1733 default: 1734 goto fail; 1735 } 1736 break; 1737 1738 case A_A0: 1739 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 1740 goto fail; 1741 break; 1742 case A_X0: 1743 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 1744 goto fail; 1745 break; 1746 case A_X1: 1747 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 1748 goto fail; 1749 break; 1750 case A_Y0: 1751 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 1752 goto fail; 1753 break; 1754 case A_Y1: 1755 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 1756 goto fail; 1757 break; 1758 1759 case F_REG_M: 1760 case D_REG_M: 1761 case X_REG_M: 1762 case V_REG_M: 1763 case FPUL_M: 1764 case FPSCR_M: 1765 /* Opcode needs rn */ 1766 if (user->type != arg - F_REG_M + F_REG_N) 1767 goto fail; 1768 reg_m = user->reg; 1769 break; 1770 case DX_REG_M: 1771 if (user->type != D_REG_N && user->type != X_REG_N) 1772 goto fail; 1773 reg_m = user->reg; 1774 break; 1775 case XMTRX_M4: 1776 if (user->type != XMTRX_M4) 1777 goto fail; 1778 reg_m = 4; 1779 break; 1780 1781 default: 1782 printf (_("unhandled %d\n"), arg); 1783 goto fail; 1784 } 1785 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 1786 && ( arg == A_DISP_REG_M 1787 || arg == A_DISP_REG_N)) 1788 { 1789 /* Check a few key IMM* fields for overflow. */ 1790 int opf; 1791 long val = user->immediate.X_add_number; 1792 1793 for (opf = 0; opf < 4; opf ++) 1794 switch (this_try->nibbles[opf]) 1795 { 1796 case IMM0_4: 1797 case IMM1_4: 1798 if (val < 0 || val > 15) 1799 goto fail; 1800 break; 1801 case IMM0_4BY2: 1802 case IMM1_4BY2: 1803 if (val < 0 || val > 15 * 2) 1804 goto fail; 1805 break; 1806 case IMM0_4BY4: 1807 case IMM1_4BY4: 1808 if (val < 0 || val > 15 * 4) 1809 goto fail; 1810 break; 1811 default: 1812 break; 1813 } 1814 } 1815 } 1816 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 1817 goto fail; 1818 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 1819 return this_try; 1820 fail: 1821 ; 1822 } 1823 1824 return 0; 1825 } 1826 1827 static void 1828 insert (char *where, bfd_reloc_code_real_type how, int pcrel, 1829 sh_operand_info *op) 1830 { 1831 fix_new_exp (frag_now, 1832 where - frag_now->fr_literal, 1833 2, 1834 &op->immediate, 1835 pcrel, 1836 how); 1837 } 1838 1839 static void 1840 insert4 (char * where, bfd_reloc_code_real_type how, int pcrel, 1841 sh_operand_info * op) 1842 { 1843 fix_new_exp (frag_now, 1844 where - frag_now->fr_literal, 1845 4, 1846 & op->immediate, 1847 pcrel, 1848 how); 1849 } 1850 static void 1851 build_relax (sh_opcode_info *opcode, sh_operand_info *op) 1852 { 1853 int high_byte = target_big_endian ? 0 : 1; 1854 char *p; 1855 1856 if (opcode->arg[0] == A_BDISP8) 1857 { 1858 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 1859 p = frag_var (rs_machine_dependent, 1860 md_relax_table[C (what, COND32)].rlx_length, 1861 md_relax_table[C (what, COND8)].rlx_length, 1862 C (what, 0), 1863 op->immediate.X_add_symbol, 1864 op->immediate.X_add_number, 1865 0); 1866 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 1867 } 1868 else if (opcode->arg[0] == A_BDISP12) 1869 { 1870 p = frag_var (rs_machine_dependent, 1871 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 1872 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 1873 C (UNCOND_JUMP, 0), 1874 op->immediate.X_add_symbol, 1875 op->immediate.X_add_number, 1876 0); 1877 p[high_byte] = (opcode->nibbles[0] << 4); 1878 } 1879 1880 } 1881 1882 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 1883 1884 static char * 1885 insert_loop_bounds (char *output, sh_operand_info *operand) 1886 { 1887 symbolS *end_sym; 1888 1889 /* Since the low byte of the opcode will be overwritten by the reloc, we 1890 can just stash the high byte into both bytes and ignore endianness. */ 1891 output[0] = 0x8c; 1892 output[1] = 0x8c; 1893 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1894 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1895 1896 if (sh_relax) 1897 { 1898 static int count = 0; 1899 char name[11]; 1900 expressionS *symval; 1901 1902 /* If the last loop insn is a two-byte-insn, it is in danger of being 1903 swapped with the insn after it. To prevent this, create a new 1904 symbol - complete with SH_LABEL reloc - after the last loop insn. 1905 If the last loop insn is four bytes long, the symbol will be 1906 right in the middle, but four byte insns are not swapped anyways. */ 1907 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 1908 Hence a 9 digit number should be enough to count all REPEATs. */ 1909 sprintf (name, "_R%x", count++ & 0x3fffffff); 1910 end_sym = symbol_new (name, undefined_section, &zero_address_frag, 0); 1911 /* Make this a local symbol. */ 1912 #ifdef OBJ_COFF 1913 SF_SET_LOCAL (end_sym); 1914 #endif /* OBJ_COFF */ 1915 symbol_table_insert (end_sym); 1916 symval = symbol_get_value_expression (end_sym); 1917 *symval = operand[1].immediate; 1918 symval->X_add_number += 2; 1919 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 1920 } 1921 1922 output = frag_more (2); 1923 output[0] = 0x8e; 1924 output[1] = 0x8e; 1925 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 1926 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 1927 1928 return frag_more (2); 1929 } 1930 1931 /* Now we know what sort of opcodes it is, let's build the bytes. */ 1932 1933 static unsigned int 1934 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 1935 { 1936 int indx; 1937 char nbuf[8]; 1938 char *output; 1939 unsigned int size = 2; 1940 int low_byte = target_big_endian ? 1 : 0; 1941 int max_index = 4; 1942 bfd_reloc_code_real_type r_type; 1943 #ifdef OBJ_ELF 1944 int unhandled_pic = 0; 1945 #endif 1946 1947 nbuf[0] = 0; 1948 nbuf[1] = 0; 1949 nbuf[2] = 0; 1950 nbuf[3] = 0; 1951 nbuf[4] = 0; 1952 nbuf[5] = 0; 1953 nbuf[6] = 0; 1954 nbuf[7] = 0; 1955 1956 #ifdef OBJ_ELF 1957 for (indx = 0; indx < 3; indx++) 1958 if (opcode->arg[indx] == A_IMM 1959 && operand[indx].type == A_IMM 1960 && (operand[indx].immediate.X_op == O_PIC_reloc 1961 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) 1962 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) 1963 unhandled_pic = 1; 1964 #endif 1965 1966 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 1967 { 1968 output = frag_more (4); 1969 size = 4; 1970 max_index = 8; 1971 } 1972 else 1973 output = frag_more (2); 1974 1975 for (indx = 0; indx < max_index; indx++) 1976 { 1977 sh_nibble_type i = opcode->nibbles[indx]; 1978 if (i < 16) 1979 { 1980 nbuf[indx] = i; 1981 } 1982 else 1983 { 1984 switch (i) 1985 { 1986 case REG_N: 1987 case REG_N_D: 1988 nbuf[indx] = reg_n; 1989 break; 1990 case REG_M: 1991 nbuf[indx] = reg_m; 1992 break; 1993 case SDT_REG_N: 1994 if (reg_n < 2 || reg_n > 5) 1995 as_bad (_("Invalid register: 'r%d'"), reg_n); 1996 nbuf[indx] = (reg_n & 3) | 4; 1997 break; 1998 case REG_NM: 1999 nbuf[indx] = reg_n | (reg_m >> 2); 2000 break; 2001 case REG_B: 2002 nbuf[indx] = reg_b | 0x08; 2003 break; 2004 case REG_N_B01: 2005 nbuf[indx] = reg_n | 0x01; 2006 break; 2007 case IMM0_3s: 2008 nbuf[indx] |= 0x08; 2009 /* Fall through. */ 2010 case IMM0_3c: 2011 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2012 break; 2013 case IMM0_3Us: 2014 nbuf[indx] |= 0x80; 2015 /* Fall through. */ 2016 case IMM0_3Uc: 2017 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2018 break; 2019 case DISP0_12: 2020 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2021 break; 2022 case DISP0_12BY2: 2023 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2024 break; 2025 case DISP0_12BY4: 2026 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2027 break; 2028 case DISP0_12BY8: 2029 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2030 break; 2031 case DISP1_12: 2032 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2033 break; 2034 case DISP1_12BY2: 2035 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2036 break; 2037 case DISP1_12BY4: 2038 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2039 break; 2040 case DISP1_12BY8: 2041 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2042 break; 2043 case IMM0_20_4: 2044 break; 2045 case IMM0_20: 2046 r_type = BFD_RELOC_SH_DISP20; 2047 #ifdef OBJ_ELF 2048 if (sh_check_fixup (&operand->immediate, &r_type)) 2049 as_bad (_("Invalid PIC expression.")); 2050 unhandled_pic = 0; 2051 #endif 2052 insert4 (output, r_type, 0, operand); 2053 break; 2054 case IMM0_20BY8: 2055 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2056 break; 2057 case IMM0_4BY4: 2058 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2059 break; 2060 case IMM0_4BY2: 2061 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2062 break; 2063 case IMM0_4: 2064 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2065 break; 2066 case IMM1_4BY4: 2067 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2068 break; 2069 case IMM1_4BY2: 2070 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2071 break; 2072 case IMM1_4: 2073 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2074 break; 2075 case IMM0_8BY4: 2076 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2077 break; 2078 case IMM0_8BY2: 2079 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2080 break; 2081 case IMM0_8U: 2082 case IMM0_8S: 2083 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2084 break; 2085 case IMM1_8BY4: 2086 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2087 break; 2088 case IMM1_8BY2: 2089 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2090 break; 2091 case IMM1_8: 2092 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2093 break; 2094 case PCRELIMM_8BY4: 2095 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2096 operand->type != A_DISP_PC_ABS, operand); 2097 break; 2098 case PCRELIMM_8BY2: 2099 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2100 operand->type != A_DISP_PC_ABS, operand); 2101 break; 2102 case REPEAT: 2103 output = insert_loop_bounds (output, operand); 2104 nbuf[indx] = opcode->nibbles[3]; 2105 operand += 2; 2106 break; 2107 default: 2108 printf (_("failed for %d\n"), i); 2109 } 2110 } 2111 } 2112 #ifdef OBJ_ELF 2113 if (unhandled_pic) 2114 as_bad (_("misplaced PIC operand")); 2115 #endif 2116 if (!target_big_endian) 2117 { 2118 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2119 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2120 } 2121 else 2122 { 2123 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2124 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2125 } 2126 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2127 { 2128 if (!target_big_endian) 2129 { 2130 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2131 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2132 } 2133 else 2134 { 2135 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2136 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2137 } 2138 } 2139 return size; 2140 } 2141 2142 /* Find an opcode at the start of *STR_P in the hash table, and set 2143 *STR_P to the first character after the last one read. */ 2144 2145 static sh_opcode_info * 2146 find_cooked_opcode (char **str_p) 2147 { 2148 char *str = *str_p; 2149 unsigned char *op_start; 2150 unsigned char *op_end; 2151 char name[20]; 2152 unsigned int nlen = 0; 2153 2154 /* Drop leading whitespace. */ 2155 while (*str == ' ') 2156 str++; 2157 2158 /* Find the op code end. 2159 The pre-processor will eliminate whitespace in front of 2160 any '@' after the first argument; we may be called from 2161 assemble_ppi, so the opcode might be terminated by an '@'. */ 2162 for (op_start = op_end = (unsigned char *) str; 2163 *op_end 2164 && nlen < sizeof (name) - 1 2165 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2166 op_end++) 2167 { 2168 unsigned char c = op_start[nlen]; 2169 2170 /* The machine independent code will convert CMP/EQ into cmp/EQ 2171 because it thinks the '/' is the end of the symbol. Moreover, 2172 all but the first sub-insn is a parallel processing insn won't 2173 be capitalized. Instead of hacking up the machine independent 2174 code, we just deal with it here. */ 2175 c = TOLOWER (c); 2176 name[nlen] = c; 2177 nlen++; 2178 } 2179 2180 name[nlen] = 0; 2181 *str_p = (char *) op_end; 2182 2183 if (nlen == 0) 2184 as_bad (_("can't find opcode ")); 2185 2186 return (sh_opcode_info *) str_hash_find (opcode_hash_control, name); 2187 } 2188 2189 /* Assemble a parallel processing insn. */ 2190 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2191 2192 static unsigned int 2193 assemble_ppi (char *op_end, sh_opcode_info *opcode) 2194 { 2195 unsigned int movx = 0; 2196 unsigned int movy = 0; 2197 unsigned int cond = 0; 2198 unsigned int field_b = 0; 2199 char *output; 2200 unsigned int move_code; 2201 unsigned int size; 2202 2203 for (;;) 2204 { 2205 sh_operand_info operand[3]; 2206 2207 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2208 Make sure we encode a defined insn pattern. */ 2209 reg_x = 0; 2210 reg_y = 0; 2211 reg_n = 0; 2212 2213 if (opcode->arg[0] != A_END) 2214 op_end = get_operands (opcode, op_end, operand); 2215 try_another_opcode: 2216 opcode = get_specific (opcode, operand); 2217 if (opcode == 0) 2218 { 2219 /* Couldn't find an opcode which matched the operands. */ 2220 char *where = frag_more (2); 2221 size = 2; 2222 2223 where[0] = 0x0; 2224 where[1] = 0x0; 2225 as_bad (_("invalid operands for opcode")); 2226 return size; 2227 } 2228 2229 if (opcode->nibbles[0] != PPI) 2230 as_bad (_("insn can't be combined with parallel processing insn")); 2231 2232 switch (opcode->nibbles[1]) 2233 { 2234 2235 case NOPX: 2236 if (movx) 2237 as_bad (_("multiple movx specifications")); 2238 movx = DDT_BASE; 2239 break; 2240 case NOPY: 2241 if (movy) 2242 as_bad (_("multiple movy specifications")); 2243 movy = DDT_BASE; 2244 break; 2245 2246 case MOVX_NOPY: 2247 if (movx) 2248 as_bad (_("multiple movx specifications")); 2249 if ((reg_n < 4 || reg_n > 5) 2250 && (reg_n < 0 || reg_n > 1)) 2251 as_bad (_("invalid movx address register")); 2252 if (movy && movy != DDT_BASE) 2253 as_bad (_("insn cannot be combined with non-nopy")); 2254 movx = ((((reg_n & 1) != 0) << 9) 2255 + (((reg_n & 4) == 0) << 8) 2256 + (reg_x << 6) 2257 + (opcode->nibbles[2] << 4) 2258 + opcode->nibbles[3] 2259 + DDT_BASE); 2260 break; 2261 2262 case MOVY_NOPX: 2263 if (movy) 2264 as_bad (_("multiple movy specifications")); 2265 if ((reg_n < 6 || reg_n > 7) 2266 && (reg_n < 2 || reg_n > 3)) 2267 as_bad (_("invalid movy address register")); 2268 if (movx && movx != DDT_BASE) 2269 as_bad (_("insn cannot be combined with non-nopx")); 2270 movy = ((((reg_n & 1) != 0) << 8) 2271 + (((reg_n & 4) == 0) << 9) 2272 + (reg_y << 6) 2273 + (opcode->nibbles[2] << 4) 2274 + opcode->nibbles[3] 2275 + DDT_BASE); 2276 break; 2277 2278 case MOVX: 2279 if (movx) 2280 as_bad (_("multiple movx specifications")); 2281 if (movy & 0x2ac) 2282 as_bad (_("previous movy requires nopx")); 2283 if (reg_n < 4 || reg_n > 5) 2284 as_bad (_("invalid movx address register")); 2285 if (opcode->nibbles[2] & 8) 2286 { 2287 if (reg_m == A_A1_NUM) 2288 movx = 1 << 7; 2289 else if (reg_m != A_A0_NUM) 2290 as_bad (_("invalid movx dsp register")); 2291 } 2292 else 2293 { 2294 if (reg_x > 1) 2295 as_bad (_("invalid movx dsp register")); 2296 movx = reg_x << 7; 2297 } 2298 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2299 break; 2300 2301 case MOVY: 2302 if (movy) 2303 as_bad (_("multiple movy specifications")); 2304 if (movx & 0x153) 2305 as_bad (_("previous movx requires nopy")); 2306 if (opcode->nibbles[2] & 8) 2307 { 2308 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2309 so add 8 more. */ 2310 movy = 8; 2311 if (reg_m == A_A1_NUM) 2312 movy += 1 << 6; 2313 else if (reg_m != A_A0_NUM) 2314 as_bad (_("invalid movy dsp register")); 2315 } 2316 else 2317 { 2318 if (reg_y > 1) 2319 as_bad (_("invalid movy dsp register")); 2320 movy = reg_y << 6; 2321 } 2322 if (reg_n < 6 || reg_n > 7) 2323 as_bad (_("invalid movy address register")); 2324 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2325 break; 2326 2327 case PSH: 2328 if (operand[0].immediate.X_op != O_constant) 2329 as_bad (_("dsp immediate shift value not constant")); 2330 field_b = ((opcode->nibbles[2] << 12) 2331 | (operand[0].immediate.X_add_number & 127) << 4 2332 | reg_n); 2333 break; 2334 case PPI3NC: 2335 if (cond) 2336 { 2337 opcode++; 2338 goto try_another_opcode; 2339 } 2340 /* Fall through. */ 2341 case PPI3: 2342 if (field_b) 2343 as_bad (_("multiple parallel processing specifications")); 2344 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2345 + (reg_x << 6) + (reg_y << 4) + reg_n); 2346 switch (opcode->nibbles[4]) 2347 { 2348 case HEX_0: 2349 case HEX_XX00: 2350 case HEX_00YY: 2351 break; 2352 case HEX_1: 2353 case HEX_4: 2354 field_b += opcode->nibbles[4] << 4; 2355 break; 2356 default: 2357 abort (); 2358 } 2359 break; 2360 case PDC: 2361 if (cond) 2362 as_bad (_("multiple condition specifications")); 2363 cond = opcode->nibbles[2] << 8; 2364 if (*op_end) 2365 goto skip_cond_check; 2366 break; 2367 case PPIC: 2368 if (field_b) 2369 as_bad (_("multiple parallel processing specifications")); 2370 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2371 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2372 cond = 0; 2373 switch (opcode->nibbles[4]) 2374 { 2375 case HEX_0: 2376 case HEX_XX00: 2377 case HEX_00YY: 2378 break; 2379 case HEX_1: 2380 case HEX_4: 2381 field_b += opcode->nibbles[4] << 4; 2382 break; 2383 default: 2384 abort (); 2385 } 2386 break; 2387 case PMUL: 2388 if (field_b) 2389 { 2390 if ((field_b & 0xef00) == 0xa100) 2391 field_b -= 0x8100; 2392 /* pclr Dz pmuls Se,Sf,Dg */ 2393 else if ((field_b & 0xff00) == 0x8d00 2394 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2395 { 2396 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2397 field_b -= 0x8cf0; 2398 } 2399 else 2400 as_bad (_("insn cannot be combined with pmuls")); 2401 switch (field_b & 0xf) 2402 { 2403 case A_X0_NUM: 2404 field_b += 0 - A_X0_NUM; 2405 break; 2406 case A_Y0_NUM: 2407 field_b += 1 - A_Y0_NUM; 2408 break; 2409 case A_A0_NUM: 2410 field_b += 2 - A_A0_NUM; 2411 break; 2412 case A_A1_NUM: 2413 field_b += 3 - A_A1_NUM; 2414 break; 2415 default: 2416 as_bad (_("bad combined pmuls output operand")); 2417 } 2418 /* Generate warning if the destination register for padd / psub 2419 and pmuls is the same ( only for A0 or A1 ). 2420 If the last nibble is 1010 then A0 is used in both 2421 padd / psub and pmuls. If it is 1111 then A1 is used 2422 as destination register in both padd / psub and pmuls. */ 2423 2424 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2425 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2426 as_warn (_("destination register is same for parallel insns")); 2427 } 2428 field_b += 0x4000 + reg_efg; 2429 break; 2430 default: 2431 abort (); 2432 } 2433 if (cond) 2434 { 2435 as_bad (_("condition not followed by conditionalizable insn")); 2436 cond = 0; 2437 } 2438 if (! *op_end) 2439 break; 2440 skip_cond_check: 2441 opcode = find_cooked_opcode (&op_end); 2442 if (opcode == NULL) 2443 { 2444 (as_bad 2445 (_("unrecognized characters at end of parallel processing insn"))); 2446 break; 2447 } 2448 } 2449 2450 move_code = movx | movy; 2451 if (field_b) 2452 { 2453 /* Parallel processing insn. */ 2454 unsigned int ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2455 2456 output = frag_more (4); 2457 size = 4; 2458 if (! target_big_endian) 2459 { 2460 output[3] = ppi_code >> 8; 2461 output[2] = ppi_code; 2462 } 2463 else 2464 { 2465 output[2] = ppi_code >> 8; 2466 output[3] = ppi_code; 2467 } 2468 move_code |= 0xf800; 2469 } 2470 else 2471 { 2472 /* Just a double data transfer. */ 2473 output = frag_more (2); 2474 size = 2; 2475 } 2476 if (! target_big_endian) 2477 { 2478 output[1] = move_code >> 8; 2479 output[0] = move_code; 2480 } 2481 else 2482 { 2483 output[0] = move_code >> 8; 2484 output[1] = move_code; 2485 } 2486 return size; 2487 } 2488 2489 /* This is the guts of the machine-dependent assembler. STR points to a 2490 machine dependent instruction. This function is supposed to emit 2491 the frags/bytes it assembles to. */ 2492 2493 void 2494 md_assemble (char *str) 2495 { 2496 char *op_end; 2497 sh_operand_info operand[3]; 2498 sh_opcode_info *opcode; 2499 unsigned int size = 0; 2500 char *initial_str = str; 2501 2502 opcode = find_cooked_opcode (&str); 2503 op_end = str; 2504 2505 if (opcode == NULL) 2506 { 2507 /* The opcode is not in the hash table. 2508 This means we definitely have an assembly failure, 2509 but the instruction may be valid in another CPU variant. 2510 In this case emit something better than 'unknown opcode'. 2511 Search the full table in sh-opc.h to check. */ 2512 2513 char *name = initial_str; 2514 int name_length = 0; 2515 const sh_opcode_info *op; 2516 bool found = false; 2517 2518 /* Identify opcode in string. */ 2519 while (ISSPACE (*name)) 2520 name++; 2521 2522 while (name[name_length] != '\0' && !ISSPACE (name[name_length])) 2523 name_length++; 2524 2525 /* Search for opcode in full list. */ 2526 for (op = sh_table; op->name; op++) 2527 { 2528 if (strncasecmp (op->name, name, name_length) == 0 2529 && op->name[name_length] == '\0') 2530 { 2531 found = true; 2532 break; 2533 } 2534 } 2535 2536 if (found) 2537 as_bad (_("opcode not valid for this cpu variant")); 2538 else 2539 as_bad (_("unknown opcode")); 2540 2541 return; 2542 } 2543 2544 if (sh_relax 2545 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2546 { 2547 /* Output a CODE reloc to tell the linker that the following 2548 bytes are instructions, not data. */ 2549 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2550 BFD_RELOC_SH_CODE); 2551 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2552 } 2553 2554 if (opcode->nibbles[0] == PPI) 2555 { 2556 size = assemble_ppi (op_end, opcode); 2557 } 2558 else 2559 { 2560 if (opcode->arg[0] == A_BDISP12 2561 || opcode->arg[0] == A_BDISP8) 2562 { 2563 /* Since we skip get_specific here, we have to check & update 2564 valid_arch now. */ 2565 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2566 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 2567 else 2568 as_bad (_("Delayed branches not available on SH1")); 2569 parse_exp (op_end + 1, &operand[0]); 2570 build_relax (opcode, &operand[0]); 2571 2572 /* All branches are currently 16 bit. */ 2573 size = 2; 2574 } 2575 else 2576 { 2577 if (opcode->arg[0] == A_END) 2578 { 2579 /* Ignore trailing whitespace. If there is any, it has already 2580 been compressed to a single space. */ 2581 if (*op_end == ' ') 2582 op_end++; 2583 } 2584 else 2585 { 2586 op_end = get_operands (opcode, op_end, operand); 2587 } 2588 opcode = get_specific (opcode, operand); 2589 2590 if (opcode == 0) 2591 { 2592 /* Couldn't find an opcode which matched the operands. */ 2593 char *where = frag_more (2); 2594 size = 2; 2595 2596 where[0] = 0x0; 2597 where[1] = 0x0; 2598 as_bad (_("invalid operands for opcode")); 2599 } 2600 else 2601 { 2602 if (*op_end) 2603 as_bad (_("excess operands: '%s'"), op_end); 2604 2605 size = build_Mytes (opcode, operand); 2606 } 2607 } 2608 } 2609 2610 dwarf2_emit_insn (size); 2611 } 2612 2613 /* This routine is called each time a label definition is seen. It 2614 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 2615 2616 void 2617 sh_frob_label (symbolS *sym) 2618 { 2619 static fragS *last_label_frag; 2620 static int last_label_offset; 2621 2622 if (sh_relax 2623 && seg_info (now_seg)->tc_segment_info_data.in_code) 2624 { 2625 int offset; 2626 2627 offset = frag_now_fix (); 2628 if (frag_now != last_label_frag 2629 || offset != last_label_offset) 2630 { 2631 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 2632 last_label_frag = frag_now; 2633 last_label_offset = offset; 2634 } 2635 } 2636 2637 dwarf2_emit_label (sym); 2638 } 2639 2640 /* This routine is called when the assembler is about to output some 2641 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 2642 2643 void 2644 sh_flush_pending_output (void) 2645 { 2646 if (sh_relax 2647 && seg_info (now_seg)->tc_segment_info_data.in_code) 2648 { 2649 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2650 BFD_RELOC_SH_DATA); 2651 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 2652 } 2653 } 2654 2655 symbolS * 2656 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 2657 { 2658 return 0; 2659 } 2660 2661 /* Various routines to kill one day. */ 2662 2663 const char * 2664 md_atof (int type, char *litP, int *sizeP) 2665 { 2666 return ieee_md_atof (type, litP, sizeP, target_big_endian); 2667 } 2668 2669 /* Handle the .uses pseudo-op. This pseudo-op is used just before a 2670 call instruction. It refers to a label of the instruction which 2671 loads the register which the call uses. We use it to generate a 2672 special reloc for the linker. */ 2673 2674 static void 2675 s_uses (int ignore ATTRIBUTE_UNUSED) 2676 { 2677 expressionS ex; 2678 2679 if (! sh_relax) 2680 as_warn (_(".uses pseudo-op seen when not relaxing")); 2681 2682 expression (&ex); 2683 2684 if (ex.X_op != O_symbol || ex.X_add_number != 0) 2685 { 2686 as_bad (_("bad .uses format")); 2687 ignore_rest_of_line (); 2688 return; 2689 } 2690 2691 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 2692 2693 demand_empty_rest_of_line (); 2694 } 2695 2696 enum options 2698 { 2699 OPTION_RELAX = OPTION_MD_BASE, 2700 OPTION_BIG, 2701 OPTION_LITTLE, 2702 OPTION_SMALL, 2703 OPTION_DSP, 2704 OPTION_ISA, 2705 OPTION_RENESAS, 2706 OPTION_ALLOW_REG_PREFIX, 2707 OPTION_H_TICK_HEX, 2708 #ifdef OBJ_ELF 2709 OPTION_FDPIC, 2710 #endif 2711 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 2712 }; 2713 2714 const char *md_shortopts = ""; 2715 struct option md_longopts[] = 2716 { 2717 {"relax", no_argument, NULL, OPTION_RELAX}, 2718 {"big", no_argument, NULL, OPTION_BIG}, 2719 {"little", no_argument, NULL, OPTION_LITTLE}, 2720 /* The next two switches are here because the 2721 generic parts of the linker testsuite uses them. */ 2722 {"EB", no_argument, NULL, OPTION_BIG}, 2723 {"EL", no_argument, NULL, OPTION_LITTLE}, 2724 {"small", no_argument, NULL, OPTION_SMALL}, 2725 {"dsp", no_argument, NULL, OPTION_DSP}, 2726 {"isa", required_argument, NULL, OPTION_ISA}, 2727 {"renesas", no_argument, NULL, OPTION_RENESAS}, 2728 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 2729 2730 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, 2731 2732 #ifdef OBJ_ELF 2733 {"fdpic", no_argument, NULL, OPTION_FDPIC}, 2734 #endif 2735 2736 {NULL, no_argument, NULL, 0} 2737 }; 2738 size_t md_longopts_size = sizeof (md_longopts); 2739 2740 int 2741 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 2742 { 2743 switch (c) 2744 { 2745 case OPTION_RELAX: 2746 sh_relax = 1; 2747 break; 2748 2749 case OPTION_BIG: 2750 target_big_endian = 1; 2751 break; 2752 2753 case OPTION_LITTLE: 2754 target_big_endian = 0; 2755 break; 2756 2757 case OPTION_SMALL: 2758 sh_small = 1; 2759 break; 2760 2761 case OPTION_DSP: 2762 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2763 break; 2764 2765 case OPTION_RENESAS: 2766 dont_adjust_reloc_32 = 1; 2767 break; 2768 2769 case OPTION_ALLOW_REG_PREFIX: 2770 allow_dollar_register_prefix = 1; 2771 break; 2772 2773 case OPTION_ISA: 2774 if (strcasecmp (arg, "dsp") == 0) 2775 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 2776 else if (strcasecmp (arg, "fp") == 0) 2777 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 2778 else if (strcasecmp (arg, "any") == 0) 2779 preset_target_arch = arch_sh_up; 2780 else 2781 { 2782 extern const bfd_arch_info_type bfd_sh_arch; 2783 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2784 2785 preset_target_arch = 0; 2786 for (; bfd_arch; bfd_arch=bfd_arch->next) 2787 { 2788 int len = strlen(bfd_arch->printable_name); 2789 2790 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 2791 continue; 2792 2793 if (arg[len] == '\0') 2794 preset_target_arch = 2795 sh_get_arch_from_bfd_mach (bfd_arch->mach); 2796 else if (strcasecmp(&arg[len], "-up") == 0) 2797 preset_target_arch = 2798 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 2799 else 2800 continue; 2801 break; 2802 } 2803 2804 if (!preset_target_arch) 2805 as_bad (_("Invalid argument to --isa option: %s"), arg); 2806 } 2807 break; 2808 2809 case OPTION_H_TICK_HEX: 2810 enable_h_tick_hex = 1; 2811 break; 2812 2813 #ifdef OBJ_ELF 2814 case OPTION_FDPIC: 2815 sh_fdpic = true; 2816 break; 2817 #endif /* OBJ_ELF */ 2818 2819 default: 2820 return 0; 2821 } 2822 2823 return 1; 2824 } 2825 2826 void 2827 md_show_usage (FILE *stream) 2828 { 2829 fprintf (stream, _("\ 2830 SH options:\n\ 2831 --little generate little endian code\n\ 2832 --big generate big endian code\n\ 2833 --relax alter jump instructions for long displacements\n\ 2834 --renesas disable optimization with section symbol for\n\ 2835 compatibility with Renesas assembler.\n\ 2836 --small align sections to 4 byte boundaries, not 16\n\ 2837 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 2838 --allow-reg-prefix allow '$' as a register name prefix.\n\ 2839 --isa=[any use most appropriate isa\n\ 2840 | dsp same as '-dsp'\n\ 2841 | fp")); 2842 { 2843 extern const bfd_arch_info_type bfd_sh_arch; 2844 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 2845 2846 for (; bfd_arch; bfd_arch=bfd_arch->next) 2847 { 2848 fprintf (stream, "\n | %s", bfd_arch->printable_name); 2849 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 2850 } 2851 } 2852 fprintf (stream, "]\n"); 2853 #ifdef OBJ_ELF 2854 fprintf (stream, _("\ 2855 --fdpic generate an FDPIC object file\n")); 2856 #endif /* OBJ_ELF */ 2857 } 2858 2859 /* This struct is used to pass arguments to sh_count_relocs through 2861 bfd_map_over_sections. */ 2862 2863 struct sh_count_relocs 2864 { 2865 /* Symbol we are looking for. */ 2866 symbolS *sym; 2867 /* Count of relocs found. */ 2868 int count; 2869 }; 2870 2871 /* Count the number of fixups in a section which refer to a particular 2872 symbol. This is called via bfd_map_over_sections. */ 2873 2874 static void 2875 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 2876 { 2877 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 2878 segment_info_type *seginfo; 2879 symbolS *sym; 2880 fixS *fix; 2881 2882 seginfo = seg_info (sec); 2883 if (seginfo == NULL) 2884 return; 2885 2886 sym = info->sym; 2887 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2888 { 2889 if (fix->fx_addsy == sym) 2890 { 2891 ++info->count; 2892 fix->fx_tcbit = 1; 2893 } 2894 } 2895 } 2896 2897 /* Handle the count relocs for a particular section. 2898 This is called via bfd_map_over_sections. */ 2899 2900 static void 2901 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 2902 void *ignore ATTRIBUTE_UNUSED) 2903 { 2904 segment_info_type *seginfo; 2905 fixS *fix; 2906 2907 seginfo = seg_info (sec); 2908 if (seginfo == NULL) 2909 return; 2910 2911 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 2912 { 2913 symbolS *sym; 2914 bfd_vma val; 2915 fixS *fscan; 2916 struct sh_count_relocs info; 2917 2918 if (fix->fx_r_type != BFD_RELOC_SH_USES) 2919 continue; 2920 2921 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 2922 symbol in the same section. */ 2923 sym = fix->fx_addsy; 2924 if (sym == NULL 2925 || fix->fx_subsy != NULL 2926 || fix->fx_addnumber != 0 2927 || S_GET_SEGMENT (sym) != sec 2928 || S_IS_EXTERNAL (sym)) 2929 { 2930 as_warn_where (fix->fx_file, fix->fx_line, 2931 _(".uses does not refer to a local symbol in the same section")); 2932 continue; 2933 } 2934 2935 /* Look through the fixups again, this time looking for one 2936 at the same location as sym. */ 2937 val = S_GET_VALUE (sym); 2938 for (fscan = seginfo->fix_root; 2939 fscan != NULL; 2940 fscan = fscan->fx_next) 2941 if (val == fscan->fx_frag->fr_address + fscan->fx_where 2942 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 2943 && fscan->fx_r_type != BFD_RELOC_SH_CODE 2944 && fscan->fx_r_type != BFD_RELOC_SH_DATA 2945 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 2946 break; 2947 if (fscan == NULL) 2948 { 2949 as_warn_where (fix->fx_file, fix->fx_line, 2950 _("can't find fixup pointed to by .uses")); 2951 continue; 2952 } 2953 2954 if (fscan->fx_tcbit) 2955 { 2956 /* We've already done this one. */ 2957 continue; 2958 } 2959 2960 /* The variable fscan should also be a fixup to a local symbol 2961 in the same section. */ 2962 sym = fscan->fx_addsy; 2963 if (sym == NULL 2964 || fscan->fx_subsy != NULL 2965 || fscan->fx_addnumber != 0 2966 || S_GET_SEGMENT (sym) != sec 2967 || S_IS_EXTERNAL (sym)) 2968 { 2969 as_warn_where (fix->fx_file, fix->fx_line, 2970 _(".uses target does not refer to a local symbol in the same section")); 2971 continue; 2972 } 2973 2974 /* Now we look through all the fixups of all the sections, 2975 counting the number of times we find a reference to sym. */ 2976 info.sym = sym; 2977 info.count = 0; 2978 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 2979 2980 if (info.count < 1) 2981 abort (); 2982 2983 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 2984 We have already adjusted the value of sym to include the 2985 fragment address, so we undo that adjustment here. */ 2986 subseg_change (sec, 0); 2987 fix_new (fscan->fx_frag, 2988 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 2989 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 2990 } 2991 } 2992 2993 /* This function is called after the symbol table has been completed, 2994 but before the relocs or section contents have been written out. 2995 If we have seen any .uses pseudo-ops, they point to an instruction 2996 which loads a register with the address of a function. We look 2997 through the fixups to find where the function address is being 2998 loaded from. We then generate a COUNT reloc giving the number of 2999 times that function address is referred to. The linker uses this 3000 information when doing relaxing, to decide when it can eliminate 3001 the stored function address entirely. */ 3002 3003 void 3004 sh_frob_file (void) 3005 { 3006 if (! sh_relax) 3007 return; 3008 3009 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3010 } 3011 3012 /* Called after relaxing. Set the correct sizes of the fragments, and 3013 create relocs so that md_apply_fix will fill in the correct values. */ 3014 3015 void 3016 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3017 { 3018 int donerelax = 0; 3019 3020 switch (fragP->fr_subtype) 3021 { 3022 case C (COND_JUMP, COND8): 3023 case C (COND_JUMP_DELAY, COND8): 3024 subseg_change (seg, 0); 3025 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3026 1, BFD_RELOC_SH_PCDISP8BY2); 3027 fragP->fr_fix += 2; 3028 fragP->fr_var = 0; 3029 break; 3030 3031 case C (UNCOND_JUMP, UNCOND12): 3032 subseg_change (seg, 0); 3033 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3034 1, BFD_RELOC_SH_PCDISP12BY2); 3035 fragP->fr_fix += 2; 3036 fragP->fr_var = 0; 3037 break; 3038 3039 case C (UNCOND_JUMP, UNCOND32): 3040 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3041 if (fragP->fr_symbol == NULL) 3042 as_bad_where (fragP->fr_file, fragP->fr_line, 3043 _("displacement overflows 12-bit field")); 3044 else if (S_IS_DEFINED (fragP->fr_symbol)) 3045 as_bad_where (fragP->fr_file, fragP->fr_line, 3046 _("displacement to defined symbol %s overflows 12-bit field"), 3047 S_GET_NAME (fragP->fr_symbol)); 3048 else 3049 as_bad_where (fragP->fr_file, fragP->fr_line, 3050 _("displacement to undefined symbol %s overflows 12-bit field"), 3051 S_GET_NAME (fragP->fr_symbol)); 3052 /* Stabilize this frag, so we don't trip an assert. */ 3053 fragP->fr_fix += fragP->fr_var; 3054 fragP->fr_var = 0; 3055 break; 3056 3057 case C (COND_JUMP, COND12): 3058 case C (COND_JUMP_DELAY, COND12): 3059 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3060 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3061 was due to gas incorrectly relaxing an out-of-range conditional 3062 branch with delay slot. It turned: 3063 bf.s L6 (slot mov.l r12,@(44,r0)) 3064 into: 3065 3066 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 3067 30: 00 09 nop 3068 32: 10 cb mov.l r12,@(44,r0) 3069 Therefore, branches with delay slots have to be handled 3070 differently from ones without delay slots. */ 3071 { 3072 unsigned char *buffer = 3073 (unsigned char *) (fragP->fr_fix + &fragP->fr_literal[0]); 3074 int highbyte = target_big_endian ? 0 : 1; 3075 int lowbyte = target_big_endian ? 1 : 0; 3076 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3077 3078 /* Toggle the true/false bit of the bcond. */ 3079 buffer[highbyte] ^= 0x2; 3080 3081 /* If this is a delayed branch, we may not put the bra in the 3082 slot. So we change it to a non-delayed branch, like that: 3083 b! cond slot_label; bra disp; slot_label: slot_insn 3084 ??? We should try if swapping the conditional branch and 3085 its delay-slot insn already makes the branch reach. */ 3086 3087 /* Build a relocation to six / four bytes farther on. */ 3088 subseg_change (seg, 0); 3089 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3090 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3091 1, BFD_RELOC_SH_PCDISP8BY2); 3092 3093 /* Set up a jump instruction. */ 3094 buffer[highbyte + 2] = 0xa0; 3095 buffer[lowbyte + 2] = 0; 3096 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3097 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3098 3099 if (delay) 3100 { 3101 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3102 fragP->fr_fix += 4; 3103 } 3104 else 3105 { 3106 /* Fill in a NOP instruction. */ 3107 buffer[highbyte + 4] = 0x0; 3108 buffer[lowbyte + 4] = 0x9; 3109 3110 fragP->fr_fix += 6; 3111 } 3112 fragP->fr_var = 0; 3113 donerelax = 1; 3114 } 3115 break; 3116 3117 case C (COND_JUMP, COND32): 3118 case C (COND_JUMP_DELAY, COND32): 3119 case C (COND_JUMP, UNDEF_WORD_DISP): 3120 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3121 if (fragP->fr_symbol == NULL) 3122 as_bad_where (fragP->fr_file, fragP->fr_line, 3123 _("displacement overflows 8-bit field")); 3124 else if (S_IS_DEFINED (fragP->fr_symbol)) 3125 as_bad_where (fragP->fr_file, fragP->fr_line, 3126 _("displacement to defined symbol %s overflows 8-bit field"), 3127 S_GET_NAME (fragP->fr_symbol)); 3128 else 3129 as_bad_where (fragP->fr_file, fragP->fr_line, 3130 _("displacement to undefined symbol %s overflows 8-bit field "), 3131 S_GET_NAME (fragP->fr_symbol)); 3132 /* Stabilize this frag, so we don't trip an assert. */ 3133 fragP->fr_fix += fragP->fr_var; 3134 fragP->fr_var = 0; 3135 break; 3136 3137 default: 3138 abort (); 3139 } 3140 3141 if (donerelax && !sh_relax) 3142 as_warn_where (fragP->fr_file, fragP->fr_line, 3143 _("overflow in branch to %s; converted into longer instruction sequence"), 3144 (fragP->fr_symbol != NULL 3145 ? S_GET_NAME (fragP->fr_symbol) 3146 : "")); 3147 } 3148 3149 valueT 3150 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3151 { 3152 #ifdef OBJ_ELF 3153 return size; 3154 #else /* ! OBJ_ELF */ 3155 return ((size + (1 << bfd_section_alignment (seg)) - 1) 3156 & -(1 << bfd_section_alignment (seg))); 3157 #endif /* ! OBJ_ELF */ 3158 } 3159 3160 /* This static variable is set by s_uacons to tell sh_cons_align that 3161 the expression does not need to be aligned. */ 3162 3163 static int sh_no_align_cons = 0; 3164 3165 /* This handles the unaligned space allocation pseudo-ops, such as 3166 .uaword. .uaword is just like .word, but the value does not need 3167 to be aligned. */ 3168 3169 static void 3170 s_uacons (int bytes) 3171 { 3172 /* Tell sh_cons_align not to align this value. */ 3173 sh_no_align_cons = 1; 3174 cons (bytes); 3175 } 3176 3177 /* If a .word, et. al., pseud-op is seen, warn if the value is not 3178 aligned correctly. Note that this can cause warnings to be issued 3179 when assembling initialized structured which were declared with the 3180 packed attribute. FIXME: Perhaps we should require an option to 3181 enable this warning? */ 3182 3183 void 3184 sh_cons_align (int nbytes) 3185 { 3186 int nalign; 3187 3188 if (sh_no_align_cons) 3189 { 3190 /* This is an unaligned pseudo-op. */ 3191 sh_no_align_cons = 0; 3192 return; 3193 } 3194 3195 nalign = 0; 3196 while ((nbytes & 1) == 0) 3197 { 3198 ++nalign; 3199 nbytes >>= 1; 3200 } 3201 3202 if (nalign == 0) 3203 return; 3204 3205 if (now_seg == absolute_section) 3206 { 3207 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3208 as_warn (_("misaligned data")); 3209 return; 3210 } 3211 3212 frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3213 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3214 3215 record_alignment (now_seg, nalign); 3216 } 3217 3218 /* When relaxing, we need to output a reloc for any .align directive 3219 that requests alignment to a four byte boundary or larger. This is 3220 also where we check for misaligned data. */ 3221 3222 void 3223 sh_handle_align (fragS *frag) 3224 { 3225 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3226 3227 if (frag->fr_type == rs_align_code) 3228 { 3229 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3230 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3231 3232 char *p = frag->fr_literal + frag->fr_fix; 3233 3234 if (bytes & 1) 3235 { 3236 *p++ = 0; 3237 bytes--; 3238 frag->fr_fix += 1; 3239 } 3240 3241 if (target_big_endian) 3242 { 3243 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3244 frag->fr_var = sizeof big_nop_pattern; 3245 } 3246 else 3247 { 3248 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3249 frag->fr_var = sizeof little_nop_pattern; 3250 } 3251 } 3252 else if (frag->fr_type == rs_align_test) 3253 { 3254 if (bytes != 0) 3255 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3256 } 3257 3258 if (sh_relax 3259 && (frag->fr_type == rs_align 3260 || frag->fr_type == rs_align_code) 3261 && frag->fr_address + frag->fr_fix > 0 3262 && frag->fr_offset > 1 3263 && now_seg != bss_section) 3264 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3265 BFD_RELOC_SH_ALIGN); 3266 } 3267 3268 /* See whether the relocation should be resolved locally. */ 3269 3270 static bool 3271 sh_local_pcrel (fixS *fix) 3272 { 3273 return (! sh_relax 3274 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3275 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3276 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3277 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3278 || fix->fx_r_type == BFD_RELOC_8_PCREL 3279 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3280 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3281 } 3282 3283 /* See whether we need to force a relocation into the output file. 3284 This is used to force out switch and PC relative relocations when 3285 relaxing. */ 3286 3287 int 3288 sh_force_relocation (fixS *fix) 3289 { 3290 /* These relocations can't make it into a DSO, so no use forcing 3291 them for global symbols. */ 3292 if (sh_local_pcrel (fix)) 3293 return 0; 3294 3295 /* Make sure some relocations get emitted. */ 3296 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3297 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3298 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3299 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3300 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3301 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3302 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3303 || generic_force_reloc (fix)) 3304 return 1; 3305 3306 if (! sh_relax) 3307 return 0; 3308 3309 return (fix->fx_pcrel 3310 || SWITCH_TABLE (fix) 3311 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3312 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3313 || fix->fx_r_type == BFD_RELOC_SH_CODE 3314 || fix->fx_r_type == BFD_RELOC_SH_DATA 3315 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3316 } 3317 3318 #ifdef OBJ_ELF 3319 bool 3320 sh_fix_adjustable (fixS *fixP) 3321 { 3322 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3323 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3324 || fixP->fx_r_type == BFD_RELOC_SH_GOT20 3325 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3326 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC 3327 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 3328 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC 3329 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 3330 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC 3331 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3332 || fixP->fx_r_type == BFD_RELOC_RVA) 3333 return 0; 3334 3335 /* We need the symbol name for the VTABLE entries */ 3336 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3337 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3338 return 0; 3339 3340 return 1; 3341 } 3342 3343 void 3344 sh_elf_final_processing (void) 3345 { 3346 int val; 3347 3348 /* Set file-specific flags to indicate if this code needs 3349 a processor with the sh-dsp / sh2e ISA to execute. */ 3350 val = sh_find_elf_flags (valid_arch); 3351 3352 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3353 elf_elfheader (stdoutput)->e_flags |= val; 3354 3355 if (sh_fdpic) 3356 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; 3357 } 3358 #endif 3359 3360 #ifdef TE_UCLINUX 3361 /* Return the target format for uClinux. */ 3362 3363 const char * 3364 sh_uclinux_target_format (void) 3365 { 3366 if (sh_fdpic) 3367 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); 3368 else 3369 return (!target_big_endian ? "elf32-shl" : "elf32-sh"); 3370 } 3371 #endif 3372 3373 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its 3374 assembly-time value. If we're generating a reloc for FIXP, 3375 see whether the addend should be stored in-place or whether 3376 it should be in an ELF r_addend field. */ 3377 3378 static void 3379 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) 3380 { 3381 reloc_howto_type *howto; 3382 3383 if (fixP->fx_addsy != NULL || fixP->fx_pcrel) 3384 { 3385 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 3386 if (howto && !howto->partial_inplace) 3387 { 3388 fixP->fx_addnumber = val; 3389 return; 3390 } 3391 } 3392 md_number_to_chars (buf, val, size); 3393 } 3394 3395 /* Apply a fixup to the object file. */ 3396 3397 void 3398 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3399 { 3400 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3401 int lowbyte = target_big_endian ? 1 : 0; 3402 int highbyte = target_big_endian ? 0 : 1; 3403 long val = (long) *valP; 3404 long max, min; 3405 int shift; 3406 3407 /* A difference between two symbols, the second of which is in the 3408 current section, is transformed in a PC-relative relocation to 3409 the other symbol. We have to adjust the relocation type here. */ 3410 if (fixP->fx_pcrel) 3411 { 3412 switch (fixP->fx_r_type) 3413 { 3414 default: 3415 break; 3416 3417 case BFD_RELOC_32: 3418 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3419 break; 3420 3421 /* Currently, we only support 32-bit PCREL relocations. 3422 We'd need a new reloc type to handle 16_PCREL, and 3423 8_PCREL is already taken for R_SH_SWITCH8, which 3424 apparently does something completely different than what 3425 we need. FIXME. */ 3426 case BFD_RELOC_16: 3427 bfd_set_error (bfd_error_bad_value); 3428 return; 3429 3430 case BFD_RELOC_8: 3431 bfd_set_error (bfd_error_bad_value); 3432 return; 3433 } 3434 } 3435 3436 /* The function adjust_reloc_syms won't convert a reloc against a weak 3437 symbol into a reloc against a section, but bfd_install_relocation 3438 will screw up if the symbol is defined, so we have to adjust val here 3439 to avoid the screw up later. 3440 3441 For ordinary relocs, this does not happen for ELF, since for ELF, 3442 bfd_install_relocation uses the "special function" field of the 3443 howto, and does not execute the code that needs to be undone, as long 3444 as the special function does not return bfd_reloc_continue. 3445 It can happen for GOT- and PLT-type relocs the way they are 3446 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 3447 doesn't matter here since those relocs don't use VAL; see below. */ 3448 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 3449 && fixP->fx_addsy != NULL 3450 && S_IS_WEAK (fixP->fx_addsy)) 3451 val -= S_GET_VALUE (fixP->fx_addsy); 3452 3453 if (SWITCH_TABLE (fixP)) 3454 val -= S_GET_VALUE (fixP->fx_subsy); 3455 3456 max = min = 0; 3457 shift = 0; 3458 switch (fixP->fx_r_type) 3459 { 3460 case BFD_RELOC_SH_IMM3: 3461 max = 0x7; 3462 * buf = (* buf & 0xf8) | (val & 0x7); 3463 break; 3464 case BFD_RELOC_SH_IMM3U: 3465 max = 0x7; 3466 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 3467 break; 3468 case BFD_RELOC_SH_DISP12: 3469 max = 0xfff; 3470 buf[lowbyte] = val & 0xff; 3471 buf[highbyte] |= (val >> 8) & 0x0f; 3472 break; 3473 case BFD_RELOC_SH_DISP12BY2: 3474 max = 0xfff; 3475 shift = 1; 3476 buf[lowbyte] = (val >> 1) & 0xff; 3477 buf[highbyte] |= (val >> 9) & 0x0f; 3478 break; 3479 case BFD_RELOC_SH_DISP12BY4: 3480 max = 0xfff; 3481 shift = 2; 3482 buf[lowbyte] = (val >> 2) & 0xff; 3483 buf[highbyte] |= (val >> 10) & 0x0f; 3484 break; 3485 case BFD_RELOC_SH_DISP12BY8: 3486 max = 0xfff; 3487 shift = 3; 3488 buf[lowbyte] = (val >> 3) & 0xff; 3489 buf[highbyte] |= (val >> 11) & 0x0f; 3490 break; 3491 case BFD_RELOC_SH_DISP20: 3492 if (! target_big_endian) 3493 abort(); 3494 max = 0x7ffff; 3495 min = -0x80000; 3496 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 3497 buf[2] = (val >> 8) & 0xff; 3498 buf[3] = val & 0xff; 3499 break; 3500 case BFD_RELOC_SH_DISP20BY8: 3501 if (!target_big_endian) 3502 abort(); 3503 max = 0x7ffff; 3504 min = -0x80000; 3505 shift = 8; 3506 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 3507 buf[2] = (val >> 16) & 0xff; 3508 buf[3] = (val >> 8) & 0xff; 3509 break; 3510 3511 case BFD_RELOC_SH_IMM4: 3512 max = 0xf; 3513 *buf = (*buf & 0xf0) | (val & 0xf); 3514 break; 3515 3516 case BFD_RELOC_SH_IMM4BY2: 3517 max = 0xf; 3518 shift = 1; 3519 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 3520 break; 3521 3522 case BFD_RELOC_SH_IMM4BY4: 3523 max = 0xf; 3524 shift = 2; 3525 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 3526 break; 3527 3528 case BFD_RELOC_SH_IMM8BY2: 3529 max = 0xff; 3530 shift = 1; 3531 *buf = val >> 1; 3532 break; 3533 3534 case BFD_RELOC_SH_IMM8BY4: 3535 max = 0xff; 3536 shift = 2; 3537 *buf = val >> 2; 3538 break; 3539 3540 case BFD_RELOC_8: 3541 case BFD_RELOC_SH_IMM8: 3542 /* Sometimes the 8 bit value is sign extended (e.g., add) and 3543 sometimes it is not (e.g., and). We permit any 8 bit value. 3544 Note that adding further restrictions may invalidate 3545 reasonable looking assembly code, such as ``and -0x1,r0''. */ 3546 max = 0xff; 3547 min = -0xff; 3548 *buf++ = val; 3549 break; 3550 3551 case BFD_RELOC_SH_PCRELIMM8BY4: 3552 /* If we are dealing with a known destination ... */ 3553 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) 3554 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) 3555 { 3556 /* Don't silently move the destination due to misalignment. 3557 The absolute address is the fragment base plus the offset into 3558 the fragment plus the pc relative offset to the label. */ 3559 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) 3560 as_bad_where (fixP->fx_file, fixP->fx_line, 3561 _("offset to unaligned destination")); 3562 3563 /* The displacement cannot be zero or backward even if aligned. 3564 Allow -2 because val has already been adjusted somewhere. */ 3565 if (val < -2) 3566 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); 3567 } 3568 3569 /* The lower two bits of the PC are cleared before the 3570 displacement is added in. We can assume that the destination 3571 is on a 4 byte boundary. If this instruction is also on a 4 3572 byte boundary, then we want 3573 (target - here) / 4 3574 and target - here is a multiple of 4. 3575 Otherwise, we are on a 2 byte boundary, and we want 3576 (target - (here - 2)) / 4 3577 and target - here is not a multiple of 4. Computing 3578 (target - (here - 2)) / 4 == (target - here + 2) / 4 3579 works for both cases, since in the first case the addition of 3580 2 will be removed by the division. target - here is in the 3581 variable val. */ 3582 val = (val + 2) / 4; 3583 if (val & ~0xff) 3584 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3585 buf[lowbyte] = val; 3586 break; 3587 3588 case BFD_RELOC_SH_PCRELIMM8BY2: 3589 val /= 2; 3590 if (val & ~0xff) 3591 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3592 buf[lowbyte] = val; 3593 break; 3594 3595 case BFD_RELOC_SH_PCDISP8BY2: 3596 val /= 2; 3597 if (val < -0x80 || val > 0x7f) 3598 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3599 buf[lowbyte] = val; 3600 break; 3601 3602 case BFD_RELOC_SH_PCDISP12BY2: 3603 val /= 2; 3604 if (val < -0x800 || val > 0x7ff) 3605 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 3606 buf[lowbyte] = val & 0xff; 3607 buf[highbyte] |= (val >> 8) & 0xf; 3608 break; 3609 3610 case BFD_RELOC_32: 3611 case BFD_RELOC_32_PCREL: 3612 apply_full_field_fix (fixP, buf, val, 4); 3613 break; 3614 3615 case BFD_RELOC_16: 3616 apply_full_field_fix (fixP, buf, val, 2); 3617 break; 3618 3619 case BFD_RELOC_SH_USES: 3620 /* Pass the value into sh_reloc(). */ 3621 fixP->fx_addnumber = val; 3622 break; 3623 3624 case BFD_RELOC_SH_COUNT: 3625 case BFD_RELOC_SH_ALIGN: 3626 case BFD_RELOC_SH_CODE: 3627 case BFD_RELOC_SH_DATA: 3628 case BFD_RELOC_SH_LABEL: 3629 /* Nothing to do here. */ 3630 break; 3631 3632 case BFD_RELOC_SH_LOOP_START: 3633 case BFD_RELOC_SH_LOOP_END: 3634 3635 case BFD_RELOC_VTABLE_INHERIT: 3636 case BFD_RELOC_VTABLE_ENTRY: 3637 fixP->fx_done = 0; 3638 return; 3639 3640 #ifdef OBJ_ELF 3641 case BFD_RELOC_32_PLT_PCREL: 3642 /* Make the jump instruction point to the address of the operand. At 3643 runtime we merely add the offset to the actual PLT entry. */ 3644 * valP = 0xfffffffc; 3645 val = fixP->fx_offset; 3646 if (fixP->fx_subsy) 3647 val -= S_GET_VALUE (fixP->fx_subsy); 3648 apply_full_field_fix (fixP, buf, val, 4); 3649 break; 3650 3651 case BFD_RELOC_SH_GOTPC: 3652 /* This is tough to explain. We end up with this one if we have 3653 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 3654 The goal here is to obtain the absolute address of the GOT, 3655 and it is strongly preferable from a performance point of 3656 view to avoid using a runtime relocation for this. There are 3657 cases where you have something like: 3658 3659 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 3660 3661 and here no correction would be required. Internally in the 3662 assembler we treat operands of this form as not being pcrel 3663 since the '.' is explicitly mentioned, and I wonder whether 3664 it would simplify matters to do it this way. Who knows. In 3665 earlier versions of the PIC patches, the pcrel_adjust field 3666 was used to store the correction, but since the expression is 3667 not pcrel, I felt it would be confusing to do it this way. */ 3668 * valP -= 1; 3669 apply_full_field_fix (fixP, buf, val, 4); 3670 break; 3671 3672 case BFD_RELOC_SH_TLS_GD_32: 3673 case BFD_RELOC_SH_TLS_LD_32: 3674 case BFD_RELOC_SH_TLS_IE_32: 3675 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3676 /* Fallthrough */ 3677 case BFD_RELOC_32_GOT_PCREL: 3678 case BFD_RELOC_SH_GOT20: 3679 case BFD_RELOC_SH_GOTPLT32: 3680 case BFD_RELOC_SH_GOTFUNCDESC: 3681 case BFD_RELOC_SH_GOTFUNCDESC20: 3682 case BFD_RELOC_SH_GOTOFFFUNCDESC: 3683 case BFD_RELOC_SH_GOTOFFFUNCDESC20: 3684 case BFD_RELOC_SH_FUNCDESC: 3685 * valP = 0; /* Fully resolved at runtime. No addend. */ 3686 apply_full_field_fix (fixP, buf, 0, 4); 3687 break; 3688 3689 case BFD_RELOC_SH_TLS_LDO_32: 3690 case BFD_RELOC_SH_TLS_LE_32: 3691 S_SET_THREAD_LOCAL (fixP->fx_addsy); 3692 /* Fallthrough */ 3693 case BFD_RELOC_32_GOTOFF: 3694 case BFD_RELOC_SH_GOTOFF20: 3695 apply_full_field_fix (fixP, buf, val, 4); 3696 break; 3697 #endif 3698 3699 default: 3700 abort (); 3701 } 3702 3703 if (shift != 0) 3704 { 3705 if ((val & ((1 << shift) - 1)) != 0) 3706 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 3707 if (val >= 0) 3708 val >>= shift; 3709 else 3710 val = ((val >> shift) 3711 | ((long) -1 & ~ ((long) -1 >> shift))); 3712 } 3713 3714 /* Extend sign for 64-bit host. */ 3715 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; 3716 if (max != 0 && (val < min || val > max)) 3717 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 3718 else if (max != 0) 3719 /* Stop the generic code from trying to overflow check the value as well. 3720 It may not have the correct value anyway, as we do not store val back 3721 into *valP. */ 3722 fixP->fx_no_overflow = 1; 3723 3724 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 3725 fixP->fx_done = 1; 3726 } 3727 3728 /* Called just before address relaxation. Return the length 3729 by which a fragment must grow to reach it's destination. */ 3730 3731 int 3732 md_estimate_size_before_relax (fragS *fragP, segT segment_type) 3733 { 3734 int what; 3735 3736 switch (fragP->fr_subtype) 3737 { 3738 default: 3739 abort (); 3740 3741 case C (UNCOND_JUMP, UNDEF_DISP): 3742 /* Used to be a branch to somewhere which was unknown. */ 3743 if (!fragP->fr_symbol) 3744 { 3745 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3746 } 3747 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3748 { 3749 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 3750 } 3751 else 3752 { 3753 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 3754 } 3755 break; 3756 3757 case C (COND_JUMP, UNDEF_DISP): 3758 case C (COND_JUMP_DELAY, UNDEF_DISP): 3759 what = GET_WHAT (fragP->fr_subtype); 3760 /* Used to be a branch to somewhere which was unknown. */ 3761 if (fragP->fr_symbol 3762 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 3763 { 3764 /* Got a symbol and it's defined in this segment, become byte 3765 sized - maybe it will fix up. */ 3766 fragP->fr_subtype = C (what, COND8); 3767 } 3768 else if (fragP->fr_symbol) 3769 { 3770 /* It's got a segment, but it's not ours, so it will always be long. */ 3771 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 3772 } 3773 else 3774 { 3775 /* We know the abs value. */ 3776 fragP->fr_subtype = C (what, COND8); 3777 } 3778 break; 3779 3780 case C (UNCOND_JUMP, UNCOND12): 3781 case C (UNCOND_JUMP, UNCOND32): 3782 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3783 case C (COND_JUMP, COND8): 3784 case C (COND_JUMP, COND12): 3785 case C (COND_JUMP, COND32): 3786 case C (COND_JUMP, UNDEF_WORD_DISP): 3787 case C (COND_JUMP_DELAY, COND8): 3788 case C (COND_JUMP_DELAY, COND12): 3789 case C (COND_JUMP_DELAY, COND32): 3790 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3791 /* When relaxing a section for the second time, we don't need to 3792 do anything besides return the current size. */ 3793 break; 3794 } 3795 3796 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 3797 return fragP->fr_var; 3798 } 3799 3800 /* Put number into target byte order. */ 3801 3802 void 3803 md_number_to_chars (char *ptr, valueT use, int nbytes) 3804 { 3805 if (! target_big_endian) 3806 number_to_chars_littleendian (ptr, use, nbytes); 3807 else 3808 number_to_chars_bigendian (ptr, use, nbytes); 3809 } 3810 3811 /* This version is used in obj-coff.c eg. for the sh-hms target. */ 3812 3813 long 3814 md_pcrel_from (fixS *fixP) 3815 { 3816 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 3817 } 3818 3819 long 3820 md_pcrel_from_section (fixS *fixP, segT sec) 3821 { 3822 if (! sh_local_pcrel (fixP) 3823 && fixP->fx_addsy != (symbolS *) NULL 3824 && (generic_force_reloc (fixP) 3825 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 3826 { 3827 /* The symbol is undefined (or is defined but not in this section, 3828 or we're not sure about it being the final definition). Let the 3829 linker figure it out. We need to adjust the subtraction of a 3830 symbol to the position of the relocated data, though. */ 3831 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 3832 } 3833 3834 return md_pcrel_from (fixP); 3835 } 3836 3837 /* Create a reloc. */ 3838 3839 arelent * 3840 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 3841 { 3842 arelent *rel; 3843 bfd_reloc_code_real_type r_type; 3844 3845 rel = XNEW (arelent); 3846 rel->sym_ptr_ptr = XNEW (asymbol *); 3847 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 3848 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 3849 3850 r_type = fixp->fx_r_type; 3851 3852 if (SWITCH_TABLE (fixp)) 3853 { 3854 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 3855 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); 3856 if (r_type == BFD_RELOC_16) 3857 r_type = BFD_RELOC_SH_SWITCH16; 3858 else if (r_type == BFD_RELOC_8) 3859 r_type = BFD_RELOC_8_PCREL; 3860 else if (r_type == BFD_RELOC_32) 3861 r_type = BFD_RELOC_SH_SWITCH32; 3862 else 3863 abort (); 3864 } 3865 else if (r_type == BFD_RELOC_SH_USES) 3866 rel->addend = fixp->fx_addnumber; 3867 else if (r_type == BFD_RELOC_SH_COUNT) 3868 rel->addend = fixp->fx_offset; 3869 else if (r_type == BFD_RELOC_SH_ALIGN) 3870 rel->addend = fixp->fx_offset; 3871 else if (r_type == BFD_RELOC_VTABLE_INHERIT 3872 || r_type == BFD_RELOC_VTABLE_ENTRY) 3873 rel->addend = fixp->fx_offset; 3874 else if (r_type == BFD_RELOC_SH_LOOP_START 3875 || r_type == BFD_RELOC_SH_LOOP_END) 3876 rel->addend = fixp->fx_offset; 3877 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 3878 { 3879 rel->addend = 0; 3880 rel->address = rel->addend = fixp->fx_offset; 3881 } 3882 else 3883 rel->addend = fixp->fx_addnumber; 3884 3885 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 3886 3887 if (rel->howto == NULL) 3888 { 3889 as_bad_where (fixp->fx_file, fixp->fx_line, 3890 _("Cannot represent relocation type %s"), 3891 bfd_get_reloc_code_name (r_type)); 3892 /* Set howto to a garbage value so that we can keep going. */ 3893 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 3894 gas_assert (rel->howto != NULL); 3895 } 3896 #ifdef OBJ_ELF 3897 else if (rel->howto->type == R_SH_IND12W) 3898 rel->addend += fixp->fx_offset - 4; 3899 #endif 3900 3901 return rel; 3902 } 3903 3904 #ifdef OBJ_ELF 3905 inline static char * 3906 sh_end_of_match (char *cont, const char *what) 3907 { 3908 int len = strlen (what); 3909 3910 if (strncasecmp (cont, what, strlen (what)) == 0 3911 && ! is_part_of_name (cont[len])) 3912 return cont + len; 3913 3914 return NULL; 3915 } 3916 3917 int 3918 sh_parse_name (char const *name, 3919 expressionS *exprP, 3920 enum expr_mode mode, 3921 char *nextcharP) 3922 { 3923 char *next = input_line_pointer; 3924 char *next_end; 3925 int reloc_type; 3926 segT segment; 3927 3928 exprP->X_op_symbol = NULL; 3929 3930 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 3931 { 3932 if (! GOT_symbol) 3933 GOT_symbol = symbol_find_or_make (name); 3934 3935 exprP->X_add_symbol = GOT_symbol; 3936 no_suffix: 3937 /* If we have an absolute symbol or a reg, then we know its 3938 value now. */ 3939 segment = S_GET_SEGMENT (exprP->X_add_symbol); 3940 if (mode != expr_defer && segment == absolute_section) 3941 { 3942 exprP->X_op = O_constant; 3943 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3944 exprP->X_add_symbol = NULL; 3945 } 3946 else if (mode != expr_defer && segment == reg_section) 3947 { 3948 exprP->X_op = O_register; 3949 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 3950 exprP->X_add_symbol = NULL; 3951 } 3952 else 3953 { 3954 exprP->X_op = O_symbol; 3955 exprP->X_add_number = 0; 3956 } 3957 3958 return 1; 3959 } 3960 3961 exprP->X_add_symbol = symbol_find_or_make (name); 3962 3963 if (*nextcharP != '@') 3964 goto no_suffix; 3965 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 3966 reloc_type = BFD_RELOC_32_GOTOFF; 3967 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 3968 reloc_type = BFD_RELOC_SH_GOTPLT32; 3969 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 3970 reloc_type = BFD_RELOC_32_GOT_PCREL; 3971 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 3972 reloc_type = BFD_RELOC_32_PLT_PCREL; 3973 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 3974 reloc_type = BFD_RELOC_SH_TLS_GD_32; 3975 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 3976 reloc_type = BFD_RELOC_SH_TLS_LD_32; 3977 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 3978 reloc_type = BFD_RELOC_SH_TLS_IE_32; 3979 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 3980 reloc_type = BFD_RELOC_SH_TLS_LE_32; 3981 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 3982 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 3983 else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) 3984 reloc_type = BFD_RELOC_32_PCREL; 3985 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) 3986 reloc_type = BFD_RELOC_SH_GOTFUNCDESC; 3987 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) 3988 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; 3989 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) 3990 reloc_type = BFD_RELOC_SH_FUNCDESC; 3991 else 3992 goto no_suffix; 3993 3994 *input_line_pointer = *nextcharP; 3995 input_line_pointer = next_end; 3996 *nextcharP = *input_line_pointer; 3997 *input_line_pointer = '\0'; 3998 3999 exprP->X_op = O_PIC_reloc; 4000 exprP->X_add_number = 0; 4001 exprP->X_md = reloc_type; 4002 4003 return 1; 4004 } 4005 4006 void 4007 sh_cfi_frame_initial_instructions (void) 4008 { 4009 cfi_add_CFA_def_cfa (15, 0); 4010 } 4011 4012 int 4013 sh_regname_to_dw2regnum (char *regname) 4014 { 4015 unsigned int regnum = -1; 4016 unsigned int i; 4017 const char *p; 4018 char *q; 4019 static struct { const char *name; int dw2regnum; } regnames[] = 4020 { 4021 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4022 { "macl", 21 }, { "fpul", 23 } 4023 }; 4024 4025 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4026 if (strcmp (regnames[i].name, regname) == 0) 4027 return regnames[i].dw2regnum; 4028 4029 if (regname[0] == 'r') 4030 { 4031 p = regname + 1; 4032 regnum = strtoul (p, &q, 10); 4033 if (p == q || *q || regnum >= 16) 4034 return -1; 4035 } 4036 else if (regname[0] == 'f' && regname[1] == 'r') 4037 { 4038 p = regname + 2; 4039 regnum = strtoul (p, &q, 10); 4040 if (p == q || *q || regnum >= 16) 4041 return -1; 4042 regnum += 25; 4043 } 4044 else if (regname[0] == 'x' && regname[1] == 'd') 4045 { 4046 p = regname + 2; 4047 regnum = strtoul (p, &q, 10); 4048 if (p == q || *q || regnum >= 8) 4049 return -1; 4050 regnum += 87; 4051 } 4052 return regnum; 4053 } 4054 #endif /* OBJ_ELF */ 4055
Indexes created Fri Mar 27 00:22:57 UTC 2026