tc-spu.c revision 1.1.1.7
1 /* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU) 2 3 Copyright (C) 2006-2022 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "safe-ctype.h" 24 #include "subsegs.h" 25 #include "dwarf2dbg.h" 26 27 const struct spu_opcode spu_opcodes[] = { 28 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \ 29 { MACFORMAT, (OPCODE ## u) << (32-11), MNEMONIC, ASMFORMAT }, 30 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \ 31 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT }, 32 #include "opcode/spu-insns.h" 33 #undef APUOP 34 #undef APUOPFB 35 }; 36 37 static const int spu_num_opcodes = 38 sizeof (spu_opcodes) / sizeof (spu_opcodes[0]); 39 40 #define MAX_RELOCS 2 41 42 struct spu_insn 43 { 44 unsigned int opcode; 45 expressionS exp[MAX_RELOCS]; 46 int reloc_arg[MAX_RELOCS]; 47 bfd_reloc_code_real_type reloc[MAX_RELOCS]; 48 enum spu_insns tag; 49 }; 50 51 static const char *get_imm (const char *param, struct spu_insn *insn, int arg); 52 static const char *get_reg (const char *param, struct spu_insn *insn, int arg, 53 int accept_expr); 54 static int calcop (struct spu_opcode *format, const char *param, 55 struct spu_insn *insn); 56 static void spu_brinfo (int); 57 static void spu_cons (int); 58 59 extern char *myname; 60 static htab_t op_hash = NULL; 61 62 /* These bits should be turned off in the first address of every segment */ 63 int md_seg_align = 7; 64 65 /* These chars start a comment anywhere in a source file (except inside 66 another comment */ 67 const char comment_chars[] = "#"; 68 69 /* These chars only start a comment at the beginning of a line. */ 70 const char line_comment_chars[] = "#"; 71 72 /* gods own line continuation char */ 73 const char line_separator_chars[] = ";"; 74 75 /* Chars that can be used to separate mant from exp in floating point nums */ 76 const char EXP_CHARS[] = "eE"; 77 78 /* Chars that mean this number is a floating point constant */ 79 /* as in 0f123.456 */ 80 /* or 0H1.234E-12 (see exp chars above) */ 81 const char FLT_CHARS[] = "dDfF"; 82 83 const pseudo_typeS md_pseudo_table[] = 84 { 85 {"align", s_align_ptwo, 4}, 86 {"brinfo", spu_brinfo, 0}, 87 {"bss", s_lcomm_bytes, 1}, 88 {"def", s_set, 0}, 89 {"dfloat", float_cons, 'd'}, 90 {"ffloat", float_cons, 'f'}, 91 {"global", s_globl, 0}, 92 {"half", cons, 2}, 93 {"int", spu_cons, 4}, 94 {"long", spu_cons, 4}, 95 {"quad", spu_cons, 8}, 96 {"string", stringer, 8 + 1}, 97 {"word", spu_cons, 4}, 98 /* Force set to be treated as an instruction. */ 99 {"set", NULL, 0}, 100 {".set", s_set, 0}, 101 /* Likewise for eqv. */ 102 {"eqv", NULL, 0}, 103 {".eqv", s_set, -1}, 104 {0,0,0} 105 }; 106 107 /* Bits plugged into branch instruction offset field. */ 108 unsigned int brinfo; 109 110 void 111 md_begin (void) 112 { 113 int i; 114 115 op_hash = str_htab_create (); 116 117 /* Hash each mnemonic and record its position. There are 118 duplicates, keep just the first. */ 119 for (i = 0; i < spu_num_opcodes; i++) 120 str_hash_insert (op_hash, spu_opcodes[i].mnemonic, &spu_opcodes[i], 0); 121 } 122 123 const char *md_shortopts = ""; 125 struct option md_longopts[] = { 126 #define OPTION_APUASM (OPTION_MD_BASE) 127 {"apuasm", no_argument, NULL, OPTION_APUASM}, 128 #define OPTION_DD2 (OPTION_MD_BASE+1) 129 {"mdd2.0", no_argument, NULL, OPTION_DD2}, 130 #define OPTION_DD1 (OPTION_MD_BASE+2) 131 {"mdd1.0", no_argument, NULL, OPTION_DD1}, 132 #define OPTION_DD3 (OPTION_MD_BASE+3) 133 {"mdd3.0", no_argument, NULL, OPTION_DD3}, 134 { NULL, no_argument, NULL, 0 } 135 }; 136 size_t md_longopts_size = sizeof (md_longopts); 137 138 /* When set (by -apuasm) our assembler emulates the behaviour of apuasm. 139 * e.g. don't add bias to float conversion and don't right shift 140 * immediate values. */ 141 static int emulate_apuasm; 142 143 /* Use the dd2.0 instructions set. The only differences are some new 144 * register names and the orx insn */ 145 static int use_dd2 = 1; 146 147 int 148 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 149 { 150 switch (c) 151 { 152 case OPTION_APUASM: 153 emulate_apuasm = 1; 154 break; 155 case OPTION_DD3: 156 use_dd2 = 1; 157 break; 158 case OPTION_DD2: 159 use_dd2 = 1; 160 break; 161 case OPTION_DD1: 162 use_dd2 = 0; 163 break; 164 default: 165 return 0; 166 } 167 return 1; 168 } 169 170 void 171 md_show_usage (FILE *stream) 172 { 173 fputs (_("\ 174 SPU options:\n\ 175 --apuasm emulate behaviour of apuasm\n"), 176 stream); 177 } 178 179 181 struct arg_encode { 182 int size; 183 int pos; 184 int rshift; 185 int lo, hi; 186 int wlo, whi; 187 bfd_reloc_code_real_type reloc; 188 }; 189 190 static struct arg_encode arg_encode[A_MAX] = { 191 { 7, 0, 0, 0, 127, 0, -1, 0 }, /* A_T */ 192 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_A */ 193 { 7, 14, 0, 0, 127, 0, -1, 0 }, /* A_B */ 194 { 7, 21, 0, 0, 127, 0, -1, 0 }, /* A_C */ 195 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_S */ 196 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_H */ 197 { 0, 0, 0, 0, -1, 0, -1, 0 }, /* A_P */ 198 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S3 */ 199 { 7, 14, 0, -32, 31, -31, 0, BFD_RELOC_SPU_IMM7 }, /* A_S6 */ 200 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_S7N */ 201 { 7, 14, 0, -64, 63, -63, 0, BFD_RELOC_SPU_IMM7 }, /* A_S7 */ 202 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7A */ 203 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8 }, /* A_U7B */ 204 { 10, 14, 0, -512, 511, -128, 255, BFD_RELOC_SPU_IMM10 }, /* A_S10B */ 205 { 10, 14, 0, -512, 511, 0, -1, BFD_RELOC_SPU_IMM10 }, /* A_S10 */ 206 { 2, 23, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9a }, /* A_S11 */ 207 { 2, 14, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9b }, /* A_S11I */ 208 { 10, 14, 4, -8192, 8191, 0, -1, BFD_RELOC_SPU_IMM10W }, /* A_S14 */ 209 { 16, 7, 0, -32768, 32767, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_S16 */ 210 { 16, 7, 2, -131072, 262143, 0, -1, BFD_RELOC_SPU_IMM16W }, /* A_S18 */ 211 { 16, 7, 2, -262144, 262143, 0, -1, BFD_RELOC_SPU_PCREL16 }, /* A_R18 */ 212 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U3 */ 213 { 7, 14, 0, 0, 127, 0, 31, BFD_RELOC_SPU_IMM7 }, /* A_U5 */ 214 { 7, 14, 0, 0, 127, 0, 63, BFD_RELOC_SPU_IMM7 }, /* A_U6 */ 215 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7 }, /* A_U7 */ 216 { 14, 0, 0, 0, 16383, 0, -1, 0 }, /* A_U14 */ 217 { 16, 7, 0, -32768, 65535, 0, -1, BFD_RELOC_SPU_IMM16 }, /* A_X16 */ 218 { 18, 7, 0, 0, 262143, 0, -1, BFD_RELOC_SPU_IMM18 }, /* A_U18 */ 219 }; 220 221 /* Some flags for handling errors. This is very hackish and added after 222 * the fact. */ 223 static int syntax_error_arg; 224 static const char *syntax_error_param; 225 static int syntax_reg; 226 227 static char * 228 insn_fmt_string (struct spu_opcode *format) 229 { 230 static char buf[64]; 231 int len = 0; 232 int i; 233 234 len += sprintf (&buf[len], "%s\t", format->mnemonic); 235 for (i = 1; i <= format->arg[0]; i++) 236 { 237 int arg = format->arg[i]; 238 const char *exp; 239 if (i > 1 && arg != A_P && format->arg[i-1] != A_P) 240 buf[len++] = ','; 241 if (arg == A_P) 242 exp = "("; 243 else if (arg < A_P) 244 exp = i == syntax_error_arg ? "REG" : "reg"; 245 else 246 exp = i == syntax_error_arg ? "IMM" : "imm"; 247 len += sprintf (&buf[len], "%s", exp); 248 if (i > 1 && format->arg[i-1] == A_P) 249 buf[len++] = ')'; 250 } 251 buf[len] = 0; 252 return buf; 253 } 254 255 void 256 md_assemble (char *op) 257 { 258 char *param, *thisfrag; 259 char c; 260 struct spu_opcode *format; 261 struct spu_insn insn; 262 int i; 263 264 gas_assert (op); 265 266 /* skip over instruction to find parameters */ 267 268 for (param = op; *param != 0 && !ISSPACE (*param); param++) 269 ; 270 c = *param; 271 *param = 0; 272 273 if (c != 0 && c != '\n') 274 param++; 275 276 /* try to find the instruction in the hash table */ 277 278 if ((format = (struct spu_opcode *) str_hash_find (op_hash, op)) == NULL) 279 { 280 as_bad (_("Invalid mnemonic '%s'"), op); 281 return; 282 } 283 284 if (!use_dd2 && strcmp (format->mnemonic, "orx") == 0) 285 { 286 as_bad (_("'%s' is only available in DD2.0 or higher."), op); 287 return; 288 } 289 290 while (1) 291 { 292 /* try parsing this instruction into insn */ 293 for (i = 0; i < MAX_RELOCS; i++) 294 { 295 insn.exp[i].X_add_symbol = 0; 296 insn.exp[i].X_op_symbol = 0; 297 insn.exp[i].X_add_number = 0; 298 insn.exp[i].X_op = O_illegal; 299 insn.reloc_arg[i] = -1; 300 insn.reloc[i] = BFD_RELOC_NONE; 301 } 302 insn.opcode = format->opcode; 303 insn.tag = (enum spu_insns) (format - spu_opcodes); 304 305 syntax_error_arg = 0; 306 syntax_error_param = 0; 307 syntax_reg = 0; 308 if (calcop (format, param, &insn)) 309 break; 310 311 /* if it doesn't parse try the next instruction */ 312 if (!strcmp (format[0].mnemonic, format[1].mnemonic)) 313 format++; 314 else 315 { 316 int parg = format[0].arg[syntax_error_arg-1]; 317 318 as_fatal (_("Error in argument %d. Expecting: \"%s\""), 319 syntax_error_arg - (parg == A_P), 320 insn_fmt_string (format)); 321 return; 322 } 323 } 324 325 if ((syntax_reg & 4) 326 && ! (insn.tag == M_RDCH 327 || insn.tag == M_RCHCNT 328 || insn.tag == M_WRCH)) 329 as_warn (_("Mixing register syntax, with and without '$'.")); 330 if (syntax_error_param) 331 { 332 const char *d = syntax_error_param; 333 while (*d != '$') 334 d--; 335 as_warn (_("Treating '%-*s' as a symbol."), (int)(syntax_error_param - d), d); 336 } 337 338 if (brinfo != 0 339 && (insn.tag <= M_BRASL 340 || (insn.tag >= M_BRZ && insn.tag <= M_BRHNZ)) 341 && (insn.opcode & 0x7ff80) == 0 342 && (insn.reloc_arg[0] == A_R18 343 || insn.reloc_arg[0] == A_S18 344 || insn.reloc_arg[1] == A_R18 345 || insn.reloc_arg[1] == A_S18)) 346 insn.opcode |= brinfo << 7; 347 348 /* grow the current frag and plop in the opcode */ 349 350 thisfrag = frag_more (4); 351 md_number_to_chars (thisfrag, insn.opcode, 4); 352 353 /* if this instruction requires labels mark it for later */ 354 355 for (i = 0; i < MAX_RELOCS; i++) 356 if (insn.reloc_arg[i] >= 0) 357 { 358 fixS *fixP; 359 bfd_reloc_code_real_type reloc = insn.reloc[i]; 360 int pcrel = 0; 361 362 if (reloc == BFD_RELOC_SPU_PCREL9a 363 || reloc == BFD_RELOC_SPU_PCREL9b 364 || reloc == BFD_RELOC_SPU_PCREL16) 365 pcrel = 1; 366 fixP = fix_new_exp (frag_now, 367 thisfrag - frag_now->fr_literal, 368 4, 369 &insn.exp[i], 370 pcrel, 371 reloc); 372 fixP->tc_fix_data.arg_format = insn.reloc_arg[i]; 373 fixP->tc_fix_data.insn_tag = insn.tag; 374 } 375 dwarf2_emit_insn (4); 376 377 /* .brinfo lasts exactly one instruction. */ 378 brinfo = 0; 379 } 380 381 static int 382 calcop (struct spu_opcode *format, const char *param, struct spu_insn *insn) 383 { 384 int i; 385 int paren = 0; 386 int arg; 387 388 for (i = 1; i <= format->arg[0]; i++) 389 { 390 arg = format->arg[i]; 391 syntax_error_arg = i; 392 393 while (ISSPACE (*param)) 394 param++; 395 if (*param == 0 || *param == ',') 396 return 0; 397 if (arg < A_P) 398 param = get_reg (param, insn, arg, 1); 399 else if (arg > A_P) 400 param = get_imm (param, insn, arg); 401 else if (arg == A_P) 402 { 403 paren++; 404 if ('(' != *param++) 405 return 0; 406 } 407 408 if (!param) 409 return 0; 410 411 while (ISSPACE (*param)) 412 param++; 413 414 if (arg != A_P && paren) 415 { 416 paren--; 417 if (')' != *param++) 418 return 0; 419 } 420 else if (i < format->arg[0] 421 && format->arg[i] != A_P 422 && format->arg[i+1] != A_P) 423 { 424 if (',' != *param++) 425 { 426 syntax_error_arg++; 427 return 0; 428 } 429 } 430 } 431 while (ISSPACE (*param)) 432 param++; 433 return !paren && (*param == 0 || *param == '\n'); 434 } 435 436 struct reg_name { 437 unsigned int regno; 438 unsigned int length; 439 char name[32]; 440 }; 441 442 #define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM } 443 444 static struct reg_name reg_name[] = { 445 REG_NAME (0, "lr"), /* link register */ 446 REG_NAME (1, "sp"), /* stack pointer */ 447 REG_NAME (0, "rp"), /* link register */ 448 REG_NAME (127, "fp"), /* frame pointer */ 449 }; 450 451 static struct reg_name sp_reg_name[] = { 452 }; 453 454 static struct reg_name ch_reg_name[] = { 455 REG_NAME ( 0, "SPU_RdEventStat"), 456 REG_NAME ( 1, "SPU_WrEventMask"), 457 REG_NAME ( 2, "SPU_WrEventAck"), 458 REG_NAME ( 3, "SPU_RdSigNotify1"), 459 REG_NAME ( 4, "SPU_RdSigNotify2"), 460 REG_NAME ( 7, "SPU_WrDec"), 461 REG_NAME ( 8, "SPU_RdDec"), 462 REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */ 463 REG_NAME ( 13, "SPU_RdMachStat"), 464 REG_NAME ( 14, "SPU_WrSRR0"), 465 REG_NAME ( 15, "SPU_RdSRR0"), 466 REG_NAME ( 28, "SPU_WrOutMbox"), 467 REG_NAME ( 29, "SPU_RdInMbox"), 468 REG_NAME ( 30, "SPU_WrOutIntrMbox"), 469 REG_NAME ( 9, "MFC_WrMSSyncReq"), 470 REG_NAME ( 12, "MFC_RdTagMask"), /* DD2.0 only */ 471 REG_NAME ( 16, "MFC_LSA"), 472 REG_NAME ( 17, "MFC_EAH"), 473 REG_NAME ( 18, "MFC_EAL"), 474 REG_NAME ( 19, "MFC_Size"), 475 REG_NAME ( 20, "MFC_TagID"), 476 REG_NAME ( 21, "MFC_Cmd"), 477 REG_NAME ( 22, "MFC_WrTagMask"), 478 REG_NAME ( 23, "MFC_WrTagUpdate"), 479 REG_NAME ( 24, "MFC_RdTagStat"), 480 REG_NAME ( 25, "MFC_RdListStallStat"), 481 REG_NAME ( 26, "MFC_WrListStallAck"), 482 REG_NAME ( 27, "MFC_RdAtomicStat"), 483 }; 484 #undef REG_NAME 485 486 static const char * 487 get_reg (const char *param, struct spu_insn *insn, int arg, int accept_expr) 488 { 489 unsigned regno; 490 int saw_prefix = 0; 491 492 if (*param == '$') 493 { 494 saw_prefix = 1; 495 param++; 496 } 497 498 if (arg == A_H) /* Channel */ 499 { 500 if ((param[0] == 'c' || param[0] == 'C') 501 && (param[1] == 'h' || param[1] == 'H') 502 && ISDIGIT (param[2])) 503 param += 2; 504 } 505 else if (arg == A_S) /* Special purpose register */ 506 { 507 if ((param[0] == 's' || param[0] == 'S') 508 && (param[1] == 'p' || param[1] == 'P') 509 && ISDIGIT (param[2])) 510 param += 2; 511 } 512 513 if (ISDIGIT (*param)) 514 { 515 regno = 0; 516 while (ISDIGIT (*param)) 517 regno = regno * 10 + *param++ - '0'; 518 } 519 else 520 { 521 struct reg_name *rn; 522 unsigned int i, n, l = 0; 523 524 if (arg == A_H) /* Channel */ 525 { 526 rn = ch_reg_name; 527 n = sizeof (ch_reg_name) / sizeof (*ch_reg_name); 528 } 529 else if (arg == A_S) /* Special purpose register */ 530 { 531 rn = sp_reg_name; 532 n = sizeof (sp_reg_name) / sizeof (*sp_reg_name); 533 } 534 else 535 { 536 rn = reg_name; 537 n = sizeof (reg_name) / sizeof (*reg_name); 538 } 539 regno = 128; 540 for (i = 0; i < n; i++) 541 if (rn[i].length > l 542 && 0 == strncasecmp (param, rn[i].name, rn[i].length)) 543 { 544 l = rn[i].length; 545 regno = rn[i].regno; 546 } 547 param += l; 548 } 549 550 if (!use_dd2 551 && arg == A_H) 552 { 553 if (regno == 11) 554 as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher.")); 555 else if (regno == 12) 556 as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher.")); 557 } 558 559 if (regno < 128) 560 { 561 insn->opcode |= regno << arg_encode[arg].pos; 562 if ((!saw_prefix && syntax_reg == 1) 563 || (saw_prefix && syntax_reg == 2)) 564 syntax_reg |= 4; 565 syntax_reg |= saw_prefix ? 1 : 2; 566 return param; 567 } 568 569 if (accept_expr) 570 { 571 char *save_ptr; 572 expressionS ex; 573 save_ptr = input_line_pointer; 574 input_line_pointer = (char *)param; 575 expression (&ex); 576 param = input_line_pointer; 577 input_line_pointer = save_ptr; 578 if (ex.X_op == O_register || ex.X_op == O_constant) 579 { 580 insn->opcode |= ex.X_add_number << arg_encode[arg].pos; 581 return param; 582 } 583 } 584 return 0; 585 } 586 587 static const char * 588 get_imm (const char *param, struct spu_insn *insn, int arg) 589 { 590 int val; 591 char *save_ptr; 592 int low = 0, high = 0; 593 int reloc_i = insn->reloc_arg[0] >= 0 ? 1 : 0; 594 595 if (strncasecmp (param, "%lo(", 4) == 0) 596 { 597 param += 3; 598 low = 1; 599 as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l.")); 600 } 601 else if (strncasecmp (param, "%hi(", 4) == 0) 602 { 603 param += 3; 604 high = 1; 605 as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h.")); 606 } 607 else if (strncasecmp (param, "%pic(", 5) == 0) 608 { 609 /* Currently we expect %pic(expr) == expr, so do nothing here. 610 i.e. for code loaded at address 0 $toc will be 0. */ 611 param += 4; 612 } 613 614 if (*param == '$') 615 { 616 /* Symbols can start with $, but if this symbol matches a register 617 name, it's probably a mistake. The only way to avoid this 618 warning is to rename the symbol. */ 619 struct spu_insn tmp_insn; 620 const char *np = get_reg (param, &tmp_insn, arg, 0); 621 622 if (np) 623 syntax_error_param = np; 624 } 625 626 save_ptr = input_line_pointer; 627 input_line_pointer = (char *) param; 628 expression (&insn->exp[reloc_i]); 629 param = input_line_pointer; 630 input_line_pointer = save_ptr; 631 632 /* Similar to ppc_elf_suffix in tc-ppc.c. We have so few cases to 633 handle we do it inlined here. */ 634 if (param[0] == '@' && !ISALNUM (param[2]) && param[2] != '@') 635 { 636 if (param[1] == 'h' || param[1] == 'H') 637 { 638 high = 1; 639 param += 2; 640 } 641 else if (param[1] == 'l' || param[1] == 'L') 642 { 643 low = 1; 644 param += 2; 645 } 646 } 647 648 if (insn->exp[reloc_i].X_op == O_constant) 649 { 650 val = insn->exp[reloc_i].X_add_number; 651 652 if (emulate_apuasm) 653 { 654 /* Convert the value to a format we expect. */ 655 val <<= arg_encode[arg].rshift; 656 if (arg == A_U7A) 657 val = 173 - val; 658 else if (arg == A_U7B) 659 val = 155 - val; 660 } 661 662 if (high) 663 val = val >> 16; 664 else if (low) 665 val = val & 0xffff; 666 667 /* Warn about out of range expressions. */ 668 { 669 int hi = arg_encode[arg].hi; 670 int lo = arg_encode[arg].lo; 671 int whi = arg_encode[arg].whi; 672 int wlo = arg_encode[arg].wlo; 673 674 if (hi > lo && (val < lo || val > hi)) 675 as_fatal (_("Constant expression %d out of range, [%d, %d]."), 676 val, lo, hi); 677 else if (whi > wlo && (val < wlo || val > whi)) 678 as_warn (_("Constant expression %d out of range, [%d, %d]."), 679 val, wlo, whi); 680 } 681 682 if (arg == A_U7A) 683 val = 173 - val; 684 else if (arg == A_U7B) 685 val = 155 - val; 686 687 /* Branch hints have a split encoding. Do the bottom part. */ 688 if (arg == A_S11 || arg == A_S11I) 689 insn->opcode |= ((val >> 2) & 0x7f); 690 691 insn->opcode |= (((val >> arg_encode[arg].rshift) 692 & ((1 << arg_encode[arg].size) - 1)) 693 << arg_encode[arg].pos); 694 } 695 else 696 { 697 insn->reloc_arg[reloc_i] = arg; 698 if (high) 699 insn->reloc[reloc_i] = BFD_RELOC_SPU_HI16; 700 else if (low) 701 insn->reloc[reloc_i] = BFD_RELOC_SPU_LO16; 702 else 703 insn->reloc[reloc_i] = arg_encode[arg].reloc; 704 } 705 706 return param; 707 } 708 709 const char * 710 md_atof (int type, char *litP, int *sizeP) 711 { 712 return ieee_md_atof (type, litP, sizeP, true); 713 } 714 715 #ifndef WORKING_DOT_WORD 716 int md_short_jump_size = 4; 717 718 void 719 md_create_short_jump (char *ptr, 720 addressT from_addr ATTRIBUTE_UNUSED, 721 addressT to_addr ATTRIBUTE_UNUSED, 722 fragS *frag, 723 symbolS *to_symbol) 724 { 725 ptr[0] = (char) 0xc0; 726 ptr[1] = 0x00; 727 ptr[2] = 0x00; 728 ptr[3] = 0x00; 729 fix_new (frag, 730 ptr - frag->fr_literal, 731 4, 732 to_symbol, 733 (offsetT) 0, 734 0, 735 BFD_RELOC_SPU_PCREL16); 736 } 737 738 int md_long_jump_size = 4; 739 740 void 741 md_create_long_jump (char *ptr, 742 addressT from_addr ATTRIBUTE_UNUSED, 743 addressT to_addr ATTRIBUTE_UNUSED, 744 fragS *frag, 745 symbolS *to_symbol) 746 { 747 ptr[0] = (char) 0xc0; 748 ptr[1] = 0x00; 749 ptr[2] = 0x00; 750 ptr[3] = 0x00; 751 fix_new (frag, 752 ptr - frag->fr_literal, 753 4, 754 to_symbol, 755 (offsetT) 0, 756 0, 757 BFD_RELOC_SPU_PCREL16); 758 } 759 #endif 760 761 /* Handle .brinfo <priority>,<lrlive>. */ 762 static void 763 spu_brinfo (int ignore ATTRIBUTE_UNUSED) 764 { 765 addressT priority; 766 addressT lrlive; 767 768 priority = get_absolute_expression (); 769 SKIP_WHITESPACE (); 770 771 lrlive = 0; 772 if (*input_line_pointer == ',') 773 { 774 ++input_line_pointer; 775 lrlive = get_absolute_expression (); 776 } 777 778 if (priority > 0x1fff) 779 { 780 as_bad (_("invalid priority '%lu'"), (unsigned long) priority); 781 priority = 0; 782 } 783 784 if (lrlive > 7) 785 { 786 as_bad (_("invalid lrlive '%lu'"), (unsigned long) lrlive); 787 lrlive = 0; 788 } 789 790 brinfo = (lrlive << 13) | priority; 791 demand_empty_rest_of_line (); 792 } 793 794 /* Support @ppu on symbols referenced in .int/.long/.word/.quad. */ 795 static void 796 spu_cons (int nbytes) 797 { 798 expressionS exp; 799 800 if (is_it_end_of_statement ()) 801 { 802 demand_empty_rest_of_line (); 803 return; 804 } 805 806 do 807 { 808 char *save = input_line_pointer; 809 810 /* Use deferred_expression here so that an expression involving 811 a symbol that happens to be defined already as an spu symbol, 812 is not resolved. */ 813 deferred_expression (&exp); 814 if ((exp.X_op == O_symbol 815 || exp.X_op == O_constant) 816 && strncasecmp (input_line_pointer, "@ppu", 4) == 0) 817 { 818 char *p = frag_more (nbytes); 819 enum bfd_reloc_code_real reloc; 820 821 /* Check for identifier@suffix+constant. */ 822 input_line_pointer += 4; 823 if (*input_line_pointer == '-' || *input_line_pointer == '+') 824 { 825 expressionS new_exp; 826 827 save = input_line_pointer; 828 expression (&new_exp); 829 if (new_exp.X_op == O_constant) 830 exp.X_add_number += new_exp.X_add_number; 831 else 832 input_line_pointer = save; 833 } 834 835 reloc = nbytes == 4 ? BFD_RELOC_SPU_PPU32 : BFD_RELOC_SPU_PPU64; 836 fix_new_exp (frag_now, p - frag_now->fr_literal, nbytes, 837 &exp, 0, reloc); 838 } 839 else 840 { 841 /* Don't use deferred_expression for anything else. 842 deferred_expression won't evaulate dot at the point it is 843 used. */ 844 input_line_pointer = save; 845 expression (&exp); 846 emit_expr (&exp, nbytes); 847 } 848 } 849 while (*input_line_pointer++ == ','); 850 851 /* Put terminator back into stream. */ 852 input_line_pointer--; 853 demand_empty_rest_of_line (); 854 } 855 856 int 857 md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED, 858 segT segment_type ATTRIBUTE_UNUSED) 859 { 860 as_fatal (_("Relaxation should never occur")); 861 return -1; 862 } 863 864 /* If while processing a fixup, a reloc really needs to be created, 865 then it is done here. */ 866 867 arelent * 868 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 869 { 870 arelent *reloc; 871 reloc = XNEW (arelent); 872 reloc->sym_ptr_ptr = XNEW (asymbol *); 873 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 874 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 875 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 876 if (reloc->howto == (reloc_howto_type *) NULL) 877 { 878 as_bad_where (fixp->fx_file, fixp->fx_line, 879 _("reloc %d not supported by object file format"), 880 (int) fixp->fx_r_type); 881 free (reloc->sym_ptr_ptr); 882 free (reloc); 883 return NULL; 884 } 885 reloc->addend = fixp->fx_addnumber; 886 return reloc; 887 } 888 889 /* Round up a section's size to the appropriate boundary. */ 890 891 valueT 892 md_section_align (segT seg, valueT size) 893 { 894 int align = bfd_section_alignment (seg); 895 valueT mask = ((valueT) 1 << align) - 1; 896 897 return (size + mask) & ~mask; 898 } 899 900 /* Where a PC relative offset is calculated from. On the spu they 901 are calculated from the beginning of the branch instruction. */ 902 903 long 904 md_pcrel_from (fixS *fixp) 905 { 906 return fixp->fx_frag->fr_address + fixp->fx_where; 907 } 908 909 /* Fill in rs_align_code fragments. */ 910 911 void 912 spu_handle_align (fragS *fragp) 913 { 914 static const unsigned char nop_pattern[8] = { 915 0x40, 0x20, 0x00, 0x00, /* even nop */ 916 0x00, 0x20, 0x00, 0x00, /* odd nop */ 917 }; 918 919 int bytes; 920 char *p; 921 922 if (fragp->fr_type != rs_align_code) 923 return; 924 925 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; 926 p = fragp->fr_literal + fragp->fr_fix; 927 928 if (bytes & 3) 929 { 930 int fix = bytes & 3; 931 memset (p, 0, fix); 932 p += fix; 933 bytes -= fix; 934 fragp->fr_fix += fix; 935 } 936 if (bytes & 4) 937 { 938 memcpy (p, &nop_pattern[4], 4); 939 p += 4; 940 bytes -= 4; 941 fragp->fr_fix += 4; 942 } 943 944 memcpy (p, nop_pattern, 8); 945 fragp->fr_var = 8; 946 } 947 948 void 949 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 950 { 951 unsigned int res; 952 unsigned int mask; 953 valueT val = *valP; 954 char *place = fixP->fx_where + fixP->fx_frag->fr_literal; 955 956 if (fixP->fx_subsy != (symbolS *) NULL) 957 { 958 /* We can't actually support subtracting a symbol. */ 959 as_bad_subtract (fixP); 960 } 961 962 if (fixP->fx_addsy != NULL) 963 { 964 if (fixP->fx_pcrel) 965 { 966 /* Hack around bfd_install_relocation brain damage. */ 967 val += fixP->fx_frag->fr_address + fixP->fx_where; 968 969 switch (fixP->fx_r_type) 970 { 971 case BFD_RELOC_32: 972 fixP->fx_r_type = BFD_RELOC_32_PCREL; 973 break; 974 975 case BFD_RELOC_SPU_PCREL16: 976 case BFD_RELOC_SPU_PCREL9a: 977 case BFD_RELOC_SPU_PCREL9b: 978 case BFD_RELOC_32_PCREL: 979 break; 980 981 default: 982 as_bad_where (fixP->fx_file, fixP->fx_line, 983 _("expression too complex")); 984 break; 985 } 986 } 987 } 988 989 fixP->fx_addnumber = val; 990 991 if (fixP->fx_r_type == BFD_RELOC_SPU_PPU32 992 || fixP->fx_r_type == BFD_RELOC_SPU_PPU64 993 || fixP->fx_r_type == BFD_RELOC_SPU_ADD_PIC) 994 return; 995 996 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 997 { 998 fixP->fx_done = 1; 999 res = 0; 1000 mask = 0; 1001 if (fixP->tc_fix_data.arg_format > A_P) 1002 { 1003 int hi = arg_encode[fixP->tc_fix_data.arg_format].hi; 1004 int lo = arg_encode[fixP->tc_fix_data.arg_format].lo; 1005 if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi)) 1006 as_bad_where (fixP->fx_file, fixP->fx_line, 1007 _("Relocation doesn't fit. (relocation value = 0x%lx)"), 1008 (long) val); 1009 } 1010 1011 switch (fixP->fx_r_type) 1012 { 1013 case BFD_RELOC_8: 1014 md_number_to_chars (place, val, 1); 1015 return; 1016 1017 case BFD_RELOC_16: 1018 md_number_to_chars (place, val, 2); 1019 return; 1020 1021 case BFD_RELOC_32: 1022 case BFD_RELOC_32_PCREL: 1023 md_number_to_chars (place, val, 4); 1024 return; 1025 1026 case BFD_RELOC_64: 1027 md_number_to_chars (place, val, 8); 1028 return; 1029 1030 case BFD_RELOC_SPU_IMM7: 1031 res = val << 14; 1032 mask = 0x7f << 14; 1033 break; 1034 1035 case BFD_RELOC_SPU_IMM8: 1036 res = val << 14; 1037 mask = 0xff << 14; 1038 break; 1039 1040 case BFD_RELOC_SPU_IMM10: 1041 res = val << 14; 1042 mask = 0x3ff << 14; 1043 break; 1044 1045 case BFD_RELOC_SPU_IMM10W: 1046 res = val << 10; 1047 mask = 0x3ff0 << 10; 1048 break; 1049 1050 case BFD_RELOC_SPU_IMM16: 1051 res = val << 7; 1052 mask = 0xffff << 7; 1053 break; 1054 1055 case BFD_RELOC_SPU_IMM16W: 1056 res = val << 5; 1057 mask = 0x3fffc << 5; 1058 break; 1059 1060 case BFD_RELOC_SPU_IMM18: 1061 res = val << 7; 1062 mask = 0x3ffff << 7; 1063 break; 1064 1065 case BFD_RELOC_SPU_PCREL9a: 1066 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 14); 1067 mask = (0x1fc >> 2) | (0x600 << 14); 1068 break; 1069 1070 case BFD_RELOC_SPU_PCREL9b: 1071 res = ((val & 0x1fc) >> 2) | ((val & 0x600) << 5); 1072 mask = (0x1fc >> 2) | (0x600 << 5); 1073 break; 1074 1075 case BFD_RELOC_SPU_PCREL16: 1076 res = val << 5; 1077 mask = 0x3fffc << 5; 1078 break; 1079 1080 case BFD_RELOC_SPU_HI16: 1081 res = val >> 9; 1082 mask = 0xffff << 7; 1083 break; 1084 1085 case BFD_RELOC_SPU_LO16: 1086 res = val << 7; 1087 mask = 0xffff << 7; 1088 break; 1089 1090 default: 1091 as_bad_where (fixP->fx_file, fixP->fx_line, 1092 _("reloc %d not supported by object file format"), 1093 (int) fixP->fx_r_type); 1094 } 1095 1096 res &= mask; 1097 place[0] = (place[0] & (~mask >> 24)) | ((res >> 24) & 0xff); 1098 place[1] = (place[1] & (~mask >> 16)) | ((res >> 16) & 0xff); 1099 place[2] = (place[2] & (~mask >> 8)) | ((res >> 8) & 0xff); 1100 place[3] = (place[3] & ~mask) | (res & 0xff); 1101 } 1102 } 1103
Indexes created Mon Mar 16 00:23:04 UTC 2026