tc-v850.c revision 1.1.1.8
1 /* tc-v850.c -- Assembler code for the NEC V850 2 Copyright (C) 1996-2024 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21 #include "as.h" 22 #include "safe-ctype.h" 23 #include "subsegs.h" 24 #include "opcode/v850.h" 25 #include "dwarf2dbg.h" 26 27 /* Sign-extend a 16-bit number. */ 28 #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000) 29 30 /* Set to TRUE if we want to be pedantic about signed overflows. */ 31 static bool warn_signed_overflows = false; 32 static bool warn_unsigned_overflows = false; 33 34 /* Non-zero if floating point insns are not being used. */ 35 static signed int soft_float = -1; 36 37 /* Indicates the target BFD machine number. */ 38 static int machine = -1; 39 40 41 /* Indicates the target BFD architecture. */ 42 enum bfd_architecture v850_target_arch = bfd_arch_v850_rh850; 43 const char * v850_target_format = "elf32-v850-rh850"; 44 static flagword v850_e_flags = 0; 45 46 /* Indicates the target processor(s) for the assemble. */ 47 static int processor_mask = 0; 48 49 /* Structure to hold information about predefined registers. */ 51 struct reg_name 52 { 53 const char *name; 54 int value; 55 unsigned int processors; 56 }; 57 58 /* Generic assembler global variables which must be defined by all 59 targets. */ 60 61 /* Characters which always start a comment. */ 62 const char comment_chars[] = "#"; 63 64 /* Characters which start a comment at the beginning of a line. */ 65 const char line_comment_chars[] = ";#"; 66 67 /* Characters which may be used to separate multiple commands on a 68 single line. */ 69 const char line_separator_chars[] = ";"; 70 71 /* Characters which are used to indicate an exponent in a floating 72 point number. */ 73 const char EXP_CHARS[] = "eE"; 74 75 /* Characters which mean that a number is a floating point constant, 76 as in 0d1.0. */ 77 const char FLT_CHARS[] = "dD"; 78 79 const relax_typeS md_relax_table[] = 81 { 82 /* Conditional branches.(V850/V850E, max 22bit) */ 83 #define SUBYPTE_COND_9_22 0 84 {0xfe, -0x100, 2, SUBYPTE_COND_9_22 + 1}, 85 {0x1ffffe + 2, -0x200000 + 2, 6, 0}, 86 /* Conditional branches.(V850/V850E, max 22bit) */ 87 #define SUBYPTE_SA_9_22 2 88 {0xfe, -0x100, 2, SUBYPTE_SA_9_22 + 1}, 89 {0x1ffffe + 4, -0x200000 + 4, 8, 0}, 90 /* Unconditional branches.(V850/V850E, max 22bit) */ 91 #define SUBYPTE_UNCOND_9_22 4 92 {0xfe, -0x100, 2, SUBYPTE_UNCOND_9_22 + 1}, 93 {0x1ffffe, -0x200000, 4, 0}, 94 /* Conditional branches.(V850E2, max 32bit) */ 95 #define SUBYPTE_COND_9_22_32 6 96 {0xfe, -0x100, 2, SUBYPTE_COND_9_22_32 + 1}, 97 {0x1fffff + 2, -0x200000 + 2, 6, SUBYPTE_COND_9_22_32 + 2}, 98 {0x7ffffffe, -0x80000000, 8, 0}, 99 /* Conditional branches.(V850E2, max 32bit) */ 100 #define SUBYPTE_SA_9_22_32 9 101 {0xfe, -0x100, 2, SUBYPTE_SA_9_22_32 + 1}, 102 {0x1ffffe + 4, -0x200000 + 4, 8, SUBYPTE_SA_9_22_32 + 2}, 103 {0x7ffffffe, -0x80000000, 10, 0}, 104 /* Unconditional branches.(V850E2, max 32bit) */ 105 #define SUBYPTE_UNCOND_9_22_32 12 106 {0xfe, -0x100, 2, SUBYPTE_UNCOND_9_22_32 + 1}, 107 {0x1ffffe, -0x200000, 4, SUBYPTE_UNCOND_9_22_32 + 2}, 108 {0x7ffffffe, -0x80000000, 6, 0}, 109 /* Conditional branches.(V850E2R max 22bit) */ 110 #define SUBYPTE_COND_9_17_22 15 111 {0xfe, -0x100, 2, SUBYPTE_COND_9_17_22 + 1}, 112 {0xfffe, -0x10000, 4, SUBYPTE_COND_9_17_22 + 2}, 113 {0x1ffffe + 2, -0x200000 + 2, 6, 0}, 114 /* Conditional branches.(V850E2R max 22bit) */ 115 #define SUBYPTE_SA_9_17_22 18 116 {0xfe, -0x100, 2, SUBYPTE_SA_9_17_22 + 1}, 117 {0xfffe, -0x10000, 4, SUBYPTE_SA_9_17_22 + 2}, 118 {0x1ffffe + 4, -0x200000 + 4, 8, 0}, 119 /* Conditional branches.(V850E2R max 32bit) */ 120 #define SUBYPTE_COND_9_17_22_32 21 121 {0xfe, -0x100, 2, SUBYPTE_COND_9_17_22_32 + 1}, 122 {0xfffe, -0x10000, 4, SUBYPTE_COND_9_17_22_32 + 2}, 123 {0x1ffffe + 2, -0x200000 + 2, 6, SUBYPTE_COND_9_17_22_32 + 3}, 124 {0x7ffffffe, -0x80000000, 8, 0}, 125 /* Conditional branches.(V850E2R max 32bit) */ 126 #define SUBYPTE_SA_9_17_22_32 25 127 {0xfe, -0x100, 2, SUBYPTE_SA_9_17_22_32 + 1}, 128 {0xfffe, -0x10000, 4, SUBYPTE_SA_9_17_22_32 + 2}, 129 {0x1ffffe + 4, -0x200000 + 4, 8, SUBYPTE_SA_9_17_22_32 + 3}, 130 {0x7ffffffe, -0x80000000, 10, 0}, 131 /* Loop. (V850E2V4_UP, max 22-bit). */ 132 #define SUBYPTE_LOOP_16_22 29 133 {0x0, -0x0fffe, 4, SUBYPTE_LOOP_16_22 + 1}, 134 {0x1ffffe + 2, -0x200000 + 2, 6, 0}, 135 }; 136 137 static int v850_relax = 0; 138 139 /* Default branch disp size 22 or 32. */ 140 static int default_disp_size = 22; 141 142 /* Default no using bcond17. */ 143 static int no_bcond17 = 0; 144 145 /* Default no using ld/st 23bit offset. */ 146 static int no_stld23 = 0; 147 148 /* Fixups. */ 149 #define MAX_INSN_FIXUPS 5 150 151 struct v850_fixup 152 { 153 expressionS exp; 154 int opindex; 155 bfd_reloc_code_real_type reloc; 156 }; 157 158 struct v850_fixup fixups[MAX_INSN_FIXUPS]; 159 static int fc; 160 161 struct v850_seg_entry 162 { 163 segT s; 164 const char *name; 165 flagword flags; 166 }; 167 168 struct v850_seg_entry v850_seg_table[] = 169 { 170 { NULL, ".sdata", 171 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS 172 | SEC_SMALL_DATA }, 173 { NULL, ".tdata", 174 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS }, 175 { NULL, ".zdata", 176 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS }, 177 { NULL, ".sbss", 178 SEC_ALLOC | SEC_SMALL_DATA }, 179 { NULL, ".tbss", 180 SEC_ALLOC }, 181 { NULL, ".zbss", 182 SEC_ALLOC}, 183 { NULL, ".rosdata", 184 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA 185 | SEC_HAS_CONTENTS | SEC_SMALL_DATA }, 186 { NULL, ".rozdata", 187 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA 188 | SEC_HAS_CONTENTS }, 189 { NULL, ".scommon", 190 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS 191 | SEC_SMALL_DATA | SEC_IS_COMMON }, 192 { NULL, ".tcommon", 193 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS 194 | SEC_IS_COMMON }, 195 { NULL, ".zcommon", 196 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS 197 | SEC_IS_COMMON }, 198 { NULL, ".call_table_data", 199 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS }, 200 { NULL, ".call_table_text", 201 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE 202 | SEC_HAS_CONTENTS}, 203 }; 204 205 #define SDATA_SECTION 0 206 #define TDATA_SECTION 1 207 #define ZDATA_SECTION 2 208 #define SBSS_SECTION 3 209 #define TBSS_SECTION 4 210 #define ZBSS_SECTION 5 211 #define ROSDATA_SECTION 6 212 #define ROZDATA_SECTION 7 213 #define SCOMMON_SECTION 8 214 #define TCOMMON_SECTION 9 215 #define ZCOMMON_SECTION 10 216 #define CALL_TABLE_DATA_SECTION 11 217 #define CALL_TABLE_TEXT_SECTION 12 218 219 static void 220 do_v850_seg (int i, subsegT sub) 221 { 222 struct v850_seg_entry *seg = v850_seg_table + i; 223 224 obj_elf_section_change_hook (); 225 226 if (seg->s != NULL) 227 subseg_set (seg->s, sub); 228 else 229 { 230 seg->s = subseg_new (seg->name, sub); 231 bfd_set_section_flags (seg->s, seg->flags); 232 if ((seg->flags & SEC_LOAD) == 0) 233 seg_info (seg->s)->bss = 1; 234 } 235 } 236 237 static void 238 v850_seg (int i) 239 { 240 subsegT sub = get_absolute_expression (); 241 242 do_v850_seg (i, sub); 243 demand_empty_rest_of_line (); 244 } 245 246 static void 247 v850_offset (int ignore ATTRIBUTE_UNUSED) 248 { 249 char *pfrag; 250 int temp = get_absolute_expression (); 251 252 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0, 253 (offsetT) temp, (char *) 0); 254 *pfrag = 0; 255 256 demand_empty_rest_of_line (); 257 } 258 259 /* Copied from obj_elf_common() in gas/config/obj-elf.c. */ 260 261 static void 262 v850_comm (int area) 263 { 264 char *name; 265 char c; 266 char *p; 267 int temp; 268 unsigned int size; 269 symbolS *symbolP; 270 int have_align; 271 272 c = get_symbol_name (&name); 273 274 /* Just after name is now '\0'. */ 275 p = input_line_pointer; 276 *p = c; 277 278 SKIP_WHITESPACE (); 279 280 if (*input_line_pointer != ',') 281 { 282 as_bad (_("Expected comma after symbol-name")); 283 ignore_rest_of_line (); 284 return; 285 } 286 287 /* Skip ','. */ 288 input_line_pointer++; 289 290 if ((temp = get_absolute_expression ()) < 0) 291 { 292 /* xgettext:c-format */ 293 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp); 294 ignore_rest_of_line (); 295 return; 296 } 297 298 size = temp; 299 *p = 0; 300 symbolP = symbol_find_or_make (name); 301 *p = c; 302 303 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 304 { 305 as_bad (_("Ignoring attempt to re-define symbol")); 306 ignore_rest_of_line (); 307 return; 308 } 309 310 if (S_GET_VALUE (symbolP) != 0) 311 { 312 if (S_GET_VALUE (symbolP) != size) 313 /* xgettext:c-format */ 314 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."), 315 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); 316 } 317 318 know (symbol_get_frag (symbolP) == &zero_address_frag); 319 320 if (*input_line_pointer != ',') 321 have_align = 0; 322 else 323 { 324 have_align = 1; 325 input_line_pointer++; 326 SKIP_WHITESPACE (); 327 } 328 329 if (! have_align || *input_line_pointer != '"') 330 { 331 if (! have_align) 332 temp = 0; 333 else 334 { 335 temp = get_absolute_expression (); 336 337 if (temp < 0) 338 { 339 temp = 0; 340 as_warn (_("Common alignment negative; 0 assumed")); 341 } 342 } 343 344 if (symbol_get_obj (symbolP)->local) 345 { 346 segT old_sec; 347 int old_subsec; 348 char *pfrag; 349 int align; 350 flagword applicable; 351 352 old_sec = now_seg; 353 old_subsec = now_subseg; 354 355 applicable = bfd_applicable_section_flags (stdoutput); 356 357 applicable &= SEC_ALLOC; 358 359 switch (area) 360 { 361 case SCOMMON_SECTION: 362 do_v850_seg (SBSS_SECTION, 0); 363 break; 364 365 case ZCOMMON_SECTION: 366 do_v850_seg (ZBSS_SECTION, 0); 367 break; 368 369 case TCOMMON_SECTION: 370 do_v850_seg (TBSS_SECTION, 0); 371 break; 372 } 373 374 if (temp) 375 { 376 /* Convert to a power of 2 alignment. */ 377 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align) 378 ; 379 380 if (temp != 1) 381 { 382 as_bad (_("Common alignment not a power of 2")); 383 ignore_rest_of_line (); 384 return; 385 } 386 } 387 else 388 align = 0; 389 390 record_alignment (now_seg, align); 391 392 if (align) 393 frag_align (align, 0, 0); 394 395 switch (area) 396 { 397 case SCOMMON_SECTION: 398 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s) 399 symbol_get_frag (symbolP)->fr_symbol = 0; 400 break; 401 402 case ZCOMMON_SECTION: 403 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s) 404 symbol_get_frag (symbolP)->fr_symbol = 0; 405 break; 406 407 case TCOMMON_SECTION: 408 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s) 409 symbol_get_frag (symbolP)->fr_symbol = 0; 410 break; 411 412 default: 413 abort (); 414 } 415 416 symbol_set_frag (symbolP, frag_now); 417 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, 418 (offsetT) size, (char *) 0); 419 *pfrag = 0; 420 S_SET_SIZE (symbolP, size); 421 422 switch (area) 423 { 424 case SCOMMON_SECTION: 425 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s); 426 break; 427 428 case ZCOMMON_SECTION: 429 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s); 430 break; 431 432 case TCOMMON_SECTION: 433 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s); 434 break; 435 436 default: 437 abort (); 438 } 439 440 S_CLEAR_EXTERNAL (symbolP); 441 obj_elf_section_change_hook (); 442 subseg_set (old_sec, old_subsec); 443 } 444 else 445 { 446 segT old_sec; 447 int old_subsec; 448 449 allocate_common: 450 old_sec = now_seg; 451 old_subsec = now_subseg; 452 453 S_SET_VALUE (symbolP, (valueT) size); 454 S_SET_ALIGN (symbolP, temp); 455 S_SET_EXTERNAL (symbolP); 456 457 switch (area) 458 { 459 case SCOMMON_SECTION: 460 case ZCOMMON_SECTION: 461 case TCOMMON_SECTION: 462 do_v850_seg (area, 0); 463 S_SET_SEGMENT (symbolP, v850_seg_table[area].s); 464 break; 465 466 default: 467 abort (); 468 } 469 470 obj_elf_section_change_hook (); 471 subseg_set (old_sec, old_subsec); 472 } 473 } 474 else 475 { 476 input_line_pointer++; 477 478 /* @@ Some use the dot, some don't. Can we get some consistency?? */ 479 if (*input_line_pointer == '.') 480 input_line_pointer++; 481 482 /* @@ Some say data, some say bss. */ 483 if (!startswith (input_line_pointer, "bss\"") 484 && !startswith (input_line_pointer, "data\"")) 485 { 486 while (*--input_line_pointer != '"') 487 ; 488 input_line_pointer--; 489 goto bad_common_segment; 490 } 491 492 while (*input_line_pointer++ != '"') 493 ; 494 495 goto allocate_common; 496 } 497 498 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT; 499 500 demand_empty_rest_of_line (); 501 return; 502 503 { 504 bad_common_segment: 505 p = input_line_pointer; 506 while (*p && *p != '\n') 507 p++; 508 c = *p; 509 *p = '\0'; 510 as_bad (_("bad .common segment %s"), input_line_pointer + 1); 511 *p = c; 512 input_line_pointer = p; 513 ignore_rest_of_line (); 514 return; 515 } 516 } 517 518 static void 519 set_machine (int number) 520 { 521 machine = number; 522 bfd_set_arch_mach (stdoutput, v850_target_arch, machine); 523 524 switch (machine) 525 { 526 case 0: SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850); break; 527 case bfd_mach_v850: SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850); break; 528 case bfd_mach_v850e: SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E); break; 529 case bfd_mach_v850e1: SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E); break; 530 case bfd_mach_v850e2: SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E2); break; 531 case bfd_mach_v850e2v3:SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E2V3); break; 532 case bfd_mach_v850e3v5: SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E3V5); break; 533 } 534 } 535 536 static void 537 v850_longcode (int type) 538 { 539 expressionS ex; 540 541 if (! v850_relax) 542 { 543 if (type == 1) 544 as_warn (_(".longcall pseudo-op seen when not relaxing")); 545 else 546 as_warn (_(".longjump pseudo-op seen when not relaxing")); 547 } 548 549 expression (&ex); 550 551 if (ex.X_op != O_symbol || ex.X_add_number != 0) 552 { 553 as_bad (_("bad .longcall format")); 554 ignore_rest_of_line (); 555 556 return; 557 } 558 559 if (type == 1) 560 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1, 561 BFD_RELOC_V850_LONGCALL); 562 else 563 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1, 564 BFD_RELOC_V850_LONGJUMP); 565 566 demand_empty_rest_of_line (); 567 } 568 569 /* The target specific pseudo-ops which we support. */ 570 const pseudo_typeS md_pseudo_table[] = 571 { 572 { "sdata", v850_seg, SDATA_SECTION }, 573 { "tdata", v850_seg, TDATA_SECTION }, 574 { "zdata", v850_seg, ZDATA_SECTION }, 575 { "sbss", v850_seg, SBSS_SECTION }, 576 { "tbss", v850_seg, TBSS_SECTION }, 577 { "zbss", v850_seg, ZBSS_SECTION }, 578 { "rosdata", v850_seg, ROSDATA_SECTION }, 579 { "rozdata", v850_seg, ROZDATA_SECTION }, 580 { "offset", v850_offset, 0 }, 581 { "word", cons, 4 }, 582 { "zcomm", v850_comm, ZCOMMON_SECTION }, 583 { "scomm", v850_comm, SCOMMON_SECTION }, 584 { "tcomm", v850_comm, TCOMMON_SECTION }, 585 { "v850", set_machine, 0 }, 586 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION }, 587 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION }, 588 { "v850e", set_machine, bfd_mach_v850e }, 589 { "v850e1", set_machine, bfd_mach_v850e1 }, 590 { "v850e2", set_machine, bfd_mach_v850e2 }, 591 { "v850e2v3", set_machine, bfd_mach_v850e2v3 }, 592 { "v850e2v4", set_machine, bfd_mach_v850e3v5 }, 593 { "v850e3v5", set_machine, bfd_mach_v850e3v5 }, 594 { "longcall", v850_longcode, 1 }, 595 { "longjump", v850_longcode, 2 }, 596 { NULL, NULL, 0 } 597 }; 598 599 /* Opcode hash table. */ 600 static htab_t v850_hash; 601 602 /* This table is sorted. Suitable for searching by a binary search. */ 603 static const struct reg_name pre_defined_registers[] = 604 { 605 { "ep", 30, PROCESSOR_ALL }, /* ep - element ptr. */ 606 { "gp", 4, PROCESSOR_ALL }, /* gp - global ptr. */ 607 { "hp", 2, PROCESSOR_ALL }, /* hp - handler stack ptr. */ 608 { "lp", 31, PROCESSOR_ALL }, /* lp - link ptr. */ 609 { "r0", 0, PROCESSOR_ALL }, 610 { "r1", 1, PROCESSOR_ALL }, 611 { "r10", 10, PROCESSOR_ALL }, 612 { "r11", 11, PROCESSOR_ALL }, 613 { "r12", 12, PROCESSOR_ALL }, 614 { "r13", 13, PROCESSOR_ALL }, 615 { "r14", 14, PROCESSOR_ALL }, 616 { "r15", 15, PROCESSOR_ALL }, 617 { "r16", 16, PROCESSOR_ALL }, 618 { "r17", 17, PROCESSOR_ALL }, 619 { "r18", 18, PROCESSOR_ALL }, 620 { "r19", 19, PROCESSOR_ALL }, 621 { "r2", 2, PROCESSOR_ALL }, 622 { "r20", 20, PROCESSOR_ALL }, 623 { "r21", 21, PROCESSOR_ALL }, 624 { "r22", 22, PROCESSOR_ALL }, 625 { "r23", 23, PROCESSOR_ALL }, 626 { "r24", 24, PROCESSOR_ALL }, 627 { "r25", 25, PROCESSOR_ALL }, 628 { "r26", 26, PROCESSOR_ALL }, 629 { "r27", 27, PROCESSOR_ALL }, 630 { "r28", 28, PROCESSOR_ALL }, 631 { "r29", 29, PROCESSOR_ALL }, 632 { "r3", 3, PROCESSOR_ALL }, 633 { "r30", 30, PROCESSOR_ALL }, 634 { "r31", 31, PROCESSOR_ALL }, 635 { "r4", 4, PROCESSOR_ALL }, 636 { "r5", 5, PROCESSOR_ALL }, 637 { "r6", 6, PROCESSOR_ALL }, 638 { "r7", 7, PROCESSOR_ALL }, 639 { "r8", 8, PROCESSOR_ALL }, 640 { "r9", 9, PROCESSOR_ALL }, 641 { "sp", 3, PROCESSOR_ALL }, /* sp - stack ptr. */ 642 { "tp", 5, PROCESSOR_ALL }, /* tp - text ptr. */ 643 { "zero", 0, PROCESSOR_ALL }, 644 }; 645 646 #define REG_NAME_CNT \ 647 (sizeof (pre_defined_registers) / sizeof (struct reg_name)) 648 649 static const struct reg_name system_registers[] = 650 { 651 { "asid", 23, PROCESSOR_NOT_V850 }, 652 { "bpam", 25, PROCESSOR_NOT_V850 }, 653 { "bpav", 24, PROCESSOR_NOT_V850 }, 654 { "bpc", 22, PROCESSOR_NOT_V850 }, 655 { "bpdm", 27, PROCESSOR_NOT_V850 }, 656 { "bpdv", 26, PROCESSOR_NOT_V850 }, 657 { "bsel", 31, PROCESSOR_V850E2_UP }, 658 { "cfg", 7, PROCESSOR_V850E2V3_UP }, 659 { "ctbp", 20, PROCESSOR_NOT_V850 }, 660 { "ctpc", 16, PROCESSOR_NOT_V850 }, 661 { "ctpsw", 17, PROCESSOR_NOT_V850 }, 662 { "dbic", 15, PROCESSOR_V850E2_UP }, 663 { "dbpc", 18, PROCESSOR_NOT_V850 }, 664 { "dbpsw", 19, PROCESSOR_NOT_V850 }, 665 { "dbwr", 30, PROCESSOR_V850E2_UP }, 666 { "dir", 21, PROCESSOR_NOT_V850 }, 667 { "dpa0l", 16, PROCESSOR_V850E2V3_UP }, 668 { "dpa0u", 17, PROCESSOR_V850E2V3_UP }, 669 { "dpa1l", 18, PROCESSOR_V850E2V3_UP }, 670 { "dpa1u", 19, PROCESSOR_V850E2V3_UP }, 671 { "dpa2l", 20, PROCESSOR_V850E2V3_UP }, 672 { "dpa2u", 21, PROCESSOR_V850E2V3_UP }, 673 { "dpa3l", 22, PROCESSOR_V850E2V3_UP }, 674 { "dpa3u", 23, PROCESSOR_V850E2V3_UP }, 675 { "dpa4l", 24, PROCESSOR_V850E2V3_UP }, 676 { "dpa4u", 25, PROCESSOR_V850E2V3_UP }, 677 { "dpa5l", 26, PROCESSOR_V850E2V3_UP }, 678 { "dpa5u", 27, PROCESSOR_V850E2V3_UP }, 679 { "ecr", 4, PROCESSOR_ALL }, 680 { "eh_base", 3, PROCESSOR_V850E2V3_UP }, 681 { "eh_cfg", 1, PROCESSOR_V850E2V3_UP }, 682 { "eh_reset", 2, PROCESSOR_V850E2V3_UP }, 683 { "eiic", 13, PROCESSOR_V850E2_UP }, 684 { "eipc", 0, PROCESSOR_ALL }, 685 { "eipsw", 1, PROCESSOR_ALL }, 686 { "eiwr", 28, PROCESSOR_V850E2_UP }, 687 { "feic", 14, PROCESSOR_V850E2_UP }, 688 { "fepc", 2, PROCESSOR_ALL }, 689 { "fepsw", 3, PROCESSOR_ALL }, 690 { "fewr", 29, PROCESSOR_V850E2_UP }, 691 { "fpcc", 9, PROCESSOR_V850E2V3_UP }, 692 { "fpcfg", 10, PROCESSOR_V850E2V3_UP }, 693 { "fpec", 11, PROCESSOR_V850E2V3_UP }, 694 { "fpepc", 7, PROCESSOR_V850E2V3_UP }, 695 { "fpspc", 27, PROCESSOR_V850E2V3_UP }, 696 { "fpsr", 6, PROCESSOR_V850E2V3_UP }, 697 { "fpst", 8, PROCESSOR_V850E2V3_UP }, 698 { "ipa0l", 6, PROCESSOR_V850E2V3_UP }, 699 { "ipa0u", 7, PROCESSOR_V850E2V3_UP }, 700 { "ipa1l", 8, PROCESSOR_V850E2V3_UP }, 701 { "ipa1u", 9, PROCESSOR_V850E2V3_UP }, 702 { "ipa2l", 10, PROCESSOR_V850E2V3_UP }, 703 { "ipa2u", 11, PROCESSOR_V850E2V3_UP }, 704 { "ipa3l", 12, PROCESSOR_V850E2V3_UP }, 705 { "ipa3u", 13, PROCESSOR_V850E2V3_UP }, 706 { "ipa4l", 14, PROCESSOR_V850E2V3_UP }, 707 { "ipa4u", 15, PROCESSOR_V850E2V3_UP }, 708 { "mca", 24, PROCESSOR_V850E2V3_UP }, 709 { "mcc", 26, PROCESSOR_V850E2V3_UP }, 710 { "mcr", 27, PROCESSOR_V850E2V3_UP }, 711 { "mcs", 25, PROCESSOR_V850E2V3_UP }, 712 { "mpc", 1, PROCESSOR_V850E2V3_UP }, 713 { "mpm", 0, PROCESSOR_V850E2V3_UP }, 714 { "mpu10_dpa0l", 16, PROCESSOR_V850E2V3_UP }, 715 { "mpu10_dpa0u", 17, PROCESSOR_V850E2V3_UP }, 716 { "mpu10_dpa1l", 18, PROCESSOR_V850E2V3_UP }, 717 { "mpu10_dpa1u", 19, PROCESSOR_V850E2V3_UP }, 718 { "mpu10_dpa2l", 20, PROCESSOR_V850E2V3_UP }, 719 { "mpu10_dpa2u", 21, PROCESSOR_V850E2V3_UP }, 720 { "mpu10_dpa3l", 22, PROCESSOR_V850E2V3_UP }, 721 { "mpu10_dpa3u", 23, PROCESSOR_V850E2V3_UP }, 722 { "mpu10_dpa4l", 24, PROCESSOR_V850E2V3_UP }, 723 { "mpu10_dpa4u", 25, PROCESSOR_V850E2V3_UP }, 724 { "mpu10_dpa5l", 26, PROCESSOR_V850E2V3_UP }, 725 { "mpu10_dpa5u", 27, PROCESSOR_V850E2V3_UP }, 726 { "mpu10_ipa0l", 6, PROCESSOR_V850E2V3_UP }, 727 { "mpu10_ipa0u", 7, PROCESSOR_V850E2V3_UP }, 728 { "mpu10_ipa1l", 8, PROCESSOR_V850E2V3_UP }, 729 { "mpu10_ipa1u", 9, PROCESSOR_V850E2V3_UP }, 730 { "mpu10_ipa2l", 10, PROCESSOR_V850E2V3_UP }, 731 { "mpu10_ipa2u", 11, PROCESSOR_V850E2V3_UP }, 732 { "mpu10_ipa3l", 12, PROCESSOR_V850E2V3_UP }, 733 { "mpu10_ipa3u", 13, PROCESSOR_V850E2V3_UP }, 734 { "mpu10_ipa4l", 14, PROCESSOR_V850E2V3_UP }, 735 { "mpu10_ipa4u", 15, PROCESSOR_V850E2V3_UP }, 736 { "mpu10_mpc", 1, PROCESSOR_V850E2V3_UP }, 737 { "mpu10_mpm", 0, PROCESSOR_V850E2V3_UP }, 738 { "mpu10_tid", 2, PROCESSOR_V850E2V3_UP }, 739 { "mpu10_vmadr", 5, PROCESSOR_V850E2V3_UP }, 740 { "mpu10_vmecr", 3, PROCESSOR_V850E2V3_UP }, 741 { "mpu10_vmtid", 4, PROCESSOR_V850E2V3_UP }, 742 { "pid", 6, PROCESSOR_V850E2V3_UP }, 743 { "pmcr0", 4, PROCESSOR_V850E2V3_UP }, 744 { "pmis2", 14, PROCESSOR_V850E2V3_UP }, 745 { "psw", 5, PROCESSOR_ALL }, 746 { "scbp", 12, PROCESSOR_V850E2V3_UP }, 747 { "sccfg", 11, PROCESSOR_V850E2V3_UP }, 748 { "sr0", 0, PROCESSOR_ALL }, 749 { "sr1", 1, PROCESSOR_ALL }, 750 { "sr10", 10, PROCESSOR_ALL }, 751 { "sr11", 11, PROCESSOR_ALL }, 752 { "sr12", 12, PROCESSOR_ALL }, 753 { "sr13", 13, PROCESSOR_ALL }, 754 { "sr14", 14, PROCESSOR_ALL }, 755 { "sr15", 15, PROCESSOR_ALL }, 756 { "sr16", 16, PROCESSOR_ALL }, 757 { "sr17", 17, PROCESSOR_ALL }, 758 { "sr18", 18, PROCESSOR_ALL }, 759 { "sr19", 19, PROCESSOR_ALL }, 760 { "sr2", 2, PROCESSOR_ALL }, 761 { "sr20", 20, PROCESSOR_ALL }, 762 { "sr21", 21, PROCESSOR_ALL }, 763 { "sr22", 22, PROCESSOR_ALL }, 764 { "sr23", 23, PROCESSOR_ALL }, 765 { "sr24", 24, PROCESSOR_ALL }, 766 { "sr25", 25, PROCESSOR_ALL }, 767 { "sr26", 26, PROCESSOR_ALL }, 768 { "sr27", 27, PROCESSOR_ALL }, 769 { "sr28", 28, PROCESSOR_ALL }, 770 { "sr29", 29, PROCESSOR_ALL }, 771 { "sr3", 3, PROCESSOR_ALL }, 772 { "sr30", 30, PROCESSOR_ALL }, 773 { "sr31", 31, PROCESSOR_ALL }, 774 { "sr4", 4, PROCESSOR_ALL }, 775 { "sr5", 5, PROCESSOR_ALL }, 776 { "sr6", 6, PROCESSOR_ALL }, 777 { "sr7", 7, PROCESSOR_ALL }, 778 { "sr8", 8, PROCESSOR_ALL }, 779 { "sr9", 9, PROCESSOR_ALL }, 780 { "sw_base", 3, PROCESSOR_V850E2V3_UP }, 781 { "sw_cfg", 1, PROCESSOR_V850E2V3_UP }, 782 { "sw_ctl", 0, PROCESSOR_V850E2V3_UP }, 783 { "tid", 2, PROCESSOR_V850E2V3_UP }, 784 { "vmadr", 6, PROCESSOR_V850E2V3_UP }, 785 { "vmecr", 4, PROCESSOR_V850E2V3_UP }, 786 { "vmtid", 5, PROCESSOR_V850E2V3_UP }, 787 { "vsadr", 2, PROCESSOR_V850E2V3_UP }, 788 { "vsecr", 0, PROCESSOR_V850E2V3_UP }, 789 { "vstid", 1, PROCESSOR_V850E2V3_UP }, 790 }; 791 792 #define SYSREG_NAME_CNT \ 793 (sizeof (system_registers) / sizeof (struct reg_name)) 794 795 796 static const struct reg_name cc_names[] = 797 { 798 { "c", 0x1, PROCESSOR_ALL }, 799 { "e", 0x2, PROCESSOR_ALL }, 800 { "ge", 0xe, PROCESSOR_ALL }, 801 { "gt", 0xf, PROCESSOR_ALL }, 802 { "h", 0xb, PROCESSOR_ALL }, 803 { "l", 0x1, PROCESSOR_ALL }, 804 { "le", 0x7, PROCESSOR_ALL }, 805 { "lt", 0x6, PROCESSOR_ALL }, 806 { "n", 0x4, PROCESSOR_ALL }, 807 { "nc", 0x9, PROCESSOR_ALL }, 808 { "ne", 0xa, PROCESSOR_ALL }, 809 { "nh", 0x3, PROCESSOR_ALL }, 810 { "nl", 0x9, PROCESSOR_ALL }, 811 { "ns", 0xc, PROCESSOR_ALL }, 812 { "nv", 0x8, PROCESSOR_ALL }, 813 { "nz", 0xa, PROCESSOR_ALL }, 814 { "p", 0xc, PROCESSOR_ALL }, 815 { "s", 0x4, PROCESSOR_ALL }, 816 #define COND_SA_NUM 0xd 817 { "sa", COND_SA_NUM, PROCESSOR_ALL }, 818 { "t", 0x5, PROCESSOR_ALL }, 819 { "v", 0x0, PROCESSOR_ALL }, 820 { "z", 0x2, PROCESSOR_ALL }, 821 }; 822 823 #define CC_NAME_CNT \ 824 (sizeof (cc_names) / sizeof (struct reg_name)) 825 826 static const struct reg_name float_cc_names[] = 827 { 828 { "eq", 0x2, PROCESSOR_V850E2V3_UP }, /* true. */ 829 { "f", 0x0, PROCESSOR_V850E2V3_UP }, /* true. */ 830 { "ge", 0xd, PROCESSOR_V850E2V3_UP }, /* false. */ 831 { "gl", 0xb, PROCESSOR_V850E2V3_UP }, /* false. */ 832 { "gle", 0x9, PROCESSOR_V850E2V3_UP }, /* false. */ 833 { "gt", 0xf, PROCESSOR_V850E2V3_UP }, /* false. */ 834 { "le", 0xe, PROCESSOR_V850E2V3_UP }, /* true. */ 835 { "lt", 0xc, PROCESSOR_V850E2V3_UP }, /* true. */ 836 { "neq", 0x2, PROCESSOR_V850E2V3_UP }, /* false. */ 837 { "nge", 0xd, PROCESSOR_V850E2V3_UP }, /* true. */ 838 { "ngl", 0xb, PROCESSOR_V850E2V3_UP }, /* true. */ 839 { "ngle",0x9, PROCESSOR_V850E2V3_UP }, /* true. */ 840 { "ngt", 0xf, PROCESSOR_V850E2V3_UP }, /* true. */ 841 { "nle", 0xe, PROCESSOR_V850E2V3_UP }, /* false. */ 842 { "nlt", 0xc, PROCESSOR_V850E2V3_UP }, /* false. */ 843 { "oge", 0x5, PROCESSOR_V850E2V3_UP }, /* false. */ 844 { "ogl", 0x3, PROCESSOR_V850E2V3_UP }, /* false. */ 845 { "ogt", 0x7, PROCESSOR_V850E2V3_UP }, /* false. */ 846 { "ole", 0x6, PROCESSOR_V850E2V3_UP }, /* true. */ 847 { "olt", 0x4, PROCESSOR_V850E2V3_UP }, /* true. */ 848 { "or", 0x1, PROCESSOR_V850E2V3_UP }, /* false. */ 849 { "seq", 0xa, PROCESSOR_V850E2V3_UP }, /* true. */ 850 { "sf", 0x8, PROCESSOR_V850E2V3_UP }, /* true. */ 851 { "sne", 0xa, PROCESSOR_V850E2V3_UP }, /* false. */ 852 { "st", 0x8, PROCESSOR_V850E2V3_UP }, /* false. */ 853 { "t", 0x0, PROCESSOR_V850E2V3_UP }, /* false. */ 854 { "ueq", 0x3, PROCESSOR_V850E2V3_UP }, /* true. */ 855 { "uge", 0x4, PROCESSOR_V850E2V3_UP }, /* false. */ 856 { "ugt", 0x6, PROCESSOR_V850E2V3_UP }, /* false. */ 857 { "ule", 0x7, PROCESSOR_V850E2V3_UP }, /* true. */ 858 { "ult", 0x5, PROCESSOR_V850E2V3_UP }, /* true. */ 859 { "un", 0x1, PROCESSOR_V850E2V3_UP }, /* true. */ 860 }; 861 862 #define FLOAT_CC_NAME_CNT \ 863 (sizeof (float_cc_names) / sizeof (struct reg_name)) 864 865 866 static const struct reg_name cacheop_names[] = 867 { 868 { "cfald", 0x44, PROCESSOR_V850E3V5_UP }, 869 { "cfali", 0x40, PROCESSOR_V850E3V5_UP }, 870 { "chbid", 0x04, PROCESSOR_V850E3V5_UP }, 871 { "chbii", 0x00, PROCESSOR_V850E3V5_UP }, 872 { "chbiwbd", 0x06, PROCESSOR_V850E3V5_UP }, 873 { "chbwbd", 0x07, PROCESSOR_V850E3V5_UP }, 874 { "cibid", 0x24, PROCESSOR_V850E3V5_UP }, 875 { "cibii", 0x20, PROCESSOR_V850E3V5_UP }, 876 { "cibiwbd", 0x26, PROCESSOR_V850E3V5_UP }, 877 { "cibwbd", 0x27, PROCESSOR_V850E3V5_UP }, 878 { "cildd", 0x65, PROCESSOR_V850E3V5_UP }, 879 { "cildi", 0x61, PROCESSOR_V850E3V5_UP }, 880 { "cistd", 0x64, PROCESSOR_V850E3V5_UP }, 881 { "cisti", 0x60, PROCESSOR_V850E3V5_UP }, 882 }; 883 884 #define CACHEOP_NAME_CNT \ 885 (sizeof (cacheop_names) / sizeof (struct reg_name)) 886 887 static const struct reg_name prefop_names[] = 888 { 889 { "prefd", 0x04, PROCESSOR_V850E3V5_UP }, 890 { "prefi", 0x00, PROCESSOR_V850E3V5_UP }, 891 }; 892 893 #define PREFOP_NAME_CNT \ 894 (sizeof (prefop_names) / sizeof (struct reg_name)) 895 896 static const struct reg_name vector_registers[] = 897 { 898 { "vr0", 0, PROCESSOR_V850E3V5_UP }, 899 { "vr1", 1, PROCESSOR_V850E3V5_UP }, 900 { "vr10", 10, PROCESSOR_V850E3V5_UP }, 901 { "vr11", 11, PROCESSOR_V850E3V5_UP }, 902 { "vr12", 12, PROCESSOR_V850E3V5_UP }, 903 { "vr13", 13, PROCESSOR_V850E3V5_UP }, 904 { "vr14", 14, PROCESSOR_V850E3V5_UP }, 905 { "vr15", 15, PROCESSOR_V850E3V5_UP }, 906 { "vr16", 16, PROCESSOR_V850E3V5_UP }, 907 { "vr17", 17, PROCESSOR_V850E3V5_UP }, 908 { "vr18", 18, PROCESSOR_V850E3V5_UP }, 909 { "vr19", 19, PROCESSOR_V850E3V5_UP }, 910 { "vr2", 2, PROCESSOR_V850E3V5_UP }, 911 { "vr20", 20, PROCESSOR_V850E3V5_UP }, 912 { "vr21", 21, PROCESSOR_V850E3V5_UP }, 913 { "vr22", 22, PROCESSOR_V850E3V5_UP }, 914 { "vr23", 23, PROCESSOR_V850E3V5_UP }, 915 { "vr24", 24, PROCESSOR_V850E3V5_UP }, 916 { "vr25", 25, PROCESSOR_V850E3V5_UP }, 917 { "vr26", 26, PROCESSOR_V850E3V5_UP }, 918 { "vr27", 27, PROCESSOR_V850E3V5_UP }, 919 { "vr28", 28, PROCESSOR_V850E3V5_UP }, 920 { "vr29", 29, PROCESSOR_V850E3V5_UP }, 921 { "vr3", 3, PROCESSOR_V850E3V5_UP }, 922 { "vr30", 30, PROCESSOR_V850E3V5_UP }, 923 { "vr31", 31, PROCESSOR_V850E3V5_UP }, 924 { "vr4", 4, PROCESSOR_V850E3V5_UP }, 925 { "vr5", 5, PROCESSOR_V850E3V5_UP }, 926 { "vr6", 6, PROCESSOR_V850E3V5_UP }, 927 { "vr7", 7, PROCESSOR_V850E3V5_UP }, 928 { "vr8", 8, PROCESSOR_V850E3V5_UP }, 929 { "vr9", 9, PROCESSOR_V850E3V5_UP }, 930 }; 931 932 #define VREG_NAME_CNT \ 933 (sizeof (vector_registers) / sizeof (struct reg_name)) 934 935 /* Do a binary search of the given register table to see if NAME is a 936 valid register name. Return the register number from the array on 937 success, or -1 on failure. */ 938 939 static int 940 reg_name_search (const struct reg_name *regs, 941 int regcount, 942 const char *name, 943 bool accept_numbers) 944 { 945 int middle, low, high; 946 int cmp; 947 symbolS *symbolP; 948 949 /* If the register name is a symbol, then evaluate it. */ 950 if ((symbolP = symbol_find (name)) != NULL) 951 { 952 /* If the symbol is an alias for another name then use that. 953 If the symbol is an alias for a number, then return the number. */ 954 if (symbol_equated_p (symbolP)) 955 name 956 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol); 957 else if (accept_numbers) 958 { 959 int reg = S_GET_VALUE (symbolP); 960 return reg; 961 } 962 963 /* Otherwise drop through and try parsing name normally. */ 964 } 965 966 low = 0; 967 high = regcount - 1; 968 969 do 970 { 971 middle = (low + high) / 2; 972 cmp = strcasecmp (name, regs[middle].name); 973 if (cmp < 0) 974 high = middle - 1; 975 else if (cmp > 0) 976 low = middle + 1; 977 else 978 return ((regs[middle].processors & processor_mask) 979 ? regs[middle].value 980 : -1); 981 } 982 while (low <= high); 983 return -1; 984 } 985 986 /* Summary of register_name(). 987 988 in: Input_line_pointer points to 1st char of operand. 989 990 out: An expressionS. 991 The operand may have been a register: in this case, X_op == O_register, 992 X_add_number is set to the register number, and truth is returned. 993 Input_line_pointer->(next non-blank) char after operand, or is in 994 its original state. */ 995 996 static bool 997 register_name (expressionS *expressionP) 998 { 999 int reg_number; 1000 char *name; 1001 char *start; 1002 char c; 1003 1004 /* Find the spelling of the operand. */ 1005 start = input_line_pointer; 1006 c = get_symbol_name (&name); 1007 1008 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, 1009 name, false); 1010 1011 /* Put back the delimiting char. */ 1012 (void) restore_line_pointer (c); 1013 1014 expressionP->X_add_symbol = NULL; 1015 expressionP->X_op_symbol = NULL; 1016 1017 /* Look to see if it's in the register table. */ 1018 if (reg_number >= 0) 1019 { 1020 expressionP->X_op = O_register; 1021 expressionP->X_add_number = reg_number; 1022 1023 return true; 1024 } 1025 1026 /* Reset the line as if we had not done anything. */ 1027 input_line_pointer = start; 1028 1029 expressionP->X_op = O_illegal; 1030 1031 return false; 1032 } 1033 1034 /* Summary of system_register_name(). 1035 1036 in: INPUT_LINE_POINTER points to 1st char of operand. 1037 EXPRESSIONP points to an expression structure to be filled in. 1038 ACCEPT_NUMBERS is true iff numerical register names may be used. 1039 1040 out: An expressionS structure in expressionP. 1041 The operand may have been a register: in this case, X_op == O_register, 1042 X_add_number is set to the register number, and truth is returned. 1043 Input_line_pointer->(next non-blank) char after operand, or is in 1044 its original state. */ 1045 1046 static bool 1047 system_register_name (expressionS *expressionP, 1048 bool accept_numbers) 1049 { 1050 int reg_number; 1051 char *name; 1052 char *start; 1053 char c; 1054 1055 /* Find the spelling of the operand. */ 1056 start = input_line_pointer; 1057 c = get_symbol_name (&name); 1058 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name, 1059 accept_numbers); 1060 1061 /* Put back the delimiting char. */ 1062 (void) restore_line_pointer (c); 1063 1064 if (reg_number < 0 1065 && accept_numbers) 1066 { 1067 /* Reset input_line pointer. */ 1068 input_line_pointer = start; 1069 1070 if (ISDIGIT (*input_line_pointer)) 1071 { 1072 reg_number = strtol (input_line_pointer, &input_line_pointer, 0); 1073 } 1074 } 1075 1076 expressionP->X_add_symbol = NULL; 1077 expressionP->X_op_symbol = NULL; 1078 1079 /* Look to see if it's in the register table. */ 1080 if (reg_number >= 0) 1081 { 1082 expressionP->X_op = O_register; 1083 expressionP->X_add_number = reg_number; 1084 1085 return true; 1086 } 1087 1088 /* Reset the line as if we had not done anything. */ 1089 input_line_pointer = start; 1090 1091 expressionP->X_op = O_illegal; 1092 1093 return false; 1094 } 1095 1096 /* Summary of cc_name(). 1097 1098 in: INPUT_LINE_POINTER points to 1st char of operand. 1099 1100 out: An expressionS. 1101 The operand may have been a register: in this case, X_op == O_register, 1102 X_add_number is set to the register number, and truth is returned. 1103 Input_line_pointer->(next non-blank) char after operand, or is in 1104 its original state. */ 1105 1106 static bool 1107 cc_name (expressionS *expressionP, 1108 bool accept_numbers) 1109 { 1110 int reg_number; 1111 char *name; 1112 char *start; 1113 char c; 1114 1115 /* Find the spelling of the operand. */ 1116 start = input_line_pointer; 1117 c = get_symbol_name (&name); 1118 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, accept_numbers); 1119 1120 /* Put back the delimiting char. */ 1121 (void) restore_line_pointer (c); 1122 1123 if (reg_number < 0 1124 && accept_numbers) 1125 { 1126 /* Reset input_line pointer. */ 1127 input_line_pointer = start; 1128 1129 if (ISDIGIT (*input_line_pointer)) 1130 { 1131 reg_number = strtol (input_line_pointer, &input_line_pointer, 0); 1132 } 1133 } 1134 1135 expressionP->X_add_symbol = NULL; 1136 expressionP->X_op_symbol = NULL; 1137 1138 /* Look to see if it's in the register table. */ 1139 if (reg_number >= 0) 1140 { 1141 expressionP->X_op = O_constant; 1142 expressionP->X_add_number = reg_number; 1143 1144 return true; 1145 } 1146 1147 /* Reset the line as if we had not done anything. */ 1148 input_line_pointer = start; 1149 1150 expressionP->X_op = O_illegal; 1151 expressionP->X_add_number = 0; 1152 1153 return false; 1154 } 1155 1156 static bool 1157 float_cc_name (expressionS *expressionP, 1158 bool accept_numbers) 1159 { 1160 int reg_number; 1161 char *name; 1162 char *start; 1163 char c; 1164 1165 /* Find the spelling of the operand. */ 1166 start = input_line_pointer; 1167 c = get_symbol_name (&name); 1168 reg_number = reg_name_search (float_cc_names, FLOAT_CC_NAME_CNT, name, accept_numbers); 1169 1170 /* Put back the delimiting char. */ 1171 (void) restore_line_pointer (c); 1172 1173 if (reg_number < 0 1174 && accept_numbers) 1175 { 1176 /* Reset input_line pointer. */ 1177 input_line_pointer = start; 1178 1179 if (ISDIGIT (*input_line_pointer)) 1180 { 1181 reg_number = strtol (input_line_pointer, &input_line_pointer, 0); 1182 } 1183 } 1184 1185 expressionP->X_add_symbol = NULL; 1186 expressionP->X_op_symbol = NULL; 1187 1188 /* Look to see if it's in the register table. */ 1189 if (reg_number >= 0) 1190 { 1191 expressionP->X_op = O_constant; 1192 expressionP->X_add_number = reg_number; 1193 1194 return true; 1195 } 1196 1197 /* Reset the line as if we had not done anything. */ 1198 input_line_pointer = start; 1199 1200 expressionP->X_op = O_illegal; 1201 expressionP->X_add_number = 0; 1202 1203 return false; 1204 } 1205 1206 static bool 1207 cacheop_name (expressionS * expressionP, 1208 bool accept_numbers) 1209 { 1210 int reg_number; 1211 char *name; 1212 char *start; 1213 char c; 1214 1215 /* Find the spelling of the operand. */ 1216 start = input_line_pointer; 1217 c = get_symbol_name (&name); 1218 reg_number = reg_name_search (cacheop_names, CACHEOP_NAME_CNT, name, accept_numbers); 1219 1220 /* Put back the delimiting char. */ 1221 (void) restore_line_pointer (c); 1222 1223 if (reg_number < 0 1224 && accept_numbers) 1225 { 1226 /* Reset input_line pointer. */ 1227 input_line_pointer = start; 1228 1229 if (ISDIGIT (*input_line_pointer)) 1230 reg_number = strtol (input_line_pointer, &input_line_pointer, 0); 1231 } 1232 1233 expressionP->X_add_symbol = NULL; 1234 expressionP->X_op_symbol = NULL; 1235 1236 /* Look to see if it's in the register table. */ 1237 if (reg_number >= 0) 1238 { 1239 expressionP->X_op = O_constant; 1240 expressionP->X_add_number = reg_number; 1241 1242 return true; 1243 } 1244 1245 /* Reset the line as if we had not done anything. */ 1246 input_line_pointer = start; 1247 1248 expressionP->X_op = O_illegal; 1249 expressionP->X_add_number = 0; 1250 1251 return false; 1252 } 1253 1254 static bool 1255 prefop_name (expressionS * expressionP, 1256 bool accept_numbers) 1257 { 1258 int reg_number; 1259 char *name; 1260 char *start; 1261 char c; 1262 1263 /* Find the spelling of the operand. */ 1264 start = input_line_pointer; 1265 c = get_symbol_name (&name); 1266 reg_number = reg_name_search (prefop_names, PREFOP_NAME_CNT, name, accept_numbers); 1267 1268 /* Put back the delimiting char. */ 1269 (void) restore_line_pointer (c); 1270 1271 if (reg_number < 0 1272 && accept_numbers) 1273 { 1274 /* Reset input_line pointer. */ 1275 input_line_pointer = start; 1276 1277 if (ISDIGIT (*input_line_pointer)) 1278 reg_number = strtol (input_line_pointer, &input_line_pointer, 0); 1279 } 1280 1281 expressionP->X_add_symbol = NULL; 1282 expressionP->X_op_symbol = NULL; 1283 1284 /* Look to see if it's in the register table. */ 1285 if (reg_number >= 0) 1286 { 1287 expressionP->X_op = O_constant; 1288 expressionP->X_add_number = reg_number; 1289 1290 return true; 1291 } 1292 1293 /* Reset the line as if we had not done anything. */ 1294 input_line_pointer = start; 1295 1296 expressionP->X_op = O_illegal; 1297 expressionP->X_add_number = 0; 1298 1299 return false; 1300 } 1301 1302 static bool 1303 vector_register_name (expressionS *expressionP) 1304 { 1305 int reg_number; 1306 char *name; 1307 char *start; 1308 char c; 1309 1310 /* Find the spelling of the operand. */ 1311 start = input_line_pointer; 1312 c = get_symbol_name (&name); 1313 1314 reg_number = reg_name_search (vector_registers, VREG_NAME_CNT, 1315 name, false); 1316 1317 /* Put back the delimiting char. */ 1318 (void) restore_line_pointer (c); 1319 1320 expressionP->X_add_symbol = NULL; 1321 expressionP->X_op_symbol = NULL; 1322 1323 /* Look to see if it's in the register table. */ 1324 if (reg_number >= 0) 1325 { 1326 expressionP->X_op = O_register; 1327 expressionP->X_add_number = reg_number; 1328 1329 return true; 1330 } 1331 1332 /* Reset the line as if we had not done anything. */ 1333 input_line_pointer = start; 1334 1335 expressionP->X_op = O_illegal; 1336 1337 return false; 1338 } 1339 1340 static void 1341 skip_white_space (void) 1342 { 1343 while (*input_line_pointer == ' ' 1344 || *input_line_pointer == '\t') 1345 ++input_line_pointer; 1346 } 1347 1348 /* Summary of parse_register_list (). 1349 1350 in: INPUT_LINE_POINTER points to 1st char of a list of registers. 1351 INSN is the partially constructed instruction. 1352 OPERAND is the operand being inserted. 1353 1354 out: NULL if the parse completed successfully, otherwise a 1355 pointer to an error message is returned. If the parse 1356 completes the correct bit fields in the instruction 1357 will be filled in. 1358 1359 Parses register lists with the syntax: 1360 1361 { rX } 1362 { rX, rY } 1363 { rX - rY } 1364 { rX - rY, rZ } 1365 etc 1366 1367 and also parses constant expressions whose bits indicate the 1368 registers in the lists. The LSB in the expression refers to 1369 the lowest numbered permissible register in the register list, 1370 and so on upwards. System registers are considered to be very 1371 high numbers. */ 1372 1373 static const char * 1374 parse_register_list (unsigned long *insn, 1375 const struct v850_operand *operand) 1376 { 1377 static int type1_regs[32] = 1378 { 1379 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1380 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 1381 }; 1382 1383 int *regs; 1384 expressionS exp; 1385 1386 /* Select a register array to parse. */ 1387 switch (operand->shift) 1388 { 1389 case 0xffe00001: regs = type1_regs; break; 1390 default: 1391 as_bad (_("unknown operand shift: %x\n"), operand->shift); 1392 return _("internal failure in parse_register_list"); 1393 } 1394 1395 skip_white_space (); 1396 1397 /* If the expression starts with a curly brace it is a register list. 1398 Otherwise it is a constant expression, whose bits indicate which 1399 registers are to be included in the list. */ 1400 if (*input_line_pointer != '{') 1401 { 1402 int reg; 1403 int i; 1404 1405 expression (&exp); 1406 1407 if (exp.X_op != O_constant) 1408 return _("constant expression or register list expected"); 1409 1410 if (regs == type1_regs) 1411 { 1412 if (exp.X_add_number & 0xFFFFF000) 1413 return _("high bits set in register list expression"); 1414 1415 for (reg = 20; reg < 32; reg++) 1416 if (exp.X_add_number & (1 << (reg - 20))) 1417 { 1418 for (i = 0; i < 32; i++) 1419 if (regs[i] == reg) 1420 *insn |= (1 << i); 1421 } 1422 } 1423 1424 return NULL; 1425 } 1426 1427 input_line_pointer++; 1428 1429 /* Parse the register list until a terminator (closing curly brace or 1430 new-line) is found. */ 1431 for (;;) 1432 { 1433 skip_white_space (); 1434 1435 if (register_name (&exp)) 1436 { 1437 int i; 1438 1439 /* Locate the given register in the list, and if it is there, 1440 insert the corresponding bit into the instruction. */ 1441 for (i = 0; i < 32; i++) 1442 { 1443 if (regs[i] == exp.X_add_number) 1444 { 1445 *insn |= 1u << i; 1446 break; 1447 } 1448 } 1449 1450 if (i == 32) 1451 return _("illegal register included in list"); 1452 } 1453 else if (system_register_name (&exp, true)) 1454 { 1455 if (regs == type1_regs) 1456 { 1457 return _("system registers cannot be included in list"); 1458 } 1459 } 1460 1461 if (*input_line_pointer == '}') 1462 { 1463 input_line_pointer++; 1464 break; 1465 } 1466 else if (*input_line_pointer == ',') 1467 { 1468 input_line_pointer++; 1469 continue; 1470 } 1471 else if (*input_line_pointer == '-') 1472 { 1473 /* We have encountered a range of registers: rX - rY. */ 1474 int j; 1475 expressionS exp2; 1476 1477 /* Skip the dash. */ 1478 ++input_line_pointer; 1479 1480 /* Get the second register in the range. */ 1481 if (! register_name (&exp2)) 1482 { 1483 return _("second register should follow dash in register list"); 1484 } 1485 1486 if (exp.X_add_number > exp2.X_add_number) 1487 { 1488 return _("second register should be greater than first register"); 1489 } 1490 1491 /* Add the rest of the registers in the range. */ 1492 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++) 1493 { 1494 int i; 1495 1496 /* Locate the given register in the list, and if it is there, 1497 insert the corresponding bit into the instruction. */ 1498 for (i = 0; i < 32; i++) 1499 { 1500 if (regs[i] == j) 1501 { 1502 *insn |= (1 << i); 1503 break; 1504 } 1505 } 1506 1507 if (i == 32) 1508 return _("illegal register included in list"); 1509 } 1510 1511 exp = exp2; 1512 } 1513 else 1514 break; 1515 } 1516 1517 return NULL; 1518 } 1519 1520 const char *md_shortopts = "m:"; 1521 1522 struct option md_longopts[] = 1523 { 1524 #define OPTION_DISP_SIZE_DEFAULT_22 (OPTION_MD_BASE) 1525 {"disp-size-default-22", no_argument, NULL, OPTION_DISP_SIZE_DEFAULT_22}, 1526 #define OPTION_DISP_SIZE_DEFAULT_32 (OPTION_MD_BASE + 1) 1527 {"disp-size-default-32", no_argument, NULL, OPTION_DISP_SIZE_DEFAULT_32}, 1528 {NULL, no_argument, NULL, 0} 1529 }; 1530 1531 size_t md_longopts_size = sizeof (md_longopts); 1532 1533 static bool v850_data_8 = false; 1534 1535 void 1536 md_show_usage (FILE *stream) 1537 { 1538 fprintf (stream, _(" V850 options:\n")); 1539 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n")); 1540 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n")); 1541 fprintf (stream, _(" -mv850 The code is targeted at the v850\n")); 1542 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n")); 1543 fprintf (stream, _(" -mv850e1 The code is targeted at the v850e1\n")); 1544 fprintf (stream, _(" -mv850e2 The code is targeted at the v850e2\n")); 1545 fprintf (stream, _(" -mv850e2v3 The code is targeted at the v850e2v3\n")); 1546 fprintf (stream, _(" -mv850e2v4 Alias for -mv850e3v5\n")); 1547 fprintf (stream, _(" -mv850e3v5 The code is targeted at the v850e3v5\n")); 1548 fprintf (stream, _(" -mrelax Enable relaxation\n")); 1549 fprintf (stream, _(" --disp-size-default-22 branch displacement with unknown size is 22 bits (default)\n")); 1550 fprintf (stream, _(" --disp-size-default-32 branch displacement with unknown size is 32 bits\n")); 1551 fprintf (stream, _(" -mextension enable extension opcode support\n")); 1552 fprintf (stream, _(" -mno-bcond17 disable b<cond> disp17 instruction\n")); 1553 fprintf (stream, _(" -mno-stld23 disable st/ld offset23 instruction\n")); 1554 fprintf (stream, _(" -mgcc-abi Mark the binary as using the old GCC ABI\n")); 1555 fprintf (stream, _(" -mrh850-abi Mark the binary as using the RH850 ABI (default)\n")); 1556 fprintf (stream, _(" -m8byte-align Mark the binary as using 64-bit alignment\n")); 1557 fprintf (stream, _(" -m4byte-align Mark the binary as using 32-bit alignment (default)\n")); 1558 fprintf (stream, _(" -msoft-float Mark the binary as not using FP insns (default for pre e2v3)\n")); 1559 fprintf (stream, _(" -mhard-float Mark the binary as using FP insns (default for e2v3 and up)\n")); 1560 } 1561 1562 int 1563 md_parse_option (int c, const char *arg) 1564 { 1565 if (c != 'm') 1566 { 1567 switch (c) 1568 { 1569 case OPTION_DISP_SIZE_DEFAULT_22: 1570 default_disp_size = 22; 1571 return 1; 1572 1573 case OPTION_DISP_SIZE_DEFAULT_32: 1574 default_disp_size = 32; 1575 return 1; 1576 } 1577 return 0; 1578 } 1579 1580 if (strcmp (arg, "warn-signed-overflow") == 0) 1581 warn_signed_overflows = true; 1582 1583 else if (strcmp (arg, "warn-unsigned-overflow") == 0) 1584 warn_unsigned_overflows = true; 1585 1586 else if (strcmp (arg, "v850") == 0) 1587 { 1588 machine = 0; 1589 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850); 1590 } 1591 else if (strcmp (arg, "v850e") == 0) 1592 { 1593 machine = bfd_mach_v850e; 1594 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E); 1595 } 1596 else if (strcmp (arg, "v850e1") == 0) 1597 { 1598 machine = bfd_mach_v850e1; 1599 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E1); 1600 } 1601 else if (strcmp (arg, "v850e2") == 0) 1602 { 1603 machine = bfd_mach_v850e2; 1604 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E2); 1605 } 1606 else if (strcmp (arg, "v850e2v3") == 0) 1607 { 1608 machine = bfd_mach_v850e2v3; 1609 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E2V3); 1610 } 1611 else if (strcmp (arg, "v850e2v4") == 0) 1612 { 1613 machine = bfd_mach_v850e3v5; 1614 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E3V5); 1615 } 1616 else if (strcmp (arg, "v850e3v5") == 0) 1617 { 1618 machine = bfd_mach_v850e3v5; 1619 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E3V5); 1620 } 1621 else if (strcmp (arg, "extension") == 0) 1622 { 1623 processor_mask |= PROCESSOR_OPTION_EXTENSION | PROCESSOR_OPTION_ALIAS; 1624 } 1625 else if (strcmp (arg, "no-bcond17") == 0) 1626 { 1627 no_bcond17 = 1; 1628 } 1629 else if (strcmp (arg, "no-stld23") == 0) 1630 { 1631 no_stld23 = 1; 1632 } 1633 else if (strcmp (arg, "relax") == 0) 1634 v850_relax = 1; 1635 else if (strcmp (arg, "gcc-abi") == 0) 1636 { 1637 v850_target_arch = bfd_arch_v850; 1638 v850_target_format = "elf32-v850"; 1639 } 1640 else if (strcmp (arg, "rh850-abi") == 0) 1641 { 1642 v850_target_arch = bfd_arch_v850_rh850; 1643 v850_target_format = "elf32-v850-rh850"; 1644 } 1645 else if (strcmp (arg, "8byte-align") == 0) 1646 { 1647 v850_data_8 = true; 1648 v850_e_flags |= EF_RH850_DATA_ALIGN8; 1649 } 1650 else if (strcmp (arg, "4byte-align") == 0) 1651 { 1652 v850_data_8 = false; 1653 v850_e_flags &= ~ EF_RH850_DATA_ALIGN8; 1654 } 1655 else if (strcmp (arg, "soft-float") == 0) 1656 soft_float = 1; 1657 else if (strcmp (arg, "hard-float") == 0) 1658 soft_float = 0; 1659 else 1660 return 0; 1661 1662 return 1; 1663 } 1664 1665 symbolS * 1666 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 1667 { 1668 return 0; 1669 } 1670 1671 const char * 1672 md_atof (int type, char *litp, int *sizep) 1673 { 1674 return ieee_md_atof (type, litp, sizep, false); 1675 } 1676 1677 /* Very gross. */ 1678 1679 void 1680 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 1681 asection *sec, 1682 fragS *fragP) 1683 { 1684 union u 1685 { 1686 bfd_reloc_code_real_type fx_r_type; 1687 char * fr_opcode; 1688 } 1689 opcode_converter; 1690 subseg_change (sec, 0); 1691 1692 opcode_converter.fr_opcode = fragP->fr_opcode; 1693 1694 subseg_change (sec, 0); 1695 1696 if (fragP->fr_subtype == SUBYPTE_LOOP_16_22) 1697 { 1698 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, 1699 fragP->fr_offset, 1, 1700 BFD_RELOC_UNUSED + opcode_converter.fx_r_type); 1701 fragP->fr_fix += 4; 1702 } 1703 else if (fragP->fr_subtype == SUBYPTE_LOOP_16_22 + 1) 1704 { 1705 unsigned char * buffer = 1706 (unsigned char *) (fragP->fr_fix + &fragP->fr_literal[0]); 1707 int loop_reg = (buffer[0] & 0x1f); 1708 1709 /* Add -1.reg. */ 1710 md_number_to_chars ((char *) buffer, 0x025f | (loop_reg << 11), 2); 1711 /* Now create the conditional branch + fixup to the final target. */ 1712 /* 0x000107ea = bne LBL(disp17). */ 1713 md_number_to_chars ((char *) buffer + 2, 0x000107ea, 4); 1714 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, 1715 fragP->fr_offset, 1, 1716 BFD_RELOC_V850_17_PCREL); 1717 fragP->fr_fix += 6; 1718 } 1719 /* In range conditional or unconditional branch. */ 1720 else if (fragP->fr_subtype == SUBYPTE_COND_9_22 1721 || fragP->fr_subtype == SUBYPTE_UNCOND_9_22 1722 || fragP->fr_subtype == SUBYPTE_COND_9_22_32 1723 || fragP->fr_subtype == SUBYPTE_UNCOND_9_22_32 1724 || fragP->fr_subtype == SUBYPTE_COND_9_17_22 1725 || fragP->fr_subtype == SUBYPTE_COND_9_17_22_32 1726 || fragP->fr_subtype == SUBYPTE_SA_9_22 1727 || fragP->fr_subtype == SUBYPTE_SA_9_22_32 1728 || fragP->fr_subtype == SUBYPTE_SA_9_17_22 1729 || fragP->fr_subtype == SUBYPTE_SA_9_17_22_32) 1730 1731 { 1732 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, 1733 fragP->fr_offset, 1, 1734 BFD_RELOC_UNUSED + opcode_converter.fx_r_type); 1735 fragP->fr_fix += 2; 1736 } 1737 /* V850e2r-v3 17bit conditional branch. */ 1738 else if (fragP->fr_subtype == SUBYPTE_COND_9_17_22 + 1 1739 || fragP->fr_subtype == SUBYPTE_COND_9_17_22_32 + 1 1740 || fragP->fr_subtype == SUBYPTE_SA_9_17_22 + 1 1741 || fragP->fr_subtype == SUBYPTE_SA_9_17_22_32 + 1) 1742 { 1743 unsigned char *buffer = 1744 (unsigned char *) (fragP->fr_fix + &fragP->fr_literal[0]); 1745 1746 buffer[0] &= 0x0f; /* Use condition. */ 1747 buffer[0] |= 0xe0; 1748 buffer[1] = 0x07; 1749 1750 /* Now create the unconditional branch + fixup to the final 1751 target. */ 1752 md_number_to_chars ((char *) buffer + 2, 0x0001, 2); 1753 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, 1754 fragP->fr_offset, 1, BFD_RELOC_V850_17_PCREL); 1755 fragP->fr_fix += 4; 1756 } 1757 /* Out of range conditional branch. Emit a branch around a 22bit jump. */ 1758 else if (fragP->fr_subtype == SUBYPTE_COND_9_22 + 1 1759 || fragP->fr_subtype == SUBYPTE_COND_9_22_32 + 1 1760 || fragP->fr_subtype == SUBYPTE_COND_9_17_22 + 2 1761 || fragP->fr_subtype == SUBYPTE_COND_9_17_22_32 + 2) 1762 { 1763 unsigned char *buffer = 1764 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 1765 1766 /* Reverse the condition of the first branch. */ 1767 buffer[0] ^= 0x08; 1768 /* Mask off all the displacement bits. */ 1769 buffer[0] &= 0x8f; 1770 buffer[1] &= 0x07; 1771 /* Now set the displacement bits so that we branch 1772 around the unconditional branch. */ 1773 buffer[0] |= 0x30; 1774 1775 /* Now create the unconditional branch + fixup to the final 1776 target. */ 1777 md_number_to_chars ((char *) buffer + 2, 0x00000780, 4); 1778 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, 1779 fragP->fr_offset, 1, BFD_RELOC_V850_22_PCREL); 1780 fragP->fr_fix += 6; 1781 } 1782 /* Out of range conditional branch. Emit a branch around a 32bit jump. */ 1783 else if (fragP->fr_subtype == SUBYPTE_COND_9_22_32 + 2 1784 || fragP->fr_subtype == SUBYPTE_COND_9_17_22_32 + 3) 1785 { 1786 unsigned char *buffer = 1787 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 1788 1789 /* Reverse the condition of the first branch. */ 1790 buffer[0] ^= 0x08; 1791 /* Mask off all the displacement bits. */ 1792 buffer[0] &= 0x8f; 1793 buffer[1] &= 0x07; 1794 /* Now set the displacement bits so that we branch 1795 around the unconditional branch. */ 1796 buffer[0] |= 0x40; 1797 1798 /* Now create the unconditional branch + fixup to the final 1799 target. */ 1800 md_number_to_chars ((char *) buffer + 2, 0x02e0, 2); 1801 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, 1802 fragP->fr_offset + 2, 1, BFD_RELOC_V850_32_PCREL); 1803 fragP->fr_fix += 8; 1804 } 1805 /* Out of range unconditional branch. Emit a 22bit jump. */ 1806 else if (fragP->fr_subtype == SUBYPTE_UNCOND_9_22 + 1 1807 || fragP->fr_subtype == SUBYPTE_UNCOND_9_22_32 + 1) 1808 { 1809 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4); 1810 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, 1811 fragP->fr_offset, 1, BFD_RELOC_V850_22_PCREL); 1812 fragP->fr_fix += 4; 1813 } 1814 /* Out of range unconditional branch. Emit a 32bit jump. */ 1815 else if (fragP->fr_subtype == SUBYPTE_UNCOND_9_22_32 + 2) 1816 { 1817 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x02e0, 2); 1818 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, 1819 fragP->fr_offset + 2, 1, BFD_RELOC_V850_32_PCREL); 1820 fragP->fr_fix += 6; 1821 } 1822 /* Out of range SA conditional branch. Emit a branch to a 22bit jump. */ 1823 else if (fragP->fr_subtype == SUBYPTE_SA_9_22 + 1 1824 || fragP->fr_subtype == SUBYPTE_SA_9_22_32 + 1 1825 || fragP->fr_subtype == SUBYPTE_SA_9_17_22 + 2 1826 || fragP->fr_subtype == SUBYPTE_SA_9_17_22_32 + 2) 1827 { 1828 unsigned char *buffer = 1829 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 1830 1831 /* bsa .+4 */ 1832 buffer[0] &= 0x8f; 1833 buffer[0] |= 0x20; 1834 buffer[1] &= 0x07; 1835 1836 /* br .+6 */ 1837 md_number_to_chars ((char *) buffer + 2, 0x05b5, 2); 1838 1839 /* Now create the unconditional branch + fixup to the final 1840 target. */ 1841 /* jr SYM */ 1842 md_number_to_chars ((char *) buffer + 4, 0x00000780, 4); 1843 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, 1844 fragP->fr_offset, 1, 1845 BFD_RELOC_V850_22_PCREL); 1846 fragP->fr_fix += 8; 1847 } 1848 /* Out of range SA conditional branch. Emit a branch around a 32bit jump. */ 1849 else if (fragP->fr_subtype == SUBYPTE_SA_9_22_32 + 2 1850 || fragP->fr_subtype == SUBYPTE_SA_9_17_22_32 + 3) 1851 { 1852 unsigned char *buffer = 1853 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 1854 1855 /* bsa .+2 */ 1856 buffer[0] &= 0x8f; 1857 buffer[0] |= 0x20; 1858 buffer[1] &= 0x07; 1859 1860 /* br .+8 */ 1861 md_number_to_chars ((char *) buffer + 2, 0x05c5, 2); 1862 1863 /* Now create the unconditional branch + fixup to the final 1864 target. */ 1865 /* jr SYM */ 1866 md_number_to_chars ((char *) buffer + 4, 0x02e0, 2); 1867 fix_new (fragP, fragP->fr_fix + 6, 4, fragP->fr_symbol, 1868 fragP->fr_offset + 2, 1, BFD_RELOC_V850_32_PCREL); 1869 1870 fragP->fr_fix += 10; 1871 } 1872 else 1873 abort (); 1874 } 1875 1876 valueT 1877 md_section_align (asection *seg, valueT addr) 1878 { 1879 int align = bfd_section_alignment (seg); 1880 return ((addr + (1 << align) - 1) & -(1 << align)); 1881 } 1882 1883 void 1884 md_begin (void) 1885 { 1886 const char *prev_name = ""; 1887 const struct v850_opcode *op; 1888 1889 if (startswith (TARGET_CPU, "v850e3v5")) 1890 { 1891 if (machine == -1) 1892 machine = bfd_mach_v850e3v5; 1893 1894 if (!processor_mask) 1895 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E3V5); 1896 } 1897 else if (startswith (TARGET_CPU, "v850e2v4")) 1898 { 1899 if (machine == -1) 1900 machine = bfd_mach_v850e3v5; 1901 1902 if (!processor_mask) 1903 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E3V5); 1904 } 1905 else if (startswith (TARGET_CPU, "v850e2v3")) 1906 { 1907 if (machine == -1) 1908 machine = bfd_mach_v850e2v3; 1909 1910 if (!processor_mask) 1911 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E2V3); 1912 } 1913 else if (startswith (TARGET_CPU, "v850e2")) 1914 { 1915 if (machine == -1) 1916 machine = bfd_mach_v850e2; 1917 1918 if (!processor_mask) 1919 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E2); 1920 } 1921 else if (startswith (TARGET_CPU, "v850e1")) 1922 { 1923 if (machine == -1) 1924 machine = bfd_mach_v850e1; 1925 1926 if (!processor_mask) 1927 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E1); 1928 } 1929 else if (startswith (TARGET_CPU, "v850e")) 1930 { 1931 if (machine == -1) 1932 machine = bfd_mach_v850e; 1933 1934 if (!processor_mask) 1935 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850E); 1936 } 1937 else if (startswith (TARGET_CPU, "v850")) 1938 { 1939 if (machine == -1) 1940 machine = 0; 1941 1942 if (!processor_mask) 1943 SET_PROCESSOR_MASK (processor_mask, PROCESSOR_V850); 1944 } 1945 else 1946 /* xgettext:c-format */ 1947 as_bad (_("Unable to determine default target processor from string: %s"), 1948 TARGET_CPU); 1949 1950 if (soft_float == -1) 1951 soft_float = machine < bfd_mach_v850e2v3; 1952 1953 v850_hash = str_htab_create (); 1954 1955 /* Insert unique names into hash table. The V850 instruction set 1956 has many identical opcode names that have different opcodes based 1957 on the operands. This hash table then provides a quick index to 1958 the first opcode with a particular name in the opcode table. */ 1959 op = v850_opcodes; 1960 while (op->name) 1961 { 1962 if (strcmp (prev_name, op->name)) 1963 { 1964 prev_name = (char *) op->name; 1965 str_hash_insert (v850_hash, op->name, op, 0); 1966 } 1967 op++; 1968 } 1969 1970 bfd_set_arch_mach (stdoutput, v850_target_arch, machine); 1971 bfd_set_private_flags (stdoutput, v850_e_flags); 1972 } 1973 1974 1975 static bfd_reloc_code_real_type 1976 handle_hi016 (const struct v850_operand *operand, const char **errmsg) 1977 { 1978 if (operand == NULL) 1979 return BFD_RELOC_HI16; 1980 1981 if (operand->default_reloc == BFD_RELOC_HI16) 1982 return BFD_RELOC_HI16; 1983 1984 if (operand->default_reloc == BFD_RELOC_HI16_S) 1985 return BFD_RELOC_HI16; 1986 1987 if (operand->default_reloc == BFD_RELOC_16) 1988 return BFD_RELOC_HI16; 1989 1990 *errmsg = _("hi0() relocation used on an instruction which does " 1991 "not support it"); 1992 return BFD_RELOC_64; /* Used to indicate an error condition. */ 1993 } 1994 1995 static bfd_reloc_code_real_type 1996 handle_hi16 (const struct v850_operand *operand, const char **errmsg) 1997 { 1998 if (operand == NULL) 1999 return BFD_RELOC_HI16_S; 2000 2001 if (operand->default_reloc == BFD_RELOC_HI16_S) 2002 return BFD_RELOC_HI16_S; 2003 2004 if (operand->default_reloc == BFD_RELOC_HI16) 2005 return BFD_RELOC_HI16_S; 2006 2007 if (operand->default_reloc == BFD_RELOC_16) 2008 return BFD_RELOC_HI16_S; 2009 2010 *errmsg = _("hi() relocation used on an instruction which does " 2011 "not support it"); 2012 return BFD_RELOC_64; /* Used to indicate an error condition. */ 2013 } 2014 2015 static bfd_reloc_code_real_type 2016 handle_lo16 (const struct v850_operand *operand, const char **errmsg) 2017 { 2018 if (operand == NULL) 2019 return BFD_RELOC_LO16; 2020 2021 switch (operand->default_reloc) 2022 { 2023 case BFD_RELOC_LO16: return BFD_RELOC_LO16; 2024 case BFD_RELOC_V850_LO16_SPLIT_OFFSET: return BFD_RELOC_V850_LO16_SPLIT_OFFSET; 2025 case BFD_RELOC_V850_16_SPLIT_OFFSET: return BFD_RELOC_V850_LO16_SPLIT_OFFSET; 2026 case BFD_RELOC_V850_16_S1: return BFD_RELOC_V850_LO16_S1; 2027 case BFD_RELOC_16: return BFD_RELOC_LO16; 2028 default: 2029 *errmsg = _("lo() relocation used on an instruction which does " 2030 "not support it"); 2031 return BFD_RELOC_64; /* Used to indicate an error condition. */ 2032 } 2033 } 2034 2035 static bfd_reloc_code_real_type 2036 handle_ctoff (const struct v850_operand *operand, const char **errmsg) 2037 { 2038 if (v850_target_arch == bfd_arch_v850_rh850) 2039 { 2040 *errmsg = _("ctoff() is not supported by the rh850 ABI. Use -mgcc-abi instead"); 2041 return BFD_RELOC_64; /* Used to indicate an error condition. */ 2042 } 2043 2044 if (operand == NULL) 2045 return BFD_RELOC_V850_CALLT_16_16_OFFSET; 2046 2047 if (operand->default_reloc == BFD_RELOC_V850_CALLT_6_7_OFFSET) 2048 return operand->default_reloc; 2049 2050 if (operand->default_reloc == BFD_RELOC_V850_16_S1) 2051 return BFD_RELOC_V850_CALLT_15_16_OFFSET; 2052 2053 if (operand->default_reloc == BFD_RELOC_16) 2054 return BFD_RELOC_V850_CALLT_16_16_OFFSET; 2055 2056 *errmsg = _("ctoff() relocation used on an instruction which does not support it"); 2057 return BFD_RELOC_64; /* Used to indicate an error condition. */ 2058 } 2059 2060 static bfd_reloc_code_real_type 2061 handle_sdaoff (const struct v850_operand *operand, const char **errmsg) 2062 { 2063 if (operand == NULL) 2064 return BFD_RELOC_V850_SDA_16_16_OFFSET; 2065 2066 if (operand->default_reloc == BFD_RELOC_V850_16_SPLIT_OFFSET) 2067 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET; 2068 2069 if (operand->default_reloc == BFD_RELOC_16) 2070 return BFD_RELOC_V850_SDA_16_16_OFFSET; 2071 2072 if (operand->default_reloc == BFD_RELOC_V850_16_S1) 2073 return BFD_RELOC_V850_SDA_15_16_OFFSET; 2074 2075 *errmsg = _("sdaoff() relocation used on an instruction which does not support it"); 2076 return BFD_RELOC_64; /* Used to indicate an error condition. */ 2077 } 2078 2079 static bfd_reloc_code_real_type 2080 handle_zdaoff (const struct v850_operand *operand, const char **errmsg) 2081 { 2082 if (operand == NULL) 2083 return BFD_RELOC_V850_ZDA_16_16_OFFSET; 2084 2085 if (operand->default_reloc == BFD_RELOC_V850_16_SPLIT_OFFSET) 2086 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET; 2087 2088 if (operand->default_reloc == BFD_RELOC_16) 2089 return BFD_RELOC_V850_ZDA_16_16_OFFSET; 2090 2091 if (operand->default_reloc == BFD_RELOC_V850_16_S1) 2092 return BFD_RELOC_V850_ZDA_15_16_OFFSET; 2093 2094 *errmsg = _("zdaoff() relocation used on an instruction which does not support it"); 2095 return BFD_RELOC_64; /* Used to indicate an error condition. */ 2096 } 2097 2098 static bfd_reloc_code_real_type 2099 handle_tdaoff (const struct v850_operand *operand, const char **errmsg) 2100 { 2101 if (operand == NULL) 2102 /* Data item, not an instruction. */ 2103 return BFD_RELOC_V850_TDA_16_16_OFFSET; 2104 2105 switch (operand->default_reloc) 2106 { 2107 /* sld.hu, operand: D5-4. */ 2108 case BFD_RELOC_V850_TDA_4_5_OFFSET: 2109 /* sld.bu, operand: D4. */ 2110 case BFD_RELOC_V850_TDA_4_4_OFFSET: 2111 /* sld.w/sst.w, operand: D8_6. */ 2112 case BFD_RELOC_V850_TDA_6_8_OFFSET: 2113 /* sld.h/sst.h, operand: D8_7. */ 2114 case BFD_RELOC_V850_TDA_7_8_OFFSET: 2115 /* sld.b/sst.b, operand: D7. */ 2116 case BFD_RELOC_V850_TDA_7_7_OFFSET: 2117 return operand->default_reloc; 2118 default: 2119 break; 2120 } 2121 2122 if (operand->default_reloc == BFD_RELOC_16 && operand->shift == 16) 2123 /* set1 & chums, operands: D16. */ 2124 return BFD_RELOC_V850_TDA_16_16_OFFSET; 2125 2126 *errmsg = _("tdaoff() relocation used on an instruction which does not support it"); 2127 /* Used to indicate an error condition. */ 2128 return BFD_RELOC_64; 2129 } 2130 2131 /* Warning: The code in this function relies upon the definitions 2132 in the v850_operands[] array (defined in opcodes/v850-opc.c) 2133 matching the hard coded values contained herein. */ 2134 2135 static bfd_reloc_code_real_type 2136 v850_reloc_prefix (const struct v850_operand *operand, const char **errmsg) 2137 { 2138 bool paren_skipped = false; 2139 2140 /* Skip leading opening parenthesis. */ 2141 if (*input_line_pointer == '(') 2142 { 2143 ++input_line_pointer; 2144 paren_skipped = true; 2145 } 2146 2147 #define CHECK_(name, reloc) \ 2148 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \ 2149 { \ 2150 input_line_pointer += strlen (name); \ 2151 return reloc; \ 2152 } 2153 2154 CHECK_ ("hi0", handle_hi016 (operand, errmsg)); 2155 CHECK_ ("hi", handle_hi16 (operand, errmsg)); 2156 CHECK_ ("lo", handle_lo16 (operand, errmsg)); 2157 CHECK_ ("sdaoff", handle_sdaoff (operand, errmsg)); 2158 CHECK_ ("zdaoff", handle_zdaoff (operand, errmsg)); 2159 CHECK_ ("tdaoff", handle_tdaoff (operand, errmsg)); 2160 CHECK_ ("hilo", BFD_RELOC_32); 2161 CHECK_ ("lo23", BFD_RELOC_V850_23); 2162 CHECK_ ("ctoff", handle_ctoff (operand, errmsg)); 2163 2164 /* Restore skipped parenthesis. */ 2165 if (paren_skipped) 2166 --input_line_pointer; 2167 2168 return BFD_RELOC_NONE; 2169 } 2170 2171 /* Insert an operand value into an instruction. */ 2172 2173 static unsigned long 2174 v850_insert_operand (unsigned long insn, 2175 const struct v850_operand *operand, 2176 offsetT val, 2177 const char **errmsg) 2178 { 2179 if (operand->insert) 2180 { 2181 const char *message = NULL; 2182 2183 insn = operand->insert (insn, val, &message); 2184 if (message != NULL) 2185 { 2186 if ((operand->flags & V850_OPERAND_SIGNED) 2187 && ! warn_signed_overflows 2188 && v850_msg_is_out_of_range (message)) 2189 { 2190 /* Skip warning... */ 2191 } 2192 else if ((operand->flags & V850_OPERAND_SIGNED) == 0 2193 && ! warn_unsigned_overflows 2194 && v850_msg_is_out_of_range (message)) 2195 { 2196 /* Skip warning... */ 2197 } 2198 else 2199 { 2200 if (errmsg != NULL) 2201 *errmsg = message; 2202 } 2203 } 2204 } 2205 else if (operand->bits == -1 2206 || operand->flags & V850E_IMMEDIATE16 2207 || operand->flags & V850E_IMMEDIATE23 2208 || operand->flags & V850E_IMMEDIATE32) 2209 { 2210 abort (); 2211 } 2212 else 2213 { 2214 if (operand->bits < 32) 2215 { 2216 long min, max; 2217 2218 if ((operand->flags & V850_OPERAND_SIGNED) != 0) 2219 { 2220 if (! warn_signed_overflows) 2221 max = (1 << operand->bits) - 1; 2222 else 2223 max = (1 << (operand->bits - 1)) - 1; 2224 2225 min = -(1 << (operand->bits - 1)); 2226 } 2227 else 2228 { 2229 max = (1 << operand->bits) - 1; 2230 2231 if (! warn_unsigned_overflows) 2232 min = -(1 << (operand->bits - 1)); 2233 else 2234 min = 0; 2235 } 2236 2237 /* Some people write constants with the sign extension done by 2238 hand but only up to 32 bits. This shouldn't really be valid, 2239 but, to permit this code to assemble on a 64-bit host, we 2240 sign extend the 32-bit value to 64 bits if so doing makes the 2241 value valid. */ 2242 if (val > max 2243 && (offsetT) (val - 0x80000000 - 0x80000000) >= min 2244 && (offsetT) (val - 0x80000000 - 0x80000000) <= max) 2245 val = val - 0x80000000 - 0x80000000; 2246 2247 /* Similarly, people write expressions like ~(1<<15), and expect 2248 this to be OK for a 32-bit unsigned value. */ 2249 else if (val < min 2250 && (offsetT) (val + 0x80000000 + 0x80000000) >= min 2251 && (offsetT) (val + 0x80000000 + 0x80000000) <= max) 2252 val = val + 0x80000000 + 0x80000000; 2253 2254 else if (val < (offsetT) min || val > (offsetT) max) 2255 { 2256 static char buf [128]; 2257 2258 /* Restore min and mix to expected values for decimal ranges. */ 2259 if ((operand->flags & V850_OPERAND_SIGNED) 2260 && ! warn_signed_overflows) 2261 max = (1 << (operand->bits - 1)) - 1; 2262 2263 if (! (operand->flags & V850_OPERAND_SIGNED) 2264 && ! warn_unsigned_overflows) 2265 min = 0; 2266 2267 sprintf (buf, _("operand out of range (%d is not between %d and %d)"), 2268 (int) val, (int) min, (int) max); 2269 *errmsg = buf; 2270 } 2271 2272 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift); 2273 } 2274 else 2275 { 2276 insn |= (((long) val) << operand->shift); 2277 } 2278 } 2279 2280 return insn; 2281 } 2282 2283 static char copy_of_instruction[128]; 2285 2286 void 2287 md_assemble (char *str) 2288 { 2289 char *s; 2290 char *start_of_operands; 2291 struct v850_opcode *opcode; 2292 struct v850_opcode *next_opcode; 2293 const unsigned char *opindex_ptr; 2294 int next_opindex; 2295 int relaxable = 0; 2296 unsigned long insn = 0; 2297 unsigned long insn_size; 2298 char *f = NULL; 2299 int i; 2300 int match; 2301 bool extra_data_after_insn = false; 2302 unsigned extra_data_len = 0; 2303 unsigned long extra_data = 0; 2304 char *saved_input_line_pointer; 2305 char most_match_errmsg[1024]; 2306 int most_match_count = -1; 2307 2308 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1); 2309 most_match_errmsg[0] = 0; 2310 2311 /* Get the opcode. */ 2312 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 2313 continue; 2314 2315 if (*s != '\0') 2316 *s++ = '\0'; 2317 2318 /* Find the first opcode with the proper name. */ 2319 opcode = (struct v850_opcode *) str_hash_find (v850_hash, str); 2320 if (opcode == NULL) 2321 { 2322 /* xgettext:c-format */ 2323 as_bad (_("Unrecognized opcode: `%s'"), str); 2324 ignore_rest_of_line (); 2325 return; 2326 } 2327 2328 str = s; 2329 while (ISSPACE (*str)) 2330 ++str; 2331 2332 start_of_operands = str; 2333 2334 saved_input_line_pointer = input_line_pointer; 2335 2336 for (;;) 2337 { 2338 const char *errmsg = NULL; 2339 const char *warningmsg = NULL; 2340 2341 match = 0; 2342 opindex_ptr = opcode->operands; 2343 2344 if (no_stld23) 2345 { 2346 if ((startswith (opcode->name, "st.") 2347 && v850_operands[opcode->operands[1]].bits == 23) 2348 || (startswith (opcode->name, "ld.") 2349 && v850_operands[opcode->operands[0]].bits == 23)) 2350 { 2351 errmsg = _("st/ld offset 23 instruction was disabled ."); 2352 goto error; 2353 } 2354 } 2355 2356 if ((opcode->processors & processor_mask & PROCESSOR_MASK) == 0 2357 || (((opcode->processors & ~PROCESSOR_MASK) != 0) 2358 && ((opcode->processors & processor_mask & ~PROCESSOR_MASK) == 0))) 2359 { 2360 errmsg = _("Target processor does not support this instruction."); 2361 goto error; 2362 } 2363 2364 relaxable = 0; 2365 fc = 0; 2366 next_opindex = 0; 2367 insn = opcode->opcode; 2368 extra_data_len = 0; 2369 extra_data_after_insn = false; 2370 2371 input_line_pointer = str = start_of_operands; 2372 2373 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2374 { 2375 const struct v850_operand *operand; 2376 char *hold; 2377 expressionS ex; 2378 bfd_reloc_code_real_type reloc; 2379 2380 if (next_opindex == 0) 2381 operand = &v850_operands[*opindex_ptr]; 2382 else 2383 { 2384 operand = &v850_operands[next_opindex]; 2385 next_opindex = 0; 2386 } 2387 2388 errmsg = NULL; 2389 2390 while (*str == ' ') 2391 ++str; 2392 2393 if (operand->flags & V850_OPERAND_BANG 2394 && *str == '!') 2395 ++str; 2396 else if (operand->flags & V850_OPERAND_PERCENT 2397 && *str == '%') 2398 ++str; 2399 2400 if (*str == ',' || *str == '[' || *str == ']') 2401 ++str; 2402 2403 while (*str == ' ') 2404 ++str; 2405 2406 if ( (strcmp (opcode->name, "pushsp") == 0 2407 || strcmp (opcode->name, "popsp") == 0 2408 || strcmp (opcode->name, "dbpush") == 0) 2409 && (*str == '-')) 2410 ++str; 2411 2412 if (operand->flags & V850_OPERAND_RELAX) 2413 relaxable = 1; 2414 2415 /* Gather the operand. */ 2416 hold = input_line_pointer; 2417 input_line_pointer = str; 2418 2419 /* lo(), hi(), hi0(), etc... */ 2420 if ((reloc = v850_reloc_prefix (operand, &errmsg)) != BFD_RELOC_NONE) 2421 { 2422 /* This is a fake reloc, used to indicate an error condition. */ 2423 if (reloc == BFD_RELOC_64) 2424 { 2425 /* match = 1; */ 2426 goto error; 2427 } 2428 2429 expression (&ex); 2430 2431 if (ex.X_op == O_constant) 2432 { 2433 switch (reloc) 2434 { 2435 case BFD_RELOC_V850_ZDA_16_16_OFFSET: 2436 case BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET: 2437 case BFD_RELOC_V850_ZDA_15_16_OFFSET: 2438 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]" 2439 and the like. */ 2440 /* Fall through. */ 2441 2442 case BFD_RELOC_LO16: 2443 case BFD_RELOC_V850_LO16_S1: 2444 case BFD_RELOC_V850_LO16_SPLIT_OFFSET: 2445 { 2446 /* Truncate, then sign extend the value. */ 2447 ex.X_add_number = SEXT16 (ex.X_add_number); 2448 break; 2449 } 2450 2451 case BFD_RELOC_HI16: 2452 { 2453 /* Truncate, then sign extend the value. */ 2454 ex.X_add_number = SEXT16 (ex.X_add_number >> 16); 2455 break; 2456 } 2457 2458 case BFD_RELOC_HI16_S: 2459 { 2460 /* Truncate, then sign extend the value. */ 2461 int temp = (ex.X_add_number >> 16) & 0xffff; 2462 2463 temp += (ex.X_add_number >> 15) & 1; 2464 2465 ex.X_add_number = SEXT16 (temp); 2466 break; 2467 } 2468 2469 case BFD_RELOC_V850_23: 2470 if ((operand->flags & V850E_IMMEDIATE23) == 0) 2471 { 2472 errmsg = _("immediate operand is too large"); 2473 goto error; 2474 } 2475 break; 2476 2477 case BFD_RELOC_32: 2478 case BFD_RELOC_V850_32_ABS: 2479 case BFD_RELOC_V850_32_PCREL: 2480 if ((operand->flags & V850E_IMMEDIATE32) == 0) 2481 { 2482 errmsg = _("immediate operand is too large"); 2483 goto error; 2484 } 2485 2486 break; 2487 2488 default: 2489 as_bad (_("AAARG -> unhandled constant reloc: %d"), reloc); 2490 break; 2491 } 2492 2493 if (operand->flags & V850E_IMMEDIATE32) 2494 { 2495 extra_data_after_insn = true; 2496 extra_data_len = 4; 2497 extra_data = 0; 2498 } 2499 else if (operand->flags & V850E_IMMEDIATE23) 2500 { 2501 if (reloc != BFD_RELOC_V850_23) 2502 { 2503 errmsg = _("immediate operand is too large"); 2504 goto error; 2505 } 2506 extra_data_after_insn = true; 2507 extra_data_len = 2; 2508 extra_data = 0; 2509 } 2510 else if ((operand->flags & V850E_IMMEDIATE16) 2511 || (operand->flags & V850E_IMMEDIATE16HI)) 2512 { 2513 if (operand->flags & V850E_IMMEDIATE16HI 2514 && reloc != BFD_RELOC_HI16 2515 && reloc != BFD_RELOC_HI16_S) 2516 { 2517 errmsg = _("immediate operand is too large"); 2518 goto error; 2519 } 2520 else if (operand->flags & V850E_IMMEDIATE16 2521 && reloc != BFD_RELOC_LO16) 2522 { 2523 errmsg = _("immediate operand is too large"); 2524 goto error; 2525 } 2526 2527 extra_data_after_insn = true; 2528 extra_data_len = 2; 2529 extra_data = 0; 2530 } 2531 2532 if (fc > MAX_INSN_FIXUPS) 2533 as_fatal (_("too many fixups")); 2534 2535 fixups[fc].exp = ex; 2536 fixups[fc].opindex = *opindex_ptr; 2537 fixups[fc].reloc = reloc; 2538 fc++; 2539 } 2540 else /* ex.X_op != O_constant. */ 2541 { 2542 if ((reloc == BFD_RELOC_32 2543 || reloc == BFD_RELOC_V850_32_ABS 2544 || reloc == BFD_RELOC_V850_32_PCREL) 2545 && operand->bits < 32) 2546 { 2547 errmsg = _("immediate operand is too large"); 2548 goto error; 2549 } 2550 else if (reloc == BFD_RELOC_V850_23 2551 && (operand->flags & V850E_IMMEDIATE23) == 0) 2552 { 2553 errmsg = _("immediate operand is too large"); 2554 goto error; 2555 } 2556 else if ((reloc == BFD_RELOC_HI16 2557 || reloc == BFD_RELOC_HI16_S) 2558 && operand->bits < 16) 2559 { 2560 errmsg = _("immediate operand is too large"); 2561 goto error; 2562 } 2563 2564 if (operand->flags & V850E_IMMEDIATE32) 2565 { 2566 extra_data_after_insn = true; 2567 extra_data_len = 4; 2568 extra_data = 0; 2569 } 2570 else if (operand->flags & V850E_IMMEDIATE23) 2571 { 2572 if (reloc != BFD_RELOC_V850_23) 2573 { 2574 errmsg = _("immediate operand is too large"); 2575 goto error; 2576 } 2577 extra_data_after_insn = true; 2578 extra_data_len = 2; 2579 extra_data = 0; 2580 } 2581 else if ((operand->flags & V850E_IMMEDIATE16) 2582 || (operand->flags & V850E_IMMEDIATE16HI)) 2583 { 2584 if (operand->flags & V850E_IMMEDIATE16HI 2585 && reloc != BFD_RELOC_HI16 2586 && reloc != BFD_RELOC_HI16_S) 2587 { 2588 errmsg = _("immediate operand is too large"); 2589 goto error; 2590 } 2591 else if (operand->flags & V850E_IMMEDIATE16 2592 && reloc != BFD_RELOC_LO16) 2593 { 2594 errmsg = _("immediate operand is too large"); 2595 goto error; 2596 } 2597 2598 extra_data_after_insn = true; 2599 extra_data_len = 2; 2600 extra_data = 0; 2601 } 2602 2603 if (fc > MAX_INSN_FIXUPS) 2604 as_fatal (_("too many fixups")); 2605 2606 fixups[fc].exp = ex; 2607 fixups[fc].opindex = *opindex_ptr; 2608 fixups[fc].reloc = reloc; 2609 fc++; 2610 } 2611 } 2612 else if (operand->flags & V850E_IMMEDIATE16 2613 || operand->flags & V850E_IMMEDIATE16HI) 2614 { 2615 expression (&ex); 2616 2617 switch (ex.X_op) 2618 { 2619 case O_constant: 2620 if (operand->flags & V850E_IMMEDIATE16HI) 2621 { 2622 if (ex.X_add_number & 0xffff) 2623 { 2624 errmsg = _("constant too big to fit into instruction"); 2625 goto error; 2626 } 2627 2628 ex.X_add_number >>= 16; 2629 } 2630 if (operand->flags & V850E_IMMEDIATE16) 2631 { 2632 if ((ex.X_add_number & 0xffff8000) 2633 && ((ex.X_add_number & 0xffff8000) != 0xffff8000)) 2634 { 2635 errmsg = _("constant too big to fit into instruction"); 2636 goto error; 2637 } 2638 } 2639 break; 2640 2641 case O_illegal: 2642 errmsg = _("illegal operand"); 2643 goto error; 2644 2645 case O_absent: 2646 errmsg = _("missing operand"); 2647 goto error; 2648 2649 default: 2650 if (fc >= MAX_INSN_FIXUPS) 2651 as_fatal (_("too many fixups")); 2652 2653 fixups[fc].exp = ex; 2654 fixups[fc].opindex = *opindex_ptr; 2655 fixups[fc].reloc = operand->default_reloc; 2656 ++fc; 2657 2658 ex.X_add_number = 0; 2659 break; 2660 } 2661 2662 extra_data_after_insn = true; 2663 extra_data_len = 2; 2664 extra_data = ex.X_add_number; 2665 } 2666 else if (operand->flags & V850E_IMMEDIATE23) 2667 { 2668 expression (&ex); 2669 2670 switch (ex.X_op) 2671 { 2672 case O_constant: 2673 break; 2674 2675 case O_illegal: 2676 errmsg = _("illegal operand"); 2677 goto error; 2678 2679 case O_absent: 2680 errmsg = _("missing operand"); 2681 goto error; 2682 2683 default: 2684 break; 2685 } 2686 2687 if (fc >= MAX_INSN_FIXUPS) 2688 as_fatal (_("too many fixups")); 2689 2690 fixups[fc].exp = ex; 2691 fixups[fc].opindex = *opindex_ptr; 2692 fixups[fc].reloc = operand->default_reloc; 2693 ++fc; 2694 2695 extra_data_after_insn = true; 2696 extra_data_len = 2; 2697 extra_data = 0; 2698 } 2699 else if (operand->flags & V850E_IMMEDIATE32) 2700 { 2701 expression (&ex); 2702 2703 switch (ex.X_op) 2704 { 2705 case O_constant: 2706 if ((operand->default_reloc == BFD_RELOC_V850_32_ABS 2707 || operand->default_reloc == BFD_RELOC_V850_32_PCREL) 2708 && (ex.X_add_number & 1)) 2709 { 2710 errmsg = _("odd number cannot be used here"); 2711 goto error; 2712 } 2713 break; 2714 2715 case O_illegal: 2716 errmsg = _("illegal operand"); 2717 goto error; 2718 2719 case O_absent: 2720 errmsg = _("missing operand"); 2721 goto error; 2722 2723 default: 2724 if (fc >= MAX_INSN_FIXUPS) 2725 as_fatal (_("too many fixups")); 2726 2727 fixups[fc].exp = ex; 2728 fixups[fc].opindex = *opindex_ptr; 2729 fixups[fc].reloc = operand->default_reloc; 2730 ++fc; 2731 2732 ex.X_add_number = 0; 2733 break; 2734 } 2735 2736 extra_data_after_insn = true; 2737 extra_data_len = 4; 2738 extra_data = ex.X_add_number; 2739 } 2740 else if (operand->flags & V850E_OPERAND_REG_LIST) 2741 { 2742 errmsg = parse_register_list (&insn, operand); 2743 2744 if (errmsg) 2745 goto error; 2746 } 2747 else 2748 { 2749 errmsg = NULL; 2750 2751 if ((operand->flags & V850_OPERAND_REG) != 0) 2752 { 2753 if (!register_name (&ex)) 2754 { 2755 errmsg = _("invalid register name"); 2756 } 2757 2758 if ((operand->flags & V850_NOT_R0) 2759 && ex.X_add_number == 0) 2760 { 2761 errmsg = _("register r0 cannot be used here"); 2762 } 2763 2764 if (operand->flags & V850_REG_EVEN) 2765 { 2766 if (ex.X_add_number % 2) 2767 errmsg = _("odd register cannot be used here"); 2768 ex.X_add_number = ex.X_add_number / 2; 2769 } 2770 2771 } 2772 else if ((operand->flags & V850_OPERAND_SRG) != 0) 2773 { 2774 if (!system_register_name (&ex, true)) 2775 { 2776 errmsg = _("invalid system register name"); 2777 } 2778 } 2779 else if ((operand->flags & V850_OPERAND_EP) != 0) 2780 { 2781 char *start = input_line_pointer; 2782 char *name; 2783 char c = get_symbol_name (&name); 2784 2785 if (strcmp (name, "ep") != 0 && strcmp (name, "r30") != 0) 2786 { 2787 /* Put things back the way we found them. */ 2788 (void) restore_line_pointer (c); 2789 input_line_pointer = start; 2790 errmsg = _("expected EP register"); 2791 goto error; 2792 } 2793 2794 (void) restore_line_pointer (c); 2795 str = input_line_pointer; 2796 input_line_pointer = hold; 2797 2798 while (*str == ' ' || *str == ',' 2799 || *str == '[' || *str == ']') 2800 ++str; 2801 continue; 2802 } 2803 else if ((operand->flags & V850_OPERAND_CC) != 0) 2804 { 2805 if (!cc_name (&ex, true)) 2806 { 2807 errmsg = _("invalid condition code name"); 2808 } 2809 2810 if ((operand->flags & V850_NOT_SA) 2811 && ex.X_add_number == COND_SA_NUM) 2812 { 2813 errmsg = _("condition sa cannot be used here"); 2814 } 2815 } 2816 else if ((operand->flags & V850_OPERAND_FLOAT_CC) != 0) 2817 { 2818 if (!float_cc_name (&ex, true)) 2819 { 2820 errmsg = _("invalid condition code name"); 2821 } 2822 } 2823 else if ((operand->flags & V850_OPERAND_CACHEOP) != 0) 2824 { 2825 if (!cacheop_name (&ex, true)) 2826 errmsg = _("invalid cache operation name"); 2827 } 2828 else if ((operand->flags & V850_OPERAND_PREFOP) != 0) 2829 { 2830 if (!prefop_name (&ex, true)) 2831 errmsg = _("invalid pref operation name"); 2832 } 2833 else if ((operand->flags & V850_OPERAND_VREG) != 0) 2834 { 2835 if (!vector_register_name (&ex)) 2836 errmsg = _("invalid vector register name"); 2837 } 2838 else if ((register_name (&ex) 2839 && (operand->flags & V850_OPERAND_REG) == 0)) 2840 { 2841 char *name; 2842 char c; 2843 int exists = 0; 2844 2845 /* It is possible that an alias has been defined that 2846 matches a register name. For example the code may 2847 include a ".set ZERO, 0" directive, which matches 2848 the register name "zero". Attempt to reparse the 2849 field as an expression, and only complain if we 2850 cannot generate a constant. */ 2851 2852 input_line_pointer = str; 2853 2854 c = get_symbol_name (&name); 2855 2856 if (symbol_find (name) != NULL) 2857 exists = 1; 2858 2859 (void) restore_line_pointer (c); 2860 input_line_pointer = str; 2861 2862 expression (&ex); 2863 2864 if (ex.X_op != O_constant) 2865 { 2866 /* If this register is actually occurring too early on 2867 the parsing of the instruction, (because another 2868 field is missing) then report this. */ 2869 if (opindex_ptr[1] != 0 2870 && ((v850_operands[opindex_ptr[1]].flags 2871 & V850_OPERAND_REG) 2872 ||(v850_operands[opindex_ptr[1]].flags 2873 & V850_OPERAND_VREG))) 2874 errmsg = _("syntax error: value is missing before the register name"); 2875 else 2876 errmsg = _("syntax error: register not expected"); 2877 2878 /* If we created a symbol in the process of this 2879 test then delete it now, so that it will not 2880 be output with the real symbols... */ 2881 if (exists == 0 2882 && ex.X_op == O_symbol) 2883 symbol_remove (ex.X_add_symbol, 2884 &symbol_rootP, &symbol_lastP); 2885 } 2886 } 2887 else if (system_register_name (&ex, false) 2888 && (operand->flags & V850_OPERAND_SRG) == 0) 2889 { 2890 errmsg = _("syntax error: system register not expected"); 2891 } 2892 else if (cc_name (&ex, false) 2893 && (operand->flags & V850_OPERAND_CC) == 0) 2894 { 2895 errmsg = _("syntax error: condition code not expected"); 2896 } 2897 else if (float_cc_name (&ex, false) 2898 && (operand->flags & V850_OPERAND_FLOAT_CC) == 0) 2899 { 2900 errmsg = _("syntax error: condition code not expected"); 2901 } 2902 else if (vector_register_name (&ex) 2903 && (operand->flags & V850_OPERAND_VREG) == 0) 2904 { 2905 errmsg = _("syntax error: vector register not expected"); 2906 } 2907 else 2908 { 2909 expression (&ex); 2910 resolve_register (&ex); 2911 2912 if ((operand->flags & V850_NOT_IMM0) 2913 && ex.X_op == O_constant 2914 && ex.X_add_number == 0) 2915 { 2916 errmsg = _("immediate 0 cannot be used here"); 2917 } 2918 2919 /* Special case: 2920 If we are assembling a MOV/JARL/JR instruction and the immediate 2921 value does not fit into the bits available then create a 2922 fake error so that the next MOV/JARL/JR instruction will be 2923 selected. This one has a 32 bit immediate field. */ 2924 2925 if ((strcmp (opcode->name, "mov") == 0 2926 || strcmp (opcode->name, "jarl") == 0 2927 || strcmp (opcode->name, "jr") == 0) 2928 && ex.X_op == O_constant 2929 && (ex.X_add_number < (-(1 << (operand->bits - 1))) 2930 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1))) 2931 { 2932 errmsg = _("immediate operand is too large"); 2933 } 2934 2935 if ((strcmp (opcode->name, "jarl") == 0 2936 || strcmp (opcode->name, "jr") == 0) 2937 && ex.X_op != O_constant 2938 && operand->bits != default_disp_size) 2939 { 2940 errmsg = _("immediate operand is not match"); 2941 } 2942 2943 /* Special case2 : 2944 If we are assembling a ld/st instruction and the immediate 2945 value does not fit into the bits available then create a 2946 fake error so that the next ld/st instruction will be 2947 selected. */ 2948 if ( ( (startswith (opcode->name, "st.")) 2949 || (startswith (opcode->name, "ld."))) 2950 && ex.X_op == O_constant 2951 && (ex.X_add_number < (-(1 << (operand->bits - 1))) 2952 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1))) 2953 errmsg = _("displacement is too large"); 2954 } 2955 2956 if (errmsg) 2957 goto error; 2958 2959 switch (ex.X_op) 2960 { 2961 case O_illegal: 2962 errmsg = _("illegal operand"); 2963 goto error; 2964 case O_absent: 2965 errmsg = _("missing operand"); 2966 goto error; 2967 case O_register: 2968 if ((operand->flags 2969 & (V850_OPERAND_REG | V850_OPERAND_SRG | V850_OPERAND_VREG)) == 0) 2970 { 2971 errmsg = _("invalid operand"); 2972 goto error; 2973 } 2974 2975 insn = v850_insert_operand (insn, operand, 2976 ex.X_add_number, 2977 &warningmsg); 2978 2979 break; 2980 2981 case O_constant: 2982 insn = v850_insert_operand (insn, operand, ex.X_add_number, 2983 &warningmsg); 2984 break; 2985 2986 default: 2987 /* We need to generate a fixup for this expression. */ 2988 if (fc >= MAX_INSN_FIXUPS) 2989 as_fatal (_("too many fixups")); 2990 2991 fixups[fc].exp = ex; 2992 fixups[fc].opindex = *opindex_ptr; 2993 fixups[fc].reloc = BFD_RELOC_NONE; 2994 ++fc; 2995 break; 2996 } 2997 } 2998 2999 str = input_line_pointer; 3000 input_line_pointer = hold; 3001 3002 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']' 3003 || *str == ')') 3004 ++str; 3005 } 3006 3007 while (ISSPACE (*str)) 3008 ++str; 3009 3010 if (*str == '\0') 3011 match = 1; 3012 3013 error: 3014 if (match == 0) 3015 { 3016 if ((opindex_ptr - opcode->operands) >= most_match_count) 3017 { 3018 most_match_count = opindex_ptr - opcode->operands; 3019 if (errmsg != NULL) 3020 strncpy (most_match_errmsg, errmsg, sizeof (most_match_errmsg)-1); 3021 } 3022 3023 next_opcode = opcode + 1; 3024 if (next_opcode->name != NULL 3025 && strcmp (next_opcode->name, opcode->name) == 0) 3026 { 3027 opcode = next_opcode; 3028 3029 /* Skip versions that are not supported by the target 3030 processor. */ 3031 if ((opcode->processors & processor_mask) == 0) 3032 goto error; 3033 3034 continue; 3035 } 3036 3037 if (most_match_errmsg[0] == 0) 3038 /* xgettext:c-format. */ 3039 as_bad (_("junk at end of line: `%s'"), str); 3040 else 3041 as_bad ("%s: %s", copy_of_instruction, most_match_errmsg); 3042 3043 if (*input_line_pointer == ']') 3044 ++input_line_pointer; 3045 3046 ignore_rest_of_line (); 3047 input_line_pointer = saved_input_line_pointer; 3048 return; 3049 } 3050 3051 if (warningmsg != NULL) 3052 as_warn ("%s", warningmsg); 3053 break; 3054 } 3055 3056 input_line_pointer = str; 3057 3058 /* Tie dwarf2 debug info to the address at the start of the insn. 3059 We can't do this after the insn has been output as the current 3060 frag may have been closed off. eg. by frag_var. */ 3061 dwarf2_emit_insn (0); 3062 3063 /* Write out the instruction. */ 3064 if (relaxable && fc > 0) 3065 { 3066 insn_size = 2; 3067 fc = 0; 3068 3069 if (strcmp (opcode->name, "loop") == 0) 3070 { 3071 if (((processor_mask & PROCESSOR_V850E3V5_UP) == 0) || default_disp_size == 22) 3072 { 3073 insn_size = 4; 3074 f = frag_var (rs_machine_dependent, 6, 2, SUBYPTE_LOOP_16_22, 3075 fixups[0].exp.X_add_symbol, 3076 fixups[0].exp.X_add_number, 3077 (char *)(size_t) fixups[0].opindex); 3078 md_number_to_chars (f, insn, insn_size); 3079 md_number_to_chars (f+4, 0, 4); 3080 } 3081 else 3082 { 3083 as_bad (_("loop: 32-bit displacement not supported")); 3084 } 3085 } 3086 else if (strcmp (opcode->name, "br") == 0 3087 || strcmp (opcode->name, "jbr") == 0) 3088 { 3089 if ((processor_mask & PROCESSOR_V850E2_UP) == 0 || default_disp_size == 22) 3090 { 3091 f = frag_var (rs_machine_dependent, 4, 2, SUBYPTE_UNCOND_9_22, 3092 fixups[0].exp.X_add_symbol, 3093 fixups[0].exp.X_add_number, 3094 (char *)(size_t) fixups[0].opindex); 3095 md_number_to_chars (f, insn, insn_size); 3096 md_number_to_chars (f + 2, 0, 2); 3097 } 3098 else 3099 { 3100 f = frag_var (rs_machine_dependent, 6, 4, SUBYPTE_UNCOND_9_22_32, 3101 fixups[0].exp.X_add_symbol, 3102 fixups[0].exp.X_add_number, 3103 (char *)(size_t) fixups[0].opindex); 3104 md_number_to_chars (f, insn, insn_size); 3105 md_number_to_chars (f + 2, 0, 4); 3106 } 3107 } 3108 else /* b<cond>, j<cond>. */ 3109 { 3110 if (default_disp_size == 22 3111 || (processor_mask & PROCESSOR_V850E2_UP) == 0) 3112 { 3113 if (processor_mask & PROCESSOR_V850E2V3_UP && !no_bcond17) 3114 { 3115 if (strcmp (opcode->name, "bsa") == 0) 3116 { 3117 f = frag_var (rs_machine_dependent, 8, 6, SUBYPTE_SA_9_17_22, 3118 fixups[0].exp.X_add_symbol, 3119 fixups[0].exp.X_add_number, 3120 (char *)(size_t) fixups[0].opindex); 3121 md_number_to_chars (f, insn, insn_size); 3122 md_number_to_chars (f + 2, 0, 6); 3123 } 3124 else 3125 { 3126 f = frag_var (rs_machine_dependent, 6, 4, SUBYPTE_COND_9_17_22, 3127 fixups[0].exp.X_add_symbol, 3128 fixups[0].exp.X_add_number, 3129 (char *)(size_t) fixups[0].opindex); 3130 md_number_to_chars (f, insn, insn_size); 3131 md_number_to_chars (f + 2, 0, 4); 3132 } 3133 } 3134 else 3135 { 3136 if (strcmp (opcode->name, "bsa") == 0) 3137 { 3138 f = frag_var (rs_machine_dependent, 8, 6, SUBYPTE_SA_9_22, 3139 fixups[0].exp.X_add_symbol, 3140 fixups[0].exp.X_add_number, 3141 (char *)(size_t) fixups[0].opindex); 3142 md_number_to_chars (f, insn, insn_size); 3143 md_number_to_chars (f + 2, 0, 6); 3144 } 3145 else 3146 { 3147 f = frag_var (rs_machine_dependent, 6, 4, SUBYPTE_COND_9_22, 3148 fixups[0].exp.X_add_symbol, 3149 fixups[0].exp.X_add_number, 3150 (char *)(size_t) fixups[0].opindex); 3151 md_number_to_chars (f, insn, insn_size); 3152 md_number_to_chars (f + 2, 0, 4); 3153 } 3154 } 3155 } 3156 else 3157 { 3158 if (processor_mask & PROCESSOR_V850E2V3_UP && !no_bcond17) 3159 { 3160 if (strcmp (opcode->name, "bsa") == 0) 3161 { 3162 f = frag_var (rs_machine_dependent, 10, 8, SUBYPTE_SA_9_17_22_32, 3163 fixups[0].exp.X_add_symbol, 3164 fixups[0].exp.X_add_number, 3165 (char *)(size_t) fixups[0].opindex); 3166 md_number_to_chars (f, insn, insn_size); 3167 md_number_to_chars (f + 2, 0, 8); 3168 } 3169 else 3170 { 3171 f = frag_var (rs_machine_dependent, 8, 6, SUBYPTE_COND_9_17_22_32, 3172 fixups[0].exp.X_add_symbol, 3173 fixups[0].exp.X_add_number, 3174 (char *)(size_t) fixups[0].opindex); 3175 md_number_to_chars (f, insn, insn_size); 3176 md_number_to_chars (f + 2, 0, 6); 3177 } 3178 } 3179 else 3180 { 3181 if (strcmp (opcode->name, "bsa") == 0) 3182 { 3183 f = frag_var (rs_machine_dependent, 10, 8, SUBYPTE_SA_9_22_32, 3184 fixups[0].exp.X_add_symbol, 3185 fixups[0].exp.X_add_number, 3186 (char *)(size_t) fixups[0].opindex); 3187 md_number_to_chars (f, insn, insn_size); 3188 md_number_to_chars (f + 2, 0, 8); 3189 } 3190 else 3191 { 3192 f = frag_var (rs_machine_dependent, 8, 6, SUBYPTE_COND_9_22_32, 3193 fixups[0].exp.X_add_symbol, 3194 fixups[0].exp.X_add_number, 3195 (char *)(size_t) fixups[0].opindex); 3196 md_number_to_chars (f, insn, insn_size); 3197 md_number_to_chars (f + 2, 0, 6); 3198 } 3199 } 3200 } 3201 } 3202 } 3203 else 3204 { 3205 /* Four byte insns have an opcode with the two high bits on. */ 3206 if ((insn & 0x0600) == 0x0600) 3207 insn_size = 4; 3208 else 3209 insn_size = 2; 3210 3211 /* Special case: 32 bit MOV. */ 3212 if ((insn & 0xffe0) == 0x0620) 3213 insn_size = 2; 3214 3215 /* Special case: 32 bit JARL,JMP,JR. */ 3216 if ((insn & 0x1ffe0) == 0x2e0 /* JARL. */ 3217 || (insn & 0x1ffe0) == 0x6e0 /* JMP. */ 3218 || (insn & 0x1ffff) == 0x2e0) /* JR. */ 3219 insn_size = 2; 3220 3221 if (obstack_room (& frchain_now->frch_obstack) < (insn_size + extra_data_len)) 3222 { 3223 frag_wane (frag_now); 3224 frag_new (0); 3225 } 3226 3227 f = frag_more (insn_size); 3228 md_number_to_chars (f, insn, insn_size); 3229 3230 if (extra_data_after_insn) 3231 { 3232 f = frag_more (extra_data_len); 3233 md_number_to_chars (f, extra_data, extra_data_len); 3234 3235 extra_data_after_insn = false; 3236 } 3237 } 3238 3239 /* Create any fixups. At this point we do not use a 3240 bfd_reloc_code_real_type, but instead just use the 3241 BFD_RELOC_UNUSED plus the operand index. This lets us easily 3242 handle fixups for any operand type, although that is admittedly 3243 not a very exciting feature. We pick a BFD reloc type in 3244 md_apply_fix. */ 3245 for (i = 0; i < fc; i++) 3246 { 3247 const struct v850_operand *operand; 3248 bfd_reloc_code_real_type reloc; 3249 3250 operand = &v850_operands[fixups[i].opindex]; 3251 3252 reloc = fixups[i].reloc; 3253 3254 if (reloc != BFD_RELOC_NONE) 3255 { 3256 reloc_howto_type *reloc_howto = 3257 bfd_reloc_type_lookup (stdoutput, reloc); 3258 int size; 3259 int address; 3260 fixS *fixP; 3261 3262 if (!reloc_howto) 3263 abort (); 3264 3265 size = bfd_get_reloc_size (reloc_howto); 3266 3267 /* XXX This will abort on an R_V850_8 reloc - 3268 is this reloc actually used? */ 3269 if (size != 2 && size != 4) 3270 abort (); 3271 3272 if (extra_data_len == 0) 3273 { 3274 address = (f - frag_now->fr_literal) + insn_size - size; 3275 } 3276 else 3277 { 3278 address = (f - frag_now->fr_literal) + extra_data_len - size; 3279 } 3280 3281 if ((operand->flags & V850E_IMMEDIATE32) && (operand->flags & V850_PCREL)) 3282 { 3283 fixups[i].exp.X_add_number += 2; 3284 } 3285 else if (operand->default_reloc == BFD_RELOC_V850_16_PCREL) 3286 { 3287 fixups[i].exp.X_add_number += 2; 3288 address += 2; 3289 } 3290 3291 /* fprintf (stderr, "0x%x %d %ld\n", address, size, fixups[i].exp.X_add_number); */ 3292 fixP = fix_new_exp (frag_now, address, size, 3293 &fixups[i].exp, 3294 reloc_howto->pc_relative, 3295 reloc); 3296 3297 fixP->tc_fix_data = (void *) operand; 3298 3299 switch (reloc) 3300 { 3301 case BFD_RELOC_LO16: 3302 case BFD_RELOC_V850_LO16_S1: 3303 case BFD_RELOC_V850_LO16_SPLIT_OFFSET: 3304 case BFD_RELOC_HI16: 3305 case BFD_RELOC_HI16_S: 3306 fixP->fx_no_overflow = 1; 3307 break; 3308 default: 3309 break; 3310 } 3311 } 3312 else 3313 { 3314 gas_assert (f != NULL); 3315 fix_new_exp (frag_now, 3316 f - frag_now->fr_literal, 4, 3317 & fixups[i].exp, 3318 (operand->flags & V850_PCREL) != 0, 3319 (bfd_reloc_code_real_type) (fixups[i].opindex 3320 + (int) BFD_RELOC_UNUSED)); 3321 } 3322 } 3323 3324 input_line_pointer = saved_input_line_pointer; 3325 } 3326 3327 /* If while processing a fixup, a reloc really needs to be created 3328 then it is done here. */ 3329 3330 arelent * 3331 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 3332 { 3333 arelent *reloc; 3334 3335 reloc = XNEW (arelent); 3336 reloc->sym_ptr_ptr = XNEW (asymbol *); 3337 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 3338 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 3339 3340 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY 3341 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3342 || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL 3343 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP 3344 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN) 3345 reloc->addend = fixp->fx_offset; 3346 else 3347 { 3348 #if 0 3349 if (fixp->fx_r_type == BFD_RELOC_32 3350 && fixp->fx_pcrel) 3351 fixp->fx_r_type = BFD_RELOC_32_PCREL; 3352 #endif 3353 3354 reloc->addend = fixp->fx_addnumber; 3355 } 3356 3357 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 3358 3359 if (reloc->howto == NULL) 3360 { 3361 as_bad_where (fixp->fx_file, fixp->fx_line, 3362 /* xgettext:c-format */ 3363 _("reloc %d not supported by object file format"), 3364 (int) fixp->fx_r_type); 3365 3366 xfree (reloc); 3367 3368 return NULL; 3369 } 3370 3371 return reloc; 3372 } 3373 3374 void 3375 v850_handle_align (fragS * frag) 3376 { 3377 if (v850_relax 3378 && frag->fr_type == rs_align 3379 && frag->fr_address + frag->fr_fix > 0 3380 && frag->fr_offset > 1 3381 && now_seg != bss_section 3382 && now_seg != v850_seg_table[SBSS_SECTION].s 3383 && now_seg != v850_seg_table[TBSS_SECTION].s 3384 && now_seg != v850_seg_table[ZBSS_SECTION].s) 3385 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0, 3386 BFD_RELOC_V850_ALIGN); 3387 } 3388 3389 /* Return current size of variable part of frag. */ 3390 3391 int 3392 md_estimate_size_before_relax (fragS *fragp, asection *seg ATTRIBUTE_UNUSED) 3393 { 3394 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0])) 3395 abort (); 3396 3397 return md_relax_table[fragp->fr_subtype].rlx_length; 3398 } 3399 3400 long 3401 v850_pcrel_from_section (fixS *fixp, segT section) 3402 { 3403 /* If the symbol is undefined, or in a section other than our own, 3404 or it is weak (in which case it may well be in another section, 3405 then let the linker figure it out. */ 3406 if (fixp->fx_addsy != (symbolS *) NULL 3407 && (! S_IS_DEFINED (fixp->fx_addsy) 3408 || S_IS_WEAK (fixp->fx_addsy) 3409 || (S_GET_SEGMENT (fixp->fx_addsy) != section))) 3410 return 0; 3411 3412 return fixp->fx_frag->fr_address + fixp->fx_where; 3413 } 3414 3415 void 3416 md_apply_fix (fixS *fixP, valueT *valueP, segT seg ATTRIBUTE_UNUSED) 3417 { 3418 valueT value = * valueP; 3419 char *where; 3420 3421 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3422 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL 3423 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP 3424 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3425 { 3426 fixP->fx_done = 0; 3427 return; 3428 } 3429 3430 if (fixP->fx_addsy == (symbolS *) NULL) 3431 fixP->fx_addnumber = value, 3432 fixP->fx_done = 1; 3433 3434 else if (fixP->fx_pcrel) 3435 fixP->fx_addnumber = fixP->fx_offset; 3436 3437 else 3438 { 3439 value = fixP->fx_offset; 3440 if (fixP->fx_subsy != (symbolS *) NULL) 3441 { 3442 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) 3443 value -= S_GET_VALUE (fixP->fx_subsy); 3444 else 3445 /* We don't actually support subtracting a symbol. */ 3446 as_bad_subtract (fixP); 3447 } 3448 fixP->fx_addnumber = value; 3449 } 3450 3451 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) 3452 { 3453 int opindex; 3454 const struct v850_operand *operand; 3455 unsigned long insn; 3456 const char *errmsg = NULL; 3457 3458 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; 3459 operand = &v850_operands[opindex]; 3460 3461 /* Fetch the instruction, insert the fully resolved operand 3462 value, and stuff the instruction back again. 3463 3464 Note the instruction has been stored in little endian 3465 format! */ 3466 where = fixP->fx_frag->fr_literal + fixP->fx_where; 3467 3468 if (fixP->fx_size > 2) 3469 insn = bfd_getl32 ((unsigned char *) where); 3470 else 3471 insn = bfd_getl16 ((unsigned char *) where); 3472 3473 /* When inserting loop offsets a backwards displacement 3474 is encoded as a positive value. */ 3475 if (operand->flags & V850_INVERSE_PCREL) 3476 value = - value; 3477 3478 insn = v850_insert_operand (insn, operand, (offsetT) value, 3479 &errmsg); 3480 if (errmsg) 3481 as_warn_where (fixP->fx_file, fixP->fx_line, "%s", errmsg); 3482 3483 if (fixP->fx_size > 2) 3484 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); 3485 else 3486 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where); 3487 3488 if (fixP->fx_done) 3489 /* Nothing else to do here. */ 3490 return; 3491 3492 /* Determine a BFD reloc value based on the operand information. 3493 We are only prepared to turn a few of the operands into relocs. */ 3494 3495 if (operand->default_reloc == BFD_RELOC_NONE) 3496 { 3497 as_bad_where (fixP->fx_file, fixP->fx_line, 3498 _("unresolved expression that must be resolved")); 3499 fixP->fx_done = 1; 3500 return; 3501 } 3502 3503 { 3504 fixP->fx_r_type = operand->default_reloc; 3505 if (operand->default_reloc == BFD_RELOC_V850_16_PCREL) 3506 { 3507 fixP->fx_where += 2; 3508 fixP->fx_size = 2; 3509 fixP->fx_addnumber += 2; 3510 } 3511 } 3512 } 3513 else if (fixP->fx_done) 3514 { 3515 /* We still have to insert the value into memory! */ 3516 where = fixP->fx_frag->fr_literal + fixP->fx_where; 3517 3518 if (fixP->tc_fix_data != NULL 3519 && ((struct v850_operand *) fixP->tc_fix_data)->insert != NULL) 3520 { 3521 const char * message = NULL; 3522 struct v850_operand * operand = (struct v850_operand *) fixP->tc_fix_data; 3523 unsigned long insn; 3524 3525 /* The variable "where" currently points at the exact point inside 3526 the insn where we need to insert the value. But we need to 3527 extract the entire insn so we probably need to move "where" 3528 back a few bytes. */ 3529 3530 if (fixP->fx_size == 2) 3531 where -= 2; 3532 else if (fixP->fx_size == 1) 3533 where -= 3; 3534 3535 insn = bfd_getl32 ((unsigned char *) where); 3536 3537 /* Use the operand's insertion procedure, if present, in order to 3538 make sure that the value is correctly stored in the insn. */ 3539 insn = operand->insert (insn, (offsetT) value, & message); 3540 /* Ignore message even if it is set. */ 3541 3542 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); 3543 } 3544 else 3545 { 3546 switch (fixP->fx_r_type) 3547 { 3548 case BFD_RELOC_V850_32_ABS: 3549 case BFD_RELOC_V850_32_PCREL: 3550 bfd_putl32 (value & 0xfffffffe, (unsigned char *) where); 3551 break; 3552 3553 case BFD_RELOC_32: 3554 bfd_putl32 (value, (unsigned char *) where); 3555 break; 3556 3557 case BFD_RELOC_V850_23: 3558 bfd_putl32 (((value & 0x7f) << 4) | ((value & 0x7fff80) << (16-7)) 3559 | (bfd_getl32 (where) & ~((0x7f << 4) | (0xffff << 16))), 3560 (unsigned char *) where); 3561 break; 3562 3563 case BFD_RELOC_16: 3564 case BFD_RELOC_HI16: 3565 case BFD_RELOC_HI16_S: 3566 case BFD_RELOC_LO16: 3567 case BFD_RELOC_V850_ZDA_16_16_OFFSET: 3568 case BFD_RELOC_V850_SDA_16_16_OFFSET: 3569 case BFD_RELOC_V850_TDA_16_16_OFFSET: 3570 case BFD_RELOC_V850_CALLT_16_16_OFFSET: 3571 bfd_putl16 (value & 0xffff, (unsigned char *) where); 3572 break; 3573 3574 case BFD_RELOC_8: 3575 *where = value & 0xff; 3576 break; 3577 3578 case BFD_RELOC_V850_9_PCREL: 3579 bfd_putl16 (((value & 0x1f0) << 7) | ((value & 0x0e) << 3) 3580 | (bfd_getl16 (where) & ~((0x1f0 << 7) | (0x0e << 3))), where); 3581 break; 3582 3583 case BFD_RELOC_V850_17_PCREL: 3584 bfd_putl32 (((value & 0x10000) >> (16 - 4)) | ((value & 0xfffe) << 16) 3585 | (bfd_getl32 (where) & ~((0x10000 >> (16 - 4)) | (0xfffe << 16))), where); 3586 break; 3587 3588 case BFD_RELOC_V850_16_PCREL: 3589 bfd_putl16 ((-value & 0xfffe) | (bfd_getl16 (where + 2) & 0x0001), 3590 (unsigned char *) (where + 2)); 3591 break; 3592 3593 case BFD_RELOC_V850_22_PCREL: 3594 bfd_putl32 (((value & 0xfffe) << 16) | ((value & 0x3f0000) >> 16) 3595 | (bfd_getl32 (where) & ~((0xfffe << 16) | (0x3f0000 >> 16))), where); 3596 break; 3597 3598 case BFD_RELOC_V850_16_S1: 3599 case BFD_RELOC_V850_LO16_S1: 3600 case BFD_RELOC_V850_ZDA_15_16_OFFSET: 3601 case BFD_RELOC_V850_SDA_15_16_OFFSET: 3602 bfd_putl16 (value & 0xfffe, (unsigned char *) where); 3603 break; 3604 3605 case BFD_RELOC_V850_16_SPLIT_OFFSET: 3606 case BFD_RELOC_V850_LO16_SPLIT_OFFSET: 3607 case BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET: 3608 case BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET: 3609 bfd_putl32 (((value << 16) & 0xfffe0000) 3610 | ((value << 5) & 0x20) 3611 | (bfd_getl32 (where) & ~0xfffe0020), where); 3612 break; 3613 3614 case BFD_RELOC_V850_TDA_6_8_OFFSET: 3615 *where = (*where & ~0x7e) | ((value >> 1) & 0x7e); 3616 break; 3617 3618 case BFD_RELOC_V850_TDA_7_8_OFFSET: 3619 *where = (*where & ~0x7f) | ((value >> 1) & 0x7f); 3620 break; 3621 3622 case BFD_RELOC_V850_TDA_7_7_OFFSET: 3623 *where = (*where & ~0x7f) | (value & 0x7f); 3624 break; 3625 3626 case BFD_RELOC_V850_TDA_4_5_OFFSET: 3627 *where = (*where & ~0xf) | ((value >> 1) & 0xf); 3628 break; 3629 3630 case BFD_RELOC_V850_TDA_4_4_OFFSET: 3631 *where = (*where & ~0xf) | (value & 0xf); 3632 break; 3633 3634 case BFD_RELOC_V850_CALLT_6_7_OFFSET: 3635 *where = (*where & ~0x3f) | (value & 0x3f); 3636 break; 3637 3638 default: 3639 abort (); 3640 } 3641 } 3642 } 3643 } 3644 3645 /* Parse a cons expression. We have to handle hi(), lo(), etc 3646 on the v850. */ 3647 3648 bfd_reloc_code_real_type 3649 parse_cons_expression_v850 (expressionS *exp) 3650 { 3651 const char *errmsg; 3652 bfd_reloc_code_real_type r; 3653 3654 /* See if there's a reloc prefix like hi() we have to handle. */ 3655 r = v850_reloc_prefix (NULL, &errmsg); 3656 3657 /* Do normal expression parsing. */ 3658 expression (exp); 3659 return r; 3660 } 3661 3662 /* Create a fixup for a cons expression. If parse_cons_expression_v850 3663 found a reloc prefix, then we use that reloc, else we choose an 3664 appropriate one based on the size of the expression. */ 3665 3666 void 3667 cons_fix_new_v850 (fragS *frag, 3668 int where, 3669 int size, 3670 expressionS *exp, 3671 bfd_reloc_code_real_type r) 3672 { 3673 if (r == BFD_RELOC_NONE) 3674 { 3675 if (size == 4) 3676 r = BFD_RELOC_32; 3677 if (size == 2) 3678 r = BFD_RELOC_16; 3679 if (size == 1) 3680 r = BFD_RELOC_8; 3681 } 3682 3683 if (exp != NULL) 3684 fix_new_exp (frag, where, size, exp, 0, r); 3685 else 3686 fix_new (frag, where, size, NULL, 0, 0, r); 3687 } 3688 3689 bool 3690 v850_fix_adjustable (fixS *fixP) 3691 { 3692 if (fixP->fx_addsy == NULL) 3693 return 1; 3694 3695 /* Don't adjust function names. */ 3696 if (S_IS_FUNCTION (fixP->fx_addsy)) 3697 return 0; 3698 3699 /* We need the symbol name for the VTABLE entries. */ 3700 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3701 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3702 return 0; 3703 3704 return 1; 3705 } 3706 3707 int 3708 v850_force_relocation (struct fix *fixP) 3709 { 3710 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL 3711 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP) 3712 return 1; 3713 3714 if (v850_relax 3715 && (fixP->fx_pcrel 3716 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN 3717 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL 3718 || fixP->fx_r_type == BFD_RELOC_V850_16_PCREL 3719 || fixP->fx_r_type == BFD_RELOC_V850_17_PCREL 3720 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL 3721 || fixP->fx_r_type == BFD_RELOC_V850_32_PCREL 3722 || fixP->fx_r_type >= BFD_RELOC_UNUSED)) 3723 return 1; 3724 3725 return generic_force_reloc (fixP); 3726 } 3727 3728 /* Create a v850 note section. */ 3729 void 3730 v850_md_finish (void) 3731 { 3732 segT note_sec; 3733 segT orig_seg = now_seg; 3734 subsegT orig_subseg = now_subseg; 3735 enum v850_notes id; 3736 3737 note_sec = subseg_new (V850_NOTE_SECNAME, 0); 3738 bfd_set_section_flags (note_sec, SEC_HAS_CONTENTS | SEC_READONLY | SEC_MERGE); 3739 bfd_set_section_alignment (note_sec, 2); 3740 3741 /* Provide default values for all of the notes. */ 3742 for (id = V850_NOTE_ALIGNMENT; id <= NUM_V850_NOTES; id++) 3743 { 3744 int val = 0; 3745 char * p; 3746 3747 /* Follow the standard note section layout: 3748 First write the length of the name string. */ 3749 p = frag_more (4); 3750 md_number_to_chars (p, 4, 4); 3751 3752 /* Next comes the length of the "descriptor", i.e., the actual data. */ 3753 p = frag_more (4); 3754 md_number_to_chars (p, 4, 4); 3755 3756 /* Write the note type. */ 3757 p = frag_more (4); 3758 md_number_to_chars (p, (valueT) id, 4); 3759 3760 /* Write the name field. */ 3761 p = frag_more (4); 3762 memcpy (p, V850_NOTE_NAME, 4); 3763 3764 /* Finally, write the descriptor. */ 3765 p = frag_more (4); 3766 switch (id) 3767 { 3768 case V850_NOTE_ALIGNMENT: 3769 val = v850_data_8 ? EF_RH850_DATA_ALIGN8 : EF_RH850_DATA_ALIGN4; 3770 break; 3771 3772 case V850_NOTE_DATA_SIZE: 3773 /* GCC does not currently support an option 3774 for 32-bit doubles with the V850 backend. */ 3775 val = EF_RH850_DOUBLE64; 3776 break; 3777 3778 case V850_NOTE_FPU_INFO: 3779 if (! soft_float) 3780 switch (machine) 3781 { 3782 case bfd_mach_v850e3v5: val = EF_RH850_FPU30; break; 3783 case bfd_mach_v850e2v3: val = EF_RH850_FPU20; break; 3784 default: break; 3785 } 3786 break; 3787 3788 default: 3789 break; 3790 } 3791 md_number_to_chars (p, val, 4); 3792 } 3793 3794 /* Paranoia - we probably do not need this. */ 3795 subseg_set (orig_seg, orig_subseg); 3796 } 3797
Indexes created Thu May 14 00:25:00 UTC 2026