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      1 @c Copyright (C) 2001-2024 Free Software Foundation, Inc.
      2 @c This is part of the GAS manual.
      3 @c For copying conditions, see the file as.texinfo.
      4 @c man end
      5 @ifset GENERIC
      6 @page
      7 @node PPC-Dependent
      8 @chapter PowerPC Dependent Features
      9 @end ifset
     10 @ifclear GENERIC
     11 @node Machine Dependencies
     12 @chapter PowerPC Dependent Features
     13 @end ifclear
     14 
     15 @cindex PowerPC support
     16 @menu
     17 * PowerPC-Opts::                Options
     18 * PowerPC-Pseudo::              PowerPC Assembler Directives
     19 * PowerPC-Syntax::              PowerPC Syntax
     20 @end menu
     21 
     22 @node PowerPC-Opts
     23 @section Options
     24 
     25 @cindex options for PowerPC
     26 @cindex PowerPC options
     27 @cindex architectures, PowerPC
     28 @cindex PowerPC architectures
     29 The PowerPC chip family includes several successive levels, using the same
     30 core instruction set, but including a few additional instructions at
     31 each level.  There are exceptions to this however.  For details on what
     32 instructions each variant supports, please see the chip's architecture
     33 reference manual.
     34 
     35 The following table lists all available PowerPC options.
     36 
     37 @c man begin OPTIONS
     38 @table @gcctabopt
     39 @item -a32
     40 Generate ELF32 or XCOFF32.
     41 
     42 @item -a64
     43 Generate ELF64 or XCOFF64.
     44 
     45 @item -K PIC
     46 Set EF_PPC_RELOCATABLE_LIB in ELF flags.
     47 
     48 @item -mpwrx | -mpwr2
     49 Generate code for POWER/2 (RIOS2).
     50 
     51 @item -mpwr
     52 Generate code for POWER (RIOS1)
     53 
     54 @item -m601
     55 Generate code for PowerPC 601.
     56 
     57 @item -mppc, -mppc32, -m603, -m604
     58 Generate code for PowerPC 603/604.
     59 
     60 @item -m403, -m405
     61 Generate code for PowerPC 403/405.
     62 
     63 @item -m440
     64 Generate code for PowerPC 440.  BookE and some 405 instructions.
     65 
     66 @item -m464
     67 Generate code for PowerPC 464.
     68 
     69 @item -m476
     70 Generate code for PowerPC 476.
     71 
     72 @item -m7400, -m7410, -m7450, -m7455
     73 Generate code for PowerPC 7400/7410/7450/7455.
     74 
     75 @item -m750cl, -mgekko, -mbroadway
     76 Generate code for PowerPC 750CL/Gekko/Broadway.
     77 
     78 @item -m821, -m850, -m860
     79 Generate code for PowerPC 821/850/860.
     80 
     81 @item -mppc64, -m620
     82 Generate code for PowerPC 620/625/630.
     83 
     84 @item -me200z2, -me200z4
     85 Generate code for e200 variants, e200z2 with LSP, e200z4 with SPE.
     86 
     87 @item -me300
     88 Generate code for PowerPC e300 family.
     89 
     90 @item -me500, -me500x2
     91 Generate code for Motorola e500 core complex.
     92 
     93 @item -me500mc
     94 Generate code for Freescale e500mc core complex.
     95 
     96 @item -me500mc64
     97 Generate code for Freescale e500mc64 core complex.
     98 
     99 @item -me5500
    100 Generate code for Freescale e5500 core complex.
    101 
    102 @item -me6500
    103 Generate code for Freescale e6500 core complex.
    104 
    105 @item -mlsp
    106 Enable LSP instructions.  (Disables SPE and SPE2.)
    107 
    108 @item -mspe
    109 Generate code for Motorola SPE instructions.  (Disables LSP.)
    110 
    111 @item -mspe2
    112 Generate code for Freescale SPE2 instructions.  (Disables LSP.)
    113 
    114 @item -mtitan
    115 Generate code for AppliedMicro Titan core complex.
    116 
    117 @item -mppc64bridge
    118 Generate code for PowerPC 64, including bridge insns.
    119 
    120 @item -mbooke
    121 Generate code for 32-bit BookE.
    122 
    123 @item -ma2
    124 Generate code for A2 architecture.
    125 
    126 @item -maltivec
    127 Generate code for processors with AltiVec instructions.
    128 
    129 @item -mvle
    130 Generate code for Freescale PowerPC VLE instructions.
    131 
    132 @item -mvsx
    133 Generate code for processors with Vector-Scalar (VSX) instructions.
    134 
    135 @item -mhtm
    136 Generate code for processors with Hardware Transactional Memory instructions.
    137 
    138 @item -mpower4, -mpwr4
    139 Generate code for Power4 architecture.
    140 
    141 @item -mpower5, -mpwr5, -mpwr5x
    142 Generate code for Power5 architecture.
    143 
    144 @item -mpower6, -mpwr6
    145 Generate code for Power6 architecture.
    146 
    147 @item -mpower7, -mpwr7
    148 Generate code for Power7 architecture.
    149 
    150 @item -mpower8, -mpwr8
    151 Generate code for Power8 architecture.
    152 
    153 @item -mpower9, -mpwr9
    154 Generate code for Power9 architecture.
    155 
    156 @item -mpower10, -mpwr10
    157 Generate code for Power10 architecture.
    158 
    159 @item -mfuture
    160 Generate code for 'future' architecture.
    161 
    162 @item -mcell
    163 @item -mcell
    164 Generate code for Cell Broadband Engine architecture.
    165 
    166 @item -mcom
    167 Generate code Power/PowerPC common instructions.
    168 
    169 @item -many
    170 Generate code for any architecture (PWR/PWRX/PPC).
    171 
    172 @item -mregnames
    173 Allow symbolic names for registers.
    174 
    175 @item -mno-regnames
    176 Do not allow symbolic names for registers.
    177 
    178 @item -mrelocatable
    179 Support for GCC's -mrelocatable option.
    180 
    181 @item -mrelocatable-lib
    182 Support for GCC's -mrelocatable-lib option.
    183 
    184 @item -memb
    185 Set PPC_EMB bit in ELF flags.
    186 
    187 @item -mlittle, -mlittle-endian, -le
    188 Generate code for a little endian machine.
    189 
    190 @item -mbig, -mbig-endian, -be
    191 Generate code for a big endian machine.
    192 
    193 @item -msolaris
    194 Generate code for Solaris.
    195 
    196 @item -mno-solaris
    197 Do not generate code for Solaris.
    198 
    199 @item -nops=@var{count}
    200 If an alignment directive inserts more than @var{count} nops, put a
    201 branch at the beginning to skip execution of the nops.
    202 @end table
    203 @c man end
    204 
    205 
    206 @node PowerPC-Pseudo
    207 @section PowerPC Assembler Directives
    208 
    209 @cindex directives for PowerPC
    210 @cindex PowerPC directives
    211 A number of assembler directives are available for PowerPC.  The
    212 following table is far from complete.
    213 
    214 @table @code
    215 @item .machine "string"
    216 This directive allows you to change the machine for which code is
    217 generated.  @code{"string"} may be any of the -m cpu selection options
    218 (without the -m) enclosed in double quotes, @code{"push"}, or
    219 @code{"pop"}.  @code{.machine "push"} saves the currently selected
    220 cpu, which may be restored with @code{.machine "pop"}.
    221 @end table
    222 
    223 @node PowerPC-Syntax
    224 @section PowerPC Syntax
    225 @menu
    226 * PowerPC-Chars::                Special Characters
    227 @end menu
    228 
    229 @node PowerPC-Chars
    230 @subsection Special Characters
    231 
    232 @cindex line comment character, PowerPC
    233 @cindex PowerPC line comment character
    234 The presence of a @samp{#} on a line indicates the start of a comment
    235 that extends to the end of the current line.
    236 
    237 If a @samp{#} appears as the first character of a line then the whole
    238 line is treated as a comment, but in this case the line could also be
    239 a logical line number directive (@pxref{Comments}) or a preprocessor
    240 control command (@pxref{Preprocessing}).
    241 
    242 If the assembler has been configured for the ppc-*-solaris* target
    243 then the @samp{!} character also acts as a line comment character.
    244 This can be disabled via the @option{-mno-solaris} command-line
    245 option.
    246 
    247 @cindex line separator, PowerPC
    248 @cindex statement separator, PowerPC
    249 @cindex PowerPC line separator
    250 The @samp{;} character can be used to separate statements on the same
    251 line.
    252