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      1 @c Copyright (C) 2001-2015 Free Software Foundation, Inc.
      2 @c This is part of the GAS manual.
      3 @c For copying conditions, see the file as.texinfo.
      4 @c man end
      5 @ifset GENERIC
      6 @page
      7 @node PPC-Dependent
      8 @chapter PowerPC Dependent Features
      9 @end ifset
     10 @ifclear GENERIC
     11 @node Machine Dependencies
     12 @chapter PowerPC Dependent Features
     13 @end ifclear
     14 
     15 @cindex PowerPC support
     16 @menu
     17 * PowerPC-Opts::                Options
     18 * PowerPC-Pseudo::              PowerPC Assembler Directives
     19 * PowerPC-Syntax::              PowerPC Syntax
     20 @end menu
     21 
     22 @node PowerPC-Opts
     23 @section Options
     24 
     25 @cindex options for PowerPC
     26 @cindex PowerPC options
     27 @cindex architectures, PowerPC
     28 @cindex PowerPC architectures
     29 The PowerPC chip family includes several successive levels, using the same
     30 core instruction set, but including a few additional instructions at
     31 each level.  There are exceptions to this however.  For details on what
     32 instructions each variant supports, please see the chip's architecture
     33 reference manual.
     34 
     35 The following table lists all available PowerPC options.
     36 
     37 @c man begin OPTIONS
     38 @table @gcctabopt
     39 @item -a32
     40 Generate ELF32 or XCOFF32.
     41 
     42 @item -a64
     43 Generate ELF64 or XCOFF64.
     44 
     45 @item -K PIC
     46 Set EF_PPC_RELOCATABLE_LIB in ELF flags.
     47 
     48 @item -mpwrx | -mpwr2
     49 Generate code for POWER/2 (RIOS2).
     50 
     51 @item -mpwr
     52 Generate code for POWER (RIOS1)
     53 
     54 @item -m601
     55 Generate code for PowerPC 601.
     56 
     57 @item -mppc, -mppc32, -m603, -m604
     58 Generate code for PowerPC 603/604.
     59 
     60 @item -m403, -m405
     61 Generate code for PowerPC 403/405.
     62 
     63 @item -m440
     64 Generate code for PowerPC 440.  BookE and some 405 instructions.
     65 
     66 @item -m464
     67 Generate code for PowerPC 464.
     68 
     69 @item -m476
     70 Generate code for PowerPC 476.
     71 
     72 @item -m7400, -m7410, -m7450, -m7455
     73 Generate code for PowerPC 7400/7410/7450/7455.
     74 
     75 @item -m750cl
     76 Generate code for PowerPC 750CL.
     77 
     78 @item -m821, -m850, -m860
     79 Generate code for PowerPC 821/850/860.
     80 
     81 @item -mppc64, -m620
     82 Generate code for PowerPC 620/625/630.
     83 
     84 @item -me500, -me500x2
     85 Generate code for Motorola e500 core complex.
     86 
     87 @item -me500mc
     88 Generate code for Freescale e500mc core complex.
     89 
     90 @item -me500mc64
     91 Generate code for Freescale e500mc64 core complex.
     92 
     93 @item -me5500
     94 Generate code for Freescale e5500 core complex.
     95 
     96 @item -me6500
     97 Generate code for Freescale e6500 core complex.
     98 
     99 @item -mspe
    100 Generate code for Motorola SPE instructions.
    101 
    102 @item -mtitan
    103 Generate code for AppliedMicro Titan core complex.
    104 
    105 @item -mppc64bridge
    106 Generate code for PowerPC 64, including bridge insns.
    107 
    108 @item -mbooke
    109 Generate code for 32-bit BookE.
    110 
    111 @item -ma2
    112 Generate code for A2 architecture.
    113 
    114 @item -me300
    115 Generate code for PowerPC e300 family.
    116 
    117 @item -maltivec
    118 Generate code for processors with AltiVec instructions.
    119 
    120 @item -mvle
    121 Generate code for Freescale PowerPC VLE instructions.
    122 
    123 @item -mvsx
    124 Generate code for processors with Vector-Scalar (VSX) instructions.
    125 
    126 @item -mhtm
    127 Generate code for processors with Hardware Transactional Memory instructions.
    128 
    129 @item -mpower4, -mpwr4
    130 Generate code for Power4 architecture.
    131 
    132 @item -mpower5, -mpwr5, -mpwr5x
    133 Generate code for Power5 architecture.
    134 
    135 @item -mpower6, -mpwr6
    136 Generate code for Power6 architecture.
    137 
    138 @item -mpower7, -mpwr7
    139 Generate code for Power7 architecture.
    140 
    141 @item -mpower8, -mpwr8
    142 Generate code for Power8 architecture.
    143 
    144 @item -mpower9, -mpwr9
    145 Generate code for Power9 architecture.
    146 
    147 @item -mcell
    148 @item -mcell
    149 Generate code for Cell Broadband Engine architecture.
    150 
    151 @item -mcom
    152 Generate code Power/PowerPC common instructions.
    153 
    154 @item -many
    155 Generate code for any architecture (PWR/PWRX/PPC).
    156 
    157 @item -mregnames
    158 Allow symbolic names for registers.
    159 
    160 @item -mno-regnames
    161 Do not allow symbolic names for registers.
    162 
    163 @item -mrelocatable
    164 Support for GCC's -mrelocatable option.
    165 
    166 @item -mrelocatable-lib
    167 Support for GCC's -mrelocatable-lib option.
    168 
    169 @item -memb
    170 Set PPC_EMB bit in ELF flags.
    171 
    172 @item -mlittle, -mlittle-endian, -le
    173 Generate code for a little endian machine.
    174 
    175 @item -mbig, -mbig-endian, -be
    176 Generate code for a big endian machine.
    177 
    178 @item -msolaris
    179 Generate code for Solaris.
    180 
    181 @item -mno-solaris
    182 Do not generate code for Solaris.
    183 
    184 @item -nops=@var{count}
    185 If an alignment directive inserts more than @var{count} nops, put a
    186 branch at the beginning to skip execution of the nops.
    187 @end table
    188 @c man end
    189 
    190 
    191 @node PowerPC-Pseudo
    192 @section PowerPC Assembler Directives
    193 
    194 @cindex directives for PowerPC
    195 @cindex PowerPC directives
    196 A number of assembler directives are available for PowerPC.  The
    197 following table is far from complete.
    198 
    199 @table @code
    200 @item .machine "string"
    201 This directive allows you to change the machine for which code is
    202 generated.  @code{"string"} may be any of the -m cpu selection options
    203 (without the -m) enclosed in double quotes, @code{"push"}, or
    204 @code{"pop"}.  @code{.machine "push"} saves the currently selected
    205 cpu, which may be restored with @code{.machine "pop"}.
    206 @end table
    207 
    208 @node PowerPC-Syntax
    209 @section PowerPC Syntax
    210 @menu
    211 * PowerPC-Chars::                Special Characters
    212 @end menu
    213 
    214 @node PowerPC-Chars
    215 @subsection Special Characters
    216 
    217 @cindex line comment character, PowerPC
    218 @cindex PowerPC line comment character
    219 The presence of a @samp{#} on a line indicates the start of a comment
    220 that extends to the end of the current line.
    221 
    222 If a @samp{#} appears as the first character of a line then the whole
    223 line is treated as a comment, but in this case the line could also be
    224 a logical line number directive (@pxref{Comments}) or a preprocessor
    225 control command (@pxref{Preprocessing}).
    226 
    227 If the assembler has been configured for the ppc-*-solaris* target
    228 then the @samp{!} character also acts as a line comment character.
    229 This can be disabled via the @option{-mno-solaris} command line
    230 option.
    231 
    232 @cindex line separator, PowerPC
    233 @cindex statement separator, PowerPC
    234 @cindex PowerPC line separator
    235 The @samp{;} character can be used to separate statements on the same
    236 line.
    237