1 1.1 christos /* This file defines the interface between the m32c simulator and gdb. 2 1.1.1.3 christos Copyright (C) 2005-2026 Free Software Foundation, Inc. 3 1.1 christos 4 1.1 christos This file is part of GDB. 5 1.1 christos 6 1.1 christos This program is free software; you can redistribute it and/or modify 7 1.1 christos it under the terms of the GNU General Public License as published by 8 1.1 christos the Free Software Foundation; either version 3 of the License, or 9 1.1 christos (at your option) any later version. 10 1.1 christos 11 1.1 christos This program is distributed in the hope that it will be useful, 12 1.1 christos but WITHOUT ANY WARRANTY; without even the implied warranty of 13 1.1 christos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 1.1 christos GNU General Public License for more details. 15 1.1 christos 16 1.1 christos You should have received a copy of the GNU General Public License 17 1.1 christos along with this program. If not, see <http://www.gnu.org/licenses/>. */ 18 1.1 christos 19 1.1 christos #ifndef SIM_M32C_H 20 1.1 christos #define SIM_M32C_H 21 1.1 christos 22 1.1 christos enum m32c_sim_reg { 23 1.1 christos m32c_sim_reg_r0_bank0, 24 1.1 christos m32c_sim_reg_r1_bank0, 25 1.1 christos m32c_sim_reg_r2_bank0, 26 1.1 christos m32c_sim_reg_r3_bank0, 27 1.1 christos m32c_sim_reg_a0_bank0, 28 1.1 christos m32c_sim_reg_a1_bank0, 29 1.1 christos m32c_sim_reg_fb_bank0, 30 1.1 christos m32c_sim_reg_sb_bank0, 31 1.1 christos m32c_sim_reg_r0_bank1, 32 1.1 christos m32c_sim_reg_r1_bank1, 33 1.1 christos m32c_sim_reg_r2_bank1, 34 1.1 christos m32c_sim_reg_r3_bank1, 35 1.1 christos m32c_sim_reg_a0_bank1, 36 1.1 christos m32c_sim_reg_a1_bank1, 37 1.1 christos m32c_sim_reg_fb_bank1, 38 1.1 christos m32c_sim_reg_sb_bank1, 39 1.1 christos m32c_sim_reg_usp, 40 1.1 christos m32c_sim_reg_isp, 41 1.1 christos m32c_sim_reg_pc, 42 1.1 christos m32c_sim_reg_intb, 43 1.1 christos m32c_sim_reg_flg, 44 1.1 christos m32c_sim_reg_svf, 45 1.1 christos m32c_sim_reg_svp, 46 1.1 christos m32c_sim_reg_vct, 47 1.1 christos m32c_sim_reg_dmd0, 48 1.1 christos m32c_sim_reg_dmd1, 49 1.1 christos m32c_sim_reg_dct0, 50 1.1 christos m32c_sim_reg_dct1, 51 1.1 christos m32c_sim_reg_drc0, 52 1.1 christos m32c_sim_reg_drc1, 53 1.1 christos m32c_sim_reg_dma0, 54 1.1 christos m32c_sim_reg_dma1, 55 1.1 christos m32c_sim_reg_dsa0, 56 1.1 christos m32c_sim_reg_dsa1, 57 1.1 christos m32c_sim_reg_dra0, 58 1.1 christos m32c_sim_reg_dra1, 59 1.1 christos m32c_sim_reg_num_regs 60 1.1 christos }; 61 1.1 christos 62 1.1 christos #endif /* SIM_M32C_H */ 63