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ia64-opc-a.c revision 1.1.1.3.2.1
      1          1.1     skrll /* ia64-opc-a.c -- IA-64 `A' opcode table.
      2  1.1.1.3.2.1  pgoyette    Copyright (C) 1998-2016 Free Software Foundation, Inc.
      3          1.1     skrll    Contributed by David Mosberger-Tang <davidm (at) hpl.hp.com>
      4          1.1     skrll 
      5          1.1     skrll    This file is part of the GNU opcodes library.
      6          1.1     skrll 
      7          1.1     skrll    This library is free software; you can redistribute it and/or modify
      8          1.1     skrll    it under the terms of the GNU General Public License as published by
      9          1.1     skrll    the Free Software Foundation; either version 3, or (at your option)
     10          1.1     skrll    any later version.
     11          1.1     skrll 
     12          1.1     skrll    It is distributed in the hope that it will be useful, but WITHOUT
     13          1.1     skrll    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14          1.1     skrll    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
     15          1.1     skrll    License for more details.
     16          1.1     skrll 
     17          1.1     skrll    You should have received a copy of the GNU General Public License
     18          1.1     skrll    along with this file; see the file COPYING.  If not, write to the
     19          1.1     skrll    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
     20          1.1     skrll    MA 02110-1301, USA.  */
     21          1.1     skrll 
     22          1.1     skrll #include "ia64-opc.h"
     23          1.1     skrll 
     24          1.1     skrll #define A	IA64_TYPE_A, 1
     25          1.1     skrll #define A2	IA64_TYPE_A, 2
     26          1.1     skrll 
     27          1.1     skrll /* instruction bit fields: */
     28          1.1     skrll #define bC(x)		(((ia64_insn) ((x) & 0x1)) << 12)
     29          1.1     skrll #define bImm14(x)	((((ia64_insn) (((x) >>  0) & 0x7f)) << 13) | \
     30          1.1     skrll 			 (((ia64_insn) (((x) >>  7) & 0x3f)) << 27) | \
     31          1.1     skrll 			 (((ia64_insn) (((x) >> 13) & 0x01)) << 36))
     32          1.1     skrll #define bR3a(x)		(((ia64_insn) ((x) & 0x7f)) << 20)
     33          1.1     skrll #define bR3b(x)		(((ia64_insn) ((x) & 0x3)) << 20)
     34          1.1     skrll #define bTa(x)		(((ia64_insn) ((x) & 0x1)) << 33)
     35          1.1     skrll #define bTb(x)		(((ia64_insn) ((x) & 0x1)) << 36)
     36          1.1     skrll #define bVe(x)		(((ia64_insn) ((x) & 0x1)) << 33)
     37          1.1     skrll #define bX(x)		(((ia64_insn) ((x) & 0x1)) << 33)
     38          1.1     skrll #define bX2(x)		(((ia64_insn) ((x) & 0x3)) << 34)
     39          1.1     skrll #define bX2a(x)		(((ia64_insn) ((x) & 0x3)) << 34)
     40          1.1     skrll #define bX2b(x)		(((ia64_insn) ((x) & 0x3)) << 27)
     41          1.1     skrll #define bX4(x)		(((ia64_insn) ((x) & 0xf)) << 29)
     42          1.1     skrll #define bZa(x)		(((ia64_insn) ((x) & 0x1)) << 36)
     43          1.1     skrll #define bZb(x)		(((ia64_insn) ((x) & 0x1)) << 33)
     44          1.1     skrll 
     45          1.1     skrll /* instruction bit masks: */
     46          1.1     skrll #define mC	bC (-1)
     47          1.1     skrll #define mImm14	bImm14 (-1)
     48          1.1     skrll #define mR3a	bR3a (-1)
     49          1.1     skrll #define mR3b	bR3b (-1)
     50          1.1     skrll #define mTa	bTa (-1)
     51          1.1     skrll #define mTb	bTb (-1)
     52          1.1     skrll #define mVe	bVe (-1)
     53          1.1     skrll #define mX	bX (-1)
     54          1.1     skrll #define mX2	bX2 (-1)
     55          1.1     skrll #define mX2a	bX2a (-1)
     56          1.1     skrll #define mX2b	bX2b (-1)
     57          1.1     skrll #define mX4	bX4 (-1)
     58          1.1     skrll #define mZa	bZa (-1)
     59          1.1     skrll #define mZb	bZb (-1)
     60          1.1     skrll 
     61          1.1     skrll #define OpR3b(a,b)		(bOp (a) | bR3b (b)), (mOp | mR3b)
     62          1.1     skrll #define OpX2aVe(a,b,c)		(bOp (a) | bX2a (b) | bVe (c)), \
     63          1.1     skrll 				(mOp | mX2a | mVe)
     64          1.1     skrll #define OpX2aVeR3a(a,b,c,d)	(bOp (a) | bX2a (b) | bVe (c) | bR3a (d)), \
     65          1.1     skrll 				(mOp | mX2a | mVe | mR3a)
     66          1.1     skrll #define OpX2aVeImm14(a,b,c,d)	(bOp (a) | bX2a (b) | bVe (c) | bImm14 (d)), \
     67          1.1     skrll 				(mOp | mX2a | mVe | mImm14)
     68          1.1     skrll #define OpX2aVeX4(a,b,c,d)	(bOp (a) | bX2a (b) | bVe (c) | bX4 (d)), \
     69          1.1     skrll 				(mOp | mX2a | mVe | mX4)
     70          1.1     skrll #define OpX2aVeX4X2b(a,b,c,d,e)	\
     71          1.1     skrll 	(bOp (a) | bX2a (b) | bVe (c) | bX4 (d) | bX2b (e)), \
     72          1.1     skrll 	(mOp | mX2a | mVe | mX4 | mX2b)
     73          1.1     skrll #define OpX2TbTaC(a,b,c,d,e) \
     74          1.1     skrll 	(bOp (a) | bX2 (b) | bTb (c) | bTa (d) | bC (e)), \
     75          1.1     skrll 	(mOp | mX2 | mTb | mTa | mC)
     76          1.1     skrll #define OpX2TaC(a,b,c,d)	(bOp (a) | bX2 (b) | bTa (c) | bC (d)), \
     77          1.1     skrll 				(mOp | mX2 | mTa | mC)
     78          1.1     skrll #define OpX2aZaZbX4(a,b,c,d,e) \
     79          1.1     skrll 	(bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e)), \
     80          1.1     skrll 	(mOp | mX2a | mZa | mZb | mX4)
     81          1.1     skrll #define OpX2aZaZbX4X2b(a,b,c,d,e,f) \
     82          1.1     skrll 	(bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e) | bX2b (f)), \
     83          1.1     skrll 	(mOp | mX2a | mZa | mZb | mX4 | mX2b)
     84          1.1     skrll 
     85          1.1     skrll /* Used to initialise unused fields in ia64_opcode struct,
     86          1.1     skrll    in order to stop gcc from complaining.  */
     87          1.1     skrll #define EMPTY 0,0,NULL
     88          1.1     skrll 
     89          1.1     skrll struct ia64_opcode ia64_opcodes_a[] =
     90          1.1     skrll   {
     91          1.1     skrll     /* A-type instruction encodings (sorted according to major opcode).  */
     92          1.1     skrll 
     93          1.1     skrll     {"add",	 A, OpX2aVeX4X2b (8, 0, 0, 0, 0), {R1, R2, R3}, EMPTY},
     94          1.1     skrll     {"add",	 A, OpX2aVeX4X2b (8, 0, 0, 0, 1), {R1, R2, R3, C1}, EMPTY},
     95          1.1     skrll     {"sub",	 A, OpX2aVeX4X2b (8, 0, 0, 1, 1), {R1, R2, R3}, EMPTY},
     96          1.1     skrll     {"sub",	 A, OpX2aVeX4X2b (8, 0, 0, 1, 0), {R1, R2, R3, C1}, EMPTY},
     97          1.1     skrll     {"addp4",	 A, OpX2aVeX4X2b (8, 0, 0, 2, 0), {R1, R2, R3}, EMPTY},
     98          1.1     skrll     {"and",	 A, OpX2aVeX4X2b (8, 0, 0, 3, 0), {R1, R2, R3}, EMPTY},
     99          1.1     skrll     {"andcm",	 A, OpX2aVeX4X2b (8, 0, 0, 3, 1), {R1, R2, R3}, EMPTY},
    100          1.1     skrll     {"or",	 A, OpX2aVeX4X2b (8, 0, 0, 3, 2), {R1, R2, R3}, EMPTY},
    101          1.1     skrll     {"xor",	 A, OpX2aVeX4X2b (8, 0, 0, 3, 3), {R1, R2, R3}, EMPTY},
    102          1.1     skrll     {"shladd",	 A, OpX2aVeX4 (8, 0, 0, 4), {R1, R2, CNT2a, R3}, EMPTY},
    103          1.1     skrll     {"shladdp4", A, OpX2aVeX4 (8, 0, 0, 6), {R1, R2, CNT2a, R3}, EMPTY},
    104          1.1     skrll     {"sub",	 A, OpX2aVeX4X2b (8, 0, 0, 9, 1), {R1, IMM8, R3}, EMPTY},
    105          1.1     skrll     {"and",	 A, OpX2aVeX4X2b (8, 0, 0, 0xb, 0), {R1, IMM8, R3}, EMPTY},
    106          1.1     skrll     {"andcm",	 A, OpX2aVeX4X2b (8, 0, 0, 0xb, 1), {R1, IMM8, R3}, EMPTY},
    107          1.1     skrll     {"or",	 A, OpX2aVeX4X2b (8, 0, 0, 0xb, 2), {R1, IMM8, R3}, EMPTY},
    108          1.1     skrll     {"xor",	 A, OpX2aVeX4X2b (8, 0, 0, 0xb, 3), {R1, IMM8, R3}, EMPTY},
    109          1.1     skrll     {"mov",	 A, OpX2aVeImm14 (8, 2, 0, 0), {R1, R3}, EMPTY},
    110          1.1     skrll     /* A mov immediate pseudo for adds was deleted.  It failed for immediate
    111          1.1     skrll        operands requiring relocs, e.g. @pltoff(a).  */
    112          1.1     skrll     {"adds",	 A, OpX2aVe (8, 2, 0), {R1, IMM14, R3}, EMPTY},
    113          1.1     skrll     {"addp4",	 A, OpX2aVe (8, 3, 0), {R1, IMM14, R3}, EMPTY},
    114          1.1     skrll     {"padd1",		 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 0), {R1, R2, R3}, EMPTY},
    115          1.1     skrll     {"padd2",		 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 0), {R1, R2, R3}, EMPTY},
    116          1.1     skrll     {"padd4",		 A, OpX2aZaZbX4X2b (8, 1, 1, 0, 0, 0), {R1, R2, R3}, EMPTY},
    117          1.1     skrll     {"padd1.sss",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 1), {R1, R2, R3}, EMPTY},
    118          1.1     skrll     {"padd2.sss",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 1), {R1, R2, R3}, EMPTY},
    119          1.1     skrll     {"padd1.uuu",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 2), {R1, R2, R3}, EMPTY},
    120          1.1     skrll     {"padd2.uuu",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 2), {R1, R2, R3}, EMPTY},
    121          1.1     skrll     {"padd1.uus",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 3), {R1, R2, R3}, EMPTY},
    122          1.1     skrll     {"padd2.uus",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 3), {R1, R2, R3}, EMPTY},
    123          1.1     skrll     {"psub1",		 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 0), {R1, R2, R3}, EMPTY},
    124          1.1     skrll     {"psub2",		 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 0), {R1, R2, R3}, EMPTY},
    125          1.1     skrll     {"psub4",		 A, OpX2aZaZbX4X2b (8, 1, 1, 0, 1, 0), {R1, R2, R3}, EMPTY},
    126          1.1     skrll     {"psub1.sss",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 1), {R1, R2, R3}, EMPTY},
    127          1.1     skrll     {"psub2.sss",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 1), {R1, R2, R3}, EMPTY},
    128          1.1     skrll     {"psub1.uuu",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 2), {R1, R2, R3}, EMPTY},
    129          1.1     skrll     {"psub2.uuu",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 2), {R1, R2, R3}, EMPTY},
    130          1.1     skrll     {"psub1.uus",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 3), {R1, R2, R3}, EMPTY},
    131          1.1     skrll     {"psub2.uus",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 3), {R1, R2, R3}, EMPTY},
    132          1.1     skrll     {"pavg1",		 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 2), {R1, R2, R3}, EMPTY},
    133          1.1     skrll     {"pavg2",		 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 2), {R1, R2, R3}, EMPTY},
    134          1.1     skrll     {"pavg1.raz",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 3), {R1, R2, R3}, EMPTY},
    135          1.1     skrll     {"pavg2.raz",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 3), {R1, R2, R3}, EMPTY},
    136          1.1     skrll     {"pavgsub1",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 3, 2), {R1, R2, R3}, EMPTY},
    137          1.1     skrll     {"pavgsub2",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 3, 2), {R1, R2, R3}, EMPTY},
    138          1.1     skrll     {"pcmp1.eq",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 0), {R1, R2, R3}, EMPTY},
    139          1.1     skrll     {"pcmp2.eq",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 0), {R1, R2, R3}, EMPTY},
    140          1.1     skrll     {"pcmp4.eq",	 A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 0), {R1, R2, R3}, EMPTY},
    141          1.1     skrll     {"pcmp1.gt",	 A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 1), {R1, R2, R3}, EMPTY},
    142          1.1     skrll     {"pcmp2.gt",	 A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 1), {R1, R2, R3}, EMPTY},
    143          1.1     skrll     {"pcmp4.gt",	 A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 1), {R1, R2, R3}, EMPTY},
    144          1.1     skrll     {"pshladd2",	 A, OpX2aZaZbX4 (8, 1, 0, 1, 4), {R1, R2, CNT2b, R3}, EMPTY},
    145          1.1     skrll     {"pshradd2",	 A, OpX2aZaZbX4 (8, 1, 0, 1, 6), {R1, R2, CNT2b, R3}, EMPTY},
    146          1.1     skrll 
    147          1.1     skrll     {"mov",		 A, OpR3b (9, 0), {R1, IMM22}, PSEUDO, 0, NULL},
    148          1.1     skrll     {"addl",		 A, Op    (9),	  {R1, IMM22, R3_2}, EMPTY},
    149          1.1     skrll 
    150          1.1     skrll     {"cmp.lt",		 A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
    151          1.1     skrll     {"cmp.le",		 A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
    152          1.1     skrll     {"cmp.gt",		 A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
    153          1.1     skrll     {"cmp.ge",		 A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
    154          1.1     skrll     {"cmp.lt.unc",	 A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
    155          1.1     skrll     {"cmp.le.unc",	 A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
    156          1.1     skrll     {"cmp.gt.unc",	 A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
    157          1.1     skrll     {"cmp.ge.unc",	 A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
    158          1.1     skrll     {"cmp.eq.and",	 A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
    159          1.1     skrll     {"cmp.ne.andcm",	 A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    160          1.1     skrll     {"cmp.ne.and",	 A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
    161          1.1     skrll     {"cmp.eq.andcm",	 A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    162          1.1     skrll     {"cmp4.lt",		 A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
    163          1.1     skrll     {"cmp4.le",		 A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
    164          1.1     skrll     {"cmp4.gt",		 A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
    165          1.1     skrll     {"cmp4.ge",		 A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
    166          1.1     skrll     {"cmp4.lt.unc",	 A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
    167          1.1     skrll     {"cmp4.le.unc",	 A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
    168          1.1     skrll     {"cmp4.gt.unc",	 A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
    169          1.1     skrll     {"cmp4.ge.unc",	 A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
    170          1.1     skrll     {"cmp4.eq.and",	 A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
    171          1.1     skrll     {"cmp4.ne.andcm",	 A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    172          1.1     skrll     {"cmp4.ne.and",	 A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
    173          1.1     skrll     {"cmp4.eq.andcm",	 A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    174          1.1     skrll     {"cmp.gt.and",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
    175          1.1     skrll     {"cmp.lt.and",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    176          1.1     skrll     {"cmp.le.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    177          1.1     skrll     {"cmp.ge.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    178          1.1     skrll     {"cmp.le.and",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
    179          1.1     skrll     {"cmp.ge.and",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    180          1.1     skrll     {"cmp.gt.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    181          1.1     skrll     {"cmp.lt.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    182          1.1     skrll     {"cmp.ge.and",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
    183          1.1     skrll     {"cmp.le.and",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    184          1.1     skrll     {"cmp.lt.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    185          1.1     skrll     {"cmp.gt.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    186          1.1     skrll     {"cmp.lt.and",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
    187          1.1     skrll     {"cmp.gt.and",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    188          1.1     skrll     {"cmp.ge.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    189          1.1     skrll     {"cmp.le.andcm",	 A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    190          1.1     skrll     {"cmp4.gt.and",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
    191          1.1     skrll     {"cmp4.lt.and",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    192          1.1     skrll     {"cmp4.le.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    193          1.1     skrll     {"cmp4.ge.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    194          1.1     skrll     {"cmp4.le.and",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
    195          1.1     skrll     {"cmp4.ge.and",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    196          1.1     skrll     {"cmp4.gt.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    197          1.1     skrll     {"cmp4.lt.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    198          1.1     skrll     {"cmp4.ge.and",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
    199          1.1     skrll     {"cmp4.le.and",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    200          1.1     skrll     {"cmp4.lt.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    201          1.1     skrll     {"cmp4.gt.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    202          1.1     skrll     {"cmp4.lt.and",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
    203          1.1     skrll     {"cmp4.gt.and",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    204          1.1     skrll     {"cmp4.ge.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    205          1.1     skrll     {"cmp4.le.andcm",	 A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    206          1.1     skrll     {"cmp.lt",		 A2, OpX2TaC   (0xc, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
    207          1.1     skrll     {"cmp.le",		 A2, OpX2TaC   (0xc, 2, 0, 0), {P1, P2, IMM8M1, R3}, EMPTY},
    208          1.1     skrll     {"cmp.gt",		 A2, OpX2TaC   (0xc, 2, 0, 0), {P2, P1, IMM8M1, R3}, EMPTY},
    209          1.1     skrll     {"cmp.ge",		 A2, OpX2TaC   (0xc, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
    210          1.1     skrll     {"cmp.lt.unc",	 A2, OpX2TaC   (0xc, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
    211          1.1     skrll     {"cmp.le.unc",	 A2, OpX2TaC   (0xc, 2, 0, 1), {P1, P2, IMM8M1, R3}, EMPTY},
    212          1.1     skrll     {"cmp.gt.unc",	 A2, OpX2TaC   (0xc, 2, 0, 1), {P2, P1, IMM8M1, R3}, EMPTY},
    213          1.1     skrll     {"cmp.ge.unc",	 A2, OpX2TaC   (0xc, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
    214          1.1     skrll     {"cmp.eq.and",	 A2, OpX2TaC   (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
    215          1.1     skrll     {"cmp.ne.andcm",	 A2, OpX2TaC   (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    216          1.1     skrll     {"cmp.ne.and",	 A2, OpX2TaC   (0xc, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
    217          1.1     skrll     {"cmp.eq.andcm",	 A2, OpX2TaC   (0xc, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    218          1.1     skrll     {"cmp4.lt",		 A2, OpX2TaC   (0xc, 3, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
    219          1.1     skrll     {"cmp4.le",		 A2, OpX2TaC   (0xc, 3, 0, 0), {P1, P2, IMM8M1, R3}, EMPTY},
    220          1.1     skrll     {"cmp4.gt",		 A2, OpX2TaC   (0xc, 3, 0, 0), {P2, P1, IMM8M1, R3}, EMPTY},
    221          1.1     skrll     {"cmp4.ge",		 A2, OpX2TaC   (0xc, 3, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
    222          1.1     skrll     {"cmp4.lt.unc",	 A2, OpX2TaC   (0xc, 3, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
    223          1.1     skrll     {"cmp4.le.unc",	 A2, OpX2TaC   (0xc, 3, 0, 1), {P1, P2, IMM8M1, R3}, EMPTY},
    224          1.1     skrll     {"cmp4.gt.unc",	 A2, OpX2TaC   (0xc, 3, 0, 1), {P2, P1, IMM8M1, R3}, EMPTY},
    225          1.1     skrll     {"cmp4.ge.unc",	 A2, OpX2TaC   (0xc, 3, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
    226          1.1     skrll     {"cmp4.eq.and",	 A2, OpX2TaC   (0xc, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
    227          1.1     skrll     {"cmp4.ne.andcm",	 A2, OpX2TaC   (0xc, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    228          1.1     skrll     {"cmp4.ne.and",	 A2, OpX2TaC   (0xc, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
    229          1.1     skrll     {"cmp4.eq.andcm",	 A2, OpX2TaC   (0xc, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    230          1.1     skrll     {"cmp.ltu",		 A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
    231          1.1     skrll     {"cmp.leu",		 A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
    232          1.1     skrll     {"cmp.gtu",		 A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
    233          1.1     skrll     {"cmp.geu",		 A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
    234          1.1     skrll     {"cmp.ltu.unc",	 A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
    235          1.1     skrll     {"cmp.leu.unc",	 A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
    236          1.1     skrll     {"cmp.gtu.unc",	 A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
    237          1.1     skrll     {"cmp.geu.unc",	 A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
    238          1.1     skrll     {"cmp.eq.or",	 A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
    239          1.1     skrll     {"cmp.ne.orcm",	 A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    240          1.1     skrll     {"cmp.ne.or",	 A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
    241          1.1     skrll     {"cmp.eq.orcm",	 A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    242          1.1     skrll     {"cmp4.ltu",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
    243          1.1     skrll     {"cmp4.leu",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
    244          1.1     skrll     {"cmp4.gtu",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
    245          1.1     skrll     {"cmp4.geu",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
    246          1.1     skrll     {"cmp4.ltu.unc",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
    247          1.1     skrll     {"cmp4.leu.unc",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
    248          1.1     skrll     {"cmp4.gtu.unc",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
    249          1.1     skrll     {"cmp4.geu.unc",	 A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
    250          1.1     skrll     {"cmp4.eq.or",	 A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
    251          1.1     skrll     {"cmp4.ne.orcm",	 A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    252          1.1     skrll     {"cmp4.ne.or",	 A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
    253          1.1     skrll     {"cmp4.eq.orcm",	 A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
    254          1.1     skrll     {"cmp.gt.or",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
    255          1.1     skrll     {"cmp.lt.or",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    256          1.1     skrll     {"cmp.le.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    257          1.1     skrll     {"cmp.ge.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    258          1.1     skrll     {"cmp.le.or",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
    259          1.1     skrll     {"cmp.ge.or",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    260          1.1     skrll     {"cmp.gt.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    261          1.1     skrll     {"cmp.lt.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    262          1.1     skrll     {"cmp.ge.or",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
    263          1.1     skrll     {"cmp.le.or",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    264          1.1     skrll     {"cmp.lt.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    265          1.1     skrll     {"cmp.gt.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    266          1.1     skrll     {"cmp.lt.or",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
    267          1.1     skrll     {"cmp.gt.or",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    268          1.1     skrll     {"cmp.ge.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    269          1.1     skrll     {"cmp.le.orcm",	 A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    270          1.1     skrll     {"cmp4.gt.or",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
    271          1.1     skrll     {"cmp4.lt.or",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    272          1.1     skrll     {"cmp4.le.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    273          1.1     skrll     {"cmp4.ge.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    274          1.1     skrll     {"cmp4.le.or",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
    275          1.1     skrll     {"cmp4.ge.or",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    276          1.1     skrll     {"cmp4.gt.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    277          1.1     skrll     {"cmp4.lt.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    278          1.1     skrll     {"cmp4.ge.or",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
    279          1.1     skrll     {"cmp4.le.or",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    280          1.1     skrll     {"cmp4.lt.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    281          1.1     skrll     {"cmp4.gt.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    282          1.1     skrll     {"cmp4.lt.or",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
    283          1.1     skrll     {"cmp4.gt.or",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    284          1.1     skrll     {"cmp4.ge.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
    285          1.1     skrll     {"cmp4.le.orcm",	 A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    286          1.1     skrll     {"cmp.ltu",		 A2, OpX2TaC   (0xd, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
    287          1.1     skrll     {"cmp.leu",		 A2, OpX2TaC   (0xd, 2, 0, 0), {P1, P2, IMM8M1U8, R3}, EMPTY},
    288          1.1     skrll     {"cmp.gtu",		 A2, OpX2TaC   (0xd, 2, 0, 0), {P2, P1, IMM8M1U8, R3}, EMPTY},
    289          1.1     skrll     {"cmp.geu",		 A2, OpX2TaC   (0xd, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
    290          1.1     skrll     {"cmp.ltu.unc",	 A2, OpX2TaC   (0xd, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
    291          1.1     skrll     {"cmp.leu.unc",	 A2, OpX2TaC   (0xd, 2, 0, 1), {P1, P2, IMM8M1U8, R3}, EMPTY},
    292          1.1     skrll     {"cmp.gtu.unc",	 A2, OpX2TaC   (0xd, 2, 0, 1), {P2, P1, IMM8M1U8, R3}, EMPTY},
    293          1.1     skrll     {"cmp.geu.unc",	 A2, OpX2TaC   (0xd, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
    294          1.1     skrll     {"cmp.eq.or",	 A2, OpX2TaC   (0xd, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
    295          1.1     skrll     {"cmp.ne.orcm",	 A2, OpX2TaC   (0xd, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    296          1.1     skrll     {"cmp.ne.or",	 A2, OpX2TaC   (0xd, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
    297          1.1     skrll     {"cmp.eq.orcm",	 A2, OpX2TaC   (0xd, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    298          1.1     skrll     {"cmp4.ltu",	 A2, OpX2TaC   (0xd, 3, 0, 0), {P1, P2, IMM8U4, R3}, EMPTY},
    299          1.1     skrll     {"cmp4.leu",	 A2, OpX2TaC   (0xd, 3, 0, 0), {P1, P2, IMM8M1U4, R3}, EMPTY},
    300          1.1     skrll     {"cmp4.gtu",	 A2, OpX2TaC   (0xd, 3, 0, 0), {P2, P1, IMM8M1U4, R3}, EMPTY},
    301          1.1     skrll     {"cmp4.geu",	 A2, OpX2TaC   (0xd, 3, 0, 0), {P2, P1, IMM8U4, R3}, EMPTY},
    302          1.1     skrll     {"cmp4.ltu.unc",	 A2, OpX2TaC   (0xd, 3, 0, 1), {P1, P2, IMM8U4, R3}, EMPTY},
    303          1.1     skrll     {"cmp4.leu.unc",	 A2, OpX2TaC   (0xd, 3, 0, 1), {P1, P2, IMM8M1U4, R3}, EMPTY},
    304          1.1     skrll     {"cmp4.gtu.unc",	 A2, OpX2TaC   (0xd, 3, 0, 1), {P2, P1, IMM8M1U4, R3}, EMPTY},
    305          1.1     skrll     {"cmp4.geu.unc",	 A2, OpX2TaC   (0xd, 3, 0, 1), {P2, P1, IMM8U4, R3}, EMPTY},
    306          1.1     skrll     {"cmp4.eq.or",	 A2, OpX2TaC   (0xd, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
    307          1.1     skrll     {"cmp4.ne.orcm",	 A2, OpX2TaC   (0xd, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    308          1.1     skrll     {"cmp4.ne.or",	 A2, OpX2TaC   (0xd, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
    309          1.1     skrll     {"cmp4.eq.orcm",	 A2, OpX2TaC   (0xd, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
    310          1.1     skrll     {"cmp.eq",		 A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
    311          1.1     skrll     {"cmp.ne",		 A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
    312          1.1     skrll     {"cmp.eq.unc",	 A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
    313          1.1     skrll     {"cmp.ne.unc",	 A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
    314          1.1     skrll     {"cmp.eq.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
    315          1.1     skrll     {"cmp.ne.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
    316          1.1     skrll     {"cmp.ne.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
    317          1.1     skrll     {"cmp.eq.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
    318          1.1     skrll     {"cmp4.eq",		 A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
    319          1.1     skrll     {"cmp4.ne",		 A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
    320          1.1     skrll     {"cmp4.eq.unc",	 A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
    321          1.1     skrll     {"cmp4.ne.unc",	 A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
    322          1.1     skrll     {"cmp4.eq.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
    323          1.1     skrll     {"cmp4.ne.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
    324          1.1     skrll     {"cmp4.ne.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
    325          1.1     skrll     {"cmp4.eq.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
    326          1.1     skrll     {"cmp.gt.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
    327          1.1     skrll     {"cmp.lt.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    328          1.1     skrll     {"cmp.le.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    329          1.1     skrll     {"cmp.ge.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    330          1.1     skrll     {"cmp.le.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
    331          1.1     skrll     {"cmp.ge.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    332          1.1     skrll     {"cmp.gt.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    333          1.1     skrll     {"cmp.lt.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    334          1.1     skrll     {"cmp.ge.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
    335          1.1     skrll     {"cmp.le.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    336          1.1     skrll     {"cmp.lt.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    337          1.1     skrll     {"cmp.gt.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    338          1.1     skrll     {"cmp.lt.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
    339          1.1     skrll     {"cmp.gt.or.andcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    340          1.1     skrll     {"cmp.ge.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    341          1.1     skrll     {"cmp.le.and.orcm",	 A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    342          1.1     skrll     {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
    343          1.1     skrll     {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    344          1.1     skrll     {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    345          1.1     skrll     {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    346          1.1     skrll     {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
    347          1.1     skrll     {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    348          1.1     skrll     {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    349          1.1     skrll     {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    350          1.1     skrll     {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
    351          1.1     skrll     {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    352          1.1     skrll     {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    353          1.1     skrll     {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    354          1.1     skrll     {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
    355          1.1     skrll     {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
    356          1.1     skrll     {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
    357          1.1     skrll     {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
    358          1.1     skrll     {"cmp.eq",		 A2, OpX2TaC   (0xe, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
    359          1.1     skrll     {"cmp.ne",		 A2, OpX2TaC   (0xe, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
    360          1.1     skrll     {"cmp.eq.unc",	 A2, OpX2TaC   (0xe, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
    361          1.1     skrll     {"cmp.ne.unc",	 A2, OpX2TaC   (0xe, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
    362          1.1     skrll     {"cmp.eq.or.andcm",	 A2, OpX2TaC   (0xe, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
    363          1.1     skrll     {"cmp.ne.and.orcm",	 A2, OpX2TaC   (0xe, 2, 1, 0), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
    364          1.1     skrll     {"cmp.ne.or.andcm",	 A2, OpX2TaC   (0xe, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
    365          1.1     skrll     {"cmp.eq.and.orcm",	 A2, OpX2TaC   (0xe, 2, 1, 1), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
    366          1.1     skrll     {"cmp4.eq",		 A2, OpX2TaC   (0xe, 3, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
    367          1.1     skrll     {"cmp4.ne",		 A2, OpX2TaC   (0xe, 3, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
    368          1.1     skrll     {"cmp4.eq.unc",	 A2, OpX2TaC   (0xe, 3, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
    369          1.1     skrll     {"cmp4.ne.unc",	 A2, OpX2TaC   (0xe, 3, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
    370          1.1     skrll     {"cmp4.eq.or.andcm", A2, OpX2TaC   (0xe, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
    371          1.1     skrll     {"cmp4.ne.and.orcm", A2, OpX2TaC   (0xe, 3, 1, 0), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
    372          1.1     skrll     {"cmp4.ne.or.andcm", A2, OpX2TaC   (0xe, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
    373          1.1     skrll     {"cmp4.eq.and.orcm", A2, OpX2TaC   (0xe, 3, 1, 1), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
    374          1.1     skrll 
    375          1.1     skrll     {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
    376          1.1     skrll   };
    377          1.1     skrll 
    378          1.1     skrll #undef A
    379          1.1     skrll #undef A2
    380          1.1     skrll #undef bC
    381          1.1     skrll #undef bImm14
    382          1.1     skrll #undef bR3a
    383          1.1     skrll #undef bR3b
    384          1.1     skrll #undef bTa
    385          1.1     skrll #undef bTb
    386          1.1     skrll #undef bVe
    387          1.1     skrll #undef bX
    388          1.1     skrll #undef bX2
    389          1.1     skrll #undef bX2a
    390          1.1     skrll #undef bX2b
    391          1.1     skrll #undef bX4
    392          1.1     skrll #undef bZa
    393          1.1     skrll #undef bZb
    394          1.1     skrll #undef mC
    395          1.1     skrll #undef mImm14
    396          1.1     skrll #undef mR3a
    397          1.1     skrll #undef mR3b
    398          1.1     skrll #undef mTa
    399          1.1     skrll #undef mTb
    400          1.1     skrll #undef mVe
    401          1.1     skrll #undef mX
    402          1.1     skrll #undef mX2
    403          1.1     skrll #undef mX2a
    404          1.1     skrll #undef mX2b
    405          1.1     skrll #undef mX4
    406          1.1     skrll #undef mZa
    407          1.1     skrll #undef mZb
    408          1.1     skrll #undef OpR3a
    409          1.1     skrll #undef OpR3b
    410          1.1     skrll #undef OpX2aVe
    411          1.1     skrll #undef OpX2aVeImm14
    412          1.1     skrll #undef OpX2aVeX4
    413          1.1     skrll #undef OpX2aVeX4X2b
    414          1.1     skrll #undef OpX2TbTaC
    415          1.1     skrll #undef OpX2TaC
    416          1.1     skrll #undef OpX2aZaZbX4
    417          1.1     skrll #undef OpX2aZaZbX4X2b
    418          1.1     skrll #undef EMPTY
    419