m32c-asm.c revision 1.1
1 /* Assembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-asm.in isn't 6 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2007 8 Free Software Foundation, Inc. 9 10 This file is part of libopcodes. 11 12 This library is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 3, or (at your option) 15 any later version. 16 17 It is distributed in the hope that it will be useful, but WITHOUT 18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 20 License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software Foundation, Inc., 24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 25 26 27 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 28 Keep that in mind. */ 29 30 #include "sysdep.h" 31 #include <stdio.h> 32 #include "ansidecl.h" 33 #include "bfd.h" 34 #include "symcat.h" 35 #include "m32c-desc.h" 36 #include "m32c-opc.h" 37 #include "opintl.h" 38 #include "xregex.h" 39 #include "libiberty.h" 40 #include "safe-ctype.h" 41 42 #undef min 43 #define min(a,b) ((a) < (b) ? (a) : (b)) 44 #undef max 45 #define max(a,b) ((a) > (b) ? (a) : (b)) 46 47 static const char * parse_insn_normal 48 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); 49 50 /* -- assembler routines inserted here. */ 52 53 /* -- asm.c */ 54 #include "safe-ctype.h" 55 56 #define MACH_M32C 5 /* Must match md_begin. */ 57 58 static int 59 m32c_cgen_isa_register (const char **strp) 60 { 61 int u; 62 const char *s = *strp; 63 static char * m32c_register_names [] = 64 { 65 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h", 66 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf", 67 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0", 68 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0 69 }; 70 71 for (u = 0; m32c_register_names[u]; u++) 72 { 73 int len = strlen (m32c_register_names[u]); 74 75 if (memcmp (m32c_register_names[u], s, len) == 0 76 && (s[len] == 0 || ! ISALNUM (s[len]))) 77 return 1; 78 } 79 return 0; 80 } 81 82 #define PARSE_UNSIGNED \ 83 do \ 84 { \ 85 /* Don't successfully parse literals beginning with '['. */ \ 86 if (**strp == '[') \ 87 return "Invalid literal"; /* Anything -- will not be seen. */ \ 88 \ 89 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\ 90 if (errmsg) \ 91 return errmsg; \ 92 } \ 93 while (0) 94 95 #define PARSE_SIGNED \ 96 do \ 97 { \ 98 /* Don't successfully parse literals beginning with '['. */ \ 99 if (**strp == '[') \ 100 return "Invalid literal"; /* Anything -- will not be seen. */ \ 101 \ 102 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \ 103 if (errmsg) \ 104 return errmsg; \ 105 } \ 106 while (0) 107 108 static const char * 109 parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp, 110 int opindex, unsigned long *valuep) 111 { 112 const char *errmsg = 0; 113 unsigned long value; 114 115 PARSE_UNSIGNED; 116 117 if (value > 0x3f) 118 return _("imm:6 immediate is out of range"); 119 120 *valuep = value; 121 return 0; 122 } 123 124 static const char * 125 parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp, 126 int opindex, unsigned long *valuep) 127 { 128 const char *errmsg = 0; 129 unsigned long value; 130 long have_zero = 0; 131 132 if (strncasecmp (*strp, "%dsp8(", 6) == 0) 133 { 134 enum cgen_parse_operand_result result_type; 135 bfd_vma value; 136 const char *errmsg; 137 138 *strp += 6; 139 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8, 140 & result_type, & value); 141 if (**strp != ')') 142 return _("missing `)'"); 143 (*strp) ++; 144 145 if (errmsg == NULL 146 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 147 { 148 return _("%dsp8() takes a symbolic address, not a number"); 149 } 150 *valuep = value; 151 return errmsg; 152 } 153 154 if (strncmp (*strp, "0x0", 3) == 0 155 || (**strp == '0' && *(*strp + 1) != 'x')) 156 have_zero = 1; 157 158 PARSE_UNSIGNED; 159 160 if (value > 0xff) 161 return _("dsp:8 immediate is out of range"); 162 163 /* If this field may require a relocation then use larger dsp16. */ 164 if (! have_zero && value == 0) 165 return _("dsp:8 immediate is out of range"); 166 167 *valuep = value; 168 return 0; 169 } 170 171 static const char * 172 parse_signed4 (CGEN_CPU_DESC cd, const char **strp, 173 int opindex, signed long *valuep) 174 { 175 const char *errmsg = 0; 176 signed long value; 177 long have_zero = 0; 178 179 if (strncmp (*strp, "0x0", 3) == 0 180 || (**strp == '0' && *(*strp + 1) != 'x')) 181 have_zero = 1; 182 183 PARSE_SIGNED; 184 185 if (value < -8 || value > 7) 186 return _("Immediate is out of range -8 to 7"); 187 188 /* If this field may require a relocation then use larger dsp16. */ 189 if (! have_zero && value == 0) 190 return _("Immediate is out of range -8 to 7"); 191 192 *valuep = value; 193 return 0; 194 } 195 196 static const char * 197 parse_signed4n (CGEN_CPU_DESC cd, const char **strp, 198 int opindex, signed long *valuep) 199 { 200 const char *errmsg = 0; 201 signed long value; 202 long have_zero = 0; 203 204 if (strncmp (*strp, "0x0", 3) == 0 205 || (**strp == '0' && *(*strp + 1) != 'x')) 206 have_zero = 1; 207 208 PARSE_SIGNED; 209 210 if (value < -7 || value > 8) 211 return _("Immediate is out of range -7 to 8"); 212 213 /* If this field may require a relocation then use larger dsp16. */ 214 if (! have_zero && value == 0) 215 return _("Immediate is out of range -7 to 8"); 216 217 *valuep = -value; 218 return 0; 219 } 220 221 static const char * 222 parse_signed8 (CGEN_CPU_DESC cd, const char **strp, 223 int opindex, signed long *valuep) 224 { 225 const char *errmsg = 0; 226 signed long value; 227 228 if (strncasecmp (*strp, "%hi8(", 5) == 0) 229 { 230 enum cgen_parse_operand_result result_type; 231 bfd_vma value; 232 const char *errmsg; 233 234 *strp += 5; 235 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8, 236 & result_type, & value); 237 if (**strp != ')') 238 return _("missing `)'"); 239 (*strp) ++; 240 241 if (errmsg == NULL 242 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 243 { 244 value >>= 16; 245 } 246 *valuep = value; 247 return errmsg; 248 } 249 250 PARSE_SIGNED; 251 252 if (value <= 255 && value > 127) 253 value -= 0x100; 254 255 if (value < -128 || value > 127) 256 return _("dsp:8 immediate is out of range"); 257 258 *valuep = value; 259 return 0; 260 } 261 262 static const char * 263 parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp, 264 int opindex, unsigned long *valuep) 265 { 266 const char *errmsg = 0; 267 unsigned long value; 268 long have_zero = 0; 269 270 if (strncasecmp (*strp, "%dsp16(", 7) == 0) 271 { 272 enum cgen_parse_operand_result result_type; 273 bfd_vma value; 274 const char *errmsg; 275 276 *strp += 7; 277 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16, 278 & result_type, & value); 279 if (**strp != ')') 280 return _("missing `)'"); 281 (*strp) ++; 282 283 if (errmsg == NULL 284 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 285 { 286 return _("%dsp16() takes a symbolic address, not a number"); 287 } 288 *valuep = value; 289 return errmsg; 290 } 291 292 /* Don't successfully parse literals beginning with '['. */ 293 if (**strp == '[') 294 return "Invalid literal"; /* Anything -- will not be seen. */ 295 296 /* Don't successfully parse register names. */ 297 if (m32c_cgen_isa_register (strp)) 298 return "Invalid literal"; /* Anything -- will not be seen. */ 299 300 if (strncmp (*strp, "0x0", 3) == 0 301 || (**strp == '0' && *(*strp + 1) != 'x')) 302 have_zero = 1; 303 304 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 305 if (errmsg) 306 return errmsg; 307 308 if (value > 0xffff) 309 return _("dsp:16 immediate is out of range"); 310 311 /* If this field may require a relocation then use larger dsp24. */ 312 if (cd->machs == MACH_M32C && ! have_zero && value == 0 313 && (strncmp (*strp, "[a", 2) == 0 314 || **strp == ',' 315 || **strp == 0)) 316 return _("dsp:16 immediate is out of range"); 317 318 *valuep = value; 319 return 0; 320 } 321 322 static const char * 323 parse_signed16 (CGEN_CPU_DESC cd, const char **strp, 324 int opindex, signed long *valuep) 325 { 326 const char *errmsg = 0; 327 signed long value; 328 329 if (strncasecmp (*strp, "%lo16(", 6) == 0) 330 { 331 enum cgen_parse_operand_result result_type; 332 bfd_vma value; 333 const char *errmsg; 334 335 *strp += 6; 336 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, 337 & result_type, & value); 338 if (**strp != ')') 339 return _("missing `)'"); 340 (*strp) ++; 341 342 if (errmsg == NULL 343 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 344 { 345 value &= 0xffff; 346 } 347 *valuep = value; 348 return errmsg; 349 } 350 351 if (strncasecmp (*strp, "%hi16(", 6) == 0) 352 { 353 enum cgen_parse_operand_result result_type; 354 bfd_vma value; 355 const char *errmsg; 356 357 *strp += 6; 358 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, 359 & result_type, & value); 360 if (**strp != ')') 361 return _("missing `)'"); 362 (*strp) ++; 363 364 if (errmsg == NULL 365 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 366 { 367 value >>= 16; 368 } 369 *valuep = value; 370 return errmsg; 371 } 372 373 PARSE_SIGNED; 374 375 if (value <= 65535 && value > 32767) 376 value -= 0x10000; 377 378 if (value < -32768 || value > 32767) 379 return _("dsp:16 immediate is out of range"); 380 381 *valuep = value; 382 return 0; 383 } 384 385 static const char * 386 parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp, 387 int opindex, unsigned long *valuep) 388 { 389 const char *errmsg = 0; 390 unsigned long value; 391 392 /* Don't successfully parse literals beginning with '['. */ 393 if (**strp == '[') 394 return "Invalid literal"; /* Anything -- will not be seen. */ 395 396 /* Don't successfully parse register names. */ 397 if (m32c_cgen_isa_register (strp)) 398 return "Invalid literal"; /* Anything -- will not be seen. */ 399 400 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 401 if (errmsg) 402 return errmsg; 403 404 if (value > 0xfffff) 405 return _("dsp:20 immediate is out of range"); 406 407 *valuep = value; 408 return 0; 409 } 410 411 static const char * 412 parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp, 413 int opindex, unsigned long *valuep) 414 { 415 const char *errmsg = 0; 416 unsigned long value; 417 418 /* Don't successfully parse literals beginning with '['. */ 419 if (**strp == '[') 420 return "Invalid literal"; /* Anything -- will not be seen. */ 421 422 /* Don't successfully parse register names. */ 423 if (m32c_cgen_isa_register (strp)) 424 return "Invalid literal"; /* Anything -- will not be seen. */ 425 426 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 427 if (errmsg) 428 return errmsg; 429 430 if (value > 0xffffff) 431 return _("dsp:24 immediate is out of range"); 432 433 *valuep = value; 434 return 0; 435 } 436 437 /* This should only be used for #imm->reg. */ 438 static const char * 439 parse_signed24 (CGEN_CPU_DESC cd, const char **strp, 440 int opindex, signed long *valuep) 441 { 442 const char *errmsg = 0; 443 signed long value; 444 445 PARSE_SIGNED; 446 447 if (value <= 0xffffff && value > 0x7fffff) 448 value -= 0x1000000; 449 450 if (value > 0xffffff) 451 return _("dsp:24 immediate is out of range"); 452 453 *valuep = value; 454 return 0; 455 } 456 457 static const char * 458 parse_signed32 (CGEN_CPU_DESC cd, const char **strp, 459 int opindex, signed long *valuep) 460 { 461 const char *errmsg = 0; 462 signed long value; 463 464 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 465 if (errmsg) 466 return errmsg; 467 468 *valuep = value; 469 return 0; 470 } 471 472 static const char * 473 parse_imm1_S (CGEN_CPU_DESC cd, const char **strp, 474 int opindex, signed long *valuep) 475 { 476 const char *errmsg = 0; 477 signed long value; 478 479 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 480 if (errmsg) 481 return errmsg; 482 483 if (value < 1 || value > 2) 484 return _("immediate is out of range 1-2"); 485 486 *valuep = value; 487 return 0; 488 } 489 490 static const char * 491 parse_imm3_S (CGEN_CPU_DESC cd, const char **strp, 492 int opindex, signed long *valuep) 493 { 494 const char *errmsg = 0; 495 signed long value; 496 497 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 498 if (errmsg) 499 return errmsg; 500 501 if (value < 1 || value > 8) 502 return _("immediate is out of range 1-8"); 503 504 *valuep = value; 505 return 0; 506 } 507 508 static const char * 509 parse_bit3_S (CGEN_CPU_DESC cd, const char **strp, 510 int opindex, signed long *valuep) 511 { 512 const char *errmsg = 0; 513 signed long value; 514 515 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 516 if (errmsg) 517 return errmsg; 518 519 if (value < 0 || value > 7) 520 return _("immediate is out of range 0-7"); 521 522 *valuep = value; 523 return 0; 524 } 525 526 static const char * 527 parse_lab_5_3 (CGEN_CPU_DESC cd, 528 const char **strp, 529 int opindex ATTRIBUTE_UNUSED, 530 int opinfo, 531 enum cgen_parse_operand_result *type_addr, 532 bfd_vma *valuep) 533 { 534 const char *errmsg = 0; 535 bfd_vma value; 536 enum cgen_parse_operand_result op_res; 537 538 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3, 539 opinfo, & op_res, & value); 540 541 if (type_addr) 542 *type_addr = op_res; 543 544 if (op_res == CGEN_PARSE_OPERAND_ADDRESS) 545 { 546 /* This is a hack; the field cannot handle near-zero signed 547 offsets that CGEN wants to put in to indicate an "empty" 548 operand at first. */ 549 *valuep = 2; 550 return 0; 551 } 552 if (errmsg) 553 return errmsg; 554 555 if (value < 2 || value > 9) 556 return _("immediate is out of range 2-9"); 557 558 *valuep = value; 559 return 0; 560 } 561 562 static const char * 563 parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp, 564 int opindex, unsigned long *valuep) 565 { 566 const char *errmsg = 0; 567 unsigned long value; 568 569 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 570 if (errmsg) 571 return errmsg; 572 573 if (value > 15) 574 return _("Bit number for indexing general register is out of range 0-15"); 575 576 *valuep = value; 577 return 0; 578 } 579 580 static const char * 581 parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, 582 int opindex, unsigned long *valuep, 583 unsigned bits, int allow_syms) 584 { 585 const char *errmsg = 0; 586 unsigned long bit; 587 unsigned long base; 588 const char *newp = *strp; 589 unsigned long long bitbase; 590 long have_zero = 0; 591 592 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 593 if (errmsg) 594 return errmsg; 595 596 if (*newp != ',') 597 return "Missing base for bit,base:8"; 598 599 ++newp; 600 601 if (strncmp (newp, "0x0", 3) == 0 602 || (newp[0] == '0' && newp[1] != 'x')) 603 have_zero = 1; 604 605 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base); 606 if (errmsg) 607 return errmsg; 608 609 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8); 610 611 if (bitbase >= (1ull << bits)) 612 return _("bit,base is out of range"); 613 614 /* If this field may require a relocation then use larger displacement. */ 615 if (! have_zero && base == 0) 616 { 617 switch (allow_syms) { 618 case 0: 619 return _("bit,base out of range for symbol"); 620 case 1: 621 break; 622 case 2: 623 if (strncmp (newp, "[sb]", 4) != 0) 624 return _("bit,base out of range for symbol"); 625 break; 626 } 627 } 628 629 *valuep = bitbase; 630 *strp = newp; 631 return 0; 632 } 633 634 static const char * 635 parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, 636 int opindex, signed long *valuep, 637 unsigned bits, int allow_syms) 638 { 639 const char *errmsg = 0; 640 unsigned long bit; 641 signed long base; 642 const char *newp = *strp; 643 long long bitbase; 644 long long limit; 645 long have_zero = 0; 646 647 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 648 if (errmsg) 649 return errmsg; 650 651 if (*newp != ',') 652 return "Missing base for bit,base:8"; 653 654 ++newp; 655 656 if (strncmp (newp, "0x0", 3) == 0 657 || (newp[0] == '0' && newp[1] != 'x')) 658 have_zero = 1; 659 660 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base); 661 if (errmsg) 662 return errmsg; 663 664 bitbase = (long long)bit + ((long long)base * 8); 665 666 limit = 1ll << (bits - 1); 667 if (bitbase < -limit || bitbase >= limit) 668 return _("bit,base is out of range"); 669 670 /* If this field may require a relocation then use larger displacement. */ 671 if (! have_zero && base == 0 && ! allow_syms) 672 return _("bit,base out of range for symbol"); 673 674 *valuep = bitbase; 675 *strp = newp; 676 return 0; 677 } 678 679 static const char * 680 parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 681 int opindex, unsigned long *valuep) 682 { 683 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0); 684 } 685 686 static const char * 687 parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 688 int opindex, unsigned long *valuep) 689 { 690 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0); 691 } 692 693 static const char * 694 parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp, 695 int opindex, unsigned long *valuep) 696 { 697 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1); 698 } 699 700 static const char * 701 parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 702 int opindex, unsigned long *valuep) 703 { 704 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2); 705 } 706 707 static const char * 708 parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp, 709 int opindex, unsigned long *valuep) 710 { 711 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1); 712 } 713 714 static const char * 715 parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 716 int opindex, signed long *valuep) 717 { 718 return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1); 719 } 720 721 static const char * 722 parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 723 int opindex, signed long *valuep) 724 { 725 return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0); 726 } 727 728 static const char * 729 parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 730 int opindex, signed long *valuep) 731 { 732 return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1); 733 } 734 735 /* Parse the suffix as :<char> or as nothing followed by a whitespace. */ 736 737 static const char * 738 parse_suffix (const char **strp, char suffix) 739 { 740 const char *newp = *strp; 741 742 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix) 743 newp = *strp + 2; 744 745 if (ISSPACE (*newp)) 746 { 747 *strp = newp; 748 return 0; 749 } 750 751 return "Invalid suffix"; /* Anything -- will not be seen. */ 752 } 753 754 static const char * 755 parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 756 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 757 { 758 return parse_suffix (strp, 's'); 759 } 760 761 static const char * 762 parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 763 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 764 { 765 return parse_suffix (strp, 'g'); 766 } 767 768 static const char * 769 parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 770 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 771 { 772 return parse_suffix (strp, 'q'); 773 } 774 775 static const char * 776 parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 777 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 778 { 779 return parse_suffix (strp, 'z'); 780 } 781 782 /* Parse an empty suffix. Fail if the next char is ':'. */ 783 784 static const char * 785 parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 786 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 787 { 788 if (**strp == ':') 789 return "Unexpected suffix"; 790 return 0; 791 } 792 793 static const char * 794 parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp, 795 int opindex ATTRIBUTE_UNUSED, signed long *valuep) 796 { 797 const char *errmsg; 798 signed long value; 799 signed long junk; 800 const char *newp = *strp; 801 802 /* Parse r0[hl]. */ 803 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value); 804 if (errmsg) 805 return errmsg; 806 807 if (*newp != ',') 808 return _("not a valid r0l/r0h pair"); 809 ++newp; 810 811 /* Parse the second register in the pair. */ 812 if (value == 0) /* r0l */ 813 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk); 814 else 815 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk); 816 if (errmsg) 817 return errmsg; 818 819 *strp = newp; 820 *valuep = ! value; 821 return 0; 822 } 823 824 /* Accept .b or .w in any case. */ 825 826 static const char * 827 parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 828 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 829 { 830 if (**strp == '.' 831 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B' 832 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W')) 833 { 834 *strp += 2; 835 return NULL; 836 } 837 838 return _("Invalid size specifier"); 839 } 840 841 /* Special check to ensure that instruction exists for given machine. */ 842 843 int 844 m32c_cgen_insn_supported (CGEN_CPU_DESC cd, 845 const CGEN_INSN *insn) 846 { 847 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); 848 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); 849 850 /* If attributes are absent, assume no restriction. */ 851 if (machs == 0) 852 machs = ~0; 853 854 return ((machs & cd->machs) 855 && cgen_bitset_intersect_p (& isas, cd->isas)); 856 } 857 858 /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ 859 860 static const char * 861 parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 862 const char **strp, 863 int opindex ATTRIBUTE_UNUSED, 864 unsigned long *valuep, 865 int push) 866 { 867 const char *errmsg = 0; 868 int regno = 0; 869 870 *valuep = 0; 871 while (**strp && **strp != ')') 872 { 873 if (**strp == 'r' || **strp == 'R') 874 { 875 ++*strp; 876 regno = **strp - '0'; 877 if (regno > 4) 878 errmsg = _("Register number is not valid"); 879 } 880 else if (**strp == 'a' || **strp == 'A') 881 { 882 ++*strp; 883 regno = **strp - '0'; 884 if (regno > 2) 885 errmsg = _("Register number is not valid"); 886 regno = **strp - '0' + 4; 887 } 888 889 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0) 890 { 891 regno = 6; 892 ++*strp; 893 } 894 895 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0) 896 { 897 regno = 7; 898 ++*strp; 899 } 900 901 if (push) /* Mask is reversed for push. */ 902 *valuep |= 0x80 >> regno; 903 else 904 *valuep |= 1 << regno; 905 906 ++*strp; 907 if (**strp == ',') 908 { 909 if (*(*strp + 1) == ')') 910 break; 911 ++*strp; 912 } 913 } 914 915 if (!*strp) 916 errmsg = _("Register list is not valid"); 917 918 return errmsg; 919 } 920 921 #define POP 0 922 #define PUSH 1 923 924 static const char * 925 parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 926 const char **strp, 927 int opindex ATTRIBUTE_UNUSED, 928 unsigned long *valuep) 929 { 930 return parse_regset (cd, strp, opindex, valuep, POP); 931 } 932 933 static const char * 934 parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 935 const char **strp, 936 int opindex ATTRIBUTE_UNUSED, 937 unsigned long *valuep) 938 { 939 return parse_regset (cd, strp, opindex, valuep, PUSH); 940 } 941 942 /* -- dis.c */ 943 944 const char * m32c_cgen_parse_operand 945 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); 946 947 /* Main entry point for operand parsing. 948 949 This function is basically just a big switch statement. Earlier versions 950 used tables to look up the function to use, but 951 - if the table contains both assembler and disassembler functions then 952 the disassembler contains much of the assembler and vice-versa, 953 - there's a lot of inlining possibilities as things grow, 954 - using a switch statement avoids the function call overhead. 955 956 This function could be moved into `parse_insn_normal', but keeping it 957 separate makes clear the interface between `parse_insn_normal' and each of 958 the handlers. */ 959 960 const char * 961 m32c_cgen_parse_operand (CGEN_CPU_DESC cd, 962 int opindex, 963 const char ** strp, 964 CGEN_FIELDS * fields) 965 { 966 const char * errmsg = NULL; 967 /* Used by scalar operands that still need to be parsed. */ 968 long junk ATTRIBUTE_UNUSED; 969 970 switch (opindex) 971 { 972 case M32C_OPERAND_A0 : 973 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk); 974 break; 975 case M32C_OPERAND_A1 : 976 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk); 977 break; 978 case M32C_OPERAND_AN16_PUSH_S : 979 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1); 980 break; 981 case M32C_OPERAND_BIT16AN : 982 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 983 break; 984 case M32C_OPERAND_BIT16RN : 985 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 986 break; 987 case M32C_OPERAND_BIT3_S : 988 errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S)); 989 break; 990 case M32C_OPERAND_BIT32ANPREFIXED : 991 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 992 break; 993 case M32C_OPERAND_BIT32ANUNPREFIXED : 994 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 995 break; 996 case M32C_OPERAND_BIT32RNPREFIXED : 997 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 998 break; 999 case M32C_OPERAND_BIT32RNUNPREFIXED : 1000 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 1001 break; 1002 case M32C_OPERAND_BITBASE16_16_S8 : 1003 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8)); 1004 break; 1005 case M32C_OPERAND_BITBASE16_16_U16 : 1006 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1007 break; 1008 case M32C_OPERAND_BITBASE16_16_U8 : 1009 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1010 break; 1011 case M32C_OPERAND_BITBASE16_8_U11_S : 1012 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S)); 1013 break; 1014 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 1015 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed)); 1016 break; 1017 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 1018 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed)); 1019 break; 1020 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 1021 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed)); 1022 break; 1023 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 1024 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed)); 1025 break; 1026 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 1027 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed)); 1028 break; 1029 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 1030 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed)); 1031 break; 1032 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 1033 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed)); 1034 break; 1035 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 1036 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed)); 1037 break; 1038 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 1039 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed)); 1040 break; 1041 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 1042 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed)); 1043 break; 1044 case M32C_OPERAND_BITNO16R : 1045 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8)); 1046 break; 1047 case M32C_OPERAND_BITNO32PREFIXED : 1048 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed)); 1049 break; 1050 case M32C_OPERAND_BITNO32UNPREFIXED : 1051 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed)); 1052 break; 1053 case M32C_OPERAND_DSP_10_U6 : 1054 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6)); 1055 break; 1056 case M32C_OPERAND_DSP_16_S16 : 1057 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16)); 1058 break; 1059 case M32C_OPERAND_DSP_16_S8 : 1060 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8)); 1061 break; 1062 case M32C_OPERAND_DSP_16_U16 : 1063 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1064 break; 1065 case M32C_OPERAND_DSP_16_U20 : 1066 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24)); 1067 break; 1068 case M32C_OPERAND_DSP_16_U24 : 1069 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24)); 1070 break; 1071 case M32C_OPERAND_DSP_16_U8 : 1072 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1073 break; 1074 case M32C_OPERAND_DSP_24_S16 : 1075 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16)); 1076 break; 1077 case M32C_OPERAND_DSP_24_S8 : 1078 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8)); 1079 break; 1080 case M32C_OPERAND_DSP_24_U16 : 1081 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16)); 1082 break; 1083 case M32C_OPERAND_DSP_24_U20 : 1084 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24)); 1085 break; 1086 case M32C_OPERAND_DSP_24_U24 : 1087 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24)); 1088 break; 1089 case M32C_OPERAND_DSP_24_U8 : 1090 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8)); 1091 break; 1092 case M32C_OPERAND_DSP_32_S16 : 1093 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16)); 1094 break; 1095 case M32C_OPERAND_DSP_32_S8 : 1096 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8)); 1097 break; 1098 case M32C_OPERAND_DSP_32_U16 : 1099 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16)); 1100 break; 1101 case M32C_OPERAND_DSP_32_U20 : 1102 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24)); 1103 break; 1104 case M32C_OPERAND_DSP_32_U24 : 1105 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24)); 1106 break; 1107 case M32C_OPERAND_DSP_32_U8 : 1108 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8)); 1109 break; 1110 case M32C_OPERAND_DSP_40_S16 : 1111 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16)); 1112 break; 1113 case M32C_OPERAND_DSP_40_S8 : 1114 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8)); 1115 break; 1116 case M32C_OPERAND_DSP_40_U16 : 1117 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16)); 1118 break; 1119 case M32C_OPERAND_DSP_40_U20 : 1120 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20)); 1121 break; 1122 case M32C_OPERAND_DSP_40_U24 : 1123 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24)); 1124 break; 1125 case M32C_OPERAND_DSP_40_U8 : 1126 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8)); 1127 break; 1128 case M32C_OPERAND_DSP_48_S16 : 1129 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16)); 1130 break; 1131 case M32C_OPERAND_DSP_48_S8 : 1132 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8)); 1133 break; 1134 case M32C_OPERAND_DSP_48_U16 : 1135 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16)); 1136 break; 1137 case M32C_OPERAND_DSP_48_U20 : 1138 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20)); 1139 break; 1140 case M32C_OPERAND_DSP_48_U24 : 1141 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24)); 1142 break; 1143 case M32C_OPERAND_DSP_48_U8 : 1144 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8)); 1145 break; 1146 case M32C_OPERAND_DSP_8_S24 : 1147 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24)); 1148 break; 1149 case M32C_OPERAND_DSP_8_S8 : 1150 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8)); 1151 break; 1152 case M32C_OPERAND_DSP_8_U16 : 1153 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16)); 1154 break; 1155 case M32C_OPERAND_DSP_8_U24 : 1156 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24)); 1157 break; 1158 case M32C_OPERAND_DSP_8_U6 : 1159 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6)); 1160 break; 1161 case M32C_OPERAND_DSP_8_U8 : 1162 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8)); 1163 break; 1164 case M32C_OPERAND_DST16AN : 1165 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 1166 break; 1167 case M32C_OPERAND_DST16AN_S : 1168 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s); 1169 break; 1170 case M32C_OPERAND_DST16ANHI : 1171 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an); 1172 break; 1173 case M32C_OPERAND_DST16ANQI : 1174 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an); 1175 break; 1176 case M32C_OPERAND_DST16ANQI_S : 1177 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s); 1178 break; 1179 case M32C_OPERAND_DST16ANSI : 1180 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an); 1181 break; 1182 case M32C_OPERAND_DST16RNEXTQI : 1183 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext); 1184 break; 1185 case M32C_OPERAND_DST16RNHI : 1186 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 1187 break; 1188 case M32C_OPERAND_DST16RNQI : 1189 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn); 1190 break; 1191 case M32C_OPERAND_DST16RNQI_S : 1192 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s); 1193 break; 1194 case M32C_OPERAND_DST16RNSI : 1195 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn); 1196 break; 1197 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 1198 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1199 break; 1200 case M32C_OPERAND_DST32ANPREFIXED : 1201 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1202 break; 1203 case M32C_OPERAND_DST32ANPREFIXEDHI : 1204 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed); 1205 break; 1206 case M32C_OPERAND_DST32ANPREFIXEDQI : 1207 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed); 1208 break; 1209 case M32C_OPERAND_DST32ANPREFIXEDSI : 1210 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1211 break; 1212 case M32C_OPERAND_DST32ANUNPREFIXED : 1213 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1214 break; 1215 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 1216 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed); 1217 break; 1218 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 1219 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed); 1220 break; 1221 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 1222 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1223 break; 1224 case M32C_OPERAND_DST32R0HI_S : 1225 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1226 break; 1227 case M32C_OPERAND_DST32R0QI_S : 1228 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1229 break; 1230 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 1231 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed); 1232 break; 1233 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 1234 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed); 1235 break; 1236 case M32C_OPERAND_DST32RNPREFIXEDHI : 1237 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI); 1238 break; 1239 case M32C_OPERAND_DST32RNPREFIXEDQI : 1240 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 1241 break; 1242 case M32C_OPERAND_DST32RNPREFIXEDSI : 1243 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI); 1244 break; 1245 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 1246 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI); 1247 break; 1248 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 1249 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 1250 break; 1251 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 1252 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI); 1253 break; 1254 case M32C_OPERAND_G : 1255 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk)); 1256 break; 1257 case M32C_OPERAND_IMM_12_S4 : 1258 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4)); 1259 break; 1260 case M32C_OPERAND_IMM_12_S4N : 1261 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4)); 1262 break; 1263 case M32C_OPERAND_IMM_13_U3 : 1264 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3)); 1265 break; 1266 case M32C_OPERAND_IMM_16_HI : 1267 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16)); 1268 break; 1269 case M32C_OPERAND_IMM_16_QI : 1270 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8)); 1271 break; 1272 case M32C_OPERAND_IMM_16_SI : 1273 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32)); 1274 break; 1275 case M32C_OPERAND_IMM_20_S4 : 1276 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4)); 1277 break; 1278 case M32C_OPERAND_IMM_24_HI : 1279 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16)); 1280 break; 1281 case M32C_OPERAND_IMM_24_QI : 1282 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8)); 1283 break; 1284 case M32C_OPERAND_IMM_24_SI : 1285 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32)); 1286 break; 1287 case M32C_OPERAND_IMM_32_HI : 1288 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16)); 1289 break; 1290 case M32C_OPERAND_IMM_32_QI : 1291 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8)); 1292 break; 1293 case M32C_OPERAND_IMM_32_SI : 1294 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32)); 1295 break; 1296 case M32C_OPERAND_IMM_40_HI : 1297 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16)); 1298 break; 1299 case M32C_OPERAND_IMM_40_QI : 1300 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8)); 1301 break; 1302 case M32C_OPERAND_IMM_40_SI : 1303 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32)); 1304 break; 1305 case M32C_OPERAND_IMM_48_HI : 1306 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16)); 1307 break; 1308 case M32C_OPERAND_IMM_48_QI : 1309 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8)); 1310 break; 1311 case M32C_OPERAND_IMM_48_SI : 1312 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32)); 1313 break; 1314 case M32C_OPERAND_IMM_56_HI : 1315 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16)); 1316 break; 1317 case M32C_OPERAND_IMM_56_QI : 1318 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8)); 1319 break; 1320 case M32C_OPERAND_IMM_64_HI : 1321 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16)); 1322 break; 1323 case M32C_OPERAND_IMM_8_HI : 1324 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16)); 1325 break; 1326 case M32C_OPERAND_IMM_8_QI : 1327 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8)); 1328 break; 1329 case M32C_OPERAND_IMM_8_S4 : 1330 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4)); 1331 break; 1332 case M32C_OPERAND_IMM_8_S4N : 1333 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4)); 1334 break; 1335 case M32C_OPERAND_IMM_SH_12_S4 : 1336 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4); 1337 break; 1338 case M32C_OPERAND_IMM_SH_20_S4 : 1339 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4); 1340 break; 1341 case M32C_OPERAND_IMM_SH_8_S4 : 1342 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4); 1343 break; 1344 case M32C_OPERAND_IMM1_S : 1345 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S)); 1346 break; 1347 case M32C_OPERAND_IMM3_S : 1348 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S)); 1349 break; 1350 case M32C_OPERAND_LAB_16_8 : 1351 { 1352 bfd_vma value = 0; 1353 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value); 1354 fields->f_lab_16_8 = value; 1355 } 1356 break; 1357 case M32C_OPERAND_LAB_24_8 : 1358 { 1359 bfd_vma value = 0; 1360 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value); 1361 fields->f_lab_24_8 = value; 1362 } 1363 break; 1364 case M32C_OPERAND_LAB_32_8 : 1365 { 1366 bfd_vma value = 0; 1367 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value); 1368 fields->f_lab_32_8 = value; 1369 } 1370 break; 1371 case M32C_OPERAND_LAB_40_8 : 1372 { 1373 bfd_vma value = 0; 1374 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value); 1375 fields->f_lab_40_8 = value; 1376 } 1377 break; 1378 case M32C_OPERAND_LAB_5_3 : 1379 { 1380 bfd_vma value = 0; 1381 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value); 1382 fields->f_lab_5_3 = value; 1383 } 1384 break; 1385 case M32C_OPERAND_LAB_8_16 : 1386 { 1387 bfd_vma value = 0; 1388 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value); 1389 fields->f_lab_8_16 = value; 1390 } 1391 break; 1392 case M32C_OPERAND_LAB_8_24 : 1393 { 1394 bfd_vma value = 0; 1395 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value); 1396 fields->f_lab_8_24 = value; 1397 } 1398 break; 1399 case M32C_OPERAND_LAB_8_8 : 1400 { 1401 bfd_vma value = 0; 1402 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value); 1403 fields->f_lab_8_8 = value; 1404 } 1405 break; 1406 case M32C_OPERAND_LAB32_JMP_S : 1407 { 1408 bfd_vma value = 0; 1409 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value); 1410 fields->f_lab32_jmp_s = value; 1411 } 1412 break; 1413 case M32C_OPERAND_Q : 1414 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk)); 1415 break; 1416 case M32C_OPERAND_R0 : 1417 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1418 break; 1419 case M32C_OPERAND_R0H : 1420 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk); 1421 break; 1422 case M32C_OPERAND_R0L : 1423 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1424 break; 1425 case M32C_OPERAND_R1 : 1426 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk); 1427 break; 1428 case M32C_OPERAND_R1R2R0 : 1429 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk); 1430 break; 1431 case M32C_OPERAND_R2 : 1432 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk); 1433 break; 1434 case M32C_OPERAND_R2R0 : 1435 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk); 1436 break; 1437 case M32C_OPERAND_R3 : 1438 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk); 1439 break; 1440 case M32C_OPERAND_R3R1 : 1441 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk); 1442 break; 1443 case M32C_OPERAND_REGSETPOP : 1444 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8)); 1445 break; 1446 case M32C_OPERAND_REGSETPUSH : 1447 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8)); 1448 break; 1449 case M32C_OPERAND_RN16_PUSH_S : 1450 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1); 1451 break; 1452 case M32C_OPERAND_S : 1453 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk)); 1454 break; 1455 case M32C_OPERAND_SRC16AN : 1456 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an); 1457 break; 1458 case M32C_OPERAND_SRC16ANHI : 1459 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an); 1460 break; 1461 case M32C_OPERAND_SRC16ANQI : 1462 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an); 1463 break; 1464 case M32C_OPERAND_SRC16RNHI : 1465 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn); 1466 break; 1467 case M32C_OPERAND_SRC16RNQI : 1468 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn); 1469 break; 1470 case M32C_OPERAND_SRC32ANPREFIXED : 1471 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1472 break; 1473 case M32C_OPERAND_SRC32ANPREFIXEDHI : 1474 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed); 1475 break; 1476 case M32C_OPERAND_SRC32ANPREFIXEDQI : 1477 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed); 1478 break; 1479 case M32C_OPERAND_SRC32ANPREFIXEDSI : 1480 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1481 break; 1482 case M32C_OPERAND_SRC32ANUNPREFIXED : 1483 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1484 break; 1485 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 1486 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed); 1487 break; 1488 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 1489 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed); 1490 break; 1491 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 1492 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1493 break; 1494 case M32C_OPERAND_SRC32RNPREFIXEDHI : 1495 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI); 1496 break; 1497 case M32C_OPERAND_SRC32RNPREFIXEDQI : 1498 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI); 1499 break; 1500 case M32C_OPERAND_SRC32RNPREFIXEDSI : 1501 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI); 1502 break; 1503 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 1504 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI); 1505 break; 1506 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 1507 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI); 1508 break; 1509 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 1510 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI); 1511 break; 1512 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 1513 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1)); 1514 break; 1515 case M32C_OPERAND_X : 1516 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk)); 1517 break; 1518 case M32C_OPERAND_Z : 1519 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk)); 1520 break; 1521 case M32C_OPERAND_COND16_16 : 1522 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8); 1523 break; 1524 case M32C_OPERAND_COND16_24 : 1525 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8); 1526 break; 1527 case M32C_OPERAND_COND16_32 : 1528 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8); 1529 break; 1530 case M32C_OPERAND_COND16C : 1531 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16); 1532 break; 1533 case M32C_OPERAND_COND16J : 1534 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16); 1535 break; 1536 case M32C_OPERAND_COND16J5 : 1537 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5); 1538 break; 1539 case M32C_OPERAND_COND32 : 1540 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32); 1541 break; 1542 case M32C_OPERAND_COND32_16 : 1543 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8); 1544 break; 1545 case M32C_OPERAND_COND32_24 : 1546 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8); 1547 break; 1548 case M32C_OPERAND_COND32_32 : 1549 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8); 1550 break; 1551 case M32C_OPERAND_COND32_40 : 1552 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8); 1553 break; 1554 case M32C_OPERAND_COND32J : 1555 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j); 1556 break; 1557 case M32C_OPERAND_CR1_PREFIXED_32 : 1558 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3); 1559 break; 1560 case M32C_OPERAND_CR1_UNPREFIXED_32 : 1561 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3); 1562 break; 1563 case M32C_OPERAND_CR16 : 1564 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3); 1565 break; 1566 case M32C_OPERAND_CR2_32 : 1567 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3); 1568 break; 1569 case M32C_OPERAND_CR3_PREFIXED_32 : 1570 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3); 1571 break; 1572 case M32C_OPERAND_CR3_UNPREFIXED_32 : 1573 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3); 1574 break; 1575 case M32C_OPERAND_FLAGS16 : 1576 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3); 1577 break; 1578 case M32C_OPERAND_FLAGS32 : 1579 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3); 1580 break; 1581 case M32C_OPERAND_SCCOND32 : 1582 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16); 1583 break; 1584 case M32C_OPERAND_SIZE : 1585 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk)); 1586 break; 1587 1588 default : 1589 /* xgettext:c-format */ 1590 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); 1591 abort (); 1592 } 1593 1594 return errmsg; 1595 } 1596 1597 cgen_parse_fn * const m32c_cgen_parse_handlers[] = 1598 { 1599 parse_insn_normal, 1600 }; 1601 1602 void 1603 m32c_cgen_init_asm (CGEN_CPU_DESC cd) 1604 { 1605 m32c_cgen_init_opcode_table (cd); 1606 m32c_cgen_init_ibld_table (cd); 1607 cd->parse_handlers = & m32c_cgen_parse_handlers[0]; 1608 cd->parse_operand = m32c_cgen_parse_operand; 1609 #ifdef CGEN_ASM_INIT_HOOK 1610 CGEN_ASM_INIT_HOOK 1611 #endif 1612 } 1613 1614 1615 1617 /* Regex construction routine. 1618 1619 This translates an opcode syntax string into a regex string, 1620 by replacing any non-character syntax element (such as an 1621 opcode) with the pattern '.*' 1622 1623 It then compiles the regex and stores it in the opcode, for 1624 later use by m32c_cgen_assemble_insn 1625 1626 Returns NULL for success, an error message for failure. */ 1627 1628 char * 1629 m32c_cgen_build_insn_regex (CGEN_INSN *insn) 1630 { 1631 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 1632 const char *mnem = CGEN_INSN_MNEMONIC (insn); 1633 char rxbuf[CGEN_MAX_RX_ELEMENTS]; 1634 char *rx = rxbuf; 1635 const CGEN_SYNTAX_CHAR_TYPE *syn; 1636 int reg_err; 1637 1638 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 1639 1640 /* Mnemonics come first in the syntax string. */ 1641 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1642 return _("missing mnemonic in syntax string"); 1643 ++syn; 1644 1645 /* Generate a case sensitive regular expression that emulates case 1646 insensitive matching in the "C" locale. We cannot generate a case 1647 insensitive regular expression because in Turkish locales, 'i' and 'I' 1648 are not equal modulo case conversion. */ 1649 1650 /* Copy the literal mnemonic out of the insn. */ 1651 for (; *mnem; mnem++) 1652 { 1653 char c = *mnem; 1654 1655 if (ISALPHA (c)) 1656 { 1657 *rx++ = '['; 1658 *rx++ = TOLOWER (c); 1659 *rx++ = TOUPPER (c); 1660 *rx++ = ']'; 1661 } 1662 else 1663 *rx++ = c; 1664 } 1665 1666 /* Copy any remaining literals from the syntax string into the rx. */ 1667 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) 1668 { 1669 if (CGEN_SYNTAX_CHAR_P (* syn)) 1670 { 1671 char c = CGEN_SYNTAX_CHAR (* syn); 1672 1673 switch (c) 1674 { 1675 /* Escape any regex metacharacters in the syntax. */ 1676 case '.': case '[': case '\\': 1677 case '*': case '^': case '$': 1678 1679 #ifdef CGEN_ESCAPE_EXTENDED_REGEX 1680 case '?': case '{': case '}': 1681 case '(': case ')': case '*': 1682 case '|': case '+': case ']': 1683 #endif 1684 *rx++ = '\\'; 1685 *rx++ = c; 1686 break; 1687 1688 default: 1689 if (ISALPHA (c)) 1690 { 1691 *rx++ = '['; 1692 *rx++ = TOLOWER (c); 1693 *rx++ = TOUPPER (c); 1694 *rx++ = ']'; 1695 } 1696 else 1697 *rx++ = c; 1698 break; 1699 } 1700 } 1701 else 1702 { 1703 /* Replace non-syntax fields with globs. */ 1704 *rx++ = '.'; 1705 *rx++ = '*'; 1706 } 1707 } 1708 1709 /* Trailing whitespace ok. */ 1710 * rx++ = '['; 1711 * rx++ = ' '; 1712 * rx++ = '\t'; 1713 * rx++ = ']'; 1714 * rx++ = '*'; 1715 1716 /* But anchor it after that. */ 1717 * rx++ = '$'; 1718 * rx = '\0'; 1719 1720 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); 1721 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); 1722 1723 if (reg_err == 0) 1724 return NULL; 1725 else 1726 { 1727 static char msg[80]; 1728 1729 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); 1730 regfree ((regex_t *) CGEN_INSN_RX (insn)); 1731 free (CGEN_INSN_RX (insn)); 1732 (CGEN_INSN_RX (insn)) = NULL; 1733 return msg; 1734 } 1735 } 1736 1737 1738 /* Default insn parser. 1740 1741 The syntax string is scanned and operands are parsed and stored in FIELDS. 1742 Relocs are queued as we go via other callbacks. 1743 1744 ??? Note that this is currently an all-or-nothing parser. If we fail to 1745 parse the instruction, we return 0 and the caller will start over from 1746 the beginning. Backtracking will be necessary in parsing subexpressions, 1747 but that can be handled there. Not handling backtracking here may get 1748 expensive in the case of the m68k. Deal with later. 1749 1750 Returns NULL for success, an error message for failure. */ 1751 1752 static const char * 1753 parse_insn_normal (CGEN_CPU_DESC cd, 1754 const CGEN_INSN *insn, 1755 const char **strp, 1756 CGEN_FIELDS *fields) 1757 { 1758 /* ??? Runtime added insns not handled yet. */ 1759 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 1760 const char *str = *strp; 1761 const char *errmsg; 1762 const char *p; 1763 const CGEN_SYNTAX_CHAR_TYPE * syn; 1764 #ifdef CGEN_MNEMONIC_OPERANDS 1765 /* FIXME: wip */ 1766 int past_opcode_p; 1767 #endif 1768 1769 /* For now we assume the mnemonic is first (there are no leading operands). 1770 We can parse it without needing to set up operand parsing. 1771 GAS's input scrubber will ensure mnemonics are lowercase, but we may 1772 not be called from GAS. */ 1773 p = CGEN_INSN_MNEMONIC (insn); 1774 while (*p && TOLOWER (*p) == TOLOWER (*str)) 1775 ++p, ++str; 1776 1777 if (* p) 1778 return _("unrecognized instruction"); 1779 1780 #ifndef CGEN_MNEMONIC_OPERANDS 1781 if (* str && ! ISSPACE (* str)) 1782 return _("unrecognized instruction"); 1783 #endif 1784 1785 CGEN_INIT_PARSE (cd); 1786 cgen_init_parse_operand (cd); 1787 #ifdef CGEN_MNEMONIC_OPERANDS 1788 past_opcode_p = 0; 1789 #endif 1790 1791 /* We don't check for (*str != '\0') here because we want to parse 1792 any trailing fake arguments in the syntax string. */ 1793 syn = CGEN_SYNTAX_STRING (syntax); 1794 1795 /* Mnemonics come first for now, ensure valid string. */ 1796 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1797 abort (); 1798 1799 ++syn; 1800 1801 while (* syn != 0) 1802 { 1803 /* Non operand chars must match exactly. */ 1804 if (CGEN_SYNTAX_CHAR_P (* syn)) 1805 { 1806 /* FIXME: While we allow for non-GAS callers above, we assume the 1807 first char after the mnemonic part is a space. */ 1808 /* FIXME: We also take inappropriate advantage of the fact that 1809 GAS's input scrubber will remove extraneous blanks. */ 1810 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) 1811 { 1812 #ifdef CGEN_MNEMONIC_OPERANDS 1813 if (CGEN_SYNTAX_CHAR(* syn) == ' ') 1814 past_opcode_p = 1; 1815 #endif 1816 ++ syn; 1817 ++ str; 1818 } 1819 else if (*str) 1820 { 1821 /* Syntax char didn't match. Can't be this insn. */ 1822 static char msg [80]; 1823 1824 /* xgettext:c-format */ 1825 sprintf (msg, _("syntax error (expected char `%c', found `%c')"), 1826 CGEN_SYNTAX_CHAR(*syn), *str); 1827 return msg; 1828 } 1829 else 1830 { 1831 /* Ran out of input. */ 1832 static char msg [80]; 1833 1834 /* xgettext:c-format */ 1835 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), 1836 CGEN_SYNTAX_CHAR(*syn)); 1837 return msg; 1838 } 1839 continue; 1840 } 1841 1842 /* We have an operand of some sort. */ 1843 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), 1844 &str, fields); 1845 if (errmsg) 1846 return errmsg; 1847 1848 /* Done with this operand, continue with next one. */ 1849 ++ syn; 1850 } 1851 1852 /* If we're at the end of the syntax string, we're done. */ 1853 if (* syn == 0) 1854 { 1855 /* FIXME: For the moment we assume a valid `str' can only contain 1856 blanks now. IE: We needn't try again with a longer version of 1857 the insn and it is assumed that longer versions of insns appear 1858 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ 1859 while (ISSPACE (* str)) 1860 ++ str; 1861 1862 if (* str != '\0') 1863 return _("junk at end of line"); /* FIXME: would like to include `str' */ 1864 1865 return NULL; 1866 } 1867 1868 /* We couldn't parse it. */ 1869 return _("unrecognized instruction"); 1870 } 1871 1872 /* Main entry point. 1874 This routine is called for each instruction to be assembled. 1875 STR points to the insn to be assembled. 1876 We assume all necessary tables have been initialized. 1877 The assembled instruction, less any fixups, is stored in BUF. 1878 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value 1879 still needs to be converted to target byte order, otherwise BUF is an array 1880 of bytes in target byte order. 1881 The result is a pointer to the insn's entry in the opcode table, 1882 or NULL if an error occured (an error message will have already been 1883 printed). 1884 1885 Note that when processing (non-alias) macro-insns, 1886 this function recurses. 1887 1888 ??? It's possible to make this cpu-independent. 1889 One would have to deal with a few minor things. 1890 At this point in time doing so would be more of a curiosity than useful 1891 [for example this file isn't _that_ big], but keeping the possibility in 1892 mind helps keep the design clean. */ 1893 1894 const CGEN_INSN * 1895 m32c_cgen_assemble_insn (CGEN_CPU_DESC cd, 1896 const char *str, 1897 CGEN_FIELDS *fields, 1898 CGEN_INSN_BYTES_PTR buf, 1899 char **errmsg) 1900 { 1901 const char *start; 1902 CGEN_INSN_LIST *ilist; 1903 const char *parse_errmsg = NULL; 1904 const char *insert_errmsg = NULL; 1905 int recognized_mnemonic = 0; 1906 1907 /* Skip leading white space. */ 1908 while (ISSPACE (* str)) 1909 ++ str; 1910 1911 /* The instructions are stored in hashed lists. 1912 Get the first in the list. */ 1913 ilist = CGEN_ASM_LOOKUP_INSN (cd, str); 1914 1915 /* Keep looking until we find a match. */ 1916 start = str; 1917 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) 1918 { 1919 const CGEN_INSN *insn = ilist->insn; 1920 recognized_mnemonic = 1; 1921 1922 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 1923 /* Not usually needed as unsupported opcodes 1924 shouldn't be in the hash lists. */ 1925 /* Is this insn supported by the selected cpu? */ 1926 if (! m32c_cgen_insn_supported (cd, insn)) 1927 continue; 1928 #endif 1929 /* If the RELAXED attribute is set, this is an insn that shouldn't be 1930 chosen immediately. Instead, it is used during assembler/linker 1931 relaxation if possible. */ 1932 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) 1933 continue; 1934 1935 str = start; 1936 1937 /* Skip this insn if str doesn't look right lexically. */ 1938 if (CGEN_INSN_RX (insn) != NULL && 1939 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) 1940 continue; 1941 1942 /* Allow parse/insert handlers to obtain length of insn. */ 1943 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 1944 1945 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); 1946 if (parse_errmsg != NULL) 1947 continue; 1948 1949 /* ??? 0 is passed for `pc'. */ 1950 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, 1951 (bfd_vma) 0); 1952 if (insert_errmsg != NULL) 1953 continue; 1954 1955 /* It is up to the caller to actually output the insn and any 1956 queued relocs. */ 1957 return insn; 1958 } 1959 1960 { 1961 static char errbuf[150]; 1962 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS 1963 const char *tmp_errmsg; 1964 1965 /* If requesting verbose error messages, use insert_errmsg. 1966 Failing that, use parse_errmsg. */ 1967 tmp_errmsg = (insert_errmsg ? insert_errmsg : 1968 parse_errmsg ? parse_errmsg : 1969 recognized_mnemonic ? 1970 _("unrecognized form of instruction") : 1971 _("unrecognized instruction")); 1972 1973 if (strlen (start) > 50) 1974 /* xgettext:c-format */ 1975 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); 1976 else 1977 /* xgettext:c-format */ 1978 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); 1979 #else 1980 if (strlen (start) > 50) 1981 /* xgettext:c-format */ 1982 sprintf (errbuf, _("bad instruction `%.50s...'"), start); 1983 else 1984 /* xgettext:c-format */ 1985 sprintf (errbuf, _("bad instruction `%.50s'"), start); 1986 #endif 1987 1988 *errmsg = errbuf; 1989 return NULL; 1990 } 1991 } 1992
Indexes created Tue Mar 03 05:31:39 UTC 2026