1 1.8 mrg /* Copyright (C) 2015-2022 Free Software Foundation, Inc. 2 1.1 mrg Contributed by ARM Ltd. 3 1.1 mrg 4 1.1 mrg This file is part of GCC. 5 1.1 mrg 6 1.1 mrg GCC is free software; you can redistribute it and/or modify it 7 1.1 mrg under the terms of the GNU General Public License as published 8 1.1 mrg by the Free Software Foundation; either version 3, or (at your 9 1.1 mrg option) any later version. 10 1.1 mrg 11 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT 12 1.1 mrg ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 1.1 mrg or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 1.1 mrg License for more details. 15 1.1 mrg 16 1.1 mrg You should have received a copy of the GNU General Public License 17 1.1 mrg along with GCC; see the file COPYING3. If not see 18 1.1 mrg <http://www.gnu.org/licenses/>. */ 19 1.1 mrg 20 1.1 mrg /* Pairs of instructions which can be fused. before including this file, 21 1.1 mrg define a macro: 22 1.1 mrg 23 1.1 mrg AARCH64_FUSION_PAIR (name, internal_name) 24 1.1 mrg 25 1.1 mrg Where: 26 1.1 mrg 27 1.1 mrg NAME is a string giving a friendly name for the instructions to fuse. 28 1.1 mrg INTERNAL_NAME gives the internal name suitable for appending to 29 1.1 mrg AARCH64_FUSE_ to give an enum name. */ 30 1.1 mrg 31 1.1 mrg AARCH64_FUSION_PAIR ("mov+movk", MOV_MOVK) 32 1.1 mrg AARCH64_FUSION_PAIR ("adrp+add", ADRP_ADD) 33 1.1 mrg AARCH64_FUSION_PAIR ("movk+movk", MOVK_MOVK) 34 1.1 mrg AARCH64_FUSION_PAIR ("adrp+ldr", ADRP_LDR) 35 1.1 mrg AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH) 36 1.1 mrg AARCH64_FUSION_PAIR ("aes+aesmc", AES_AESMC) 37 1.4 mrg AARCH64_FUSION_PAIR ("alu+branch", ALU_BRANCH) 38 1.6 mrg AARCH64_FUSION_PAIR ("alu+cbz", ALU_CBZ) 39 1.7 mrg AARCH64_FUSION_PAIR ("addsub_2reg_const1", ADDSUB_2REG_CONST1) 40 1.1 mrg 41 1.3 mrg #undef AARCH64_FUSION_PAIR 42
Indexes created Tue Aug 11 00:25:38 UTC 2026