alpha.md revision 1.1.1.1.8.2
1 1.1.1.1.8.2 tls ;; Machine description for DEC Alpha for GNU C compiler 2 1.1.1.1.8.2 tls ;; Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 1.1.1.1.8.2 tls ;; 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 4 1.1.1.1.8.2 tls ;; Free Software Foundation, Inc. 5 1.1.1.1.8.2 tls ;; Contributed by Richard Kenner (kenner (a] vlsi1.ultra.nyu.edu) 6 1.1.1.1.8.2 tls ;; 7 1.1.1.1.8.2 tls ;; This file is part of GCC. 8 1.1.1.1.8.2 tls ;; 9 1.1.1.1.8.2 tls ;; GCC is free software; you can redistribute it and/or modify 10 1.1.1.1.8.2 tls ;; it under the terms of the GNU General Public License as published by 11 1.1.1.1.8.2 tls ;; the Free Software Foundation; either version 3, or (at your option) 12 1.1.1.1.8.2 tls ;; any later version. 13 1.1.1.1.8.2 tls ;; 14 1.1.1.1.8.2 tls ;; GCC is distributed in the hope that it will be useful, 15 1.1.1.1.8.2 tls ;; but WITHOUT ANY WARRANTY; without even the implied warranty of 16 1.1.1.1.8.2 tls ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 1.1.1.1.8.2 tls ;; GNU General Public License for more details. 18 1.1.1.1.8.2 tls ;; 19 1.1.1.1.8.2 tls ;; You should have received a copy of the GNU General Public License 20 1.1.1.1.8.2 tls ;; along with GCC; see the file COPYING3. If not see 21 1.1.1.1.8.2 tls ;; <http://www.gnu.org/licenses/>. 22 1.1.1.1.8.2 tls 23 1.1.1.1.8.2 tls ;;- See file "rtl.def" for documentation on define_insn, match_*, et. al. 24 1.1.1.1.8.2 tls 25 1.1.1.1.8.2 tls ;; Uses of UNSPEC in this file: 26 1.1.1.1.8.2 tls 27 1.1.1.1.8.2 tls (define_constants 28 1.1.1.1.8.2 tls [(UNSPEC_ARG_HOME 0) 29 1.1.1.1.8.2 tls (UNSPEC_LDGP1 1) 30 1.1.1.1.8.2 tls (UNSPEC_INSXH 2) 31 1.1.1.1.8.2 tls (UNSPEC_MSKXH 3) 32 1.1.1.1.8.2 tls (UNSPEC_CVTQL 4) 33 1.1.1.1.8.2 tls (UNSPEC_CVTLQ 5) 34 1.1.1.1.8.2 tls (UNSPEC_UMK_LAUM 6) 35 1.1.1.1.8.2 tls (UNSPEC_UMK_LALM 7) 36 1.1.1.1.8.2 tls (UNSPEC_UMK_LAL 8) 37 1.1.1.1.8.2 tls (UNSPEC_UMK_LOAD_CIW 9) 38 1.1.1.1.8.2 tls (UNSPEC_LDGP2 10) 39 1.1.1.1.8.2 tls (UNSPEC_LITERAL 11) 40 1.1.1.1.8.2 tls (UNSPEC_LITUSE 12) 41 1.1.1.1.8.2 tls (UNSPEC_SIBCALL 13) 42 1.1.1.1.8.2 tls (UNSPEC_SYMBOL 14) 43 1.1.1.1.8.2 tls 44 1.1.1.1.8.2 tls ;; TLS Support 45 1.1.1.1.8.2 tls (UNSPEC_TLSGD_CALL 15) 46 1.1.1.1.8.2 tls (UNSPEC_TLSLDM_CALL 16) 47 1.1.1.1.8.2 tls (UNSPEC_TLSGD 17) 48 1.1.1.1.8.2 tls (UNSPEC_TLSLDM 18) 49 1.1.1.1.8.2 tls (UNSPEC_DTPREL 19) 50 1.1.1.1.8.2 tls (UNSPEC_TPREL 20) 51 1.1.1.1.8.2 tls (UNSPEC_TP 21) 52 1.1.1.1.8.2 tls 53 1.1.1.1.8.2 tls ;; Builtins 54 1.1.1.1.8.2 tls (UNSPEC_CMPBGE 22) 55 1.1.1.1.8.2 tls (UNSPEC_ZAP 23) 56 1.1.1.1.8.2 tls (UNSPEC_AMASK 24) 57 1.1.1.1.8.2 tls (UNSPEC_IMPLVER 25) 58 1.1.1.1.8.2 tls (UNSPEC_PERR 26) 59 1.1.1.1.8.2 tls (UNSPEC_COPYSIGN 27) 60 1.1.1.1.8.2 tls 61 1.1.1.1.8.2 tls ;; Atomic operations 62 1.1.1.1.8.2 tls (UNSPEC_MB 28) 63 1.1.1.1.8.2 tls (UNSPEC_ATOMIC 31) 64 1.1.1.1.8.2 tls (UNSPEC_CMPXCHG 32) 65 1.1.1.1.8.2 tls (UNSPEC_XCHG 33) 66 1.1.1.1.8.2 tls ]) 67 1.1.1.1.8.2 tls 68 1.1.1.1.8.2 tls ;; UNSPEC_VOLATILE: 69 1.1.1.1.8.2 tls 70 1.1.1.1.8.2 tls (define_constants 71 1.1.1.1.8.2 tls [(UNSPECV_IMB 0) 72 1.1.1.1.8.2 tls (UNSPECV_BLOCKAGE 1) 73 1.1.1.1.8.2 tls (UNSPECV_SETJMPR 2) ; builtin_setjmp_receiver 74 1.1.1.1.8.2 tls (UNSPECV_LONGJMP 3) ; builtin_longjmp 75 1.1.1.1.8.2 tls (UNSPECV_TRAPB 4) 76 1.1.1.1.8.2 tls (UNSPECV_PSPL 5) ; prologue_stack_probe_loop 77 1.1.1.1.8.2 tls (UNSPECV_REALIGN 6) 78 1.1.1.1.8.2 tls (UNSPECV_EHR 7) ; exception_receiver 79 1.1.1.1.8.2 tls (UNSPECV_MCOUNT 8) 80 1.1.1.1.8.2 tls (UNSPECV_FORCE_MOV 9) 81 1.1.1.1.8.2 tls (UNSPECV_LDGP1 10) 82 1.1.1.1.8.2 tls (UNSPECV_PLDGP2 11) ; prologue ldgp 83 1.1.1.1.8.2 tls (UNSPECV_SET_TP 12) 84 1.1.1.1.8.2 tls (UNSPECV_RPCC 13) 85 1.1.1.1.8.2 tls (UNSPECV_SETJMPR_ER 14) ; builtin_setjmp_receiver fragment 86 1.1.1.1.8.2 tls (UNSPECV_LL 15) ; load-locked 87 1.1.1.1.8.2 tls (UNSPECV_SC 16) ; store-conditional 88 1.1.1.1.8.2 tls ]) 89 1.1.1.1.8.2 tls 90 1.1.1.1.8.2 tls ;; On non-BWX targets, CQImode must be handled the similarly to HImode 91 1.1.1.1.8.2 tls ;; when generating reloads. 92 1.1.1.1.8.2 tls (define_mode_iterator RELOAD12 [QI HI CQI]) 93 1.1.1.1.8.2 tls (define_mode_attr reloadmode [(QI "qi") (HI "hi") (CQI "hi")]) 94 1.1.1.1.8.2 tls 95 1.1.1.1.8.2 tls ;; Other mode iterators 96 1.1.1.1.8.2 tls (define_mode_iterator I12MODE [QI HI]) 97 1.1.1.1.8.2 tls (define_mode_iterator I48MODE [SI DI]) 98 1.1.1.1.8.2 tls (define_mode_attr modesuffix [(SI "l") (DI "q")]) 99 1.1.1.1.8.2 tls 100 1.1.1.1.8.2 tls ;; Where necessary, the suffixes _le and _be are used to distinguish between 101 1.1.1.1.8.2 tls ;; little-endian and big-endian patterns. 102 1.1.1.1.8.2 tls ;; 103 1.1.1.1.8.2 tls ;; Note that the Unicos/Mk assembler does not support the following 104 1.1.1.1.8.2 tls ;; opcodes: mov, fmov, nop, fnop, unop. 105 1.1.1.1.8.2 tls 107 1.1.1.1.8.2 tls ;; Processor type -- this attribute must exactly match the processor_type 108 1.1.1.1.8.2 tls ;; enumeration in alpha.h. 109 1.1.1.1.8.2 tls 110 1.1.1.1.8.2 tls (define_attr "tune" "ev4,ev5,ev6" 111 1.1.1.1.8.2 tls (const (symbol_ref "((enum attr_tune) alpha_tune)"))) 112 1.1.1.1.8.2 tls 113 1.1.1.1.8.2 tls ;; Define an insn type attribute. This is used in function unit delay 114 1.1.1.1.8.2 tls ;; computations, among other purposes. For the most part, we use the names 115 1.1.1.1.8.2 tls ;; defined in the EV4 documentation, but add a few that we have to know about 116 1.1.1.1.8.2 tls ;; separately. 117 1.1.1.1.8.2 tls 118 1.1.1.1.8.2 tls (define_attr "type" 119 1.1.1.1.8.2 tls "ild,fld,ldsym,ist,fst,ibr,callpal,fbr,jsr,iadd,ilog,shift,icmov,fcmov, 120 1.1.1.1.8.2 tls icmp,imul,fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,mb,ld_l,st_c, 121 1.1.1.1.8.2 tls multi,none" 122 1.1.1.1.8.2 tls (const_string "iadd")) 123 1.1.1.1.8.2 tls 124 1.1.1.1.8.2 tls ;; Describe a user's asm statement. 125 1.1.1.1.8.2 tls (define_asm_attributes 126 1.1.1.1.8.2 tls [(set_attr "type" "multi")]) 127 1.1.1.1.8.2 tls 128 1.1.1.1.8.2 tls ;; Define the operand size an insn operates on. Used primarily by mul 129 1.1.1.1.8.2 tls ;; and div operations that have size dependent timings. 130 1.1.1.1.8.2 tls 131 1.1.1.1.8.2 tls (define_attr "opsize" "si,di,udi" 132 1.1.1.1.8.2 tls (const_string "di")) 133 1.1.1.1.8.2 tls 134 1.1.1.1.8.2 tls ;; The TRAP attribute marks instructions that may generate traps 135 1.1.1.1.8.2 tls ;; (which are imprecise and may need a trapb if software completion 136 1.1.1.1.8.2 tls ;; is desired). 137 1.1.1.1.8.2 tls 138 1.1.1.1.8.2 tls (define_attr "trap" "no,yes" 139 1.1.1.1.8.2 tls (const_string "no")) 140 1.1.1.1.8.2 tls 141 1.1.1.1.8.2 tls ;; The ROUND_SUFFIX attribute marks which instructions require a 142 1.1.1.1.8.2 tls ;; rounding-mode suffix. The value NONE indicates no suffix, 143 1.1.1.1.8.2 tls ;; the value NORMAL indicates a suffix controlled by alpha_fprm. 144 1.1.1.1.8.2 tls 145 1.1.1.1.8.2 tls (define_attr "round_suffix" "none,normal,c" 146 1.1.1.1.8.2 tls (const_string "none")) 147 1.1.1.1.8.2 tls 148 1.1.1.1.8.2 tls ;; The TRAP_SUFFIX attribute marks instructions requiring a trap-mode suffix: 149 1.1.1.1.8.2 tls ;; NONE no suffix 150 1.1.1.1.8.2 tls ;; SU accepts only /su (cmpt et al) 151 1.1.1.1.8.2 tls ;; SUI accepts only /sui (cvtqt and cvtqs) 152 1.1.1.1.8.2 tls ;; V_SV accepts /v and /sv (cvtql only) 153 1.1.1.1.8.2 tls ;; V_SV_SVI accepts /v, /sv and /svi (cvttq only) 154 1.1.1.1.8.2 tls ;; U_SU_SUI accepts /u, /su and /sui (most fp instructions) 155 1.1.1.1.8.2 tls ;; 156 1.1.1.1.8.2 tls ;; The actual suffix emitted is controlled by alpha_fptm. 157 1.1.1.1.8.2 tls 158 1.1.1.1.8.2 tls (define_attr "trap_suffix" "none,su,sui,v_sv,v_sv_svi,u_su_sui" 159 1.1.1.1.8.2 tls (const_string "none")) 160 1.1.1.1.8.2 tls 161 1.1.1.1.8.2 tls ;; The length of an instruction sequence in bytes. 162 1.1.1.1.8.2 tls 163 1.1.1.1.8.2 tls (define_attr "length" "" 164 1.1.1.1.8.2 tls (const_int 4)) 165 1.1.1.1.8.2 tls 166 1.1.1.1.8.2 tls ;; The USEGP attribute marks instructions that have relocations that use 167 1.1.1.1.8.2 tls ;; the GP. 168 1.1.1.1.8.2 tls 169 1.1.1.1.8.2 tls (define_attr "usegp" "no,yes" 170 1.1.1.1.8.2 tls (cond [(eq_attr "type" "ldsym,jsr") 171 1.1.1.1.8.2 tls (const_string "yes") 172 1.1.1.1.8.2 tls (eq_attr "type" "ild,fld,ist,fst") 173 1.1.1.1.8.2 tls (symbol_ref "((enum attr_usegp) alpha_find_lo_sum_using_gp (insn))") 174 1.1.1.1.8.2 tls ] 175 1.1.1.1.8.2 tls (const_string "no"))) 176 1.1.1.1.8.2 tls 177 1.1.1.1.8.2 tls ;; The CANNOT_COPY attribute marks instructions with relocations that 178 1.1.1.1.8.2 tls ;; cannot easily be duplicated. This includes insns with gpdisp relocs 179 1.1.1.1.8.2 tls ;; since they have to stay in 1-1 correspondence with one another. This 180 1.1.1.1.8.2 tls ;; also includes jsr insns, since they must stay in correspondence with 181 1.1.1.1.8.2 tls ;; the immediately following gpdisp instructions. 182 1.1.1.1.8.2 tls 183 1.1.1.1.8.2 tls (define_attr "cannot_copy" "false,true" 184 1.1.1.1.8.2 tls (const_string "false")) 185 1.1.1.1.8.2 tls 187 1.1.1.1.8.2 tls ;; Include scheduling descriptions. 188 1.1.1.1.8.2 tls 189 1.1.1.1.8.2 tls (include "ev4.md") 190 1.1.1.1.8.2 tls (include "ev5.md") 191 1.1.1.1.8.2 tls (include "ev6.md") 192 1.1.1.1.8.2 tls 193 1.1.1.1.8.2 tls 195 1.1.1.1.8.2 tls ;; Operand and operator predicates and constraints 196 1.1.1.1.8.2 tls 197 1.1.1.1.8.2 tls (include "predicates.md") 198 1.1.1.1.8.2 tls (include "constraints.md") 199 1.1.1.1.8.2 tls 200 1.1.1.1.8.2 tls 202 1.1.1.1.8.2 tls ;; First define the arithmetic insns. Note that the 32-bit forms also 203 1.1.1.1.8.2 tls ;; sign-extend. 204 1.1.1.1.8.2 tls 205 1.1.1.1.8.2 tls ;; Handle 32-64 bit extension from memory to a floating point register 206 1.1.1.1.8.2 tls ;; specially, since this occurs frequently in int->double conversions. 207 1.1.1.1.8.2 tls ;; 208 1.1.1.1.8.2 tls ;; Note that while we must retain the =f case in the insn for reload's 209 1.1.1.1.8.2 tls ;; benefit, it should be eliminated after reload, so we should never emit 210 1.1.1.1.8.2 tls ;; code for that case. But we don't reject the possibility. 211 1.1.1.1.8.2 tls 212 1.1.1.1.8.2 tls (define_expand "extendsidi2" 213 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 214 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "")))] 215 1.1.1.1.8.2 tls "" 216 1.1.1.1.8.2 tls "") 217 1.1.1.1.8.2 tls 218 1.1.1.1.8.2 tls (define_insn "*cvtlq" 219 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=f") 220 1.1.1.1.8.2 tls (unspec:DI [(match_operand:SF 1 "reg_or_0_operand" "fG")] 221 1.1.1.1.8.2 tls UNSPEC_CVTLQ))] 222 1.1.1.1.8.2 tls "" 223 1.1.1.1.8.2 tls "cvtlq %1,%0" 224 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 225 1.1.1.1.8.2 tls 226 1.1.1.1.8.2 tls (define_insn "*extendsidi2_1" 227 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r,!*f") 228 1.1.1.1.8.2 tls (sign_extend:DI 229 1.1.1.1.8.2 tls (match_operand:SI 1 "nonimmediate_operand" "r,m,m")))] 230 1.1.1.1.8.2 tls "" 231 1.1.1.1.8.2 tls "@ 232 1.1.1.1.8.2 tls addl $31,%1,%0 233 1.1.1.1.8.2 tls ldl %0,%1 234 1.1.1.1.8.2 tls lds %0,%1\;cvtlq %0,%0" 235 1.1.1.1.8.2 tls [(set_attr "type" "iadd,ild,fld") 236 1.1.1.1.8.2 tls (set_attr "length" "*,*,8")]) 237 1.1.1.1.8.2 tls 238 1.1.1.1.8.2 tls (define_split 239 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "hard_fp_register_operand" "") 240 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 1 "memory_operand" "")))] 241 1.1.1.1.8.2 tls "reload_completed" 242 1.1.1.1.8.2 tls [(set (match_dup 2) (match_dup 1)) 243 1.1.1.1.8.2 tls (set (match_dup 0) (unspec:DI [(match_dup 2)] UNSPEC_CVTLQ))] 244 1.1.1.1.8.2 tls { 245 1.1.1.1.8.2 tls operands[1] = adjust_address (operands[1], SFmode, 0); 246 1.1.1.1.8.2 tls operands[2] = gen_rtx_REG (SFmode, REGNO (operands[0])); 247 1.1.1.1.8.2 tls }) 248 1.1.1.1.8.2 tls 249 1.1.1.1.8.2 tls ;; Optimize sign-extension of SImode loads. This shows up in the wake of 250 1.1.1.1.8.2 tls ;; reload when converting fp->int. 251 1.1.1.1.8.2 tls 252 1.1.1.1.8.2 tls (define_peephole2 253 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "hard_int_register_operand" "") 254 1.1.1.1.8.2 tls (match_operand:SI 1 "memory_operand" "")) 255 1.1.1.1.8.2 tls (set (match_operand:DI 2 "hard_int_register_operand" "") 256 1.1.1.1.8.2 tls (sign_extend:DI (match_dup 0)))] 257 1.1.1.1.8.2 tls "true_regnum (operands[0]) == true_regnum (operands[2]) 258 1.1.1.1.8.2 tls || peep2_reg_dead_p (2, operands[0])" 259 1.1.1.1.8.2 tls [(set (match_dup 2) 260 1.1.1.1.8.2 tls (sign_extend:DI (match_dup 1)))] 261 1.1.1.1.8.2 tls "") 262 1.1.1.1.8.2 tls 263 1.1.1.1.8.2 tls (define_insn "addsi3" 264 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") 265 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ,rJ,rJ") 266 1.1.1.1.8.2 tls (match_operand:SI 2 "add_operand" "rI,O,K,L")))] 267 1.1.1.1.8.2 tls "" 268 1.1.1.1.8.2 tls "@ 269 1.1.1.1.8.2 tls addl %r1,%2,%0 270 1.1.1.1.8.2 tls subl %r1,%n2,%0 271 1.1.1.1.8.2 tls lda %0,%2(%r1) 272 1.1.1.1.8.2 tls ldah %0,%h2(%r1)") 273 1.1.1.1.8.2 tls 274 1.1.1.1.8.2 tls (define_split 275 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "") 276 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "register_operand" "") 277 1.1.1.1.8.2 tls (match_operand:SI 2 "const_int_operand" "")))] 278 1.1.1.1.8.2 tls "! add_operand (operands[2], SImode)" 279 1.1.1.1.8.2 tls [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 3))) 280 1.1.1.1.8.2 tls (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))] 281 1.1.1.1.8.2 tls { 282 1.1.1.1.8.2 tls HOST_WIDE_INT val = INTVAL (operands[2]); 283 1.1.1.1.8.2 tls HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000); 284 1.1.1.1.8.2 tls HOST_WIDE_INT rest = val - low; 285 1.1.1.1.8.2 tls 286 1.1.1.1.8.2 tls operands[3] = GEN_INT (rest); 287 1.1.1.1.8.2 tls operands[4] = GEN_INT (low); 288 1.1.1.1.8.2 tls }) 289 1.1.1.1.8.2 tls 290 1.1.1.1.8.2 tls (define_insn "*addsi_se" 291 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 292 1.1.1.1.8.2 tls (sign_extend:DI 293 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ") 294 1.1.1.1.8.2 tls (match_operand:SI 2 "sext_add_operand" "rI,O"))))] 295 1.1.1.1.8.2 tls "" 296 1.1.1.1.8.2 tls "@ 297 1.1.1.1.8.2 tls addl %r1,%2,%0 298 1.1.1.1.8.2 tls subl %r1,%n2,%0") 299 1.1.1.1.8.2 tls 300 1.1.1.1.8.2 tls (define_insn "*addsi_se2" 301 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 302 1.1.1.1.8.2 tls (sign_extend:DI 303 1.1.1.1.8.2 tls (subreg:SI (plus:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ,rJ") 304 1.1.1.1.8.2 tls (match_operand:DI 2 "sext_add_operand" "rI,O")) 305 1.1.1.1.8.2 tls 0)))] 306 1.1.1.1.8.2 tls "" 307 1.1.1.1.8.2 tls "@ 308 1.1.1.1.8.2 tls addl %r1,%2,%0 309 1.1.1.1.8.2 tls subl %r1,%n2,%0") 310 1.1.1.1.8.2 tls 311 1.1.1.1.8.2 tls (define_split 312 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 313 1.1.1.1.8.2 tls (sign_extend:DI 314 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "reg_not_elim_operand" "") 315 1.1.1.1.8.2 tls (match_operand:SI 2 "const_int_operand" "")))) 316 1.1.1.1.8.2 tls (clobber (match_operand:SI 3 "reg_not_elim_operand" ""))] 317 1.1.1.1.8.2 tls "! sext_add_operand (operands[2], SImode) && INTVAL (operands[2]) > 0 318 1.1.1.1.8.2 tls && INTVAL (operands[2]) % 4 == 0" 319 1.1.1.1.8.2 tls [(set (match_dup 3) (match_dup 4)) 320 1.1.1.1.8.2 tls (set (match_dup 0) (sign_extend:DI (plus:SI (mult:SI (match_dup 3) 321 1.1.1.1.8.2 tls (match_dup 5)) 322 1.1.1.1.8.2 tls (match_dup 1))))] 323 1.1.1.1.8.2 tls { 324 1.1.1.1.8.2 tls HOST_WIDE_INT val = INTVAL (operands[2]) / 4; 325 1.1.1.1.8.2 tls int mult = 4; 326 1.1.1.1.8.2 tls 327 1.1.1.1.8.2 tls if (val % 2 == 0) 328 1.1.1.1.8.2 tls val /= 2, mult = 8; 329 1.1.1.1.8.2 tls 330 1.1.1.1.8.2 tls operands[4] = GEN_INT (val); 331 1.1.1.1.8.2 tls operands[5] = GEN_INT (mult); 332 1.1.1.1.8.2 tls }) 333 1.1.1.1.8.2 tls 334 1.1.1.1.8.2 tls (define_split 335 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 336 1.1.1.1.8.2 tls (sign_extend:DI 337 1.1.1.1.8.2 tls (plus:SI (match_operator:SI 1 "comparison_operator" 338 1.1.1.1.8.2 tls [(match_operand 2 "" "") 339 1.1.1.1.8.2 tls (match_operand 3 "" "")]) 340 1.1.1.1.8.2 tls (match_operand:SI 4 "add_operand" "")))) 341 1.1.1.1.8.2 tls (clobber (match_operand:DI 5 "register_operand" ""))] 342 1.1.1.1.8.2 tls "" 343 1.1.1.1.8.2 tls [(set (match_dup 5) (match_dup 6)) 344 1.1.1.1.8.2 tls (set (match_dup 0) (sign_extend:DI (plus:SI (match_dup 7) (match_dup 4))))] 345 1.1.1.1.8.2 tls { 346 1.1.1.1.8.2 tls operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[1]), DImode, 347 1.1.1.1.8.2 tls operands[2], operands[3]); 348 1.1.1.1.8.2 tls operands[7] = gen_lowpart (SImode, operands[5]); 349 1.1.1.1.8.2 tls }) 350 1.1.1.1.8.2 tls 351 1.1.1.1.8.2 tls (define_insn "addvsi3" 352 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 353 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ") 354 1.1.1.1.8.2 tls (match_operand:SI 2 "sext_add_operand" "rI,O"))) 355 1.1.1.1.8.2 tls (trap_if (ne (plus:DI (sign_extend:DI (match_dup 1)) 356 1.1.1.1.8.2 tls (sign_extend:DI (match_dup 2))) 357 1.1.1.1.8.2 tls (sign_extend:DI (plus:SI (match_dup 1) 358 1.1.1.1.8.2 tls (match_dup 2)))) 359 1.1.1.1.8.2 tls (const_int 0))] 360 1.1.1.1.8.2 tls "" 361 1.1.1.1.8.2 tls "@ 362 1.1.1.1.8.2 tls addlv %r1,%2,%0 363 1.1.1.1.8.2 tls sublv %r1,%n2,%0") 364 1.1.1.1.8.2 tls 365 1.1.1.1.8.2 tls (define_expand "adddi3" 366 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 367 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "") 368 1.1.1.1.8.2 tls (match_operand:DI 2 "add_operand" "")))] 369 1.1.1.1.8.2 tls "" 370 1.1.1.1.8.2 tls "") 371 1.1.1.1.8.2 tls 372 1.1.1.1.8.2 tls (define_insn "*adddi_er_lo16_dtp" 373 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 374 1.1.1.1.8.2 tls (lo_sum:DI (match_operand:DI 1 "register_operand" "r") 375 1.1.1.1.8.2 tls (match_operand:DI 2 "dtp16_symbolic_operand" "")))] 376 1.1.1.1.8.2 tls "HAVE_AS_TLS" 377 1.1.1.1.8.2 tls "lda %0,%2(%1)\t\t!dtprel") 378 1.1.1.1.8.2 tls 379 1.1.1.1.8.2 tls (define_insn "*adddi_er_hi32_dtp" 380 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 381 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "r") 382 1.1.1.1.8.2 tls (high:DI (match_operand:DI 2 "dtp32_symbolic_operand" ""))))] 383 1.1.1.1.8.2 tls "HAVE_AS_TLS" 384 1.1.1.1.8.2 tls "ldah %0,%2(%1)\t\t!dtprelhi") 385 1.1.1.1.8.2 tls 386 1.1.1.1.8.2 tls (define_insn "*adddi_er_lo32_dtp" 387 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 388 1.1.1.1.8.2 tls (lo_sum:DI (match_operand:DI 1 "register_operand" "r") 389 1.1.1.1.8.2 tls (match_operand:DI 2 "dtp32_symbolic_operand" "")))] 390 1.1.1.1.8.2 tls "HAVE_AS_TLS" 391 1.1.1.1.8.2 tls "lda %0,%2(%1)\t\t!dtprello") 392 1.1.1.1.8.2 tls 393 1.1.1.1.8.2 tls (define_insn "*adddi_er_lo16_tp" 394 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 395 1.1.1.1.8.2 tls (lo_sum:DI (match_operand:DI 1 "register_operand" "r") 396 1.1.1.1.8.2 tls (match_operand:DI 2 "tp16_symbolic_operand" "")))] 397 1.1.1.1.8.2 tls "HAVE_AS_TLS" 398 1.1.1.1.8.2 tls "lda %0,%2(%1)\t\t!tprel") 399 1.1.1.1.8.2 tls 400 1.1.1.1.8.2 tls (define_insn "*adddi_er_hi32_tp" 401 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 402 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "r") 403 1.1.1.1.8.2 tls (high:DI (match_operand:DI 2 "tp32_symbolic_operand" ""))))] 404 1.1.1.1.8.2 tls "HAVE_AS_TLS" 405 1.1.1.1.8.2 tls "ldah %0,%2(%1)\t\t!tprelhi") 406 1.1.1.1.8.2 tls 407 1.1.1.1.8.2 tls (define_insn "*adddi_er_lo32_tp" 408 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 409 1.1.1.1.8.2 tls (lo_sum:DI (match_operand:DI 1 "register_operand" "r") 410 1.1.1.1.8.2 tls (match_operand:DI 2 "tp32_symbolic_operand" "")))] 411 1.1.1.1.8.2 tls "HAVE_AS_TLS" 412 1.1.1.1.8.2 tls "lda %0,%2(%1)\t\t!tprello") 413 1.1.1.1.8.2 tls 414 1.1.1.1.8.2 tls (define_insn "*adddi_er_high_l" 415 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 416 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "r") 417 1.1.1.1.8.2 tls (high:DI (match_operand:DI 2 "local_symbolic_operand" ""))))] 418 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && reload_completed" 419 1.1.1.1.8.2 tls "ldah %0,%2(%1)\t\t!gprelhigh" 420 1.1.1.1.8.2 tls [(set_attr "usegp" "yes")]) 421 1.1.1.1.8.2 tls 422 1.1.1.1.8.2 tls (define_split 423 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 424 1.1.1.1.8.2 tls (high:DI (match_operand:DI 1 "local_symbolic_operand" "")))] 425 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && reload_completed" 426 1.1.1.1.8.2 tls [(set (match_dup 0) 427 1.1.1.1.8.2 tls (plus:DI (match_dup 2) (high:DI (match_dup 1))))] 428 1.1.1.1.8.2 tls "operands[2] = pic_offset_table_rtx;") 429 1.1.1.1.8.2 tls 430 1.1.1.1.8.2 tls ;; We used to expend quite a lot of effort choosing addq/subq/lda. 431 1.1.1.1.8.2 tls ;; With complications like 432 1.1.1.1.8.2 tls ;; 433 1.1.1.1.8.2 tls ;; The NT stack unwind code can't handle a subq to adjust the stack 434 1.1.1.1.8.2 tls ;; (that's a bug, but not one we can do anything about). As of NT4.0 SP3, 435 1.1.1.1.8.2 tls ;; the exception handling code will loop if a subq is used and an 436 1.1.1.1.8.2 tls ;; exception occurs. 437 1.1.1.1.8.2 tls ;; 438 1.1.1.1.8.2 tls ;; The 19980616 change to emit prologues as RTL also confused some 439 1.1.1.1.8.2 tls ;; versions of GDB, which also interprets prologues. This has been 440 1.1.1.1.8.2 tls ;; fixed as of GDB 4.18, but it does not harm to unconditionally 441 1.1.1.1.8.2 tls ;; use lda here. 442 1.1.1.1.8.2 tls ;; 443 1.1.1.1.8.2 tls ;; and the fact that the three insns schedule exactly the same, it's 444 1.1.1.1.8.2 tls ;; just not worth the effort. 445 1.1.1.1.8.2 tls 446 1.1.1.1.8.2 tls (define_insn "*adddi_internal" 447 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r,r") 448 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "%r,r,r") 449 1.1.1.1.8.2 tls (match_operand:DI 2 "add_operand" "r,K,L")))] 450 1.1.1.1.8.2 tls "" 451 1.1.1.1.8.2 tls "@ 452 1.1.1.1.8.2 tls addq %1,%2,%0 453 1.1.1.1.8.2 tls lda %0,%2(%1) 454 1.1.1.1.8.2 tls ldah %0,%h2(%1)") 455 1.1.1.1.8.2 tls 456 1.1.1.1.8.2 tls ;; ??? Allow large constants when basing off the frame pointer or some 457 1.1.1.1.8.2 tls ;; virtual register that may eliminate to the frame pointer. This is 458 1.1.1.1.8.2 tls ;; done because register elimination offsets will change the hi/lo split, 459 1.1.1.1.8.2 tls ;; and if we split before reload, we will require additional instructions. 460 1.1.1.1.8.2 tls 461 1.1.1.1.8.2 tls (define_insn "*adddi_fp_hack" 462 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r,r") 463 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "reg_no_subreg_operand" "r,r,r") 464 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" "K,L,n")))] 465 1.1.1.1.8.2 tls "NONSTRICT_REG_OK_FP_BASE_P (operands[1]) 466 1.1.1.1.8.2 tls && INTVAL (operands[2]) >= 0 467 1.1.1.1.8.2 tls /* This is the largest constant an lda+ldah pair can add, minus 468 1.1.1.1.8.2 tls an upper bound on the displacement between SP and AP during 469 1.1.1.1.8.2 tls register elimination. See INITIAL_ELIMINATION_OFFSET. */ 470 1.1.1.1.8.2 tls && INTVAL (operands[2]) 471 1.1.1.1.8.2 tls < (0x7fff8000 472 1.1.1.1.8.2 tls - FIRST_PSEUDO_REGISTER * UNITS_PER_WORD 473 1.1.1.1.8.2 tls - ALPHA_ROUND(crtl->outgoing_args_size) 474 1.1.1.1.8.2 tls - (ALPHA_ROUND (get_frame_size () 475 1.1.1.1.8.2 tls + max_reg_num () * UNITS_PER_WORD 476 1.1.1.1.8.2 tls + crtl->args.pretend_args_size) 477 1.1.1.1.8.2 tls - crtl->args.pretend_args_size))" 478 1.1.1.1.8.2 tls "@ 479 1.1.1.1.8.2 tls lda %0,%2(%1) 480 1.1.1.1.8.2 tls ldah %0,%h2(%1) 481 1.1.1.1.8.2 tls #") 482 1.1.1.1.8.2 tls 483 1.1.1.1.8.2 tls ;; Don't do this if we are adjusting SP since we don't want to do it 484 1.1.1.1.8.2 tls ;; in two steps. Don't split FP sources for the reason listed above. 485 1.1.1.1.8.2 tls (define_split 486 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 487 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "") 488 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" "")))] 489 1.1.1.1.8.2 tls "! add_operand (operands[2], DImode) 490 1.1.1.1.8.2 tls && operands[0] != stack_pointer_rtx 491 1.1.1.1.8.2 tls && operands[1] != frame_pointer_rtx 492 1.1.1.1.8.2 tls && operands[1] != arg_pointer_rtx" 493 1.1.1.1.8.2 tls [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 3))) 494 1.1.1.1.8.2 tls (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 4)))] 495 1.1.1.1.8.2 tls { 496 1.1.1.1.8.2 tls HOST_WIDE_INT val = INTVAL (operands[2]); 497 1.1.1.1.8.2 tls HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000); 498 1.1.1.1.8.2 tls HOST_WIDE_INT rest = val - low; 499 1.1.1.1.8.2 tls rtx rest_rtx = GEN_INT (rest); 500 1.1.1.1.8.2 tls 501 1.1.1.1.8.2 tls operands[4] = GEN_INT (low); 502 1.1.1.1.8.2 tls if (satisfies_constraint_L (rest_rtx)) 503 1.1.1.1.8.2 tls operands[3] = rest_rtx; 504 1.1.1.1.8.2 tls else if (can_create_pseudo_p ()) 505 1.1.1.1.8.2 tls { 506 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 507 1.1.1.1.8.2 tls emit_move_insn (operands[3], operands[2]); 508 1.1.1.1.8.2 tls emit_insn (gen_adddi3 (operands[0], operands[1], operands[3])); 509 1.1.1.1.8.2 tls DONE; 510 1.1.1.1.8.2 tls } 511 1.1.1.1.8.2 tls else 512 1.1.1.1.8.2 tls FAIL; 513 1.1.1.1.8.2 tls }) 514 1.1.1.1.8.2 tls 515 1.1.1.1.8.2 tls (define_insn "*saddl" 516 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 517 1.1.1.1.8.2 tls (plus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r,r") 518 1.1.1.1.8.2 tls (match_operand:SI 2 "const48_operand" "I,I")) 519 1.1.1.1.8.2 tls (match_operand:SI 3 "sext_add_operand" "rI,O")))] 520 1.1.1.1.8.2 tls "" 521 1.1.1.1.8.2 tls "@ 522 1.1.1.1.8.2 tls s%2addl %1,%3,%0 523 1.1.1.1.8.2 tls s%2subl %1,%n3,%0") 524 1.1.1.1.8.2 tls 525 1.1.1.1.8.2 tls (define_insn "*saddl_se" 526 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 527 1.1.1.1.8.2 tls (sign_extend:DI 528 1.1.1.1.8.2 tls (plus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r,r") 529 1.1.1.1.8.2 tls (match_operand:SI 2 "const48_operand" "I,I")) 530 1.1.1.1.8.2 tls (match_operand:SI 3 "sext_add_operand" "rI,O"))))] 531 1.1.1.1.8.2 tls "" 532 1.1.1.1.8.2 tls "@ 533 1.1.1.1.8.2 tls s%2addl %1,%3,%0 534 1.1.1.1.8.2 tls s%2subl %1,%n3,%0") 535 1.1.1.1.8.2 tls 536 1.1.1.1.8.2 tls (define_split 537 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 538 1.1.1.1.8.2 tls (sign_extend:DI 539 1.1.1.1.8.2 tls (plus:SI (mult:SI (match_operator:SI 1 "comparison_operator" 540 1.1.1.1.8.2 tls [(match_operand 2 "" "") 541 1.1.1.1.8.2 tls (match_operand 3 "" "")]) 542 1.1.1.1.8.2 tls (match_operand:SI 4 "const48_operand" "")) 543 1.1.1.1.8.2 tls (match_operand:SI 5 "sext_add_operand" "")))) 544 1.1.1.1.8.2 tls (clobber (match_operand:DI 6 "reg_not_elim_operand" ""))] 545 1.1.1.1.8.2 tls "" 546 1.1.1.1.8.2 tls [(set (match_dup 6) (match_dup 7)) 547 1.1.1.1.8.2 tls (set (match_dup 0) 548 1.1.1.1.8.2 tls (sign_extend:DI (plus:SI (mult:SI (match_dup 8) (match_dup 4)) 549 1.1.1.1.8.2 tls (match_dup 5))))] 550 1.1.1.1.8.2 tls { 551 1.1.1.1.8.2 tls operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[1]), DImode, 552 1.1.1.1.8.2 tls operands[2], operands[3]); 553 1.1.1.1.8.2 tls operands[8] = gen_lowpart (SImode, operands[6]); 554 1.1.1.1.8.2 tls }) 555 1.1.1.1.8.2 tls 556 1.1.1.1.8.2 tls (define_insn "*saddq" 557 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 558 1.1.1.1.8.2 tls (plus:DI (mult:DI (match_operand:DI 1 "reg_not_elim_operand" "r,r") 559 1.1.1.1.8.2 tls (match_operand:DI 2 "const48_operand" "I,I")) 560 1.1.1.1.8.2 tls (match_operand:DI 3 "sext_add_operand" "rI,O")))] 561 1.1.1.1.8.2 tls "" 562 1.1.1.1.8.2 tls "@ 563 1.1.1.1.8.2 tls s%2addq %1,%3,%0 564 1.1.1.1.8.2 tls s%2subq %1,%n3,%0") 565 1.1.1.1.8.2 tls 566 1.1.1.1.8.2 tls (define_insn "addvdi3" 567 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 568 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ,rJ") 569 1.1.1.1.8.2 tls (match_operand:DI 2 "sext_add_operand" "rI,O"))) 570 1.1.1.1.8.2 tls (trap_if (ne (plus:TI (sign_extend:TI (match_dup 1)) 571 1.1.1.1.8.2 tls (sign_extend:TI (match_dup 2))) 572 1.1.1.1.8.2 tls (sign_extend:TI (plus:DI (match_dup 1) 573 1.1.1.1.8.2 tls (match_dup 2)))) 574 1.1.1.1.8.2 tls (const_int 0))] 575 1.1.1.1.8.2 tls "" 576 1.1.1.1.8.2 tls "@ 577 1.1.1.1.8.2 tls addqv %r1,%2,%0 578 1.1.1.1.8.2 tls subqv %r1,%n2,%0") 579 1.1.1.1.8.2 tls 580 1.1.1.1.8.2 tls (define_insn "negsi2" 581 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 582 1.1.1.1.8.2 tls (neg:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")))] 583 1.1.1.1.8.2 tls "" 584 1.1.1.1.8.2 tls "subl $31,%1,%0") 585 1.1.1.1.8.2 tls 586 1.1.1.1.8.2 tls (define_insn "*negsi_se" 587 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 588 1.1.1.1.8.2 tls (sign_extend:DI (neg:SI 589 1.1.1.1.8.2 tls (match_operand:SI 1 "reg_or_8bit_operand" "rI"))))] 590 1.1.1.1.8.2 tls "" 591 1.1.1.1.8.2 tls "subl $31,%1,%0") 592 1.1.1.1.8.2 tls 593 1.1.1.1.8.2 tls (define_insn "negvsi2" 594 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 595 1.1.1.1.8.2 tls (neg:SI (match_operand:SI 1 "register_operand" "r"))) 596 1.1.1.1.8.2 tls (trap_if (ne (neg:DI (sign_extend:DI (match_dup 1))) 597 1.1.1.1.8.2 tls (sign_extend:DI (neg:SI (match_dup 1)))) 598 1.1.1.1.8.2 tls (const_int 0))] 599 1.1.1.1.8.2 tls "" 600 1.1.1.1.8.2 tls "sublv $31,%1,%0") 601 1.1.1.1.8.2 tls 602 1.1.1.1.8.2 tls (define_insn "negdi2" 603 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 604 1.1.1.1.8.2 tls (neg:DI (match_operand:DI 1 "reg_or_8bit_operand" "rI")))] 605 1.1.1.1.8.2 tls "" 606 1.1.1.1.8.2 tls "subq $31,%1,%0") 607 1.1.1.1.8.2 tls 608 1.1.1.1.8.2 tls (define_insn "negvdi2" 609 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 610 1.1.1.1.8.2 tls (neg:DI (match_operand:DI 1 "register_operand" "r"))) 611 1.1.1.1.8.2 tls (trap_if (ne (neg:TI (sign_extend:TI (match_dup 1))) 612 1.1.1.1.8.2 tls (sign_extend:TI (neg:DI (match_dup 1)))) 613 1.1.1.1.8.2 tls (const_int 0))] 614 1.1.1.1.8.2 tls "" 615 1.1.1.1.8.2 tls "subqv $31,%1,%0") 616 1.1.1.1.8.2 tls 617 1.1.1.1.8.2 tls (define_insn "subsi3" 618 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 619 1.1.1.1.8.2 tls (minus:SI (match_operand:SI 1 "reg_or_0_operand" "rJ") 620 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_8bit_operand" "rI")))] 621 1.1.1.1.8.2 tls "" 622 1.1.1.1.8.2 tls "subl %r1,%2,%0") 623 1.1.1.1.8.2 tls 624 1.1.1.1.8.2 tls (define_insn "*subsi_se" 625 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 626 1.1.1.1.8.2 tls (sign_extend:DI (minus:SI (match_operand:SI 1 "reg_or_0_operand" "rJ") 627 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_8bit_operand" "rI"))))] 628 1.1.1.1.8.2 tls "" 629 1.1.1.1.8.2 tls "subl %r1,%2,%0") 630 1.1.1.1.8.2 tls 631 1.1.1.1.8.2 tls (define_insn "*subsi_se2" 632 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 633 1.1.1.1.8.2 tls (sign_extend:DI 634 1.1.1.1.8.2 tls (subreg:SI (minus:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 635 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI")) 636 1.1.1.1.8.2 tls 0)))] 637 1.1.1.1.8.2 tls "" 638 1.1.1.1.8.2 tls "subl %r1,%2,%0") 639 1.1.1.1.8.2 tls 640 1.1.1.1.8.2 tls (define_insn "subvsi3" 641 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 642 1.1.1.1.8.2 tls (minus:SI (match_operand:SI 1 "reg_or_0_operand" "rJ") 643 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_8bit_operand" "rI"))) 644 1.1.1.1.8.2 tls (trap_if (ne (minus:DI (sign_extend:DI (match_dup 1)) 645 1.1.1.1.8.2 tls (sign_extend:DI (match_dup 2))) 646 1.1.1.1.8.2 tls (sign_extend:DI (minus:SI (match_dup 1) 647 1.1.1.1.8.2 tls (match_dup 2)))) 648 1.1.1.1.8.2 tls (const_int 0))] 649 1.1.1.1.8.2 tls "" 650 1.1.1.1.8.2 tls "sublv %r1,%2,%0") 651 1.1.1.1.8.2 tls 652 1.1.1.1.8.2 tls (define_insn "subdi3" 653 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 654 1.1.1.1.8.2 tls (minus:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 655 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI")))] 656 1.1.1.1.8.2 tls "" 657 1.1.1.1.8.2 tls "subq %r1,%2,%0") 658 1.1.1.1.8.2 tls 659 1.1.1.1.8.2 tls (define_insn "*ssubl" 660 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 661 1.1.1.1.8.2 tls (minus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r") 662 1.1.1.1.8.2 tls (match_operand:SI 2 "const48_operand" "I")) 663 1.1.1.1.8.2 tls (match_operand:SI 3 "reg_or_8bit_operand" "rI")))] 664 1.1.1.1.8.2 tls "" 665 1.1.1.1.8.2 tls "s%2subl %1,%3,%0") 666 1.1.1.1.8.2 tls 667 1.1.1.1.8.2 tls (define_insn "*ssubl_se" 668 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 669 1.1.1.1.8.2 tls (sign_extend:DI 670 1.1.1.1.8.2 tls (minus:SI (mult:SI (match_operand:SI 1 "reg_not_elim_operand" "r") 671 1.1.1.1.8.2 tls (match_operand:SI 2 "const48_operand" "I")) 672 1.1.1.1.8.2 tls (match_operand:SI 3 "reg_or_8bit_operand" "rI"))))] 673 1.1.1.1.8.2 tls "" 674 1.1.1.1.8.2 tls "s%2subl %1,%3,%0") 675 1.1.1.1.8.2 tls 676 1.1.1.1.8.2 tls (define_insn "*ssubq" 677 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 678 1.1.1.1.8.2 tls (minus:DI (mult:DI (match_operand:DI 1 "reg_not_elim_operand" "r") 679 1.1.1.1.8.2 tls (match_operand:DI 2 "const48_operand" "I")) 680 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "rI")))] 681 1.1.1.1.8.2 tls "" 682 1.1.1.1.8.2 tls "s%2subq %1,%3,%0") 683 1.1.1.1.8.2 tls 684 1.1.1.1.8.2 tls (define_insn "subvdi3" 685 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 686 1.1.1.1.8.2 tls (minus:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 687 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI"))) 688 1.1.1.1.8.2 tls (trap_if (ne (minus:TI (sign_extend:TI (match_dup 1)) 689 1.1.1.1.8.2 tls (sign_extend:TI (match_dup 2))) 690 1.1.1.1.8.2 tls (sign_extend:TI (minus:DI (match_dup 1) 691 1.1.1.1.8.2 tls (match_dup 2)))) 692 1.1.1.1.8.2 tls (const_int 0))] 693 1.1.1.1.8.2 tls "" 694 1.1.1.1.8.2 tls "subqv %r1,%2,%0") 695 1.1.1.1.8.2 tls 696 1.1.1.1.8.2 tls ;; The Unicos/Mk assembler doesn't support mull. 697 1.1.1.1.8.2 tls 698 1.1.1.1.8.2 tls (define_insn "mulsi3" 699 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 700 1.1.1.1.8.2 tls (mult:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ") 701 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_8bit_operand" "rI")))] 702 1.1.1.1.8.2 tls "!TARGET_ABI_UNICOSMK" 703 1.1.1.1.8.2 tls "mull %r1,%2,%0" 704 1.1.1.1.8.2 tls [(set_attr "type" "imul") 705 1.1.1.1.8.2 tls (set_attr "opsize" "si")]) 706 1.1.1.1.8.2 tls 707 1.1.1.1.8.2 tls (define_insn "*mulsi_se" 708 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 709 1.1.1.1.8.2 tls (sign_extend:DI 710 1.1.1.1.8.2 tls (mult:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ") 711 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_8bit_operand" "rI"))))] 712 1.1.1.1.8.2 tls "!TARGET_ABI_UNICOSMK" 713 1.1.1.1.8.2 tls "mull %r1,%2,%0" 714 1.1.1.1.8.2 tls [(set_attr "type" "imul") 715 1.1.1.1.8.2 tls (set_attr "opsize" "si")]) 716 1.1.1.1.8.2 tls 717 1.1.1.1.8.2 tls (define_insn "mulvsi3" 718 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 719 1.1.1.1.8.2 tls (mult:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ") 720 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_8bit_operand" "rI"))) 721 1.1.1.1.8.2 tls (trap_if (ne (mult:DI (sign_extend:DI (match_dup 1)) 722 1.1.1.1.8.2 tls (sign_extend:DI (match_dup 2))) 723 1.1.1.1.8.2 tls (sign_extend:DI (mult:SI (match_dup 1) 724 1.1.1.1.8.2 tls (match_dup 2)))) 725 1.1.1.1.8.2 tls (const_int 0))] 726 1.1.1.1.8.2 tls "!TARGET_ABI_UNICOSMK" 727 1.1.1.1.8.2 tls "mullv %r1,%2,%0" 728 1.1.1.1.8.2 tls [(set_attr "type" "imul") 729 1.1.1.1.8.2 tls (set_attr "opsize" "si")]) 730 1.1.1.1.8.2 tls 731 1.1.1.1.8.2 tls (define_insn "muldi3" 732 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 733 1.1.1.1.8.2 tls (mult:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ") 734 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI")))] 735 1.1.1.1.8.2 tls "" 736 1.1.1.1.8.2 tls "mulq %r1,%2,%0" 737 1.1.1.1.8.2 tls [(set_attr "type" "imul")]) 738 1.1.1.1.8.2 tls 739 1.1.1.1.8.2 tls (define_insn "mulvdi3" 740 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 741 1.1.1.1.8.2 tls (mult:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ") 742 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI"))) 743 1.1.1.1.8.2 tls (trap_if (ne (mult:TI (sign_extend:TI (match_dup 1)) 744 1.1.1.1.8.2 tls (sign_extend:TI (match_dup 2))) 745 1.1.1.1.8.2 tls (sign_extend:TI (mult:DI (match_dup 1) 746 1.1.1.1.8.2 tls (match_dup 2)))) 747 1.1.1.1.8.2 tls (const_int 0))] 748 1.1.1.1.8.2 tls "" 749 1.1.1.1.8.2 tls "mulqv %r1,%2,%0" 750 1.1.1.1.8.2 tls [(set_attr "type" "imul")]) 751 1.1.1.1.8.2 tls 752 1.1.1.1.8.2 tls (define_expand "umuldi3_highpart" 753 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 754 1.1.1.1.8.2 tls (truncate:DI 755 1.1.1.1.8.2 tls (lshiftrt:TI 756 1.1.1.1.8.2 tls (mult:TI (zero_extend:TI 757 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "")) 758 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")) 759 1.1.1.1.8.2 tls (const_int 64))))] 760 1.1.1.1.8.2 tls "" 761 1.1.1.1.8.2 tls { 762 1.1.1.1.8.2 tls if (REG_P (operands[2])) 763 1.1.1.1.8.2 tls operands[2] = gen_rtx_ZERO_EXTEND (TImode, operands[2]); 764 1.1.1.1.8.2 tls }) 765 1.1.1.1.8.2 tls 766 1.1.1.1.8.2 tls (define_insn "*umuldi3_highpart_reg" 767 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 768 1.1.1.1.8.2 tls (truncate:DI 769 1.1.1.1.8.2 tls (lshiftrt:TI 770 1.1.1.1.8.2 tls (mult:TI (zero_extend:TI 771 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "r")) 772 1.1.1.1.8.2 tls (zero_extend:TI 773 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "r"))) 774 1.1.1.1.8.2 tls (const_int 64))))] 775 1.1.1.1.8.2 tls "" 776 1.1.1.1.8.2 tls "umulh %1,%2,%0" 777 1.1.1.1.8.2 tls [(set_attr "type" "imul") 778 1.1.1.1.8.2 tls (set_attr "opsize" "udi")]) 779 1.1.1.1.8.2 tls 780 1.1.1.1.8.2 tls (define_insn "*umuldi3_highpart_const" 781 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 782 1.1.1.1.8.2 tls (truncate:DI 783 1.1.1.1.8.2 tls (lshiftrt:TI 784 1.1.1.1.8.2 tls (mult:TI (zero_extend:TI (match_operand:DI 1 "register_operand" "r")) 785 1.1.1.1.8.2 tls (match_operand:TI 2 "cint8_operand" "I")) 786 1.1.1.1.8.2 tls (const_int 64))))] 787 1.1.1.1.8.2 tls "" 788 1.1.1.1.8.2 tls "umulh %1,%2,%0" 789 1.1.1.1.8.2 tls [(set_attr "type" "imul") 790 1.1.1.1.8.2 tls (set_attr "opsize" "udi")]) 791 1.1.1.1.8.2 tls 793 1.1.1.1.8.2 tls ;; The divide and remainder operations take their inputs from r24 and 794 1.1.1.1.8.2 tls ;; r25, put their output in r27, and clobber r23 and r28 on all 795 1.1.1.1.8.2 tls ;; systems except Unicos/Mk. On Unicos, the standard library provides 796 1.1.1.1.8.2 tls ;; subroutines which use the standard calling convention and work on 797 1.1.1.1.8.2 tls ;; DImode operands. 798 1.1.1.1.8.2 tls 799 1.1.1.1.8.2 tls ;; ??? Force sign-extension here because some versions of OSF/1 and 800 1.1.1.1.8.2 tls ;; Interix/NT don't do the right thing if the inputs are not properly 801 1.1.1.1.8.2 tls ;; sign-extended. But Linux, for instance, does not have this 802 1.1.1.1.8.2 tls ;; problem. Is it worth the complication here to eliminate the sign 803 1.1.1.1.8.2 tls ;; extension? 804 1.1.1.1.8.2 tls 805 1.1.1.1.8.2 tls (define_expand "divsi3" 806 1.1.1.1.8.2 tls [(set (match_dup 3) 807 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" ""))) 808 1.1.1.1.8.2 tls (set (match_dup 4) 809 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" ""))) 810 1.1.1.1.8.2 tls (parallel [(set (match_dup 5) 811 1.1.1.1.8.2 tls (sign_extend:DI (div:SI (match_dup 3) (match_dup 4)))) 812 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 813 1.1.1.1.8.2 tls (clobber (reg:DI 28))]) 814 1.1.1.1.8.2 tls (set (match_operand:SI 0 "nonimmediate_operand" "") 815 1.1.1.1.8.2 tls (subreg:SI (match_dup 5) 0))] 816 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 817 1.1.1.1.8.2 tls { 818 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 819 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 820 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 821 1.1.1.1.8.2 tls }) 822 1.1.1.1.8.2 tls 823 1.1.1.1.8.2 tls (define_expand "udivsi3" 824 1.1.1.1.8.2 tls [(set (match_dup 3) 825 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" ""))) 826 1.1.1.1.8.2 tls (set (match_dup 4) 827 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" ""))) 828 1.1.1.1.8.2 tls (parallel [(set (match_dup 5) 829 1.1.1.1.8.2 tls (sign_extend:DI (udiv:SI (match_dup 3) (match_dup 4)))) 830 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 831 1.1.1.1.8.2 tls (clobber (reg:DI 28))]) 832 1.1.1.1.8.2 tls (set (match_operand:SI 0 "nonimmediate_operand" "") 833 1.1.1.1.8.2 tls (subreg:SI (match_dup 5) 0))] 834 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 835 1.1.1.1.8.2 tls { 836 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 837 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 838 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 839 1.1.1.1.8.2 tls }) 840 1.1.1.1.8.2 tls 841 1.1.1.1.8.2 tls (define_expand "modsi3" 842 1.1.1.1.8.2 tls [(set (match_dup 3) 843 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" ""))) 844 1.1.1.1.8.2 tls (set (match_dup 4) 845 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" ""))) 846 1.1.1.1.8.2 tls (parallel [(set (match_dup 5) 847 1.1.1.1.8.2 tls (sign_extend:DI (mod:SI (match_dup 3) (match_dup 4)))) 848 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 849 1.1.1.1.8.2 tls (clobber (reg:DI 28))]) 850 1.1.1.1.8.2 tls (set (match_operand:SI 0 "nonimmediate_operand" "") 851 1.1.1.1.8.2 tls (subreg:SI (match_dup 5) 0))] 852 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 853 1.1.1.1.8.2 tls { 854 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 855 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 856 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 857 1.1.1.1.8.2 tls }) 858 1.1.1.1.8.2 tls 859 1.1.1.1.8.2 tls (define_expand "umodsi3" 860 1.1.1.1.8.2 tls [(set (match_dup 3) 861 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" ""))) 862 1.1.1.1.8.2 tls (set (match_dup 4) 863 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" ""))) 864 1.1.1.1.8.2 tls (parallel [(set (match_dup 5) 865 1.1.1.1.8.2 tls (sign_extend:DI (umod:SI (match_dup 3) (match_dup 4)))) 866 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 867 1.1.1.1.8.2 tls (clobber (reg:DI 28))]) 868 1.1.1.1.8.2 tls (set (match_operand:SI 0 "nonimmediate_operand" "") 869 1.1.1.1.8.2 tls (subreg:SI (match_dup 5) 0))] 870 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 871 1.1.1.1.8.2 tls { 872 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 873 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 874 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 875 1.1.1.1.8.2 tls }) 876 1.1.1.1.8.2 tls 877 1.1.1.1.8.2 tls (define_expand "divdi3" 878 1.1.1.1.8.2 tls [(parallel [(set (match_operand:DI 0 "register_operand" "") 879 1.1.1.1.8.2 tls (div:DI (match_operand:DI 1 "register_operand" "") 880 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" ""))) 881 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 882 1.1.1.1.8.2 tls (clobber (reg:DI 28))])] 883 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 884 1.1.1.1.8.2 tls "") 885 1.1.1.1.8.2 tls 886 1.1.1.1.8.2 tls (define_expand "udivdi3" 887 1.1.1.1.8.2 tls [(parallel [(set (match_operand:DI 0 "register_operand" "") 888 1.1.1.1.8.2 tls (udiv:DI (match_operand:DI 1 "register_operand" "") 889 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" ""))) 890 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 891 1.1.1.1.8.2 tls (clobber (reg:DI 28))])] 892 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 893 1.1.1.1.8.2 tls "") 894 1.1.1.1.8.2 tls 895 1.1.1.1.8.2 tls (define_expand "moddi3" 896 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 897 1.1.1.1.8.2 tls (use (match_operand:DI 1 "register_operand" "")) 898 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" ""))] 899 1.1.1.1.8.2 tls "!TARGET_ABI_OPEN_VMS" 900 1.1.1.1.8.2 tls { 901 1.1.1.1.8.2 tls if (TARGET_ABI_UNICOSMK) 902 1.1.1.1.8.2 tls emit_insn (gen_moddi3_umk (operands[0], operands[1], operands[2])); 903 1.1.1.1.8.2 tls else 904 1.1.1.1.8.2 tls emit_insn (gen_moddi3_dft (operands[0], operands[1], operands[2])); 905 1.1.1.1.8.2 tls DONE; 906 1.1.1.1.8.2 tls }) 907 1.1.1.1.8.2 tls 908 1.1.1.1.8.2 tls (define_expand "moddi3_dft" 909 1.1.1.1.8.2 tls [(parallel [(set (match_operand:DI 0 "register_operand" "") 910 1.1.1.1.8.2 tls (mod:DI (match_operand:DI 1 "register_operand" "") 911 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" ""))) 912 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 913 1.1.1.1.8.2 tls (clobber (reg:DI 28))])] 914 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 915 1.1.1.1.8.2 tls "") 916 1.1.1.1.8.2 tls 917 1.1.1.1.8.2 tls ;; On Unicos/Mk, we do as the system's C compiler does: 918 1.1.1.1.8.2 tls ;; compute the quotient, multiply and subtract. 919 1.1.1.1.8.2 tls 920 1.1.1.1.8.2 tls (define_expand "moddi3_umk" 921 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 922 1.1.1.1.8.2 tls (use (match_operand:DI 1 "register_operand" "")) 923 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" ""))] 924 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 925 1.1.1.1.8.2 tls { 926 1.1.1.1.8.2 tls rtx div, mul = gen_reg_rtx (DImode); 927 1.1.1.1.8.2 tls 928 1.1.1.1.8.2 tls div = expand_binop (DImode, sdiv_optab, operands[1], operands[2], 929 1.1.1.1.8.2 tls NULL_RTX, 0, OPTAB_LIB); 930 1.1.1.1.8.2 tls div = force_reg (DImode, div); 931 1.1.1.1.8.2 tls emit_insn (gen_muldi3 (mul, operands[2], div)); 932 1.1.1.1.8.2 tls emit_insn (gen_subdi3 (operands[0], operands[1], mul)); 933 1.1.1.1.8.2 tls DONE; 934 1.1.1.1.8.2 tls }) 935 1.1.1.1.8.2 tls 936 1.1.1.1.8.2 tls (define_expand "umoddi3" 937 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 938 1.1.1.1.8.2 tls (use (match_operand:DI 1 "register_operand" "")) 939 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" ""))] 940 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS" 941 1.1.1.1.8.2 tls { 942 1.1.1.1.8.2 tls if (TARGET_ABI_UNICOSMK) 943 1.1.1.1.8.2 tls emit_insn (gen_umoddi3_umk (operands[0], operands[1], operands[2])); 944 1.1.1.1.8.2 tls else 945 1.1.1.1.8.2 tls emit_insn (gen_umoddi3_dft (operands[0], operands[1], operands[2])); 946 1.1.1.1.8.2 tls DONE; 947 1.1.1.1.8.2 tls }) 948 1.1.1.1.8.2 tls 949 1.1.1.1.8.2 tls (define_expand "umoddi3_dft" 950 1.1.1.1.8.2 tls [(parallel [(set (match_operand:DI 0 "register_operand" "") 951 1.1.1.1.8.2 tls (umod:DI (match_operand:DI 1 "register_operand" "") 952 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" ""))) 953 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 954 1.1.1.1.8.2 tls (clobber (reg:DI 28))])] 955 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 956 1.1.1.1.8.2 tls "") 957 1.1.1.1.8.2 tls 958 1.1.1.1.8.2 tls (define_expand "umoddi3_umk" 959 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 960 1.1.1.1.8.2 tls (use (match_operand:DI 1 "register_operand" "")) 961 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" ""))] 962 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 963 1.1.1.1.8.2 tls { 964 1.1.1.1.8.2 tls rtx div, mul = gen_reg_rtx (DImode); 965 1.1.1.1.8.2 tls 966 1.1.1.1.8.2 tls div = expand_binop (DImode, udiv_optab, operands[1], operands[2], 967 1.1.1.1.8.2 tls NULL_RTX, 1, OPTAB_LIB); 968 1.1.1.1.8.2 tls div = force_reg (DImode, div); 969 1.1.1.1.8.2 tls emit_insn (gen_muldi3 (mul, operands[2], div)); 970 1.1.1.1.8.2 tls emit_insn (gen_subdi3 (operands[0], operands[1], mul)); 971 1.1.1.1.8.2 tls DONE; 972 1.1.1.1.8.2 tls }) 973 1.1.1.1.8.2 tls 974 1.1.1.1.8.2 tls ;; Lengths of 8 for ldq $t12,__divq($gp); jsr $t9,($t12),__divq as 975 1.1.1.1.8.2 tls ;; expanded by the assembler. 976 1.1.1.1.8.2 tls 977 1.1.1.1.8.2 tls (define_insn_and_split "*divmodsi_internal_er" 978 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=c") 979 1.1.1.1.8.2 tls (sign_extend:DI (match_operator:SI 3 "divmod_operator" 980 1.1.1.1.8.2 tls [(match_operand:DI 1 "register_operand" "a") 981 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "b")]))) 982 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 983 1.1.1.1.8.2 tls (clobber (reg:DI 28))] 984 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS" 985 1.1.1.1.8.2 tls "#" 986 1.1.1.1.8.2 tls "&& reload_completed" 987 1.1.1.1.8.2 tls [(parallel [(set (match_dup 0) 988 1.1.1.1.8.2 tls (sign_extend:DI (match_dup 3))) 989 1.1.1.1.8.2 tls (use (match_dup 0)) 990 1.1.1.1.8.2 tls (use (match_dup 4)) 991 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 992 1.1.1.1.8.2 tls (clobber (reg:DI 28))])] 993 1.1.1.1.8.2 tls { 994 1.1.1.1.8.2 tls const char *str; 995 1.1.1.1.8.2 tls switch (GET_CODE (operands[3])) 996 1.1.1.1.8.2 tls { 997 1.1.1.1.8.2 tls case DIV: 998 1.1.1.1.8.2 tls str = "__divl"; 999 1.1.1.1.8.2 tls break; 1000 1.1.1.1.8.2 tls case UDIV: 1001 1.1.1.1.8.2 tls str = "__divlu"; 1002 1.1.1.1.8.2 tls break; 1003 1.1.1.1.8.2 tls case MOD: 1004 1.1.1.1.8.2 tls str = "__reml"; 1005 1.1.1.1.8.2 tls break; 1006 1.1.1.1.8.2 tls case UMOD: 1007 1.1.1.1.8.2 tls str = "__remlu"; 1008 1.1.1.1.8.2 tls break; 1009 1.1.1.1.8.2 tls default: 1010 1.1.1.1.8.2 tls gcc_unreachable (); 1011 1.1.1.1.8.2 tls } 1012 1.1.1.1.8.2 tls operands[4] = GEN_INT (alpha_next_sequence_number++); 1013 1.1.1.1.8.2 tls emit_insn (gen_movdi_er_high_g (operands[0], pic_offset_table_rtx, 1014 1.1.1.1.8.2 tls gen_rtx_SYMBOL_REF (DImode, str), 1015 1.1.1.1.8.2 tls operands[4])); 1016 1.1.1.1.8.2 tls } 1017 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 1018 1.1.1.1.8.2 tls (set_attr "length" "8")]) 1019 1.1.1.1.8.2 tls 1020 1.1.1.1.8.2 tls (define_insn "*divmodsi_internal_er_1" 1021 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=c") 1022 1.1.1.1.8.2 tls (sign_extend:DI (match_operator:SI 3 "divmod_operator" 1023 1.1.1.1.8.2 tls [(match_operand:DI 1 "register_operand" "a") 1024 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "b")]))) 1025 1.1.1.1.8.2 tls (use (match_operand:DI 4 "register_operand" "c")) 1026 1.1.1.1.8.2 tls (use (match_operand 5 "const_int_operand" "")) 1027 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 1028 1.1.1.1.8.2 tls (clobber (reg:DI 28))] 1029 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS" 1030 1.1.1.1.8.2 tls "jsr $23,($27),__%E3%j5" 1031 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 1032 1.1.1.1.8.2 tls (set_attr "length" "4")]) 1033 1.1.1.1.8.2 tls 1034 1.1.1.1.8.2 tls (define_insn "*divmodsi_internal" 1035 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=c") 1036 1.1.1.1.8.2 tls (sign_extend:DI (match_operator:SI 3 "divmod_operator" 1037 1.1.1.1.8.2 tls [(match_operand:DI 1 "register_operand" "a") 1038 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "b")]))) 1039 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 1040 1.1.1.1.8.2 tls (clobber (reg:DI 28))] 1041 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 1042 1.1.1.1.8.2 tls "%E3 %1,%2,%0" 1043 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 1044 1.1.1.1.8.2 tls (set_attr "length" "8")]) 1045 1.1.1.1.8.2 tls 1046 1.1.1.1.8.2 tls (define_insn_and_split "*divmoddi_internal_er" 1047 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=c") 1048 1.1.1.1.8.2 tls (match_operator:DI 3 "divmod_operator" 1049 1.1.1.1.8.2 tls [(match_operand:DI 1 "register_operand" "a") 1050 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "b")])) 1051 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 1052 1.1.1.1.8.2 tls (clobber (reg:DI 28))] 1053 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS" 1054 1.1.1.1.8.2 tls "#" 1055 1.1.1.1.8.2 tls "&& reload_completed" 1056 1.1.1.1.8.2 tls [(parallel [(set (match_dup 0) (match_dup 3)) 1057 1.1.1.1.8.2 tls (use (match_dup 0)) 1058 1.1.1.1.8.2 tls (use (match_dup 4)) 1059 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 1060 1.1.1.1.8.2 tls (clobber (reg:DI 28))])] 1061 1.1.1.1.8.2 tls { 1062 1.1.1.1.8.2 tls const char *str; 1063 1.1.1.1.8.2 tls switch (GET_CODE (operands[3])) 1064 1.1.1.1.8.2 tls { 1065 1.1.1.1.8.2 tls case DIV: 1066 1.1.1.1.8.2 tls str = "__divq"; 1067 1.1.1.1.8.2 tls break; 1068 1.1.1.1.8.2 tls case UDIV: 1069 1.1.1.1.8.2 tls str = "__divqu"; 1070 1.1.1.1.8.2 tls break; 1071 1.1.1.1.8.2 tls case MOD: 1072 1.1.1.1.8.2 tls str = "__remq"; 1073 1.1.1.1.8.2 tls break; 1074 1.1.1.1.8.2 tls case UMOD: 1075 1.1.1.1.8.2 tls str = "__remqu"; 1076 1.1.1.1.8.2 tls break; 1077 1.1.1.1.8.2 tls default: 1078 1.1.1.1.8.2 tls gcc_unreachable (); 1079 1.1.1.1.8.2 tls } 1080 1.1.1.1.8.2 tls operands[4] = GEN_INT (alpha_next_sequence_number++); 1081 1.1.1.1.8.2 tls emit_insn (gen_movdi_er_high_g (operands[0], pic_offset_table_rtx, 1082 1.1.1.1.8.2 tls gen_rtx_SYMBOL_REF (DImode, str), 1083 1.1.1.1.8.2 tls operands[4])); 1084 1.1.1.1.8.2 tls } 1085 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 1086 1.1.1.1.8.2 tls (set_attr "length" "8")]) 1087 1.1.1.1.8.2 tls 1088 1.1.1.1.8.2 tls (define_insn "*divmoddi_internal_er_1" 1089 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=c") 1090 1.1.1.1.8.2 tls (match_operator:DI 3 "divmod_operator" 1091 1.1.1.1.8.2 tls [(match_operand:DI 1 "register_operand" "a") 1092 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "b")])) 1093 1.1.1.1.8.2 tls (use (match_operand:DI 4 "register_operand" "c")) 1094 1.1.1.1.8.2 tls (use (match_operand 5 "const_int_operand" "")) 1095 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 1096 1.1.1.1.8.2 tls (clobber (reg:DI 28))] 1097 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && ! TARGET_ABI_OPEN_VMS" 1098 1.1.1.1.8.2 tls "jsr $23,($27),__%E3%j5" 1099 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 1100 1.1.1.1.8.2 tls (set_attr "length" "4")]) 1101 1.1.1.1.8.2 tls 1102 1.1.1.1.8.2 tls (define_insn "*divmoddi_internal" 1103 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=c") 1104 1.1.1.1.8.2 tls (match_operator:DI 3 "divmod_operator" 1105 1.1.1.1.8.2 tls [(match_operand:DI 1 "register_operand" "a") 1106 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "b")])) 1107 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 1108 1.1.1.1.8.2 tls (clobber (reg:DI 28))] 1109 1.1.1.1.8.2 tls "! TARGET_ABI_OPEN_VMS && ! TARGET_ABI_UNICOSMK" 1110 1.1.1.1.8.2 tls "%E3 %1,%2,%0" 1111 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 1112 1.1.1.1.8.2 tls (set_attr "length" "8")]) 1113 1.1.1.1.8.2 tls 1115 1.1.1.1.8.2 tls ;; Next are the basic logical operations. We only expose the DImode operations 1116 1.1.1.1.8.2 tls ;; to the rtl expanders, but SImode versions exist for combine as well as for 1117 1.1.1.1.8.2 tls ;; the atomic operation splitters. 1118 1.1.1.1.8.2 tls 1119 1.1.1.1.8.2 tls (define_insn "*andsi_internal" 1120 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r,r") 1121 1.1.1.1.8.2 tls (and:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ,rJ") 1122 1.1.1.1.8.2 tls (match_operand:SI 2 "and_operand" "rI,N,MH")))] 1123 1.1.1.1.8.2 tls "" 1124 1.1.1.1.8.2 tls "@ 1125 1.1.1.1.8.2 tls and %r1,%2,%0 1126 1.1.1.1.8.2 tls bic %r1,%N2,%0 1127 1.1.1.1.8.2 tls zapnot %r1,%m2,%0" 1128 1.1.1.1.8.2 tls [(set_attr "type" "ilog,ilog,shift")]) 1129 1.1.1.1.8.2 tls 1130 1.1.1.1.8.2 tls (define_insn "anddi3" 1131 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r,r") 1132 1.1.1.1.8.2 tls (and:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ,rJ,rJ") 1133 1.1.1.1.8.2 tls (match_operand:DI 2 "and_operand" "rI,N,MH")))] 1134 1.1.1.1.8.2 tls "" 1135 1.1.1.1.8.2 tls "@ 1136 1.1.1.1.8.2 tls and %r1,%2,%0 1137 1.1.1.1.8.2 tls bic %r1,%N2,%0 1138 1.1.1.1.8.2 tls zapnot %r1,%m2,%0" 1139 1.1.1.1.8.2 tls [(set_attr "type" "ilog,ilog,shift")]) 1140 1.1.1.1.8.2 tls 1141 1.1.1.1.8.2 tls ;; There are times when we can split an AND into two AND insns. This occurs 1142 1.1.1.1.8.2 tls ;; when we can first clear any bytes and then clear anything else. For 1143 1.1.1.1.8.2 tls ;; example "I & 0xffff07" is "(I & 0xffffff) & 0xffffffffffffff07". 1144 1.1.1.1.8.2 tls ;; Only do this when running on 64-bit host since the computations are 1145 1.1.1.1.8.2 tls ;; too messy otherwise. 1146 1.1.1.1.8.2 tls 1147 1.1.1.1.8.2 tls (define_split 1148 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 1149 1.1.1.1.8.2 tls (and:DI (match_operand:DI 1 "register_operand" "") 1150 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" "")))] 1151 1.1.1.1.8.2 tls "HOST_BITS_PER_WIDE_INT == 64 && ! and_operand (operands[2], DImode)" 1152 1.1.1.1.8.2 tls [(set (match_dup 0) (and:DI (match_dup 1) (match_dup 3))) 1153 1.1.1.1.8.2 tls (set (match_dup 0) (and:DI (match_dup 0) (match_dup 4)))] 1154 1.1.1.1.8.2 tls { 1155 1.1.1.1.8.2 tls unsigned HOST_WIDE_INT mask1 = INTVAL (operands[2]); 1156 1.1.1.1.8.2 tls unsigned HOST_WIDE_INT mask2 = mask1; 1157 1.1.1.1.8.2 tls int i; 1158 1.1.1.1.8.2 tls 1159 1.1.1.1.8.2 tls /* For each byte that isn't all zeros, make it all ones. */ 1160 1.1.1.1.8.2 tls for (i = 0; i < 64; i += 8) 1161 1.1.1.1.8.2 tls if ((mask1 & ((HOST_WIDE_INT) 0xff << i)) != 0) 1162 1.1.1.1.8.2 tls mask1 |= (HOST_WIDE_INT) 0xff << i; 1163 1.1.1.1.8.2 tls 1164 1.1.1.1.8.2 tls /* Now turn on any bits we've just turned off. */ 1165 1.1.1.1.8.2 tls mask2 |= ~ mask1; 1166 1.1.1.1.8.2 tls 1167 1.1.1.1.8.2 tls operands[3] = GEN_INT (mask1); 1168 1.1.1.1.8.2 tls operands[4] = GEN_INT (mask2); 1169 1.1.1.1.8.2 tls }) 1170 1.1.1.1.8.2 tls 1171 1.1.1.1.8.2 tls (define_expand "zero_extendqihi2" 1172 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "") 1173 1.1.1.1.8.2 tls (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "")))] 1174 1.1.1.1.8.2 tls "" 1175 1.1.1.1.8.2 tls { 1176 1.1.1.1.8.2 tls if (! TARGET_BWX) 1177 1.1.1.1.8.2 tls operands[1] = force_reg (QImode, operands[1]); 1178 1.1.1.1.8.2 tls }) 1179 1.1.1.1.8.2 tls 1180 1.1.1.1.8.2 tls (define_insn "*zero_extendqihi2_bwx" 1181 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r,r") 1182 1.1.1.1.8.2 tls (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] 1183 1.1.1.1.8.2 tls "TARGET_BWX" 1184 1.1.1.1.8.2 tls "@ 1185 1.1.1.1.8.2 tls and %1,0xff,%0 1186 1.1.1.1.8.2 tls ldbu %0,%1" 1187 1.1.1.1.8.2 tls [(set_attr "type" "ilog,ild")]) 1188 1.1.1.1.8.2 tls 1189 1.1.1.1.8.2 tls (define_insn "*zero_extendqihi2_nobwx" 1190 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r") 1191 1.1.1.1.8.2 tls (zero_extend:HI (match_operand:QI 1 "register_operand" "r")))] 1192 1.1.1.1.8.2 tls "! TARGET_BWX" 1193 1.1.1.1.8.2 tls "and %1,0xff,%0" 1194 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1195 1.1.1.1.8.2 tls 1196 1.1.1.1.8.2 tls (define_expand "zero_extendqisi2" 1197 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "") 1198 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "")))] 1199 1.1.1.1.8.2 tls "" 1200 1.1.1.1.8.2 tls { 1201 1.1.1.1.8.2 tls if (! TARGET_BWX) 1202 1.1.1.1.8.2 tls operands[1] = force_reg (QImode, operands[1]); 1203 1.1.1.1.8.2 tls }) 1204 1.1.1.1.8.2 tls 1205 1.1.1.1.8.2 tls (define_insn "*zero_extendqisi2_bwx" 1206 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 1207 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] 1208 1.1.1.1.8.2 tls "TARGET_BWX" 1209 1.1.1.1.8.2 tls "@ 1210 1.1.1.1.8.2 tls and %1,0xff,%0 1211 1.1.1.1.8.2 tls ldbu %0,%1" 1212 1.1.1.1.8.2 tls [(set_attr "type" "ilog,ild")]) 1213 1.1.1.1.8.2 tls 1214 1.1.1.1.8.2 tls (define_insn "*zero_extendqisi2_nobwx" 1215 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1216 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))] 1217 1.1.1.1.8.2 tls "! TARGET_BWX" 1218 1.1.1.1.8.2 tls "and %1,0xff,%0" 1219 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1220 1.1.1.1.8.2 tls 1221 1.1.1.1.8.2 tls (define_expand "zero_extendqidi2" 1222 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 1223 1.1.1.1.8.2 tls (zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "")))] 1224 1.1.1.1.8.2 tls "" 1225 1.1.1.1.8.2 tls { 1226 1.1.1.1.8.2 tls if (! TARGET_BWX) 1227 1.1.1.1.8.2 tls operands[1] = force_reg (QImode, operands[1]); 1228 1.1.1.1.8.2 tls }) 1229 1.1.1.1.8.2 tls 1230 1.1.1.1.8.2 tls (define_insn "*zero_extendqidi2_bwx" 1231 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 1232 1.1.1.1.8.2 tls (zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] 1233 1.1.1.1.8.2 tls "TARGET_BWX" 1234 1.1.1.1.8.2 tls "@ 1235 1.1.1.1.8.2 tls and %1,0xff,%0 1236 1.1.1.1.8.2 tls ldbu %0,%1" 1237 1.1.1.1.8.2 tls [(set_attr "type" "ilog,ild")]) 1238 1.1.1.1.8.2 tls 1239 1.1.1.1.8.2 tls (define_insn "*zero_extendqidi2_nobwx" 1240 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1241 1.1.1.1.8.2 tls (zero_extend:DI (match_operand:QI 1 "register_operand" "r")))] 1242 1.1.1.1.8.2 tls "! TARGET_BWX" 1243 1.1.1.1.8.2 tls "and %1,0xff,%0" 1244 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1245 1.1.1.1.8.2 tls 1246 1.1.1.1.8.2 tls (define_expand "zero_extendhisi2" 1247 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "") 1248 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))] 1249 1.1.1.1.8.2 tls "" 1250 1.1.1.1.8.2 tls { 1251 1.1.1.1.8.2 tls if (! TARGET_BWX) 1252 1.1.1.1.8.2 tls operands[1] = force_reg (HImode, operands[1]); 1253 1.1.1.1.8.2 tls }) 1254 1.1.1.1.8.2 tls 1255 1.1.1.1.8.2 tls (define_insn "*zero_extendhisi2_bwx" 1256 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 1257 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r,m")))] 1258 1.1.1.1.8.2 tls "TARGET_BWX" 1259 1.1.1.1.8.2 tls "@ 1260 1.1.1.1.8.2 tls zapnot %1,3,%0 1261 1.1.1.1.8.2 tls ldwu %0,%1" 1262 1.1.1.1.8.2 tls [(set_attr "type" "shift,ild")]) 1263 1.1.1.1.8.2 tls 1264 1.1.1.1.8.2 tls (define_insn "*zero_extendhisi2_nobwx" 1265 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1266 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:HI 1 "register_operand" "r")))] 1267 1.1.1.1.8.2 tls "! TARGET_BWX" 1268 1.1.1.1.8.2 tls "zapnot %1,3,%0" 1269 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1270 1.1.1.1.8.2 tls 1271 1.1.1.1.8.2 tls (define_expand "zero_extendhidi2" 1272 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 1273 1.1.1.1.8.2 tls (zero_extend:DI (match_operand:HI 1 "nonimmediate_operand" "")))] 1274 1.1.1.1.8.2 tls "" 1275 1.1.1.1.8.2 tls { 1276 1.1.1.1.8.2 tls if (! TARGET_BWX) 1277 1.1.1.1.8.2 tls operands[1] = force_reg (HImode, operands[1]); 1278 1.1.1.1.8.2 tls }) 1279 1.1.1.1.8.2 tls 1280 1.1.1.1.8.2 tls (define_insn "*zero_extendhidi2_bwx" 1281 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 1282 1.1.1.1.8.2 tls (zero_extend:DI (match_operand:HI 1 "nonimmediate_operand" "r,m")))] 1283 1.1.1.1.8.2 tls "TARGET_BWX" 1284 1.1.1.1.8.2 tls "@ 1285 1.1.1.1.8.2 tls zapnot %1,3,%0 1286 1.1.1.1.8.2 tls ldwu %0,%1" 1287 1.1.1.1.8.2 tls [(set_attr "type" "shift,ild")]) 1288 1.1.1.1.8.2 tls 1289 1.1.1.1.8.2 tls (define_insn "*zero_extendhidi2_nobwx" 1290 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1291 1.1.1.1.8.2 tls (zero_extend:DI (match_operand:HI 1 "register_operand" "r")))] 1292 1.1.1.1.8.2 tls "" 1293 1.1.1.1.8.2 tls "zapnot %1,3,%0" 1294 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1295 1.1.1.1.8.2 tls 1296 1.1.1.1.8.2 tls (define_insn "zero_extendsidi2" 1297 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1298 1.1.1.1.8.2 tls (zero_extend:DI (match_operand:SI 1 "register_operand" "r")))] 1299 1.1.1.1.8.2 tls "" 1300 1.1.1.1.8.2 tls "zapnot %1,15,%0" 1301 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1302 1.1.1.1.8.2 tls 1303 1.1.1.1.8.2 tls (define_insn "*andnotsi3" 1304 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1305 1.1.1.1.8.2 tls (and:SI (not:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")) 1306 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_0_operand" "rJ")))] 1307 1.1.1.1.8.2 tls "" 1308 1.1.1.1.8.2 tls "bic %r2,%1,%0" 1309 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1310 1.1.1.1.8.2 tls 1311 1.1.1.1.8.2 tls (define_insn "andnotdi3" 1312 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1313 1.1.1.1.8.2 tls (and:DI (not:DI (match_operand:DI 1 "reg_or_8bit_operand" "rI")) 1314 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "rJ")))] 1315 1.1.1.1.8.2 tls "" 1316 1.1.1.1.8.2 tls "bic %r2,%1,%0" 1317 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1318 1.1.1.1.8.2 tls 1319 1.1.1.1.8.2 tls (define_insn "*iorsi_internal" 1320 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 1321 1.1.1.1.8.2 tls (ior:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ") 1322 1.1.1.1.8.2 tls (match_operand:SI 2 "or_operand" "rI,N")))] 1323 1.1.1.1.8.2 tls "" 1324 1.1.1.1.8.2 tls "@ 1325 1.1.1.1.8.2 tls bis %r1,%2,%0 1326 1.1.1.1.8.2 tls ornot %r1,%N2,%0" 1327 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1328 1.1.1.1.8.2 tls 1329 1.1.1.1.8.2 tls (define_insn "iordi3" 1330 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 1331 1.1.1.1.8.2 tls (ior:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ,rJ") 1332 1.1.1.1.8.2 tls (match_operand:DI 2 "or_operand" "rI,N")))] 1333 1.1.1.1.8.2 tls "" 1334 1.1.1.1.8.2 tls "@ 1335 1.1.1.1.8.2 tls bis %r1,%2,%0 1336 1.1.1.1.8.2 tls ornot %r1,%N2,%0" 1337 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1338 1.1.1.1.8.2 tls 1339 1.1.1.1.8.2 tls (define_insn "*one_cmplsi_internal" 1340 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1341 1.1.1.1.8.2 tls (not:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")))] 1342 1.1.1.1.8.2 tls "" 1343 1.1.1.1.8.2 tls "ornot $31,%1,%0" 1344 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1345 1.1.1.1.8.2 tls 1346 1.1.1.1.8.2 tls (define_insn "one_cmpldi2" 1347 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1348 1.1.1.1.8.2 tls (not:DI (match_operand:DI 1 "reg_or_8bit_operand" "rI")))] 1349 1.1.1.1.8.2 tls "" 1350 1.1.1.1.8.2 tls "ornot $31,%1,%0" 1351 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1352 1.1.1.1.8.2 tls 1353 1.1.1.1.8.2 tls (define_insn "*iornotsi3" 1354 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1355 1.1.1.1.8.2 tls (ior:SI (not:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")) 1356 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_0_operand" "rJ")))] 1357 1.1.1.1.8.2 tls "" 1358 1.1.1.1.8.2 tls "ornot %r2,%1,%0" 1359 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1360 1.1.1.1.8.2 tls 1361 1.1.1.1.8.2 tls (define_insn "*iornotdi3" 1362 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1363 1.1.1.1.8.2 tls (ior:DI (not:DI (match_operand:DI 1 "reg_or_8bit_operand" "rI")) 1364 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "rJ")))] 1365 1.1.1.1.8.2 tls "" 1366 1.1.1.1.8.2 tls "ornot %r2,%1,%0" 1367 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1368 1.1.1.1.8.2 tls 1369 1.1.1.1.8.2 tls (define_insn "*xorsi_internal" 1370 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 1371 1.1.1.1.8.2 tls (xor:SI (match_operand:SI 1 "reg_or_0_operand" "%rJ,rJ") 1372 1.1.1.1.8.2 tls (match_operand:SI 2 "or_operand" "rI,N")))] 1373 1.1.1.1.8.2 tls "" 1374 1.1.1.1.8.2 tls "@ 1375 1.1.1.1.8.2 tls xor %r1,%2,%0 1376 1.1.1.1.8.2 tls eqv %r1,%N2,%0" 1377 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1378 1.1.1.1.8.2 tls 1379 1.1.1.1.8.2 tls (define_insn "xordi3" 1380 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 1381 1.1.1.1.8.2 tls (xor:DI (match_operand:DI 1 "reg_or_0_operand" "%rJ,rJ") 1382 1.1.1.1.8.2 tls (match_operand:DI 2 "or_operand" "rI,N")))] 1383 1.1.1.1.8.2 tls "" 1384 1.1.1.1.8.2 tls "@ 1385 1.1.1.1.8.2 tls xor %r1,%2,%0 1386 1.1.1.1.8.2 tls eqv %r1,%N2,%0" 1387 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1388 1.1.1.1.8.2 tls 1389 1.1.1.1.8.2 tls (define_insn "*xornotsi3" 1390 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1391 1.1.1.1.8.2 tls (not:SI (xor:SI (match_operand:SI 1 "register_operand" "%rJ") 1392 1.1.1.1.8.2 tls (match_operand:SI 2 "register_operand" "rI"))))] 1393 1.1.1.1.8.2 tls "" 1394 1.1.1.1.8.2 tls "eqv %r1,%2,%0" 1395 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1396 1.1.1.1.8.2 tls 1397 1.1.1.1.8.2 tls (define_insn "*xornotdi3" 1398 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1399 1.1.1.1.8.2 tls (not:DI (xor:DI (match_operand:DI 1 "register_operand" "%rJ") 1400 1.1.1.1.8.2 tls (match_operand:DI 2 "register_operand" "rI"))))] 1401 1.1.1.1.8.2 tls "" 1402 1.1.1.1.8.2 tls "eqv %r1,%2,%0" 1403 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 1404 1.1.1.1.8.2 tls 1406 1.1.1.1.8.2 tls ;; Handle FFS and related insns iff we support CIX. 1407 1.1.1.1.8.2 tls 1408 1.1.1.1.8.2 tls (define_expand "ffsdi2" 1409 1.1.1.1.8.2 tls [(set (match_dup 2) 1410 1.1.1.1.8.2 tls (ctz:DI (match_operand:DI 1 "register_operand" ""))) 1411 1.1.1.1.8.2 tls (set (match_dup 3) 1412 1.1.1.1.8.2 tls (plus:DI (match_dup 2) (const_int 1))) 1413 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 1414 1.1.1.1.8.2 tls (if_then_else:DI (eq (match_dup 1) (const_int 0)) 1415 1.1.1.1.8.2 tls (const_int 0) (match_dup 3)))] 1416 1.1.1.1.8.2 tls "TARGET_CIX" 1417 1.1.1.1.8.2 tls { 1418 1.1.1.1.8.2 tls operands[2] = gen_reg_rtx (DImode); 1419 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 1420 1.1.1.1.8.2 tls }) 1421 1.1.1.1.8.2 tls 1422 1.1.1.1.8.2 tls (define_insn "clzdi2" 1423 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1424 1.1.1.1.8.2 tls (clz:DI (match_operand:DI 1 "register_operand" "r")))] 1425 1.1.1.1.8.2 tls "TARGET_CIX" 1426 1.1.1.1.8.2 tls "ctlz %1,%0" 1427 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 1428 1.1.1.1.8.2 tls 1429 1.1.1.1.8.2 tls (define_insn "ctzdi2" 1430 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1431 1.1.1.1.8.2 tls (ctz:DI (match_operand:DI 1 "register_operand" "r")))] 1432 1.1.1.1.8.2 tls "TARGET_CIX" 1433 1.1.1.1.8.2 tls "cttz %1,%0" 1434 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 1435 1.1.1.1.8.2 tls 1436 1.1.1.1.8.2 tls (define_insn "popcountdi2" 1437 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1438 1.1.1.1.8.2 tls (popcount:DI (match_operand:DI 1 "register_operand" "r")))] 1439 1.1.1.1.8.2 tls "TARGET_CIX" 1440 1.1.1.1.8.2 tls "ctpop %1,%0" 1441 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 1442 1.1.1.1.8.2 tls 1443 1.1.1.1.8.2 tls (define_expand "bswapsi2" 1444 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "") 1445 1.1.1.1.8.2 tls (bswap:SI (match_operand:SI 1 "register_operand" "")))] 1446 1.1.1.1.8.2 tls "!optimize_size" 1447 1.1.1.1.8.2 tls { 1448 1.1.1.1.8.2 tls rtx t0, t1; 1449 1.1.1.1.8.2 tls 1450 1.1.1.1.8.2 tls t0 = gen_reg_rtx (DImode); 1451 1.1.1.1.8.2 tls t1 = gen_reg_rtx (DImode); 1452 1.1.1.1.8.2 tls 1453 1.1.1.1.8.2 tls emit_insn (gen_insxh (t0, gen_lowpart (DImode, operands[1]), 1454 1.1.1.1.8.2 tls GEN_INT (32), GEN_INT (WORDS_BIG_ENDIAN ? 0 : 7))); 1455 1.1.1.1.8.2 tls emit_insn (gen_inswl_const (t1, gen_lowpart (HImode, operands[1]), 1456 1.1.1.1.8.2 tls GEN_INT (24))); 1457 1.1.1.1.8.2 tls emit_insn (gen_iordi3 (t1, t0, t1)); 1458 1.1.1.1.8.2 tls emit_insn (gen_lshrdi3 (t0, t1, GEN_INT (16))); 1459 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (t1, t1, alpha_expand_zap_mask (0x5))); 1460 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (t0, t0, alpha_expand_zap_mask (0xa))); 1461 1.1.1.1.8.2 tls emit_insn (gen_addsi3 (operands[0], gen_lowpart (SImode, t0), 1462 1.1.1.1.8.2 tls gen_lowpart (SImode, t1))); 1463 1.1.1.1.8.2 tls DONE; 1464 1.1.1.1.8.2 tls }) 1465 1.1.1.1.8.2 tls 1466 1.1.1.1.8.2 tls (define_expand "bswapdi2" 1467 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 1468 1.1.1.1.8.2 tls (bswap:DI (match_operand:DI 1 "register_operand" "")))] 1469 1.1.1.1.8.2 tls "!optimize_size" 1470 1.1.1.1.8.2 tls { 1471 1.1.1.1.8.2 tls rtx t0, t1; 1472 1.1.1.1.8.2 tls 1473 1.1.1.1.8.2 tls t0 = gen_reg_rtx (DImode); 1474 1.1.1.1.8.2 tls t1 = gen_reg_rtx (DImode); 1475 1.1.1.1.8.2 tls 1476 1.1.1.1.8.2 tls /* This method of shifting and masking is not specific to Alpha, but 1477 1.1.1.1.8.2 tls is only profitable on Alpha because of our handy byte zap insn. */ 1478 1.1.1.1.8.2 tls 1479 1.1.1.1.8.2 tls emit_insn (gen_lshrdi3 (t0, operands[1], GEN_INT (32))); 1480 1.1.1.1.8.2 tls emit_insn (gen_ashldi3 (t1, operands[1], GEN_INT (32))); 1481 1.1.1.1.8.2 tls emit_insn (gen_iordi3 (t1, t0, t1)); 1482 1.1.1.1.8.2 tls 1483 1.1.1.1.8.2 tls emit_insn (gen_lshrdi3 (t0, t1, GEN_INT (16))); 1484 1.1.1.1.8.2 tls emit_insn (gen_ashldi3 (t1, t1, GEN_INT (16))); 1485 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (t0, t0, alpha_expand_zap_mask (0xcc))); 1486 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (t1, t1, alpha_expand_zap_mask (0x33))); 1487 1.1.1.1.8.2 tls emit_insn (gen_iordi3 (t1, t0, t1)); 1488 1.1.1.1.8.2 tls 1489 1.1.1.1.8.2 tls emit_insn (gen_lshrdi3 (t0, t1, GEN_INT (8))); 1490 1.1.1.1.8.2 tls emit_insn (gen_ashldi3 (t1, t1, GEN_INT (8))); 1491 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (t0, t0, alpha_expand_zap_mask (0xaa))); 1492 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (t1, t1, alpha_expand_zap_mask (0x55))); 1493 1.1.1.1.8.2 tls emit_insn (gen_iordi3 (operands[0], t0, t1)); 1494 1.1.1.1.8.2 tls DONE; 1495 1.1.1.1.8.2 tls }) 1496 1.1.1.1.8.2 tls 1498 1.1.1.1.8.2 tls ;; Next come the shifts and the various extract and insert operations. 1499 1.1.1.1.8.2 tls 1500 1.1.1.1.8.2 tls (define_insn "ashldi3" 1501 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 1502 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ,rJ") 1503 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_6bit_operand" "P,rS")))] 1504 1.1.1.1.8.2 tls "" 1505 1.1.1.1.8.2 tls { 1506 1.1.1.1.8.2 tls switch (which_alternative) 1507 1.1.1.1.8.2 tls { 1508 1.1.1.1.8.2 tls case 0: 1509 1.1.1.1.8.2 tls if (operands[2] == const1_rtx) 1510 1.1.1.1.8.2 tls return "addq %r1,%r1,%0"; 1511 1.1.1.1.8.2 tls else 1512 1.1.1.1.8.2 tls return "s%P2addq %r1,0,%0"; 1513 1.1.1.1.8.2 tls case 1: 1514 1.1.1.1.8.2 tls return "sll %r1,%2,%0"; 1515 1.1.1.1.8.2 tls default: 1516 1.1.1.1.8.2 tls gcc_unreachable (); 1517 1.1.1.1.8.2 tls } 1518 1.1.1.1.8.2 tls } 1519 1.1.1.1.8.2 tls [(set_attr "type" "iadd,shift")]) 1520 1.1.1.1.8.2 tls 1521 1.1.1.1.8.2 tls (define_insn "*ashldi_se" 1522 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1523 1.1.1.1.8.2 tls (sign_extend:DI 1524 1.1.1.1.8.2 tls (subreg:SI (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1525 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" "P")) 1526 1.1.1.1.8.2 tls 0)))] 1527 1.1.1.1.8.2 tls "INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3" 1528 1.1.1.1.8.2 tls { 1529 1.1.1.1.8.2 tls if (operands[2] == const1_rtx) 1530 1.1.1.1.8.2 tls return "addl %r1,%r1,%0"; 1531 1.1.1.1.8.2 tls else 1532 1.1.1.1.8.2 tls return "s%P2addl %r1,0,%0"; 1533 1.1.1.1.8.2 tls } 1534 1.1.1.1.8.2 tls [(set_attr "type" "iadd")]) 1535 1.1.1.1.8.2 tls 1536 1.1.1.1.8.2 tls (define_insn "lshrdi3" 1537 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1538 1.1.1.1.8.2 tls (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1539 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_6bit_operand" "rS")))] 1540 1.1.1.1.8.2 tls "" 1541 1.1.1.1.8.2 tls "srl %r1,%2,%0" 1542 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1543 1.1.1.1.8.2 tls 1544 1.1.1.1.8.2 tls (define_insn "ashrdi3" 1545 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1546 1.1.1.1.8.2 tls (ashiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1547 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_6bit_operand" "rS")))] 1548 1.1.1.1.8.2 tls "" 1549 1.1.1.1.8.2 tls "sra %r1,%2,%0" 1550 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1551 1.1.1.1.8.2 tls 1552 1.1.1.1.8.2 tls (define_expand "extendqihi2" 1553 1.1.1.1.8.2 tls [(set (match_dup 2) 1554 1.1.1.1.8.2 tls (ashift:DI (match_operand:QI 1 "some_operand" "") 1555 1.1.1.1.8.2 tls (const_int 56))) 1556 1.1.1.1.8.2 tls (set (match_operand:HI 0 "register_operand" "") 1557 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 2) 1558 1.1.1.1.8.2 tls (const_int 56)))] 1559 1.1.1.1.8.2 tls "" 1560 1.1.1.1.8.2 tls { 1561 1.1.1.1.8.2 tls if (TARGET_BWX) 1562 1.1.1.1.8.2 tls { 1563 1.1.1.1.8.2 tls emit_insn (gen_extendqihi2x (operands[0], 1564 1.1.1.1.8.2 tls force_reg (QImode, operands[1]))); 1565 1.1.1.1.8.2 tls DONE; 1566 1.1.1.1.8.2 tls } 1567 1.1.1.1.8.2 tls 1568 1.1.1.1.8.2 tls /* If we have an unaligned MEM, extend to DImode (which we do 1569 1.1.1.1.8.2 tls specially) and then copy to the result. */ 1570 1.1.1.1.8.2 tls if (unaligned_memory_operand (operands[1], HImode)) 1571 1.1.1.1.8.2 tls { 1572 1.1.1.1.8.2 tls rtx temp = gen_reg_rtx (DImode); 1573 1.1.1.1.8.2 tls 1574 1.1.1.1.8.2 tls emit_insn (gen_extendqidi2 (temp, operands[1])); 1575 1.1.1.1.8.2 tls emit_move_insn (operands[0], gen_lowpart (HImode, temp)); 1576 1.1.1.1.8.2 tls DONE; 1577 1.1.1.1.8.2 tls } 1578 1.1.1.1.8.2 tls 1579 1.1.1.1.8.2 tls operands[0] = gen_lowpart (DImode, operands[0]); 1580 1.1.1.1.8.2 tls operands[1] = gen_lowpart (DImode, force_reg (QImode, operands[1])); 1581 1.1.1.1.8.2 tls operands[2] = gen_reg_rtx (DImode); 1582 1.1.1.1.8.2 tls }) 1583 1.1.1.1.8.2 tls 1584 1.1.1.1.8.2 tls (define_insn "extendqidi2x" 1585 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1586 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:QI 1 "register_operand" "r")))] 1587 1.1.1.1.8.2 tls "TARGET_BWX" 1588 1.1.1.1.8.2 tls "sextb %1,%0" 1589 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1590 1.1.1.1.8.2 tls 1591 1.1.1.1.8.2 tls (define_insn "extendhidi2x" 1592 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1593 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:HI 1 "register_operand" "r")))] 1594 1.1.1.1.8.2 tls "TARGET_BWX" 1595 1.1.1.1.8.2 tls "sextw %1,%0" 1596 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1597 1.1.1.1.8.2 tls 1598 1.1.1.1.8.2 tls (define_insn "extendqisi2x" 1599 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1600 1.1.1.1.8.2 tls (sign_extend:SI (match_operand:QI 1 "register_operand" "r")))] 1601 1.1.1.1.8.2 tls "TARGET_BWX" 1602 1.1.1.1.8.2 tls "sextb %1,%0" 1603 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1604 1.1.1.1.8.2 tls 1605 1.1.1.1.8.2 tls (define_insn "extendhisi2x" 1606 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 1607 1.1.1.1.8.2 tls (sign_extend:SI (match_operand:HI 1 "register_operand" "r")))] 1608 1.1.1.1.8.2 tls "TARGET_BWX" 1609 1.1.1.1.8.2 tls "sextw %1,%0" 1610 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1611 1.1.1.1.8.2 tls 1612 1.1.1.1.8.2 tls (define_insn "extendqihi2x" 1613 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r") 1614 1.1.1.1.8.2 tls (sign_extend:HI (match_operand:QI 1 "register_operand" "r")))] 1615 1.1.1.1.8.2 tls "TARGET_BWX" 1616 1.1.1.1.8.2 tls "sextb %1,%0" 1617 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1618 1.1.1.1.8.2 tls 1619 1.1.1.1.8.2 tls (define_expand "extendqisi2" 1620 1.1.1.1.8.2 tls [(set (match_dup 2) 1621 1.1.1.1.8.2 tls (ashift:DI (match_operand:QI 1 "some_operand" "") 1622 1.1.1.1.8.2 tls (const_int 56))) 1623 1.1.1.1.8.2 tls (set (match_operand:SI 0 "register_operand" "") 1624 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 2) 1625 1.1.1.1.8.2 tls (const_int 56)))] 1626 1.1.1.1.8.2 tls "" 1627 1.1.1.1.8.2 tls { 1628 1.1.1.1.8.2 tls if (TARGET_BWX) 1629 1.1.1.1.8.2 tls { 1630 1.1.1.1.8.2 tls emit_insn (gen_extendqisi2x (operands[0], 1631 1.1.1.1.8.2 tls force_reg (QImode, operands[1]))); 1632 1.1.1.1.8.2 tls DONE; 1633 1.1.1.1.8.2 tls } 1634 1.1.1.1.8.2 tls 1635 1.1.1.1.8.2 tls /* If we have an unaligned MEM, extend to a DImode form of 1636 1.1.1.1.8.2 tls the result (which we do specially). */ 1637 1.1.1.1.8.2 tls if (unaligned_memory_operand (operands[1], QImode)) 1638 1.1.1.1.8.2 tls { 1639 1.1.1.1.8.2 tls rtx temp = gen_reg_rtx (DImode); 1640 1.1.1.1.8.2 tls 1641 1.1.1.1.8.2 tls emit_insn (gen_extendqidi2 (temp, operands[1])); 1642 1.1.1.1.8.2 tls emit_move_insn (operands[0], gen_lowpart (SImode, temp)); 1643 1.1.1.1.8.2 tls DONE; 1644 1.1.1.1.8.2 tls } 1645 1.1.1.1.8.2 tls 1646 1.1.1.1.8.2 tls operands[0] = gen_lowpart (DImode, operands[0]); 1647 1.1.1.1.8.2 tls operands[1] = gen_lowpart (DImode, force_reg (QImode, operands[1])); 1648 1.1.1.1.8.2 tls operands[2] = gen_reg_rtx (DImode); 1649 1.1.1.1.8.2 tls }) 1650 1.1.1.1.8.2 tls 1651 1.1.1.1.8.2 tls (define_expand "extendqidi2" 1652 1.1.1.1.8.2 tls [(set (match_dup 2) 1653 1.1.1.1.8.2 tls (ashift:DI (match_operand:QI 1 "some_operand" "") 1654 1.1.1.1.8.2 tls (const_int 56))) 1655 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 1656 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 2) 1657 1.1.1.1.8.2 tls (const_int 56)))] 1658 1.1.1.1.8.2 tls "" 1659 1.1.1.1.8.2 tls { 1660 1.1.1.1.8.2 tls if (TARGET_BWX) 1661 1.1.1.1.8.2 tls { 1662 1.1.1.1.8.2 tls emit_insn (gen_extendqidi2x (operands[0], 1663 1.1.1.1.8.2 tls force_reg (QImode, operands[1]))); 1664 1.1.1.1.8.2 tls DONE; 1665 1.1.1.1.8.2 tls } 1666 1.1.1.1.8.2 tls 1667 1.1.1.1.8.2 tls if (unaligned_memory_operand (operands[1], QImode)) 1668 1.1.1.1.8.2 tls { 1669 1.1.1.1.8.2 tls rtx seq = gen_unaligned_extendqidi (operands[0], XEXP (operands[1], 0)); 1670 1.1.1.1.8.2 tls alpha_set_memflags (seq, operands[1]); 1671 1.1.1.1.8.2 tls emit_insn (seq); 1672 1.1.1.1.8.2 tls DONE; 1673 1.1.1.1.8.2 tls } 1674 1.1.1.1.8.2 tls 1675 1.1.1.1.8.2 tls operands[1] = gen_lowpart (DImode, force_reg (QImode, operands[1])); 1676 1.1.1.1.8.2 tls operands[2] = gen_reg_rtx (DImode); 1677 1.1.1.1.8.2 tls }) 1678 1.1.1.1.8.2 tls 1679 1.1.1.1.8.2 tls (define_expand "extendhisi2" 1680 1.1.1.1.8.2 tls [(set (match_dup 2) 1681 1.1.1.1.8.2 tls (ashift:DI (match_operand:HI 1 "some_operand" "") 1682 1.1.1.1.8.2 tls (const_int 48))) 1683 1.1.1.1.8.2 tls (set (match_operand:SI 0 "register_operand" "") 1684 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 2) 1685 1.1.1.1.8.2 tls (const_int 48)))] 1686 1.1.1.1.8.2 tls "" 1687 1.1.1.1.8.2 tls { 1688 1.1.1.1.8.2 tls if (TARGET_BWX) 1689 1.1.1.1.8.2 tls { 1690 1.1.1.1.8.2 tls emit_insn (gen_extendhisi2x (operands[0], 1691 1.1.1.1.8.2 tls force_reg (HImode, operands[1]))); 1692 1.1.1.1.8.2 tls DONE; 1693 1.1.1.1.8.2 tls } 1694 1.1.1.1.8.2 tls 1695 1.1.1.1.8.2 tls /* If we have an unaligned MEM, extend to a DImode form of 1696 1.1.1.1.8.2 tls the result (which we do specially). */ 1697 1.1.1.1.8.2 tls if (unaligned_memory_operand (operands[1], HImode)) 1698 1.1.1.1.8.2 tls { 1699 1.1.1.1.8.2 tls rtx temp = gen_reg_rtx (DImode); 1700 1.1.1.1.8.2 tls 1701 1.1.1.1.8.2 tls emit_insn (gen_extendhidi2 (temp, operands[1])); 1702 1.1.1.1.8.2 tls emit_move_insn (operands[0], gen_lowpart (SImode, temp)); 1703 1.1.1.1.8.2 tls DONE; 1704 1.1.1.1.8.2 tls } 1705 1.1.1.1.8.2 tls 1706 1.1.1.1.8.2 tls operands[0] = gen_lowpart (DImode, operands[0]); 1707 1.1.1.1.8.2 tls operands[1] = gen_lowpart (DImode, force_reg (HImode, operands[1])); 1708 1.1.1.1.8.2 tls operands[2] = gen_reg_rtx (DImode); 1709 1.1.1.1.8.2 tls }) 1710 1.1.1.1.8.2 tls 1711 1.1.1.1.8.2 tls (define_expand "extendhidi2" 1712 1.1.1.1.8.2 tls [(set (match_dup 2) 1713 1.1.1.1.8.2 tls (ashift:DI (match_operand:HI 1 "some_operand" "") 1714 1.1.1.1.8.2 tls (const_int 48))) 1715 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 1716 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 2) 1717 1.1.1.1.8.2 tls (const_int 48)))] 1718 1.1.1.1.8.2 tls "" 1719 1.1.1.1.8.2 tls { 1720 1.1.1.1.8.2 tls if (TARGET_BWX) 1721 1.1.1.1.8.2 tls { 1722 1.1.1.1.8.2 tls emit_insn (gen_extendhidi2x (operands[0], 1723 1.1.1.1.8.2 tls force_reg (HImode, operands[1]))); 1724 1.1.1.1.8.2 tls DONE; 1725 1.1.1.1.8.2 tls } 1726 1.1.1.1.8.2 tls 1727 1.1.1.1.8.2 tls if (unaligned_memory_operand (operands[1], HImode)) 1728 1.1.1.1.8.2 tls { 1729 1.1.1.1.8.2 tls rtx seq = gen_unaligned_extendhidi (operands[0], XEXP (operands[1], 0)); 1730 1.1.1.1.8.2 tls 1731 1.1.1.1.8.2 tls alpha_set_memflags (seq, operands[1]); 1732 1.1.1.1.8.2 tls emit_insn (seq); 1733 1.1.1.1.8.2 tls DONE; 1734 1.1.1.1.8.2 tls } 1735 1.1.1.1.8.2 tls 1736 1.1.1.1.8.2 tls operands[1] = gen_lowpart (DImode, force_reg (HImode, operands[1])); 1737 1.1.1.1.8.2 tls operands[2] = gen_reg_rtx (DImode); 1738 1.1.1.1.8.2 tls }) 1739 1.1.1.1.8.2 tls 1740 1.1.1.1.8.2 tls ;; Here's how we sign extend an unaligned byte and halfword. Doing this 1741 1.1.1.1.8.2 tls ;; as a pattern saves one instruction. The code is similar to that for 1742 1.1.1.1.8.2 tls ;; the unaligned loads (see below). 1743 1.1.1.1.8.2 tls ;; 1744 1.1.1.1.8.2 tls ;; Operand 1 is the address, operand 0 is the result. 1745 1.1.1.1.8.2 tls (define_expand "unaligned_extendqidi" 1746 1.1.1.1.8.2 tls [(use (match_operand:QI 0 "register_operand" "")) 1747 1.1.1.1.8.2 tls (use (match_operand:DI 1 "address_operand" ""))] 1748 1.1.1.1.8.2 tls "" 1749 1.1.1.1.8.2 tls { 1750 1.1.1.1.8.2 tls operands[0] = gen_lowpart (DImode, operands[0]); 1751 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 1752 1.1.1.1.8.2 tls emit_insn (gen_unaligned_extendqidi_be (operands[0], operands[1])); 1753 1.1.1.1.8.2 tls else 1754 1.1.1.1.8.2 tls emit_insn (gen_unaligned_extendqidi_le (operands[0], operands[1])); 1755 1.1.1.1.8.2 tls DONE; 1756 1.1.1.1.8.2 tls }) 1757 1.1.1.1.8.2 tls 1758 1.1.1.1.8.2 tls (define_expand "unaligned_extendqidi_le" 1759 1.1.1.1.8.2 tls [(set (match_dup 3) 1760 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "" "") (const_int -8)))) 1761 1.1.1.1.8.2 tls (set (match_dup 4) 1762 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) 1763 1.1.1.1.8.2 tls (minus:DI (const_int 64) 1764 1.1.1.1.8.2 tls (ashift:DI 1765 1.1.1.1.8.2 tls (and:DI (match_dup 2) (const_int 7)) 1766 1.1.1.1.8.2 tls (const_int 3))))) 1767 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 1768 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 4) (const_int 56)))] 1769 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1770 1.1.1.1.8.2 tls { 1771 1.1.1.1.8.2 tls operands[2] = get_unaligned_offset (operands[1], 1); 1772 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 1773 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 1774 1.1.1.1.8.2 tls }) 1775 1.1.1.1.8.2 tls 1776 1.1.1.1.8.2 tls (define_expand "unaligned_extendqidi_be" 1777 1.1.1.1.8.2 tls [(set (match_dup 3) 1778 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "" "") (const_int -8)))) 1779 1.1.1.1.8.2 tls (set (match_dup 4) 1780 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) 1781 1.1.1.1.8.2 tls (ashift:DI 1782 1.1.1.1.8.2 tls (and:DI 1783 1.1.1.1.8.2 tls (plus:DI (match_dup 2) (const_int 1)) 1784 1.1.1.1.8.2 tls (const_int 7)) 1785 1.1.1.1.8.2 tls (const_int 3)))) 1786 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 1787 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 4) (const_int 56)))] 1788 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 1789 1.1.1.1.8.2 tls { 1790 1.1.1.1.8.2 tls operands[2] = get_unaligned_offset (operands[1], -1); 1791 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 1792 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 1793 1.1.1.1.8.2 tls }) 1794 1.1.1.1.8.2 tls 1795 1.1.1.1.8.2 tls (define_expand "unaligned_extendhidi" 1796 1.1.1.1.8.2 tls [(use (match_operand:QI 0 "register_operand" "")) 1797 1.1.1.1.8.2 tls (use (match_operand:DI 1 "address_operand" ""))] 1798 1.1.1.1.8.2 tls "" 1799 1.1.1.1.8.2 tls { 1800 1.1.1.1.8.2 tls operands[0] = gen_lowpart (DImode, operands[0]); 1801 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 1802 1.1.1.1.8.2 tls emit_insn (gen_unaligned_extendhidi_be (operands[0], operands[1])); 1803 1.1.1.1.8.2 tls else 1804 1.1.1.1.8.2 tls emit_insn (gen_unaligned_extendhidi_le (operands[0], operands[1])); 1805 1.1.1.1.8.2 tls DONE; 1806 1.1.1.1.8.2 tls }) 1807 1.1.1.1.8.2 tls 1808 1.1.1.1.8.2 tls (define_expand "unaligned_extendhidi_le" 1809 1.1.1.1.8.2 tls [(set (match_dup 3) 1810 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "" "") (const_int -8)))) 1811 1.1.1.1.8.2 tls (set (match_dup 4) 1812 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) 1813 1.1.1.1.8.2 tls (minus:DI (const_int 64) 1814 1.1.1.1.8.2 tls (ashift:DI 1815 1.1.1.1.8.2 tls (and:DI (match_dup 2) (const_int 7)) 1816 1.1.1.1.8.2 tls (const_int 3))))) 1817 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 1818 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 4) (const_int 48)))] 1819 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1820 1.1.1.1.8.2 tls { 1821 1.1.1.1.8.2 tls operands[2] = get_unaligned_offset (operands[1], 2); 1822 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 1823 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 1824 1.1.1.1.8.2 tls }) 1825 1.1.1.1.8.2 tls 1826 1.1.1.1.8.2 tls (define_expand "unaligned_extendhidi_be" 1827 1.1.1.1.8.2 tls [(set (match_dup 3) 1828 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "" "") (const_int -8)))) 1829 1.1.1.1.8.2 tls (set (match_dup 4) 1830 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) 1831 1.1.1.1.8.2 tls (ashift:DI 1832 1.1.1.1.8.2 tls (and:DI 1833 1.1.1.1.8.2 tls (plus:DI (match_dup 2) (const_int 1)) 1834 1.1.1.1.8.2 tls (const_int 7)) 1835 1.1.1.1.8.2 tls (const_int 3)))) 1836 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 1837 1.1.1.1.8.2 tls (ashiftrt:DI (match_dup 4) (const_int 48)))] 1838 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 1839 1.1.1.1.8.2 tls { 1840 1.1.1.1.8.2 tls operands[2] = get_unaligned_offset (operands[1], -1); 1841 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 1842 1.1.1.1.8.2 tls operands[4] = gen_reg_rtx (DImode); 1843 1.1.1.1.8.2 tls }) 1844 1.1.1.1.8.2 tls 1845 1.1.1.1.8.2 tls (define_insn "*extxl_const" 1846 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1847 1.1.1.1.8.2 tls (zero_extract:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1848 1.1.1.1.8.2 tls (match_operand:DI 2 "mode_width_operand" "n") 1849 1.1.1.1.8.2 tls (match_operand:DI 3 "mul8_operand" "I")))] 1850 1.1.1.1.8.2 tls "" 1851 1.1.1.1.8.2 tls "ext%M2l %r1,%s3,%0" 1852 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1853 1.1.1.1.8.2 tls 1854 1.1.1.1.8.2 tls (define_insn "extxl_le" 1855 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1856 1.1.1.1.8.2 tls (zero_extract:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1857 1.1.1.1.8.2 tls (match_operand:DI 2 "mode_width_operand" "n") 1858 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 3 "reg_or_8bit_operand" "rI") 1859 1.1.1.1.8.2 tls (const_int 3))))] 1860 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1861 1.1.1.1.8.2 tls "ext%M2l %r1,%3,%0" 1862 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1863 1.1.1.1.8.2 tls 1864 1.1.1.1.8.2 tls (define_insn "extxl_be" 1865 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1866 1.1.1.1.8.2 tls (zero_extract:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1867 1.1.1.1.8.2 tls (match_operand:DI 2 "mode_width_operand" "n") 1868 1.1.1.1.8.2 tls (minus:DI 1869 1.1.1.1.8.2 tls (const_int 56) 1870 1.1.1.1.8.2 tls (ashift:DI 1871 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "rI") 1872 1.1.1.1.8.2 tls (const_int 3)))))] 1873 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 1874 1.1.1.1.8.2 tls "ext%M2l %r1,%3,%0" 1875 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1876 1.1.1.1.8.2 tls 1877 1.1.1.1.8.2 tls ;; Combine has some strange notion of preserving existing undefined behavior 1878 1.1.1.1.8.2 tls ;; in shifts larger than a word size. So capture these patterns that it 1879 1.1.1.1.8.2 tls ;; should have turned into zero_extracts. 1880 1.1.1.1.8.2 tls 1881 1.1.1.1.8.2 tls (define_insn "*extxl_1_le" 1882 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1883 1.1.1.1.8.2 tls (and:DI (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1884 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1885 1.1.1.1.8.2 tls (const_int 3))) 1886 1.1.1.1.8.2 tls (match_operand:DI 3 "mode_mask_operand" "n")))] 1887 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1888 1.1.1.1.8.2 tls "ext%U3l %1,%2,%0" 1889 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1890 1.1.1.1.8.2 tls 1891 1.1.1.1.8.2 tls (define_insn "*extxl_1_be" 1892 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1893 1.1.1.1.8.2 tls (and:DI (lshiftrt:DI 1894 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ") 1895 1.1.1.1.8.2 tls (minus:DI (const_int 56) 1896 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1897 1.1.1.1.8.2 tls (const_int 3)))) 1898 1.1.1.1.8.2 tls (match_operand:DI 3 "mode_mask_operand" "n")))] 1899 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 1900 1.1.1.1.8.2 tls "ext%U3l %1,%2,%0" 1901 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1902 1.1.1.1.8.2 tls 1903 1.1.1.1.8.2 tls (define_insn "*extql_2_le" 1904 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1905 1.1.1.1.8.2 tls (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1906 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1907 1.1.1.1.8.2 tls (const_int 3))))] 1908 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1909 1.1.1.1.8.2 tls "extql %1,%2,%0" 1910 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1911 1.1.1.1.8.2 tls 1912 1.1.1.1.8.2 tls (define_insn "*extql_2_be" 1913 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1914 1.1.1.1.8.2 tls (lshiftrt:DI 1915 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ") 1916 1.1.1.1.8.2 tls (minus:DI (const_int 56) 1917 1.1.1.1.8.2 tls (ashift:DI 1918 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1919 1.1.1.1.8.2 tls (const_int 3)))))] 1920 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 1921 1.1.1.1.8.2 tls "extql %1,%2,%0" 1922 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1923 1.1.1.1.8.2 tls 1924 1.1.1.1.8.2 tls (define_insn "extqh_le" 1925 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1926 1.1.1.1.8.2 tls (ashift:DI 1927 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ") 1928 1.1.1.1.8.2 tls (minus:DI (const_int 64) 1929 1.1.1.1.8.2 tls (ashift:DI 1930 1.1.1.1.8.2 tls (and:DI 1931 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1932 1.1.1.1.8.2 tls (const_int 7)) 1933 1.1.1.1.8.2 tls (const_int 3)))))] 1934 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1935 1.1.1.1.8.2 tls "extqh %r1,%2,%0" 1936 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1937 1.1.1.1.8.2 tls 1938 1.1.1.1.8.2 tls (define_insn "extqh_be" 1939 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1940 1.1.1.1.8.2 tls (ashift:DI 1941 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ") 1942 1.1.1.1.8.2 tls (ashift:DI 1943 1.1.1.1.8.2 tls (and:DI 1944 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1945 1.1.1.1.8.2 tls (const_int 1)) 1946 1.1.1.1.8.2 tls (const_int 7)) 1947 1.1.1.1.8.2 tls (const_int 3))))] 1948 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 1949 1.1.1.1.8.2 tls "extqh %r1,%2,%0" 1950 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1951 1.1.1.1.8.2 tls 1952 1.1.1.1.8.2 tls (define_insn "extlh_le" 1953 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1954 1.1.1.1.8.2 tls (ashift:DI 1955 1.1.1.1.8.2 tls (and:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1956 1.1.1.1.8.2 tls (const_int 2147483647)) 1957 1.1.1.1.8.2 tls (minus:DI (const_int 64) 1958 1.1.1.1.8.2 tls (ashift:DI 1959 1.1.1.1.8.2 tls (and:DI 1960 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1961 1.1.1.1.8.2 tls (const_int 7)) 1962 1.1.1.1.8.2 tls (const_int 3)))))] 1963 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1964 1.1.1.1.8.2 tls "extlh %r1,%2,%0" 1965 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1966 1.1.1.1.8.2 tls 1967 1.1.1.1.8.2 tls (define_insn "extlh_be" 1968 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1969 1.1.1.1.8.2 tls (and:DI 1970 1.1.1.1.8.2 tls (ashift:DI 1971 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ") 1972 1.1.1.1.8.2 tls (ashift:DI 1973 1.1.1.1.8.2 tls (and:DI 1974 1.1.1.1.8.2 tls (plus:DI 1975 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1976 1.1.1.1.8.2 tls (const_int 1)) 1977 1.1.1.1.8.2 tls (const_int 7)) 1978 1.1.1.1.8.2 tls (const_int 3))) 1979 1.1.1.1.8.2 tls (const_int 2147483647)))] 1980 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 1981 1.1.1.1.8.2 tls "extlh %r1,%2,%0" 1982 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1983 1.1.1.1.8.2 tls 1984 1.1.1.1.8.2 tls (define_insn "extwh_le" 1985 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 1986 1.1.1.1.8.2 tls (ashift:DI 1987 1.1.1.1.8.2 tls (and:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 1988 1.1.1.1.8.2 tls (const_int 65535)) 1989 1.1.1.1.8.2 tls (minus:DI (const_int 64) 1990 1.1.1.1.8.2 tls (ashift:DI 1991 1.1.1.1.8.2 tls (and:DI 1992 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI") 1993 1.1.1.1.8.2 tls (const_int 7)) 1994 1.1.1.1.8.2 tls (const_int 3)))))] 1995 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 1996 1.1.1.1.8.2 tls "extwh %r1,%2,%0" 1997 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 1998 1.1.1.1.8.2 tls 1999 1.1.1.1.8.2 tls (define_insn "extwh_be" 2000 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2001 1.1.1.1.8.2 tls (and:DI 2002 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 2003 1.1.1.1.8.2 tls (ashift:DI 2004 1.1.1.1.8.2 tls (and:DI 2005 1.1.1.1.8.2 tls (plus:DI 2006 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2007 1.1.1.1.8.2 tls (const_int 1)) 2008 1.1.1.1.8.2 tls (const_int 7)) 2009 1.1.1.1.8.2 tls (const_int 3))) 2010 1.1.1.1.8.2 tls (const_int 65535)))] 2011 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 2012 1.1.1.1.8.2 tls "extwh %r1,%2,%0" 2013 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2014 1.1.1.1.8.2 tls 2015 1.1.1.1.8.2 tls ;; This converts an extXl into an extXh with an appropriate adjustment 2016 1.1.1.1.8.2 tls ;; to the address calculation. 2017 1.1.1.1.8.2 tls 2018 1.1.1.1.8.2 tls ;;(define_split 2019 1.1.1.1.8.2 tls ;; [(set (match_operand:DI 0 "register_operand" "") 2020 1.1.1.1.8.2 tls ;; (ashift:DI (zero_extract:DI (match_operand:DI 1 "register_operand" "") 2021 1.1.1.1.8.2 tls ;; (match_operand:DI 2 "mode_width_operand" "") 2022 1.1.1.1.8.2 tls ;; (ashift:DI (match_operand:DI 3 "" "") 2023 1.1.1.1.8.2 tls ;; (const_int 3))) 2024 1.1.1.1.8.2 tls ;; (match_operand:DI 4 "const_int_operand" ""))) 2025 1.1.1.1.8.2 tls ;; (clobber (match_operand:DI 5 "register_operand" ""))] 2026 1.1.1.1.8.2 tls ;; "INTVAL (operands[4]) == 64 - INTVAL (operands[2])" 2027 1.1.1.1.8.2 tls ;; [(set (match_dup 5) (match_dup 6)) 2028 1.1.1.1.8.2 tls ;; (set (match_dup 0) 2029 1.1.1.1.8.2 tls ;; (ashift:DI (zero_extract:DI (match_dup 1) (match_dup 2) 2030 1.1.1.1.8.2 tls ;; (ashift:DI (plus:DI (match_dup 5) 2031 1.1.1.1.8.2 tls ;; (match_dup 7)) 2032 1.1.1.1.8.2 tls ;; (const_int 3))) 2033 1.1.1.1.8.2 tls ;; (match_dup 4)))] 2034 1.1.1.1.8.2 tls ;; " 2035 1.1.1.1.8.2 tls ;;{ 2036 1.1.1.1.8.2 tls ;; operands[6] = plus_constant (operands[3], 2037 1.1.1.1.8.2 tls ;; INTVAL (operands[2]) / BITS_PER_UNIT); 2038 1.1.1.1.8.2 tls ;; operands[7] = GEN_INT (- INTVAL (operands[2]) / BITS_PER_UNIT); 2039 1.1.1.1.8.2 tls ;;}") 2040 1.1.1.1.8.2 tls 2041 1.1.1.1.8.2 tls (define_insn "*insbl_const" 2042 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2043 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r")) 2044 1.1.1.1.8.2 tls (match_operand:DI 2 "mul8_operand" "I")))] 2045 1.1.1.1.8.2 tls "" 2046 1.1.1.1.8.2 tls "insbl %1,%s2,%0" 2047 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2048 1.1.1.1.8.2 tls 2049 1.1.1.1.8.2 tls (define_insn "inswl_const" 2050 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2051 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:HI 1 "register_operand" "r")) 2052 1.1.1.1.8.2 tls (match_operand:DI 2 "mul8_operand" "I")))] 2053 1.1.1.1.8.2 tls "" 2054 1.1.1.1.8.2 tls "inswl %1,%s2,%0" 2055 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2056 1.1.1.1.8.2 tls 2057 1.1.1.1.8.2 tls (define_insn "*insll_const" 2058 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2059 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) 2060 1.1.1.1.8.2 tls (match_operand:DI 2 "mul8_operand" "I")))] 2061 1.1.1.1.8.2 tls "" 2062 1.1.1.1.8.2 tls "insll %1,%s2,%0" 2063 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2064 1.1.1.1.8.2 tls 2065 1.1.1.1.8.2 tls (define_insn "insbl_le" 2066 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2067 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r")) 2068 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2069 1.1.1.1.8.2 tls (const_int 3))))] 2070 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 2071 1.1.1.1.8.2 tls "insbl %1,%2,%0" 2072 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2073 1.1.1.1.8.2 tls 2074 1.1.1.1.8.2 tls (define_insn "insbl_be" 2075 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2076 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "r")) 2077 1.1.1.1.8.2 tls (minus:DI (const_int 56) 2078 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2079 1.1.1.1.8.2 tls (const_int 3)))))] 2080 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 2081 1.1.1.1.8.2 tls "insbl %1,%2,%0" 2082 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2083 1.1.1.1.8.2 tls 2084 1.1.1.1.8.2 tls (define_insn "inswl_le" 2085 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2086 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:HI 1 "register_operand" "r")) 2087 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2088 1.1.1.1.8.2 tls (const_int 3))))] 2089 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 2090 1.1.1.1.8.2 tls "inswl %1,%2,%0" 2091 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2092 1.1.1.1.8.2 tls 2093 1.1.1.1.8.2 tls (define_insn "inswl_be" 2094 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2095 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:HI 1 "register_operand" "r")) 2096 1.1.1.1.8.2 tls (minus:DI (const_int 56) 2097 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2098 1.1.1.1.8.2 tls (const_int 3)))))] 2099 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 2100 1.1.1.1.8.2 tls "inswl %1,%2,%0" 2101 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2102 1.1.1.1.8.2 tls 2103 1.1.1.1.8.2 tls (define_insn "insll_le" 2104 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2105 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) 2106 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2107 1.1.1.1.8.2 tls (const_int 3))))] 2108 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 2109 1.1.1.1.8.2 tls "insll %1,%2,%0" 2110 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2111 1.1.1.1.8.2 tls 2112 1.1.1.1.8.2 tls (define_insn "insll_be" 2113 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2114 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) 2115 1.1.1.1.8.2 tls (minus:DI (const_int 56) 2116 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2117 1.1.1.1.8.2 tls (const_int 3)))))] 2118 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 2119 1.1.1.1.8.2 tls "insll %1,%2,%0" 2120 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2121 1.1.1.1.8.2 tls 2122 1.1.1.1.8.2 tls (define_insn "insql_le" 2123 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2124 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 1 "register_operand" "r") 2125 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2126 1.1.1.1.8.2 tls (const_int 3))))] 2127 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 2128 1.1.1.1.8.2 tls "insql %1,%2,%0" 2129 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2130 1.1.1.1.8.2 tls 2131 1.1.1.1.8.2 tls (define_insn "insql_be" 2132 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2133 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 1 "register_operand" "r") 2134 1.1.1.1.8.2 tls (minus:DI (const_int 56) 2135 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") 2136 1.1.1.1.8.2 tls (const_int 3)))))] 2137 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 2138 1.1.1.1.8.2 tls "insql %1,%2,%0" 2139 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2140 1.1.1.1.8.2 tls 2141 1.1.1.1.8.2 tls ;; Combine has this sometimes habit of moving the and outside of the 2142 1.1.1.1.8.2 tls ;; shift, making life more interesting. 2143 1.1.1.1.8.2 tls 2144 1.1.1.1.8.2 tls (define_insn "*insxl" 2145 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2146 1.1.1.1.8.2 tls (and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r") 2147 1.1.1.1.8.2 tls (match_operand:DI 2 "mul8_operand" "I")) 2148 1.1.1.1.8.2 tls (match_operand:DI 3 "immediate_operand" "i")))] 2149 1.1.1.1.8.2 tls "HOST_BITS_PER_WIDE_INT == 64 2150 1.1.1.1.8.2 tls && CONST_INT_P (operands[3]) 2151 1.1.1.1.8.2 tls && (((unsigned HOST_WIDE_INT) 0xff << INTVAL (operands[2]) 2152 1.1.1.1.8.2 tls == (unsigned HOST_WIDE_INT) INTVAL (operands[3])) 2153 1.1.1.1.8.2 tls || ((unsigned HOST_WIDE_INT) 0xffff << INTVAL (operands[2]) 2154 1.1.1.1.8.2 tls == (unsigned HOST_WIDE_INT) INTVAL (operands[3])) 2155 1.1.1.1.8.2 tls || ((unsigned HOST_WIDE_INT) 0xffffffff << INTVAL (operands[2]) 2156 1.1.1.1.8.2 tls == (unsigned HOST_WIDE_INT) INTVAL (operands[3])))" 2157 1.1.1.1.8.2 tls { 2158 1.1.1.1.8.2 tls #if HOST_BITS_PER_WIDE_INT == 64 2159 1.1.1.1.8.2 tls if ((unsigned HOST_WIDE_INT) 0xff << INTVAL (operands[2]) 2160 1.1.1.1.8.2 tls == (unsigned HOST_WIDE_INT) INTVAL (operands[3])) 2161 1.1.1.1.8.2 tls return "insbl %1,%s2,%0"; 2162 1.1.1.1.8.2 tls if ((unsigned HOST_WIDE_INT) 0xffff << INTVAL (operands[2]) 2163 1.1.1.1.8.2 tls == (unsigned HOST_WIDE_INT) INTVAL (operands[3])) 2164 1.1.1.1.8.2 tls return "inswl %1,%s2,%0"; 2165 1.1.1.1.8.2 tls if ((unsigned HOST_WIDE_INT) 0xffffffff << INTVAL (operands[2]) 2166 1.1.1.1.8.2 tls == (unsigned HOST_WIDE_INT) INTVAL (operands[3])) 2167 1.1.1.1.8.2 tls return "insll %1,%s2,%0"; 2168 1.1.1.1.8.2 tls #endif 2169 1.1.1.1.8.2 tls gcc_unreachable (); 2170 1.1.1.1.8.2 tls } 2171 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2172 1.1.1.1.8.2 tls 2173 1.1.1.1.8.2 tls ;; We do not include the insXh insns because they are complex to express 2174 1.1.1.1.8.2 tls ;; and it does not appear that we would ever want to generate them. 2175 1.1.1.1.8.2 tls ;; 2176 1.1.1.1.8.2 tls ;; Since we need them for block moves, though, cop out and use unspec. 2177 1.1.1.1.8.2 tls 2178 1.1.1.1.8.2 tls (define_insn "insxh" 2179 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2180 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 2181 1.1.1.1.8.2 tls (match_operand:DI 2 "mode_width_operand" "n") 2182 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "rI")] 2183 1.1.1.1.8.2 tls UNSPEC_INSXH))] 2184 1.1.1.1.8.2 tls "" 2185 1.1.1.1.8.2 tls "ins%M2h %1,%3,%0" 2186 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2187 1.1.1.1.8.2 tls 2188 1.1.1.1.8.2 tls (define_insn "mskxl_le" 2189 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2190 1.1.1.1.8.2 tls (and:DI (not:DI (ashift:DI 2191 1.1.1.1.8.2 tls (match_operand:DI 2 "mode_mask_operand" "n") 2192 1.1.1.1.8.2 tls (ashift:DI 2193 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "rI") 2194 1.1.1.1.8.2 tls (const_int 3)))) 2195 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ")))] 2196 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 2197 1.1.1.1.8.2 tls "msk%U2l %r1,%3,%0" 2198 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2199 1.1.1.1.8.2 tls 2200 1.1.1.1.8.2 tls (define_insn "mskxl_be" 2201 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2202 1.1.1.1.8.2 tls (and:DI (not:DI (ashift:DI 2203 1.1.1.1.8.2 tls (match_operand:DI 2 "mode_mask_operand" "n") 2204 1.1.1.1.8.2 tls (minus:DI (const_int 56) 2205 1.1.1.1.8.2 tls (ashift:DI 2206 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "rI") 2207 1.1.1.1.8.2 tls (const_int 3))))) 2208 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ")))] 2209 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 2210 1.1.1.1.8.2 tls "msk%U2l %r1,%3,%0" 2211 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2212 1.1.1.1.8.2 tls 2213 1.1.1.1.8.2 tls ;; We do not include the mskXh insns because it does not appear we would 2214 1.1.1.1.8.2 tls ;; ever generate one. 2215 1.1.1.1.8.2 tls ;; 2216 1.1.1.1.8.2 tls ;; Again, we do for block moves and we use unspec again. 2217 1.1.1.1.8.2 tls 2218 1.1.1.1.8.2 tls (define_insn "mskxh" 2219 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2220 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 2221 1.1.1.1.8.2 tls (match_operand:DI 2 "mode_width_operand" "n") 2222 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "rI")] 2223 1.1.1.1.8.2 tls UNSPEC_MSKXH))] 2224 1.1.1.1.8.2 tls "" 2225 1.1.1.1.8.2 tls "msk%M2h %1,%3,%0" 2226 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 2227 1.1.1.1.8.2 tls 2228 1.1.1.1.8.2 tls ;; Prefer AND + NE over LSHIFTRT + AND. 2229 1.1.1.1.8.2 tls 2230 1.1.1.1.8.2 tls (define_insn_and_split "*ze_and_ne" 2231 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 2232 1.1.1.1.8.2 tls (zero_extract:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 2233 1.1.1.1.8.2 tls (const_int 1) 2234 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "I")))] 2235 1.1.1.1.8.2 tls "(unsigned HOST_WIDE_INT) INTVAL (operands[2]) < 8" 2236 1.1.1.1.8.2 tls "#" 2237 1.1.1.1.8.2 tls "(unsigned HOST_WIDE_INT) INTVAL (operands[2]) < 8" 2238 1.1.1.1.8.2 tls [(set (match_dup 0) 2239 1.1.1.1.8.2 tls (and:DI (match_dup 1) (match_dup 3))) 2240 1.1.1.1.8.2 tls (set (match_dup 0) 2241 1.1.1.1.8.2 tls (ne:DI (match_dup 0) (const_int 0)))] 2242 1.1.1.1.8.2 tls "operands[3] = GEN_INT (1 << INTVAL (operands[2]));") 2243 1.1.1.1.8.2 tls 2245 1.1.1.1.8.2 tls ;; Floating-point operations. All the double-precision insns can extend 2246 1.1.1.1.8.2 tls ;; from single, so indicate that. The exception are the ones that simply 2247 1.1.1.1.8.2 tls ;; play with the sign bits; it's not clear what to do there. 2248 1.1.1.1.8.2 tls 2249 1.1.1.1.8.2 tls (define_insn "abssf2" 2250 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2251 1.1.1.1.8.2 tls (abs:SF (match_operand:SF 1 "reg_or_0_operand" "fG")))] 2252 1.1.1.1.8.2 tls "TARGET_FP" 2253 1.1.1.1.8.2 tls "cpys $f31,%R1,%0" 2254 1.1.1.1.8.2 tls [(set_attr "type" "fcpys")]) 2255 1.1.1.1.8.2 tls 2256 1.1.1.1.8.2 tls (define_insn "*nabssf2" 2257 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2258 1.1.1.1.8.2 tls (neg:SF (abs:SF (match_operand:SF 1 "reg_or_0_operand" "fG"))))] 2259 1.1.1.1.8.2 tls "TARGET_FP" 2260 1.1.1.1.8.2 tls "cpysn $f31,%R1,%0" 2261 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2262 1.1.1.1.8.2 tls 2263 1.1.1.1.8.2 tls (define_insn "absdf2" 2264 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2265 1.1.1.1.8.2 tls (abs:DF (match_operand:DF 1 "reg_or_0_operand" "fG")))] 2266 1.1.1.1.8.2 tls "TARGET_FP" 2267 1.1.1.1.8.2 tls "cpys $f31,%R1,%0" 2268 1.1.1.1.8.2 tls [(set_attr "type" "fcpys")]) 2269 1.1.1.1.8.2 tls 2270 1.1.1.1.8.2 tls (define_insn "*nabsdf2" 2271 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2272 1.1.1.1.8.2 tls (neg:DF (abs:DF (match_operand:DF 1 "reg_or_0_operand" "fG"))))] 2273 1.1.1.1.8.2 tls "TARGET_FP" 2274 1.1.1.1.8.2 tls "cpysn $f31,%R1,%0" 2275 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2276 1.1.1.1.8.2 tls 2277 1.1.1.1.8.2 tls (define_expand "abstf2" 2278 1.1.1.1.8.2 tls [(parallel [(set (match_operand:TF 0 "register_operand" "") 2279 1.1.1.1.8.2 tls (abs:TF (match_operand:TF 1 "reg_or_0_operand" ""))) 2280 1.1.1.1.8.2 tls (use (match_dup 2))])] 2281 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2282 1.1.1.1.8.2 tls { 2283 1.1.1.1.8.2 tls #if HOST_BITS_PER_WIDE_INT >= 64 2284 1.1.1.1.8.2 tls operands[2] = force_reg (DImode, GEN_INT ((HOST_WIDE_INT) 1 << 63)); 2285 1.1.1.1.8.2 tls #else 2286 1.1.1.1.8.2 tls operands[2] = force_reg (DImode, immed_double_const (0, 0x80000000, DImode)); 2287 1.1.1.1.8.2 tls #endif 2288 1.1.1.1.8.2 tls }) 2289 1.1.1.1.8.2 tls 2290 1.1.1.1.8.2 tls (define_insn_and_split "*abstf_internal" 2291 1.1.1.1.8.2 tls [(set (match_operand:TF 0 "register_operand" "=r") 2292 1.1.1.1.8.2 tls (abs:TF (match_operand:TF 1 "reg_or_0_operand" "rG"))) 2293 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" "r"))] 2294 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2295 1.1.1.1.8.2 tls "#" 2296 1.1.1.1.8.2 tls "&& reload_completed" 2297 1.1.1.1.8.2 tls [(const_int 0)] 2298 1.1.1.1.8.2 tls "alpha_split_tfmode_frobsign (operands, gen_andnotdi3); DONE;") 2299 1.1.1.1.8.2 tls 2300 1.1.1.1.8.2 tls (define_insn "negsf2" 2301 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2302 1.1.1.1.8.2 tls (neg:SF (match_operand:SF 1 "reg_or_0_operand" "fG")))] 2303 1.1.1.1.8.2 tls "TARGET_FP" 2304 1.1.1.1.8.2 tls "cpysn %R1,%R1,%0" 2305 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2306 1.1.1.1.8.2 tls 2307 1.1.1.1.8.2 tls (define_insn "negdf2" 2308 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2309 1.1.1.1.8.2 tls (neg:DF (match_operand:DF 1 "reg_or_0_operand" "fG")))] 2310 1.1.1.1.8.2 tls "TARGET_FP" 2311 1.1.1.1.8.2 tls "cpysn %R1,%R1,%0" 2312 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2313 1.1.1.1.8.2 tls 2314 1.1.1.1.8.2 tls (define_expand "negtf2" 2315 1.1.1.1.8.2 tls [(parallel [(set (match_operand:TF 0 "register_operand" "") 2316 1.1.1.1.8.2 tls (neg:TF (match_operand:TF 1 "reg_or_0_operand" ""))) 2317 1.1.1.1.8.2 tls (use (match_dup 2))])] 2318 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2319 1.1.1.1.8.2 tls { 2320 1.1.1.1.8.2 tls #if HOST_BITS_PER_WIDE_INT >= 64 2321 1.1.1.1.8.2 tls operands[2] = force_reg (DImode, GEN_INT ((HOST_WIDE_INT) 1 << 63)); 2322 1.1.1.1.8.2 tls #else 2323 1.1.1.1.8.2 tls operands[2] = force_reg (DImode, immed_double_const (0, 0x80000000, DImode)); 2324 1.1.1.1.8.2 tls #endif 2325 1.1.1.1.8.2 tls }) 2326 1.1.1.1.8.2 tls 2327 1.1.1.1.8.2 tls (define_insn_and_split "*negtf_internal" 2328 1.1.1.1.8.2 tls [(set (match_operand:TF 0 "register_operand" "=r") 2329 1.1.1.1.8.2 tls (neg:TF (match_operand:TF 1 "reg_or_0_operand" "rG"))) 2330 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" "r"))] 2331 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2332 1.1.1.1.8.2 tls "#" 2333 1.1.1.1.8.2 tls "&& reload_completed" 2334 1.1.1.1.8.2 tls [(const_int 0)] 2335 1.1.1.1.8.2 tls "alpha_split_tfmode_frobsign (operands, gen_xordi3); DONE;") 2336 1.1.1.1.8.2 tls 2337 1.1.1.1.8.2 tls (define_insn "copysignsf3" 2338 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2339 1.1.1.1.8.2 tls (unspec:SF [(match_operand:SF 1 "reg_or_0_operand" "fG") 2340 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")] 2341 1.1.1.1.8.2 tls UNSPEC_COPYSIGN))] 2342 1.1.1.1.8.2 tls "TARGET_FP" 2343 1.1.1.1.8.2 tls "cpys %R2,%R1,%0" 2344 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2345 1.1.1.1.8.2 tls 2346 1.1.1.1.8.2 tls (define_insn "*ncopysignsf3" 2347 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2348 1.1.1.1.8.2 tls (neg:SF (unspec:SF [(match_operand:SF 1 "reg_or_0_operand" "fG") 2349 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")] 2350 1.1.1.1.8.2 tls UNSPEC_COPYSIGN)))] 2351 1.1.1.1.8.2 tls "TARGET_FP" 2352 1.1.1.1.8.2 tls "cpysn %R2,%R1,%0" 2353 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2354 1.1.1.1.8.2 tls 2355 1.1.1.1.8.2 tls (define_insn "copysigndf3" 2356 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2357 1.1.1.1.8.2 tls (unspec:DF [(match_operand:DF 1 "reg_or_0_operand" "fG") 2358 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")] 2359 1.1.1.1.8.2 tls UNSPEC_COPYSIGN))] 2360 1.1.1.1.8.2 tls "TARGET_FP" 2361 1.1.1.1.8.2 tls "cpys %R2,%R1,%0" 2362 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2363 1.1.1.1.8.2 tls 2364 1.1.1.1.8.2 tls (define_insn "*ncopysigndf3" 2365 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2366 1.1.1.1.8.2 tls (neg:DF (unspec:DF [(match_operand:DF 1 "reg_or_0_operand" "fG") 2367 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")] 2368 1.1.1.1.8.2 tls UNSPEC_COPYSIGN)))] 2369 1.1.1.1.8.2 tls "TARGET_FP" 2370 1.1.1.1.8.2 tls "cpysn %R2,%R1,%0" 2371 1.1.1.1.8.2 tls [(set_attr "type" "fadd")]) 2372 1.1.1.1.8.2 tls 2373 1.1.1.1.8.2 tls (define_insn "*addsf_ieee" 2374 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 2375 1.1.1.1.8.2 tls (plus:SF (match_operand:SF 1 "reg_or_0_operand" "%fG") 2376 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 2377 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2378 1.1.1.1.8.2 tls "add%,%/ %R1,%R2,%0" 2379 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2380 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2381 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2382 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2383 1.1.1.1.8.2 tls 2384 1.1.1.1.8.2 tls (define_insn "addsf3" 2385 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2386 1.1.1.1.8.2 tls (plus:SF (match_operand:SF 1 "reg_or_0_operand" "%fG") 2387 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 2388 1.1.1.1.8.2 tls "TARGET_FP" 2389 1.1.1.1.8.2 tls "add%,%/ %R1,%R2,%0" 2390 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2391 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2392 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2393 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2394 1.1.1.1.8.2 tls 2395 1.1.1.1.8.2 tls (define_insn "*adddf_ieee" 2396 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 2397 1.1.1.1.8.2 tls (plus:DF (match_operand:DF 1 "reg_or_0_operand" "%fG") 2398 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2399 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2400 1.1.1.1.8.2 tls "add%-%/ %R1,%R2,%0" 2401 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2402 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2403 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2404 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2405 1.1.1.1.8.2 tls 2406 1.1.1.1.8.2 tls (define_insn "adddf3" 2407 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2408 1.1.1.1.8.2 tls (plus:DF (match_operand:DF 1 "reg_or_0_operand" "%fG") 2409 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2410 1.1.1.1.8.2 tls "TARGET_FP" 2411 1.1.1.1.8.2 tls "add%-%/ %R1,%R2,%0" 2412 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2413 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2414 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2415 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2416 1.1.1.1.8.2 tls 2417 1.1.1.1.8.2 tls (define_insn "*adddf_ext1" 2418 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2419 1.1.1.1.8.2 tls (plus:DF (float_extend:DF 2420 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG")) 2421 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2422 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2423 1.1.1.1.8.2 tls "add%-%/ %R1,%R2,%0" 2424 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2425 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2426 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2427 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2428 1.1.1.1.8.2 tls 2429 1.1.1.1.8.2 tls (define_insn "*adddf_ext2" 2430 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2431 1.1.1.1.8.2 tls (plus:DF (float_extend:DF 2432 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "%fG")) 2433 1.1.1.1.8.2 tls (float_extend:DF 2434 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG"))))] 2435 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2436 1.1.1.1.8.2 tls "add%-%/ %R1,%R2,%0" 2437 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2438 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2439 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2440 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2441 1.1.1.1.8.2 tls 2442 1.1.1.1.8.2 tls (define_expand "addtf3" 2443 1.1.1.1.8.2 tls [(use (match_operand 0 "register_operand" "")) 2444 1.1.1.1.8.2 tls (use (match_operand 1 "general_operand" "")) 2445 1.1.1.1.8.2 tls (use (match_operand 2 "general_operand" ""))] 2446 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2447 1.1.1.1.8.2 tls "alpha_emit_xfloating_arith (PLUS, operands); DONE;") 2448 1.1.1.1.8.2 tls 2449 1.1.1.1.8.2 tls ;; Define conversion operators between DFmode and SImode, using the cvtql 2450 1.1.1.1.8.2 tls ;; instruction. To allow combine et al to do useful things, we keep the 2451 1.1.1.1.8.2 tls ;; operation as a unit until after reload, at which point we split the 2452 1.1.1.1.8.2 tls ;; instructions. 2453 1.1.1.1.8.2 tls ;; 2454 1.1.1.1.8.2 tls ;; Note that we (attempt to) only consider this optimization when the 2455 1.1.1.1.8.2 tls ;; ultimate destination is memory. If we will be doing further integer 2456 1.1.1.1.8.2 tls ;; processing, it is cheaper to do the truncation in the int regs. 2457 1.1.1.1.8.2 tls 2458 1.1.1.1.8.2 tls (define_insn "*cvtql" 2459 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2460 1.1.1.1.8.2 tls (unspec:SF [(match_operand:DI 1 "reg_or_0_operand" "fG")] 2461 1.1.1.1.8.2 tls UNSPEC_CVTQL))] 2462 1.1.1.1.8.2 tls "TARGET_FP" 2463 1.1.1.1.8.2 tls "cvtql%/ %R1,%0" 2464 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2465 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2466 1.1.1.1.8.2 tls (set_attr "trap_suffix" "v_sv")]) 2467 1.1.1.1.8.2 tls 2468 1.1.1.1.8.2 tls (define_insn_and_split "*fix_truncdfsi_ieee" 2469 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "memory_operand" "=m") 2470 1.1.1.1.8.2 tls (subreg:SI 2471 1.1.1.1.8.2 tls (match_operator:DI 4 "fix_operator" 2472 1.1.1.1.8.2 tls [(match_operand:DF 1 "reg_or_0_operand" "fG")]) 0)) 2473 1.1.1.1.8.2 tls (clobber (match_scratch:DI 2 "=&f")) 2474 1.1.1.1.8.2 tls (clobber (match_scratch:SF 3 "=&f"))] 2475 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2476 1.1.1.1.8.2 tls "#" 2477 1.1.1.1.8.2 tls "&& reload_completed" 2478 1.1.1.1.8.2 tls [(set (match_dup 2) (match_op_dup 4 [(match_dup 1)])) 2479 1.1.1.1.8.2 tls (set (match_dup 3) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) 2480 1.1.1.1.8.2 tls (set (match_dup 5) (match_dup 3))] 2481 1.1.1.1.8.2 tls { 2482 1.1.1.1.8.2 tls operands[5] = adjust_address (operands[0], SFmode, 0); 2483 1.1.1.1.8.2 tls } 2484 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2485 1.1.1.1.8.2 tls (set_attr "trap" "yes")]) 2486 1.1.1.1.8.2 tls 2487 1.1.1.1.8.2 tls (define_insn_and_split "*fix_truncdfsi_internal" 2488 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "memory_operand" "=m") 2489 1.1.1.1.8.2 tls (subreg:SI 2490 1.1.1.1.8.2 tls (match_operator:DI 3 "fix_operator" 2491 1.1.1.1.8.2 tls [(match_operand:DF 1 "reg_or_0_operand" "fG")]) 0)) 2492 1.1.1.1.8.2 tls (clobber (match_scratch:DI 2 "=f"))] 2493 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2494 1.1.1.1.8.2 tls "#" 2495 1.1.1.1.8.2 tls "&& reload_completed" 2496 1.1.1.1.8.2 tls [(set (match_dup 2) (match_op_dup 3 [(match_dup 1)])) 2497 1.1.1.1.8.2 tls (set (match_dup 4) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) 2498 1.1.1.1.8.2 tls (set (match_dup 5) (match_dup 4))] 2499 1.1.1.1.8.2 tls { 2500 1.1.1.1.8.2 tls operands[4] = gen_rtx_REG (SFmode, REGNO (operands[2])); 2501 1.1.1.1.8.2 tls operands[5] = adjust_address (operands[0], SFmode, 0); 2502 1.1.1.1.8.2 tls } 2503 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2504 1.1.1.1.8.2 tls (set_attr "trap" "yes")]) 2505 1.1.1.1.8.2 tls 2506 1.1.1.1.8.2 tls (define_insn "*fix_truncdfdi_ieee" 2507 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") 2508 1.1.1.1.8.2 tls (match_operator:DI 2 "fix_operator" 2509 1.1.1.1.8.2 tls [(match_operand:DF 1 "reg_or_0_operand" "fG")]))] 2510 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2511 1.1.1.1.8.2 tls "cvt%-q%/ %R1,%0" 2512 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2513 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2514 1.1.1.1.8.2 tls (set_attr "round_suffix" "c") 2515 1.1.1.1.8.2 tls (set_attr "trap_suffix" "v_sv_svi")]) 2516 1.1.1.1.8.2 tls 2517 1.1.1.1.8.2 tls (define_insn "*fix_truncdfdi2" 2518 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "=f") 2519 1.1.1.1.8.2 tls (match_operator:DI 2 "fix_operator" 2520 1.1.1.1.8.2 tls [(match_operand:DF 1 "reg_or_0_operand" "fG")]))] 2521 1.1.1.1.8.2 tls "TARGET_FP" 2522 1.1.1.1.8.2 tls "cvt%-q%/ %R1,%0" 2523 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2524 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2525 1.1.1.1.8.2 tls (set_attr "round_suffix" "c") 2526 1.1.1.1.8.2 tls (set_attr "trap_suffix" "v_sv_svi")]) 2527 1.1.1.1.8.2 tls 2528 1.1.1.1.8.2 tls (define_expand "fix_truncdfdi2" 2529 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "") 2530 1.1.1.1.8.2 tls (fix:DI (match_operand:DF 1 "reg_or_0_operand" "")))] 2531 1.1.1.1.8.2 tls "TARGET_FP" 2532 1.1.1.1.8.2 tls "") 2533 1.1.1.1.8.2 tls 2534 1.1.1.1.8.2 tls (define_expand "fixuns_truncdfdi2" 2535 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "") 2536 1.1.1.1.8.2 tls (unsigned_fix:DI (match_operand:DF 1 "reg_or_0_operand" "")))] 2537 1.1.1.1.8.2 tls "TARGET_FP" 2538 1.1.1.1.8.2 tls "") 2539 1.1.1.1.8.2 tls 2540 1.1.1.1.8.2 tls ;; Likewise between SFmode and SImode. 2541 1.1.1.1.8.2 tls 2542 1.1.1.1.8.2 tls (define_insn_and_split "*fix_truncsfsi_ieee" 2543 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "memory_operand" "=m") 2544 1.1.1.1.8.2 tls (subreg:SI 2545 1.1.1.1.8.2 tls (match_operator:DI 4 "fix_operator" 2546 1.1.1.1.8.2 tls [(float_extend:DF 2547 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG"))]) 0)) 2548 1.1.1.1.8.2 tls (clobber (match_scratch:DI 2 "=&f")) 2549 1.1.1.1.8.2 tls (clobber (match_scratch:SF 3 "=&f"))] 2550 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2551 1.1.1.1.8.2 tls "#" 2552 1.1.1.1.8.2 tls "&& reload_completed" 2553 1.1.1.1.8.2 tls [(set (match_dup 2) (match_op_dup 4 [(float_extend:DF (match_dup 1))])) 2554 1.1.1.1.8.2 tls (set (match_dup 3) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) 2555 1.1.1.1.8.2 tls (set (match_dup 5) (match_dup 3))] 2556 1.1.1.1.8.2 tls { 2557 1.1.1.1.8.2 tls operands[5] = adjust_address (operands[0], SFmode, 0); 2558 1.1.1.1.8.2 tls } 2559 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2560 1.1.1.1.8.2 tls (set_attr "trap" "yes")]) 2561 1.1.1.1.8.2 tls 2562 1.1.1.1.8.2 tls (define_insn_and_split "*fix_truncsfsi_internal" 2563 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "memory_operand" "=m") 2564 1.1.1.1.8.2 tls (subreg:SI 2565 1.1.1.1.8.2 tls (match_operator:DI 3 "fix_operator" 2566 1.1.1.1.8.2 tls [(float_extend:DF 2567 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG"))]) 0)) 2568 1.1.1.1.8.2 tls (clobber (match_scratch:DI 2 "=f"))] 2569 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2570 1.1.1.1.8.2 tls "#" 2571 1.1.1.1.8.2 tls "&& reload_completed" 2572 1.1.1.1.8.2 tls [(set (match_dup 2) (match_op_dup 3 [(float_extend:DF (match_dup 1))])) 2573 1.1.1.1.8.2 tls (set (match_dup 4) (unspec:SF [(match_dup 2)] UNSPEC_CVTQL)) 2574 1.1.1.1.8.2 tls (set (match_dup 5) (match_dup 4))] 2575 1.1.1.1.8.2 tls { 2576 1.1.1.1.8.2 tls operands[4] = gen_rtx_REG (SFmode, REGNO (operands[2])); 2577 1.1.1.1.8.2 tls operands[5] = adjust_address (operands[0], SFmode, 0); 2578 1.1.1.1.8.2 tls } 2579 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2580 1.1.1.1.8.2 tls (set_attr "trap" "yes")]) 2581 1.1.1.1.8.2 tls 2582 1.1.1.1.8.2 tls (define_insn "*fix_truncsfdi_ieee" 2583 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") 2584 1.1.1.1.8.2 tls (match_operator:DI 2 "fix_operator" 2585 1.1.1.1.8.2 tls [(float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG"))]))] 2586 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2587 1.1.1.1.8.2 tls "cvt%-q%/ %R1,%0" 2588 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2589 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2590 1.1.1.1.8.2 tls (set_attr "round_suffix" "c") 2591 1.1.1.1.8.2 tls (set_attr "trap_suffix" "v_sv_svi")]) 2592 1.1.1.1.8.2 tls 2593 1.1.1.1.8.2 tls (define_insn "*fix_truncsfdi2" 2594 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "=f") 2595 1.1.1.1.8.2 tls (match_operator:DI 2 "fix_operator" 2596 1.1.1.1.8.2 tls [(float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG"))]))] 2597 1.1.1.1.8.2 tls "TARGET_FP" 2598 1.1.1.1.8.2 tls "cvt%-q%/ %R1,%0" 2599 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2600 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2601 1.1.1.1.8.2 tls (set_attr "round_suffix" "c") 2602 1.1.1.1.8.2 tls (set_attr "trap_suffix" "v_sv_svi")]) 2603 1.1.1.1.8.2 tls 2604 1.1.1.1.8.2 tls (define_expand "fix_truncsfdi2" 2605 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "") 2606 1.1.1.1.8.2 tls (fix:DI (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" ""))))] 2607 1.1.1.1.8.2 tls "TARGET_FP" 2608 1.1.1.1.8.2 tls "") 2609 1.1.1.1.8.2 tls 2610 1.1.1.1.8.2 tls (define_expand "fixuns_truncsfdi2" 2611 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "reg_no_subreg_operand" "") 2612 1.1.1.1.8.2 tls (unsigned_fix:DI 2613 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" ""))))] 2614 1.1.1.1.8.2 tls "TARGET_FP" 2615 1.1.1.1.8.2 tls "") 2616 1.1.1.1.8.2 tls 2617 1.1.1.1.8.2 tls (define_expand "fix_trunctfdi2" 2618 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 2619 1.1.1.1.8.2 tls (use (match_operand:TF 1 "general_operand" ""))] 2620 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2621 1.1.1.1.8.2 tls "alpha_emit_xfloating_cvt (FIX, operands); DONE;") 2622 1.1.1.1.8.2 tls 2623 1.1.1.1.8.2 tls (define_expand "fixuns_trunctfdi2" 2624 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 2625 1.1.1.1.8.2 tls (use (match_operand:TF 1 "general_operand" ""))] 2626 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2627 1.1.1.1.8.2 tls "alpha_emit_xfloating_cvt (UNSIGNED_FIX, operands); DONE;") 2628 1.1.1.1.8.2 tls 2629 1.1.1.1.8.2 tls (define_insn "*floatdisf_ieee" 2630 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 2631 1.1.1.1.8.2 tls (float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] 2632 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2633 1.1.1.1.8.2 tls "cvtq%,%/ %1,%0" 2634 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2635 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2636 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2637 1.1.1.1.8.2 tls (set_attr "trap_suffix" "sui")]) 2638 1.1.1.1.8.2 tls 2639 1.1.1.1.8.2 tls (define_insn "floatdisf2" 2640 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2641 1.1.1.1.8.2 tls (float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] 2642 1.1.1.1.8.2 tls "TARGET_FP" 2643 1.1.1.1.8.2 tls "cvtq%,%/ %1,%0" 2644 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2645 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2646 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2647 1.1.1.1.8.2 tls (set_attr "trap_suffix" "sui")]) 2648 1.1.1.1.8.2 tls 2649 1.1.1.1.8.2 tls (define_insn_and_split "*floatsisf2_ieee" 2650 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 2651 1.1.1.1.8.2 tls (float:SF (match_operand:SI 1 "memory_operand" "m"))) 2652 1.1.1.1.8.2 tls (clobber (match_scratch:DI 2 "=&f")) 2653 1.1.1.1.8.2 tls (clobber (match_scratch:SF 3 "=&f"))] 2654 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2655 1.1.1.1.8.2 tls "#" 2656 1.1.1.1.8.2 tls "&& reload_completed" 2657 1.1.1.1.8.2 tls [(set (match_dup 3) (match_dup 1)) 2658 1.1.1.1.8.2 tls (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) 2659 1.1.1.1.8.2 tls (set (match_dup 0) (float:SF (match_dup 2)))] 2660 1.1.1.1.8.2 tls { 2661 1.1.1.1.8.2 tls operands[1] = adjust_address (operands[1], SFmode, 0); 2662 1.1.1.1.8.2 tls }) 2663 1.1.1.1.8.2 tls 2664 1.1.1.1.8.2 tls (define_insn_and_split "*floatsisf2" 2665 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2666 1.1.1.1.8.2 tls (float:SF (match_operand:SI 1 "memory_operand" "m")))] 2667 1.1.1.1.8.2 tls "TARGET_FP" 2668 1.1.1.1.8.2 tls "#" 2669 1.1.1.1.8.2 tls "&& reload_completed" 2670 1.1.1.1.8.2 tls [(set (match_dup 0) (match_dup 1)) 2671 1.1.1.1.8.2 tls (set (match_dup 2) (unspec:DI [(match_dup 0)] UNSPEC_CVTLQ)) 2672 1.1.1.1.8.2 tls (set (match_dup 0) (float:SF (match_dup 2)))] 2673 1.1.1.1.8.2 tls { 2674 1.1.1.1.8.2 tls operands[1] = adjust_address (operands[1], SFmode, 0); 2675 1.1.1.1.8.2 tls operands[2] = gen_rtx_REG (DImode, REGNO (operands[0])); 2676 1.1.1.1.8.2 tls }) 2677 1.1.1.1.8.2 tls 2678 1.1.1.1.8.2 tls (define_insn "*floatdidf_ieee" 2679 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 2680 1.1.1.1.8.2 tls (float:DF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] 2681 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2682 1.1.1.1.8.2 tls "cvtq%-%/ %1,%0" 2683 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2684 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2685 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2686 1.1.1.1.8.2 tls (set_attr "trap_suffix" "sui")]) 2687 1.1.1.1.8.2 tls 2688 1.1.1.1.8.2 tls (define_insn "floatdidf2" 2689 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2690 1.1.1.1.8.2 tls (float:DF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] 2691 1.1.1.1.8.2 tls "TARGET_FP" 2692 1.1.1.1.8.2 tls "cvtq%-%/ %1,%0" 2693 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2694 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2695 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2696 1.1.1.1.8.2 tls (set_attr "trap_suffix" "sui")]) 2697 1.1.1.1.8.2 tls 2698 1.1.1.1.8.2 tls (define_insn_and_split "*floatsidf2_ieee" 2699 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 2700 1.1.1.1.8.2 tls (float:DF (match_operand:SI 1 "memory_operand" "m"))) 2701 1.1.1.1.8.2 tls (clobber (match_scratch:DI 2 "=&f")) 2702 1.1.1.1.8.2 tls (clobber (match_scratch:SF 3 "=&f"))] 2703 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2704 1.1.1.1.8.2 tls "#" 2705 1.1.1.1.8.2 tls "&& reload_completed" 2706 1.1.1.1.8.2 tls [(set (match_dup 3) (match_dup 1)) 2707 1.1.1.1.8.2 tls (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) 2708 1.1.1.1.8.2 tls (set (match_dup 0) (float:DF (match_dup 2)))] 2709 1.1.1.1.8.2 tls { 2710 1.1.1.1.8.2 tls operands[1] = adjust_address (operands[1], SFmode, 0); 2711 1.1.1.1.8.2 tls }) 2712 1.1.1.1.8.2 tls 2713 1.1.1.1.8.2 tls (define_insn_and_split "*floatsidf2" 2714 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2715 1.1.1.1.8.2 tls (float:DF (match_operand:SI 1 "memory_operand" "m")))] 2716 1.1.1.1.8.2 tls "TARGET_FP" 2717 1.1.1.1.8.2 tls "#" 2718 1.1.1.1.8.2 tls "&& reload_completed" 2719 1.1.1.1.8.2 tls [(set (match_dup 3) (match_dup 1)) 2720 1.1.1.1.8.2 tls (set (match_dup 2) (unspec:DI [(match_dup 3)] UNSPEC_CVTLQ)) 2721 1.1.1.1.8.2 tls (set (match_dup 0) (float:DF (match_dup 2)))] 2722 1.1.1.1.8.2 tls { 2723 1.1.1.1.8.2 tls operands[1] = adjust_address (operands[1], SFmode, 0); 2724 1.1.1.1.8.2 tls operands[2] = gen_rtx_REG (DImode, REGNO (operands[0])); 2725 1.1.1.1.8.2 tls operands[3] = gen_rtx_REG (SFmode, REGNO (operands[0])); 2726 1.1.1.1.8.2 tls }) 2727 1.1.1.1.8.2 tls 2728 1.1.1.1.8.2 tls (define_expand "floatditf2" 2729 1.1.1.1.8.2 tls [(use (match_operand:TF 0 "register_operand" "")) 2730 1.1.1.1.8.2 tls (use (match_operand:DI 1 "general_operand" ""))] 2731 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2732 1.1.1.1.8.2 tls "alpha_emit_xfloating_cvt (FLOAT, operands); DONE;") 2733 1.1.1.1.8.2 tls 2734 1.1.1.1.8.2 tls (define_expand "floatunsdisf2" 2735 1.1.1.1.8.2 tls [(use (match_operand:SF 0 "register_operand" "")) 2736 1.1.1.1.8.2 tls (use (match_operand:DI 1 "register_operand" ""))] 2737 1.1.1.1.8.2 tls "TARGET_FP" 2738 1.1.1.1.8.2 tls "alpha_emit_floatuns (operands); DONE;") 2739 1.1.1.1.8.2 tls 2740 1.1.1.1.8.2 tls (define_expand "floatunsdidf2" 2741 1.1.1.1.8.2 tls [(use (match_operand:DF 0 "register_operand" "")) 2742 1.1.1.1.8.2 tls (use (match_operand:DI 1 "register_operand" ""))] 2743 1.1.1.1.8.2 tls "TARGET_FP" 2744 1.1.1.1.8.2 tls "alpha_emit_floatuns (operands); DONE;") 2745 1.1.1.1.8.2 tls 2746 1.1.1.1.8.2 tls (define_expand "floatunsditf2" 2747 1.1.1.1.8.2 tls [(use (match_operand:TF 0 "register_operand" "")) 2748 1.1.1.1.8.2 tls (use (match_operand:DI 1 "general_operand" ""))] 2749 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2750 1.1.1.1.8.2 tls "alpha_emit_xfloating_cvt (UNSIGNED_FLOAT, operands); DONE;") 2751 1.1.1.1.8.2 tls 2752 1.1.1.1.8.2 tls (define_expand "extendsfdf2" 2753 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "") 2754 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "")))] 2755 1.1.1.1.8.2 tls "TARGET_FP" 2756 1.1.1.1.8.2 tls { 2757 1.1.1.1.8.2 tls if (alpha_fptm >= ALPHA_FPTM_SU) 2758 1.1.1.1.8.2 tls operands[1] = force_reg (SFmode, operands[1]); 2759 1.1.1.1.8.2 tls }) 2760 1.1.1.1.8.2 tls 2761 1.1.1.1.8.2 tls ;; The Unicos/Mk assembler doesn't support cvtst, but we've already 2762 1.1.1.1.8.2 tls ;; asserted that alpha_fptm == ALPHA_FPTM_N. 2763 1.1.1.1.8.2 tls 2764 1.1.1.1.8.2 tls (define_insn "*extendsfdf2_ieee" 2765 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 2766 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 1 "register_operand" "f")))] 2767 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2768 1.1.1.1.8.2 tls "cvtsts %1,%0" 2769 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2770 1.1.1.1.8.2 tls (set_attr "trap" "yes")]) 2771 1.1.1.1.8.2 tls 2772 1.1.1.1.8.2 tls (define_insn "*extendsfdf2_internal" 2773 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f,f,m") 2774 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m,f")))] 2775 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2776 1.1.1.1.8.2 tls "@ 2777 1.1.1.1.8.2 tls cpys %1,%1,%0 2778 1.1.1.1.8.2 tls ld%, %0,%1 2779 1.1.1.1.8.2 tls st%- %1,%0" 2780 1.1.1.1.8.2 tls [(set_attr "type" "fcpys,fld,fst")]) 2781 1.1.1.1.8.2 tls 2782 1.1.1.1.8.2 tls ;; Use register_operand for operand 1 to prevent compress_float_constant 2783 1.1.1.1.8.2 tls ;; from doing something silly. When optimizing we'll put things back 2784 1.1.1.1.8.2 tls ;; together anyway. 2785 1.1.1.1.8.2 tls (define_expand "extendsftf2" 2786 1.1.1.1.8.2 tls [(use (match_operand:TF 0 "register_operand" "")) 2787 1.1.1.1.8.2 tls (use (match_operand:SF 1 "register_operand" ""))] 2788 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2789 1.1.1.1.8.2 tls { 2790 1.1.1.1.8.2 tls rtx tmp = gen_reg_rtx (DFmode); 2791 1.1.1.1.8.2 tls emit_insn (gen_extendsfdf2 (tmp, operands[1])); 2792 1.1.1.1.8.2 tls emit_insn (gen_extenddftf2 (operands[0], tmp)); 2793 1.1.1.1.8.2 tls DONE; 2794 1.1.1.1.8.2 tls }) 2795 1.1.1.1.8.2 tls 2796 1.1.1.1.8.2 tls (define_expand "extenddftf2" 2797 1.1.1.1.8.2 tls [(use (match_operand:TF 0 "register_operand" "")) 2798 1.1.1.1.8.2 tls (use (match_operand:DF 1 "register_operand" ""))] 2799 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2800 1.1.1.1.8.2 tls "alpha_emit_xfloating_cvt (FLOAT_EXTEND, operands); DONE;") 2801 1.1.1.1.8.2 tls 2802 1.1.1.1.8.2 tls (define_insn "*truncdfsf2_ieee" 2803 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 2804 1.1.1.1.8.2 tls (float_truncate:SF (match_operand:DF 1 "reg_or_0_operand" "fG")))] 2805 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2806 1.1.1.1.8.2 tls "cvt%-%,%/ %R1,%0" 2807 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2808 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2809 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2810 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2811 1.1.1.1.8.2 tls 2812 1.1.1.1.8.2 tls (define_insn "truncdfsf2" 2813 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2814 1.1.1.1.8.2 tls (float_truncate:SF (match_operand:DF 1 "reg_or_0_operand" "fG")))] 2815 1.1.1.1.8.2 tls "TARGET_FP" 2816 1.1.1.1.8.2 tls "cvt%-%,%/ %R1,%0" 2817 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 2818 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2819 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2820 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2821 1.1.1.1.8.2 tls 2822 1.1.1.1.8.2 tls (define_expand "trunctfdf2" 2823 1.1.1.1.8.2 tls [(use (match_operand:DF 0 "register_operand" "")) 2824 1.1.1.1.8.2 tls (use (match_operand:TF 1 "general_operand" ""))] 2825 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2826 1.1.1.1.8.2 tls "alpha_emit_xfloating_cvt (FLOAT_TRUNCATE, operands); DONE;") 2827 1.1.1.1.8.2 tls 2828 1.1.1.1.8.2 tls (define_expand "trunctfsf2" 2829 1.1.1.1.8.2 tls [(use (match_operand:SF 0 "register_operand" "")) 2830 1.1.1.1.8.2 tls (use (match_operand:TF 1 "general_operand" ""))] 2831 1.1.1.1.8.2 tls "TARGET_FP && TARGET_HAS_XFLOATING_LIBS" 2832 1.1.1.1.8.2 tls { 2833 1.1.1.1.8.2 tls rtx tmpf, sticky, arg, lo, hi; 2834 1.1.1.1.8.2 tls 2835 1.1.1.1.8.2 tls tmpf = gen_reg_rtx (DFmode); 2836 1.1.1.1.8.2 tls sticky = gen_reg_rtx (DImode); 2837 1.1.1.1.8.2 tls arg = copy_to_mode_reg (TFmode, operands[1]); 2838 1.1.1.1.8.2 tls lo = gen_lowpart (DImode, arg); 2839 1.1.1.1.8.2 tls hi = gen_highpart (DImode, arg); 2840 1.1.1.1.8.2 tls 2841 1.1.1.1.8.2 tls /* Convert the low word of the TFmode value into a sticky rounding bit, 2842 1.1.1.1.8.2 tls then or it into the low bit of the high word. This leaves the sticky 2843 1.1.1.1.8.2 tls bit at bit 48 of the fraction, which is representable in DFmode, 2844 1.1.1.1.8.2 tls which prevents rounding error in the final conversion to SFmode. */ 2845 1.1.1.1.8.2 tls 2846 1.1.1.1.8.2 tls emit_insn (gen_rtx_SET (VOIDmode, sticky, 2847 1.1.1.1.8.2 tls gen_rtx_NE (DImode, lo, const0_rtx))); 2848 1.1.1.1.8.2 tls emit_insn (gen_iordi3 (hi, hi, sticky)); 2849 1.1.1.1.8.2 tls emit_insn (gen_trunctfdf2 (tmpf, arg)); 2850 1.1.1.1.8.2 tls emit_insn (gen_truncdfsf2 (operands[0], tmpf)); 2851 1.1.1.1.8.2 tls DONE; 2852 1.1.1.1.8.2 tls }) 2853 1.1.1.1.8.2 tls 2854 1.1.1.1.8.2 tls (define_insn "*divsf3_ieee" 2855 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 2856 1.1.1.1.8.2 tls (div:SF (match_operand:SF 1 "reg_or_0_operand" "fG") 2857 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 2858 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2859 1.1.1.1.8.2 tls "div%,%/ %R1,%R2,%0" 2860 1.1.1.1.8.2 tls [(set_attr "type" "fdiv") 2861 1.1.1.1.8.2 tls (set_attr "opsize" "si") 2862 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2863 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2864 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2865 1.1.1.1.8.2 tls 2866 1.1.1.1.8.2 tls (define_insn "divsf3" 2867 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2868 1.1.1.1.8.2 tls (div:SF (match_operand:SF 1 "reg_or_0_operand" "fG") 2869 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 2870 1.1.1.1.8.2 tls "TARGET_FP" 2871 1.1.1.1.8.2 tls "div%,%/ %R1,%R2,%0" 2872 1.1.1.1.8.2 tls [(set_attr "type" "fdiv") 2873 1.1.1.1.8.2 tls (set_attr "opsize" "si") 2874 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2875 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2876 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2877 1.1.1.1.8.2 tls 2878 1.1.1.1.8.2 tls (define_insn "*divdf3_ieee" 2879 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 2880 1.1.1.1.8.2 tls (div:DF (match_operand:DF 1 "reg_or_0_operand" "fG") 2881 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2882 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2883 1.1.1.1.8.2 tls "div%-%/ %R1,%R2,%0" 2884 1.1.1.1.8.2 tls [(set_attr "type" "fdiv") 2885 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2886 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2887 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2888 1.1.1.1.8.2 tls 2889 1.1.1.1.8.2 tls (define_insn "divdf3" 2890 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2891 1.1.1.1.8.2 tls (div:DF (match_operand:DF 1 "reg_or_0_operand" "fG") 2892 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2893 1.1.1.1.8.2 tls "TARGET_FP" 2894 1.1.1.1.8.2 tls "div%-%/ %R1,%R2,%0" 2895 1.1.1.1.8.2 tls [(set_attr "type" "fdiv") 2896 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2897 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2898 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2899 1.1.1.1.8.2 tls 2900 1.1.1.1.8.2 tls (define_insn "*divdf_ext1" 2901 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2902 1.1.1.1.8.2 tls (div:DF (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG")) 2903 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2904 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2905 1.1.1.1.8.2 tls "div%-%/ %R1,%R2,%0" 2906 1.1.1.1.8.2 tls [(set_attr "type" "fdiv") 2907 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2908 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2909 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2910 1.1.1.1.8.2 tls 2911 1.1.1.1.8.2 tls (define_insn "*divdf_ext2" 2912 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2913 1.1.1.1.8.2 tls (div:DF (match_operand:DF 1 "reg_or_0_operand" "fG") 2914 1.1.1.1.8.2 tls (float_extend:DF 2915 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG"))))] 2916 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2917 1.1.1.1.8.2 tls "div%-%/ %R1,%R2,%0" 2918 1.1.1.1.8.2 tls [(set_attr "type" "fdiv") 2919 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2920 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2921 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2922 1.1.1.1.8.2 tls 2923 1.1.1.1.8.2 tls (define_insn "*divdf_ext3" 2924 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2925 1.1.1.1.8.2 tls (div:DF (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG")) 2926 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 2 "reg_or_0_operand" "fG"))))] 2927 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2928 1.1.1.1.8.2 tls "div%-%/ %R1,%R2,%0" 2929 1.1.1.1.8.2 tls [(set_attr "type" "fdiv") 2930 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2931 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2932 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2933 1.1.1.1.8.2 tls 2934 1.1.1.1.8.2 tls (define_expand "divtf3" 2935 1.1.1.1.8.2 tls [(use (match_operand 0 "register_operand" "")) 2936 1.1.1.1.8.2 tls (use (match_operand 1 "general_operand" "")) 2937 1.1.1.1.8.2 tls (use (match_operand 2 "general_operand" ""))] 2938 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 2939 1.1.1.1.8.2 tls "alpha_emit_xfloating_arith (DIV, operands); DONE;") 2940 1.1.1.1.8.2 tls 2941 1.1.1.1.8.2 tls (define_insn "*mulsf3_ieee" 2942 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 2943 1.1.1.1.8.2 tls (mult:SF (match_operand:SF 1 "reg_or_0_operand" "%fG") 2944 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 2945 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2946 1.1.1.1.8.2 tls "mul%,%/ %R1,%R2,%0" 2947 1.1.1.1.8.2 tls [(set_attr "type" "fmul") 2948 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2949 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2950 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2951 1.1.1.1.8.2 tls 2952 1.1.1.1.8.2 tls (define_insn "mulsf3" 2953 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 2954 1.1.1.1.8.2 tls (mult:SF (match_operand:SF 1 "reg_or_0_operand" "%fG") 2955 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 2956 1.1.1.1.8.2 tls "TARGET_FP" 2957 1.1.1.1.8.2 tls "mul%,%/ %R1,%R2,%0" 2958 1.1.1.1.8.2 tls [(set_attr "type" "fmul") 2959 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2960 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2961 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2962 1.1.1.1.8.2 tls 2963 1.1.1.1.8.2 tls (define_insn "*muldf3_ieee" 2964 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 2965 1.1.1.1.8.2 tls (mult:DF (match_operand:DF 1 "reg_or_0_operand" "%fG") 2966 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2967 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 2968 1.1.1.1.8.2 tls "mul%-%/ %R1,%R2,%0" 2969 1.1.1.1.8.2 tls [(set_attr "type" "fmul") 2970 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2971 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2972 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2973 1.1.1.1.8.2 tls 2974 1.1.1.1.8.2 tls (define_insn "muldf3" 2975 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2976 1.1.1.1.8.2 tls (mult:DF (match_operand:DF 1 "reg_or_0_operand" "%fG") 2977 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2978 1.1.1.1.8.2 tls "TARGET_FP" 2979 1.1.1.1.8.2 tls "mul%-%/ %R1,%R2,%0" 2980 1.1.1.1.8.2 tls [(set_attr "type" "fmul") 2981 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2982 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2983 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2984 1.1.1.1.8.2 tls 2985 1.1.1.1.8.2 tls (define_insn "*muldf_ext1" 2986 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2987 1.1.1.1.8.2 tls (mult:DF (float_extend:DF 2988 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG")) 2989 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 2990 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 2991 1.1.1.1.8.2 tls "mul%-%/ %R1,%R2,%0" 2992 1.1.1.1.8.2 tls [(set_attr "type" "fmul") 2993 1.1.1.1.8.2 tls (set_attr "trap" "yes") 2994 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 2995 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 2996 1.1.1.1.8.2 tls 2997 1.1.1.1.8.2 tls (define_insn "*muldf_ext2" 2998 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 2999 1.1.1.1.8.2 tls (mult:DF (float_extend:DF 3000 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "%fG")) 3001 1.1.1.1.8.2 tls (float_extend:DF 3002 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG"))))] 3003 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3004 1.1.1.1.8.2 tls "mul%-%/ %R1,%R2,%0" 3005 1.1.1.1.8.2 tls [(set_attr "type" "fmul") 3006 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3007 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3008 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3009 1.1.1.1.8.2 tls 3010 1.1.1.1.8.2 tls (define_expand "multf3" 3011 1.1.1.1.8.2 tls [(use (match_operand 0 "register_operand" "")) 3012 1.1.1.1.8.2 tls (use (match_operand 1 "general_operand" "")) 3013 1.1.1.1.8.2 tls (use (match_operand 2 "general_operand" ""))] 3014 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 3015 1.1.1.1.8.2 tls "alpha_emit_xfloating_arith (MULT, operands); DONE;") 3016 1.1.1.1.8.2 tls 3017 1.1.1.1.8.2 tls (define_insn "*subsf3_ieee" 3018 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 3019 1.1.1.1.8.2 tls (minus:SF (match_operand:SF 1 "reg_or_0_operand" "fG") 3020 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 3021 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 3022 1.1.1.1.8.2 tls "sub%,%/ %R1,%R2,%0" 3023 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3024 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3025 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3026 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3027 1.1.1.1.8.2 tls 3028 1.1.1.1.8.2 tls (define_insn "subsf3" 3029 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 3030 1.1.1.1.8.2 tls (minus:SF (match_operand:SF 1 "reg_or_0_operand" "fG") 3031 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")))] 3032 1.1.1.1.8.2 tls "TARGET_FP" 3033 1.1.1.1.8.2 tls "sub%,%/ %R1,%R2,%0" 3034 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3035 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3036 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3037 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3038 1.1.1.1.8.2 tls 3039 1.1.1.1.8.2 tls (define_insn "*subdf3_ieee" 3040 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 3041 1.1.1.1.8.2 tls (minus:DF (match_operand:DF 1 "reg_or_0_operand" "fG") 3042 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 3043 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 3044 1.1.1.1.8.2 tls "sub%-%/ %R1,%R2,%0" 3045 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3046 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3047 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3048 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3049 1.1.1.1.8.2 tls 3050 1.1.1.1.8.2 tls (define_insn "subdf3" 3051 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3052 1.1.1.1.8.2 tls (minus:DF (match_operand:DF 1 "reg_or_0_operand" "fG") 3053 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 3054 1.1.1.1.8.2 tls "TARGET_FP" 3055 1.1.1.1.8.2 tls "sub%-%/ %R1,%R2,%0" 3056 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3057 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3058 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3059 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3060 1.1.1.1.8.2 tls 3061 1.1.1.1.8.2 tls (define_insn "*subdf_ext1" 3062 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3063 1.1.1.1.8.2 tls (minus:DF (float_extend:DF 3064 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG")) 3065 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "fG")))] 3066 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3067 1.1.1.1.8.2 tls "sub%-%/ %R1,%R2,%0" 3068 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3069 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3070 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3071 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3072 1.1.1.1.8.2 tls 3073 1.1.1.1.8.2 tls (define_insn "*subdf_ext2" 3074 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3075 1.1.1.1.8.2 tls (minus:DF (match_operand:DF 1 "reg_or_0_operand" "fG") 3076 1.1.1.1.8.2 tls (float_extend:DF 3077 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG"))))] 3078 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3079 1.1.1.1.8.2 tls "sub%-%/ %R1,%R2,%0" 3080 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3081 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3082 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3083 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3084 1.1.1.1.8.2 tls 3085 1.1.1.1.8.2 tls (define_insn "*subdf_ext3" 3086 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3087 1.1.1.1.8.2 tls (minus:DF (float_extend:DF 3088 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG")) 3089 1.1.1.1.8.2 tls (float_extend:DF 3090 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG"))))] 3091 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3092 1.1.1.1.8.2 tls "sub%-%/ %R1,%R2,%0" 3093 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3094 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3095 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3096 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3097 1.1.1.1.8.2 tls 3098 1.1.1.1.8.2 tls (define_expand "subtf3" 3099 1.1.1.1.8.2 tls [(use (match_operand 0 "register_operand" "")) 3100 1.1.1.1.8.2 tls (use (match_operand 1 "general_operand" "")) 3101 1.1.1.1.8.2 tls (use (match_operand 2 "general_operand" ""))] 3102 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 3103 1.1.1.1.8.2 tls "alpha_emit_xfloating_arith (MINUS, operands); DONE;") 3104 1.1.1.1.8.2 tls 3105 1.1.1.1.8.2 tls (define_insn "*sqrtsf2_ieee" 3106 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=&f") 3107 1.1.1.1.8.2 tls (sqrt:SF (match_operand:SF 1 "reg_or_0_operand" "fG")))] 3108 1.1.1.1.8.2 tls "TARGET_FP && TARGET_FIX && alpha_fptm >= ALPHA_FPTM_SU" 3109 1.1.1.1.8.2 tls "sqrt%,%/ %R1,%0" 3110 1.1.1.1.8.2 tls [(set_attr "type" "fsqrt") 3111 1.1.1.1.8.2 tls (set_attr "opsize" "si") 3112 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3113 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3114 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3115 1.1.1.1.8.2 tls 3116 1.1.1.1.8.2 tls (define_insn "sqrtsf2" 3117 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f") 3118 1.1.1.1.8.2 tls (sqrt:SF (match_operand:SF 1 "reg_or_0_operand" "fG")))] 3119 1.1.1.1.8.2 tls "TARGET_FP && TARGET_FIX" 3120 1.1.1.1.8.2 tls "sqrt%,%/ %R1,%0" 3121 1.1.1.1.8.2 tls [(set_attr "type" "fsqrt") 3122 1.1.1.1.8.2 tls (set_attr "opsize" "si") 3123 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3124 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3125 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3126 1.1.1.1.8.2 tls 3127 1.1.1.1.8.2 tls (define_insn "*sqrtdf2_ieee" 3128 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 3129 1.1.1.1.8.2 tls (sqrt:DF (match_operand:DF 1 "reg_or_0_operand" "fG")))] 3130 1.1.1.1.8.2 tls "TARGET_FP && TARGET_FIX && alpha_fptm >= ALPHA_FPTM_SU" 3131 1.1.1.1.8.2 tls "sqrt%-%/ %R1,%0" 3132 1.1.1.1.8.2 tls [(set_attr "type" "fsqrt") 3133 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3134 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3135 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3136 1.1.1.1.8.2 tls 3137 1.1.1.1.8.2 tls (define_insn "sqrtdf2" 3138 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3139 1.1.1.1.8.2 tls (sqrt:DF (match_operand:DF 1 "reg_or_0_operand" "fG")))] 3140 1.1.1.1.8.2 tls "TARGET_FP && TARGET_FIX" 3141 1.1.1.1.8.2 tls "sqrt%-%/ %R1,%0" 3142 1.1.1.1.8.2 tls [(set_attr "type" "fsqrt") 3143 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3144 1.1.1.1.8.2 tls (set_attr "round_suffix" "normal") 3145 1.1.1.1.8.2 tls (set_attr "trap_suffix" "u_su_sui")]) 3146 1.1.1.1.8.2 tls 3148 1.1.1.1.8.2 tls ;; Next are all the integer comparisons, and conditional moves and branches 3149 1.1.1.1.8.2 tls ;; and some of the related define_expand's and define_split's. 3150 1.1.1.1.8.2 tls 3151 1.1.1.1.8.2 tls (define_insn "*setcc_internal" 3152 1.1.1.1.8.2 tls [(set (match_operand 0 "register_operand" "=r") 3153 1.1.1.1.8.2 tls (match_operator 1 "alpha_comparison_operator" 3154 1.1.1.1.8.2 tls [(match_operand:DI 2 "register_operand" "r") 3155 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "rI")]))] 3156 1.1.1.1.8.2 tls "GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT 3157 1.1.1.1.8.2 tls && GET_MODE_SIZE (GET_MODE (operands[0])) <= 8 3158 1.1.1.1.8.2 tls && GET_MODE (operands[0]) == GET_MODE (operands[1])" 3159 1.1.1.1.8.2 tls "cmp%C1 %2,%3,%0" 3160 1.1.1.1.8.2 tls [(set_attr "type" "icmp")]) 3161 1.1.1.1.8.2 tls 3162 1.1.1.1.8.2 tls ;; Yes, we can technically support reg_or_8bit_operand in operand 2, 3163 1.1.1.1.8.2 tls ;; but that's non-canonical rtl and allowing that causes inefficiencies 3164 1.1.1.1.8.2 tls ;; from cse on. 3165 1.1.1.1.8.2 tls (define_insn "*setcc_swapped_internal" 3166 1.1.1.1.8.2 tls [(set (match_operand 0 "register_operand" "=r") 3167 1.1.1.1.8.2 tls (match_operator 1 "alpha_swapped_comparison_operator" 3168 1.1.1.1.8.2 tls [(match_operand:DI 2 "register_operand" "r") 3169 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_0_operand" "rJ")]))] 3170 1.1.1.1.8.2 tls "GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT 3171 1.1.1.1.8.2 tls && GET_MODE_SIZE (GET_MODE (operands[0])) <= 8 3172 1.1.1.1.8.2 tls && GET_MODE (operands[0]) == GET_MODE (operands[1])" 3173 1.1.1.1.8.2 tls "cmp%c1 %r3,%2,%0" 3174 1.1.1.1.8.2 tls [(set_attr "type" "icmp")]) 3175 1.1.1.1.8.2 tls 3176 1.1.1.1.8.2 tls ;; Use match_operator rather than ne directly so that we can match 3177 1.1.1.1.8.2 tls ;; multiple integer modes. 3178 1.1.1.1.8.2 tls (define_insn "*setne_internal" 3179 1.1.1.1.8.2 tls [(set (match_operand 0 "register_operand" "=r") 3180 1.1.1.1.8.2 tls (match_operator 1 "signed_comparison_operator" 3181 1.1.1.1.8.2 tls [(match_operand:DI 2 "register_operand" "r") 3182 1.1.1.1.8.2 tls (const_int 0)]))] 3183 1.1.1.1.8.2 tls "GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT 3184 1.1.1.1.8.2 tls && GET_MODE_SIZE (GET_MODE (operands[0])) <= 8 3185 1.1.1.1.8.2 tls && GET_CODE (operands[1]) == NE 3186 1.1.1.1.8.2 tls && GET_MODE (operands[0]) == GET_MODE (operands[1])" 3187 1.1.1.1.8.2 tls "cmpult $31,%2,%0" 3188 1.1.1.1.8.2 tls [(set_attr "type" "icmp")]) 3189 1.1.1.1.8.2 tls 3190 1.1.1.1.8.2 tls ;; The mode folding trick can't be used with const_int operands, since 3191 1.1.1.1.8.2 tls ;; reload needs to know the proper mode. 3192 1.1.1.1.8.2 tls ;; 3193 1.1.1.1.8.2 tls ;; Use add_operand instead of the more seemingly natural reg_or_8bit_operand 3194 1.1.1.1.8.2 tls ;; in order to create more pairs of constants. As long as we're allowing 3195 1.1.1.1.8.2 tls ;; two constants at the same time, and will have to reload one of them... 3196 1.1.1.1.8.2 tls 3197 1.1.1.1.8.2 tls (define_insn "*movqicc_internal" 3198 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r,r,r,r") 3199 1.1.1.1.8.2 tls (if_then_else:QI 3200 1.1.1.1.8.2 tls (match_operator 2 "signed_comparison_operator" 3201 1.1.1.1.8.2 tls [(match_operand:DI 3 "reg_or_0_operand" "rJ,rJ,J,J") 3202 1.1.1.1.8.2 tls (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) 3203 1.1.1.1.8.2 tls (match_operand:QI 1 "add_operand" "rI,0,rI,0") 3204 1.1.1.1.8.2 tls (match_operand:QI 5 "add_operand" "0,rI,0,rI")))] 3205 1.1.1.1.8.2 tls "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" 3206 1.1.1.1.8.2 tls "@ 3207 1.1.1.1.8.2 tls cmov%C2 %r3,%1,%0 3208 1.1.1.1.8.2 tls cmov%D2 %r3,%5,%0 3209 1.1.1.1.8.2 tls cmov%c2 %r4,%1,%0 3210 1.1.1.1.8.2 tls cmov%d2 %r4,%5,%0" 3211 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3212 1.1.1.1.8.2 tls 3213 1.1.1.1.8.2 tls (define_insn "*movhicc_internal" 3214 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r,r,r,r") 3215 1.1.1.1.8.2 tls (if_then_else:HI 3216 1.1.1.1.8.2 tls (match_operator 2 "signed_comparison_operator" 3217 1.1.1.1.8.2 tls [(match_operand:DI 3 "reg_or_0_operand" "rJ,rJ,J,J") 3218 1.1.1.1.8.2 tls (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) 3219 1.1.1.1.8.2 tls (match_operand:HI 1 "add_operand" "rI,0,rI,0") 3220 1.1.1.1.8.2 tls (match_operand:HI 5 "add_operand" "0,rI,0,rI")))] 3221 1.1.1.1.8.2 tls "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" 3222 1.1.1.1.8.2 tls "@ 3223 1.1.1.1.8.2 tls cmov%C2 %r3,%1,%0 3224 1.1.1.1.8.2 tls cmov%D2 %r3,%5,%0 3225 1.1.1.1.8.2 tls cmov%c2 %r4,%1,%0 3226 1.1.1.1.8.2 tls cmov%d2 %r4,%5,%0" 3227 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3228 1.1.1.1.8.2 tls 3229 1.1.1.1.8.2 tls (define_insn "*movsicc_internal" 3230 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r,r,r") 3231 1.1.1.1.8.2 tls (if_then_else:SI 3232 1.1.1.1.8.2 tls (match_operator 2 "signed_comparison_operator" 3233 1.1.1.1.8.2 tls [(match_operand:DI 3 "reg_or_0_operand" "rJ,rJ,J,J") 3234 1.1.1.1.8.2 tls (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) 3235 1.1.1.1.8.2 tls (match_operand:SI 1 "add_operand" "rI,0,rI,0") 3236 1.1.1.1.8.2 tls (match_operand:SI 5 "add_operand" "0,rI,0,rI")))] 3237 1.1.1.1.8.2 tls "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" 3238 1.1.1.1.8.2 tls "@ 3239 1.1.1.1.8.2 tls cmov%C2 %r3,%1,%0 3240 1.1.1.1.8.2 tls cmov%D2 %r3,%5,%0 3241 1.1.1.1.8.2 tls cmov%c2 %r4,%1,%0 3242 1.1.1.1.8.2 tls cmov%d2 %r4,%5,%0" 3243 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3244 1.1.1.1.8.2 tls 3245 1.1.1.1.8.2 tls (define_insn "*movdicc_internal" 3246 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r,r,r") 3247 1.1.1.1.8.2 tls (if_then_else:DI 3248 1.1.1.1.8.2 tls (match_operator 2 "signed_comparison_operator" 3249 1.1.1.1.8.2 tls [(match_operand:DI 3 "reg_or_0_operand" "rJ,rJ,J,J") 3250 1.1.1.1.8.2 tls (match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")]) 3251 1.1.1.1.8.2 tls (match_operand:DI 1 "add_operand" "rI,0,rI,0") 3252 1.1.1.1.8.2 tls (match_operand:DI 5 "add_operand" "0,rI,0,rI")))] 3253 1.1.1.1.8.2 tls "(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)" 3254 1.1.1.1.8.2 tls "@ 3255 1.1.1.1.8.2 tls cmov%C2 %r3,%1,%0 3256 1.1.1.1.8.2 tls cmov%D2 %r3,%5,%0 3257 1.1.1.1.8.2 tls cmov%c2 %r4,%1,%0 3258 1.1.1.1.8.2 tls cmov%d2 %r4,%5,%0" 3259 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3260 1.1.1.1.8.2 tls 3261 1.1.1.1.8.2 tls (define_insn "*movqicc_lbc" 3262 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r,r") 3263 1.1.1.1.8.2 tls (if_then_else:QI 3264 1.1.1.1.8.2 tls (eq (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3265 1.1.1.1.8.2 tls (const_int 1) 3266 1.1.1.1.8.2 tls (const_int 0)) 3267 1.1.1.1.8.2 tls (const_int 0)) 3268 1.1.1.1.8.2 tls (match_operand:QI 1 "reg_or_8bit_operand" "rI,0") 3269 1.1.1.1.8.2 tls (match_operand:QI 3 "reg_or_8bit_operand" "0,rI")))] 3270 1.1.1.1.8.2 tls "" 3271 1.1.1.1.8.2 tls "@ 3272 1.1.1.1.8.2 tls cmovlbc %r2,%1,%0 3273 1.1.1.1.8.2 tls cmovlbs %r2,%3,%0" 3274 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3275 1.1.1.1.8.2 tls 3276 1.1.1.1.8.2 tls (define_insn "*movhicc_lbc" 3277 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r,r") 3278 1.1.1.1.8.2 tls (if_then_else:HI 3279 1.1.1.1.8.2 tls (eq (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3280 1.1.1.1.8.2 tls (const_int 1) 3281 1.1.1.1.8.2 tls (const_int 0)) 3282 1.1.1.1.8.2 tls (const_int 0)) 3283 1.1.1.1.8.2 tls (match_operand:HI 1 "reg_or_8bit_operand" "rI,0") 3284 1.1.1.1.8.2 tls (match_operand:HI 3 "reg_or_8bit_operand" "0,rI")))] 3285 1.1.1.1.8.2 tls "" 3286 1.1.1.1.8.2 tls "@ 3287 1.1.1.1.8.2 tls cmovlbc %r2,%1,%0 3288 1.1.1.1.8.2 tls cmovlbs %r2,%3,%0" 3289 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3290 1.1.1.1.8.2 tls 3291 1.1.1.1.8.2 tls (define_insn "*movsicc_lbc" 3292 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 3293 1.1.1.1.8.2 tls (if_then_else:SI 3294 1.1.1.1.8.2 tls (eq (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3295 1.1.1.1.8.2 tls (const_int 1) 3296 1.1.1.1.8.2 tls (const_int 0)) 3297 1.1.1.1.8.2 tls (const_int 0)) 3298 1.1.1.1.8.2 tls (match_operand:SI 1 "reg_or_8bit_operand" "rI,0") 3299 1.1.1.1.8.2 tls (match_operand:SI 3 "reg_or_8bit_operand" "0,rI")))] 3300 1.1.1.1.8.2 tls "" 3301 1.1.1.1.8.2 tls "@ 3302 1.1.1.1.8.2 tls cmovlbc %r2,%1,%0 3303 1.1.1.1.8.2 tls cmovlbs %r2,%3,%0" 3304 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3305 1.1.1.1.8.2 tls 3306 1.1.1.1.8.2 tls (define_insn "*movdicc_lbc" 3307 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 3308 1.1.1.1.8.2 tls (if_then_else:DI 3309 1.1.1.1.8.2 tls (eq (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3310 1.1.1.1.8.2 tls (const_int 1) 3311 1.1.1.1.8.2 tls (const_int 0)) 3312 1.1.1.1.8.2 tls (const_int 0)) 3313 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_8bit_operand" "rI,0") 3314 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "0,rI")))] 3315 1.1.1.1.8.2 tls "" 3316 1.1.1.1.8.2 tls "@ 3317 1.1.1.1.8.2 tls cmovlbc %r2,%1,%0 3318 1.1.1.1.8.2 tls cmovlbs %r2,%3,%0" 3319 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3320 1.1.1.1.8.2 tls 3321 1.1.1.1.8.2 tls (define_insn "*movqicc_lbs" 3322 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r,r") 3323 1.1.1.1.8.2 tls (if_then_else:QI 3324 1.1.1.1.8.2 tls (ne (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3325 1.1.1.1.8.2 tls (const_int 1) 3326 1.1.1.1.8.2 tls (const_int 0)) 3327 1.1.1.1.8.2 tls (const_int 0)) 3328 1.1.1.1.8.2 tls (match_operand:QI 1 "reg_or_8bit_operand" "rI,0") 3329 1.1.1.1.8.2 tls (match_operand:QI 3 "reg_or_8bit_operand" "0,rI")))] 3330 1.1.1.1.8.2 tls "" 3331 1.1.1.1.8.2 tls "@ 3332 1.1.1.1.8.2 tls cmovlbs %r2,%1,%0 3333 1.1.1.1.8.2 tls cmovlbc %r2,%3,%0" 3334 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3335 1.1.1.1.8.2 tls 3336 1.1.1.1.8.2 tls (define_insn "*movhicc_lbs" 3337 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r,r") 3338 1.1.1.1.8.2 tls (if_then_else:HI 3339 1.1.1.1.8.2 tls (ne (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3340 1.1.1.1.8.2 tls (const_int 1) 3341 1.1.1.1.8.2 tls (const_int 0)) 3342 1.1.1.1.8.2 tls (const_int 0)) 3343 1.1.1.1.8.2 tls (match_operand:HI 1 "reg_or_8bit_operand" "rI,0") 3344 1.1.1.1.8.2 tls (match_operand:HI 3 "reg_or_8bit_operand" "0,rI")))] 3345 1.1.1.1.8.2 tls "" 3346 1.1.1.1.8.2 tls "@ 3347 1.1.1.1.8.2 tls cmovlbs %r2,%1,%0 3348 1.1.1.1.8.2 tls cmovlbc %r2,%3,%0" 3349 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3350 1.1.1.1.8.2 tls 3351 1.1.1.1.8.2 tls (define_insn "*movsicc_lbs" 3352 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r,r") 3353 1.1.1.1.8.2 tls (if_then_else:SI 3354 1.1.1.1.8.2 tls (ne (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3355 1.1.1.1.8.2 tls (const_int 1) 3356 1.1.1.1.8.2 tls (const_int 0)) 3357 1.1.1.1.8.2 tls (const_int 0)) 3358 1.1.1.1.8.2 tls (match_operand:SI 1 "reg_or_8bit_operand" "rI,0") 3359 1.1.1.1.8.2 tls (match_operand:SI 3 "reg_or_8bit_operand" "0,rI")))] 3360 1.1.1.1.8.2 tls "" 3361 1.1.1.1.8.2 tls "@ 3362 1.1.1.1.8.2 tls cmovlbs %r2,%1,%0 3363 1.1.1.1.8.2 tls cmovlbc %r2,%3,%0" 3364 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3365 1.1.1.1.8.2 tls 3366 1.1.1.1.8.2 tls (define_insn "*movdicc_lbs" 3367 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r") 3368 1.1.1.1.8.2 tls (if_then_else:DI 3369 1.1.1.1.8.2 tls (ne (zero_extract:DI (match_operand:DI 2 "reg_or_0_operand" "rJ,rJ") 3370 1.1.1.1.8.2 tls (const_int 1) 3371 1.1.1.1.8.2 tls (const_int 0)) 3372 1.1.1.1.8.2 tls (const_int 0)) 3373 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_8bit_operand" "rI,0") 3374 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "0,rI")))] 3375 1.1.1.1.8.2 tls "" 3376 1.1.1.1.8.2 tls "@ 3377 1.1.1.1.8.2 tls cmovlbs %r2,%1,%0 3378 1.1.1.1.8.2 tls cmovlbc %r2,%3,%0" 3379 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3380 1.1.1.1.8.2 tls 3381 1.1.1.1.8.2 tls ;; For ABS, we have two choices, depending on whether the input and output 3382 1.1.1.1.8.2 tls ;; registers are the same or not. 3383 1.1.1.1.8.2 tls (define_expand "absdi2" 3384 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3385 1.1.1.1.8.2 tls (abs:DI (match_operand:DI 1 "register_operand" "")))] 3386 1.1.1.1.8.2 tls "" 3387 1.1.1.1.8.2 tls { 3388 1.1.1.1.8.2 tls if (rtx_equal_p (operands[0], operands[1])) 3389 1.1.1.1.8.2 tls emit_insn (gen_absdi2_same (operands[0], gen_reg_rtx (DImode))); 3390 1.1.1.1.8.2 tls else 3391 1.1.1.1.8.2 tls emit_insn (gen_absdi2_diff (operands[0], operands[1])); 3392 1.1.1.1.8.2 tls DONE; 3393 1.1.1.1.8.2 tls }) 3394 1.1.1.1.8.2 tls 3395 1.1.1.1.8.2 tls (define_expand "absdi2_same" 3396 1.1.1.1.8.2 tls [(set (match_operand:DI 1 "register_operand" "") 3397 1.1.1.1.8.2 tls (neg:DI (match_operand:DI 0 "register_operand" ""))) 3398 1.1.1.1.8.2 tls (set (match_dup 0) 3399 1.1.1.1.8.2 tls (if_then_else:DI (ge (match_dup 0) (const_int 0)) 3400 1.1.1.1.8.2 tls (match_dup 0) 3401 1.1.1.1.8.2 tls (match_dup 1)))] 3402 1.1.1.1.8.2 tls "" 3403 1.1.1.1.8.2 tls "") 3404 1.1.1.1.8.2 tls 3405 1.1.1.1.8.2 tls (define_expand "absdi2_diff" 3406 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3407 1.1.1.1.8.2 tls (neg:DI (match_operand:DI 1 "register_operand" ""))) 3408 1.1.1.1.8.2 tls (set (match_dup 0) 3409 1.1.1.1.8.2 tls (if_then_else:DI (lt (match_dup 1) (const_int 0)) 3410 1.1.1.1.8.2 tls (match_dup 0) 3411 1.1.1.1.8.2 tls (match_dup 1)))] 3412 1.1.1.1.8.2 tls "" 3413 1.1.1.1.8.2 tls "") 3414 1.1.1.1.8.2 tls 3415 1.1.1.1.8.2 tls (define_split 3416 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3417 1.1.1.1.8.2 tls (abs:DI (match_dup 0))) 3418 1.1.1.1.8.2 tls (clobber (match_operand:DI 1 "register_operand" ""))] 3419 1.1.1.1.8.2 tls "" 3420 1.1.1.1.8.2 tls [(set (match_dup 1) (neg:DI (match_dup 0))) 3421 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (ge (match_dup 0) (const_int 0)) 3422 1.1.1.1.8.2 tls (match_dup 0) (match_dup 1)))] 3423 1.1.1.1.8.2 tls "") 3424 1.1.1.1.8.2 tls 3425 1.1.1.1.8.2 tls (define_split 3426 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3427 1.1.1.1.8.2 tls (abs:DI (match_operand:DI 1 "register_operand" "")))] 3428 1.1.1.1.8.2 tls "! rtx_equal_p (operands[0], operands[1])" 3429 1.1.1.1.8.2 tls [(set (match_dup 0) (neg:DI (match_dup 1))) 3430 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (lt (match_dup 1) (const_int 0)) 3431 1.1.1.1.8.2 tls (match_dup 0) (match_dup 1)))] 3432 1.1.1.1.8.2 tls "") 3433 1.1.1.1.8.2 tls 3434 1.1.1.1.8.2 tls (define_split 3435 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3436 1.1.1.1.8.2 tls (neg:DI (abs:DI (match_dup 0)))) 3437 1.1.1.1.8.2 tls (clobber (match_operand:DI 1 "register_operand" ""))] 3438 1.1.1.1.8.2 tls "" 3439 1.1.1.1.8.2 tls [(set (match_dup 1) (neg:DI (match_dup 0))) 3440 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (le (match_dup 0) (const_int 0)) 3441 1.1.1.1.8.2 tls (match_dup 0) (match_dup 1)))] 3442 1.1.1.1.8.2 tls "") 3443 1.1.1.1.8.2 tls 3444 1.1.1.1.8.2 tls (define_split 3445 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3446 1.1.1.1.8.2 tls (neg:DI (abs:DI (match_operand:DI 1 "register_operand" ""))))] 3447 1.1.1.1.8.2 tls "! rtx_equal_p (operands[0], operands[1])" 3448 1.1.1.1.8.2 tls [(set (match_dup 0) (neg:DI (match_dup 1))) 3449 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (gt (match_dup 1) (const_int 0)) 3450 1.1.1.1.8.2 tls (match_dup 0) (match_dup 1)))] 3451 1.1.1.1.8.2 tls "") 3452 1.1.1.1.8.2 tls 3453 1.1.1.1.8.2 tls (define_insn "sminqi3" 3454 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r") 3455 1.1.1.1.8.2 tls (smin:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ") 3456 1.1.1.1.8.2 tls (match_operand:QI 2 "reg_or_8bit_operand" "rI")))] 3457 1.1.1.1.8.2 tls "TARGET_MAX" 3458 1.1.1.1.8.2 tls "minsb8 %r1,%2,%0" 3459 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3460 1.1.1.1.8.2 tls 3461 1.1.1.1.8.2 tls (define_insn "uminqi3" 3462 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r") 3463 1.1.1.1.8.2 tls (umin:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ") 3464 1.1.1.1.8.2 tls (match_operand:QI 2 "reg_or_8bit_operand" "rI")))] 3465 1.1.1.1.8.2 tls "TARGET_MAX" 3466 1.1.1.1.8.2 tls "minub8 %r1,%2,%0" 3467 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3468 1.1.1.1.8.2 tls 3469 1.1.1.1.8.2 tls (define_insn "smaxqi3" 3470 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r") 3471 1.1.1.1.8.2 tls (smax:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ") 3472 1.1.1.1.8.2 tls (match_operand:QI 2 "reg_or_8bit_operand" "rI")))] 3473 1.1.1.1.8.2 tls "TARGET_MAX" 3474 1.1.1.1.8.2 tls "maxsb8 %r1,%2,%0" 3475 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3476 1.1.1.1.8.2 tls 3477 1.1.1.1.8.2 tls (define_insn "umaxqi3" 3478 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r") 3479 1.1.1.1.8.2 tls (umax:QI (match_operand:QI 1 "reg_or_0_operand" "%rJ") 3480 1.1.1.1.8.2 tls (match_operand:QI 2 "reg_or_8bit_operand" "rI")))] 3481 1.1.1.1.8.2 tls "TARGET_MAX" 3482 1.1.1.1.8.2 tls "maxub8 %r1,%2,%0" 3483 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3484 1.1.1.1.8.2 tls 3485 1.1.1.1.8.2 tls (define_insn "sminhi3" 3486 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r") 3487 1.1.1.1.8.2 tls (smin:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ") 3488 1.1.1.1.8.2 tls (match_operand:HI 2 "reg_or_8bit_operand" "rI")))] 3489 1.1.1.1.8.2 tls "TARGET_MAX" 3490 1.1.1.1.8.2 tls "minsw4 %r1,%2,%0" 3491 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3492 1.1.1.1.8.2 tls 3493 1.1.1.1.8.2 tls (define_insn "uminhi3" 3494 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r") 3495 1.1.1.1.8.2 tls (umin:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ") 3496 1.1.1.1.8.2 tls (match_operand:HI 2 "reg_or_8bit_operand" "rI")))] 3497 1.1.1.1.8.2 tls "TARGET_MAX" 3498 1.1.1.1.8.2 tls "minuw4 %r1,%2,%0" 3499 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3500 1.1.1.1.8.2 tls 3501 1.1.1.1.8.2 tls (define_insn "smaxhi3" 3502 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r") 3503 1.1.1.1.8.2 tls (smax:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ") 3504 1.1.1.1.8.2 tls (match_operand:HI 2 "reg_or_8bit_operand" "rI")))] 3505 1.1.1.1.8.2 tls "TARGET_MAX" 3506 1.1.1.1.8.2 tls "maxsw4 %r1,%2,%0" 3507 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3508 1.1.1.1.8.2 tls 3509 1.1.1.1.8.2 tls (define_insn "umaxhi3" 3510 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r") 3511 1.1.1.1.8.2 tls (umax:HI (match_operand:HI 1 "reg_or_0_operand" "%rJ") 3512 1.1.1.1.8.2 tls (match_operand:HI 2 "reg_or_8bit_operand" "rI")))] 3513 1.1.1.1.8.2 tls "TARGET_MAX" 3514 1.1.1.1.8.2 tls "maxuw4 %r1,%2,%0" 3515 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 3516 1.1.1.1.8.2 tls 3517 1.1.1.1.8.2 tls (define_expand "smaxdi3" 3518 1.1.1.1.8.2 tls [(set (match_dup 3) 3519 1.1.1.1.8.2 tls (le:DI (match_operand:DI 1 "reg_or_0_operand" "") 3520 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3521 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 3522 1.1.1.1.8.2 tls (if_then_else:DI (eq (match_dup 3) (const_int 0)) 3523 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3524 1.1.1.1.8.2 tls "" 3525 1.1.1.1.8.2 tls { operands[3] = gen_reg_rtx (DImode); }) 3526 1.1.1.1.8.2 tls 3527 1.1.1.1.8.2 tls (define_split 3528 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3529 1.1.1.1.8.2 tls (smax:DI (match_operand:DI 1 "reg_or_0_operand" "") 3530 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3531 1.1.1.1.8.2 tls (clobber (match_operand:DI 3 "register_operand" ""))] 3532 1.1.1.1.8.2 tls "operands[2] != const0_rtx" 3533 1.1.1.1.8.2 tls [(set (match_dup 3) (le:DI (match_dup 1) (match_dup 2))) 3534 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (eq (match_dup 3) (const_int 0)) 3535 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3536 1.1.1.1.8.2 tls "") 3537 1.1.1.1.8.2 tls 3538 1.1.1.1.8.2 tls (define_insn "*smax_const0" 3539 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 3540 1.1.1.1.8.2 tls (smax:DI (match_operand:DI 1 "register_operand" "0") 3541 1.1.1.1.8.2 tls (const_int 0)))] 3542 1.1.1.1.8.2 tls "" 3543 1.1.1.1.8.2 tls "cmovlt %0,0,%0" 3544 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3545 1.1.1.1.8.2 tls 3546 1.1.1.1.8.2 tls (define_expand "smindi3" 3547 1.1.1.1.8.2 tls [(set (match_dup 3) 3548 1.1.1.1.8.2 tls (lt:DI (match_operand:DI 1 "reg_or_0_operand" "") 3549 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3550 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 3551 1.1.1.1.8.2 tls (if_then_else:DI (ne (match_dup 3) (const_int 0)) 3552 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3553 1.1.1.1.8.2 tls "" 3554 1.1.1.1.8.2 tls { operands[3] = gen_reg_rtx (DImode); }) 3555 1.1.1.1.8.2 tls 3556 1.1.1.1.8.2 tls (define_split 3557 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3558 1.1.1.1.8.2 tls (smin:DI (match_operand:DI 1 "reg_or_0_operand" "") 3559 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3560 1.1.1.1.8.2 tls (clobber (match_operand:DI 3 "register_operand" ""))] 3561 1.1.1.1.8.2 tls "operands[2] != const0_rtx" 3562 1.1.1.1.8.2 tls [(set (match_dup 3) (lt:DI (match_dup 1) (match_dup 2))) 3563 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (ne (match_dup 3) (const_int 0)) 3564 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3565 1.1.1.1.8.2 tls "") 3566 1.1.1.1.8.2 tls 3567 1.1.1.1.8.2 tls (define_insn "*smin_const0" 3568 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 3569 1.1.1.1.8.2 tls (smin:DI (match_operand:DI 1 "register_operand" "0") 3570 1.1.1.1.8.2 tls (const_int 0)))] 3571 1.1.1.1.8.2 tls "" 3572 1.1.1.1.8.2 tls "cmovgt %0,0,%0" 3573 1.1.1.1.8.2 tls [(set_attr "type" "icmov")]) 3574 1.1.1.1.8.2 tls 3575 1.1.1.1.8.2 tls (define_expand "umaxdi3" 3576 1.1.1.1.8.2 tls [(set (match_dup 3) 3577 1.1.1.1.8.2 tls (leu:DI (match_operand:DI 1 "reg_or_0_operand" "") 3578 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3579 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 3580 1.1.1.1.8.2 tls (if_then_else:DI (eq (match_dup 3) (const_int 0)) 3581 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3582 1.1.1.1.8.2 tls "" 3583 1.1.1.1.8.2 tls "operands[3] = gen_reg_rtx (DImode);") 3584 1.1.1.1.8.2 tls 3585 1.1.1.1.8.2 tls (define_split 3586 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3587 1.1.1.1.8.2 tls (umax:DI (match_operand:DI 1 "reg_or_0_operand" "") 3588 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3589 1.1.1.1.8.2 tls (clobber (match_operand:DI 3 "register_operand" ""))] 3590 1.1.1.1.8.2 tls "operands[2] != const0_rtx" 3591 1.1.1.1.8.2 tls [(set (match_dup 3) (leu:DI (match_dup 1) (match_dup 2))) 3592 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (eq (match_dup 3) (const_int 0)) 3593 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3594 1.1.1.1.8.2 tls "") 3595 1.1.1.1.8.2 tls 3596 1.1.1.1.8.2 tls (define_expand "umindi3" 3597 1.1.1.1.8.2 tls [(set (match_dup 3) 3598 1.1.1.1.8.2 tls (ltu:DI (match_operand:DI 1 "reg_or_0_operand" "") 3599 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3600 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 3601 1.1.1.1.8.2 tls (if_then_else:DI (ne (match_dup 3) (const_int 0)) 3602 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3603 1.1.1.1.8.2 tls "" 3604 1.1.1.1.8.2 tls "operands[3] = gen_reg_rtx (DImode);") 3605 1.1.1.1.8.2 tls 3606 1.1.1.1.8.2 tls (define_split 3607 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3608 1.1.1.1.8.2 tls (umin:DI (match_operand:DI 1 "reg_or_0_operand" "") 3609 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" ""))) 3610 1.1.1.1.8.2 tls (clobber (match_operand:DI 3 "register_operand" ""))] 3611 1.1.1.1.8.2 tls "operands[2] != const0_rtx" 3612 1.1.1.1.8.2 tls [(set (match_dup 3) (ltu:DI (match_dup 1) (match_dup 2))) 3613 1.1.1.1.8.2 tls (set (match_dup 0) (if_then_else:DI (ne (match_dup 3) (const_int 0)) 3614 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3615 1.1.1.1.8.2 tls "") 3616 1.1.1.1.8.2 tls 3617 1.1.1.1.8.2 tls (define_insn "*bcc_normal" 3618 1.1.1.1.8.2 tls [(set (pc) 3619 1.1.1.1.8.2 tls (if_then_else 3620 1.1.1.1.8.2 tls (match_operator 1 "signed_comparison_operator" 3621 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "rJ") 3622 1.1.1.1.8.2 tls (const_int 0)]) 3623 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")) 3624 1.1.1.1.8.2 tls (pc)))] 3625 1.1.1.1.8.2 tls "" 3626 1.1.1.1.8.2 tls "b%C1 %r2,%0" 3627 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 3628 1.1.1.1.8.2 tls 3629 1.1.1.1.8.2 tls (define_insn "*bcc_reverse" 3630 1.1.1.1.8.2 tls [(set (pc) 3631 1.1.1.1.8.2 tls (if_then_else 3632 1.1.1.1.8.2 tls (match_operator 1 "signed_comparison_operator" 3633 1.1.1.1.8.2 tls [(match_operand:DI 2 "register_operand" "r") 3634 1.1.1.1.8.2 tls (const_int 0)]) 3635 1.1.1.1.8.2 tls 3636 1.1.1.1.8.2 tls (pc) 3637 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" ""))))] 3638 1.1.1.1.8.2 tls "" 3639 1.1.1.1.8.2 tls "b%c1 %2,%0" 3640 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 3641 1.1.1.1.8.2 tls 3642 1.1.1.1.8.2 tls (define_insn "*blbs_normal" 3643 1.1.1.1.8.2 tls [(set (pc) 3644 1.1.1.1.8.2 tls (if_then_else 3645 1.1.1.1.8.2 tls (ne (zero_extract:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 3646 1.1.1.1.8.2 tls (const_int 1) 3647 1.1.1.1.8.2 tls (const_int 0)) 3648 1.1.1.1.8.2 tls (const_int 0)) 3649 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")) 3650 1.1.1.1.8.2 tls (pc)))] 3651 1.1.1.1.8.2 tls "" 3652 1.1.1.1.8.2 tls "blbs %r1,%0" 3653 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 3654 1.1.1.1.8.2 tls 3655 1.1.1.1.8.2 tls (define_insn "*blbc_normal" 3656 1.1.1.1.8.2 tls [(set (pc) 3657 1.1.1.1.8.2 tls (if_then_else 3658 1.1.1.1.8.2 tls (eq (zero_extract:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") 3659 1.1.1.1.8.2 tls (const_int 1) 3660 1.1.1.1.8.2 tls (const_int 0)) 3661 1.1.1.1.8.2 tls (const_int 0)) 3662 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")) 3663 1.1.1.1.8.2 tls (pc)))] 3664 1.1.1.1.8.2 tls "" 3665 1.1.1.1.8.2 tls "blbc %r1,%0" 3666 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 3667 1.1.1.1.8.2 tls 3668 1.1.1.1.8.2 tls (define_split 3669 1.1.1.1.8.2 tls [(parallel 3670 1.1.1.1.8.2 tls [(set (pc) 3671 1.1.1.1.8.2 tls (if_then_else 3672 1.1.1.1.8.2 tls (match_operator 1 "comparison_operator" 3673 1.1.1.1.8.2 tls [(zero_extract:DI (match_operand:DI 2 "register_operand" "") 3674 1.1.1.1.8.2 tls (const_int 1) 3675 1.1.1.1.8.2 tls (match_operand:DI 3 "const_int_operand" "")) 3676 1.1.1.1.8.2 tls (const_int 0)]) 3677 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")) 3678 1.1.1.1.8.2 tls (pc))) 3679 1.1.1.1.8.2 tls (clobber (match_operand:DI 4 "register_operand" ""))])] 3680 1.1.1.1.8.2 tls "INTVAL (operands[3]) != 0" 3681 1.1.1.1.8.2 tls [(set (match_dup 4) 3682 1.1.1.1.8.2 tls (lshiftrt:DI (match_dup 2) (match_dup 3))) 3683 1.1.1.1.8.2 tls (set (pc) 3684 1.1.1.1.8.2 tls (if_then_else (match_op_dup 1 3685 1.1.1.1.8.2 tls [(zero_extract:DI (match_dup 4) 3686 1.1.1.1.8.2 tls (const_int 1) 3687 1.1.1.1.8.2 tls (const_int 0)) 3688 1.1.1.1.8.2 tls (const_int 0)]) 3689 1.1.1.1.8.2 tls (label_ref (match_dup 0)) 3690 1.1.1.1.8.2 tls (pc)))] 3691 1.1.1.1.8.2 tls "") 3692 1.1.1.1.8.2 tls 3694 1.1.1.1.8.2 tls ;; The following are the corresponding floating-point insns. Recall 3695 1.1.1.1.8.2 tls ;; we need to have variants that expand the arguments from SFmode 3696 1.1.1.1.8.2 tls ;; to DFmode. 3697 1.1.1.1.8.2 tls 3698 1.1.1.1.8.2 tls (define_insn "*cmpdf_ieee" 3699 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=&f") 3700 1.1.1.1.8.2 tls (match_operator:DF 1 "alpha_fp_comparison_operator" 3701 1.1.1.1.8.2 tls [(match_operand:DF 2 "reg_or_0_operand" "fG") 3702 1.1.1.1.8.2 tls (match_operand:DF 3 "reg_or_0_operand" "fG")]))] 3703 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" 3704 1.1.1.1.8.2 tls "cmp%-%C1%/ %R2,%R3,%0" 3705 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3706 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3707 1.1.1.1.8.2 tls (set_attr "trap_suffix" "su")]) 3708 1.1.1.1.8.2 tls 3709 1.1.1.1.8.2 tls (define_insn "*cmpdf_internal" 3710 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3711 1.1.1.1.8.2 tls (match_operator:DF 1 "alpha_fp_comparison_operator" 3712 1.1.1.1.8.2 tls [(match_operand:DF 2 "reg_or_0_operand" "fG") 3713 1.1.1.1.8.2 tls (match_operand:DF 3 "reg_or_0_operand" "fG")]))] 3714 1.1.1.1.8.2 tls "TARGET_FP" 3715 1.1.1.1.8.2 tls "cmp%-%C1%/ %R2,%R3,%0" 3716 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3717 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3718 1.1.1.1.8.2 tls (set_attr "trap_suffix" "su")]) 3719 1.1.1.1.8.2 tls 3720 1.1.1.1.8.2 tls (define_insn "*cmpdf_ext1" 3721 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3722 1.1.1.1.8.2 tls (match_operator:DF 1 "alpha_fp_comparison_operator" 3723 1.1.1.1.8.2 tls [(float_extend:DF 3724 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")) 3725 1.1.1.1.8.2 tls (match_operand:DF 3 "reg_or_0_operand" "fG")]))] 3726 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3727 1.1.1.1.8.2 tls "cmp%-%C1%/ %R2,%R3,%0" 3728 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3729 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3730 1.1.1.1.8.2 tls (set_attr "trap_suffix" "su")]) 3731 1.1.1.1.8.2 tls 3732 1.1.1.1.8.2 tls (define_insn "*cmpdf_ext2" 3733 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3734 1.1.1.1.8.2 tls (match_operator:DF 1 "alpha_fp_comparison_operator" 3735 1.1.1.1.8.2 tls [(match_operand:DF 2 "reg_or_0_operand" "fG") 3736 1.1.1.1.8.2 tls (float_extend:DF 3737 1.1.1.1.8.2 tls (match_operand:SF 3 "reg_or_0_operand" "fG"))]))] 3738 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3739 1.1.1.1.8.2 tls "cmp%-%C1%/ %R2,%R3,%0" 3740 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3741 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3742 1.1.1.1.8.2 tls (set_attr "trap_suffix" "su")]) 3743 1.1.1.1.8.2 tls 3744 1.1.1.1.8.2 tls (define_insn "*cmpdf_ext3" 3745 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f") 3746 1.1.1.1.8.2 tls (match_operator:DF 1 "alpha_fp_comparison_operator" 3747 1.1.1.1.8.2 tls [(float_extend:DF 3748 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")) 3749 1.1.1.1.8.2 tls (float_extend:DF 3750 1.1.1.1.8.2 tls (match_operand:SF 3 "reg_or_0_operand" "fG"))]))] 3751 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3752 1.1.1.1.8.2 tls "cmp%-%C1%/ %R2,%R3,%0" 3753 1.1.1.1.8.2 tls [(set_attr "type" "fadd") 3754 1.1.1.1.8.2 tls (set_attr "trap" "yes") 3755 1.1.1.1.8.2 tls (set_attr "trap_suffix" "su")]) 3756 1.1.1.1.8.2 tls 3757 1.1.1.1.8.2 tls (define_insn "*movdfcc_internal" 3758 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f,f") 3759 1.1.1.1.8.2 tls (if_then_else:DF 3760 1.1.1.1.8.2 tls (match_operator 3 "signed_comparison_operator" 3761 1.1.1.1.8.2 tls [(match_operand:DF 4 "reg_or_0_operand" "fG,fG") 3762 1.1.1.1.8.2 tls (match_operand:DF 2 "const0_operand" "G,G")]) 3763 1.1.1.1.8.2 tls (match_operand:DF 1 "reg_or_0_operand" "fG,0") 3764 1.1.1.1.8.2 tls (match_operand:DF 5 "reg_or_0_operand" "0,fG")))] 3765 1.1.1.1.8.2 tls "TARGET_FP" 3766 1.1.1.1.8.2 tls "@ 3767 1.1.1.1.8.2 tls fcmov%C3 %R4,%R1,%0 3768 1.1.1.1.8.2 tls fcmov%D3 %R4,%R5,%0" 3769 1.1.1.1.8.2 tls [(set_attr "type" "fcmov")]) 3770 1.1.1.1.8.2 tls 3771 1.1.1.1.8.2 tls (define_insn "*movsfcc_internal" 3772 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f,f") 3773 1.1.1.1.8.2 tls (if_then_else:SF 3774 1.1.1.1.8.2 tls (match_operator 3 "signed_comparison_operator" 3775 1.1.1.1.8.2 tls [(match_operand:DF 4 "reg_or_0_operand" "fG,fG") 3776 1.1.1.1.8.2 tls (match_operand:DF 2 "const0_operand" "G,G")]) 3777 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG,0") 3778 1.1.1.1.8.2 tls (match_operand:SF 5 "reg_or_0_operand" "0,fG")))] 3779 1.1.1.1.8.2 tls "TARGET_FP" 3780 1.1.1.1.8.2 tls "@ 3781 1.1.1.1.8.2 tls fcmov%C3 %R4,%R1,%0 3782 1.1.1.1.8.2 tls fcmov%D3 %R4,%R5,%0" 3783 1.1.1.1.8.2 tls [(set_attr "type" "fcmov")]) 3784 1.1.1.1.8.2 tls 3785 1.1.1.1.8.2 tls (define_insn "*movdfcc_ext1" 3786 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f,f") 3787 1.1.1.1.8.2 tls (if_then_else:DF 3788 1.1.1.1.8.2 tls (match_operator 3 "signed_comparison_operator" 3789 1.1.1.1.8.2 tls [(match_operand:DF 4 "reg_or_0_operand" "fG,fG") 3790 1.1.1.1.8.2 tls (match_operand:DF 2 "const0_operand" "G,G")]) 3791 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG,0")) 3792 1.1.1.1.8.2 tls (match_operand:DF 5 "reg_or_0_operand" "0,fG")))] 3793 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3794 1.1.1.1.8.2 tls "@ 3795 1.1.1.1.8.2 tls fcmov%C3 %R4,%R1,%0 3796 1.1.1.1.8.2 tls fcmov%D3 %R4,%R5,%0" 3797 1.1.1.1.8.2 tls [(set_attr "type" "fcmov")]) 3798 1.1.1.1.8.2 tls 3799 1.1.1.1.8.2 tls (define_insn "*movdfcc_ext2" 3800 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f,f") 3801 1.1.1.1.8.2 tls (if_then_else:DF 3802 1.1.1.1.8.2 tls (match_operator 3 "signed_comparison_operator" 3803 1.1.1.1.8.2 tls [(float_extend:DF 3804 1.1.1.1.8.2 tls (match_operand:SF 4 "reg_or_0_operand" "fG,fG")) 3805 1.1.1.1.8.2 tls (match_operand:DF 2 "const0_operand" "G,G")]) 3806 1.1.1.1.8.2 tls (match_operand:DF 1 "reg_or_0_operand" "fG,0") 3807 1.1.1.1.8.2 tls (match_operand:DF 5 "reg_or_0_operand" "0,fG")))] 3808 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3809 1.1.1.1.8.2 tls "@ 3810 1.1.1.1.8.2 tls fcmov%C3 %R4,%R1,%0 3811 1.1.1.1.8.2 tls fcmov%D3 %R4,%R5,%0" 3812 1.1.1.1.8.2 tls [(set_attr "type" "fcmov")]) 3813 1.1.1.1.8.2 tls 3814 1.1.1.1.8.2 tls (define_insn "*movdfcc_ext3" 3815 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "=f,f") 3816 1.1.1.1.8.2 tls (if_then_else:SF 3817 1.1.1.1.8.2 tls (match_operator 3 "signed_comparison_operator" 3818 1.1.1.1.8.2 tls [(float_extend:DF 3819 1.1.1.1.8.2 tls (match_operand:SF 4 "reg_or_0_operand" "fG,fG")) 3820 1.1.1.1.8.2 tls (match_operand:DF 2 "const0_operand" "G,G")]) 3821 1.1.1.1.8.2 tls (match_operand:SF 1 "reg_or_0_operand" "fG,0") 3822 1.1.1.1.8.2 tls (match_operand:SF 5 "reg_or_0_operand" "0,fG")))] 3823 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3824 1.1.1.1.8.2 tls "@ 3825 1.1.1.1.8.2 tls fcmov%C3 %R4,%R1,%0 3826 1.1.1.1.8.2 tls fcmov%D3 %R4,%R5,%0" 3827 1.1.1.1.8.2 tls [(set_attr "type" "fcmov")]) 3828 1.1.1.1.8.2 tls 3829 1.1.1.1.8.2 tls (define_insn "*movdfcc_ext4" 3830 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "=f,f") 3831 1.1.1.1.8.2 tls (if_then_else:DF 3832 1.1.1.1.8.2 tls (match_operator 3 "signed_comparison_operator" 3833 1.1.1.1.8.2 tls [(float_extend:DF 3834 1.1.1.1.8.2 tls (match_operand:SF 4 "reg_or_0_operand" "fG,fG")) 3835 1.1.1.1.8.2 tls (match_operand:DF 2 "const0_operand" "G,G")]) 3836 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG,0")) 3837 1.1.1.1.8.2 tls (match_operand:DF 5 "reg_or_0_operand" "0,fG")))] 3838 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3839 1.1.1.1.8.2 tls "@ 3840 1.1.1.1.8.2 tls fcmov%C3 %R4,%R1,%0 3841 1.1.1.1.8.2 tls fcmov%D3 %R4,%R5,%0" 3842 1.1.1.1.8.2 tls [(set_attr "type" "fcmov")]) 3843 1.1.1.1.8.2 tls 3844 1.1.1.1.8.2 tls (define_expand "smaxdf3" 3845 1.1.1.1.8.2 tls [(set (match_dup 3) 3846 1.1.1.1.8.2 tls (le:DF (match_operand:DF 1 "reg_or_0_operand" "") 3847 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" ""))) 3848 1.1.1.1.8.2 tls (set (match_operand:DF 0 "register_operand" "") 3849 1.1.1.1.8.2 tls (if_then_else:DF (eq (match_dup 3) (match_dup 4)) 3850 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3851 1.1.1.1.8.2 tls "TARGET_FP" 3852 1.1.1.1.8.2 tls { 3853 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DFmode); 3854 1.1.1.1.8.2 tls operands[4] = CONST0_RTX (DFmode); 3855 1.1.1.1.8.2 tls }) 3856 1.1.1.1.8.2 tls 3857 1.1.1.1.8.2 tls (define_expand "smindf3" 3858 1.1.1.1.8.2 tls [(set (match_dup 3) 3859 1.1.1.1.8.2 tls (lt:DF (match_operand:DF 1 "reg_or_0_operand" "") 3860 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" ""))) 3861 1.1.1.1.8.2 tls (set (match_operand:DF 0 "register_operand" "") 3862 1.1.1.1.8.2 tls (if_then_else:DF (ne (match_dup 3) (match_dup 4)) 3863 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3864 1.1.1.1.8.2 tls "TARGET_FP" 3865 1.1.1.1.8.2 tls { 3866 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DFmode); 3867 1.1.1.1.8.2 tls operands[4] = CONST0_RTX (DFmode); 3868 1.1.1.1.8.2 tls }) 3869 1.1.1.1.8.2 tls 3870 1.1.1.1.8.2 tls (define_expand "smaxsf3" 3871 1.1.1.1.8.2 tls [(set (match_dup 3) 3872 1.1.1.1.8.2 tls (le:DF (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "")) 3873 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 2 "reg_or_0_operand" "")))) 3874 1.1.1.1.8.2 tls (set (match_operand:SF 0 "register_operand" "") 3875 1.1.1.1.8.2 tls (if_then_else:SF (eq (match_dup 3) (match_dup 4)) 3876 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3877 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3878 1.1.1.1.8.2 tls { 3879 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DFmode); 3880 1.1.1.1.8.2 tls operands[4] = CONST0_RTX (DFmode); 3881 1.1.1.1.8.2 tls }) 3882 1.1.1.1.8.2 tls 3883 1.1.1.1.8.2 tls (define_expand "sminsf3" 3884 1.1.1.1.8.2 tls [(set (match_dup 3) 3885 1.1.1.1.8.2 tls (lt:DF (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "")) 3886 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 2 "reg_or_0_operand" "")))) 3887 1.1.1.1.8.2 tls (set (match_operand:SF 0 "register_operand" "") 3888 1.1.1.1.8.2 tls (if_then_else:SF (ne (match_dup 3) (match_dup 4)) 3889 1.1.1.1.8.2 tls (match_dup 1) (match_dup 2)))] 3890 1.1.1.1.8.2 tls "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" 3891 1.1.1.1.8.2 tls { 3892 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DFmode); 3893 1.1.1.1.8.2 tls operands[4] = CONST0_RTX (DFmode); 3894 1.1.1.1.8.2 tls }) 3895 1.1.1.1.8.2 tls 3896 1.1.1.1.8.2 tls (define_insn "*fbcc_normal" 3897 1.1.1.1.8.2 tls [(set (pc) 3898 1.1.1.1.8.2 tls (if_then_else 3899 1.1.1.1.8.2 tls (match_operator 1 "signed_comparison_operator" 3900 1.1.1.1.8.2 tls [(match_operand:DF 2 "reg_or_0_operand" "fG") 3901 1.1.1.1.8.2 tls (match_operand:DF 3 "const0_operand" "G")]) 3902 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")) 3903 1.1.1.1.8.2 tls (pc)))] 3904 1.1.1.1.8.2 tls "TARGET_FP" 3905 1.1.1.1.8.2 tls "fb%C1 %R2,%0" 3906 1.1.1.1.8.2 tls [(set_attr "type" "fbr")]) 3907 1.1.1.1.8.2 tls 3908 1.1.1.1.8.2 tls (define_insn "*fbcc_ext_normal" 3909 1.1.1.1.8.2 tls [(set (pc) 3910 1.1.1.1.8.2 tls (if_then_else 3911 1.1.1.1.8.2 tls (match_operator 1 "signed_comparison_operator" 3912 1.1.1.1.8.2 tls [(float_extend:DF 3913 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_0_operand" "fG")) 3914 1.1.1.1.8.2 tls (match_operand:DF 3 "const0_operand" "G")]) 3915 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")) 3916 1.1.1.1.8.2 tls (pc)))] 3917 1.1.1.1.8.2 tls "TARGET_FP" 3918 1.1.1.1.8.2 tls "fb%C1 %R2,%0" 3919 1.1.1.1.8.2 tls [(set_attr "type" "fbr")]) 3920 1.1.1.1.8.2 tls 3922 1.1.1.1.8.2 tls ;; These are the main define_expand's used to make conditional branches 3923 1.1.1.1.8.2 tls ;; and compares. 3924 1.1.1.1.8.2 tls 3925 1.1.1.1.8.2 tls (define_expand "cbranchdf4" 3926 1.1.1.1.8.2 tls [(use (match_operator 0 "alpha_cbranch_operator" 3927 1.1.1.1.8.2 tls [(match_operand:DF 1 "reg_or_0_operand" "") 3928 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_0_operand" "")])) 3929 1.1.1.1.8.2 tls (use (match_operand 3 ""))] 3930 1.1.1.1.8.2 tls "TARGET_FP" 3931 1.1.1.1.8.2 tls { alpha_emit_conditional_branch (operands, DFmode); DONE; }) 3932 1.1.1.1.8.2 tls 3933 1.1.1.1.8.2 tls (define_expand "cbranchtf4" 3934 1.1.1.1.8.2 tls [(use (match_operator 0 "alpha_cbranch_operator" 3935 1.1.1.1.8.2 tls [(match_operand:TF 1 "general_operand") 3936 1.1.1.1.8.2 tls (match_operand:TF 2 "general_operand")])) 3937 1.1.1.1.8.2 tls (use (match_operand 3 ""))] 3938 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 3939 1.1.1.1.8.2 tls { alpha_emit_conditional_branch (operands, TFmode); DONE; }) 3940 1.1.1.1.8.2 tls 3941 1.1.1.1.8.2 tls (define_expand "cbranchdi4" 3942 1.1.1.1.8.2 tls [(use (match_operator 0 "alpha_cbranch_operator" 3943 1.1.1.1.8.2 tls [(match_operand:DI 1 "some_operand") 3944 1.1.1.1.8.2 tls (match_operand:DI 2 "some_operand")])) 3945 1.1.1.1.8.2 tls (use (match_operand 3 ""))] 3946 1.1.1.1.8.2 tls "" 3947 1.1.1.1.8.2 tls { alpha_emit_conditional_branch (operands, DImode); DONE; }) 3948 1.1.1.1.8.2 tls 3949 1.1.1.1.8.2 tls (define_expand "cstoredf4" 3950 1.1.1.1.8.2 tls [(use (match_operator:DI 1 "alpha_cbranch_operator" 3951 1.1.1.1.8.2 tls [(match_operand:DF 2 "reg_or_0_operand") 3952 1.1.1.1.8.2 tls (match_operand:DF 3 "reg_or_0_operand")])) 3953 1.1.1.1.8.2 tls (clobber (match_operand:DI 0 "register_operand"))] 3954 1.1.1.1.8.2 tls "TARGET_FP" 3955 1.1.1.1.8.2 tls { if (!alpha_emit_setcc (operands, DFmode)) FAIL; else DONE; }) 3956 1.1.1.1.8.2 tls 3957 1.1.1.1.8.2 tls (define_expand "cstoretf4" 3958 1.1.1.1.8.2 tls [(use (match_operator:DI 1 "alpha_cbranch_operator" 3959 1.1.1.1.8.2 tls [(match_operand:TF 2 "general_operand") 3960 1.1.1.1.8.2 tls (match_operand:TF 3 "general_operand")])) 3961 1.1.1.1.8.2 tls (clobber (match_operand:DI 0 "register_operand"))] 3962 1.1.1.1.8.2 tls "TARGET_HAS_XFLOATING_LIBS" 3963 1.1.1.1.8.2 tls { if (!alpha_emit_setcc (operands, TFmode)) FAIL; else DONE; }) 3964 1.1.1.1.8.2 tls 3965 1.1.1.1.8.2 tls (define_expand "cstoredi4" 3966 1.1.1.1.8.2 tls [(use (match_operator:DI 1 "alpha_cbranch_operator" 3967 1.1.1.1.8.2 tls [(match_operand:DI 2 "some_operand") 3968 1.1.1.1.8.2 tls (match_operand:DI 3 "some_operand")])) 3969 1.1.1.1.8.2 tls (clobber (match_operand:DI 0 "register_operand"))] 3970 1.1.1.1.8.2 tls "" 3971 1.1.1.1.8.2 tls { if (!alpha_emit_setcc (operands, DImode)) FAIL; else DONE; }) 3972 1.1.1.1.8.2 tls 3974 1.1.1.1.8.2 tls ;; These are the main define_expand's used to make conditional moves. 3975 1.1.1.1.8.2 tls 3976 1.1.1.1.8.2 tls (define_expand "movsicc" 3977 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "") 3978 1.1.1.1.8.2 tls (if_then_else:SI (match_operand 1 "comparison_operator" "") 3979 1.1.1.1.8.2 tls (match_operand:SI 2 "reg_or_8bit_operand" "") 3980 1.1.1.1.8.2 tls (match_operand:SI 3 "reg_or_8bit_operand" "")))] 3981 1.1.1.1.8.2 tls "" 3982 1.1.1.1.8.2 tls { 3983 1.1.1.1.8.2 tls if ((operands[1] = alpha_emit_conditional_move (operands[1], SImode)) == 0) 3984 1.1.1.1.8.2 tls FAIL; 3985 1.1.1.1.8.2 tls }) 3986 1.1.1.1.8.2 tls 3987 1.1.1.1.8.2 tls (define_expand "movdicc" 3988 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 3989 1.1.1.1.8.2 tls (if_then_else:DI (match_operand 1 "comparison_operator" "") 3990 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "") 3991 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_8bit_operand" "")))] 3992 1.1.1.1.8.2 tls "" 3993 1.1.1.1.8.2 tls { 3994 1.1.1.1.8.2 tls if ((operands[1] = alpha_emit_conditional_move (operands[1], DImode)) == 0) 3995 1.1.1.1.8.2 tls FAIL; 3996 1.1.1.1.8.2 tls }) 3997 1.1.1.1.8.2 tls 3998 1.1.1.1.8.2 tls (define_expand "movsfcc" 3999 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "register_operand" "") 4000 1.1.1.1.8.2 tls (if_then_else:SF (match_operand 1 "comparison_operator" "") 4001 1.1.1.1.8.2 tls (match_operand:SF 2 "reg_or_8bit_operand" "") 4002 1.1.1.1.8.2 tls (match_operand:SF 3 "reg_or_8bit_operand" "")))] 4003 1.1.1.1.8.2 tls "" 4004 1.1.1.1.8.2 tls { 4005 1.1.1.1.8.2 tls if ((operands[1] = alpha_emit_conditional_move (operands[1], SFmode)) == 0) 4006 1.1.1.1.8.2 tls FAIL; 4007 1.1.1.1.8.2 tls }) 4008 1.1.1.1.8.2 tls 4009 1.1.1.1.8.2 tls (define_expand "movdfcc" 4010 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "register_operand" "") 4011 1.1.1.1.8.2 tls (if_then_else:DF (match_operand 1 "comparison_operator" "") 4012 1.1.1.1.8.2 tls (match_operand:DF 2 "reg_or_8bit_operand" "") 4013 1.1.1.1.8.2 tls (match_operand:DF 3 "reg_or_8bit_operand" "")))] 4014 1.1.1.1.8.2 tls "" 4015 1.1.1.1.8.2 tls { 4016 1.1.1.1.8.2 tls if ((operands[1] = alpha_emit_conditional_move (operands[1], DFmode)) == 0) 4017 1.1.1.1.8.2 tls FAIL; 4018 1.1.1.1.8.2 tls }) 4019 1.1.1.1.8.2 tls 4021 1.1.1.1.8.2 tls ;; These define_split definitions are used in cases when comparisons have 4022 1.1.1.1.8.2 tls ;; not be stated in the correct way and we need to reverse the second 4023 1.1.1.1.8.2 tls ;; comparison. For example, x >= 7 has to be done as x < 6 with the 4024 1.1.1.1.8.2 tls ;; comparison that tests the result being reversed. We have one define_split 4025 1.1.1.1.8.2 tls ;; for each use of a comparison. They do not match valid insns and need 4026 1.1.1.1.8.2 tls ;; not generate valid insns. 4027 1.1.1.1.8.2 tls ;; 4028 1.1.1.1.8.2 tls ;; We can also handle equality comparisons (and inequality comparisons in 4029 1.1.1.1.8.2 tls ;; cases where the resulting add cannot overflow) by doing an add followed by 4030 1.1.1.1.8.2 tls ;; a comparison with zero. This is faster since the addition takes one 4031 1.1.1.1.8.2 tls ;; less cycle than a compare when feeding into a conditional move. 4032 1.1.1.1.8.2 tls ;; For this case, we also have an SImode pattern since we can merge the add 4033 1.1.1.1.8.2 tls ;; and sign extend and the order doesn't matter. 4034 1.1.1.1.8.2 tls ;; 4035 1.1.1.1.8.2 tls ;; We do not do this for floating-point, since it isn't clear how the "wrong" 4036 1.1.1.1.8.2 tls ;; operation could have been generated. 4037 1.1.1.1.8.2 tls 4038 1.1.1.1.8.2 tls (define_split 4039 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 4040 1.1.1.1.8.2 tls (if_then_else:DI 4041 1.1.1.1.8.2 tls (match_operator 1 "comparison_operator" 4042 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "") 4043 1.1.1.1.8.2 tls (match_operand:DI 3 "reg_or_cint_operand" "")]) 4044 1.1.1.1.8.2 tls (match_operand:DI 4 "reg_or_cint_operand" "") 4045 1.1.1.1.8.2 tls (match_operand:DI 5 "reg_or_cint_operand" ""))) 4046 1.1.1.1.8.2 tls (clobber (match_operand:DI 6 "register_operand" ""))] 4047 1.1.1.1.8.2 tls "operands[3] != const0_rtx" 4048 1.1.1.1.8.2 tls [(set (match_dup 6) (match_dup 7)) 4049 1.1.1.1.8.2 tls (set (match_dup 0) 4050 1.1.1.1.8.2 tls (if_then_else:DI (match_dup 8) (match_dup 4) (match_dup 5)))] 4051 1.1.1.1.8.2 tls { 4052 1.1.1.1.8.2 tls enum rtx_code code = GET_CODE (operands[1]); 4053 1.1.1.1.8.2 tls int unsignedp = (code == GEU || code == LEU || code == GTU || code == LTU); 4054 1.1.1.1.8.2 tls 4055 1.1.1.1.8.2 tls /* If we are comparing for equality with a constant and that constant 4056 1.1.1.1.8.2 tls appears in the arm when the register equals the constant, use the 4057 1.1.1.1.8.2 tls register since that is more likely to match (and to produce better code 4058 1.1.1.1.8.2 tls if both would). */ 4059 1.1.1.1.8.2 tls 4060 1.1.1.1.8.2 tls if (code == EQ && CONST_INT_P (operands[3]) 4061 1.1.1.1.8.2 tls && rtx_equal_p (operands[4], operands[3])) 4062 1.1.1.1.8.2 tls operands[4] = operands[2]; 4063 1.1.1.1.8.2 tls 4064 1.1.1.1.8.2 tls else if (code == NE && CONST_INT_P (operands[3]) 4065 1.1.1.1.8.2 tls && rtx_equal_p (operands[5], operands[3])) 4066 1.1.1.1.8.2 tls operands[5] = operands[2]; 4067 1.1.1.1.8.2 tls 4068 1.1.1.1.8.2 tls if (code == NE || code == EQ 4069 1.1.1.1.8.2 tls || (extended_count (operands[2], DImode, unsignedp) >= 1 4070 1.1.1.1.8.2 tls && extended_count (operands[3], DImode, unsignedp) >= 1)) 4071 1.1.1.1.8.2 tls { 4072 1.1.1.1.8.2 tls if (CONST_INT_P (operands[3])) 4073 1.1.1.1.8.2 tls operands[7] = gen_rtx_PLUS (DImode, operands[2], 4074 1.1.1.1.8.2 tls GEN_INT (- INTVAL (operands[3]))); 4075 1.1.1.1.8.2 tls else 4076 1.1.1.1.8.2 tls operands[7] = gen_rtx_MINUS (DImode, operands[2], operands[3]); 4077 1.1.1.1.8.2 tls 4078 1.1.1.1.8.2 tls operands[8] = gen_rtx_fmt_ee (code, VOIDmode, operands[6], const0_rtx); 4079 1.1.1.1.8.2 tls } 4080 1.1.1.1.8.2 tls 4081 1.1.1.1.8.2 tls else if (code == EQ || code == LE || code == LT 4082 1.1.1.1.8.2 tls || code == LEU || code == LTU) 4083 1.1.1.1.8.2 tls { 4084 1.1.1.1.8.2 tls operands[7] = gen_rtx_fmt_ee (code, DImode, operands[2], operands[3]); 4085 1.1.1.1.8.2 tls operands[8] = gen_rtx_NE (VOIDmode, operands[6], const0_rtx); 4086 1.1.1.1.8.2 tls } 4087 1.1.1.1.8.2 tls else 4088 1.1.1.1.8.2 tls { 4089 1.1.1.1.8.2 tls operands[7] = gen_rtx_fmt_ee (reverse_condition (code), DImode, 4090 1.1.1.1.8.2 tls operands[2], operands[3]); 4091 1.1.1.1.8.2 tls operands[8] = gen_rtx_EQ (VOIDmode, operands[6], const0_rtx); 4092 1.1.1.1.8.2 tls } 4093 1.1.1.1.8.2 tls }) 4094 1.1.1.1.8.2 tls 4095 1.1.1.1.8.2 tls (define_split 4096 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 4097 1.1.1.1.8.2 tls (if_then_else:DI 4098 1.1.1.1.8.2 tls (match_operator 1 "comparison_operator" 4099 1.1.1.1.8.2 tls [(match_operand:SI 2 "reg_or_0_operand" "") 4100 1.1.1.1.8.2 tls (match_operand:SI 3 "reg_or_cint_operand" "")]) 4101 1.1.1.1.8.2 tls (match_operand:DI 4 "reg_or_8bit_operand" "") 4102 1.1.1.1.8.2 tls (match_operand:DI 5 "reg_or_8bit_operand" ""))) 4103 1.1.1.1.8.2 tls (clobber (match_operand:DI 6 "register_operand" ""))] 4104 1.1.1.1.8.2 tls "operands[3] != const0_rtx 4105 1.1.1.1.8.2 tls && (GET_CODE (operands[1]) == EQ || GET_CODE (operands[1]) == NE)" 4106 1.1.1.1.8.2 tls [(set (match_dup 6) (match_dup 7)) 4107 1.1.1.1.8.2 tls (set (match_dup 0) 4108 1.1.1.1.8.2 tls (if_then_else:DI (match_dup 8) (match_dup 4) (match_dup 5)))] 4109 1.1.1.1.8.2 tls { 4110 1.1.1.1.8.2 tls enum rtx_code code = GET_CODE (operands[1]); 4111 1.1.1.1.8.2 tls int unsignedp = (code == GEU || code == LEU || code == GTU || code == LTU); 4112 1.1.1.1.8.2 tls rtx tem; 4113 1.1.1.1.8.2 tls 4114 1.1.1.1.8.2 tls if ((code != NE && code != EQ 4115 1.1.1.1.8.2 tls && ! (extended_count (operands[2], DImode, unsignedp) >= 1 4116 1.1.1.1.8.2 tls && extended_count (operands[3], DImode, unsignedp) >= 1))) 4117 1.1.1.1.8.2 tls FAIL; 4118 1.1.1.1.8.2 tls 4119 1.1.1.1.8.2 tls if (CONST_INT_P (operands[3])) 4120 1.1.1.1.8.2 tls tem = gen_rtx_PLUS (SImode, operands[2], 4121 1.1.1.1.8.2 tls GEN_INT (- INTVAL (operands[3]))); 4122 1.1.1.1.8.2 tls else 4123 1.1.1.1.8.2 tls tem = gen_rtx_MINUS (SImode, operands[2], operands[3]); 4124 1.1.1.1.8.2 tls 4125 1.1.1.1.8.2 tls operands[7] = gen_rtx_SIGN_EXTEND (DImode, tem); 4126 1.1.1.1.8.2 tls operands[8] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode, 4127 1.1.1.1.8.2 tls operands[6], const0_rtx); 4128 1.1.1.1.8.2 tls }) 4129 1.1.1.1.8.2 tls 4130 1.1.1.1.8.2 tls ;; Prefer to use cmp and arithmetic when possible instead of a cmove. 4131 1.1.1.1.8.2 tls 4132 1.1.1.1.8.2 tls (define_split 4133 1.1.1.1.8.2 tls [(set (match_operand 0 "register_operand" "") 4134 1.1.1.1.8.2 tls (if_then_else (match_operator 1 "signed_comparison_operator" 4135 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "") 4136 1.1.1.1.8.2 tls (const_int 0)]) 4137 1.1.1.1.8.2 tls (match_operand 3 "const_int_operand" "") 4138 1.1.1.1.8.2 tls (match_operand 4 "const_int_operand" "")))] 4139 1.1.1.1.8.2 tls "" 4140 1.1.1.1.8.2 tls [(const_int 0)] 4141 1.1.1.1.8.2 tls { 4142 1.1.1.1.8.2 tls if (alpha_split_conditional_move (GET_CODE (operands[1]), operands[0], 4143 1.1.1.1.8.2 tls operands[2], operands[3], operands[4])) 4144 1.1.1.1.8.2 tls DONE; 4145 1.1.1.1.8.2 tls else 4146 1.1.1.1.8.2 tls FAIL; 4147 1.1.1.1.8.2 tls }) 4148 1.1.1.1.8.2 tls 4149 1.1.1.1.8.2 tls ;; ??? Why combine is allowed to create such non-canonical rtl, I don't know. 4150 1.1.1.1.8.2 tls ;; Oh well, we match it in movcc, so it must be partially our fault. 4151 1.1.1.1.8.2 tls (define_split 4152 1.1.1.1.8.2 tls [(set (match_operand 0 "register_operand" "") 4153 1.1.1.1.8.2 tls (if_then_else (match_operator 1 "signed_comparison_operator" 4154 1.1.1.1.8.2 tls [(const_int 0) 4155 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")]) 4156 1.1.1.1.8.2 tls (match_operand 3 "const_int_operand" "") 4157 1.1.1.1.8.2 tls (match_operand 4 "const_int_operand" "")))] 4158 1.1.1.1.8.2 tls "" 4159 1.1.1.1.8.2 tls [(const_int 0)] 4160 1.1.1.1.8.2 tls { 4161 1.1.1.1.8.2 tls if (alpha_split_conditional_move (swap_condition (GET_CODE (operands[1])), 4162 1.1.1.1.8.2 tls operands[0], operands[2], operands[3], 4163 1.1.1.1.8.2 tls operands[4])) 4164 1.1.1.1.8.2 tls DONE; 4165 1.1.1.1.8.2 tls else 4166 1.1.1.1.8.2 tls FAIL; 4167 1.1.1.1.8.2 tls }) 4168 1.1.1.1.8.2 tls 4169 1.1.1.1.8.2 tls (define_insn_and_split "*cmp_sadd_di" 4170 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 4171 1.1.1.1.8.2 tls (plus:DI (if_then_else:DI 4172 1.1.1.1.8.2 tls (match_operator 1 "alpha_zero_comparison_operator" 4173 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "rJ") 4174 1.1.1.1.8.2 tls (const_int 0)]) 4175 1.1.1.1.8.2 tls (match_operand:DI 3 "const48_operand" "I") 4176 1.1.1.1.8.2 tls (const_int 0)) 4177 1.1.1.1.8.2 tls (match_operand:DI 4 "sext_add_operand" "rIO"))) 4178 1.1.1.1.8.2 tls (clobber (match_scratch:DI 5 "=r"))] 4179 1.1.1.1.8.2 tls "" 4180 1.1.1.1.8.2 tls "#" 4181 1.1.1.1.8.2 tls "" 4182 1.1.1.1.8.2 tls [(set (match_dup 5) 4183 1.1.1.1.8.2 tls (match_op_dup:DI 1 [(match_dup 2) (const_int 0)])) 4184 1.1.1.1.8.2 tls (set (match_dup 0) 4185 1.1.1.1.8.2 tls (plus:DI (mult:DI (match_dup 5) (match_dup 3)) 4186 1.1.1.1.8.2 tls (match_dup 4)))] 4187 1.1.1.1.8.2 tls { 4188 1.1.1.1.8.2 tls if (can_create_pseudo_p ()) 4189 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 4190 1.1.1.1.8.2 tls else if (reg_overlap_mentioned_p (operands[5], operands[4])) 4191 1.1.1.1.8.2 tls operands[5] = operands[0]; 4192 1.1.1.1.8.2 tls }) 4193 1.1.1.1.8.2 tls 4194 1.1.1.1.8.2 tls (define_insn_and_split "*cmp_sadd_si" 4195 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 4196 1.1.1.1.8.2 tls (plus:SI (if_then_else:SI 4197 1.1.1.1.8.2 tls (match_operator 1 "alpha_zero_comparison_operator" 4198 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "rJ") 4199 1.1.1.1.8.2 tls (const_int 0)]) 4200 1.1.1.1.8.2 tls (match_operand:SI 3 "const48_operand" "I") 4201 1.1.1.1.8.2 tls (const_int 0)) 4202 1.1.1.1.8.2 tls (match_operand:SI 4 "sext_add_operand" "rIO"))) 4203 1.1.1.1.8.2 tls (clobber (match_scratch:DI 5 "=r"))] 4204 1.1.1.1.8.2 tls "" 4205 1.1.1.1.8.2 tls "#" 4206 1.1.1.1.8.2 tls "" 4207 1.1.1.1.8.2 tls [(set (match_dup 5) 4208 1.1.1.1.8.2 tls (match_op_dup:DI 1 [(match_dup 2) (const_int 0)])) 4209 1.1.1.1.8.2 tls (set (match_dup 0) 4210 1.1.1.1.8.2 tls (plus:SI (mult:SI (match_dup 6) (match_dup 3)) 4211 1.1.1.1.8.2 tls (match_dup 4)))] 4212 1.1.1.1.8.2 tls { 4213 1.1.1.1.8.2 tls if (can_create_pseudo_p ()) 4214 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 4215 1.1.1.1.8.2 tls else if (reg_overlap_mentioned_p (operands[5], operands[4])) 4216 1.1.1.1.8.2 tls operands[5] = gen_lowpart (DImode, operands[0]); 4217 1.1.1.1.8.2 tls 4218 1.1.1.1.8.2 tls operands[6] = gen_lowpart (SImode, operands[5]); 4219 1.1.1.1.8.2 tls }) 4220 1.1.1.1.8.2 tls 4221 1.1.1.1.8.2 tls (define_insn_and_split "*cmp_sadd_sidi" 4222 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 4223 1.1.1.1.8.2 tls (sign_extend:DI 4224 1.1.1.1.8.2 tls (plus:SI (if_then_else:SI 4225 1.1.1.1.8.2 tls (match_operator 1 "alpha_zero_comparison_operator" 4226 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "rJ") 4227 1.1.1.1.8.2 tls (const_int 0)]) 4228 1.1.1.1.8.2 tls (match_operand:SI 3 "const48_operand" "I") 4229 1.1.1.1.8.2 tls (const_int 0)) 4230 1.1.1.1.8.2 tls (match_operand:SI 4 "sext_add_operand" "rIO")))) 4231 1.1.1.1.8.2 tls (clobber (match_scratch:DI 5 "=r"))] 4232 1.1.1.1.8.2 tls "" 4233 1.1.1.1.8.2 tls "#" 4234 1.1.1.1.8.2 tls "" 4235 1.1.1.1.8.2 tls [(set (match_dup 5) 4236 1.1.1.1.8.2 tls (match_op_dup:DI 1 [(match_dup 2) (const_int 0)])) 4237 1.1.1.1.8.2 tls (set (match_dup 0) 4238 1.1.1.1.8.2 tls (sign_extend:DI (plus:SI (mult:SI (match_dup 6) (match_dup 3)) 4239 1.1.1.1.8.2 tls (match_dup 4))))] 4240 1.1.1.1.8.2 tls { 4241 1.1.1.1.8.2 tls if (can_create_pseudo_p ()) 4242 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 4243 1.1.1.1.8.2 tls else if (reg_overlap_mentioned_p (operands[5], operands[4])) 4244 1.1.1.1.8.2 tls operands[5] = operands[0]; 4245 1.1.1.1.8.2 tls 4246 1.1.1.1.8.2 tls operands[6] = gen_lowpart (SImode, operands[5]); 4247 1.1.1.1.8.2 tls }) 4248 1.1.1.1.8.2 tls 4249 1.1.1.1.8.2 tls (define_insn_and_split "*cmp_ssub_di" 4250 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 4251 1.1.1.1.8.2 tls (minus:DI (if_then_else:DI 4252 1.1.1.1.8.2 tls (match_operator 1 "alpha_zero_comparison_operator" 4253 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "rJ") 4254 1.1.1.1.8.2 tls (const_int 0)]) 4255 1.1.1.1.8.2 tls (match_operand:DI 3 "const48_operand" "I") 4256 1.1.1.1.8.2 tls (const_int 0)) 4257 1.1.1.1.8.2 tls (match_operand:DI 4 "reg_or_8bit_operand" "rI"))) 4258 1.1.1.1.8.2 tls (clobber (match_scratch:DI 5 "=r"))] 4259 1.1.1.1.8.2 tls "" 4260 1.1.1.1.8.2 tls "#" 4261 1.1.1.1.8.2 tls "" 4262 1.1.1.1.8.2 tls [(set (match_dup 5) 4263 1.1.1.1.8.2 tls (match_op_dup:DI 1 [(match_dup 2) (const_int 0)])) 4264 1.1.1.1.8.2 tls (set (match_dup 0) 4265 1.1.1.1.8.2 tls (minus:DI (mult:DI (match_dup 5) (match_dup 3)) 4266 1.1.1.1.8.2 tls (match_dup 4)))] 4267 1.1.1.1.8.2 tls { 4268 1.1.1.1.8.2 tls if (can_create_pseudo_p ()) 4269 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 4270 1.1.1.1.8.2 tls else if (reg_overlap_mentioned_p (operands[5], operands[4])) 4271 1.1.1.1.8.2 tls operands[5] = operands[0]; 4272 1.1.1.1.8.2 tls }) 4273 1.1.1.1.8.2 tls 4274 1.1.1.1.8.2 tls (define_insn_and_split "*cmp_ssub_si" 4275 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "=r") 4276 1.1.1.1.8.2 tls (minus:SI (if_then_else:SI 4277 1.1.1.1.8.2 tls (match_operator 1 "alpha_zero_comparison_operator" 4278 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "rJ") 4279 1.1.1.1.8.2 tls (const_int 0)]) 4280 1.1.1.1.8.2 tls (match_operand:SI 3 "const48_operand" "I") 4281 1.1.1.1.8.2 tls (const_int 0)) 4282 1.1.1.1.8.2 tls (match_operand:SI 4 "reg_or_8bit_operand" "rI"))) 4283 1.1.1.1.8.2 tls (clobber (match_scratch:DI 5 "=r"))] 4284 1.1.1.1.8.2 tls "" 4285 1.1.1.1.8.2 tls "#" 4286 1.1.1.1.8.2 tls "" 4287 1.1.1.1.8.2 tls [(set (match_dup 5) 4288 1.1.1.1.8.2 tls (match_op_dup:DI 1 [(match_dup 2) (const_int 0)])) 4289 1.1.1.1.8.2 tls (set (match_dup 0) 4290 1.1.1.1.8.2 tls (minus:SI (mult:SI (match_dup 6) (match_dup 3)) 4291 1.1.1.1.8.2 tls (match_dup 4)))] 4292 1.1.1.1.8.2 tls { 4293 1.1.1.1.8.2 tls if (can_create_pseudo_p ()) 4294 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 4295 1.1.1.1.8.2 tls else if (reg_overlap_mentioned_p (operands[5], operands[4])) 4296 1.1.1.1.8.2 tls operands[5] = gen_lowpart (DImode, operands[0]); 4297 1.1.1.1.8.2 tls 4298 1.1.1.1.8.2 tls operands[6] = gen_lowpart (SImode, operands[5]); 4299 1.1.1.1.8.2 tls }) 4300 1.1.1.1.8.2 tls 4301 1.1.1.1.8.2 tls (define_insn_and_split "*cmp_ssub_sidi" 4302 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 4303 1.1.1.1.8.2 tls (sign_extend:DI 4304 1.1.1.1.8.2 tls (minus:SI (if_then_else:SI 4305 1.1.1.1.8.2 tls (match_operator 1 "alpha_zero_comparison_operator" 4306 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_0_operand" "rJ") 4307 1.1.1.1.8.2 tls (const_int 0)]) 4308 1.1.1.1.8.2 tls (match_operand:SI 3 "const48_operand" "I") 4309 1.1.1.1.8.2 tls (const_int 0)) 4310 1.1.1.1.8.2 tls (match_operand:SI 4 "reg_or_8bit_operand" "rI")))) 4311 1.1.1.1.8.2 tls (clobber (match_scratch:DI 5 "=r"))] 4312 1.1.1.1.8.2 tls "" 4313 1.1.1.1.8.2 tls "#" 4314 1.1.1.1.8.2 tls "" 4315 1.1.1.1.8.2 tls [(set (match_dup 5) 4316 1.1.1.1.8.2 tls (match_op_dup:DI 1 [(match_dup 2) (const_int 0)])) 4317 1.1.1.1.8.2 tls (set (match_dup 0) 4318 1.1.1.1.8.2 tls (sign_extend:DI (minus:SI (mult:SI (match_dup 6) (match_dup 3)) 4319 1.1.1.1.8.2 tls (match_dup 4))))] 4320 1.1.1.1.8.2 tls { 4321 1.1.1.1.8.2 tls if (can_create_pseudo_p ()) 4322 1.1.1.1.8.2 tls operands[5] = gen_reg_rtx (DImode); 4323 1.1.1.1.8.2 tls else if (reg_overlap_mentioned_p (operands[5], operands[4])) 4324 1.1.1.1.8.2 tls operands[5] = operands[0]; 4325 1.1.1.1.8.2 tls 4326 1.1.1.1.8.2 tls operands[6] = gen_lowpart (SImode, operands[5]); 4327 1.1.1.1.8.2 tls }) 4328 1.1.1.1.8.2 tls 4330 1.1.1.1.8.2 tls ;; Here are the CALL and unconditional branch insns. Calls on NT and OSF 4331 1.1.1.1.8.2 tls ;; work differently, so we have different patterns for each. 4332 1.1.1.1.8.2 tls 4333 1.1.1.1.8.2 tls ;; On Unicos/Mk a call information word (CIW) must be generated for each 4334 1.1.1.1.8.2 tls ;; call. The CIW contains information about arguments passed in registers 4335 1.1.1.1.8.2 tls ;; and is stored in the caller's SSIB. Its offset relative to the beginning 4336 1.1.1.1.8.2 tls ;; of the SSIB is passed in $25. Handling this properly is quite complicated 4337 1.1.1.1.8.2 tls ;; in the presence of inlining since the CIWs for calls performed by the 4338 1.1.1.1.8.2 tls ;; inlined function must be stored in the SSIB of the function it is inlined 4339 1.1.1.1.8.2 tls ;; into as well. We encode the CIW in an unspec and append it to the list 4340 1.1.1.1.8.2 tls ;; of the CIWs for the current function only when the instruction for loading 4341 1.1.1.1.8.2 tls ;; $25 is generated. 4342 1.1.1.1.8.2 tls 4343 1.1.1.1.8.2 tls (define_expand "call" 4344 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "" "")) 4345 1.1.1.1.8.2 tls (use (match_operand 1 "" "")) 4346 1.1.1.1.8.2 tls (use (match_operand 2 "" "")) 4347 1.1.1.1.8.2 tls (use (match_operand 3 "" ""))] 4348 1.1.1.1.8.2 tls "" 4349 1.1.1.1.8.2 tls { 4350 1.1.1.1.8.2 tls if (TARGET_ABI_WINDOWS_NT) 4351 1.1.1.1.8.2 tls emit_call_insn (gen_call_nt (operands[0], operands[1])); 4352 1.1.1.1.8.2 tls else if (TARGET_ABI_OPEN_VMS) 4353 1.1.1.1.8.2 tls emit_call_insn (gen_call_vms (operands[0], operands[2])); 4354 1.1.1.1.8.2 tls else if (TARGET_ABI_UNICOSMK) 4355 1.1.1.1.8.2 tls emit_call_insn (gen_call_umk (operands[0], operands[2])); 4356 1.1.1.1.8.2 tls else 4357 1.1.1.1.8.2 tls emit_call_insn (gen_call_osf (operands[0], operands[1])); 4358 1.1.1.1.8.2 tls DONE; 4359 1.1.1.1.8.2 tls }) 4360 1.1.1.1.8.2 tls 4361 1.1.1.1.8.2 tls (define_expand "sibcall" 4362 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_operand 0 "" "")) 4363 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4364 1.1.1.1.8.2 tls (unspec [(reg:DI 29)] UNSPEC_SIBCALL)])] 4365 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 4366 1.1.1.1.8.2 tls { 4367 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[0])); 4368 1.1.1.1.8.2 tls operands[0] = XEXP (operands[0], 0); 4369 1.1.1.1.8.2 tls }) 4370 1.1.1.1.8.2 tls 4371 1.1.1.1.8.2 tls (define_expand "call_osf" 4372 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_operand 0 "" "")) 4373 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4374 1.1.1.1.8.2 tls (use (reg:DI 29)) 4375 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4376 1.1.1.1.8.2 tls "" 4377 1.1.1.1.8.2 tls { 4378 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[0])); 4379 1.1.1.1.8.2 tls 4380 1.1.1.1.8.2 tls operands[0] = XEXP (operands[0], 0); 4381 1.1.1.1.8.2 tls if (! call_operand (operands[0], Pmode)) 4382 1.1.1.1.8.2 tls operands[0] = copy_to_mode_reg (Pmode, operands[0]); 4383 1.1.1.1.8.2 tls }) 4384 1.1.1.1.8.2 tls 4385 1.1.1.1.8.2 tls (define_expand "call_nt" 4386 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_operand 0 "" "")) 4387 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4388 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4389 1.1.1.1.8.2 tls "" 4390 1.1.1.1.8.2 tls { 4391 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[0])); 4392 1.1.1.1.8.2 tls 4393 1.1.1.1.8.2 tls operands[0] = XEXP (operands[0], 0); 4394 1.1.1.1.8.2 tls if (GET_CODE (operands[0]) != SYMBOL_REF && !REG_P (operands[0])) 4395 1.1.1.1.8.2 tls operands[0] = force_reg (DImode, operands[0]); 4396 1.1.1.1.8.2 tls }) 4397 1.1.1.1.8.2 tls 4398 1.1.1.1.8.2 tls ;; Calls on Unicos/Mk are always indirect. 4399 1.1.1.1.8.2 tls ;; op 0: symbol ref for called function 4400 1.1.1.1.8.2 tls ;; op 1: CIW for $25 represented by an unspec 4401 1.1.1.1.8.2 tls 4402 1.1.1.1.8.2 tls (define_expand "call_umk" 4403 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_operand 0 "" "")) 4404 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4405 1.1.1.1.8.2 tls (use (reg:DI 25)) 4406 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4407 1.1.1.1.8.2 tls "" 4408 1.1.1.1.8.2 tls { 4409 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[0])); 4410 1.1.1.1.8.2 tls 4411 1.1.1.1.8.2 tls /* Always load the address of the called function into a register; 4412 1.1.1.1.8.2 tls load the CIW in $25. */ 4413 1.1.1.1.8.2 tls 4414 1.1.1.1.8.2 tls operands[0] = XEXP (operands[0], 0); 4415 1.1.1.1.8.2 tls if (!REG_P (operands[0])) 4416 1.1.1.1.8.2 tls operands[0] = force_reg (DImode, operands[0]); 4417 1.1.1.1.8.2 tls 4418 1.1.1.1.8.2 tls emit_move_insn (gen_rtx_REG (DImode, 25), operands[1]); 4419 1.1.1.1.8.2 tls }) 4420 1.1.1.1.8.2 tls 4421 1.1.1.1.8.2 tls ;; 4422 1.1.1.1.8.2 tls ;; call openvms/alpha 4423 1.1.1.1.8.2 tls ;; op 0: symbol ref for called function 4424 1.1.1.1.8.2 tls ;; op 1: next_arg_reg (argument information value for R25) 4425 1.1.1.1.8.2 tls ;; 4426 1.1.1.1.8.2 tls (define_expand "call_vms" 4427 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_operand 0 "" "")) 4428 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4429 1.1.1.1.8.2 tls (use (match_dup 2)) 4430 1.1.1.1.8.2 tls (use (reg:DI 25)) 4431 1.1.1.1.8.2 tls (use (reg:DI 26)) 4432 1.1.1.1.8.2 tls (clobber (reg:DI 27))])] 4433 1.1.1.1.8.2 tls "" 4434 1.1.1.1.8.2 tls { 4435 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[0])); 4436 1.1.1.1.8.2 tls 4437 1.1.1.1.8.2 tls operands[0] = XEXP (operands[0], 0); 4438 1.1.1.1.8.2 tls 4439 1.1.1.1.8.2 tls /* Always load AI with argument information, then handle symbolic and 4440 1.1.1.1.8.2 tls indirect call differently. Load RA and set operands[2] to PV in 4441 1.1.1.1.8.2 tls both cases. */ 4442 1.1.1.1.8.2 tls 4443 1.1.1.1.8.2 tls emit_move_insn (gen_rtx_REG (DImode, 25), operands[1]); 4444 1.1.1.1.8.2 tls if (GET_CODE (operands[0]) == SYMBOL_REF) 4445 1.1.1.1.8.2 tls { 4446 1.1.1.1.8.2 tls alpha_need_linkage (XSTR (operands[0], 0), 0); 4447 1.1.1.1.8.2 tls 4448 1.1.1.1.8.2 tls operands[2] = const0_rtx; 4449 1.1.1.1.8.2 tls } 4450 1.1.1.1.8.2 tls else 4451 1.1.1.1.8.2 tls { 4452 1.1.1.1.8.2 tls emit_move_insn (gen_rtx_REG (Pmode, 26), 4453 1.1.1.1.8.2 tls gen_rtx_MEM (Pmode, plus_constant (operands[0], 8))); 4454 1.1.1.1.8.2 tls operands[2] = operands[0]; 4455 1.1.1.1.8.2 tls } 4456 1.1.1.1.8.2 tls 4457 1.1.1.1.8.2 tls }) 4458 1.1.1.1.8.2 tls 4459 1.1.1.1.8.2 tls (define_expand "call_value" 4460 1.1.1.1.8.2 tls [(use (match_operand 0 "" "")) 4461 1.1.1.1.8.2 tls (use (match_operand:DI 1 "" "")) 4462 1.1.1.1.8.2 tls (use (match_operand 2 "" "")) 4463 1.1.1.1.8.2 tls (use (match_operand 3 "" "")) 4464 1.1.1.1.8.2 tls (use (match_operand 4 "" ""))] 4465 1.1.1.1.8.2 tls "" 4466 1.1.1.1.8.2 tls { 4467 1.1.1.1.8.2 tls if (TARGET_ABI_WINDOWS_NT) 4468 1.1.1.1.8.2 tls emit_call_insn (gen_call_value_nt (operands[0], operands[1], operands[2])); 4469 1.1.1.1.8.2 tls else if (TARGET_ABI_OPEN_VMS) 4470 1.1.1.1.8.2 tls emit_call_insn (gen_call_value_vms (operands[0], operands[1], 4471 1.1.1.1.8.2 tls operands[3])); 4472 1.1.1.1.8.2 tls else if (TARGET_ABI_UNICOSMK) 4473 1.1.1.1.8.2 tls emit_call_insn (gen_call_value_umk (operands[0], operands[1], 4474 1.1.1.1.8.2 tls operands[3])); 4475 1.1.1.1.8.2 tls else 4476 1.1.1.1.8.2 tls emit_call_insn (gen_call_value_osf (operands[0], operands[1], 4477 1.1.1.1.8.2 tls operands[2])); 4478 1.1.1.1.8.2 tls DONE; 4479 1.1.1.1.8.2 tls }) 4480 1.1.1.1.8.2 tls 4481 1.1.1.1.8.2 tls (define_expand "sibcall_value" 4482 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 4483 1.1.1.1.8.2 tls (call (mem:DI (match_operand 1 "" "")) 4484 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 4485 1.1.1.1.8.2 tls (unspec [(reg:DI 29)] UNSPEC_SIBCALL)])] 4486 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 4487 1.1.1.1.8.2 tls { 4488 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[1])); 4489 1.1.1.1.8.2 tls operands[1] = XEXP (operands[1], 0); 4490 1.1.1.1.8.2 tls }) 4491 1.1.1.1.8.2 tls 4492 1.1.1.1.8.2 tls (define_expand "call_value_osf" 4493 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 4494 1.1.1.1.8.2 tls (call (mem:DI (match_operand 1 "" "")) 4495 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 4496 1.1.1.1.8.2 tls (use (reg:DI 29)) 4497 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4498 1.1.1.1.8.2 tls "" 4499 1.1.1.1.8.2 tls { 4500 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[1])); 4501 1.1.1.1.8.2 tls 4502 1.1.1.1.8.2 tls operands[1] = XEXP (operands[1], 0); 4503 1.1.1.1.8.2 tls if (! call_operand (operands[1], Pmode)) 4504 1.1.1.1.8.2 tls operands[1] = copy_to_mode_reg (Pmode, operands[1]); 4505 1.1.1.1.8.2 tls }) 4506 1.1.1.1.8.2 tls 4507 1.1.1.1.8.2 tls (define_expand "call_value_nt" 4508 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 4509 1.1.1.1.8.2 tls (call (mem:DI (match_operand 1 "" "")) 4510 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 4511 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4512 1.1.1.1.8.2 tls "" 4513 1.1.1.1.8.2 tls { 4514 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[1])); 4515 1.1.1.1.8.2 tls 4516 1.1.1.1.8.2 tls operands[1] = XEXP (operands[1], 0); 4517 1.1.1.1.8.2 tls if (GET_CODE (operands[1]) != SYMBOL_REF && !REG_P (operands[1])) 4518 1.1.1.1.8.2 tls operands[1] = force_reg (DImode, operands[1]); 4519 1.1.1.1.8.2 tls }) 4520 1.1.1.1.8.2 tls 4521 1.1.1.1.8.2 tls (define_expand "call_value_vms" 4522 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 4523 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "" "")) 4524 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 4525 1.1.1.1.8.2 tls (use (match_dup 3)) 4526 1.1.1.1.8.2 tls (use (reg:DI 25)) 4527 1.1.1.1.8.2 tls (use (reg:DI 26)) 4528 1.1.1.1.8.2 tls (clobber (reg:DI 27))])] 4529 1.1.1.1.8.2 tls "" 4530 1.1.1.1.8.2 tls { 4531 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[1])); 4532 1.1.1.1.8.2 tls 4533 1.1.1.1.8.2 tls operands[1] = XEXP (operands[1], 0); 4534 1.1.1.1.8.2 tls 4535 1.1.1.1.8.2 tls /* Always load AI with argument information, then handle symbolic and 4536 1.1.1.1.8.2 tls indirect call differently. Load RA and set operands[3] to PV in 4537 1.1.1.1.8.2 tls both cases. */ 4538 1.1.1.1.8.2 tls 4539 1.1.1.1.8.2 tls emit_move_insn (gen_rtx_REG (DImode, 25), operands[2]); 4540 1.1.1.1.8.2 tls if (GET_CODE (operands[1]) == SYMBOL_REF) 4541 1.1.1.1.8.2 tls { 4542 1.1.1.1.8.2 tls alpha_need_linkage (XSTR (operands[1], 0), 0); 4543 1.1.1.1.8.2 tls 4544 1.1.1.1.8.2 tls operands[3] = const0_rtx; 4545 1.1.1.1.8.2 tls } 4546 1.1.1.1.8.2 tls else 4547 1.1.1.1.8.2 tls { 4548 1.1.1.1.8.2 tls emit_move_insn (gen_rtx_REG (Pmode, 26), 4549 1.1.1.1.8.2 tls gen_rtx_MEM (Pmode, plus_constant (operands[1], 8))); 4550 1.1.1.1.8.2 tls operands[3] = operands[1]; 4551 1.1.1.1.8.2 tls } 4552 1.1.1.1.8.2 tls }) 4553 1.1.1.1.8.2 tls 4554 1.1.1.1.8.2 tls (define_expand "call_value_umk" 4555 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 4556 1.1.1.1.8.2 tls (call (mem:DI (match_operand 1 "" "")) 4557 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 4558 1.1.1.1.8.2 tls (use (reg:DI 25)) 4559 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4560 1.1.1.1.8.2 tls "" 4561 1.1.1.1.8.2 tls { 4562 1.1.1.1.8.2 tls gcc_assert (MEM_P (operands[1])); 4563 1.1.1.1.8.2 tls 4564 1.1.1.1.8.2 tls operands[1] = XEXP (operands[1], 0); 4565 1.1.1.1.8.2 tls if (!REG_P (operands[1])) 4566 1.1.1.1.8.2 tls operands[1] = force_reg (DImode, operands[1]); 4567 1.1.1.1.8.2 tls 4568 1.1.1.1.8.2 tls emit_move_insn (gen_rtx_REG (DImode, 25), operands[2]); 4569 1.1.1.1.8.2 tls }) 4570 1.1.1.1.8.2 tls 4571 1.1.1.1.8.2 tls (define_insn "*call_osf_1_er_noreturn" 4572 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,s")) 4573 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4574 1.1.1.1.8.2 tls (use (reg:DI 29)) 4575 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4576 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF 4577 1.1.1.1.8.2 tls && find_reg_note (insn, REG_NORETURN, NULL_RTX)" 4578 1.1.1.1.8.2 tls "@ 4579 1.1.1.1.8.2 tls jsr $26,($27),0 4580 1.1.1.1.8.2 tls bsr $26,%0\t\t!samegp 4581 1.1.1.1.8.2 tls ldq $27,%0($29)\t\t!literal!%#\;jsr $26,($27),%0\t\t!lituse_jsr!%#" 4582 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4583 1.1.1.1.8.2 tls (set_attr "length" "*,*,8")]) 4584 1.1.1.1.8.2 tls 4585 1.1.1.1.8.2 tls (define_insn "*call_osf_1_er" 4586 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,s")) 4587 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4588 1.1.1.1.8.2 tls (use (reg:DI 29)) 4589 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4590 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 4591 1.1.1.1.8.2 tls "@ 4592 1.1.1.1.8.2 tls jsr $26,(%0),0\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%* 4593 1.1.1.1.8.2 tls bsr $26,%0\t\t!samegp 4594 1.1.1.1.8.2 tls ldq $27,%0($29)\t\t!literal!%#\;jsr $26,($27),%0\t\t!lituse_jsr!%#\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*" 4595 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4596 1.1.1.1.8.2 tls (set_attr "length" "12,*,16")]) 4597 1.1.1.1.8.2 tls 4598 1.1.1.1.8.2 tls ;; We must use peep2 instead of a split because we need accurate life 4599 1.1.1.1.8.2 tls ;; information for $gp. Consider the case of { bar(); while (1); }. 4600 1.1.1.1.8.2 tls (define_peephole2 4601 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_operand:DI 0 "call_operand" "")) 4602 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4603 1.1.1.1.8.2 tls (use (reg:DI 29)) 4604 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4605 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed 4606 1.1.1.1.8.2 tls && ! samegp_function_operand (operands[0], Pmode) 4607 1.1.1.1.8.2 tls && (peep2_regno_dead_p (1, 29) 4608 1.1.1.1.8.2 tls || find_reg_note (insn, REG_NORETURN, NULL_RTX))" 4609 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_dup 2)) 4610 1.1.1.1.8.2 tls (match_dup 1)) 4611 1.1.1.1.8.2 tls (use (reg:DI 29)) 4612 1.1.1.1.8.2 tls (use (match_dup 0)) 4613 1.1.1.1.8.2 tls (use (match_dup 3)) 4614 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4615 1.1.1.1.8.2 tls { 4616 1.1.1.1.8.2 tls if (CONSTANT_P (operands[0])) 4617 1.1.1.1.8.2 tls { 4618 1.1.1.1.8.2 tls operands[2] = gen_rtx_REG (Pmode, 27); 4619 1.1.1.1.8.2 tls operands[3] = GEN_INT (alpha_next_sequence_number++); 4620 1.1.1.1.8.2 tls emit_insn (gen_movdi_er_high_g (operands[2], pic_offset_table_rtx, 4621 1.1.1.1.8.2 tls operands[0], operands[3])); 4622 1.1.1.1.8.2 tls } 4623 1.1.1.1.8.2 tls else 4624 1.1.1.1.8.2 tls { 4625 1.1.1.1.8.2 tls operands[2] = operands[0]; 4626 1.1.1.1.8.2 tls operands[0] = const0_rtx; 4627 1.1.1.1.8.2 tls operands[3] = const0_rtx; 4628 1.1.1.1.8.2 tls } 4629 1.1.1.1.8.2 tls }) 4630 1.1.1.1.8.2 tls 4631 1.1.1.1.8.2 tls (define_peephole2 4632 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_operand:DI 0 "call_operand" "")) 4633 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4634 1.1.1.1.8.2 tls (use (reg:DI 29)) 4635 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 4636 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed 4637 1.1.1.1.8.2 tls && ! samegp_function_operand (operands[0], Pmode) 4638 1.1.1.1.8.2 tls && ! (peep2_regno_dead_p (1, 29) 4639 1.1.1.1.8.2 tls || find_reg_note (insn, REG_NORETURN, NULL_RTX))" 4640 1.1.1.1.8.2 tls [(parallel [(call (mem:DI (match_dup 2)) 4641 1.1.1.1.8.2 tls (match_dup 1)) 4642 1.1.1.1.8.2 tls (set (match_dup 5) 4643 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) (match_dup 3)] UNSPEC_LDGP1)) 4644 1.1.1.1.8.2 tls (use (match_dup 0)) 4645 1.1.1.1.8.2 tls (use (match_dup 4)) 4646 1.1.1.1.8.2 tls (clobber (reg:DI 26))]) 4647 1.1.1.1.8.2 tls (set (match_dup 5) 4648 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) (match_dup 3)] UNSPEC_LDGP2))] 4649 1.1.1.1.8.2 tls { 4650 1.1.1.1.8.2 tls if (CONSTANT_P (operands[0])) 4651 1.1.1.1.8.2 tls { 4652 1.1.1.1.8.2 tls operands[2] = gen_rtx_REG (Pmode, 27); 4653 1.1.1.1.8.2 tls operands[4] = GEN_INT (alpha_next_sequence_number++); 4654 1.1.1.1.8.2 tls emit_insn (gen_movdi_er_high_g (operands[2], pic_offset_table_rtx, 4655 1.1.1.1.8.2 tls operands[0], operands[4])); 4656 1.1.1.1.8.2 tls } 4657 1.1.1.1.8.2 tls else 4658 1.1.1.1.8.2 tls { 4659 1.1.1.1.8.2 tls operands[2] = operands[0]; 4660 1.1.1.1.8.2 tls operands[0] = const0_rtx; 4661 1.1.1.1.8.2 tls operands[4] = const0_rtx; 4662 1.1.1.1.8.2 tls } 4663 1.1.1.1.8.2 tls operands[3] = GEN_INT (alpha_next_sequence_number++); 4664 1.1.1.1.8.2 tls operands[5] = pic_offset_table_rtx; 4665 1.1.1.1.8.2 tls }) 4666 1.1.1.1.8.2 tls 4667 1.1.1.1.8.2 tls (define_insn "*call_osf_2_er_nogp" 4668 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "register_operand" "c")) 4669 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4670 1.1.1.1.8.2 tls (use (reg:DI 29)) 4671 1.1.1.1.8.2 tls (use (match_operand 2 "" "")) 4672 1.1.1.1.8.2 tls (use (match_operand 3 "const_int_operand" "")) 4673 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4674 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 4675 1.1.1.1.8.2 tls "jsr $26,(%0),%2%J3" 4676 1.1.1.1.8.2 tls [(set_attr "type" "jsr")]) 4677 1.1.1.1.8.2 tls 4678 1.1.1.1.8.2 tls (define_insn "*call_osf_2_er" 4679 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "register_operand" "c")) 4680 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4681 1.1.1.1.8.2 tls (set (reg:DI 29) 4682 1.1.1.1.8.2 tls (unspec:DI [(reg:DI 29) (match_operand 4 "const_int_operand" "")] 4683 1.1.1.1.8.2 tls UNSPEC_LDGP1)) 4684 1.1.1.1.8.2 tls (use (match_operand 2 "" "")) 4685 1.1.1.1.8.2 tls (use (match_operand 3 "const_int_operand" "")) 4686 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4687 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 4688 1.1.1.1.8.2 tls "jsr $26,(%0),%2%J3\;ldah $29,0($26)\t\t!gpdisp!%4" 4689 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4690 1.1.1.1.8.2 tls (set_attr "cannot_copy" "true") 4691 1.1.1.1.8.2 tls (set_attr "length" "8")]) 4692 1.1.1.1.8.2 tls 4693 1.1.1.1.8.2 tls (define_insn "*call_osf_1_noreturn" 4694 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,s")) 4695 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4696 1.1.1.1.8.2 tls (use (reg:DI 29)) 4697 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4698 1.1.1.1.8.2 tls "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF 4699 1.1.1.1.8.2 tls && find_reg_note (insn, REG_NORETURN, NULL_RTX)" 4700 1.1.1.1.8.2 tls "@ 4701 1.1.1.1.8.2 tls jsr $26,($27),0 4702 1.1.1.1.8.2 tls bsr $26,$%0..ng 4703 1.1.1.1.8.2 tls jsr $26,%0" 4704 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4705 1.1.1.1.8.2 tls (set_attr "length" "*,*,8")]) 4706 1.1.1.1.8.2 tls 4707 1.1.1.1.8.2 tls (define_insn "*call_osf_1" 4708 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,s")) 4709 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4710 1.1.1.1.8.2 tls (use (reg:DI 29)) 4711 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4712 1.1.1.1.8.2 tls "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 4713 1.1.1.1.8.2 tls "@ 4714 1.1.1.1.8.2 tls jsr $26,($27),0\;ldgp $29,0($26) 4715 1.1.1.1.8.2 tls bsr $26,$%0..ng 4716 1.1.1.1.8.2 tls jsr $26,%0\;ldgp $29,0($26)" 4717 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4718 1.1.1.1.8.2 tls (set_attr "length" "12,*,16")]) 4719 1.1.1.1.8.2 tls 4720 1.1.1.1.8.2 tls (define_insn "*sibcall_osf_1_er" 4721 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "symbolic_operand" "R,s")) 4722 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4723 1.1.1.1.8.2 tls (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] 4724 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 4725 1.1.1.1.8.2 tls "@ 4726 1.1.1.1.8.2 tls br $31,%0\t\t!samegp 4727 1.1.1.1.8.2 tls ldq $27,%0($29)\t\t!literal!%#\;jmp $31,($27),%0\t\t!lituse_jsr!%#" 4728 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4729 1.1.1.1.8.2 tls (set_attr "length" "*,8")]) 4730 1.1.1.1.8.2 tls 4731 1.1.1.1.8.2 tls ;; Note that the DEC assembler expands "jmp foo" with $at, which 4732 1.1.1.1.8.2 tls ;; doesn't do what we want. 4733 1.1.1.1.8.2 tls (define_insn "*sibcall_osf_1" 4734 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "symbolic_operand" "R,s")) 4735 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4736 1.1.1.1.8.2 tls (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] 4737 1.1.1.1.8.2 tls "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 4738 1.1.1.1.8.2 tls "@ 4739 1.1.1.1.8.2 tls br $31,$%0..ng 4740 1.1.1.1.8.2 tls lda $27,%0\;jmp $31,($27),%0" 4741 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4742 1.1.1.1.8.2 tls (set_attr "length" "*,8")]) 4743 1.1.1.1.8.2 tls 4744 1.1.1.1.8.2 tls (define_insn "*call_nt_1" 4745 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "call_operand" "r,R,s")) 4746 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4747 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4748 1.1.1.1.8.2 tls "TARGET_ABI_WINDOWS_NT" 4749 1.1.1.1.8.2 tls "@ 4750 1.1.1.1.8.2 tls jsr $26,(%0) 4751 1.1.1.1.8.2 tls bsr $26,%0 4752 1.1.1.1.8.2 tls jsr $26,%0" 4753 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4754 1.1.1.1.8.2 tls (set_attr "length" "*,*,12")]) 4755 1.1.1.1.8.2 tls 4756 1.1.1.1.8.2 tls ; GAS relies on the order and position of instructions output below in order 4757 1.1.1.1.8.2 tls ; to generate relocs for VMS link to potentially optimize the call. 4758 1.1.1.1.8.2 tls ; Please do not molest. 4759 1.1.1.1.8.2 tls (define_insn "*call_vms_1" 4760 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "call_operand" "r,s")) 4761 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4762 1.1.1.1.8.2 tls (use (match_operand:DI 2 "nonmemory_operand" "r,n")) 4763 1.1.1.1.8.2 tls (use (reg:DI 25)) 4764 1.1.1.1.8.2 tls (use (reg:DI 26)) 4765 1.1.1.1.8.2 tls (clobber (reg:DI 27))] 4766 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 4767 1.1.1.1.8.2 tls { 4768 1.1.1.1.8.2 tls switch (which_alternative) 4769 1.1.1.1.8.2 tls { 4770 1.1.1.1.8.2 tls case 0: 4771 1.1.1.1.8.2 tls return "mov %2,$27\;jsr $26,0\;ldq $27,0($29)"; 4772 1.1.1.1.8.2 tls case 1: 4773 1.1.1.1.8.2 tls operands [2] = alpha_use_linkage (operands [0], cfun->decl, 1, 0); 4774 1.1.1.1.8.2 tls operands [3] = alpha_use_linkage (operands [0], cfun->decl, 0, 0); 4775 1.1.1.1.8.2 tls return "ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"; 4776 1.1.1.1.8.2 tls default: 4777 1.1.1.1.8.2 tls gcc_unreachable (); 4778 1.1.1.1.8.2 tls } 4779 1.1.1.1.8.2 tls } 4780 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 4781 1.1.1.1.8.2 tls (set_attr "length" "12,16")]) 4782 1.1.1.1.8.2 tls 4783 1.1.1.1.8.2 tls (define_insn "*call_umk_1" 4784 1.1.1.1.8.2 tls [(call (mem:DI (match_operand:DI 0 "call_operand" "r")) 4785 1.1.1.1.8.2 tls (match_operand 1 "" "")) 4786 1.1.1.1.8.2 tls (use (reg:DI 25)) 4787 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 4788 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 4789 1.1.1.1.8.2 tls "jsr $26,(%0)" 4790 1.1.1.1.8.2 tls [(set_attr "type" "jsr")]) 4791 1.1.1.1.8.2 tls 4792 1.1.1.1.8.2 tls ;; Call subroutine returning any type. 4793 1.1.1.1.8.2 tls 4794 1.1.1.1.8.2 tls (define_expand "untyped_call" 4795 1.1.1.1.8.2 tls [(parallel [(call (match_operand 0 "" "") 4796 1.1.1.1.8.2 tls (const_int 0)) 4797 1.1.1.1.8.2 tls (match_operand 1 "" "") 4798 1.1.1.1.8.2 tls (match_operand 2 "" "")])] 4799 1.1.1.1.8.2 tls "" 4800 1.1.1.1.8.2 tls { 4801 1.1.1.1.8.2 tls int i; 4802 1.1.1.1.8.2 tls 4803 1.1.1.1.8.2 tls emit_call_insn (GEN_CALL (operands[0], const0_rtx, NULL, const0_rtx)); 4804 1.1.1.1.8.2 tls 4805 1.1.1.1.8.2 tls for (i = 0; i < XVECLEN (operands[2], 0); i++) 4806 1.1.1.1.8.2 tls { 4807 1.1.1.1.8.2 tls rtx set = XVECEXP (operands[2], 0, i); 4808 1.1.1.1.8.2 tls emit_move_insn (SET_DEST (set), SET_SRC (set)); 4809 1.1.1.1.8.2 tls } 4810 1.1.1.1.8.2 tls 4811 1.1.1.1.8.2 tls /* The optimizer does not know that the call sets the function value 4812 1.1.1.1.8.2 tls registers we stored in the result block. We avoid problems by 4813 1.1.1.1.8.2 tls claiming that all hard registers are used and clobbered at this 4814 1.1.1.1.8.2 tls point. */ 4815 1.1.1.1.8.2 tls emit_insn (gen_blockage ()); 4816 1.1.1.1.8.2 tls 4817 1.1.1.1.8.2 tls DONE; 4818 1.1.1.1.8.2 tls }) 4819 1.1.1.1.8.2 tls 4820 1.1.1.1.8.2 tls ;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and 4821 1.1.1.1.8.2 tls ;; all of memory. This blocks insns from being moved across this point. 4822 1.1.1.1.8.2 tls 4823 1.1.1.1.8.2 tls (define_insn "blockage" 4824 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] 4825 1.1.1.1.8.2 tls "" 4826 1.1.1.1.8.2 tls "" 4827 1.1.1.1.8.2 tls [(set_attr "length" "0") 4828 1.1.1.1.8.2 tls (set_attr "type" "none")]) 4829 1.1.1.1.8.2 tls 4830 1.1.1.1.8.2 tls (define_insn "jump" 4831 1.1.1.1.8.2 tls [(set (pc) 4832 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")))] 4833 1.1.1.1.8.2 tls "" 4834 1.1.1.1.8.2 tls "br $31,%l0" 4835 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 4836 1.1.1.1.8.2 tls 4837 1.1.1.1.8.2 tls (define_expand "return" 4838 1.1.1.1.8.2 tls [(return)] 4839 1.1.1.1.8.2 tls "direct_return ()" 4840 1.1.1.1.8.2 tls "") 4841 1.1.1.1.8.2 tls 4842 1.1.1.1.8.2 tls (define_insn "*return_internal" 4843 1.1.1.1.8.2 tls [(return)] 4844 1.1.1.1.8.2 tls "reload_completed" 4845 1.1.1.1.8.2 tls "ret $31,($26),1" 4846 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 4847 1.1.1.1.8.2 tls 4848 1.1.1.1.8.2 tls (define_insn "indirect_jump" 4849 1.1.1.1.8.2 tls [(set (pc) (match_operand:DI 0 "register_operand" "r"))] 4850 1.1.1.1.8.2 tls "" 4851 1.1.1.1.8.2 tls "jmp $31,(%0),0" 4852 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 4853 1.1.1.1.8.2 tls 4854 1.1.1.1.8.2 tls (define_expand "tablejump" 4855 1.1.1.1.8.2 tls [(parallel [(set (pc) 4856 1.1.1.1.8.2 tls (match_operand 0 "register_operand" "")) 4857 1.1.1.1.8.2 tls (use (label_ref:DI (match_operand 1 "" "")))])] 4858 1.1.1.1.8.2 tls "" 4859 1.1.1.1.8.2 tls { 4860 1.1.1.1.8.2 tls if (TARGET_ABI_WINDOWS_NT) 4861 1.1.1.1.8.2 tls { 4862 1.1.1.1.8.2 tls rtx dest = gen_reg_rtx (DImode); 4863 1.1.1.1.8.2 tls emit_insn (gen_extendsidi2 (dest, operands[0])); 4864 1.1.1.1.8.2 tls operands[0] = dest; 4865 1.1.1.1.8.2 tls } 4866 1.1.1.1.8.2 tls else if (TARGET_ABI_OSF) 4867 1.1.1.1.8.2 tls { 4868 1.1.1.1.8.2 tls rtx dest = gen_reg_rtx (DImode); 4869 1.1.1.1.8.2 tls emit_insn (gen_extendsidi2 (dest, operands[0])); 4870 1.1.1.1.8.2 tls emit_insn (gen_adddi3 (dest, pic_offset_table_rtx, dest)); 4871 1.1.1.1.8.2 tls operands[0] = dest; 4872 1.1.1.1.8.2 tls } 4873 1.1.1.1.8.2 tls }) 4874 1.1.1.1.8.2 tls 4875 1.1.1.1.8.2 tls (define_insn "*tablejump_osf_nt_internal" 4876 1.1.1.1.8.2 tls [(set (pc) 4877 1.1.1.1.8.2 tls (match_operand:DI 0 "register_operand" "r")) 4878 1.1.1.1.8.2 tls (use (label_ref:DI (match_operand 1 "" "")))] 4879 1.1.1.1.8.2 tls "(TARGET_ABI_OSF || TARGET_ABI_WINDOWS_NT) 4880 1.1.1.1.8.2 tls && alpha_tablejump_addr_vec (insn)" 4881 1.1.1.1.8.2 tls { 4882 1.1.1.1.8.2 tls operands[2] = alpha_tablejump_best_label (insn); 4883 1.1.1.1.8.2 tls return "jmp $31,(%0),%2"; 4884 1.1.1.1.8.2 tls } 4885 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 4886 1.1.1.1.8.2 tls 4887 1.1.1.1.8.2 tls (define_insn "*tablejump_internal" 4888 1.1.1.1.8.2 tls [(set (pc) 4889 1.1.1.1.8.2 tls (match_operand:DI 0 "register_operand" "r")) 4890 1.1.1.1.8.2 tls (use (label_ref (match_operand 1 "" "")))] 4891 1.1.1.1.8.2 tls "" 4892 1.1.1.1.8.2 tls "jmp $31,(%0),0" 4893 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 4894 1.1.1.1.8.2 tls 4895 1.1.1.1.8.2 tls ;; Cache flush. Used by alpha_trampoline_init. 0x86 is PAL_imb, but we don't 4896 1.1.1.1.8.2 tls ;; want to have to include pal.h in our .s file. 4897 1.1.1.1.8.2 tls (define_insn "imb" 4898 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] UNSPECV_IMB)] 4899 1.1.1.1.8.2 tls "" 4900 1.1.1.1.8.2 tls "call_pal 0x86" 4901 1.1.1.1.8.2 tls [(set_attr "type" "callpal")]) 4902 1.1.1.1.8.2 tls 4903 1.1.1.1.8.2 tls ;; BUGCHK is documented common to OSF/1 and VMS PALcode. 4904 1.1.1.1.8.2 tls ;; NT does not document anything at 0x81 -- presumably it would generate 4905 1.1.1.1.8.2 tls ;; the equivalent of SIGILL, but this isn't that important. 4906 1.1.1.1.8.2 tls ;; ??? Presuming unicosmk uses either OSF/1 or VMS PALcode. 4907 1.1.1.1.8.2 tls (define_insn "trap" 4908 1.1.1.1.8.2 tls [(trap_if (const_int 1) (const_int 0))] 4909 1.1.1.1.8.2 tls "!TARGET_ABI_WINDOWS_NT" 4910 1.1.1.1.8.2 tls "call_pal 0x81" 4911 1.1.1.1.8.2 tls [(set_attr "type" "callpal")]) 4912 1.1.1.1.8.2 tls 4913 1.1.1.1.8.2 tls ;; For userland, we load the thread pointer from the TCB. 4914 1.1.1.1.8.2 tls ;; For the kernel, we load the per-cpu private value. 4915 1.1.1.1.8.2 tls 4916 1.1.1.1.8.2 tls (define_insn "load_tp" 4917 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=v") 4918 1.1.1.1.8.2 tls (unspec:DI [(const_int 0)] UNSPEC_TP))] 4919 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 4920 1.1.1.1.8.2 tls { 4921 1.1.1.1.8.2 tls if (TARGET_TLS_KERNEL) 4922 1.1.1.1.8.2 tls return "call_pal 0x32"; 4923 1.1.1.1.8.2 tls else 4924 1.1.1.1.8.2 tls return "call_pal 0x9e"; 4925 1.1.1.1.8.2 tls } 4926 1.1.1.1.8.2 tls [(set_attr "type" "callpal")]) 4927 1.1.1.1.8.2 tls 4928 1.1.1.1.8.2 tls ;; For completeness, and possibly a __builtin function, here's how to 4929 1.1.1.1.8.2 tls ;; set the thread pointer. Since we don't describe enough of this 4930 1.1.1.1.8.2 tls ;; quantity for CSE, we have to use a volatile unspec, and then there's 4931 1.1.1.1.8.2 tls ;; not much point in creating an R16_REG register class. 4932 1.1.1.1.8.2 tls 4933 1.1.1.1.8.2 tls (define_expand "set_tp" 4934 1.1.1.1.8.2 tls [(set (reg:DI 16) (match_operand:DI 0 "input_operand" "")) 4935 1.1.1.1.8.2 tls (unspec_volatile [(reg:DI 16)] UNSPECV_SET_TP)] 4936 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 4937 1.1.1.1.8.2 tls "") 4938 1.1.1.1.8.2 tls 4939 1.1.1.1.8.2 tls (define_insn "*set_tp" 4940 1.1.1.1.8.2 tls [(unspec_volatile [(reg:DI 16)] UNSPECV_SET_TP)] 4941 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 4942 1.1.1.1.8.2 tls { 4943 1.1.1.1.8.2 tls if (TARGET_TLS_KERNEL) 4944 1.1.1.1.8.2 tls return "call_pal 0x31"; 4945 1.1.1.1.8.2 tls else 4946 1.1.1.1.8.2 tls return "call_pal 0x9f"; 4947 1.1.1.1.8.2 tls } 4948 1.1.1.1.8.2 tls [(set_attr "type" "callpal")]) 4949 1.1.1.1.8.2 tls 4950 1.1.1.1.8.2 tls ;; Special builtins for establishing and reverting VMS condition handlers. 4951 1.1.1.1.8.2 tls 4952 1.1.1.1.8.2 tls (define_expand "builtin_establish_vms_condition_handler" 4953 1.1.1.1.8.2 tls [(set (reg:DI 0) (match_operand:DI 0 "register_operand" "")) 4954 1.1.1.1.8.2 tls (use (match_operand:DI 1 "address_operand" ""))] 4955 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 4956 1.1.1.1.8.2 tls { 4957 1.1.1.1.8.2 tls alpha_expand_builtin_establish_vms_condition_handler (operands[0], 4958 1.1.1.1.8.2 tls operands[1]); 4959 1.1.1.1.8.2 tls }) 4960 1.1.1.1.8.2 tls 4961 1.1.1.1.8.2 tls (define_expand "builtin_revert_vms_condition_handler" 4962 1.1.1.1.8.2 tls [(set (reg:DI 0) (match_operand:DI 0 "register_operand" ""))] 4963 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 4964 1.1.1.1.8.2 tls { 4965 1.1.1.1.8.2 tls alpha_expand_builtin_revert_vms_condition_handler (operands[0]); 4966 1.1.1.1.8.2 tls }) 4967 1.1.1.1.8.2 tls 4969 1.1.1.1.8.2 tls ;; Finally, we have the basic data motion insns. The byte and word insns 4970 1.1.1.1.8.2 tls ;; are done via define_expand. Start with the floating-point insns, since 4971 1.1.1.1.8.2 tls ;; they are simpler. 4972 1.1.1.1.8.2 tls 4973 1.1.1.1.8.2 tls (define_insn "*movsf_nofix" 4974 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,*r,*r,m,m") 4975 1.1.1.1.8.2 tls (match_operand:SF 1 "input_operand" "fG,m,*rG,m,fG,*r"))] 4976 1.1.1.1.8.2 tls "TARGET_FPREGS && ! TARGET_FIX 4977 1.1.1.1.8.2 tls && (register_operand (operands[0], SFmode) 4978 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], SFmode))" 4979 1.1.1.1.8.2 tls "@ 4980 1.1.1.1.8.2 tls cpys %R1,%R1,%0 4981 1.1.1.1.8.2 tls ld%, %0,%1 4982 1.1.1.1.8.2 tls bis $31,%r1,%0 4983 1.1.1.1.8.2 tls ldl %0,%1 4984 1.1.1.1.8.2 tls st%, %R1,%0 4985 1.1.1.1.8.2 tls stl %r1,%0" 4986 1.1.1.1.8.2 tls [(set_attr "type" "fcpys,fld,ilog,ild,fst,ist")]) 4987 1.1.1.1.8.2 tls 4988 1.1.1.1.8.2 tls (define_insn "*movsf_fix" 4989 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,*r,*r,m,m,f,*r") 4990 1.1.1.1.8.2 tls (match_operand:SF 1 "input_operand" "fG,m,*rG,m,fG,*r,*r,f"))] 4991 1.1.1.1.8.2 tls "TARGET_FPREGS && TARGET_FIX 4992 1.1.1.1.8.2 tls && (register_operand (operands[0], SFmode) 4993 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], SFmode))" 4994 1.1.1.1.8.2 tls "@ 4995 1.1.1.1.8.2 tls cpys %R1,%R1,%0 4996 1.1.1.1.8.2 tls ld%, %0,%1 4997 1.1.1.1.8.2 tls bis $31,%r1,%0 4998 1.1.1.1.8.2 tls ldl %0,%1 4999 1.1.1.1.8.2 tls st%, %R1,%0 5000 1.1.1.1.8.2 tls stl %r1,%0 5001 1.1.1.1.8.2 tls itofs %1,%0 5002 1.1.1.1.8.2 tls ftois %1,%0" 5003 1.1.1.1.8.2 tls [(set_attr "type" "fcpys,fld,ilog,ild,fst,ist,itof,ftoi")]) 5004 1.1.1.1.8.2 tls 5005 1.1.1.1.8.2 tls (define_insn "*movsf_nofp" 5006 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,m") 5007 1.1.1.1.8.2 tls (match_operand:SF 1 "input_operand" "rG,m,r"))] 5008 1.1.1.1.8.2 tls "! TARGET_FPREGS 5009 1.1.1.1.8.2 tls && (register_operand (operands[0], SFmode) 5010 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], SFmode))" 5011 1.1.1.1.8.2 tls "@ 5012 1.1.1.1.8.2 tls bis $31,%r1,%0 5013 1.1.1.1.8.2 tls ldl %0,%1 5014 1.1.1.1.8.2 tls stl %r1,%0" 5015 1.1.1.1.8.2 tls [(set_attr "type" "ilog,ild,ist")]) 5016 1.1.1.1.8.2 tls 5017 1.1.1.1.8.2 tls (define_insn "*movdf_nofix" 5018 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,*r,*r,m,m") 5019 1.1.1.1.8.2 tls (match_operand:DF 1 "input_operand" "fG,m,*rG,m,fG,*r"))] 5020 1.1.1.1.8.2 tls "TARGET_FPREGS && ! TARGET_FIX 5021 1.1.1.1.8.2 tls && (register_operand (operands[0], DFmode) 5022 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], DFmode))" 5023 1.1.1.1.8.2 tls "@ 5024 1.1.1.1.8.2 tls cpys %R1,%R1,%0 5025 1.1.1.1.8.2 tls ld%- %0,%1 5026 1.1.1.1.8.2 tls bis $31,%r1,%0 5027 1.1.1.1.8.2 tls ldq %0,%1 5028 1.1.1.1.8.2 tls st%- %R1,%0 5029 1.1.1.1.8.2 tls stq %r1,%0" 5030 1.1.1.1.8.2 tls [(set_attr "type" "fcpys,fld,ilog,ild,fst,ist")]) 5031 1.1.1.1.8.2 tls 5032 1.1.1.1.8.2 tls (define_insn "*movdf_fix" 5033 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,*r,*r,m,m,f,*r") 5034 1.1.1.1.8.2 tls (match_operand:DF 1 "input_operand" "fG,m,*rG,m,fG,*r,*r,f"))] 5035 1.1.1.1.8.2 tls "TARGET_FPREGS && TARGET_FIX 5036 1.1.1.1.8.2 tls && (register_operand (operands[0], DFmode) 5037 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], DFmode))" 5038 1.1.1.1.8.2 tls "@ 5039 1.1.1.1.8.2 tls cpys %R1,%R1,%0 5040 1.1.1.1.8.2 tls ld%- %0,%1 5041 1.1.1.1.8.2 tls bis $31,%r1,%0 5042 1.1.1.1.8.2 tls ldq %0,%1 5043 1.1.1.1.8.2 tls st%- %R1,%0 5044 1.1.1.1.8.2 tls stq %r1,%0 5045 1.1.1.1.8.2 tls itoft %1,%0 5046 1.1.1.1.8.2 tls ftoit %1,%0" 5047 1.1.1.1.8.2 tls [(set_attr "type" "fcpys,fld,ilog,ild,fst,ist,itof,ftoi")]) 5048 1.1.1.1.8.2 tls 5049 1.1.1.1.8.2 tls (define_insn "*movdf_nofp" 5050 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r,m") 5051 1.1.1.1.8.2 tls (match_operand:DF 1 "input_operand" "rG,m,r"))] 5052 1.1.1.1.8.2 tls "! TARGET_FPREGS 5053 1.1.1.1.8.2 tls && (register_operand (operands[0], DFmode) 5054 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], DFmode))" 5055 1.1.1.1.8.2 tls "@ 5056 1.1.1.1.8.2 tls bis $31,%r1,%0 5057 1.1.1.1.8.2 tls ldq %0,%1 5058 1.1.1.1.8.2 tls stq %r1,%0" 5059 1.1.1.1.8.2 tls [(set_attr "type" "ilog,ild,ist")]) 5060 1.1.1.1.8.2 tls 5061 1.1.1.1.8.2 tls ;; Subregs suck for register allocation. Pretend we can move TFmode 5062 1.1.1.1.8.2 tls ;; data between general registers until after reload. 5063 1.1.1.1.8.2 tls 5064 1.1.1.1.8.2 tls (define_insn_and_split "*movtf_internal" 5065 1.1.1.1.8.2 tls [(set (match_operand:TF 0 "nonimmediate_operand" "=r,o") 5066 1.1.1.1.8.2 tls (match_operand:TF 1 "input_operand" "roG,rG"))] 5067 1.1.1.1.8.2 tls "register_operand (operands[0], TFmode) 5068 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], TFmode)" 5069 1.1.1.1.8.2 tls "#" 5070 1.1.1.1.8.2 tls "reload_completed" 5071 1.1.1.1.8.2 tls [(set (match_dup 0) (match_dup 2)) 5072 1.1.1.1.8.2 tls (set (match_dup 1) (match_dup 3))] 5073 1.1.1.1.8.2 tls { 5074 1.1.1.1.8.2 tls alpha_split_tmode_pair (operands, TFmode, true); 5075 1.1.1.1.8.2 tls }) 5076 1.1.1.1.8.2 tls 5077 1.1.1.1.8.2 tls (define_expand "movsf" 5078 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "nonimmediate_operand" "") 5079 1.1.1.1.8.2 tls (match_operand:SF 1 "general_operand" ""))] 5080 1.1.1.1.8.2 tls "" 5081 1.1.1.1.8.2 tls { 5082 1.1.1.1.8.2 tls if (MEM_P (operands[0]) 5083 1.1.1.1.8.2 tls && ! reg_or_0_operand (operands[1], SFmode)) 5084 1.1.1.1.8.2 tls operands[1] = force_reg (SFmode, operands[1]); 5085 1.1.1.1.8.2 tls }) 5086 1.1.1.1.8.2 tls 5087 1.1.1.1.8.2 tls (define_expand "movdf" 5088 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "nonimmediate_operand" "") 5089 1.1.1.1.8.2 tls (match_operand:DF 1 "general_operand" ""))] 5090 1.1.1.1.8.2 tls "" 5091 1.1.1.1.8.2 tls { 5092 1.1.1.1.8.2 tls if (MEM_P (operands[0]) 5093 1.1.1.1.8.2 tls && ! reg_or_0_operand (operands[1], DFmode)) 5094 1.1.1.1.8.2 tls operands[1] = force_reg (DFmode, operands[1]); 5095 1.1.1.1.8.2 tls }) 5096 1.1.1.1.8.2 tls 5097 1.1.1.1.8.2 tls (define_expand "movtf" 5098 1.1.1.1.8.2 tls [(set (match_operand:TF 0 "nonimmediate_operand" "") 5099 1.1.1.1.8.2 tls (match_operand:TF 1 "general_operand" ""))] 5100 1.1.1.1.8.2 tls "" 5101 1.1.1.1.8.2 tls { 5102 1.1.1.1.8.2 tls if (MEM_P (operands[0]) 5103 1.1.1.1.8.2 tls && ! reg_or_0_operand (operands[1], TFmode)) 5104 1.1.1.1.8.2 tls operands[1] = force_reg (TFmode, operands[1]); 5105 1.1.1.1.8.2 tls }) 5106 1.1.1.1.8.2 tls 5107 1.1.1.1.8.2 tls (define_insn "*movsi" 5108 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,m") 5109 1.1.1.1.8.2 tls (match_operand:SI 1 "input_operand" "rJ,K,L,n,m,rJ"))] 5110 1.1.1.1.8.2 tls "(TARGET_ABI_OSF || TARGET_ABI_UNICOSMK) 5111 1.1.1.1.8.2 tls && (register_operand (operands[0], SImode) 5112 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], SImode))" 5113 1.1.1.1.8.2 tls "@ 5114 1.1.1.1.8.2 tls bis $31,%r1,%0 5115 1.1.1.1.8.2 tls lda %0,%1($31) 5116 1.1.1.1.8.2 tls ldah %0,%h1($31) 5117 1.1.1.1.8.2 tls # 5118 1.1.1.1.8.2 tls ldl %0,%1 5119 1.1.1.1.8.2 tls stl %r1,%0" 5120 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,iadd,multi,ild,ist")]) 5121 1.1.1.1.8.2 tls 5122 1.1.1.1.8.2 tls (define_insn "*movsi_nt_vms" 5123 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,r,r,m") 5124 1.1.1.1.8.2 tls (match_operand:SI 1 "input_operand" "rJ,K,L,s,n,m,rJ"))] 5125 1.1.1.1.8.2 tls "(TARGET_ABI_WINDOWS_NT || TARGET_ABI_OPEN_VMS) 5126 1.1.1.1.8.2 tls && (register_operand (operands[0], SImode) 5127 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], SImode))" 5128 1.1.1.1.8.2 tls "@ 5129 1.1.1.1.8.2 tls bis $31,%1,%0 5130 1.1.1.1.8.2 tls lda %0,%1 5131 1.1.1.1.8.2 tls ldah %0,%h1 5132 1.1.1.1.8.2 tls lda %0,%1 5133 1.1.1.1.8.2 tls # 5134 1.1.1.1.8.2 tls ldl %0,%1 5135 1.1.1.1.8.2 tls stl %r1,%0" 5136 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,iadd,ldsym,multi,ild,ist")]) 5137 1.1.1.1.8.2 tls 5138 1.1.1.1.8.2 tls (define_insn "*movhi_nobwx" 5139 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "register_operand" "=r,r") 5140 1.1.1.1.8.2 tls (match_operand:HI 1 "input_operand" "rJ,n"))] 5141 1.1.1.1.8.2 tls "! TARGET_BWX 5142 1.1.1.1.8.2 tls && (register_operand (operands[0], HImode) 5143 1.1.1.1.8.2 tls || register_operand (operands[1], HImode))" 5144 1.1.1.1.8.2 tls "@ 5145 1.1.1.1.8.2 tls bis $31,%r1,%0 5146 1.1.1.1.8.2 tls lda %0,%L1($31)" 5147 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd")]) 5148 1.1.1.1.8.2 tls 5149 1.1.1.1.8.2 tls (define_insn "*movhi_bwx" 5150 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m") 5151 1.1.1.1.8.2 tls (match_operand:HI 1 "input_operand" "rJ,n,m,rJ"))] 5152 1.1.1.1.8.2 tls "TARGET_BWX 5153 1.1.1.1.8.2 tls && (register_operand (operands[0], HImode) 5154 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], HImode))" 5155 1.1.1.1.8.2 tls "@ 5156 1.1.1.1.8.2 tls bis $31,%r1,%0 5157 1.1.1.1.8.2 tls lda %0,%L1($31) 5158 1.1.1.1.8.2 tls ldwu %0,%1 5159 1.1.1.1.8.2 tls stw %r1,%0" 5160 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,ild,ist")]) 5161 1.1.1.1.8.2 tls 5162 1.1.1.1.8.2 tls (define_insn "*movqi_nobwx" 5163 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "register_operand" "=r,r") 5164 1.1.1.1.8.2 tls (match_operand:QI 1 "input_operand" "rJ,n"))] 5165 1.1.1.1.8.2 tls "! TARGET_BWX 5166 1.1.1.1.8.2 tls && (register_operand (operands[0], QImode) 5167 1.1.1.1.8.2 tls || register_operand (operands[1], QImode))" 5168 1.1.1.1.8.2 tls "@ 5169 1.1.1.1.8.2 tls bis $31,%r1,%0 5170 1.1.1.1.8.2 tls lda %0,%L1($31)" 5171 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd")]) 5172 1.1.1.1.8.2 tls 5173 1.1.1.1.8.2 tls (define_insn "*movqi_bwx" 5174 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m") 5175 1.1.1.1.8.2 tls (match_operand:QI 1 "input_operand" "rJ,n,m,rJ"))] 5176 1.1.1.1.8.2 tls "TARGET_BWX 5177 1.1.1.1.8.2 tls && (register_operand (operands[0], QImode) 5178 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], QImode))" 5179 1.1.1.1.8.2 tls "@ 5180 1.1.1.1.8.2 tls bis $31,%r1,%0 5181 1.1.1.1.8.2 tls lda %0,%L1($31) 5182 1.1.1.1.8.2 tls ldbu %0,%1 5183 1.1.1.1.8.2 tls stb %r1,%0" 5184 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,ild,ist")]) 5185 1.1.1.1.8.2 tls 5186 1.1.1.1.8.2 tls ;; We do two major things here: handle mem->mem and construct long 5187 1.1.1.1.8.2 tls ;; constants. 5188 1.1.1.1.8.2 tls 5189 1.1.1.1.8.2 tls (define_expand "movsi" 5190 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "") 5191 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" ""))] 5192 1.1.1.1.8.2 tls "" 5193 1.1.1.1.8.2 tls { 5194 1.1.1.1.8.2 tls if (alpha_expand_mov (SImode, operands)) 5195 1.1.1.1.8.2 tls DONE; 5196 1.1.1.1.8.2 tls }) 5197 1.1.1.1.8.2 tls 5198 1.1.1.1.8.2 tls ;; Split a load of a large constant into the appropriate two-insn 5199 1.1.1.1.8.2 tls ;; sequence. 5200 1.1.1.1.8.2 tls 5201 1.1.1.1.8.2 tls (define_split 5202 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "register_operand" "") 5203 1.1.1.1.8.2 tls (match_operand:SI 1 "non_add_const_operand" ""))] 5204 1.1.1.1.8.2 tls "" 5205 1.1.1.1.8.2 tls [(const_int 0)] 5206 1.1.1.1.8.2 tls { 5207 1.1.1.1.8.2 tls if (alpha_split_const_mov (SImode, operands)) 5208 1.1.1.1.8.2 tls DONE; 5209 1.1.1.1.8.2 tls else 5210 1.1.1.1.8.2 tls FAIL; 5211 1.1.1.1.8.2 tls }) 5212 1.1.1.1.8.2 tls 5213 1.1.1.1.8.2 tls ;; Split the load of an address into a four-insn sequence on Unicos/Mk. 5214 1.1.1.1.8.2 tls ;; Always generate a REG_EQUAL note for the last instruction to facilitate 5215 1.1.1.1.8.2 tls ;; optimizations. If the symbolic operand is a label_ref, generate 5216 1.1.1.1.8.2 tls ;; REG_LABEL_OPERAND notes and update LABEL_NUSES because this is not done 5217 1.1.1.1.8.2 tls ;; automatically. Labels may be incorrectly deleted if we don't do this. 5218 1.1.1.1.8.2 tls ;; 5219 1.1.1.1.8.2 tls ;; Describing what the individual instructions do correctly is too complicated 5220 1.1.1.1.8.2 tls ;; so use UNSPECs for each of the three parts of an address. 5221 1.1.1.1.8.2 tls 5222 1.1.1.1.8.2 tls (define_split 5223 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 5224 1.1.1.1.8.2 tls (match_operand:DI 1 "symbolic_operand" ""))] 5225 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK && reload_completed" 5226 1.1.1.1.8.2 tls [(const_int 0)] 5227 1.1.1.1.8.2 tls { 5228 1.1.1.1.8.2 tls rtx insn1, insn2, insn3; 5229 1.1.1.1.8.2 tls 5230 1.1.1.1.8.2 tls insn1 = emit_insn (gen_umk_laum (operands[0], operands[1])); 5231 1.1.1.1.8.2 tls emit_insn (gen_ashldi3 (operands[0], operands[0], GEN_INT (32))); 5232 1.1.1.1.8.2 tls insn2 = emit_insn (gen_umk_lalm (operands[0], operands[0], operands[1])); 5233 1.1.1.1.8.2 tls insn3 = emit_insn (gen_umk_lal (operands[0], operands[0], operands[1])); 5234 1.1.1.1.8.2 tls set_unique_reg_note (insn3, REG_EQUAL, operands[1]); 5235 1.1.1.1.8.2 tls 5236 1.1.1.1.8.2 tls if (GET_CODE (operands[1]) == LABEL_REF) 5237 1.1.1.1.8.2 tls { 5238 1.1.1.1.8.2 tls rtx label; 5239 1.1.1.1.8.2 tls 5240 1.1.1.1.8.2 tls label = XEXP (operands[1], 0); 5241 1.1.1.1.8.2 tls add_reg_note (insn1, REG_LABEL_OPERAND, label); 5242 1.1.1.1.8.2 tls add_reg_note (insn2, REG_LABEL_OPERAND, label); 5243 1.1.1.1.8.2 tls add_reg_note (insn3, REG_LABEL_OPERAND, label); 5244 1.1.1.1.8.2 tls LABEL_NUSES (label) += 3; 5245 1.1.1.1.8.2 tls } 5246 1.1.1.1.8.2 tls DONE; 5247 1.1.1.1.8.2 tls }) 5248 1.1.1.1.8.2 tls 5249 1.1.1.1.8.2 tls ;; Instructions for loading the three parts of an address on Unicos/Mk. 5250 1.1.1.1.8.2 tls 5251 1.1.1.1.8.2 tls (define_insn "umk_laum" 5252 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5253 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "symbolic_operand" "")] 5254 1.1.1.1.8.2 tls UNSPEC_UMK_LAUM))] 5255 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 5256 1.1.1.1.8.2 tls "laum %r0,%t1($31)" 5257 1.1.1.1.8.2 tls [(set_attr "type" "iadd")]) 5258 1.1.1.1.8.2 tls 5259 1.1.1.1.8.2 tls (define_insn "umk_lalm" 5260 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5261 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "r") 5262 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 2 "symbolic_operand" "")] 5263 1.1.1.1.8.2 tls UNSPEC_UMK_LALM)))] 5264 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 5265 1.1.1.1.8.2 tls "lalm %r0,%t2(%r1)" 5266 1.1.1.1.8.2 tls [(set_attr "type" "iadd")]) 5267 1.1.1.1.8.2 tls 5268 1.1.1.1.8.2 tls (define_insn "umk_lal" 5269 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5270 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "register_operand" "r") 5271 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 2 "symbolic_operand" "")] 5272 1.1.1.1.8.2 tls UNSPEC_UMK_LAL)))] 5273 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 5274 1.1.1.1.8.2 tls "lal %r0,%t2(%r1)" 5275 1.1.1.1.8.2 tls [(set_attr "type" "iadd")]) 5276 1.1.1.1.8.2 tls 5277 1.1.1.1.8.2 tls ;; Add a new call information word to the current function's list of CIWs 5278 1.1.1.1.8.2 tls ;; and load its index into $25. Doing it here ensures that the CIW will be 5279 1.1.1.1.8.2 tls ;; associated with the correct function even in the presence of inlining. 5280 1.1.1.1.8.2 tls 5281 1.1.1.1.8.2 tls (define_insn "*umk_load_ciw" 5282 1.1.1.1.8.2 tls [(set (reg:DI 25) 5283 1.1.1.1.8.2 tls (unspec:DI [(match_operand 0 "" "")] UNSPEC_UMK_LOAD_CIW))] 5284 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 5285 1.1.1.1.8.2 tls { 5286 1.1.1.1.8.2 tls operands[0] = unicosmk_add_call_info_word (operands[0]); 5287 1.1.1.1.8.2 tls return "lda $25,%0"; 5288 1.1.1.1.8.2 tls } 5289 1.1.1.1.8.2 tls [(set_attr "type" "iadd")]) 5290 1.1.1.1.8.2 tls 5291 1.1.1.1.8.2 tls (define_insn "*movdi_er_low_l" 5292 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5293 1.1.1.1.8.2 tls (lo_sum:DI (match_operand:DI 1 "register_operand" "r") 5294 1.1.1.1.8.2 tls (match_operand:DI 2 "local_symbolic_operand" "")))] 5295 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS" 5296 1.1.1.1.8.2 tls { 5297 1.1.1.1.8.2 tls if (true_regnum (operands[1]) == 29) 5298 1.1.1.1.8.2 tls return "lda %0,%2(%1)\t\t!gprel"; 5299 1.1.1.1.8.2 tls else 5300 1.1.1.1.8.2 tls return "lda %0,%2(%1)\t\t!gprellow"; 5301 1.1.1.1.8.2 tls } 5302 1.1.1.1.8.2 tls [(set_attr "usegp" "yes")]) 5303 1.1.1.1.8.2 tls 5304 1.1.1.1.8.2 tls (define_split 5305 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 5306 1.1.1.1.8.2 tls (match_operand:DI 1 "small_symbolic_operand" ""))] 5307 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && reload_completed" 5308 1.1.1.1.8.2 tls [(set (match_dup 0) 5309 1.1.1.1.8.2 tls (lo_sum:DI (match_dup 2) (match_dup 1)))] 5310 1.1.1.1.8.2 tls "operands[2] = pic_offset_table_rtx;") 5311 1.1.1.1.8.2 tls 5312 1.1.1.1.8.2 tls (define_split 5313 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 5314 1.1.1.1.8.2 tls (match_operand:DI 1 "local_symbolic_operand" ""))] 5315 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && reload_completed" 5316 1.1.1.1.8.2 tls [(set (match_dup 0) 5317 1.1.1.1.8.2 tls (plus:DI (match_dup 2) (high:DI (match_dup 1)))) 5318 1.1.1.1.8.2 tls (set (match_dup 0) 5319 1.1.1.1.8.2 tls (lo_sum:DI (match_dup 0) (match_dup 1)))] 5320 1.1.1.1.8.2 tls "operands[2] = pic_offset_table_rtx;") 5321 1.1.1.1.8.2 tls 5322 1.1.1.1.8.2 tls (define_split 5323 1.1.1.1.8.2 tls [(match_operand 0 "some_small_symbolic_operand" "")] 5324 1.1.1.1.8.2 tls "" 5325 1.1.1.1.8.2 tls [(match_dup 0)] 5326 1.1.1.1.8.2 tls "operands[0] = split_small_symbolic_operand (operands[0]);") 5327 1.1.1.1.8.2 tls 5328 1.1.1.1.8.2 tls ;; Accepts any symbolic, not just global, since function calls that 5329 1.1.1.1.8.2 tls ;; don't go via bsr still use !literal in hopes of linker relaxation. 5330 1.1.1.1.8.2 tls (define_insn "movdi_er_high_g" 5331 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5332 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 5333 1.1.1.1.8.2 tls (match_operand:DI 2 "symbolic_operand" "") 5334 1.1.1.1.8.2 tls (match_operand 3 "const_int_operand" "")] 5335 1.1.1.1.8.2 tls UNSPEC_LITERAL))] 5336 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS" 5337 1.1.1.1.8.2 tls { 5338 1.1.1.1.8.2 tls if (INTVAL (operands[3]) == 0) 5339 1.1.1.1.8.2 tls return "ldq %0,%2(%1)\t\t!literal"; 5340 1.1.1.1.8.2 tls else 5341 1.1.1.1.8.2 tls return "ldq %0,%2(%1)\t\t!literal!%3"; 5342 1.1.1.1.8.2 tls } 5343 1.1.1.1.8.2 tls [(set_attr "type" "ldsym")]) 5344 1.1.1.1.8.2 tls 5345 1.1.1.1.8.2 tls (define_split 5346 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 5347 1.1.1.1.8.2 tls (match_operand:DI 1 "global_symbolic_operand" ""))] 5348 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && reload_completed" 5349 1.1.1.1.8.2 tls [(set (match_dup 0) 5350 1.1.1.1.8.2 tls (unspec:DI [(match_dup 2) 5351 1.1.1.1.8.2 tls (match_dup 1) 5352 1.1.1.1.8.2 tls (const_int 0)] UNSPEC_LITERAL))] 5353 1.1.1.1.8.2 tls "operands[2] = pic_offset_table_rtx;") 5354 1.1.1.1.8.2 tls 5355 1.1.1.1.8.2 tls (define_insn "movdi_er_tlsgd" 5356 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5357 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 5358 1.1.1.1.8.2 tls (match_operand:DI 2 "symbolic_operand" "") 5359 1.1.1.1.8.2 tls (match_operand 3 "const_int_operand" "")] 5360 1.1.1.1.8.2 tls UNSPEC_TLSGD))] 5361 1.1.1.1.8.2 tls "HAVE_AS_TLS" 5362 1.1.1.1.8.2 tls { 5363 1.1.1.1.8.2 tls if (INTVAL (operands[3]) == 0) 5364 1.1.1.1.8.2 tls return "lda %0,%2(%1)\t\t!tlsgd"; 5365 1.1.1.1.8.2 tls else 5366 1.1.1.1.8.2 tls return "lda %0,%2(%1)\t\t!tlsgd!%3"; 5367 1.1.1.1.8.2 tls }) 5368 1.1.1.1.8.2 tls 5369 1.1.1.1.8.2 tls (define_insn "movdi_er_tlsldm" 5370 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5371 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 5372 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")] 5373 1.1.1.1.8.2 tls UNSPEC_TLSLDM))] 5374 1.1.1.1.8.2 tls "HAVE_AS_TLS" 5375 1.1.1.1.8.2 tls { 5376 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 0) 5377 1.1.1.1.8.2 tls return "lda %0,%&(%1)\t\t!tlsldm"; 5378 1.1.1.1.8.2 tls else 5379 1.1.1.1.8.2 tls return "lda %0,%&(%1)\t\t!tlsldm!%2"; 5380 1.1.1.1.8.2 tls }) 5381 1.1.1.1.8.2 tls 5382 1.1.1.1.8.2 tls (define_insn "*movdi_er_gotdtp" 5383 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5384 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 5385 1.1.1.1.8.2 tls (match_operand:DI 2 "symbolic_operand" "")] 5386 1.1.1.1.8.2 tls UNSPEC_DTPREL))] 5387 1.1.1.1.8.2 tls "HAVE_AS_TLS" 5388 1.1.1.1.8.2 tls "ldq %0,%2(%1)\t\t!gotdtprel" 5389 1.1.1.1.8.2 tls [(set_attr "type" "ild") 5390 1.1.1.1.8.2 tls (set_attr "usegp" "yes")]) 5391 1.1.1.1.8.2 tls 5392 1.1.1.1.8.2 tls (define_split 5393 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 5394 1.1.1.1.8.2 tls (match_operand:DI 1 "gotdtp_symbolic_operand" ""))] 5395 1.1.1.1.8.2 tls "HAVE_AS_TLS && reload_completed" 5396 1.1.1.1.8.2 tls [(set (match_dup 0) 5397 1.1.1.1.8.2 tls (unspec:DI [(match_dup 2) 5398 1.1.1.1.8.2 tls (match_dup 1)] UNSPEC_DTPREL))] 5399 1.1.1.1.8.2 tls { 5400 1.1.1.1.8.2 tls operands[1] = XVECEXP (XEXP (operands[1], 0), 0, 0); 5401 1.1.1.1.8.2 tls operands[2] = pic_offset_table_rtx; 5402 1.1.1.1.8.2 tls }) 5403 1.1.1.1.8.2 tls 5404 1.1.1.1.8.2 tls (define_insn "*movdi_er_gottp" 5405 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5406 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 5407 1.1.1.1.8.2 tls (match_operand:DI 2 "symbolic_operand" "")] 5408 1.1.1.1.8.2 tls UNSPEC_TPREL))] 5409 1.1.1.1.8.2 tls "HAVE_AS_TLS" 5410 1.1.1.1.8.2 tls "ldq %0,%2(%1)\t\t!gottprel" 5411 1.1.1.1.8.2 tls [(set_attr "type" "ild") 5412 1.1.1.1.8.2 tls (set_attr "usegp" "yes")]) 5413 1.1.1.1.8.2 tls 5414 1.1.1.1.8.2 tls (define_split 5415 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 5416 1.1.1.1.8.2 tls (match_operand:DI 1 "gottp_symbolic_operand" ""))] 5417 1.1.1.1.8.2 tls "HAVE_AS_TLS && reload_completed" 5418 1.1.1.1.8.2 tls [(set (match_dup 0) 5419 1.1.1.1.8.2 tls (unspec:DI [(match_dup 2) 5420 1.1.1.1.8.2 tls (match_dup 1)] UNSPEC_TPREL))] 5421 1.1.1.1.8.2 tls { 5422 1.1.1.1.8.2 tls operands[1] = XVECEXP (XEXP (operands[1], 0), 0, 0); 5423 1.1.1.1.8.2 tls operands[2] = pic_offset_table_rtx; 5424 1.1.1.1.8.2 tls }) 5425 1.1.1.1.8.2 tls 5426 1.1.1.1.8.2 tls (define_insn "*movdi_er_nofix" 5427 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r,r,r,r,m,*f,*f,Q") 5428 1.1.1.1.8.2 tls (match_operand:DI 1 "input_operand" "rJ,K,L,T,s,n,m,rJ,*fJ,Q,*f"))] 5429 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && ! TARGET_FIX 5430 1.1.1.1.8.2 tls && (register_operand (operands[0], DImode) 5431 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], DImode))" 5432 1.1.1.1.8.2 tls "@ 5433 1.1.1.1.8.2 tls mov %r1,%0 5434 1.1.1.1.8.2 tls lda %0,%1($31) 5435 1.1.1.1.8.2 tls ldah %0,%h1($31) 5436 1.1.1.1.8.2 tls # 5437 1.1.1.1.8.2 tls # 5438 1.1.1.1.8.2 tls # 5439 1.1.1.1.8.2 tls ldq%A1 %0,%1 5440 1.1.1.1.8.2 tls stq%A0 %r1,%0 5441 1.1.1.1.8.2 tls fmov %R1,%0 5442 1.1.1.1.8.2 tls ldt %0,%1 5443 1.1.1.1.8.2 tls stt %R1,%0" 5444 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,iadd,iadd,ldsym,multi,ild,ist,fcpys,fld,fst") 5445 1.1.1.1.8.2 tls (set_attr "usegp" "*,*,*,yes,*,*,*,*,*,*,*")]) 5446 1.1.1.1.8.2 tls 5447 1.1.1.1.8.2 tls ;; The 'U' constraint matches symbolic operands on Unicos/Mk. Those should 5448 1.1.1.1.8.2 tls ;; have been split up by the rules above but we shouldn't reject the 5449 1.1.1.1.8.2 tls ;; possibility of them getting through. 5450 1.1.1.1.8.2 tls 5451 1.1.1.1.8.2 tls (define_insn "*movdi_nofix" 5452 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r,r,r,r,m,*f,*f,Q") 5453 1.1.1.1.8.2 tls (match_operand:DI 1 "input_operand" "rJ,K,L,U,s,n,m,rJ,*fJ,Q,*f"))] 5454 1.1.1.1.8.2 tls "! TARGET_FIX 5455 1.1.1.1.8.2 tls && (register_operand (operands[0], DImode) 5456 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], DImode))" 5457 1.1.1.1.8.2 tls "@ 5458 1.1.1.1.8.2 tls bis $31,%r1,%0 5459 1.1.1.1.8.2 tls lda %0,%1($31) 5460 1.1.1.1.8.2 tls ldah %0,%h1($31) 5461 1.1.1.1.8.2 tls laum %0,%t1($31)\;sll %0,32,%0\;lalm %0,%t1(%0)\;lal %0,%t1(%0) 5462 1.1.1.1.8.2 tls lda %0,%1 5463 1.1.1.1.8.2 tls # 5464 1.1.1.1.8.2 tls ldq%A1 %0,%1 5465 1.1.1.1.8.2 tls stq%A0 %r1,%0 5466 1.1.1.1.8.2 tls cpys %R1,%R1,%0 5467 1.1.1.1.8.2 tls ldt %0,%1 5468 1.1.1.1.8.2 tls stt %R1,%0" 5469 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,iadd,ldsym,ldsym,multi,ild,ist,fcpys,fld,fst") 5470 1.1.1.1.8.2 tls (set_attr "length" "*,*,*,16,*,*,*,*,*,*,*")]) 5471 1.1.1.1.8.2 tls 5472 1.1.1.1.8.2 tls (define_insn "*movdi_er_fix" 5473 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" 5474 1.1.1.1.8.2 tls "=r,r,r,r,r,r,r, m, *f,*f, Q, r,*f") 5475 1.1.1.1.8.2 tls (match_operand:DI 1 "input_operand" 5476 1.1.1.1.8.2 tls "rJ,K,L,T,s,n,m,rJ,*fJ, Q,*f,*f, r"))] 5477 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_FIX 5478 1.1.1.1.8.2 tls && (register_operand (operands[0], DImode) 5479 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], DImode))" 5480 1.1.1.1.8.2 tls "@ 5481 1.1.1.1.8.2 tls mov %r1,%0 5482 1.1.1.1.8.2 tls lda %0,%1($31) 5483 1.1.1.1.8.2 tls ldah %0,%h1($31) 5484 1.1.1.1.8.2 tls # 5485 1.1.1.1.8.2 tls # 5486 1.1.1.1.8.2 tls # 5487 1.1.1.1.8.2 tls ldq%A1 %0,%1 5488 1.1.1.1.8.2 tls stq%A0 %r1,%0 5489 1.1.1.1.8.2 tls fmov %R1,%0 5490 1.1.1.1.8.2 tls ldt %0,%1 5491 1.1.1.1.8.2 tls stt %R1,%0 5492 1.1.1.1.8.2 tls ftoit %1,%0 5493 1.1.1.1.8.2 tls itoft %1,%0" 5494 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,iadd,iadd,ldsym,multi,ild,ist,fcpys,fld,fst,ftoi,itof") 5495 1.1.1.1.8.2 tls (set_attr "usegp" "*,*,*,yes,*,*,*,*,*,*,*,*,*")]) 5496 1.1.1.1.8.2 tls 5497 1.1.1.1.8.2 tls (define_insn "*movdi_fix" 5498 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r,r,r,m,*f,*f,Q,r,*f") 5499 1.1.1.1.8.2 tls (match_operand:DI 1 "input_operand" "rJ,K,L,s,n,m,rJ,*fJ,Q,*f,*f,r"))] 5500 1.1.1.1.8.2 tls "! TARGET_EXPLICIT_RELOCS && TARGET_FIX 5501 1.1.1.1.8.2 tls && (register_operand (operands[0], DImode) 5502 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], DImode))" 5503 1.1.1.1.8.2 tls "@ 5504 1.1.1.1.8.2 tls bis $31,%r1,%0 5505 1.1.1.1.8.2 tls lda %0,%1($31) 5506 1.1.1.1.8.2 tls ldah %0,%h1($31) 5507 1.1.1.1.8.2 tls lda %0,%1 5508 1.1.1.1.8.2 tls # 5509 1.1.1.1.8.2 tls ldq%A1 %0,%1 5510 1.1.1.1.8.2 tls stq%A0 %r1,%0 5511 1.1.1.1.8.2 tls cpys %R1,%R1,%0 5512 1.1.1.1.8.2 tls ldt %0,%1 5513 1.1.1.1.8.2 tls stt %R1,%0 5514 1.1.1.1.8.2 tls ftoit %1,%0 5515 1.1.1.1.8.2 tls itoft %1,%0" 5516 1.1.1.1.8.2 tls [(set_attr "type" "ilog,iadd,iadd,ldsym,multi,ild,ist,fcpys,fld,fst,ftoi,itof")]) 5517 1.1.1.1.8.2 tls 5518 1.1.1.1.8.2 tls ;; VMS needs to set up "vms_base_regno" for unwinding. This move 5519 1.1.1.1.8.2 tls ;; often appears dead to the life analysis code, at which point we 5520 1.1.1.1.8.2 tls ;; die for emitting dead prologue instructions. Force this live. 5521 1.1.1.1.8.2 tls 5522 1.1.1.1.8.2 tls (define_insn "force_movdi" 5523 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 5524 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_operand:DI 1 "register_operand" "r")] 5525 1.1.1.1.8.2 tls UNSPECV_FORCE_MOV))] 5526 1.1.1.1.8.2 tls "" 5527 1.1.1.1.8.2 tls "mov %1,%0" 5528 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 5529 1.1.1.1.8.2 tls 5530 1.1.1.1.8.2 tls ;; We do three major things here: handle mem->mem, put 64-bit constants in 5531 1.1.1.1.8.2 tls ;; memory, and construct long 32-bit constants. 5532 1.1.1.1.8.2 tls 5533 1.1.1.1.8.2 tls (define_expand "movdi" 5534 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "") 5535 1.1.1.1.8.2 tls (match_operand:DI 1 "general_operand" ""))] 5536 1.1.1.1.8.2 tls "" 5537 1.1.1.1.8.2 tls { 5538 1.1.1.1.8.2 tls if (alpha_expand_mov (DImode, operands)) 5539 1.1.1.1.8.2 tls DONE; 5540 1.1.1.1.8.2 tls }) 5541 1.1.1.1.8.2 tls 5542 1.1.1.1.8.2 tls ;; Split a load of a large constant into the appropriate two-insn 5543 1.1.1.1.8.2 tls ;; sequence. 5544 1.1.1.1.8.2 tls 5545 1.1.1.1.8.2 tls (define_split 5546 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 5547 1.1.1.1.8.2 tls (match_operand:DI 1 "non_add_const_operand" ""))] 5548 1.1.1.1.8.2 tls "" 5549 1.1.1.1.8.2 tls [(const_int 0)] 5550 1.1.1.1.8.2 tls { 5551 1.1.1.1.8.2 tls if (alpha_split_const_mov (DImode, operands)) 5552 1.1.1.1.8.2 tls DONE; 5553 1.1.1.1.8.2 tls else 5554 1.1.1.1.8.2 tls FAIL; 5555 1.1.1.1.8.2 tls }) 5556 1.1.1.1.8.2 tls 5557 1.1.1.1.8.2 tls ;; We need to prevent reload from splitting TImode moves, because it 5558 1.1.1.1.8.2 tls ;; might decide to overwrite a pointer with the value it points to. 5559 1.1.1.1.8.2 tls ;; In that case we have to do the loads in the appropriate order so 5560 1.1.1.1.8.2 tls ;; that the pointer is not destroyed too early. 5561 1.1.1.1.8.2 tls 5562 1.1.1.1.8.2 tls (define_insn_and_split "*movti_internal" 5563 1.1.1.1.8.2 tls [(set (match_operand:TI 0 "nonimmediate_operand" "=r,o") 5564 1.1.1.1.8.2 tls (match_operand:TI 1 "input_operand" "roJ,rJ"))] 5565 1.1.1.1.8.2 tls "(register_operand (operands[0], TImode) 5566 1.1.1.1.8.2 tls /* Prevent rematerialization of constants. */ 5567 1.1.1.1.8.2 tls && ! CONSTANT_P (operands[1])) 5568 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], TImode)" 5569 1.1.1.1.8.2 tls "#" 5570 1.1.1.1.8.2 tls "reload_completed" 5571 1.1.1.1.8.2 tls [(set (match_dup 0) (match_dup 2)) 5572 1.1.1.1.8.2 tls (set (match_dup 1) (match_dup 3))] 5573 1.1.1.1.8.2 tls { 5574 1.1.1.1.8.2 tls alpha_split_tmode_pair (operands, TImode, true); 5575 1.1.1.1.8.2 tls }) 5576 1.1.1.1.8.2 tls 5577 1.1.1.1.8.2 tls (define_expand "movti" 5578 1.1.1.1.8.2 tls [(set (match_operand:TI 0 "nonimmediate_operand" "") 5579 1.1.1.1.8.2 tls (match_operand:TI 1 "general_operand" ""))] 5580 1.1.1.1.8.2 tls "" 5581 1.1.1.1.8.2 tls { 5582 1.1.1.1.8.2 tls if (MEM_P (operands[0]) 5583 1.1.1.1.8.2 tls && ! reg_or_0_operand (operands[1], TImode)) 5584 1.1.1.1.8.2 tls operands[1] = force_reg (TImode, operands[1]); 5585 1.1.1.1.8.2 tls 5586 1.1.1.1.8.2 tls if (operands[1] == const0_rtx) 5587 1.1.1.1.8.2 tls ; 5588 1.1.1.1.8.2 tls /* We must put 64-bit constants in memory. We could keep the 5589 1.1.1.1.8.2 tls 32-bit constants in TImode and rely on the splitter, but 5590 1.1.1.1.8.2 tls this doesn't seem to be worth the pain. */ 5591 1.1.1.1.8.2 tls else if (CONST_INT_P (operands[1]) 5592 1.1.1.1.8.2 tls || GET_CODE (operands[1]) == CONST_DOUBLE) 5593 1.1.1.1.8.2 tls { 5594 1.1.1.1.8.2 tls rtx in[2], out[2], target; 5595 1.1.1.1.8.2 tls 5596 1.1.1.1.8.2 tls gcc_assert (can_create_pseudo_p ()); 5597 1.1.1.1.8.2 tls 5598 1.1.1.1.8.2 tls split_double (operands[1], &in[0], &in[1]); 5599 1.1.1.1.8.2 tls 5600 1.1.1.1.8.2 tls if (in[0] == const0_rtx) 5601 1.1.1.1.8.2 tls out[0] = const0_rtx; 5602 1.1.1.1.8.2 tls else 5603 1.1.1.1.8.2 tls { 5604 1.1.1.1.8.2 tls out[0] = gen_reg_rtx (DImode); 5605 1.1.1.1.8.2 tls emit_insn (gen_movdi (out[0], in[0])); 5606 1.1.1.1.8.2 tls } 5607 1.1.1.1.8.2 tls 5608 1.1.1.1.8.2 tls if (in[1] == const0_rtx) 5609 1.1.1.1.8.2 tls out[1] = const0_rtx; 5610 1.1.1.1.8.2 tls else 5611 1.1.1.1.8.2 tls { 5612 1.1.1.1.8.2 tls out[1] = gen_reg_rtx (DImode); 5613 1.1.1.1.8.2 tls emit_insn (gen_movdi (out[1], in[1])); 5614 1.1.1.1.8.2 tls } 5615 1.1.1.1.8.2 tls 5616 1.1.1.1.8.2 tls if (!REG_P (operands[0])) 5617 1.1.1.1.8.2 tls target = gen_reg_rtx (TImode); 5618 1.1.1.1.8.2 tls else 5619 1.1.1.1.8.2 tls target = operands[0]; 5620 1.1.1.1.8.2 tls 5621 1.1.1.1.8.2 tls emit_insn (gen_movdi (operand_subword (target, 0, 0, TImode), out[0])); 5622 1.1.1.1.8.2 tls emit_insn (gen_movdi (operand_subword (target, 1, 0, TImode), out[1])); 5623 1.1.1.1.8.2 tls 5624 1.1.1.1.8.2 tls if (target != operands[0]) 5625 1.1.1.1.8.2 tls emit_insn (gen_rtx_SET (VOIDmode, operands[0], target)); 5626 1.1.1.1.8.2 tls 5627 1.1.1.1.8.2 tls DONE; 5628 1.1.1.1.8.2 tls } 5629 1.1.1.1.8.2 tls }) 5630 1.1.1.1.8.2 tls 5631 1.1.1.1.8.2 tls ;; These are the partial-word cases. 5632 1.1.1.1.8.2 tls ;; 5633 1.1.1.1.8.2 tls ;; First we have the code to load an aligned word. Operand 0 is the register 5634 1.1.1.1.8.2 tls ;; in which to place the result. It's mode is QImode or HImode. Operand 1 5635 1.1.1.1.8.2 tls ;; is an SImode MEM at the low-order byte of the proper word. Operand 2 is the 5636 1.1.1.1.8.2 tls ;; number of bits within the word that the value is. Operand 3 is an SImode 5637 1.1.1.1.8.2 tls ;; scratch register. If operand 0 is a hard register, operand 3 may be the 5638 1.1.1.1.8.2 tls ;; same register. It is allowed to conflict with operand 1 as well. 5639 1.1.1.1.8.2 tls 5640 1.1.1.1.8.2 tls (define_expand "aligned_loadqi" 5641 1.1.1.1.8.2 tls [(set (match_operand:SI 3 "register_operand" "") 5642 1.1.1.1.8.2 tls (match_operand:SI 1 "memory_operand" "")) 5643 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 5644 1.1.1.1.8.2 tls (zero_extract:DI (subreg:DI (match_dup 3) 0) 5645 1.1.1.1.8.2 tls (const_int 8) 5646 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" "")))] 5647 1.1.1.1.8.2 tls 5648 1.1.1.1.8.2 tls "" 5649 1.1.1.1.8.2 tls "") 5650 1.1.1.1.8.2 tls 5651 1.1.1.1.8.2 tls (define_expand "aligned_loadhi" 5652 1.1.1.1.8.2 tls [(set (match_operand:SI 3 "register_operand" "") 5653 1.1.1.1.8.2 tls (match_operand:SI 1 "memory_operand" "")) 5654 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 5655 1.1.1.1.8.2 tls (zero_extract:DI (subreg:DI (match_dup 3) 0) 5656 1.1.1.1.8.2 tls (const_int 16) 5657 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" "")))] 5658 1.1.1.1.8.2 tls 5659 1.1.1.1.8.2 tls "" 5660 1.1.1.1.8.2 tls "") 5661 1.1.1.1.8.2 tls 5662 1.1.1.1.8.2 tls ;; Similar for unaligned loads, where we use the sequence from the 5663 1.1.1.1.8.2 tls ;; Alpha Architecture manual. We have to distinguish between little-endian 5664 1.1.1.1.8.2 tls ;; and big-endian systems as the sequences are different. 5665 1.1.1.1.8.2 tls ;; 5666 1.1.1.1.8.2 tls ;; Operand 1 is the address. Operands 2 and 3 are temporaries, where 5667 1.1.1.1.8.2 tls ;; operand 3 can overlap the input and output registers. 5668 1.1.1.1.8.2 tls 5669 1.1.1.1.8.2 tls (define_expand "unaligned_loadqi" 5670 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 5671 1.1.1.1.8.2 tls (use (match_operand:DI 1 "address_operand" "")) 5672 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" "")) 5673 1.1.1.1.8.2 tls (use (match_operand:DI 3 "register_operand" ""))] 5674 1.1.1.1.8.2 tls "" 5675 1.1.1.1.8.2 tls { 5676 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 5677 1.1.1.1.8.2 tls emit_insn (gen_unaligned_loadqi_be (operands[0], operands[1], 5678 1.1.1.1.8.2 tls operands[2], operands[3])); 5679 1.1.1.1.8.2 tls else 5680 1.1.1.1.8.2 tls emit_insn (gen_unaligned_loadqi_le (operands[0], operands[1], 5681 1.1.1.1.8.2 tls operands[2], operands[3])); 5682 1.1.1.1.8.2 tls DONE; 5683 1.1.1.1.8.2 tls }) 5684 1.1.1.1.8.2 tls 5685 1.1.1.1.8.2 tls (define_expand "unaligned_loadqi_le" 5686 1.1.1.1.8.2 tls [(set (match_operand:DI 2 "register_operand" "") 5687 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "address_operand" "") 5688 1.1.1.1.8.2 tls (const_int -8)))) 5689 1.1.1.1.8.2 tls (set (match_operand:DI 3 "register_operand" "") 5690 1.1.1.1.8.2 tls (match_dup 1)) 5691 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 5692 1.1.1.1.8.2 tls (zero_extract:DI (match_dup 2) 5693 1.1.1.1.8.2 tls (const_int 8) 5694 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) (const_int 3))))] 5695 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 5696 1.1.1.1.8.2 tls "") 5697 1.1.1.1.8.2 tls 5698 1.1.1.1.8.2 tls (define_expand "unaligned_loadqi_be" 5699 1.1.1.1.8.2 tls [(set (match_operand:DI 2 "register_operand" "") 5700 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "address_operand" "") 5701 1.1.1.1.8.2 tls (const_int -8)))) 5702 1.1.1.1.8.2 tls (set (match_operand:DI 3 "register_operand" "") 5703 1.1.1.1.8.2 tls (match_dup 1)) 5704 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 5705 1.1.1.1.8.2 tls (zero_extract:DI (match_dup 2) 5706 1.1.1.1.8.2 tls (const_int 8) 5707 1.1.1.1.8.2 tls (minus:DI 5708 1.1.1.1.8.2 tls (const_int 56) 5709 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) (const_int 3)))))] 5710 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 5711 1.1.1.1.8.2 tls "") 5712 1.1.1.1.8.2 tls 5713 1.1.1.1.8.2 tls (define_expand "unaligned_loadhi" 5714 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "")) 5715 1.1.1.1.8.2 tls (use (match_operand:DI 1 "address_operand" "")) 5716 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" "")) 5717 1.1.1.1.8.2 tls (use (match_operand:DI 3 "register_operand" ""))] 5718 1.1.1.1.8.2 tls "" 5719 1.1.1.1.8.2 tls { 5720 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 5721 1.1.1.1.8.2 tls emit_insn (gen_unaligned_loadhi_be (operands[0], operands[1], 5722 1.1.1.1.8.2 tls operands[2], operands[3])); 5723 1.1.1.1.8.2 tls else 5724 1.1.1.1.8.2 tls emit_insn (gen_unaligned_loadhi_le (operands[0], operands[1], 5725 1.1.1.1.8.2 tls operands[2], operands[3])); 5726 1.1.1.1.8.2 tls DONE; 5727 1.1.1.1.8.2 tls }) 5728 1.1.1.1.8.2 tls 5729 1.1.1.1.8.2 tls (define_expand "unaligned_loadhi_le" 5730 1.1.1.1.8.2 tls [(set (match_operand:DI 2 "register_operand" "") 5731 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "address_operand" "") 5732 1.1.1.1.8.2 tls (const_int -8)))) 5733 1.1.1.1.8.2 tls (set (match_operand:DI 3 "register_operand" "") 5734 1.1.1.1.8.2 tls (match_dup 1)) 5735 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 5736 1.1.1.1.8.2 tls (zero_extract:DI (match_dup 2) 5737 1.1.1.1.8.2 tls (const_int 16) 5738 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) (const_int 3))))] 5739 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 5740 1.1.1.1.8.2 tls "") 5741 1.1.1.1.8.2 tls 5742 1.1.1.1.8.2 tls (define_expand "unaligned_loadhi_be" 5743 1.1.1.1.8.2 tls [(set (match_operand:DI 2 "register_operand" "") 5744 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 1 "address_operand" "") 5745 1.1.1.1.8.2 tls (const_int -8)))) 5746 1.1.1.1.8.2 tls (set (match_operand:DI 3 "register_operand" "") 5747 1.1.1.1.8.2 tls (plus:DI (match_dup 1) (const_int 1))) 5748 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "") 5749 1.1.1.1.8.2 tls (zero_extract:DI (match_dup 2) 5750 1.1.1.1.8.2 tls (const_int 16) 5751 1.1.1.1.8.2 tls (minus:DI 5752 1.1.1.1.8.2 tls (const_int 56) 5753 1.1.1.1.8.2 tls (ashift:DI (match_dup 3) (const_int 3)))))] 5754 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 5755 1.1.1.1.8.2 tls "") 5756 1.1.1.1.8.2 tls 5757 1.1.1.1.8.2 tls ;; Storing an aligned byte or word requires two temporaries. Operand 0 is the 5758 1.1.1.1.8.2 tls ;; aligned SImode MEM. Operand 1 is the register containing the 5759 1.1.1.1.8.2 tls ;; byte or word to store. Operand 2 is the number of bits within the word that 5760 1.1.1.1.8.2 tls ;; the value should be placed. Operands 3 and 4 are SImode temporaries. 5761 1.1.1.1.8.2 tls 5762 1.1.1.1.8.2 tls (define_expand "aligned_store" 5763 1.1.1.1.8.2 tls [(set (match_operand:SI 3 "register_operand" "") 5764 1.1.1.1.8.2 tls (match_operand:SI 0 "memory_operand" "")) 5765 1.1.1.1.8.2 tls (set (subreg:DI (match_dup 3) 0) 5766 1.1.1.1.8.2 tls (and:DI (subreg:DI (match_dup 3) 0) (match_dup 5))) 5767 1.1.1.1.8.2 tls (set (subreg:DI (match_operand:SI 4 "register_operand" "") 0) 5768 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand 1 "register_operand" "")) 5769 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" ""))) 5770 1.1.1.1.8.2 tls (set (subreg:DI (match_dup 4) 0) 5771 1.1.1.1.8.2 tls (ior:DI (subreg:DI (match_dup 4) 0) (subreg:DI (match_dup 3) 0))) 5772 1.1.1.1.8.2 tls (set (match_dup 0) (match_dup 4))] 5773 1.1.1.1.8.2 tls "" 5774 1.1.1.1.8.2 tls { 5775 1.1.1.1.8.2 tls operands[5] = GEN_INT (~ (GET_MODE_MASK (GET_MODE (operands[1])) 5776 1.1.1.1.8.2 tls << INTVAL (operands[2]))); 5777 1.1.1.1.8.2 tls }) 5778 1.1.1.1.8.2 tls 5779 1.1.1.1.8.2 tls ;; For the unaligned byte and halfword cases, we use code similar to that 5780 1.1.1.1.8.2 tls ;; in the ;; Architecture book, but reordered to lower the number of registers 5781 1.1.1.1.8.2 tls ;; required. Operand 0 is the address. Operand 1 is the data to store. 5782 1.1.1.1.8.2 tls ;; Operands 2, 3, and 4 are DImode temporaries, where operands 2 and 4 may 5783 1.1.1.1.8.2 tls ;; be the same temporary, if desired. If the address is in a register, 5784 1.1.1.1.8.2 tls ;; operand 2 can be that register. 5785 1.1.1.1.8.2 tls 5786 1.1.1.1.8.2 tls (define_expand "unaligned_storeqi" 5787 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "address_operand" "")) 5788 1.1.1.1.8.2 tls (use (match_operand:QI 1 "register_operand" "")) 5789 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" "")) 5790 1.1.1.1.8.2 tls (use (match_operand:DI 3 "register_operand" "")) 5791 1.1.1.1.8.2 tls (use (match_operand:DI 4 "register_operand" ""))] 5792 1.1.1.1.8.2 tls "" 5793 1.1.1.1.8.2 tls { 5794 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 5795 1.1.1.1.8.2 tls emit_insn (gen_unaligned_storeqi_be (operands[0], operands[1], 5796 1.1.1.1.8.2 tls operands[2], operands[3], 5797 1.1.1.1.8.2 tls operands[4])); 5798 1.1.1.1.8.2 tls else 5799 1.1.1.1.8.2 tls emit_insn (gen_unaligned_storeqi_le (operands[0], operands[1], 5800 1.1.1.1.8.2 tls operands[2], operands[3], 5801 1.1.1.1.8.2 tls operands[4])); 5802 1.1.1.1.8.2 tls DONE; 5803 1.1.1.1.8.2 tls }) 5804 1.1.1.1.8.2 tls 5805 1.1.1.1.8.2 tls (define_expand "unaligned_storeqi_le" 5806 1.1.1.1.8.2 tls [(set (match_operand:DI 3 "register_operand" "") 5807 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 0 "address_operand" "") 5808 1.1.1.1.8.2 tls (const_int -8)))) 5809 1.1.1.1.8.2 tls (set (match_operand:DI 2 "register_operand" "") 5810 1.1.1.1.8.2 tls (match_dup 0)) 5811 1.1.1.1.8.2 tls (set (match_dup 3) 5812 1.1.1.1.8.2 tls (and:DI (not:DI (ashift:DI (const_int 255) 5813 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3)))) 5814 1.1.1.1.8.2 tls (match_dup 3))) 5815 1.1.1.1.8.2 tls (set (match_operand:DI 4 "register_operand" "") 5816 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "")) 5817 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3)))) 5818 1.1.1.1.8.2 tls (set (match_dup 4) (ior:DI (match_dup 4) (match_dup 3))) 5819 1.1.1.1.8.2 tls (set (mem:DI (and:DI (match_dup 0) (const_int -8))) 5820 1.1.1.1.8.2 tls (match_dup 4))] 5821 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 5822 1.1.1.1.8.2 tls "") 5823 1.1.1.1.8.2 tls 5824 1.1.1.1.8.2 tls (define_expand "unaligned_storeqi_be" 5825 1.1.1.1.8.2 tls [(set (match_operand:DI 3 "register_operand" "") 5826 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 0 "address_operand" "") 5827 1.1.1.1.8.2 tls (const_int -8)))) 5828 1.1.1.1.8.2 tls (set (match_operand:DI 2 "register_operand" "") 5829 1.1.1.1.8.2 tls (match_dup 0)) 5830 1.1.1.1.8.2 tls (set (match_dup 3) 5831 1.1.1.1.8.2 tls (and:DI (not:DI (ashift:DI (const_int 255) 5832 1.1.1.1.8.2 tls (minus:DI (const_int 56) 5833 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3))))) 5834 1.1.1.1.8.2 tls (match_dup 3))) 5835 1.1.1.1.8.2 tls (set (match_operand:DI 4 "register_operand" "") 5836 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:QI 1 "register_operand" "")) 5837 1.1.1.1.8.2 tls (minus:DI (const_int 56) 5838 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3))))) 5839 1.1.1.1.8.2 tls (set (match_dup 4) (ior:DI (match_dup 4) (match_dup 3))) 5840 1.1.1.1.8.2 tls (set (mem:DI (and:DI (match_dup 0) (const_int -8))) 5841 1.1.1.1.8.2 tls (match_dup 4))] 5842 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 5843 1.1.1.1.8.2 tls "") 5844 1.1.1.1.8.2 tls 5845 1.1.1.1.8.2 tls (define_expand "unaligned_storehi" 5846 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "address_operand" "")) 5847 1.1.1.1.8.2 tls (use (match_operand:HI 1 "register_operand" "")) 5848 1.1.1.1.8.2 tls (use (match_operand:DI 2 "register_operand" "")) 5849 1.1.1.1.8.2 tls (use (match_operand:DI 3 "register_operand" "")) 5850 1.1.1.1.8.2 tls (use (match_operand:DI 4 "register_operand" ""))] 5851 1.1.1.1.8.2 tls "" 5852 1.1.1.1.8.2 tls { 5853 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 5854 1.1.1.1.8.2 tls emit_insn (gen_unaligned_storehi_be (operands[0], operands[1], 5855 1.1.1.1.8.2 tls operands[2], operands[3], 5856 1.1.1.1.8.2 tls operands[4])); 5857 1.1.1.1.8.2 tls else 5858 1.1.1.1.8.2 tls emit_insn (gen_unaligned_storehi_le (operands[0], operands[1], 5859 1.1.1.1.8.2 tls operands[2], operands[3], 5860 1.1.1.1.8.2 tls operands[4])); 5861 1.1.1.1.8.2 tls DONE; 5862 1.1.1.1.8.2 tls }) 5863 1.1.1.1.8.2 tls 5864 1.1.1.1.8.2 tls (define_expand "unaligned_storehi_le" 5865 1.1.1.1.8.2 tls [(set (match_operand:DI 3 "register_operand" "") 5866 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 0 "address_operand" "") 5867 1.1.1.1.8.2 tls (const_int -8)))) 5868 1.1.1.1.8.2 tls (set (match_operand:DI 2 "register_operand" "") 5869 1.1.1.1.8.2 tls (match_dup 0)) 5870 1.1.1.1.8.2 tls (set (match_dup 3) 5871 1.1.1.1.8.2 tls (and:DI (not:DI (ashift:DI (const_int 65535) 5872 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3)))) 5873 1.1.1.1.8.2 tls (match_dup 3))) 5874 1.1.1.1.8.2 tls (set (match_operand:DI 4 "register_operand" "") 5875 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:HI 1 "register_operand" "")) 5876 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3)))) 5877 1.1.1.1.8.2 tls (set (match_dup 4) (ior:DI (match_dup 4) (match_dup 3))) 5878 1.1.1.1.8.2 tls (set (mem:DI (and:DI (match_dup 0) (const_int -8))) 5879 1.1.1.1.8.2 tls (match_dup 4))] 5880 1.1.1.1.8.2 tls "! WORDS_BIG_ENDIAN" 5881 1.1.1.1.8.2 tls "") 5882 1.1.1.1.8.2 tls 5883 1.1.1.1.8.2 tls (define_expand "unaligned_storehi_be" 5884 1.1.1.1.8.2 tls [(set (match_operand:DI 3 "register_operand" "") 5885 1.1.1.1.8.2 tls (mem:DI (and:DI (match_operand:DI 0 "address_operand" "") 5886 1.1.1.1.8.2 tls (const_int -8)))) 5887 1.1.1.1.8.2 tls (set (match_operand:DI 2 "register_operand" "") 5888 1.1.1.1.8.2 tls (plus:DI (match_dup 5) (const_int 1))) 5889 1.1.1.1.8.2 tls (set (match_dup 3) 5890 1.1.1.1.8.2 tls (and:DI (not:DI (ashift:DI 5891 1.1.1.1.8.2 tls (const_int 65535) 5892 1.1.1.1.8.2 tls (minus:DI (const_int 56) 5893 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3))))) 5894 1.1.1.1.8.2 tls (match_dup 3))) 5895 1.1.1.1.8.2 tls (set (match_operand:DI 4 "register_operand" "") 5896 1.1.1.1.8.2 tls (ashift:DI (zero_extend:DI (match_operand:HI 1 "register_operand" "")) 5897 1.1.1.1.8.2 tls (minus:DI (const_int 56) 5898 1.1.1.1.8.2 tls (ashift:DI (match_dup 2) (const_int 3))))) 5899 1.1.1.1.8.2 tls (set (match_dup 4) (ior:DI (match_dup 4) (match_dup 3))) 5900 1.1.1.1.8.2 tls (set (mem:DI (and:DI (match_dup 0) (const_int -8))) 5901 1.1.1.1.8.2 tls (match_dup 4))] 5902 1.1.1.1.8.2 tls "WORDS_BIG_ENDIAN" 5903 1.1.1.1.8.2 tls "operands[5] = force_reg (DImode, operands[0]);") 5904 1.1.1.1.8.2 tls 5906 1.1.1.1.8.2 tls ;; Here are the define_expand's for QI and HI moves that use the above 5907 1.1.1.1.8.2 tls ;; patterns. We have the normal sets, plus the ones that need scratch 5908 1.1.1.1.8.2 tls ;; registers for reload. 5909 1.1.1.1.8.2 tls 5910 1.1.1.1.8.2 tls (define_expand "movqi" 5911 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "nonimmediate_operand" "") 5912 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" ""))] 5913 1.1.1.1.8.2 tls "" 5914 1.1.1.1.8.2 tls { 5915 1.1.1.1.8.2 tls if (TARGET_BWX 5916 1.1.1.1.8.2 tls ? alpha_expand_mov (QImode, operands) 5917 1.1.1.1.8.2 tls : alpha_expand_mov_nobwx (QImode, operands)) 5918 1.1.1.1.8.2 tls DONE; 5919 1.1.1.1.8.2 tls }) 5920 1.1.1.1.8.2 tls 5921 1.1.1.1.8.2 tls (define_expand "movhi" 5922 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "nonimmediate_operand" "") 5923 1.1.1.1.8.2 tls (match_operand:HI 1 "general_operand" ""))] 5924 1.1.1.1.8.2 tls "" 5925 1.1.1.1.8.2 tls { 5926 1.1.1.1.8.2 tls if (TARGET_BWX 5927 1.1.1.1.8.2 tls ? alpha_expand_mov (HImode, operands) 5928 1.1.1.1.8.2 tls : alpha_expand_mov_nobwx (HImode, operands)) 5929 1.1.1.1.8.2 tls DONE; 5930 1.1.1.1.8.2 tls }) 5931 1.1.1.1.8.2 tls 5932 1.1.1.1.8.2 tls ;; We need to hook into the extra support that we have for HImode 5933 1.1.1.1.8.2 tls ;; reloads when BWX insns are not available. 5934 1.1.1.1.8.2 tls (define_expand "movcqi" 5935 1.1.1.1.8.2 tls [(set (match_operand:CQI 0 "nonimmediate_operand" "") 5936 1.1.1.1.8.2 tls (match_operand:CQI 1 "general_operand" ""))] 5937 1.1.1.1.8.2 tls "!TARGET_BWX" 5938 1.1.1.1.8.2 tls { 5939 1.1.1.1.8.2 tls if (GET_CODE (operands[0]) == CONCAT || GET_CODE (operands[1]) == CONCAT) 5940 1.1.1.1.8.2 tls ; 5941 1.1.1.1.8.2 tls else if (!any_memory_operand (operands[0], CQImode)) 5942 1.1.1.1.8.2 tls { 5943 1.1.1.1.8.2 tls if (!any_memory_operand (operands[1], CQImode)) 5944 1.1.1.1.8.2 tls { 5945 1.1.1.1.8.2 tls emit_move_insn (gen_lowpart (HImode, operands[0]), 5946 1.1.1.1.8.2 tls gen_lowpart (HImode, operands[1])); 5947 1.1.1.1.8.2 tls DONE; 5948 1.1.1.1.8.2 tls } 5949 1.1.1.1.8.2 tls if (aligned_memory_operand (operands[1], CQImode)) 5950 1.1.1.1.8.2 tls { 5951 1.1.1.1.8.2 tls bool done; 5952 1.1.1.1.8.2 tls do_aligned1: 5953 1.1.1.1.8.2 tls operands[1] = gen_lowpart (HImode, operands[1]); 5954 1.1.1.1.8.2 tls do_aligned2: 5955 1.1.1.1.8.2 tls operands[0] = gen_lowpart (HImode, operands[0]); 5956 1.1.1.1.8.2 tls done = alpha_expand_mov_nobwx (HImode, operands); 5957 1.1.1.1.8.2 tls gcc_assert (done); 5958 1.1.1.1.8.2 tls DONE; 5959 1.1.1.1.8.2 tls } 5960 1.1.1.1.8.2 tls } 5961 1.1.1.1.8.2 tls else if (aligned_memory_operand (operands[0], CQImode)) 5962 1.1.1.1.8.2 tls { 5963 1.1.1.1.8.2 tls if (MEM_P (operands[1])) 5964 1.1.1.1.8.2 tls { 5965 1.1.1.1.8.2 tls rtx x = gen_reg_rtx (HImode); 5966 1.1.1.1.8.2 tls emit_move_insn (gen_lowpart (CQImode, x), operands[1]); 5967 1.1.1.1.8.2 tls operands[1] = x; 5968 1.1.1.1.8.2 tls goto do_aligned2; 5969 1.1.1.1.8.2 tls } 5970 1.1.1.1.8.2 tls goto do_aligned1; 5971 1.1.1.1.8.2 tls } 5972 1.1.1.1.8.2 tls 5973 1.1.1.1.8.2 tls gcc_assert (!reload_in_progress); 5974 1.1.1.1.8.2 tls emit_move_complex_parts (operands[0], operands[1]); 5975 1.1.1.1.8.2 tls DONE; 5976 1.1.1.1.8.2 tls }) 5977 1.1.1.1.8.2 tls 5978 1.1.1.1.8.2 tls ;; Here are the versions for reload. 5979 1.1.1.1.8.2 tls ;; 5980 1.1.1.1.8.2 tls ;; The aligned input case is recognized early in alpha_secondary_reload 5981 1.1.1.1.8.2 tls ;; in order to avoid allocating an unnecessary scratch register. 5982 1.1.1.1.8.2 tls ;; 5983 1.1.1.1.8.2 tls ;; Note that in the unaligned cases we know that the operand must not be 5984 1.1.1.1.8.2 tls ;; a pseudo-register because stack slots are always aligned references. 5985 1.1.1.1.8.2 tls 5986 1.1.1.1.8.2 tls (define_expand "reload_in<mode>" 5987 1.1.1.1.8.2 tls [(parallel [(match_operand:RELOAD12 0 "register_operand" "=r") 5988 1.1.1.1.8.2 tls (match_operand:RELOAD12 1 "any_memory_operand" "m") 5989 1.1.1.1.8.2 tls (match_operand:TI 2 "register_operand" "=&r")])] 5990 1.1.1.1.8.2 tls "!TARGET_BWX" 5991 1.1.1.1.8.2 tls { 5992 1.1.1.1.8.2 tls rtx scratch, seq, addr; 5993 1.1.1.1.8.2 tls unsigned regno = REGNO (operands[2]); 5994 1.1.1.1.8.2 tls 5995 1.1.1.1.8.2 tls /* It is possible that one of the registers we got for operands[2] 5996 1.1.1.1.8.2 tls might coincide with that of operands[0] (which is why we made 5997 1.1.1.1.8.2 tls it TImode). Pick the other one to use as our scratch. */ 5998 1.1.1.1.8.2 tls if (regno == REGNO (operands[0])) 5999 1.1.1.1.8.2 tls regno++; 6000 1.1.1.1.8.2 tls scratch = gen_rtx_REG (DImode, regno); 6001 1.1.1.1.8.2 tls 6002 1.1.1.1.8.2 tls addr = get_unaligned_address (operands[1]); 6003 1.1.1.1.8.2 tls operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); 6004 1.1.1.1.8.2 tls seq = gen_unaligned_load<reloadmode> (operands[0], addr, 6005 1.1.1.1.8.2 tls scratch, operands[0]); 6006 1.1.1.1.8.2 tls alpha_set_memflags (seq, operands[1]); 6007 1.1.1.1.8.2 tls 6008 1.1.1.1.8.2 tls emit_insn (seq); 6009 1.1.1.1.8.2 tls DONE; 6010 1.1.1.1.8.2 tls }) 6011 1.1.1.1.8.2 tls 6012 1.1.1.1.8.2 tls (define_expand "reload_out<mode>" 6013 1.1.1.1.8.2 tls [(parallel [(match_operand:RELOAD12 0 "any_memory_operand" "=m") 6014 1.1.1.1.8.2 tls (match_operand:RELOAD12 1 "register_operand" "r") 6015 1.1.1.1.8.2 tls (match_operand:TI 2 "register_operand" "=&r")])] 6016 1.1.1.1.8.2 tls "! TARGET_BWX" 6017 1.1.1.1.8.2 tls { 6018 1.1.1.1.8.2 tls unsigned regno = REGNO (operands[2]); 6019 1.1.1.1.8.2 tls 6020 1.1.1.1.8.2 tls if (<MODE>mode == CQImode) 6021 1.1.1.1.8.2 tls { 6022 1.1.1.1.8.2 tls operands[0] = gen_lowpart (HImode, operands[0]); 6023 1.1.1.1.8.2 tls operands[1] = gen_lowpart (HImode, operands[1]); 6024 1.1.1.1.8.2 tls } 6025 1.1.1.1.8.2 tls 6026 1.1.1.1.8.2 tls if (aligned_memory_operand (operands[0], <MODE>mode)) 6027 1.1.1.1.8.2 tls { 6028 1.1.1.1.8.2 tls emit_insn (gen_reload_out<reloadmode>_aligned 6029 1.1.1.1.8.2 tls (operands[0], operands[1], 6030 1.1.1.1.8.2 tls gen_rtx_REG (SImode, regno), 6031 1.1.1.1.8.2 tls gen_rtx_REG (SImode, regno + 1))); 6032 1.1.1.1.8.2 tls } 6033 1.1.1.1.8.2 tls else 6034 1.1.1.1.8.2 tls { 6035 1.1.1.1.8.2 tls rtx addr = get_unaligned_address (operands[0]); 6036 1.1.1.1.8.2 tls rtx scratch1 = gen_rtx_REG (DImode, regno); 6037 1.1.1.1.8.2 tls rtx scratch2 = gen_rtx_REG (DImode, regno + 1); 6038 1.1.1.1.8.2 tls rtx scratch3 = scratch1; 6039 1.1.1.1.8.2 tls rtx seq; 6040 1.1.1.1.8.2 tls 6041 1.1.1.1.8.2 tls if (REG_P (addr)) 6042 1.1.1.1.8.2 tls scratch1 = addr; 6043 1.1.1.1.8.2 tls 6044 1.1.1.1.8.2 tls seq = gen_unaligned_store<reloadmode> (addr, operands[1], scratch1, 6045 1.1.1.1.8.2 tls scratch2, scratch3); 6046 1.1.1.1.8.2 tls alpha_set_memflags (seq, operands[0]); 6047 1.1.1.1.8.2 tls emit_insn (seq); 6048 1.1.1.1.8.2 tls } 6049 1.1.1.1.8.2 tls DONE; 6050 1.1.1.1.8.2 tls }) 6051 1.1.1.1.8.2 tls 6052 1.1.1.1.8.2 tls ;; Helpers for the above. The way reload is structured, we can't 6053 1.1.1.1.8.2 tls ;; always get a proper address for a stack slot during reload_foo 6054 1.1.1.1.8.2 tls ;; expansion, so we must delay our address manipulations until after. 6055 1.1.1.1.8.2 tls 6056 1.1.1.1.8.2 tls (define_insn_and_split "reload_in<mode>_aligned" 6057 1.1.1.1.8.2 tls [(set (match_operand:I12MODE 0 "register_operand" "=r") 6058 1.1.1.1.8.2 tls (match_operand:I12MODE 1 "memory_operand" "m"))] 6059 1.1.1.1.8.2 tls "!TARGET_BWX && (reload_in_progress || reload_completed)" 6060 1.1.1.1.8.2 tls "#" 6061 1.1.1.1.8.2 tls "!TARGET_BWX && reload_completed" 6062 1.1.1.1.8.2 tls [(const_int 0)] 6063 1.1.1.1.8.2 tls { 6064 1.1.1.1.8.2 tls rtx aligned_mem, bitnum; 6065 1.1.1.1.8.2 tls get_aligned_mem (operands[1], &aligned_mem, &bitnum); 6066 1.1.1.1.8.2 tls emit_insn (gen_aligned_load<reloadmode> 6067 1.1.1.1.8.2 tls (gen_lowpart (DImode, operands[0]), aligned_mem, bitnum, 6068 1.1.1.1.8.2 tls gen_rtx_REG (SImode, REGNO (operands[0])))); 6069 1.1.1.1.8.2 tls DONE; 6070 1.1.1.1.8.2 tls }) 6071 1.1.1.1.8.2 tls 6072 1.1.1.1.8.2 tls (define_insn_and_split "reload_out<mode>_aligned" 6073 1.1.1.1.8.2 tls [(set (match_operand:I12MODE 0 "memory_operand" "=m") 6074 1.1.1.1.8.2 tls (match_operand:I12MODE 1 "register_operand" "r")) 6075 1.1.1.1.8.2 tls (clobber (match_operand:SI 2 "register_operand" "=r")) 6076 1.1.1.1.8.2 tls (clobber (match_operand:SI 3 "register_operand" "=r"))] 6077 1.1.1.1.8.2 tls "!TARGET_BWX && (reload_in_progress || reload_completed)" 6078 1.1.1.1.8.2 tls "#" 6079 1.1.1.1.8.2 tls "!TARGET_BWX && reload_completed" 6080 1.1.1.1.8.2 tls [(const_int 0)] 6081 1.1.1.1.8.2 tls { 6082 1.1.1.1.8.2 tls rtx aligned_mem, bitnum; 6083 1.1.1.1.8.2 tls get_aligned_mem (operands[0], &aligned_mem, &bitnum); 6084 1.1.1.1.8.2 tls emit_insn (gen_aligned_store (aligned_mem, operands[1], bitnum, 6085 1.1.1.1.8.2 tls operands[2], operands[3])); 6086 1.1.1.1.8.2 tls DONE; 6087 1.1.1.1.8.2 tls }) 6088 1.1.1.1.8.2 tls 6090 1.1.1.1.8.2 tls ;; Vector operations 6091 1.1.1.1.8.2 tls 6092 1.1.1.1.8.2 tls (define_mode_iterator VEC [V8QI V4HI V2SI]) 6093 1.1.1.1.8.2 tls 6094 1.1.1.1.8.2 tls (define_expand "mov<mode>" 6095 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "nonimmediate_operand" "") 6096 1.1.1.1.8.2 tls (match_operand:VEC 1 "general_operand" ""))] 6097 1.1.1.1.8.2 tls "" 6098 1.1.1.1.8.2 tls { 6099 1.1.1.1.8.2 tls if (alpha_expand_mov (<MODE>mode, operands)) 6100 1.1.1.1.8.2 tls DONE; 6101 1.1.1.1.8.2 tls }) 6102 1.1.1.1.8.2 tls 6103 1.1.1.1.8.2 tls (define_split 6104 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "") 6105 1.1.1.1.8.2 tls (match_operand:VEC 1 "non_zero_const_operand" ""))] 6106 1.1.1.1.8.2 tls "" 6107 1.1.1.1.8.2 tls [(const_int 0)] 6108 1.1.1.1.8.2 tls { 6109 1.1.1.1.8.2 tls if (alpha_split_const_mov (<MODE>mode, operands)) 6110 1.1.1.1.8.2 tls DONE; 6111 1.1.1.1.8.2 tls else 6112 1.1.1.1.8.2 tls FAIL; 6113 1.1.1.1.8.2 tls }) 6114 1.1.1.1.8.2 tls 6115 1.1.1.1.8.2 tls 6116 1.1.1.1.8.2 tls (define_expand "movmisalign<mode>" 6117 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "nonimmediate_operand" "") 6118 1.1.1.1.8.2 tls (match_operand:VEC 1 "general_operand" ""))] 6119 1.1.1.1.8.2 tls "" 6120 1.1.1.1.8.2 tls { 6121 1.1.1.1.8.2 tls alpha_expand_movmisalign (<MODE>mode, operands); 6122 1.1.1.1.8.2 tls DONE; 6123 1.1.1.1.8.2 tls }) 6124 1.1.1.1.8.2 tls 6125 1.1.1.1.8.2 tls (define_insn "*mov<mode>_fix" 6126 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "nonimmediate_operand" "=r,r,r,m,*f,*f,m,r,*f") 6127 1.1.1.1.8.2 tls (match_operand:VEC 1 "input_operand" "rW,i,m,rW,*fW,m,*f,*f,r"))] 6128 1.1.1.1.8.2 tls "TARGET_FIX 6129 1.1.1.1.8.2 tls && (register_operand (operands[0], <MODE>mode) 6130 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], <MODE>mode))" 6131 1.1.1.1.8.2 tls "@ 6132 1.1.1.1.8.2 tls bis $31,%r1,%0 6133 1.1.1.1.8.2 tls # 6134 1.1.1.1.8.2 tls ldq %0,%1 6135 1.1.1.1.8.2 tls stq %r1,%0 6136 1.1.1.1.8.2 tls cpys %R1,%R1,%0 6137 1.1.1.1.8.2 tls ldt %0,%1 6138 1.1.1.1.8.2 tls stt %R1,%0 6139 1.1.1.1.8.2 tls ftoit %1,%0 6140 1.1.1.1.8.2 tls itoft %1,%0" 6141 1.1.1.1.8.2 tls [(set_attr "type" "ilog,multi,ild,ist,fcpys,fld,fst,ftoi,itof")]) 6142 1.1.1.1.8.2 tls 6143 1.1.1.1.8.2 tls (define_insn "*mov<mode>_nofix" 6144 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "nonimmediate_operand" "=r,r,r,m,*f,*f,m") 6145 1.1.1.1.8.2 tls (match_operand:VEC 1 "input_operand" "rW,i,m,rW,*fW,m,*f"))] 6146 1.1.1.1.8.2 tls "! TARGET_FIX 6147 1.1.1.1.8.2 tls && (register_operand (operands[0], <MODE>mode) 6148 1.1.1.1.8.2 tls || reg_or_0_operand (operands[1], <MODE>mode))" 6149 1.1.1.1.8.2 tls "@ 6150 1.1.1.1.8.2 tls bis $31,%r1,%0 6151 1.1.1.1.8.2 tls # 6152 1.1.1.1.8.2 tls ldq %0,%1 6153 1.1.1.1.8.2 tls stq %r1,%0 6154 1.1.1.1.8.2 tls cpys %R1,%R1,%0 6155 1.1.1.1.8.2 tls ldt %0,%1 6156 1.1.1.1.8.2 tls stt %R1,%0" 6157 1.1.1.1.8.2 tls [(set_attr "type" "ilog,multi,ild,ist,fcpys,fld,fst")]) 6158 1.1.1.1.8.2 tls 6159 1.1.1.1.8.2 tls (define_insn "uminv8qi3" 6160 1.1.1.1.8.2 tls [(set (match_operand:V8QI 0 "register_operand" "=r") 6161 1.1.1.1.8.2 tls (umin:V8QI (match_operand:V8QI 1 "reg_or_0_operand" "rW") 6162 1.1.1.1.8.2 tls (match_operand:V8QI 2 "reg_or_0_operand" "rW")))] 6163 1.1.1.1.8.2 tls "TARGET_MAX" 6164 1.1.1.1.8.2 tls "minub8 %r1,%r2,%0" 6165 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6166 1.1.1.1.8.2 tls 6167 1.1.1.1.8.2 tls (define_insn "sminv8qi3" 6168 1.1.1.1.8.2 tls [(set (match_operand:V8QI 0 "register_operand" "=r") 6169 1.1.1.1.8.2 tls (smin:V8QI (match_operand:V8QI 1 "reg_or_0_operand" "rW") 6170 1.1.1.1.8.2 tls (match_operand:V8QI 2 "reg_or_0_operand" "rW")))] 6171 1.1.1.1.8.2 tls "TARGET_MAX" 6172 1.1.1.1.8.2 tls "minsb8 %r1,%r2,%0" 6173 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6174 1.1.1.1.8.2 tls 6175 1.1.1.1.8.2 tls (define_insn "uminv4hi3" 6176 1.1.1.1.8.2 tls [(set (match_operand:V4HI 0 "register_operand" "=r") 6177 1.1.1.1.8.2 tls (umin:V4HI (match_operand:V4HI 1 "reg_or_0_operand" "rW") 6178 1.1.1.1.8.2 tls (match_operand:V4HI 2 "reg_or_0_operand" "rW")))] 6179 1.1.1.1.8.2 tls "TARGET_MAX" 6180 1.1.1.1.8.2 tls "minuw4 %r1,%r2,%0" 6181 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6182 1.1.1.1.8.2 tls 6183 1.1.1.1.8.2 tls (define_insn "sminv4hi3" 6184 1.1.1.1.8.2 tls [(set (match_operand:V4HI 0 "register_operand" "=r") 6185 1.1.1.1.8.2 tls (smin:V4HI (match_operand:V4HI 1 "reg_or_0_operand" "rW") 6186 1.1.1.1.8.2 tls (match_operand:V4HI 2 "reg_or_0_operand" "rW")))] 6187 1.1.1.1.8.2 tls "TARGET_MAX" 6188 1.1.1.1.8.2 tls "minsw4 %r1,%r2,%0" 6189 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6190 1.1.1.1.8.2 tls 6191 1.1.1.1.8.2 tls (define_insn "umaxv8qi3" 6192 1.1.1.1.8.2 tls [(set (match_operand:V8QI 0 "register_operand" "=r") 6193 1.1.1.1.8.2 tls (umax:V8QI (match_operand:V8QI 1 "reg_or_0_operand" "rW") 6194 1.1.1.1.8.2 tls (match_operand:V8QI 2 "reg_or_0_operand" "rW")))] 6195 1.1.1.1.8.2 tls "TARGET_MAX" 6196 1.1.1.1.8.2 tls "maxub8 %r1,%r2,%0" 6197 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6198 1.1.1.1.8.2 tls 6199 1.1.1.1.8.2 tls (define_insn "smaxv8qi3" 6200 1.1.1.1.8.2 tls [(set (match_operand:V8QI 0 "register_operand" "=r") 6201 1.1.1.1.8.2 tls (smax:V8QI (match_operand:V8QI 1 "reg_or_0_operand" "rW") 6202 1.1.1.1.8.2 tls (match_operand:V8QI 2 "reg_or_0_operand" "rW")))] 6203 1.1.1.1.8.2 tls "TARGET_MAX" 6204 1.1.1.1.8.2 tls "maxsb8 %r1,%r2,%0" 6205 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6206 1.1.1.1.8.2 tls 6207 1.1.1.1.8.2 tls (define_insn "umaxv4hi3" 6208 1.1.1.1.8.2 tls [(set (match_operand:V4HI 0 "register_operand" "=r") 6209 1.1.1.1.8.2 tls (umax:V4HI (match_operand:V4HI 1 "reg_or_0_operand" "rW") 6210 1.1.1.1.8.2 tls (match_operand:V4HI 2 "reg_or_0_operand" "rW")))] 6211 1.1.1.1.8.2 tls "TARGET_MAX" 6212 1.1.1.1.8.2 tls "maxuw4 %r1,%r2,%0" 6213 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6214 1.1.1.1.8.2 tls 6215 1.1.1.1.8.2 tls (define_insn "smaxv4hi3" 6216 1.1.1.1.8.2 tls [(set (match_operand:V4HI 0 "register_operand" "=r") 6217 1.1.1.1.8.2 tls (smax:V4HI (match_operand:V4HI 1 "reg_or_0_operand" "rW") 6218 1.1.1.1.8.2 tls (match_operand:V4HI 2 "reg_or_0_operand" "rW")))] 6219 1.1.1.1.8.2 tls "TARGET_MAX" 6220 1.1.1.1.8.2 tls "maxsw4 %r1,%r2,%0" 6221 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 6222 1.1.1.1.8.2 tls 6223 1.1.1.1.8.2 tls (define_insn "one_cmpl<mode>2" 6224 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "=r") 6225 1.1.1.1.8.2 tls (not:VEC (match_operand:VEC 1 "register_operand" "r")))] 6226 1.1.1.1.8.2 tls "" 6227 1.1.1.1.8.2 tls "ornot $31,%1,%0" 6228 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 6229 1.1.1.1.8.2 tls 6230 1.1.1.1.8.2 tls (define_insn "and<mode>3" 6231 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "=r") 6232 1.1.1.1.8.2 tls (and:VEC (match_operand:VEC 1 "register_operand" "r") 6233 1.1.1.1.8.2 tls (match_operand:VEC 2 "register_operand" "r")))] 6234 1.1.1.1.8.2 tls "" 6235 1.1.1.1.8.2 tls "and %1,%2,%0" 6236 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 6237 1.1.1.1.8.2 tls 6238 1.1.1.1.8.2 tls (define_insn "*andnot<mode>3" 6239 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "=r") 6240 1.1.1.1.8.2 tls (and:VEC (not:VEC (match_operand:VEC 1 "register_operand" "r")) 6241 1.1.1.1.8.2 tls (match_operand:VEC 2 "register_operand" "r")))] 6242 1.1.1.1.8.2 tls "" 6243 1.1.1.1.8.2 tls "bic %2,%1,%0" 6244 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 6245 1.1.1.1.8.2 tls 6246 1.1.1.1.8.2 tls (define_insn "ior<mode>3" 6247 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "=r") 6248 1.1.1.1.8.2 tls (ior:VEC (match_operand:VEC 1 "register_operand" "r") 6249 1.1.1.1.8.2 tls (match_operand:VEC 2 "register_operand" "r")))] 6250 1.1.1.1.8.2 tls "" 6251 1.1.1.1.8.2 tls "bis %1,%2,%0" 6252 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 6253 1.1.1.1.8.2 tls 6254 1.1.1.1.8.2 tls (define_insn "*iornot<mode>3" 6255 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "=r") 6256 1.1.1.1.8.2 tls (ior:VEC (not:DI (match_operand:VEC 1 "register_operand" "r")) 6257 1.1.1.1.8.2 tls (match_operand:VEC 2 "register_operand" "r")))] 6258 1.1.1.1.8.2 tls "" 6259 1.1.1.1.8.2 tls "ornot %2,%1,%0" 6260 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 6261 1.1.1.1.8.2 tls 6262 1.1.1.1.8.2 tls (define_insn "xor<mode>3" 6263 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "=r") 6264 1.1.1.1.8.2 tls (xor:VEC (match_operand:VEC 1 "register_operand" "r") 6265 1.1.1.1.8.2 tls (match_operand:VEC 2 "register_operand" "r")))] 6266 1.1.1.1.8.2 tls "" 6267 1.1.1.1.8.2 tls "xor %1,%2,%0" 6268 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 6269 1.1.1.1.8.2 tls 6270 1.1.1.1.8.2 tls (define_insn "*xornot<mode>3" 6271 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "=r") 6272 1.1.1.1.8.2 tls (not:VEC (xor:VEC (match_operand:VEC 1 "register_operand" "r") 6273 1.1.1.1.8.2 tls (match_operand:VEC 2 "register_operand" "r"))))] 6274 1.1.1.1.8.2 tls "" 6275 1.1.1.1.8.2 tls "eqv %1,%2,%0" 6276 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 6277 1.1.1.1.8.2 tls 6278 1.1.1.1.8.2 tls (define_expand "vec_shl_<mode>" 6279 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "") 6280 1.1.1.1.8.2 tls (ashift:DI (match_operand:VEC 1 "register_operand" "") 6281 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_6bit_operand" "")))] 6282 1.1.1.1.8.2 tls "" 6283 1.1.1.1.8.2 tls { 6284 1.1.1.1.8.2 tls operands[0] = gen_lowpart (DImode, operands[0]); 6285 1.1.1.1.8.2 tls operands[1] = gen_lowpart (DImode, operands[1]); 6286 1.1.1.1.8.2 tls }) 6287 1.1.1.1.8.2 tls 6288 1.1.1.1.8.2 tls (define_expand "vec_shr_<mode>" 6289 1.1.1.1.8.2 tls [(set (match_operand:VEC 0 "register_operand" "") 6290 1.1.1.1.8.2 tls (lshiftrt:DI (match_operand:VEC 1 "register_operand" "") 6291 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_6bit_operand" "")))] 6292 1.1.1.1.8.2 tls "" 6293 1.1.1.1.8.2 tls { 6294 1.1.1.1.8.2 tls operands[0] = gen_lowpart (DImode, operands[0]); 6295 1.1.1.1.8.2 tls operands[1] = gen_lowpart (DImode, operands[1]); 6296 1.1.1.1.8.2 tls }) 6297 1.1.1.1.8.2 tls 6299 1.1.1.1.8.2 tls ;; Bit field extract patterns which use ext[wlq][lh] 6300 1.1.1.1.8.2 tls 6301 1.1.1.1.8.2 tls (define_expand "extv" 6302 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 6303 1.1.1.1.8.2 tls (sign_extract:DI (match_operand:QI 1 "memory_operand" "") 6304 1.1.1.1.8.2 tls (match_operand:DI 2 "immediate_operand" "") 6305 1.1.1.1.8.2 tls (match_operand:DI 3 "immediate_operand" "")))] 6306 1.1.1.1.8.2 tls "" 6307 1.1.1.1.8.2 tls { 6308 1.1.1.1.8.2 tls int ofs; 6309 1.1.1.1.8.2 tls 6310 1.1.1.1.8.2 tls /* We can do 16, 32 and 64 bit fields, if aligned on byte boundaries. */ 6311 1.1.1.1.8.2 tls if (INTVAL (operands[3]) % 8 != 0 6312 1.1.1.1.8.2 tls || (INTVAL (operands[2]) != 16 6313 1.1.1.1.8.2 tls && INTVAL (operands[2]) != 32 6314 1.1.1.1.8.2 tls && INTVAL (operands[2]) != 64)) 6315 1.1.1.1.8.2 tls FAIL; 6316 1.1.1.1.8.2 tls 6317 1.1.1.1.8.2 tls /* From mips.md: extract_bit_field doesn't verify that our source 6318 1.1.1.1.8.2 tls matches the predicate, so we force it to be a MEM here. */ 6319 1.1.1.1.8.2 tls if (!MEM_P (operands[1])) 6320 1.1.1.1.8.2 tls FAIL; 6321 1.1.1.1.8.2 tls 6322 1.1.1.1.8.2 tls /* The bit number is relative to the mode of operand 1 which is 6323 1.1.1.1.8.2 tls usually QImode (this might actually be a bug in expmed.c). Note 6324 1.1.1.1.8.2 tls that the bit number is negative in big-endian mode in this case. 6325 1.1.1.1.8.2 tls We have to convert that to the offset. */ 6326 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 6327 1.1.1.1.8.2 tls ofs = GET_MODE_BITSIZE (GET_MODE (operands[1])) 6328 1.1.1.1.8.2 tls - INTVAL (operands[2]) - INTVAL (operands[3]); 6329 1.1.1.1.8.2 tls else 6330 1.1.1.1.8.2 tls ofs = INTVAL (operands[3]); 6331 1.1.1.1.8.2 tls 6332 1.1.1.1.8.2 tls ofs = ofs / 8; 6333 1.1.1.1.8.2 tls 6334 1.1.1.1.8.2 tls alpha_expand_unaligned_load (operands[0], operands[1], 6335 1.1.1.1.8.2 tls INTVAL (operands[2]) / 8, 6336 1.1.1.1.8.2 tls ofs, 1); 6337 1.1.1.1.8.2 tls DONE; 6338 1.1.1.1.8.2 tls }) 6339 1.1.1.1.8.2 tls 6340 1.1.1.1.8.2 tls (define_expand "extzv" 6341 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 6342 1.1.1.1.8.2 tls (zero_extract:DI (match_operand:DI 1 "nonimmediate_operand" "") 6343 1.1.1.1.8.2 tls (match_operand:DI 2 "immediate_operand" "") 6344 1.1.1.1.8.2 tls (match_operand:DI 3 "immediate_operand" "")))] 6345 1.1.1.1.8.2 tls "" 6346 1.1.1.1.8.2 tls { 6347 1.1.1.1.8.2 tls /* We can do 8, 16, 32 and 64 bit fields, if aligned on byte boundaries. */ 6348 1.1.1.1.8.2 tls if (INTVAL (operands[3]) % 8 != 0 6349 1.1.1.1.8.2 tls || (INTVAL (operands[2]) != 8 6350 1.1.1.1.8.2 tls && INTVAL (operands[2]) != 16 6351 1.1.1.1.8.2 tls && INTVAL (operands[2]) != 32 6352 1.1.1.1.8.2 tls && INTVAL (operands[2]) != 64)) 6353 1.1.1.1.8.2 tls FAIL; 6354 1.1.1.1.8.2 tls 6355 1.1.1.1.8.2 tls if (MEM_P (operands[1])) 6356 1.1.1.1.8.2 tls { 6357 1.1.1.1.8.2 tls int ofs; 6358 1.1.1.1.8.2 tls 6359 1.1.1.1.8.2 tls /* Fail 8-bit fields, falling back on a simple byte load. */ 6360 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 8) 6361 1.1.1.1.8.2 tls FAIL; 6362 1.1.1.1.8.2 tls 6363 1.1.1.1.8.2 tls /* The bit number is relative to the mode of operand 1 which is 6364 1.1.1.1.8.2 tls usually QImode (this might actually be a bug in expmed.c). Note 6365 1.1.1.1.8.2 tls that the bit number is negative in big-endian mode in this case. 6366 1.1.1.1.8.2 tls We have to convert that to the offset. */ 6367 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 6368 1.1.1.1.8.2 tls ofs = GET_MODE_BITSIZE (GET_MODE (operands[1])) 6369 1.1.1.1.8.2 tls - INTVAL (operands[2]) - INTVAL (operands[3]); 6370 1.1.1.1.8.2 tls else 6371 1.1.1.1.8.2 tls ofs = INTVAL (operands[3]); 6372 1.1.1.1.8.2 tls 6373 1.1.1.1.8.2 tls ofs = ofs / 8; 6374 1.1.1.1.8.2 tls 6375 1.1.1.1.8.2 tls alpha_expand_unaligned_load (operands[0], operands[1], 6376 1.1.1.1.8.2 tls INTVAL (operands[2]) / 8, 6377 1.1.1.1.8.2 tls ofs, 0); 6378 1.1.1.1.8.2 tls DONE; 6379 1.1.1.1.8.2 tls } 6380 1.1.1.1.8.2 tls }) 6381 1.1.1.1.8.2 tls 6382 1.1.1.1.8.2 tls (define_expand "insv" 6383 1.1.1.1.8.2 tls [(set (zero_extract:DI (match_operand:QI 0 "memory_operand" "") 6384 1.1.1.1.8.2 tls (match_operand:DI 1 "immediate_operand" "") 6385 1.1.1.1.8.2 tls (match_operand:DI 2 "immediate_operand" "")) 6386 1.1.1.1.8.2 tls (match_operand:DI 3 "register_operand" ""))] 6387 1.1.1.1.8.2 tls "" 6388 1.1.1.1.8.2 tls { 6389 1.1.1.1.8.2 tls int ofs; 6390 1.1.1.1.8.2 tls 6391 1.1.1.1.8.2 tls /* We can do 16, 32 and 64 bit fields, if aligned on byte boundaries. */ 6392 1.1.1.1.8.2 tls if (INTVAL (operands[2]) % 8 != 0 6393 1.1.1.1.8.2 tls || (INTVAL (operands[1]) != 16 6394 1.1.1.1.8.2 tls && INTVAL (operands[1]) != 32 6395 1.1.1.1.8.2 tls && INTVAL (operands[1]) != 64)) 6396 1.1.1.1.8.2 tls FAIL; 6397 1.1.1.1.8.2 tls 6398 1.1.1.1.8.2 tls /* From mips.md: store_bit_field doesn't verify that our source 6399 1.1.1.1.8.2 tls matches the predicate, so we force it to be a MEM here. */ 6400 1.1.1.1.8.2 tls if (!MEM_P (operands[0])) 6401 1.1.1.1.8.2 tls FAIL; 6402 1.1.1.1.8.2 tls 6403 1.1.1.1.8.2 tls /* The bit number is relative to the mode of operand 1 which is 6404 1.1.1.1.8.2 tls usually QImode (this might actually be a bug in expmed.c). Note 6405 1.1.1.1.8.2 tls that the bit number is negative in big-endian mode in this case. 6406 1.1.1.1.8.2 tls We have to convert that to the offset. */ 6407 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 6408 1.1.1.1.8.2 tls ofs = GET_MODE_BITSIZE (GET_MODE (operands[0])) 6409 1.1.1.1.8.2 tls - INTVAL (operands[1]) - INTVAL (operands[2]); 6410 1.1.1.1.8.2 tls else 6411 1.1.1.1.8.2 tls ofs = INTVAL (operands[2]); 6412 1.1.1.1.8.2 tls 6413 1.1.1.1.8.2 tls ofs = ofs / 8; 6414 1.1.1.1.8.2 tls 6415 1.1.1.1.8.2 tls alpha_expand_unaligned_store (operands[0], operands[3], 6416 1.1.1.1.8.2 tls INTVAL (operands[1]) / 8, ofs); 6417 1.1.1.1.8.2 tls DONE; 6418 1.1.1.1.8.2 tls }) 6419 1.1.1.1.8.2 tls 6420 1.1.1.1.8.2 tls ;; Block move/clear, see alpha.c for more details. 6421 1.1.1.1.8.2 tls ;; Argument 0 is the destination 6422 1.1.1.1.8.2 tls ;; Argument 1 is the source 6423 1.1.1.1.8.2 tls ;; Argument 2 is the length 6424 1.1.1.1.8.2 tls ;; Argument 3 is the alignment 6425 1.1.1.1.8.2 tls 6426 1.1.1.1.8.2 tls (define_expand "movmemqi" 6427 1.1.1.1.8.2 tls [(parallel [(set (match_operand:BLK 0 "memory_operand" "") 6428 1.1.1.1.8.2 tls (match_operand:BLK 1 "memory_operand" "")) 6429 1.1.1.1.8.2 tls (use (match_operand:DI 2 "immediate_operand" "")) 6430 1.1.1.1.8.2 tls (use (match_operand:DI 3 "immediate_operand" ""))])] 6431 1.1.1.1.8.2 tls "" 6432 1.1.1.1.8.2 tls { 6433 1.1.1.1.8.2 tls if (alpha_expand_block_move (operands)) 6434 1.1.1.1.8.2 tls DONE; 6435 1.1.1.1.8.2 tls else 6436 1.1.1.1.8.2 tls FAIL; 6437 1.1.1.1.8.2 tls }) 6438 1.1.1.1.8.2 tls 6439 1.1.1.1.8.2 tls (define_expand "movmemdi" 6440 1.1.1.1.8.2 tls [(parallel [(set (match_operand:BLK 0 "memory_operand" "") 6441 1.1.1.1.8.2 tls (match_operand:BLK 1 "memory_operand" "")) 6442 1.1.1.1.8.2 tls (use (match_operand:DI 2 "immediate_operand" "")) 6443 1.1.1.1.8.2 tls (use (match_operand:DI 3 "immediate_operand" "")) 6444 1.1.1.1.8.2 tls (use (match_dup 4)) 6445 1.1.1.1.8.2 tls (clobber (reg:DI 25)) 6446 1.1.1.1.8.2 tls (clobber (reg:DI 16)) 6447 1.1.1.1.8.2 tls (clobber (reg:DI 17)) 6448 1.1.1.1.8.2 tls (clobber (reg:DI 18)) 6449 1.1.1.1.8.2 tls (clobber (reg:DI 19)) 6450 1.1.1.1.8.2 tls (clobber (reg:DI 20)) 6451 1.1.1.1.8.2 tls (clobber (reg:DI 26)) 6452 1.1.1.1.8.2 tls (clobber (reg:DI 27))])] 6453 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 6454 1.1.1.1.8.2 tls { 6455 1.1.1.1.8.2 tls operands[4] = alpha_need_linkage ("OTS$MOVE", 0); 6456 1.1.1.1.8.2 tls }) 6457 1.1.1.1.8.2 tls 6458 1.1.1.1.8.2 tls (define_insn "*movmemdi_1" 6459 1.1.1.1.8.2 tls [(set (match_operand:BLK 0 "memory_operand" "=m,=m") 6460 1.1.1.1.8.2 tls (match_operand:BLK 1 "memory_operand" "m,m")) 6461 1.1.1.1.8.2 tls (use (match_operand:DI 2 "nonmemory_operand" "r,i")) 6462 1.1.1.1.8.2 tls (use (match_operand:DI 3 "immediate_operand" "")) 6463 1.1.1.1.8.2 tls (use (match_operand:DI 4 "call_operand" "i,i")) 6464 1.1.1.1.8.2 tls (clobber (reg:DI 25)) 6465 1.1.1.1.8.2 tls (clobber (reg:DI 16)) 6466 1.1.1.1.8.2 tls (clobber (reg:DI 17)) 6467 1.1.1.1.8.2 tls (clobber (reg:DI 18)) 6468 1.1.1.1.8.2 tls (clobber (reg:DI 19)) 6469 1.1.1.1.8.2 tls (clobber (reg:DI 20)) 6470 1.1.1.1.8.2 tls (clobber (reg:DI 26)) 6471 1.1.1.1.8.2 tls (clobber (reg:DI 27))] 6472 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 6473 1.1.1.1.8.2 tls { 6474 1.1.1.1.8.2 tls operands [5] = alpha_use_linkage (operands [4], cfun->decl, 0, 1); 6475 1.1.1.1.8.2 tls switch (which_alternative) 6476 1.1.1.1.8.2 tls { 6477 1.1.1.1.8.2 tls case 0: 6478 1.1.1.1.8.2 tls return "lda $16,%0\;bis $31,%2,$17\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; 6479 1.1.1.1.8.2 tls case 1: 6480 1.1.1.1.8.2 tls return "lda $16,%0\;lda $17,%2($31)\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; 6481 1.1.1.1.8.2 tls default: 6482 1.1.1.1.8.2 tls gcc_unreachable (); 6483 1.1.1.1.8.2 tls } 6484 1.1.1.1.8.2 tls } 6485 1.1.1.1.8.2 tls [(set_attr "type" "multi") 6486 1.1.1.1.8.2 tls (set_attr "length" "28")]) 6487 1.1.1.1.8.2 tls 6488 1.1.1.1.8.2 tls (define_expand "setmemqi" 6489 1.1.1.1.8.2 tls [(parallel [(set (match_operand:BLK 0 "memory_operand" "") 6490 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")) 6491 1.1.1.1.8.2 tls (use (match_operand:DI 1 "immediate_operand" "")) 6492 1.1.1.1.8.2 tls (use (match_operand:DI 3 "immediate_operand" ""))])] 6493 1.1.1.1.8.2 tls "" 6494 1.1.1.1.8.2 tls { 6495 1.1.1.1.8.2 tls /* If value to set is not zero, use the library routine. */ 6496 1.1.1.1.8.2 tls if (operands[2] != const0_rtx) 6497 1.1.1.1.8.2 tls FAIL; 6498 1.1.1.1.8.2 tls 6499 1.1.1.1.8.2 tls if (alpha_expand_block_clear (operands)) 6500 1.1.1.1.8.2 tls DONE; 6501 1.1.1.1.8.2 tls else 6502 1.1.1.1.8.2 tls FAIL; 6503 1.1.1.1.8.2 tls }) 6504 1.1.1.1.8.2 tls 6505 1.1.1.1.8.2 tls (define_expand "setmemdi" 6506 1.1.1.1.8.2 tls [(parallel [(set (match_operand:BLK 0 "memory_operand" "") 6507 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")) 6508 1.1.1.1.8.2 tls (use (match_operand:DI 1 "immediate_operand" "")) 6509 1.1.1.1.8.2 tls (use (match_operand:DI 3 "immediate_operand" "")) 6510 1.1.1.1.8.2 tls (use (match_dup 4)) 6511 1.1.1.1.8.2 tls (clobber (reg:DI 25)) 6512 1.1.1.1.8.2 tls (clobber (reg:DI 16)) 6513 1.1.1.1.8.2 tls (clobber (reg:DI 17)) 6514 1.1.1.1.8.2 tls (clobber (reg:DI 26)) 6515 1.1.1.1.8.2 tls (clobber (reg:DI 27))])] 6516 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 6517 1.1.1.1.8.2 tls { 6518 1.1.1.1.8.2 tls /* If value to set is not zero, use the library routine. */ 6519 1.1.1.1.8.2 tls if (operands[2] != const0_rtx) 6520 1.1.1.1.8.2 tls FAIL; 6521 1.1.1.1.8.2 tls 6522 1.1.1.1.8.2 tls operands[4] = alpha_need_linkage ("OTS$ZERO", 0); 6523 1.1.1.1.8.2 tls }) 6524 1.1.1.1.8.2 tls 6525 1.1.1.1.8.2 tls (define_insn "*clrmemdi_1" 6526 1.1.1.1.8.2 tls [(set (match_operand:BLK 0 "memory_operand" "=m,=m") 6527 1.1.1.1.8.2 tls (const_int 0)) 6528 1.1.1.1.8.2 tls (use (match_operand:DI 1 "nonmemory_operand" "r,i")) 6529 1.1.1.1.8.2 tls (use (match_operand:DI 2 "immediate_operand" "")) 6530 1.1.1.1.8.2 tls (use (match_operand:DI 3 "call_operand" "i,i")) 6531 1.1.1.1.8.2 tls (clobber (reg:DI 25)) 6532 1.1.1.1.8.2 tls (clobber (reg:DI 16)) 6533 1.1.1.1.8.2 tls (clobber (reg:DI 17)) 6534 1.1.1.1.8.2 tls (clobber (reg:DI 26)) 6535 1.1.1.1.8.2 tls (clobber (reg:DI 27))] 6536 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 6537 1.1.1.1.8.2 tls { 6538 1.1.1.1.8.2 tls operands [4] = alpha_use_linkage (operands [3], cfun->decl, 0, 1); 6539 1.1.1.1.8.2 tls switch (which_alternative) 6540 1.1.1.1.8.2 tls { 6541 1.1.1.1.8.2 tls case 0: 6542 1.1.1.1.8.2 tls return "lda $16,%0\;bis $31,%1,$17\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; 6543 1.1.1.1.8.2 tls case 1: 6544 1.1.1.1.8.2 tls return "lda $16,%0\;lda $17,%1($31)\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; 6545 1.1.1.1.8.2 tls default: 6546 1.1.1.1.8.2 tls gcc_unreachable (); 6547 1.1.1.1.8.2 tls } 6548 1.1.1.1.8.2 tls } 6549 1.1.1.1.8.2 tls [(set_attr "type" "multi") 6550 1.1.1.1.8.2 tls (set_attr "length" "24")]) 6551 1.1.1.1.8.2 tls 6552 1.1.1.1.8.2 tls 6554 1.1.1.1.8.2 tls ;; Subroutine of stack space allocation. Perform a stack probe. 6555 1.1.1.1.8.2 tls (define_expand "probe_stack" 6556 1.1.1.1.8.2 tls [(set (match_dup 1) (match_operand:DI 0 "const_int_operand" ""))] 6557 1.1.1.1.8.2 tls "" 6558 1.1.1.1.8.2 tls { 6559 1.1.1.1.8.2 tls operands[1] = gen_rtx_MEM (DImode, plus_constant (stack_pointer_rtx, 6560 1.1.1.1.8.2 tls INTVAL (operands[0]))); 6561 1.1.1.1.8.2 tls MEM_VOLATILE_P (operands[1]) = 1; 6562 1.1.1.1.8.2 tls 6563 1.1.1.1.8.2 tls operands[0] = const0_rtx; 6564 1.1.1.1.8.2 tls }) 6565 1.1.1.1.8.2 tls 6566 1.1.1.1.8.2 tls ;; This is how we allocate stack space. If we are allocating a 6567 1.1.1.1.8.2 tls ;; constant amount of space and we know it is less than 4096 6568 1.1.1.1.8.2 tls ;; bytes, we need do nothing. 6569 1.1.1.1.8.2 tls ;; 6570 1.1.1.1.8.2 tls ;; If it is more than 4096 bytes, we need to probe the stack 6571 1.1.1.1.8.2 tls ;; periodically. 6572 1.1.1.1.8.2 tls (define_expand "allocate_stack" 6573 1.1.1.1.8.2 tls [(set (reg:DI 30) 6574 1.1.1.1.8.2 tls (plus:DI (reg:DI 30) 6575 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_cint_operand" ""))) 6576 1.1.1.1.8.2 tls (set (match_operand:DI 0 "register_operand" "=r") 6577 1.1.1.1.8.2 tls (match_dup 2))] 6578 1.1.1.1.8.2 tls "" 6579 1.1.1.1.8.2 tls { 6580 1.1.1.1.8.2 tls if (CONST_INT_P (operands[1]) 6581 1.1.1.1.8.2 tls && INTVAL (operands[1]) < 32768) 6582 1.1.1.1.8.2 tls { 6583 1.1.1.1.8.2 tls if (INTVAL (operands[1]) >= 4096) 6584 1.1.1.1.8.2 tls { 6585 1.1.1.1.8.2 tls /* We do this the same way as in the prologue and generate explicit 6586 1.1.1.1.8.2 tls probes. Then we update the stack by the constant. */ 6587 1.1.1.1.8.2 tls 6588 1.1.1.1.8.2 tls int probed = 4096; 6589 1.1.1.1.8.2 tls 6590 1.1.1.1.8.2 tls emit_insn (gen_probe_stack (GEN_INT (- probed))); 6591 1.1.1.1.8.2 tls while (probed + 8192 < INTVAL (operands[1])) 6592 1.1.1.1.8.2 tls emit_insn (gen_probe_stack (GEN_INT (- (probed += 8192)))); 6593 1.1.1.1.8.2 tls 6594 1.1.1.1.8.2 tls if (probed + 4096 < INTVAL (operands[1])) 6595 1.1.1.1.8.2 tls emit_insn (gen_probe_stack (GEN_INT (- INTVAL(operands[1])))); 6596 1.1.1.1.8.2 tls } 6597 1.1.1.1.8.2 tls 6598 1.1.1.1.8.2 tls operands[1] = GEN_INT (- INTVAL (operands[1])); 6599 1.1.1.1.8.2 tls operands[2] = virtual_stack_dynamic_rtx; 6600 1.1.1.1.8.2 tls } 6601 1.1.1.1.8.2 tls else 6602 1.1.1.1.8.2 tls { 6603 1.1.1.1.8.2 tls rtx out_label = 0; 6604 1.1.1.1.8.2 tls rtx loop_label = gen_label_rtx (); 6605 1.1.1.1.8.2 tls rtx want = gen_reg_rtx (Pmode); 6606 1.1.1.1.8.2 tls rtx tmp = gen_reg_rtx (Pmode); 6607 1.1.1.1.8.2 tls rtx memref, test; 6608 1.1.1.1.8.2 tls 6609 1.1.1.1.8.2 tls emit_insn (gen_subdi3 (want, stack_pointer_rtx, 6610 1.1.1.1.8.2 tls force_reg (Pmode, operands[1]))); 6611 1.1.1.1.8.2 tls emit_insn (gen_adddi3 (tmp, stack_pointer_rtx, GEN_INT (-4096))); 6612 1.1.1.1.8.2 tls 6613 1.1.1.1.8.2 tls if (!CONST_INT_P (operands[1])) 6614 1.1.1.1.8.2 tls { 6615 1.1.1.1.8.2 tls out_label = gen_label_rtx (); 6616 1.1.1.1.8.2 tls test = gen_rtx_GEU (VOIDmode, want, tmp); 6617 1.1.1.1.8.2 tls emit_jump_insn (gen_cbranchdi4 (test, want, tmp, out_label)); 6618 1.1.1.1.8.2 tls } 6619 1.1.1.1.8.2 tls 6620 1.1.1.1.8.2 tls emit_label (loop_label); 6621 1.1.1.1.8.2 tls memref = gen_rtx_MEM (DImode, tmp); 6622 1.1.1.1.8.2 tls MEM_VOLATILE_P (memref) = 1; 6623 1.1.1.1.8.2 tls emit_move_insn (memref, const0_rtx); 6624 1.1.1.1.8.2 tls emit_insn (gen_adddi3 (tmp, tmp, GEN_INT(-8192))); 6625 1.1.1.1.8.2 tls test = gen_rtx_GTU (VOIDmode, tmp, want); 6626 1.1.1.1.8.2 tls emit_jump_insn (gen_cbranchdi4 (test, tmp, want, loop_label)); 6627 1.1.1.1.8.2 tls 6628 1.1.1.1.8.2 tls memref = gen_rtx_MEM (DImode, want); 6629 1.1.1.1.8.2 tls MEM_VOLATILE_P (memref) = 1; 6630 1.1.1.1.8.2 tls emit_move_insn (memref, const0_rtx); 6631 1.1.1.1.8.2 tls 6632 1.1.1.1.8.2 tls if (out_label) 6633 1.1.1.1.8.2 tls emit_label (out_label); 6634 1.1.1.1.8.2 tls 6635 1.1.1.1.8.2 tls emit_move_insn (stack_pointer_rtx, want); 6636 1.1.1.1.8.2 tls emit_move_insn (operands[0], virtual_stack_dynamic_rtx); 6637 1.1.1.1.8.2 tls DONE; 6638 1.1.1.1.8.2 tls } 6639 1.1.1.1.8.2 tls }) 6640 1.1.1.1.8.2 tls 6641 1.1.1.1.8.2 tls ;; This is used by alpha_expand_prolog to do the same thing as above, 6642 1.1.1.1.8.2 tls ;; except we cannot at that time generate new basic blocks, so we hide 6643 1.1.1.1.8.2 tls ;; the loop in this one insn. 6644 1.1.1.1.8.2 tls 6645 1.1.1.1.8.2 tls (define_insn "prologue_stack_probe_loop" 6646 1.1.1.1.8.2 tls [(unspec_volatile [(match_operand:DI 0 "register_operand" "r") 6647 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "r")] 6648 1.1.1.1.8.2 tls UNSPECV_PSPL)] 6649 1.1.1.1.8.2 tls "" 6650 1.1.1.1.8.2 tls { 6651 1.1.1.1.8.2 tls operands[2] = gen_label_rtx (); 6652 1.1.1.1.8.2 tls (*targetm.asm_out.internal_label) (asm_out_file, "L", 6653 1.1.1.1.8.2 tls CODE_LABEL_NUMBER (operands[2])); 6654 1.1.1.1.8.2 tls 6655 1.1.1.1.8.2 tls return "stq $31,-8192(%1)\;subq %0,1,%0\;lda %1,-8192(%1)\;bne %0,%l2"; 6656 1.1.1.1.8.2 tls } 6657 1.1.1.1.8.2 tls [(set_attr "length" "16") 6658 1.1.1.1.8.2 tls (set_attr "type" "multi")]) 6659 1.1.1.1.8.2 tls 6660 1.1.1.1.8.2 tls (define_expand "prologue" 6661 1.1.1.1.8.2 tls [(clobber (const_int 0))] 6662 1.1.1.1.8.2 tls "" 6663 1.1.1.1.8.2 tls { 6664 1.1.1.1.8.2 tls alpha_expand_prologue (); 6665 1.1.1.1.8.2 tls DONE; 6666 1.1.1.1.8.2 tls }) 6667 1.1.1.1.8.2 tls 6668 1.1.1.1.8.2 tls ;; These take care of emitting the ldgp insn in the prologue. This will be 6669 1.1.1.1.8.2 tls ;; an lda/ldah pair and we want to align them properly. So we have two 6670 1.1.1.1.8.2 tls ;; unspec_volatile insns, the first of which emits the ldgp assembler macro 6671 1.1.1.1.8.2 tls ;; and the second of which emits nothing. However, both are marked as type 6672 1.1.1.1.8.2 tls ;; IADD (the default) so the alignment code in alpha.c does the right thing 6673 1.1.1.1.8.2 tls ;; with them. 6674 1.1.1.1.8.2 tls 6675 1.1.1.1.8.2 tls (define_expand "prologue_ldgp" 6676 1.1.1.1.8.2 tls [(set (match_dup 0) 6677 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_dup 1) (match_dup 2)] UNSPECV_LDGP1)) 6678 1.1.1.1.8.2 tls (set (match_dup 0) 6679 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_dup 0) (match_dup 2)] UNSPECV_PLDGP2))] 6680 1.1.1.1.8.2 tls "" 6681 1.1.1.1.8.2 tls { 6682 1.1.1.1.8.2 tls operands[0] = pic_offset_table_rtx; 6683 1.1.1.1.8.2 tls operands[1] = gen_rtx_REG (Pmode, 27); 6684 1.1.1.1.8.2 tls operands[2] = (TARGET_EXPLICIT_RELOCS 6685 1.1.1.1.8.2 tls ? GEN_INT (alpha_next_sequence_number++) 6686 1.1.1.1.8.2 tls : const0_rtx); 6687 1.1.1.1.8.2 tls }) 6688 1.1.1.1.8.2 tls 6689 1.1.1.1.8.2 tls (define_insn "*ldgp_er_1" 6690 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 6691 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_operand:DI 1 "register_operand" "r") 6692 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")] 6693 1.1.1.1.8.2 tls UNSPECV_LDGP1))] 6694 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 6695 1.1.1.1.8.2 tls "ldah %0,0(%1)\t\t!gpdisp!%2" 6696 1.1.1.1.8.2 tls [(set_attr "cannot_copy" "true")]) 6697 1.1.1.1.8.2 tls 6698 1.1.1.1.8.2 tls (define_insn "*ldgp_er_2" 6699 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 6700 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "register_operand" "r") 6701 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")] 6702 1.1.1.1.8.2 tls UNSPEC_LDGP2))] 6703 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 6704 1.1.1.1.8.2 tls "lda %0,0(%1)\t\t!gpdisp!%2" 6705 1.1.1.1.8.2 tls [(set_attr "cannot_copy" "true")]) 6706 1.1.1.1.8.2 tls 6707 1.1.1.1.8.2 tls (define_insn "*prologue_ldgp_er_2" 6708 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 6709 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_operand:DI 1 "register_operand" "r") 6710 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")] 6711 1.1.1.1.8.2 tls UNSPECV_PLDGP2))] 6712 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 6713 1.1.1.1.8.2 tls "lda %0,0(%1)\t\t!gpdisp!%2\n$%~..ng:" 6714 1.1.1.1.8.2 tls [(set_attr "cannot_copy" "true")]) 6715 1.1.1.1.8.2 tls 6716 1.1.1.1.8.2 tls (define_insn "*prologue_ldgp_1" 6717 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 6718 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_operand:DI 1 "register_operand" "r") 6719 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")] 6720 1.1.1.1.8.2 tls UNSPECV_LDGP1))] 6721 1.1.1.1.8.2 tls "" 6722 1.1.1.1.8.2 tls "ldgp %0,0(%1)\n$%~..ng:" 6723 1.1.1.1.8.2 tls [(set_attr "cannot_copy" "true")]) 6724 1.1.1.1.8.2 tls 6725 1.1.1.1.8.2 tls (define_insn "*prologue_ldgp_2" 6726 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 6727 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_operand:DI 1 "register_operand" "r") 6728 1.1.1.1.8.2 tls (match_operand 2 "const_int_operand" "")] 6729 1.1.1.1.8.2 tls UNSPECV_PLDGP2))] 6730 1.1.1.1.8.2 tls "" 6731 1.1.1.1.8.2 tls "") 6732 1.1.1.1.8.2 tls 6733 1.1.1.1.8.2 tls ;; The _mcount profiling hook has special calling conventions, and 6734 1.1.1.1.8.2 tls ;; does not clobber all the registers that a normal call would. So 6735 1.1.1.1.8.2 tls ;; hide the fact this is a call at all. 6736 1.1.1.1.8.2 tls 6737 1.1.1.1.8.2 tls (define_insn "prologue_mcount" 6738 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] UNSPECV_MCOUNT)] 6739 1.1.1.1.8.2 tls "" 6740 1.1.1.1.8.2 tls { 6741 1.1.1.1.8.2 tls if (TARGET_EXPLICIT_RELOCS) 6742 1.1.1.1.8.2 tls /* Note that we cannot use a lituse_jsr reloc, since _mcount 6743 1.1.1.1.8.2 tls cannot be called via the PLT. */ 6744 1.1.1.1.8.2 tls return "ldq $28,_mcount($29)\t\t!literal\;jsr $28,($28),_mcount"; 6745 1.1.1.1.8.2 tls else 6746 1.1.1.1.8.2 tls return "lda $28,_mcount\;jsr $28,($28),_mcount"; 6747 1.1.1.1.8.2 tls } 6748 1.1.1.1.8.2 tls [(set_attr "type" "multi") 6749 1.1.1.1.8.2 tls (set_attr "length" "8")]) 6750 1.1.1.1.8.2 tls 6751 1.1.1.1.8.2 tls (define_insn "init_fp" 6752 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 6753 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "r")) 6754 1.1.1.1.8.2 tls (clobber (mem:BLK (match_operand:DI 2 "register_operand" "=r")))] 6755 1.1.1.1.8.2 tls "" 6756 1.1.1.1.8.2 tls "bis $31,%1,%0") 6757 1.1.1.1.8.2 tls 6758 1.1.1.1.8.2 tls (define_expand "epilogue" 6759 1.1.1.1.8.2 tls [(return)] 6760 1.1.1.1.8.2 tls "" 6761 1.1.1.1.8.2 tls { 6762 1.1.1.1.8.2 tls alpha_expand_epilogue (); 6763 1.1.1.1.8.2 tls }) 6764 1.1.1.1.8.2 tls 6765 1.1.1.1.8.2 tls (define_expand "sibcall_epilogue" 6766 1.1.1.1.8.2 tls [(return)] 6767 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 6768 1.1.1.1.8.2 tls { 6769 1.1.1.1.8.2 tls alpha_expand_epilogue (); 6770 1.1.1.1.8.2 tls DONE; 6771 1.1.1.1.8.2 tls }) 6772 1.1.1.1.8.2 tls 6773 1.1.1.1.8.2 tls (define_expand "builtin_longjmp" 6774 1.1.1.1.8.2 tls [(use (match_operand:DI 0 "register_operand" "r"))] 6775 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 6776 1.1.1.1.8.2 tls { 6777 1.1.1.1.8.2 tls /* The elements of the buffer are, in order: */ 6778 1.1.1.1.8.2 tls rtx fp = gen_rtx_MEM (Pmode, operands[0]); 6779 1.1.1.1.8.2 tls rtx lab = gen_rtx_MEM (Pmode, plus_constant (operands[0], 8)); 6780 1.1.1.1.8.2 tls rtx stack = gen_rtx_MEM (Pmode, plus_constant (operands[0], 16)); 6781 1.1.1.1.8.2 tls rtx pv = gen_rtx_REG (Pmode, 27); 6782 1.1.1.1.8.2 tls 6783 1.1.1.1.8.2 tls /* This bit is the same as expand_builtin_longjmp. */ 6784 1.1.1.1.8.2 tls emit_move_insn (hard_frame_pointer_rtx, fp); 6785 1.1.1.1.8.2 tls emit_move_insn (pv, lab); 6786 1.1.1.1.8.2 tls emit_stack_restore (SAVE_NONLOCAL, stack, NULL_RTX); 6787 1.1.1.1.8.2 tls emit_use (hard_frame_pointer_rtx); 6788 1.1.1.1.8.2 tls emit_use (stack_pointer_rtx); 6789 1.1.1.1.8.2 tls 6790 1.1.1.1.8.2 tls /* Load the label we are jumping through into $27 so that we know 6791 1.1.1.1.8.2 tls where to look for it when we get back to setjmp's function for 6792 1.1.1.1.8.2 tls restoring the gp. */ 6793 1.1.1.1.8.2 tls emit_jump_insn (gen_builtin_longjmp_internal (pv)); 6794 1.1.1.1.8.2 tls emit_barrier (); 6795 1.1.1.1.8.2 tls DONE; 6796 1.1.1.1.8.2 tls }) 6797 1.1.1.1.8.2 tls 6798 1.1.1.1.8.2 tls ;; This is effectively a copy of indirect_jump, but constrained such 6799 1.1.1.1.8.2 tls ;; that register renaming cannot foil our cunning plan with $27. 6800 1.1.1.1.8.2 tls (define_insn "builtin_longjmp_internal" 6801 1.1.1.1.8.2 tls [(set (pc) 6802 1.1.1.1.8.2 tls (unspec_volatile [(match_operand:DI 0 "register_operand" "c")] 6803 1.1.1.1.8.2 tls UNSPECV_LONGJMP))] 6804 1.1.1.1.8.2 tls "" 6805 1.1.1.1.8.2 tls "jmp $31,(%0),0" 6806 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 6807 1.1.1.1.8.2 tls 6808 1.1.1.1.8.2 tls (define_expand "builtin_setjmp_receiver" 6809 1.1.1.1.8.2 tls [(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)] 6810 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 6811 1.1.1.1.8.2 tls "") 6812 1.1.1.1.8.2 tls 6813 1.1.1.1.8.2 tls (define_insn_and_split "*builtin_setjmp_receiver_1" 6814 1.1.1.1.8.2 tls [(unspec_volatile [(match_operand 0 "" "")] UNSPECV_SETJMPR)] 6815 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 6816 1.1.1.1.8.2 tls { 6817 1.1.1.1.8.2 tls if (TARGET_EXPLICIT_RELOCS) 6818 1.1.1.1.8.2 tls return "#"; 6819 1.1.1.1.8.2 tls else 6820 1.1.1.1.8.2 tls return "br $27,$LSJ%=\n$LSJ%=:\;ldgp $29,0($27)"; 6821 1.1.1.1.8.2 tls } 6822 1.1.1.1.8.2 tls "&& TARGET_EXPLICIT_RELOCS && reload_completed" 6823 1.1.1.1.8.2 tls [(set (match_dup 1) 6824 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_dup 2) (match_dup 3)] UNSPECV_LDGP1)) 6825 1.1.1.1.8.2 tls (set (match_dup 1) 6826 1.1.1.1.8.2 tls (unspec:DI [(match_dup 1) (match_dup 3)] UNSPEC_LDGP2))] 6827 1.1.1.1.8.2 tls { 6828 1.1.1.1.8.2 tls if (prev_nonnote_insn (curr_insn) != XEXP (operands[0], 0)) 6829 1.1.1.1.8.2 tls emit_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode, gen_rtvec (1, operands[0]), 6830 1.1.1.1.8.2 tls UNSPECV_SETJMPR_ER)); 6831 1.1.1.1.8.2 tls operands[1] = pic_offset_table_rtx; 6832 1.1.1.1.8.2 tls operands[2] = gen_rtx_REG (Pmode, 27); 6833 1.1.1.1.8.2 tls operands[3] = GEN_INT (alpha_next_sequence_number++); 6834 1.1.1.1.8.2 tls } 6835 1.1.1.1.8.2 tls [(set_attr "length" "12") 6836 1.1.1.1.8.2 tls (set_attr "type" "multi")]) 6837 1.1.1.1.8.2 tls 6838 1.1.1.1.8.2 tls (define_insn "*builtin_setjmp_receiver_er_sl_1" 6839 1.1.1.1.8.2 tls [(unspec_volatile [(match_operand 0 "" "")] UNSPECV_SETJMPR_ER)] 6840 1.1.1.1.8.2 tls "TARGET_ABI_OSF && TARGET_EXPLICIT_RELOCS && TARGET_AS_CAN_SUBTRACT_LABELS" 6841 1.1.1.1.8.2 tls "lda $27,$LSJ%=-%l0($27)\n$LSJ%=:") 6842 1.1.1.1.8.2 tls 6843 1.1.1.1.8.2 tls (define_insn "*builtin_setjmp_receiver_er_1" 6844 1.1.1.1.8.2 tls [(unspec_volatile [(match_operand 0 "" "")] UNSPECV_SETJMPR_ER)] 6845 1.1.1.1.8.2 tls "TARGET_ABI_OSF && TARGET_EXPLICIT_RELOCS" 6846 1.1.1.1.8.2 tls "br $27,$LSJ%=\n$LSJ%=:" 6847 1.1.1.1.8.2 tls [(set_attr "type" "ibr")]) 6848 1.1.1.1.8.2 tls 6849 1.1.1.1.8.2 tls ;; When flag_reorder_blocks_and_partition is in effect, compiler puts 6850 1.1.1.1.8.2 tls ;; exception landing pads in a cold section. To prevent inter-section offset 6851 1.1.1.1.8.2 tls ;; calculation, a jump to original landing pad is emitted in the place of the 6852 1.1.1.1.8.2 tls ;; original landing pad. Since landing pad is moved, RA-relative GP 6853 1.1.1.1.8.2 tls ;; calculation in the prologue of landing pad breaks. To solve this problem, 6854 1.1.1.1.8.2 tls ;; we use alternative GP load approach, as in the case of TARGET_LD_BUGGY_LDGP. 6855 1.1.1.1.8.2 tls 6856 1.1.1.1.8.2 tls (define_expand "exception_receiver" 6857 1.1.1.1.8.2 tls [(unspec_volatile [(match_dup 0)] UNSPECV_EHR)] 6858 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 6859 1.1.1.1.8.2 tls { 6860 1.1.1.1.8.2 tls if (TARGET_LD_BUGGY_LDGP || flag_reorder_blocks_and_partition) 6861 1.1.1.1.8.2 tls operands[0] = alpha_gp_save_rtx (); 6862 1.1.1.1.8.2 tls else 6863 1.1.1.1.8.2 tls operands[0] = const0_rtx; 6864 1.1.1.1.8.2 tls }) 6865 1.1.1.1.8.2 tls 6866 1.1.1.1.8.2 tls (define_insn "*exception_receiver_2" 6867 1.1.1.1.8.2 tls [(unspec_volatile [(match_operand:DI 0 "memory_operand" "m")] UNSPECV_EHR)] 6868 1.1.1.1.8.2 tls "TARGET_ABI_OSF 6869 1.1.1.1.8.2 tls && (TARGET_LD_BUGGY_LDGP || flag_reorder_blocks_and_partition)" 6870 1.1.1.1.8.2 tls "ldq $29,%0" 6871 1.1.1.1.8.2 tls [(set_attr "type" "ild")]) 6872 1.1.1.1.8.2 tls 6873 1.1.1.1.8.2 tls (define_insn_and_split "*exception_receiver_1" 6874 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] UNSPECV_EHR)] 6875 1.1.1.1.8.2 tls "TARGET_ABI_OSF" 6876 1.1.1.1.8.2 tls { 6877 1.1.1.1.8.2 tls if (TARGET_EXPLICIT_RELOCS) 6878 1.1.1.1.8.2 tls return "ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*"; 6879 1.1.1.1.8.2 tls else 6880 1.1.1.1.8.2 tls return "ldgp $29,0($26)"; 6881 1.1.1.1.8.2 tls } 6882 1.1.1.1.8.2 tls "&& TARGET_EXPLICIT_RELOCS && reload_completed" 6883 1.1.1.1.8.2 tls [(set (match_dup 0) 6884 1.1.1.1.8.2 tls (unspec_volatile:DI [(match_dup 1) (match_dup 2)] UNSPECV_LDGP1)) 6885 1.1.1.1.8.2 tls (set (match_dup 0) 6886 1.1.1.1.8.2 tls (unspec:DI [(match_dup 0) (match_dup 2)] UNSPEC_LDGP2))] 6887 1.1.1.1.8.2 tls { 6888 1.1.1.1.8.2 tls operands[0] = pic_offset_table_rtx; 6889 1.1.1.1.8.2 tls operands[1] = gen_rtx_REG (Pmode, 26); 6890 1.1.1.1.8.2 tls operands[2] = GEN_INT (alpha_next_sequence_number++); 6891 1.1.1.1.8.2 tls } 6892 1.1.1.1.8.2 tls [(set_attr "length" "8") 6893 1.1.1.1.8.2 tls (set_attr "type" "multi")]) 6894 1.1.1.1.8.2 tls 6895 1.1.1.1.8.2 tls (define_expand "nonlocal_goto_receiver" 6896 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE) 6897 1.1.1.1.8.2 tls (set (reg:DI 27) (mem:DI (reg:DI 29))) 6898 1.1.1.1.8.2 tls (unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE) 6899 1.1.1.1.8.2 tls (use (reg:DI 27))] 6900 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 6901 1.1.1.1.8.2 tls "") 6902 1.1.1.1.8.2 tls 6903 1.1.1.1.8.2 tls (define_insn "arg_home" 6904 1.1.1.1.8.2 tls [(unspec [(const_int 0)] UNSPEC_ARG_HOME) 6905 1.1.1.1.8.2 tls (use (reg:DI 1)) 6906 1.1.1.1.8.2 tls (use (reg:DI 25)) 6907 1.1.1.1.8.2 tls (use (reg:DI 16)) 6908 1.1.1.1.8.2 tls (use (reg:DI 17)) 6909 1.1.1.1.8.2 tls (use (reg:DI 18)) 6910 1.1.1.1.8.2 tls (use (reg:DI 19)) 6911 1.1.1.1.8.2 tls (use (reg:DI 20)) 6912 1.1.1.1.8.2 tls (use (reg:DI 21)) 6913 1.1.1.1.8.2 tls (use (reg:DI 48)) 6914 1.1.1.1.8.2 tls (use (reg:DI 49)) 6915 1.1.1.1.8.2 tls (use (reg:DI 50)) 6916 1.1.1.1.8.2 tls (use (reg:DI 51)) 6917 1.1.1.1.8.2 tls (use (reg:DI 52)) 6918 1.1.1.1.8.2 tls (use (reg:DI 53)) 6919 1.1.1.1.8.2 tls (clobber (mem:BLK (const_int 0))) 6920 1.1.1.1.8.2 tls (clobber (reg:DI 24)) 6921 1.1.1.1.8.2 tls (clobber (reg:DI 25)) 6922 1.1.1.1.8.2 tls (clobber (reg:DI 0))] 6923 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 6924 1.1.1.1.8.2 tls "lda $0,OTS$HOME_ARGS\;ldq $0,8($0)\;jsr $0,OTS$HOME_ARGS" 6925 1.1.1.1.8.2 tls [(set_attr "length" "16") 6926 1.1.1.1.8.2 tls (set_attr "type" "multi")]) 6927 1.1.1.1.8.2 tls 6928 1.1.1.1.8.2 tls ;; Load the CIW into r2 for calling __T3E_MISMATCH 6929 1.1.1.1.8.2 tls 6930 1.1.1.1.8.2 tls (define_expand "umk_mismatch_args" 6931 1.1.1.1.8.2 tls [(set:DI (match_dup 1) (mem:DI (plus:DI (reg:DI 15) (const_int -16)))) 6932 1.1.1.1.8.2 tls (set:DI (match_dup 2) (mem:DI (plus:DI (match_dup 1) (const_int -32)))) 6933 1.1.1.1.8.2 tls (set:DI (reg:DI 1) (match_operand:DI 0 "const_int_operand" "")) 6934 1.1.1.1.8.2 tls (set:DI (match_dup 3) (plus:DI (mult:DI (reg:DI 25) 6935 1.1.1.1.8.2 tls (const_int 8)) 6936 1.1.1.1.8.2 tls (match_dup 2))) 6937 1.1.1.1.8.2 tls (set:DI (reg:DI 2) (mem:DI (match_dup 3)))] 6938 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 6939 1.1.1.1.8.2 tls { 6940 1.1.1.1.8.2 tls operands[1] = gen_reg_rtx (DImode); 6941 1.1.1.1.8.2 tls operands[2] = gen_reg_rtx (DImode); 6942 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (DImode); 6943 1.1.1.1.8.2 tls }) 6944 1.1.1.1.8.2 tls 6945 1.1.1.1.8.2 tls (define_insn "arg_home_umk" 6946 1.1.1.1.8.2 tls [(unspec [(const_int 0)] UNSPEC_ARG_HOME) 6947 1.1.1.1.8.2 tls (use (reg:DI 1)) 6948 1.1.1.1.8.2 tls (use (reg:DI 2)) 6949 1.1.1.1.8.2 tls (use (reg:DI 16)) 6950 1.1.1.1.8.2 tls (use (reg:DI 17)) 6951 1.1.1.1.8.2 tls (use (reg:DI 18)) 6952 1.1.1.1.8.2 tls (use (reg:DI 19)) 6953 1.1.1.1.8.2 tls (use (reg:DI 20)) 6954 1.1.1.1.8.2 tls (use (reg:DI 21)) 6955 1.1.1.1.8.2 tls (use (reg:DI 48)) 6956 1.1.1.1.8.2 tls (use (reg:DI 49)) 6957 1.1.1.1.8.2 tls (use (reg:DI 50)) 6958 1.1.1.1.8.2 tls (use (reg:DI 51)) 6959 1.1.1.1.8.2 tls (use (reg:DI 52)) 6960 1.1.1.1.8.2 tls (use (reg:DI 53)) 6961 1.1.1.1.8.2 tls (clobber (mem:BLK (const_int 0))) 6962 1.1.1.1.8.2 tls (parallel [ 6963 1.1.1.1.8.2 tls (clobber (reg:DI 22)) 6964 1.1.1.1.8.2 tls (clobber (reg:DI 23)) 6965 1.1.1.1.8.2 tls (clobber (reg:DI 24)) 6966 1.1.1.1.8.2 tls (clobber (reg:DI 0)) 6967 1.1.1.1.8.2 tls (clobber (reg:DI 1)) 6968 1.1.1.1.8.2 tls (clobber (reg:DI 2)) 6969 1.1.1.1.8.2 tls (clobber (reg:DI 3)) 6970 1.1.1.1.8.2 tls (clobber (reg:DI 4)) 6971 1.1.1.1.8.2 tls (clobber (reg:DI 5)) 6972 1.1.1.1.8.2 tls (clobber (reg:DI 6)) 6973 1.1.1.1.8.2 tls (clobber (reg:DI 7)) 6974 1.1.1.1.8.2 tls (clobber (reg:DI 8))])] 6975 1.1.1.1.8.2 tls "TARGET_ABI_UNICOSMK" 6976 1.1.1.1.8.2 tls "laum $4,__T3E_MISMATCH($31)\;sll $4,32,$4\;lalm $4,__T3E_MISMATCH($4)\;lal $4,__T3E_MISMATCH($4)\;jsr $3,($4)" 6977 1.1.1.1.8.2 tls [(set_attr "length" "16") 6978 1.1.1.1.8.2 tls (set_attr "type" "multi")]) 6979 1.1.1.1.8.2 tls 6980 1.1.1.1.8.2 tls ;; Prefetch data. 6981 1.1.1.1.8.2 tls ;; 6982 1.1.1.1.8.2 tls ;; On EV4, these instructions are nops -- no load occurs. 6983 1.1.1.1.8.2 tls ;; 6984 1.1.1.1.8.2 tls ;; On EV5, these instructions act as a normal load, and thus can trap 6985 1.1.1.1.8.2 tls ;; if the address is invalid. The OS may (or may not) handle this in 6986 1.1.1.1.8.2 tls ;; the entMM fault handler and suppress the fault. If so, then this 6987 1.1.1.1.8.2 tls ;; has the effect of a read prefetch instruction. 6988 1.1.1.1.8.2 tls ;; 6989 1.1.1.1.8.2 tls ;; On EV6, these become official prefetch instructions. 6990 1.1.1.1.8.2 tls 6991 1.1.1.1.8.2 tls (define_insn "prefetch" 6992 1.1.1.1.8.2 tls [(prefetch (match_operand:DI 0 "address_operand" "p") 6993 1.1.1.1.8.2 tls (match_operand:DI 1 "const_int_operand" "n") 6994 1.1.1.1.8.2 tls (match_operand:DI 2 "const_int_operand" "n"))] 6995 1.1.1.1.8.2 tls "TARGET_FIXUP_EV5_PREFETCH || alpha_cpu == PROCESSOR_EV6" 6996 1.1.1.1.8.2 tls { 6997 1.1.1.1.8.2 tls /* Interpret "no temporal locality" as this data should be evicted once 6998 1.1.1.1.8.2 tls it is used. The "evict next" alternatives load the data into the cache 6999 1.1.1.1.8.2 tls and leave the LRU eviction counter pointing to that block. */ 7000 1.1.1.1.8.2 tls static const char * const alt[2][2] = { 7001 1.1.1.1.8.2 tls { 7002 1.1.1.1.8.2 tls "ldq $31,%a0", /* read, evict next */ 7003 1.1.1.1.8.2 tls "ldl $31,%a0", /* read, evict last */ 7004 1.1.1.1.8.2 tls }, 7005 1.1.1.1.8.2 tls { 7006 1.1.1.1.8.2 tls "ldt $f31,%a0", /* write, evict next */ 7007 1.1.1.1.8.2 tls "lds $f31,%a0", /* write, evict last */ 7008 1.1.1.1.8.2 tls } 7009 1.1.1.1.8.2 tls }; 7010 1.1.1.1.8.2 tls 7011 1.1.1.1.8.2 tls bool write = INTVAL (operands[1]) != 0; 7012 1.1.1.1.8.2 tls bool lru = INTVAL (operands[2]) != 0; 7013 1.1.1.1.8.2 tls 7014 1.1.1.1.8.2 tls return alt[write][lru]; 7015 1.1.1.1.8.2 tls } 7016 1.1.1.1.8.2 tls [(set_attr "type" "ild")]) 7017 1.1.1.1.8.2 tls 7018 1.1.1.1.8.2 tls ;; Close the trap shadow of preceding instructions. This is generated 7019 1.1.1.1.8.2 tls ;; by alpha_reorg. 7020 1.1.1.1.8.2 tls 7021 1.1.1.1.8.2 tls (define_insn "trapb" 7022 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] UNSPECV_TRAPB)] 7023 1.1.1.1.8.2 tls "" 7024 1.1.1.1.8.2 tls "trapb" 7025 1.1.1.1.8.2 tls [(set_attr "type" "misc")]) 7026 1.1.1.1.8.2 tls 7027 1.1.1.1.8.2 tls ;; No-op instructions used by machine-dependent reorg to preserve 7028 1.1.1.1.8.2 tls ;; alignment for instruction issue. 7029 1.1.1.1.8.2 tls ;; The Unicos/Mk assembler does not support these opcodes. 7030 1.1.1.1.8.2 tls 7031 1.1.1.1.8.2 tls (define_insn "nop" 7032 1.1.1.1.8.2 tls [(const_int 0)] 7033 1.1.1.1.8.2 tls "" 7034 1.1.1.1.8.2 tls "bis $31,$31,$31" 7035 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 7036 1.1.1.1.8.2 tls 7037 1.1.1.1.8.2 tls (define_insn "fnop" 7038 1.1.1.1.8.2 tls [(const_int 1)] 7039 1.1.1.1.8.2 tls "TARGET_FP" 7040 1.1.1.1.8.2 tls "cpys $f31,$f31,$f31" 7041 1.1.1.1.8.2 tls [(set_attr "type" "fcpys")]) 7042 1.1.1.1.8.2 tls 7043 1.1.1.1.8.2 tls (define_insn "unop" 7044 1.1.1.1.8.2 tls [(const_int 2)] 7045 1.1.1.1.8.2 tls "" 7046 1.1.1.1.8.2 tls "ldq_u $31,0($30)") 7047 1.1.1.1.8.2 tls 7048 1.1.1.1.8.2 tls ;; On Unicos/Mk we use a macro for aligning code. 7049 1.1.1.1.8.2 tls 7050 1.1.1.1.8.2 tls (define_insn "realign" 7051 1.1.1.1.8.2 tls [(unspec_volatile [(match_operand 0 "immediate_operand" "i")] 7052 1.1.1.1.8.2 tls UNSPECV_REALIGN)] 7053 1.1.1.1.8.2 tls "" 7054 1.1.1.1.8.2 tls { 7055 1.1.1.1.8.2 tls if (TARGET_ABI_UNICOSMK) 7056 1.1.1.1.8.2 tls return "gcc@code@align %0"; 7057 1.1.1.1.8.2 tls else 7058 1.1.1.1.8.2 tls return ".align %0 #realign"; 7059 1.1.1.1.8.2 tls }) 7060 1.1.1.1.8.2 tls 7062 1.1.1.1.8.2 tls ;; Instructions to be emitted from __builtins. 7063 1.1.1.1.8.2 tls 7064 1.1.1.1.8.2 tls (define_insn "builtin_cmpbge" 7065 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 7066 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "rJ") 7067 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rI")] 7068 1.1.1.1.8.2 tls UNSPEC_CMPBGE))] 7069 1.1.1.1.8.2 tls "" 7070 1.1.1.1.8.2 tls "cmpbge %r1,%2,%0" 7071 1.1.1.1.8.2 tls ;; The EV6 data sheets list this as ILOG. OTOH, EV6 doesn't 7072 1.1.1.1.8.2 tls ;; actually differentiate between ILOG and ICMP in the schedule. 7073 1.1.1.1.8.2 tls [(set_attr "type" "icmp")]) 7074 1.1.1.1.8.2 tls 7075 1.1.1.1.8.2 tls (define_expand "builtin_extbl" 7076 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7077 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7078 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7079 1.1.1.1.8.2 tls "" 7080 1.1.1.1.8.2 tls { 7081 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7082 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7083 1.1.1.1.8.2 tls gen = gen_extxl_be; 7084 1.1.1.1.8.2 tls else 7085 1.1.1.1.8.2 tls gen = gen_extxl_le; 7086 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], GEN_INT (8), operands[2])); 7087 1.1.1.1.8.2 tls DONE; 7088 1.1.1.1.8.2 tls }) 7089 1.1.1.1.8.2 tls 7090 1.1.1.1.8.2 tls (define_expand "builtin_extwl" 7091 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7092 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7093 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7094 1.1.1.1.8.2 tls "" 7095 1.1.1.1.8.2 tls { 7096 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7097 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7098 1.1.1.1.8.2 tls gen = gen_extxl_be; 7099 1.1.1.1.8.2 tls else 7100 1.1.1.1.8.2 tls gen = gen_extxl_le; 7101 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], GEN_INT (16), operands[2])); 7102 1.1.1.1.8.2 tls DONE; 7103 1.1.1.1.8.2 tls }) 7104 1.1.1.1.8.2 tls 7105 1.1.1.1.8.2 tls (define_expand "builtin_extll" 7106 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7107 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7108 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7109 1.1.1.1.8.2 tls "" 7110 1.1.1.1.8.2 tls { 7111 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7112 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7113 1.1.1.1.8.2 tls gen = gen_extxl_be; 7114 1.1.1.1.8.2 tls else 7115 1.1.1.1.8.2 tls gen = gen_extxl_le; 7116 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], GEN_INT (32), operands[2])); 7117 1.1.1.1.8.2 tls DONE; 7118 1.1.1.1.8.2 tls }) 7119 1.1.1.1.8.2 tls 7120 1.1.1.1.8.2 tls (define_expand "builtin_extql" 7121 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7122 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7123 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7124 1.1.1.1.8.2 tls "" 7125 1.1.1.1.8.2 tls { 7126 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7127 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7128 1.1.1.1.8.2 tls gen = gen_extxl_be; 7129 1.1.1.1.8.2 tls else 7130 1.1.1.1.8.2 tls gen = gen_extxl_le; 7131 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], GEN_INT (64), operands[2])); 7132 1.1.1.1.8.2 tls DONE; 7133 1.1.1.1.8.2 tls }) 7134 1.1.1.1.8.2 tls 7135 1.1.1.1.8.2 tls (define_expand "builtin_extwh" 7136 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7137 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7138 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7139 1.1.1.1.8.2 tls "" 7140 1.1.1.1.8.2 tls { 7141 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx); 7142 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7143 1.1.1.1.8.2 tls gen = gen_extwh_be; 7144 1.1.1.1.8.2 tls else 7145 1.1.1.1.8.2 tls gen = gen_extwh_le; 7146 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7147 1.1.1.1.8.2 tls DONE; 7148 1.1.1.1.8.2 tls }) 7149 1.1.1.1.8.2 tls 7150 1.1.1.1.8.2 tls (define_expand "builtin_extlh" 7151 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7152 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7153 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7154 1.1.1.1.8.2 tls "" 7155 1.1.1.1.8.2 tls { 7156 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx); 7157 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7158 1.1.1.1.8.2 tls gen = gen_extlh_be; 7159 1.1.1.1.8.2 tls else 7160 1.1.1.1.8.2 tls gen = gen_extlh_le; 7161 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7162 1.1.1.1.8.2 tls DONE; 7163 1.1.1.1.8.2 tls }) 7164 1.1.1.1.8.2 tls 7165 1.1.1.1.8.2 tls (define_expand "builtin_extqh" 7166 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7167 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7168 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7169 1.1.1.1.8.2 tls "" 7170 1.1.1.1.8.2 tls { 7171 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx); 7172 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7173 1.1.1.1.8.2 tls gen = gen_extqh_be; 7174 1.1.1.1.8.2 tls else 7175 1.1.1.1.8.2 tls gen = gen_extqh_le; 7176 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7177 1.1.1.1.8.2 tls DONE; 7178 1.1.1.1.8.2 tls }) 7179 1.1.1.1.8.2 tls 7180 1.1.1.1.8.2 tls (define_expand "builtin_insbl" 7181 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7182 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7183 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7184 1.1.1.1.8.2 tls "" 7185 1.1.1.1.8.2 tls { 7186 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx); 7187 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7188 1.1.1.1.8.2 tls gen = gen_insbl_be; 7189 1.1.1.1.8.2 tls else 7190 1.1.1.1.8.2 tls gen = gen_insbl_le; 7191 1.1.1.1.8.2 tls operands[1] = gen_lowpart (QImode, operands[1]); 7192 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7193 1.1.1.1.8.2 tls DONE; 7194 1.1.1.1.8.2 tls }) 7195 1.1.1.1.8.2 tls 7196 1.1.1.1.8.2 tls (define_expand "builtin_inswl" 7197 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7198 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7199 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7200 1.1.1.1.8.2 tls "" 7201 1.1.1.1.8.2 tls { 7202 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx); 7203 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7204 1.1.1.1.8.2 tls gen = gen_inswl_be; 7205 1.1.1.1.8.2 tls else 7206 1.1.1.1.8.2 tls gen = gen_inswl_le; 7207 1.1.1.1.8.2 tls operands[1] = gen_lowpart (HImode, operands[1]); 7208 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7209 1.1.1.1.8.2 tls DONE; 7210 1.1.1.1.8.2 tls }) 7211 1.1.1.1.8.2 tls 7212 1.1.1.1.8.2 tls (define_expand "builtin_insll" 7213 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7214 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7215 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7216 1.1.1.1.8.2 tls "" 7217 1.1.1.1.8.2 tls { 7218 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx); 7219 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7220 1.1.1.1.8.2 tls gen = gen_insll_be; 7221 1.1.1.1.8.2 tls else 7222 1.1.1.1.8.2 tls gen = gen_insll_le; 7223 1.1.1.1.8.2 tls operands[1] = gen_lowpart (SImode, operands[1]); 7224 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7225 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7226 1.1.1.1.8.2 tls DONE; 7227 1.1.1.1.8.2 tls }) 7228 1.1.1.1.8.2 tls 7229 1.1.1.1.8.2 tls (define_expand "builtin_insql" 7230 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7231 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7232 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7233 1.1.1.1.8.2 tls "" 7234 1.1.1.1.8.2 tls { 7235 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx); 7236 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7237 1.1.1.1.8.2 tls gen = gen_insql_be; 7238 1.1.1.1.8.2 tls else 7239 1.1.1.1.8.2 tls gen = gen_insql_le; 7240 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], operands[2])); 7241 1.1.1.1.8.2 tls DONE; 7242 1.1.1.1.8.2 tls }) 7243 1.1.1.1.8.2 tls 7244 1.1.1.1.8.2 tls (define_expand "builtin_inswh" 7245 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7246 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7247 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7248 1.1.1.1.8.2 tls "" 7249 1.1.1.1.8.2 tls { 7250 1.1.1.1.8.2 tls emit_insn (gen_insxh (operands[0], operands[1], GEN_INT (16), operands[2])); 7251 1.1.1.1.8.2 tls DONE; 7252 1.1.1.1.8.2 tls }) 7253 1.1.1.1.8.2 tls 7254 1.1.1.1.8.2 tls (define_expand "builtin_inslh" 7255 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7256 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7257 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7258 1.1.1.1.8.2 tls "" 7259 1.1.1.1.8.2 tls { 7260 1.1.1.1.8.2 tls emit_insn (gen_insxh (operands[0], operands[1], GEN_INT (32), operands[2])); 7261 1.1.1.1.8.2 tls DONE; 7262 1.1.1.1.8.2 tls }) 7263 1.1.1.1.8.2 tls 7264 1.1.1.1.8.2 tls (define_expand "builtin_insqh" 7265 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7266 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7267 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7268 1.1.1.1.8.2 tls "" 7269 1.1.1.1.8.2 tls { 7270 1.1.1.1.8.2 tls emit_insn (gen_insxh (operands[0], operands[1], GEN_INT (64), operands[2])); 7271 1.1.1.1.8.2 tls DONE; 7272 1.1.1.1.8.2 tls }) 7273 1.1.1.1.8.2 tls 7274 1.1.1.1.8.2 tls (define_expand "builtin_mskbl" 7275 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7276 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7277 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7278 1.1.1.1.8.2 tls "" 7279 1.1.1.1.8.2 tls { 7280 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7281 1.1.1.1.8.2 tls rtx mask; 7282 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7283 1.1.1.1.8.2 tls gen = gen_mskxl_be; 7284 1.1.1.1.8.2 tls else 7285 1.1.1.1.8.2 tls gen = gen_mskxl_le; 7286 1.1.1.1.8.2 tls mask = GEN_INT (0xff); 7287 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], mask, operands[2])); 7288 1.1.1.1.8.2 tls DONE; 7289 1.1.1.1.8.2 tls }) 7290 1.1.1.1.8.2 tls 7291 1.1.1.1.8.2 tls (define_expand "builtin_mskwl" 7292 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7293 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7294 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7295 1.1.1.1.8.2 tls "" 7296 1.1.1.1.8.2 tls { 7297 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7298 1.1.1.1.8.2 tls rtx mask; 7299 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7300 1.1.1.1.8.2 tls gen = gen_mskxl_be; 7301 1.1.1.1.8.2 tls else 7302 1.1.1.1.8.2 tls gen = gen_mskxl_le; 7303 1.1.1.1.8.2 tls mask = GEN_INT (0xffff); 7304 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], mask, operands[2])); 7305 1.1.1.1.8.2 tls DONE; 7306 1.1.1.1.8.2 tls }) 7307 1.1.1.1.8.2 tls 7308 1.1.1.1.8.2 tls (define_expand "builtin_mskll" 7309 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7310 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7311 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7312 1.1.1.1.8.2 tls "" 7313 1.1.1.1.8.2 tls { 7314 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7315 1.1.1.1.8.2 tls rtx mask; 7316 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7317 1.1.1.1.8.2 tls gen = gen_mskxl_be; 7318 1.1.1.1.8.2 tls else 7319 1.1.1.1.8.2 tls gen = gen_mskxl_le; 7320 1.1.1.1.8.2 tls mask = immed_double_const (0xffffffff, 0, DImode); 7321 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], mask, operands[2])); 7322 1.1.1.1.8.2 tls DONE; 7323 1.1.1.1.8.2 tls }) 7324 1.1.1.1.8.2 tls 7325 1.1.1.1.8.2 tls (define_expand "builtin_mskql" 7326 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7327 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7328 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7329 1.1.1.1.8.2 tls "" 7330 1.1.1.1.8.2 tls { 7331 1.1.1.1.8.2 tls rtx (*gen) (rtx, rtx, rtx, rtx); 7332 1.1.1.1.8.2 tls rtx mask; 7333 1.1.1.1.8.2 tls if (WORDS_BIG_ENDIAN) 7334 1.1.1.1.8.2 tls gen = gen_mskxl_be; 7335 1.1.1.1.8.2 tls else 7336 1.1.1.1.8.2 tls gen = gen_mskxl_le; 7337 1.1.1.1.8.2 tls mask = constm1_rtx; 7338 1.1.1.1.8.2 tls emit_insn ((*gen) (operands[0], operands[1], mask, operands[2])); 7339 1.1.1.1.8.2 tls DONE; 7340 1.1.1.1.8.2 tls }) 7341 1.1.1.1.8.2 tls 7342 1.1.1.1.8.2 tls (define_expand "builtin_mskwh" 7343 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7344 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7345 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7346 1.1.1.1.8.2 tls "" 7347 1.1.1.1.8.2 tls { 7348 1.1.1.1.8.2 tls emit_insn (gen_mskxh (operands[0], operands[1], GEN_INT (16), operands[2])); 7349 1.1.1.1.8.2 tls DONE; 7350 1.1.1.1.8.2 tls }) 7351 1.1.1.1.8.2 tls 7352 1.1.1.1.8.2 tls (define_expand "builtin_msklh" 7353 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7354 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7355 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7356 1.1.1.1.8.2 tls "" 7357 1.1.1.1.8.2 tls { 7358 1.1.1.1.8.2 tls emit_insn (gen_mskxh (operands[0], operands[1], GEN_INT (32), operands[2])); 7359 1.1.1.1.8.2 tls DONE; 7360 1.1.1.1.8.2 tls }) 7361 1.1.1.1.8.2 tls 7362 1.1.1.1.8.2 tls (define_expand "builtin_mskqh" 7363 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7364 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "") 7365 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "")] 7366 1.1.1.1.8.2 tls "" 7367 1.1.1.1.8.2 tls { 7368 1.1.1.1.8.2 tls emit_insn (gen_mskxh (operands[0], operands[1], GEN_INT (64), operands[2])); 7369 1.1.1.1.8.2 tls DONE; 7370 1.1.1.1.8.2 tls }) 7371 1.1.1.1.8.2 tls 7372 1.1.1.1.8.2 tls (define_expand "builtin_zap" 7373 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7374 1.1.1.1.8.2 tls (and:DI (unspec:DI 7375 1.1.1.1.8.2 tls [(match_operand:DI 2 "reg_or_cint_operand" "")] 7376 1.1.1.1.8.2 tls UNSPEC_ZAP) 7377 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_cint_operand" "")))] 7378 1.1.1.1.8.2 tls "" 7379 1.1.1.1.8.2 tls { 7380 1.1.1.1.8.2 tls if (CONST_INT_P (operands[2])) 7381 1.1.1.1.8.2 tls { 7382 1.1.1.1.8.2 tls rtx mask = alpha_expand_zap_mask (INTVAL (operands[2])); 7383 1.1.1.1.8.2 tls 7384 1.1.1.1.8.2 tls if (mask == const0_rtx) 7385 1.1.1.1.8.2 tls { 7386 1.1.1.1.8.2 tls emit_move_insn (operands[0], const0_rtx); 7387 1.1.1.1.8.2 tls DONE; 7388 1.1.1.1.8.2 tls } 7389 1.1.1.1.8.2 tls if (mask == constm1_rtx) 7390 1.1.1.1.8.2 tls { 7391 1.1.1.1.8.2 tls emit_move_insn (operands[0], operands[1]); 7392 1.1.1.1.8.2 tls DONE; 7393 1.1.1.1.8.2 tls } 7394 1.1.1.1.8.2 tls 7395 1.1.1.1.8.2 tls operands[1] = force_reg (DImode, operands[1]); 7396 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (operands[0], operands[1], mask)); 7397 1.1.1.1.8.2 tls DONE; 7398 1.1.1.1.8.2 tls } 7399 1.1.1.1.8.2 tls 7400 1.1.1.1.8.2 tls operands[1] = force_reg (DImode, operands[1]); 7401 1.1.1.1.8.2 tls operands[2] = gen_lowpart (QImode, operands[2]); 7402 1.1.1.1.8.2 tls }) 7403 1.1.1.1.8.2 tls 7404 1.1.1.1.8.2 tls (define_insn "*builtin_zap_1" 7405 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r,r,r,r") 7406 1.1.1.1.8.2 tls (and:DI (unspec:DI 7407 1.1.1.1.8.2 tls [(match_operand:QI 2 "reg_or_cint_operand" "n,n,r,r")] 7408 1.1.1.1.8.2 tls UNSPEC_ZAP) 7409 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_cint_operand" "n,r,J,r")))] 7410 1.1.1.1.8.2 tls "" 7411 1.1.1.1.8.2 tls "@ 7412 1.1.1.1.8.2 tls # 7413 1.1.1.1.8.2 tls # 7414 1.1.1.1.8.2 tls bis $31,$31,%0 7415 1.1.1.1.8.2 tls zap %r1,%2,%0" 7416 1.1.1.1.8.2 tls [(set_attr "type" "shift,shift,ilog,shift")]) 7417 1.1.1.1.8.2 tls 7418 1.1.1.1.8.2 tls (define_split 7419 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7420 1.1.1.1.8.2 tls (and:DI (unspec:DI 7421 1.1.1.1.8.2 tls [(match_operand:QI 2 "const_int_operand" "")] 7422 1.1.1.1.8.2 tls UNSPEC_ZAP) 7423 1.1.1.1.8.2 tls (match_operand:DI 1 "const_int_operand" "")))] 7424 1.1.1.1.8.2 tls "" 7425 1.1.1.1.8.2 tls [(const_int 0)] 7426 1.1.1.1.8.2 tls { 7427 1.1.1.1.8.2 tls rtx mask = alpha_expand_zap_mask (INTVAL (operands[2])); 7428 1.1.1.1.8.2 tls if (HOST_BITS_PER_WIDE_INT >= 64 || CONST_INT_P (mask)) 7429 1.1.1.1.8.2 tls operands[1] = gen_int_mode (INTVAL (operands[1]) & INTVAL (mask), DImode); 7430 1.1.1.1.8.2 tls else 7431 1.1.1.1.8.2 tls { 7432 1.1.1.1.8.2 tls HOST_WIDE_INT c_lo = INTVAL (operands[1]); 7433 1.1.1.1.8.2 tls HOST_WIDE_INT c_hi = (c_lo < 0 ? -1 : 0); 7434 1.1.1.1.8.2 tls operands[1] = immed_double_const (c_lo & CONST_DOUBLE_LOW (mask), 7435 1.1.1.1.8.2 tls c_hi & CONST_DOUBLE_HIGH (mask), 7436 1.1.1.1.8.2 tls DImode); 7437 1.1.1.1.8.2 tls } 7438 1.1.1.1.8.2 tls emit_move_insn (operands[0], operands[1]); 7439 1.1.1.1.8.2 tls DONE; 7440 1.1.1.1.8.2 tls }) 7441 1.1.1.1.8.2 tls 7442 1.1.1.1.8.2 tls (define_split 7443 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7444 1.1.1.1.8.2 tls (and:DI (unspec:DI 7445 1.1.1.1.8.2 tls [(match_operand:QI 2 "const_int_operand" "")] 7446 1.1.1.1.8.2 tls UNSPEC_ZAP) 7447 1.1.1.1.8.2 tls (match_operand:DI 1 "register_operand" "")))] 7448 1.1.1.1.8.2 tls "" 7449 1.1.1.1.8.2 tls [(set (match_dup 0) 7450 1.1.1.1.8.2 tls (and:DI (match_dup 1) (match_dup 2)))] 7451 1.1.1.1.8.2 tls { 7452 1.1.1.1.8.2 tls operands[2] = alpha_expand_zap_mask (INTVAL (operands[2])); 7453 1.1.1.1.8.2 tls if (operands[2] == const0_rtx) 7454 1.1.1.1.8.2 tls { 7455 1.1.1.1.8.2 tls emit_move_insn (operands[0], const0_rtx); 7456 1.1.1.1.8.2 tls DONE; 7457 1.1.1.1.8.2 tls } 7458 1.1.1.1.8.2 tls if (operands[2] == constm1_rtx) 7459 1.1.1.1.8.2 tls { 7460 1.1.1.1.8.2 tls emit_move_insn (operands[0], operands[1]); 7461 1.1.1.1.8.2 tls DONE; 7462 1.1.1.1.8.2 tls } 7463 1.1.1.1.8.2 tls }) 7464 1.1.1.1.8.2 tls 7465 1.1.1.1.8.2 tls (define_expand "builtin_zapnot" 7466 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7467 1.1.1.1.8.2 tls (and:DI (unspec:DI 7468 1.1.1.1.8.2 tls [(not:QI (match_operand:DI 2 "reg_or_cint_operand" ""))] 7469 1.1.1.1.8.2 tls UNSPEC_ZAP) 7470 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_cint_operand" "")))] 7471 1.1.1.1.8.2 tls "" 7472 1.1.1.1.8.2 tls { 7473 1.1.1.1.8.2 tls if (CONST_INT_P (operands[2])) 7474 1.1.1.1.8.2 tls { 7475 1.1.1.1.8.2 tls rtx mask = alpha_expand_zap_mask (~ INTVAL (operands[2])); 7476 1.1.1.1.8.2 tls 7477 1.1.1.1.8.2 tls if (mask == const0_rtx) 7478 1.1.1.1.8.2 tls { 7479 1.1.1.1.8.2 tls emit_move_insn (operands[0], const0_rtx); 7480 1.1.1.1.8.2 tls DONE; 7481 1.1.1.1.8.2 tls } 7482 1.1.1.1.8.2 tls if (mask == constm1_rtx) 7483 1.1.1.1.8.2 tls { 7484 1.1.1.1.8.2 tls emit_move_insn (operands[0], operands[1]); 7485 1.1.1.1.8.2 tls DONE; 7486 1.1.1.1.8.2 tls } 7487 1.1.1.1.8.2 tls 7488 1.1.1.1.8.2 tls operands[1] = force_reg (DImode, operands[1]); 7489 1.1.1.1.8.2 tls emit_insn (gen_anddi3 (operands[0], operands[1], mask)); 7490 1.1.1.1.8.2 tls DONE; 7491 1.1.1.1.8.2 tls } 7492 1.1.1.1.8.2 tls 7493 1.1.1.1.8.2 tls operands[1] = force_reg (DImode, operands[1]); 7494 1.1.1.1.8.2 tls operands[2] = gen_lowpart (QImode, operands[2]); 7495 1.1.1.1.8.2 tls }) 7496 1.1.1.1.8.2 tls 7497 1.1.1.1.8.2 tls (define_insn "*builtin_zapnot_1" 7498 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 7499 1.1.1.1.8.2 tls (and:DI (unspec:DI 7500 1.1.1.1.8.2 tls [(not:QI (match_operand:QI 2 "register_operand" "r"))] 7501 1.1.1.1.8.2 tls UNSPEC_ZAP) 7502 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "rJ")))] 7503 1.1.1.1.8.2 tls "" 7504 1.1.1.1.8.2 tls "zapnot %r1,%2,%0" 7505 1.1.1.1.8.2 tls [(set_attr "type" "shift")]) 7506 1.1.1.1.8.2 tls 7507 1.1.1.1.8.2 tls (define_insn "builtin_amask" 7508 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 7509 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "reg_or_8bit_operand" "rI")] 7510 1.1.1.1.8.2 tls UNSPEC_AMASK))] 7511 1.1.1.1.8.2 tls "" 7512 1.1.1.1.8.2 tls "amask %1,%0" 7513 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 7514 1.1.1.1.8.2 tls 7515 1.1.1.1.8.2 tls (define_insn "builtin_implver" 7516 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 7517 1.1.1.1.8.2 tls (unspec:DI [(const_int 0)] UNSPEC_IMPLVER))] 7518 1.1.1.1.8.2 tls "" 7519 1.1.1.1.8.2 tls "implver %0" 7520 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 7521 1.1.1.1.8.2 tls 7522 1.1.1.1.8.2 tls (define_insn "builtin_rpcc" 7523 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 7524 1.1.1.1.8.2 tls (unspec_volatile:DI [(const_int 0)] UNSPECV_RPCC))] 7525 1.1.1.1.8.2 tls "" 7526 1.1.1.1.8.2 tls "rpcc %0" 7527 1.1.1.1.8.2 tls [(set_attr "type" "ilog")]) 7528 1.1.1.1.8.2 tls 7529 1.1.1.1.8.2 tls (define_expand "builtin_minub8" 7530 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7531 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7532 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7533 1.1.1.1.8.2 tls "TARGET_MAX" 7534 1.1.1.1.8.2 tls { 7535 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_uminv8qi3, V8QImode, operands[0], 7536 1.1.1.1.8.2 tls operands[1], operands[2]); 7537 1.1.1.1.8.2 tls DONE; 7538 1.1.1.1.8.2 tls }) 7539 1.1.1.1.8.2 tls 7540 1.1.1.1.8.2 tls (define_expand "builtin_minsb8" 7541 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7542 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7543 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7544 1.1.1.1.8.2 tls "TARGET_MAX" 7545 1.1.1.1.8.2 tls { 7546 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_sminv8qi3, V8QImode, operands[0], 7547 1.1.1.1.8.2 tls operands[1], operands[2]); 7548 1.1.1.1.8.2 tls DONE; 7549 1.1.1.1.8.2 tls }) 7550 1.1.1.1.8.2 tls 7551 1.1.1.1.8.2 tls (define_expand "builtin_minuw4" 7552 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7553 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7554 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7555 1.1.1.1.8.2 tls "TARGET_MAX" 7556 1.1.1.1.8.2 tls { 7557 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_uminv4hi3, V4HImode, operands[0], 7558 1.1.1.1.8.2 tls operands[1], operands[2]); 7559 1.1.1.1.8.2 tls DONE; 7560 1.1.1.1.8.2 tls }) 7561 1.1.1.1.8.2 tls 7562 1.1.1.1.8.2 tls (define_expand "builtin_minsw4" 7563 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7564 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7565 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7566 1.1.1.1.8.2 tls "TARGET_MAX" 7567 1.1.1.1.8.2 tls { 7568 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_sminv4hi3, V4HImode, operands[0], 7569 1.1.1.1.8.2 tls operands[1], operands[2]); 7570 1.1.1.1.8.2 tls DONE; 7571 1.1.1.1.8.2 tls }) 7572 1.1.1.1.8.2 tls 7573 1.1.1.1.8.2 tls (define_expand "builtin_maxub8" 7574 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7575 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7576 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7577 1.1.1.1.8.2 tls "TARGET_MAX" 7578 1.1.1.1.8.2 tls { 7579 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_umaxv8qi3, V8QImode, operands[0], 7580 1.1.1.1.8.2 tls operands[1], operands[2]); 7581 1.1.1.1.8.2 tls DONE; 7582 1.1.1.1.8.2 tls }) 7583 1.1.1.1.8.2 tls 7584 1.1.1.1.8.2 tls (define_expand "builtin_maxsb8" 7585 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7586 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7587 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7588 1.1.1.1.8.2 tls "TARGET_MAX" 7589 1.1.1.1.8.2 tls { 7590 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_smaxv8qi3, V8QImode, operands[0], 7591 1.1.1.1.8.2 tls operands[1], operands[2]); 7592 1.1.1.1.8.2 tls DONE; 7593 1.1.1.1.8.2 tls }) 7594 1.1.1.1.8.2 tls 7595 1.1.1.1.8.2 tls (define_expand "builtin_maxuw4" 7596 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7597 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7598 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7599 1.1.1.1.8.2 tls "TARGET_MAX" 7600 1.1.1.1.8.2 tls { 7601 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_umaxv4hi3, V4HImode, operands[0], 7602 1.1.1.1.8.2 tls operands[1], operands[2]); 7603 1.1.1.1.8.2 tls DONE; 7604 1.1.1.1.8.2 tls }) 7605 1.1.1.1.8.2 tls 7606 1.1.1.1.8.2 tls (define_expand "builtin_maxsw4" 7607 1.1.1.1.8.2 tls [(match_operand:DI 0 "register_operand" "") 7608 1.1.1.1.8.2 tls (match_operand:DI 1 "reg_or_0_operand" "") 7609 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_0_operand" "")] 7610 1.1.1.1.8.2 tls "TARGET_MAX" 7611 1.1.1.1.8.2 tls { 7612 1.1.1.1.8.2 tls alpha_expand_builtin_vector_binop (gen_smaxv4hi3, V4HImode, operands[0], 7613 1.1.1.1.8.2 tls operands[1], operands[2]); 7614 1.1.1.1.8.2 tls DONE; 7615 1.1.1.1.8.2 tls }) 7616 1.1.1.1.8.2 tls 7617 1.1.1.1.8.2 tls (define_insn "builtin_perr" 7618 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "=r") 7619 1.1.1.1.8.2 tls (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "%rJ") 7620 1.1.1.1.8.2 tls (match_operand:DI 2 "reg_or_8bit_operand" "rJ")] 7621 1.1.1.1.8.2 tls UNSPEC_PERR))] 7622 1.1.1.1.8.2 tls "TARGET_MAX" 7623 1.1.1.1.8.2 tls "perr %r1,%r2,%0" 7624 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 7625 1.1.1.1.8.2 tls 7626 1.1.1.1.8.2 tls (define_expand "builtin_pklb" 7627 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7628 1.1.1.1.8.2 tls (vec_concat:V8QI 7629 1.1.1.1.8.2 tls (vec_concat:V4QI 7630 1.1.1.1.8.2 tls (truncate:V2QI (match_operand:DI 1 "register_operand" "")) 7631 1.1.1.1.8.2 tls (match_dup 2)) 7632 1.1.1.1.8.2 tls (match_dup 3)))] 7633 1.1.1.1.8.2 tls "TARGET_MAX" 7634 1.1.1.1.8.2 tls { 7635 1.1.1.1.8.2 tls operands[0] = gen_lowpart (V8QImode, operands[0]); 7636 1.1.1.1.8.2 tls operands[1] = gen_lowpart (V2SImode, operands[1]); 7637 1.1.1.1.8.2 tls operands[2] = CONST0_RTX (V2QImode); 7638 1.1.1.1.8.2 tls operands[3] = CONST0_RTX (V4QImode); 7639 1.1.1.1.8.2 tls }) 7640 1.1.1.1.8.2 tls 7641 1.1.1.1.8.2 tls (define_insn "*pklb" 7642 1.1.1.1.8.2 tls [(set (match_operand:V8QI 0 "register_operand" "=r") 7643 1.1.1.1.8.2 tls (vec_concat:V8QI 7644 1.1.1.1.8.2 tls (vec_concat:V4QI 7645 1.1.1.1.8.2 tls (truncate:V2QI (match_operand:V2SI 1 "register_operand" "r")) 7646 1.1.1.1.8.2 tls (match_operand:V2QI 2 "const0_operand" "")) 7647 1.1.1.1.8.2 tls (match_operand:V4QI 3 "const0_operand" "")))] 7648 1.1.1.1.8.2 tls "TARGET_MAX" 7649 1.1.1.1.8.2 tls "pklb %r1,%0" 7650 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 7651 1.1.1.1.8.2 tls 7652 1.1.1.1.8.2 tls (define_expand "builtin_pkwb" 7653 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7654 1.1.1.1.8.2 tls (vec_concat:V8QI 7655 1.1.1.1.8.2 tls (truncate:V4QI (match_operand:DI 1 "register_operand" "")) 7656 1.1.1.1.8.2 tls (match_dup 2)))] 7657 1.1.1.1.8.2 tls "TARGET_MAX" 7658 1.1.1.1.8.2 tls { 7659 1.1.1.1.8.2 tls operands[0] = gen_lowpart (V8QImode, operands[0]); 7660 1.1.1.1.8.2 tls operands[1] = gen_lowpart (V4HImode, operands[1]); 7661 1.1.1.1.8.2 tls operands[2] = CONST0_RTX (V4QImode); 7662 1.1.1.1.8.2 tls }) 7663 1.1.1.1.8.2 tls 7664 1.1.1.1.8.2 tls (define_insn "*pkwb" 7665 1.1.1.1.8.2 tls [(set (match_operand:V8QI 0 "register_operand" "=r") 7666 1.1.1.1.8.2 tls (vec_concat:V8QI 7667 1.1.1.1.8.2 tls (truncate:V4QI (match_operand:V4HI 1 "register_operand" "r")) 7668 1.1.1.1.8.2 tls (match_operand:V4QI 2 "const0_operand" "")))] 7669 1.1.1.1.8.2 tls "TARGET_MAX" 7670 1.1.1.1.8.2 tls "pkwb %r1,%0" 7671 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 7672 1.1.1.1.8.2 tls 7673 1.1.1.1.8.2 tls (define_expand "builtin_unpkbl" 7674 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7675 1.1.1.1.8.2 tls (zero_extend:V2SI 7676 1.1.1.1.8.2 tls (vec_select:V2QI (match_operand:DI 1 "register_operand" "") 7677 1.1.1.1.8.2 tls (parallel [(const_int 0) (const_int 1)]))))] 7678 1.1.1.1.8.2 tls "TARGET_MAX" 7679 1.1.1.1.8.2 tls { 7680 1.1.1.1.8.2 tls operands[0] = gen_lowpart (V2SImode, operands[0]); 7681 1.1.1.1.8.2 tls operands[1] = gen_lowpart (V8QImode, operands[1]); 7682 1.1.1.1.8.2 tls }) 7683 1.1.1.1.8.2 tls 7684 1.1.1.1.8.2 tls (define_insn "*unpkbl" 7685 1.1.1.1.8.2 tls [(set (match_operand:V2SI 0 "register_operand" "=r") 7686 1.1.1.1.8.2 tls (zero_extend:V2SI 7687 1.1.1.1.8.2 tls (vec_select:V2QI (match_operand:V8QI 1 "reg_or_0_operand" "rW") 7688 1.1.1.1.8.2 tls (parallel [(const_int 0) (const_int 1)]))))] 7689 1.1.1.1.8.2 tls "TARGET_MAX" 7690 1.1.1.1.8.2 tls "unpkbl %r1,%0" 7691 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 7692 1.1.1.1.8.2 tls 7693 1.1.1.1.8.2 tls (define_expand "builtin_unpkbw" 7694 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "register_operand" "") 7695 1.1.1.1.8.2 tls (zero_extend:V4HI 7696 1.1.1.1.8.2 tls (vec_select:V4QI (match_operand:DI 1 "register_operand" "") 7697 1.1.1.1.8.2 tls (parallel [(const_int 0) 7698 1.1.1.1.8.2 tls (const_int 1) 7699 1.1.1.1.8.2 tls (const_int 2) 7700 1.1.1.1.8.2 tls (const_int 3)]))))] 7701 1.1.1.1.8.2 tls "TARGET_MAX" 7702 1.1.1.1.8.2 tls { 7703 1.1.1.1.8.2 tls operands[0] = gen_lowpart (V4HImode, operands[0]); 7704 1.1.1.1.8.2 tls operands[1] = gen_lowpart (V8QImode, operands[1]); 7705 1.1.1.1.8.2 tls }) 7706 1.1.1.1.8.2 tls 7707 1.1.1.1.8.2 tls (define_insn "*unpkbw" 7708 1.1.1.1.8.2 tls [(set (match_operand:V4HI 0 "register_operand" "=r") 7709 1.1.1.1.8.2 tls (zero_extend:V4HI 7710 1.1.1.1.8.2 tls (vec_select:V4QI (match_operand:V8QI 1 "reg_or_0_operand" "rW") 7711 1.1.1.1.8.2 tls (parallel [(const_int 0) 7712 1.1.1.1.8.2 tls (const_int 1) 7713 1.1.1.1.8.2 tls (const_int 2) 7714 1.1.1.1.8.2 tls (const_int 3)]))))] 7715 1.1.1.1.8.2 tls "TARGET_MAX" 7716 1.1.1.1.8.2 tls "unpkbw %r1,%0" 7717 1.1.1.1.8.2 tls [(set_attr "type" "mvi")]) 7718 1.1.1.1.8.2 tls 7720 1.1.1.1.8.2 tls (include "sync.md") 7721 1.1.1.1.8.2 tls 7723 1.1.1.1.8.2 tls ;; The call patterns are at the end of the file because their 7724 1.1.1.1.8.2 tls ;; wildcard operand0 interferes with nice recognition. 7725 1.1.1.1.8.2 tls 7726 1.1.1.1.8.2 tls (define_insn "*call_value_osf_1_er_noreturn" 7727 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7728 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "c,R,s")) 7729 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7730 1.1.1.1.8.2 tls (use (reg:DI 29)) 7731 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7732 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF 7733 1.1.1.1.8.2 tls && find_reg_note (insn, REG_NORETURN, NULL_RTX)" 7734 1.1.1.1.8.2 tls "@ 7735 1.1.1.1.8.2 tls jsr $26,($27),0 7736 1.1.1.1.8.2 tls bsr $26,%1\t\t!samegp 7737 1.1.1.1.8.2 tls ldq $27,%1($29)\t\t!literal!%#\;jsr $26,($27),%1\t\t!lituse_jsr!%#" 7738 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7739 1.1.1.1.8.2 tls (set_attr "length" "*,*,8")]) 7740 1.1.1.1.8.2 tls 7741 1.1.1.1.8.2 tls (define_insn "*call_value_osf_1_er" 7742 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7743 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "c,R,s")) 7744 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7745 1.1.1.1.8.2 tls (use (reg:DI 29)) 7746 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7747 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 7748 1.1.1.1.8.2 tls "@ 7749 1.1.1.1.8.2 tls jsr $26,(%1),0\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%* 7750 1.1.1.1.8.2 tls bsr $26,%1\t\t!samegp 7751 1.1.1.1.8.2 tls ldq $27,%1($29)\t\t!literal!%#\;jsr $26,($27),0\t\t!lituse_jsr!%#\;ldah $29,0($26)\t\t!gpdisp!%*\;lda $29,0($29)\t\t!gpdisp!%*" 7752 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7753 1.1.1.1.8.2 tls (set_attr "length" "12,*,16")]) 7754 1.1.1.1.8.2 tls 7755 1.1.1.1.8.2 tls ;; We must use peep2 instead of a split because we need accurate life 7756 1.1.1.1.8.2 tls ;; information for $gp. Consider the case of { bar(); while (1); }. 7757 1.1.1.1.8.2 tls (define_peephole2 7758 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 7759 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "")) 7760 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7761 1.1.1.1.8.2 tls (use (reg:DI 29)) 7762 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 7763 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed 7764 1.1.1.1.8.2 tls && ! samegp_function_operand (operands[1], Pmode) 7765 1.1.1.1.8.2 tls && (peep2_regno_dead_p (1, 29) 7766 1.1.1.1.8.2 tls || find_reg_note (insn, REG_NORETURN, NULL_RTX))" 7767 1.1.1.1.8.2 tls [(parallel [(set (match_dup 0) 7768 1.1.1.1.8.2 tls (call (mem:DI (match_dup 3)) 7769 1.1.1.1.8.2 tls (match_dup 2))) 7770 1.1.1.1.8.2 tls (use (reg:DI 29)) 7771 1.1.1.1.8.2 tls (use (match_dup 1)) 7772 1.1.1.1.8.2 tls (use (match_dup 4)) 7773 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 7774 1.1.1.1.8.2 tls { 7775 1.1.1.1.8.2 tls if (CONSTANT_P (operands[1])) 7776 1.1.1.1.8.2 tls { 7777 1.1.1.1.8.2 tls operands[3] = gen_rtx_REG (Pmode, 27); 7778 1.1.1.1.8.2 tls operands[4] = GEN_INT (alpha_next_sequence_number++); 7779 1.1.1.1.8.2 tls emit_insn (gen_movdi_er_high_g (operands[3], pic_offset_table_rtx, 7780 1.1.1.1.8.2 tls operands[1], operands[4])); 7781 1.1.1.1.8.2 tls } 7782 1.1.1.1.8.2 tls else 7783 1.1.1.1.8.2 tls { 7784 1.1.1.1.8.2 tls operands[3] = operands[1]; 7785 1.1.1.1.8.2 tls operands[1] = const0_rtx; 7786 1.1.1.1.8.2 tls operands[4] = const0_rtx; 7787 1.1.1.1.8.2 tls } 7788 1.1.1.1.8.2 tls }) 7789 1.1.1.1.8.2 tls 7790 1.1.1.1.8.2 tls (define_peephole2 7791 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 7792 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "")) 7793 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7794 1.1.1.1.8.2 tls (use (reg:DI 29)) 7795 1.1.1.1.8.2 tls (clobber (reg:DI 26))])] 7796 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF && reload_completed 7797 1.1.1.1.8.2 tls && ! samegp_function_operand (operands[1], Pmode) 7798 1.1.1.1.8.2 tls && ! (peep2_regno_dead_p (1, 29) 7799 1.1.1.1.8.2 tls || find_reg_note (insn, REG_NORETURN, NULL_RTX))" 7800 1.1.1.1.8.2 tls [(parallel [(set (match_dup 0) 7801 1.1.1.1.8.2 tls (call (mem:DI (match_dup 3)) 7802 1.1.1.1.8.2 tls (match_dup 2))) 7803 1.1.1.1.8.2 tls (set (match_dup 6) 7804 1.1.1.1.8.2 tls (unspec:DI [(match_dup 6) (match_dup 4)] UNSPEC_LDGP1)) 7805 1.1.1.1.8.2 tls (use (match_dup 1)) 7806 1.1.1.1.8.2 tls (use (match_dup 5)) 7807 1.1.1.1.8.2 tls (clobber (reg:DI 26))]) 7808 1.1.1.1.8.2 tls (set (match_dup 6) 7809 1.1.1.1.8.2 tls (unspec:DI [(match_dup 6) (match_dup 4)] UNSPEC_LDGP2))] 7810 1.1.1.1.8.2 tls { 7811 1.1.1.1.8.2 tls if (CONSTANT_P (operands[1])) 7812 1.1.1.1.8.2 tls { 7813 1.1.1.1.8.2 tls operands[3] = gen_rtx_REG (Pmode, 27); 7814 1.1.1.1.8.2 tls operands[5] = GEN_INT (alpha_next_sequence_number++); 7815 1.1.1.1.8.2 tls emit_insn (gen_movdi_er_high_g (operands[3], pic_offset_table_rtx, 7816 1.1.1.1.8.2 tls operands[1], operands[5])); 7817 1.1.1.1.8.2 tls } 7818 1.1.1.1.8.2 tls else 7819 1.1.1.1.8.2 tls { 7820 1.1.1.1.8.2 tls operands[3] = operands[1]; 7821 1.1.1.1.8.2 tls operands[1] = const0_rtx; 7822 1.1.1.1.8.2 tls operands[5] = const0_rtx; 7823 1.1.1.1.8.2 tls } 7824 1.1.1.1.8.2 tls operands[4] = GEN_INT (alpha_next_sequence_number++); 7825 1.1.1.1.8.2 tls operands[6] = pic_offset_table_rtx; 7826 1.1.1.1.8.2 tls }) 7827 1.1.1.1.8.2 tls 7828 1.1.1.1.8.2 tls (define_insn "*call_value_osf_2_er_nogp" 7829 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7830 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "register_operand" "c")) 7831 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7832 1.1.1.1.8.2 tls (use (reg:DI 29)) 7833 1.1.1.1.8.2 tls (use (match_operand 3 "" "")) 7834 1.1.1.1.8.2 tls (use (match_operand 4 "" "")) 7835 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7836 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 7837 1.1.1.1.8.2 tls "jsr $26,(%1),%3%J4" 7838 1.1.1.1.8.2 tls [(set_attr "type" "jsr")]) 7839 1.1.1.1.8.2 tls 7840 1.1.1.1.8.2 tls (define_insn "*call_value_osf_2_er" 7841 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7842 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "register_operand" "c")) 7843 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7844 1.1.1.1.8.2 tls (set (reg:DI 29) 7845 1.1.1.1.8.2 tls (unspec:DI [(reg:DI 29) (match_operand 5 "const_int_operand" "")] 7846 1.1.1.1.8.2 tls UNSPEC_LDGP1)) 7847 1.1.1.1.8.2 tls (use (match_operand 3 "" "")) 7848 1.1.1.1.8.2 tls (use (match_operand 4 "" "")) 7849 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7850 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 7851 1.1.1.1.8.2 tls "jsr $26,(%1),%3%J4\;ldah $29,0($26)\t\t!gpdisp!%5" 7852 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7853 1.1.1.1.8.2 tls (set_attr "cannot_copy" "true") 7854 1.1.1.1.8.2 tls (set_attr "length" "8")]) 7855 1.1.1.1.8.2 tls 7856 1.1.1.1.8.2 tls (define_insn "*call_value_osf_1_noreturn" 7857 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7858 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "c,R,s")) 7859 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7860 1.1.1.1.8.2 tls (use (reg:DI 29)) 7861 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7862 1.1.1.1.8.2 tls "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF 7863 1.1.1.1.8.2 tls && find_reg_note (insn, REG_NORETURN, NULL_RTX)" 7864 1.1.1.1.8.2 tls "@ 7865 1.1.1.1.8.2 tls jsr $26,($27),0 7866 1.1.1.1.8.2 tls bsr $26,$%1..ng 7867 1.1.1.1.8.2 tls jsr $26,%1" 7868 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7869 1.1.1.1.8.2 tls (set_attr "length" "*,*,8")]) 7870 1.1.1.1.8.2 tls 7871 1.1.1.1.8.2 tls (define_insn_and_split "call_value_osf_tlsgd" 7872 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7873 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "symbolic_operand" "")) 7874 1.1.1.1.8.2 tls (const_int 0))) 7875 1.1.1.1.8.2 tls (unspec [(match_operand:DI 2 "const_int_operand" "")] UNSPEC_TLSGD_CALL) 7876 1.1.1.1.8.2 tls (use (reg:DI 29)) 7877 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7878 1.1.1.1.8.2 tls "HAVE_AS_TLS" 7879 1.1.1.1.8.2 tls "#" 7880 1.1.1.1.8.2 tls "&& reload_completed" 7881 1.1.1.1.8.2 tls [(set (match_dup 3) 7882 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) 7883 1.1.1.1.8.2 tls (match_dup 1) 7884 1.1.1.1.8.2 tls (match_dup 2)] UNSPEC_LITERAL)) 7885 1.1.1.1.8.2 tls (parallel [(set (match_dup 0) 7886 1.1.1.1.8.2 tls (call (mem:DI (match_dup 3)) 7887 1.1.1.1.8.2 tls (const_int 0))) 7888 1.1.1.1.8.2 tls (set (match_dup 5) 7889 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) (match_dup 4)] UNSPEC_LDGP1)) 7890 1.1.1.1.8.2 tls (use (match_dup 1)) 7891 1.1.1.1.8.2 tls (use (unspec [(match_dup 2)] UNSPEC_TLSGD_CALL)) 7892 1.1.1.1.8.2 tls (clobber (reg:DI 26))]) 7893 1.1.1.1.8.2 tls (set (match_dup 5) 7894 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) (match_dup 4)] UNSPEC_LDGP2))] 7895 1.1.1.1.8.2 tls { 7896 1.1.1.1.8.2 tls operands[3] = gen_rtx_REG (Pmode, 27); 7897 1.1.1.1.8.2 tls operands[4] = GEN_INT (alpha_next_sequence_number++); 7898 1.1.1.1.8.2 tls operands[5] = pic_offset_table_rtx; 7899 1.1.1.1.8.2 tls } 7900 1.1.1.1.8.2 tls [(set_attr "type" "multi")]) 7901 1.1.1.1.8.2 tls 7902 1.1.1.1.8.2 tls (define_insn_and_split "call_value_osf_tlsldm" 7903 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7904 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "symbolic_operand" "")) 7905 1.1.1.1.8.2 tls (const_int 0))) 7906 1.1.1.1.8.2 tls (unspec [(match_operand:DI 2 "const_int_operand" "")] UNSPEC_TLSLDM_CALL) 7907 1.1.1.1.8.2 tls (use (reg:DI 29)) 7908 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7909 1.1.1.1.8.2 tls "HAVE_AS_TLS" 7910 1.1.1.1.8.2 tls "#" 7911 1.1.1.1.8.2 tls "&& reload_completed" 7912 1.1.1.1.8.2 tls [(set (match_dup 3) 7913 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) 7914 1.1.1.1.8.2 tls (match_dup 1) 7915 1.1.1.1.8.2 tls (match_dup 2)] UNSPEC_LITERAL)) 7916 1.1.1.1.8.2 tls (parallel [(set (match_dup 0) 7917 1.1.1.1.8.2 tls (call (mem:DI (match_dup 3)) 7918 1.1.1.1.8.2 tls (const_int 0))) 7919 1.1.1.1.8.2 tls (set (match_dup 5) 7920 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) (match_dup 4)] UNSPEC_LDGP1)) 7921 1.1.1.1.8.2 tls (use (match_dup 1)) 7922 1.1.1.1.8.2 tls (use (unspec [(match_dup 2)] UNSPEC_TLSLDM_CALL)) 7923 1.1.1.1.8.2 tls (clobber (reg:DI 26))]) 7924 1.1.1.1.8.2 tls (set (match_dup 5) 7925 1.1.1.1.8.2 tls (unspec:DI [(match_dup 5) (match_dup 4)] UNSPEC_LDGP2))] 7926 1.1.1.1.8.2 tls { 7927 1.1.1.1.8.2 tls operands[3] = gen_rtx_REG (Pmode, 27); 7928 1.1.1.1.8.2 tls operands[4] = GEN_INT (alpha_next_sequence_number++); 7929 1.1.1.1.8.2 tls operands[5] = pic_offset_table_rtx; 7930 1.1.1.1.8.2 tls } 7931 1.1.1.1.8.2 tls [(set_attr "type" "multi")]) 7932 1.1.1.1.8.2 tls 7933 1.1.1.1.8.2 tls (define_insn "*call_value_osf_1" 7934 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7935 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "c,R,s")) 7936 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7937 1.1.1.1.8.2 tls (use (reg:DI 29)) 7938 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7939 1.1.1.1.8.2 tls "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 7940 1.1.1.1.8.2 tls "@ 7941 1.1.1.1.8.2 tls jsr $26,($27),0\;ldgp $29,0($26) 7942 1.1.1.1.8.2 tls bsr $26,$%1..ng 7943 1.1.1.1.8.2 tls jsr $26,%1\;ldgp $29,0($26)" 7944 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7945 1.1.1.1.8.2 tls (set_attr "length" "12,*,16")]) 7946 1.1.1.1.8.2 tls 7947 1.1.1.1.8.2 tls (define_insn "*sibcall_value_osf_1_er" 7948 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7949 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "symbolic_operand" "R,s")) 7950 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7951 1.1.1.1.8.2 tls (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] 7952 1.1.1.1.8.2 tls "TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 7953 1.1.1.1.8.2 tls "@ 7954 1.1.1.1.8.2 tls br $31,%1\t\t!samegp 7955 1.1.1.1.8.2 tls ldq $27,%1($29)\t\t!literal!%#\;jmp $31,($27),%1\t\t!lituse_jsr!%#" 7956 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7957 1.1.1.1.8.2 tls (set_attr "length" "*,8")]) 7958 1.1.1.1.8.2 tls 7959 1.1.1.1.8.2 tls (define_insn "*sibcall_value_osf_1" 7960 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7961 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "symbolic_operand" "R,s")) 7962 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7963 1.1.1.1.8.2 tls (unspec [(reg:DI 29)] UNSPEC_SIBCALL)] 7964 1.1.1.1.8.2 tls "! TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF" 7965 1.1.1.1.8.2 tls "@ 7966 1.1.1.1.8.2 tls br $31,$%1..ng 7967 1.1.1.1.8.2 tls lda $27,%1\;jmp $31,($27),%1" 7968 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7969 1.1.1.1.8.2 tls (set_attr "length" "*,8")]) 7970 1.1.1.1.8.2 tls 7971 1.1.1.1.8.2 tls (define_insn "*call_value_nt_1" 7972 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7973 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "r,R,s")) 7974 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7975 1.1.1.1.8.2 tls (clobber (reg:DI 26))] 7976 1.1.1.1.8.2 tls "TARGET_ABI_WINDOWS_NT" 7977 1.1.1.1.8.2 tls "@ 7978 1.1.1.1.8.2 tls jsr $26,(%1) 7979 1.1.1.1.8.2 tls bsr $26,%1 7980 1.1.1.1.8.2 tls jsr $26,%1" 7981 1.1.1.1.8.2 tls [(set_attr "type" "jsr") 7982 1.1.1.1.8.2 tls (set_attr "length" "*,*,12")]) 7983 1.1.1.1.8.2 tls 7984 1.1.1.1.8.2 tls ; GAS relies on the order and position of instructions output below in order 7985 1.1.1.1.8.2 tls ; to generate relocs for VMS link to potentially optimize the call. 7986 1.1.1.1.8.2 tls ; Please do not molest. 7987 1.1.1.1.8.2 tls (define_insn "*call_value_vms_1" 7988 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 7989 1.1.1.1.8.2 tls (call (mem:DI (match_operand:DI 1 "call_operand" "r,s")) 7990 1.1.1.1.8.2 tls (match_operand 2 "" ""))) 7991 1.1.1.1.8.2 tls (use (match_operand:DI 3 "nonmemory_operand" "r,n")) 7992 1.1.1.1.8.2 tls (use (reg:DI 25)) 7993 1.1.1.1.8.2 tls (use (reg:DI 26)) 7994 1.1.1.1.8.2 tls (clobber (reg:DI 27))] 7995 1.1.1.1.8.2 tls "TARGET_ABI_OPEN_VMS" 7996 1.1.1.1.8.2 tls { 7997 1.1.1.1.8.2 tls switch (which_alternative) 7998 { 7999 case 0: 8000 return "mov %3,$27\;jsr $26,0\;ldq $27,0($29)"; 8001 case 1: 8002 operands [3] = alpha_use_linkage (operands [1], cfun->decl, 1, 0); 8003 operands [4] = alpha_use_linkage (operands [1], cfun->decl, 0, 0); 8004 return "ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"; 8005 default: 8006 gcc_unreachable (); 8007 } 8008 } 8009 [(set_attr "type" "jsr") 8010 (set_attr "length" "12,16")]) 8011 8012 (define_insn "*call_value_umk" 8013 [(set (match_operand 0 "" "") 8014 (call (mem:DI (match_operand:DI 1 "call_operand" "r")) 8015 (match_operand 2 "" ""))) 8016 (use (reg:DI 25)) 8017 (clobber (reg:DI 26))] 8018 "TARGET_ABI_UNICOSMK" 8019 "jsr $26,(%1)" 8020 [(set_attr "type" "jsr")]) 8021
Indexes created Thu Sep 10 00:26:39 UTC 2026