arm-cpus.in revision 1.1.1.2
1 1.1 mrg # CPU, FPU and architecture specifications for ARM. 2 1.1 mrg # 3 1.1.1.2 mrg # Copyright (C) 2011-2018 Free Software Foundation, Inc. 4 1.1 mrg # 5 1.1 mrg # This file is part of GCC. 6 1.1 mrg # 7 1.1 mrg # GCC is free software; you can redistribute it and/or modify it under 8 1.1 mrg # the terms of the GNU General Public License as published by the Free 9 1.1 mrg # Software Foundation; either version 3, or (at your option) any later 10 1.1 mrg # version. 11 1.1 mrg # 12 1.1 mrg # GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13 1.1 mrg # WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 1.1 mrg # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 1.1 mrg # for more details. 16 1.1 mrg # 17 1.1 mrg # You should have received a copy of the GNU General Public License 18 1.1 mrg # along with GCC; see the file COPYING3. If not see 19 1.1 mrg # <http://www.gnu.org/licenses/>. 20 1.1 mrg 21 1.1 mrg # This file describes all the various CPUs, FPUs and architectures supported 22 1.1 mrg # by the compiler. It is pre-processed by parsecpu.awk for a number of 23 1.1 mrg # purposes. 24 1.1 mrg # 25 1.1 mrg # The general form is a sequence of begin..end blocks with the following 26 1.1 mrg # syntax: 27 1.1 mrg # begin <object-type> <name> 28 1.1 mrg # attribute-statement* 29 1.1 mrg # end <object-type> <name> 30 1.1 mrg # 31 1.1 mrg # where object type is one of "cpu" "arch" "fpu". Each object type has 32 1.1 mrg # a specific set of permitted attributes, some of which are optional; further 33 1.1 mrg # details can be found below. 34 1.1 mrg # 35 1.1 mrg # Some objects cross-reference other objects by name. Objects are permitted 36 1.1 mrg # in any order and it is not necessary to place a cross-referenced object 37 1.1 mrg # earlier in the file. 38 1.1 mrg # 39 1.1 mrg # The object names for cpu, arch and fpu objects are used for the public option 40 1.1 mrg # names in the final compiler. The order within each group is preserved and 41 1.1 mrg # forms the order for the list within the compiler. 42 1.1 mrg 43 1.1.1.2 mrg # Most objects in this file support forward references. The major 44 1.1.1.2 mrg # exception is feature groups, which may only refer to previously 45 1.1.1.2 mrg # defined features or feature groups. This is done to avoid the risk 46 1.1.1.2 mrg # of feature groups recursively referencing each other and causing 47 1.1.1.2 mrg # the parser to hang. 48 1.1.1.2 mrg 49 1.1.1.2 mrg # Features - general convention: all lower case. 50 1.1.1.2 mrg 51 1.1.1.2 mrg # Extended multiply 52 1.1.1.2 mrg define feature armv3m 53 1.1.1.2 mrg 54 1.1.1.2 mrg # 26-bit mode support 55 1.1.1.2 mrg define feature mode26 56 1.1.1.2 mrg 57 1.1.1.2 mrg # 32-bit mode support 58 1.1.1.2 mrg define feature mode32 59 1.1.1.2 mrg 60 1.1.1.2 mrg # Architecture rel 4 61 1.1.1.2 mrg define feature armv4 62 1.1.1.2 mrg 63 1.1.1.2 mrg # Architecture rel 5 64 1.1.1.2 mrg define feature armv5 65 1.1.1.2 mrg 66 1.1.1.2 mrg # Thumb aware. 67 1.1.1.2 mrg define feature thumb 68 1.1.1.2 mrg 69 1.1.1.2 mrg # Architecture rel 5e. 70 1.1.1.2 mrg define feature armv5e 71 1.1.1.2 mrg 72 1.1.1.2 mrg # XScale. 73 1.1.1.2 mrg define feature xscale 74 1.1.1.2 mrg 75 1.1.1.2 mrg # Architecture rel 6. 76 1.1.1.2 mrg define feature armv6 77 1.1.1.2 mrg 78 1.1.1.2 mrg # Architecture rel 6k. 79 1.1.1.2 mrg define feature armv6k 80 1.1.1.2 mrg 81 1.1.1.2 mrg # Thumb-2. 82 1.1.1.2 mrg define feature thumb2 83 1.1.1.2 mrg 84 1.1.1.2 mrg # Instructions not present in 'M' profile. 85 1.1.1.2 mrg define feature notm 86 1.1.1.2 mrg 87 1.1.1.2 mrg # Architecture uses be8 mode in big-endian. 88 1.1.1.2 mrg define feature be8 89 1.1.1.2 mrg 90 1.1.1.2 mrg # Thumb division instructions. 91 1.1.1.2 mrg define feature tdiv 92 1.1.1.2 mrg 93 1.1.1.2 mrg # Architecture rel 7e-m. 94 1.1.1.2 mrg define feature armv7em 95 1.1.1.2 mrg 96 1.1.1.2 mrg # Architecture rel 7. 97 1.1.1.2 mrg define feature armv7 98 1.1.1.2 mrg 99 1.1.1.2 mrg # MP extension to ArmV7-A 100 1.1.1.2 mrg define feature mp 101 1.1.1.2 mrg 102 1.1.1.2 mrg # SEC extension to ArmV7-A 103 1.1.1.2 mrg define feature sec 104 1.1.1.2 mrg 105 1.1.1.2 mrg # ARM division instructions. 106 1.1.1.2 mrg define feature adiv 107 1.1.1.2 mrg 108 1.1.1.2 mrg # Architecture rel 8. 109 1.1.1.2 mrg define feature armv8 110 1.1.1.2 mrg 111 1.1.1.2 mrg # ARMv8 CRC32 instructions. 112 1.1.1.2 mrg define feature crc32 113 1.1.1.2 mrg 114 1.1.1.2 mrg # XScale v2 (Wireless MMX). 115 1.1.1.2 mrg define feature iwmmxt 116 1.1.1.2 mrg 117 1.1.1.2 mrg # XScale Wireless MMX2. 118 1.1.1.2 mrg define feature iwmmxt2 119 1.1.1.2 mrg 120 1.1.1.2 mrg # Architecture rel 8.1. 121 1.1.1.2 mrg define feature armv8_1 122 1.1.1.2 mrg 123 1.1.1.2 mrg # Architecture rel 8.2. 124 1.1.1.2 mrg define feature armv8_2 125 1.1.1.2 mrg 126 1.1.1.2 mrg # Architecture rel 8.3. 127 1.1.1.2 mrg define feature armv8_3 128 1.1.1.2 mrg 129 1.1.1.2 mrg # Architecture rel 8.4. 130 1.1.1.2 mrg define feature armv8_4 131 1.1.1.2 mrg 132 1.1.1.2 mrg # M-Profile security extensions. 133 1.1.1.2 mrg define feature cmse 134 1.1.1.2 mrg 135 1.1.1.2 mrg # Floating point and Neon extensions. 136 1.1.1.2 mrg # VFPv1 is not supported in GCC. 137 1.1.1.2 mrg 138 1.1.1.2 mrg # Vector floating point v2. 139 1.1.1.2 mrg define feature vfpv2 140 1.1.1.2 mrg 141 1.1.1.2 mrg # Vector floating point v3. 142 1.1.1.2 mrg define feature vfpv3 143 1.1.1.2 mrg 144 1.1.1.2 mrg # Vector floating point v4. 145 1.1.1.2 mrg define feature vfpv4 146 1.1.1.2 mrg 147 1.1.1.2 mrg # Floating point v5. 148 1.1.1.2 mrg define feature fpv5 149 1.1.1.2 mrg 150 1.1.1.2 mrg # ARMv7-A LPAE. 151 1.1.1.2 mrg define feature lpae 152 1.1.1.2 mrg 153 1.1.1.2 mrg # Advanced SIMD instructions. 154 1.1.1.2 mrg define feature neon 155 1.1.1.2 mrg 156 1.1.1.2 mrg # Conversions to/from fp16 (VFPv3 extension). 157 1.1.1.2 mrg define feature fp16conv 158 1.1.1.2 mrg 159 1.1.1.2 mrg # Double precision operations supported. 160 1.1.1.2 mrg define feature fp_dbl 161 1.1.1.2 mrg 162 1.1.1.2 mrg # 32 Double precision registers. 163 1.1.1.2 mrg define feature fp_d32 164 1.1.1.2 mrg 165 1.1.1.2 mrg # Crypto extension to ARMv8. 166 1.1.1.2 mrg define feature crypto 167 1.1.1.2 mrg 168 1.1.1.2 mrg # FP16 data processing (half-precision float). 169 1.1.1.2 mrg define feature fp16 170 1.1.1.2 mrg 171 1.1.1.2 mrg # Dot Product instructions extension to ARMv8.2-a. 172 1.1.1.2 mrg define feature dotprod 173 1.1.1.2 mrg 174 1.1.1.2 mrg # Half-precision floating-point instructions in ARMv8.4-A. 175 1.1.1.2 mrg define feature fp16fml 176 1.1.1.2 mrg 177 1.1.1.2 mrg # ISA Quirks (errata?). Don't forget to add this to the fgroup 178 1.1.1.2 mrg # ALL_QUIRKS below. 179 1.1.1.2 mrg 180 1.1.1.2 mrg # No volatile memory in IT blocks. 181 1.1.1.2 mrg define feature quirk_no_volatile_ce 182 1.1.1.2 mrg 183 1.1.1.2 mrg # Previously mis-identified by GCC. 184 1.1.1.2 mrg define feature quirk_armv6kz 185 1.1.1.2 mrg 186 1.1.1.2 mrg # Cortex-M3 LDRD quirk. 187 1.1.1.2 mrg define feature quirk_cm3_ldrd 188 1.1.1.2 mrg 189 1.1.1.2 mrg # (Very) slow multiply operations. Should probably be a tuning bit. 190 1.1.1.2 mrg define feature smallmul 191 1.1.1.2 mrg 192 1.1.1.2 mrg # Feature groups. Conventionally all (or mostly) upper case. 193 1.1.1.2 mrg # ALL_FPU lists all the feature bits associated with the floating-point 194 1.1.1.2 mrg # unit; these will all be removed if the floating-point unit is disabled 195 1.1.1.2 mrg # (eg -mfloat-abi=soft). ALL_FPU_INTERNAL must ONLY contain features that 196 1.1.1.2 mrg # form part of a named -mfpu option; it is used to map the capabilities 197 1.1.1.2 mrg # back to a named FPU for the benefit of the assembler. 198 1.1.1.2 mrg # 199 1.1.1.2 mrg # ALL_SIMD_INTERNAL and ALL_SIMD are similarly defined to help with the 200 1.1.1.2 mrg # construction of ALL_FPU and ALL_FPU_INTERNAL; they describe the SIMD 201 1.1.1.2 mrg # extensions that are either part of a named FPU or optional extensions 202 1.1.1.2 mrg # respectively. 203 1.1.1.2 mrg 204 1.1.1.2 mrg 205 1.1.1.2 mrg # List of all cryptographic extensions to stripout if crypto is 206 1.1.1.2 mrg # disabled. Currently, that's trivial, but we define it anyway for 207 1.1.1.2 mrg # consistency with the SIMD and FP disable lists. 208 1.1.1.2 mrg define fgroup ALL_CRYPTO crypto 209 1.1.1.2 mrg 210 1.1.1.2 mrg # List of all SIMD bits to strip out if SIMD is disabled. This does 211 1.1.1.2 mrg # strip off 32 D-registers, but does not remove support for 212 1.1.1.2 mrg # double-precision FP. 213 1.1.1.2 mrg define fgroup ALL_SIMD_INTERNAL fp_d32 neon ALL_CRYPTO 214 1.1.1.2 mrg define fgroup ALL_SIMD ALL_SIMD_INTERNAL dotprod fp16fml 215 1.1.1.2 mrg 216 1.1.1.2 mrg # List of all FPU bits to strip out if -mfpu is used to override the 217 1.1.1.2 mrg # default. fp16 is deliberately missing from this list. 218 1.1.1.2 mrg define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL 219 1.1.1.2 mrg 220 1.1.1.2 mrg # Similarly, but including fp16 and other extensions that aren't part of 221 1.1.1.2 mrg # -mfpu support. 222 1.1.1.2 mrg define fgroup ALL_FP fp16 ALL_FPU_INTERNAL 223 1.1.1.2 mrg 224 1.1.1.2 mrg define fgroup ARMv2 notm 225 1.1.1.2 mrg define fgroup ARMv3 ARMv2 mode32 226 1.1.1.2 mrg define fgroup ARMv3m ARMv3 armv3m 227 1.1.1.2 mrg define fgroup ARMv4 ARMv3m armv4 228 1.1.1.2 mrg define fgroup ARMv4t ARMv4 thumb 229 1.1.1.2 mrg define fgroup ARMv5 ARMv4 armv5 230 1.1.1.2 mrg define fgroup ARMv5t ARMv5 thumb 231 1.1.1.2 mrg define fgroup ARMv5e ARMv5 armv5e 232 1.1.1.2 mrg define fgroup ARMv5te ARMv5e thumb 233 1.1.1.2 mrg define fgroup ARMv5tej ARMv5te 234 1.1.1.2 mrg define fgroup ARMv6 ARMv5te armv6 be8 235 1.1.1.2 mrg define fgroup ARMv6j ARMv6 236 1.1.1.2 mrg define fgroup ARMv6k ARMv6 armv6k 237 1.1.1.2 mrg define fgroup ARMv6z ARMv6 238 1.1.1.2 mrg define fgroup ARMv6kz ARMv6k quirk_armv6kz 239 1.1.1.2 mrg define fgroup ARMv6zk ARMv6k 240 1.1.1.2 mrg define fgroup ARMv6t2 ARMv6 thumb2 241 1.1.1.2 mrg # This is suspect. ARMv6-m doesn't really pull in any useful features 242 1.1.1.2 mrg # from ARMv5* or ARMv6. 243 1.1.1.2 mrg define fgroup ARMv6m mode32 armv3m armv4 thumb armv5 armv5e armv6 be8 244 1.1.1.2 mrg # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and 245 1.1.1.2 mrg # integer SIMD instructions that are in ARMv6T2. */ 246 1.1.1.2 mrg define fgroup ARMv7 ARMv6m thumb2 armv7 247 1.1.1.2 mrg 248 1.1.1.2 mrg define fgroup ARMv7a ARMv7 notm armv6k 249 1.1.1.2 mrg define fgroup ARMv7ve ARMv7a adiv tdiv lpae mp sec 250 1.1.1.2 mrg define fgroup ARMv7r ARMv7a tdiv 251 1.1.1.2 mrg define fgroup ARMv7m ARMv7 tdiv 252 1.1.1.2 mrg define fgroup ARMv7em ARMv7m armv7em 253 1.1.1.2 mrg define fgroup ARMv8a ARMv7ve armv8 254 1.1.1.2 mrg define fgroup ARMv8_1a ARMv8a crc32 armv8_1 255 1.1.1.2 mrg define fgroup ARMv8_2a ARMv8_1a armv8_2 256 1.1.1.2 mrg define fgroup ARMv8_3a ARMv8_2a armv8_3 257 1.1.1.2 mrg define fgroup ARMv8_4a ARMv8_3a armv8_4 258 1.1.1.2 mrg define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv 259 1.1.1.2 mrg define fgroup ARMv8m_main ARMv7m armv8 cmse 260 1.1.1.2 mrg define fgroup ARMv8r ARMv8a 261 1.1.1.2 mrg 262 1.1.1.2 mrg # Useful combinations. 263 1.1.1.2 mrg define fgroup VFPv2 vfpv2 264 1.1.1.2 mrg define fgroup VFPv3 VFPv2 vfpv3 265 1.1.1.2 mrg define fgroup VFPv4 VFPv3 vfpv4 fp16conv 266 1.1.1.2 mrg define fgroup FPv5 VFPv4 fpv5 267 1.1.1.2 mrg 268 1.1.1.2 mrg define fgroup FP_DBL fp_dbl 269 1.1.1.2 mrg define fgroup FP_D32 FP_DBL fp_d32 270 1.1.1.2 mrg define fgroup FP_ARMv8 FPv5 FP_D32 271 1.1.1.2 mrg define fgroup NEON FP_D32 neon 272 1.1.1.2 mrg define fgroup CRYPTO NEON crypto 273 1.1.1.2 mrg define fgroup DOTPROD NEON dotprod 274 1.1.1.2 mrg 275 1.1.1.2 mrg # List of all quirk bits to strip out when comparing CPU features with 276 1.1.1.2 mrg # architectures. 277 1.1.1.2 mrg # xscale isn't really a 'quirk', but it isn't an architecture either and we 278 1.1.1.2 mrg # need to ignore it for matching purposes. 279 1.1.1.2 mrg define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd xscale 280 1.1.1.2 mrg 281 1.1 mrg # Architecture entries 282 1.1 mrg # format: 283 1.1 mrg # begin arch <name> 284 1.1 mrg # tune for <cpu> 285 1.1 mrg # [tune flags <list>] 286 1.1 mrg # base <name> 287 1.1.1.2 mrg # [profile <A|R|M>] 288 1.1 mrg # isa <isa-flags-list> 289 1.1 mrg # end arch <name> 290 1.1 mrg # 291 1.1 mrg 292 1.1 mrg begin arch armv2 293 1.1 mrg tune for arm2 294 1.1 mrg tune flags CO_PROC NO_MODE32 295 1.1 mrg base 2 296 1.1.1.2 mrg isa ARMv2 mode26 297 1.1 mrg end arch armv2 298 1.1 mrg 299 1.1 mrg begin arch armv2a 300 1.1 mrg tune for arm2 301 1.1 mrg tune flags CO_PROC NO_MODE32 302 1.1 mrg base 2 303 1.1.1.2 mrg isa ARMv2 mode26 304 1.1 mrg end arch armv2a 305 1.1 mrg 306 1.1 mrg begin arch armv3 307 1.1 mrg tune for arm6 308 1.1 mrg tune flags CO_PROC 309 1.1 mrg base 3 310 1.1.1.2 mrg isa ARMv3 mode26 311 1.1 mrg end arch armv3 312 1.1 mrg 313 1.1 mrg begin arch armv3m 314 1.1 mrg tune for arm7m 315 1.1 mrg tune flags CO_PROC 316 1.1 mrg base 3M 317 1.1.1.2 mrg isa ARMv3m mode26 318 1.1 mrg end arch armv3m 319 1.1 mrg 320 1.1 mrg begin arch armv4 321 1.1 mrg tune for arm7tdmi 322 1.1 mrg tune flags CO_PROC 323 1.1 mrg base 4 324 1.1.1.2 mrg isa ARMv4 mode26 325 1.1 mrg end arch armv4 326 1.1 mrg 327 1.1.1.2 mrg # Strictly, mode26 is a permitted option for v4t, but there are no 328 1.1 mrg # implementations that support it, so we will leave it out for now. 329 1.1 mrg begin arch armv4t 330 1.1 mrg tune for arm7tdmi 331 1.1 mrg tune flags CO_PROC 332 1.1 mrg base 4T 333 1.1 mrg isa ARMv4t 334 1.1 mrg end arch armv4t 335 1.1 mrg 336 1.1 mrg begin arch armv5 337 1.1 mrg tune for arm10tdmi 338 1.1 mrg tune flags CO_PROC 339 1.1 mrg base 5 340 1.1 mrg isa ARMv5 341 1.1 mrg end arch armv5 342 1.1 mrg 343 1.1 mrg begin arch armv5t 344 1.1 mrg tune for arm10tdmi 345 1.1 mrg tune flags CO_PROC 346 1.1 mrg base 5T 347 1.1 mrg isa ARMv5t 348 1.1 mrg end arch armv5t 349 1.1 mrg 350 1.1 mrg begin arch armv5e 351 1.1 mrg tune for arm1026ej-s 352 1.1 mrg tune flags CO_PROC 353 1.1 mrg base 5E 354 1.1 mrg isa ARMv5e 355 1.1.1.2 mrg option fp add VFPv2 FP_DBL 356 1.1.1.2 mrg optalias vfpv2 fp 357 1.1.1.2 mrg option nofp remove ALL_FP 358 1.1 mrg end arch armv5e 359 1.1 mrg 360 1.1 mrg begin arch armv5te 361 1.1 mrg tune for arm1026ej-s 362 1.1 mrg tune flags CO_PROC 363 1.1 mrg base 5TE 364 1.1 mrg isa ARMv5te 365 1.1.1.2 mrg option fp add VFPv2 FP_DBL 366 1.1.1.2 mrg optalias vfpv2 fp 367 1.1.1.2 mrg option nofp remove ALL_FP 368 1.1 mrg end arch armv5te 369 1.1 mrg 370 1.1 mrg begin arch armv5tej 371 1.1 mrg tune for arm1026ej-s 372 1.1 mrg tune flags CO_PROC 373 1.1 mrg base 5TEJ 374 1.1 mrg isa ARMv5tej 375 1.1.1.2 mrg option fp add VFPv2 FP_DBL 376 1.1.1.2 mrg optalias vfpv2 fp 377 1.1.1.2 mrg option nofp remove ALL_FP 378 1.1 mrg end arch armv5tej 379 1.1 mrg 380 1.1 mrg begin arch armv6 381 1.1 mrg tune for arm1136j-s 382 1.1 mrg tune flags CO_PROC 383 1.1 mrg base 6 384 1.1 mrg isa ARMv6 385 1.1.1.2 mrg option fp add VFPv2 FP_DBL 386 1.1.1.2 mrg optalias vfpv2 fp 387 1.1.1.2 mrg option nofp remove ALL_FP 388 1.1 mrg end arch armv6 389 1.1 mrg 390 1.1 mrg begin arch armv6j 391 1.1 mrg tune for arm1136j-s 392 1.1 mrg tune flags CO_PROC 393 1.1 mrg base 6J 394 1.1 mrg isa ARMv6j 395 1.1.1.2 mrg option fp add VFPv2 FP_DBL 396 1.1.1.2 mrg optalias vfpv2 fp 397 1.1.1.2 mrg option nofp remove ALL_FP 398 1.1 mrg end arch armv6j 399 1.1 mrg 400 1.1 mrg begin arch armv6k 401 1.1 mrg tune for mpcore 402 1.1 mrg tune flags CO_PROC 403 1.1 mrg base 6K 404 1.1 mrg isa ARMv6k 405 1.1.1.2 mrg option fp add VFPv2 FP_DBL 406 1.1.1.2 mrg optalias vfpv2 fp 407 1.1.1.2 mrg option nofp remove ALL_FP 408 1.1 mrg end arch armv6k 409 1.1 mrg 410 1.1 mrg begin arch armv6z 411 1.1 mrg tune for arm1176jz-s 412 1.1 mrg tune flags CO_PROC 413 1.1 mrg base 6Z 414 1.1 mrg isa ARMv6z 415 1.1.1.2 mrg option fp add VFPv2 FP_DBL 416 1.1.1.2 mrg optalias vfpv2 fp 417 1.1.1.2 mrg option nofp remove ALL_FP 418 1.1 mrg end arch armv6z 419 1.1 mrg 420 1.1 mrg begin arch armv6kz 421 1.1 mrg tune for arm1176jz-s 422 1.1 mrg tune flags CO_PROC 423 1.1 mrg base 6KZ 424 1.1 mrg isa ARMv6kz 425 1.1.1.2 mrg option fp add VFPv2 FP_DBL 426 1.1.1.2 mrg optalias vfpv2 fp 427 1.1.1.2 mrg option nofp remove ALL_FP 428 1.1 mrg end arch armv6kz 429 1.1 mrg 430 1.1 mrg begin arch armv6zk 431 1.1 mrg tune for arm1176jz-s 432 1.1 mrg tune flags CO_PROC 433 1.1 mrg base 6KZ 434 1.1 mrg isa ARMv6kz 435 1.1.1.2 mrg option fp add VFPv2 FP_DBL 436 1.1.1.2 mrg optalias vfpv2 fp 437 1.1.1.2 mrg option nofp remove ALL_FP 438 1.1 mrg end arch armv6zk 439 1.1 mrg 440 1.1 mrg begin arch armv6t2 441 1.1 mrg tune for arm1156t2-s 442 1.1 mrg tune flags CO_PROC 443 1.1 mrg base 6T2 444 1.1 mrg isa ARMv6t2 445 1.1.1.2 mrg option fp add VFPv2 FP_DBL 446 1.1.1.2 mrg optalias vfpv2 fp 447 1.1.1.2 mrg option nofp remove ALL_FP 448 1.1 mrg end arch armv6t2 449 1.1 mrg 450 1.1 mrg begin arch armv6-m 451 1.1 mrg tune for cortex-m1 452 1.1 mrg base 6M 453 1.1.1.2 mrg profile M 454 1.1 mrg isa ARMv6m 455 1.1 mrg end arch armv6-m 456 1.1 mrg 457 1.1.1.2 mrg # This is now equivalent to armv6-m, but we keep it because some 458 1.1.1.2 mrg # versions of GAS still distinguish between the two. 459 1.1 mrg begin arch armv6s-m 460 1.1 mrg tune for cortex-m1 461 1.1 mrg base 6M 462 1.1.1.2 mrg profile M 463 1.1 mrg isa ARMv6m 464 1.1 mrg end arch armv6s-m 465 1.1 mrg 466 1.1 mrg begin arch armv7 467 1.1 mrg tune for cortex-a8 468 1.1 mrg tune flags CO_PROC 469 1.1 mrg base 7 470 1.1 mrg isa ARMv7 471 1.1.1.2 mrg # fp => VFPv3-d16 (only useful for the A+R profile subset). 472 1.1.1.2 mrg option fp add VFPv3 FP_DBL 473 1.1.1.2 mrg optalias vfpv3-d16 fp 474 1.1.1.2 mrg option nofp remove ALL_FP 475 1.1 mrg end arch armv7 476 1.1 mrg 477 1.1 mrg begin arch armv7-a 478 1.1 mrg tune for cortex-a8 479 1.1 mrg tune flags CO_PROC 480 1.1 mrg base 7A 481 1.1.1.2 mrg profile A 482 1.1 mrg isa ARMv7a 483 1.1.1.2 mrg option mp add mp 484 1.1.1.2 mrg option sec add sec 485 1.1.1.2 mrg # fp => VFPv3-d16, simd => neon-vfpv3 486 1.1.1.2 mrg option fp add VFPv3 FP_DBL 487 1.1.1.2 mrg optalias vfpv3-d16 fp 488 1.1.1.2 mrg option vfpv3 add VFPv3 FP_D32 489 1.1.1.2 mrg option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 490 1.1.1.2 mrg option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv 491 1.1.1.2 mrg option vfpv4-d16 add VFPv4 FP_DBL 492 1.1.1.2 mrg option vfpv4 add VFPv4 FP_D32 493 1.1.1.2 mrg option simd add VFPv3 NEON 494 1.1.1.2 mrg optalias neon simd 495 1.1.1.2 mrg optalias neon-vfpv3 simd 496 1.1.1.2 mrg option neon-fp16 add VFPv3 NEON fp16conv 497 1.1.1.2 mrg option neon-vfpv4 add VFPv4 NEON 498 1.1.1.2 mrg option nosimd remove ALL_SIMD 499 1.1.1.2 mrg option nofp remove ALL_FP 500 1.1 mrg end arch armv7-a 501 1.1 mrg 502 1.1 mrg begin arch armv7ve 503 1.1 mrg tune for cortex-a8 504 1.1 mrg tune flags CO_PROC 505 1.1 mrg base 7A 506 1.1.1.2 mrg profile A 507 1.1 mrg isa ARMv7ve 508 1.1.1.2 mrg # fp => VFPv4-d16, simd => neon-vfpv4 509 1.1.1.2 mrg option vfpv3-d16 add VFPv3 FP_DBL 510 1.1.1.2 mrg option vfpv3 add VFPv3 FP_D32 511 1.1.1.2 mrg option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 512 1.1.1.2 mrg option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv 513 1.1.1.2 mrg option fp add VFPv4 FP_DBL 514 1.1.1.2 mrg optalias vfpv4-d16 fp 515 1.1.1.2 mrg option vfpv4 add VFPv4 FP_D32 516 1.1.1.2 mrg option neon add VFPv3 NEON 517 1.1.1.2 mrg optalias neon-vfpv3 neon 518 1.1.1.2 mrg option neon-fp16 add VFPv3 NEON fp16conv 519 1.1.1.2 mrg option simd add VFPv4 NEON 520 1.1.1.2 mrg optalias neon-vfpv4 simd 521 1.1.1.2 mrg option nosimd remove ALL_SIMD 522 1.1.1.2 mrg option nofp remove ALL_FP 523 1.1 mrg end arch armv7ve 524 1.1 mrg 525 1.1 mrg begin arch armv7-r 526 1.1 mrg tune for cortex-r4 527 1.1 mrg tune flags CO_PROC 528 1.1 mrg base 7R 529 1.1.1.2 mrg profile R 530 1.1 mrg isa ARMv7r 531 1.1.1.2 mrg # ARMv7-r uses VFPv3-d16 532 1.1.1.2 mrg option fp.sp add VFPv3 533 1.1.1.2 mrg optalias vfpv3xd fp.sp 534 1.1.1.2 mrg option fp add VFPv3 FP_DBL 535 1.1.1.2 mrg optalias vfpv3-d16 fp 536 1.1.1.2 mrg option vfpv3xd-fp16 add VFPv3 fp16conv 537 1.1.1.2 mrg option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 538 1.1.1.2 mrg option idiv add adiv 539 1.1.1.2 mrg option nofp remove ALL_FP 540 1.1.1.2 mrg option noidiv remove adiv 541 1.1 mrg end arch armv7-r 542 1.1 mrg 543 1.1 mrg begin arch armv7-m 544 1.1 mrg tune for cortex-m3 545 1.1 mrg tune flags CO_PROC 546 1.1 mrg base 7M 547 1.1.1.2 mrg profile M 548 1.1 mrg isa ARMv7m 549 1.1.1.2 mrg # In theory FP is permitted in v7-m, but in practice no implementations exist. 550 1.1.1.2 mrg # leave it out for now. 551 1.1 mrg end arch armv7-m 552 1.1 mrg 553 1.1 mrg begin arch armv7e-m 554 1.1 mrg tune for cortex-m4 555 1.1 mrg tune flags CO_PROC 556 1.1 mrg base 7EM 557 1.1.1.2 mrg profile M 558 1.1 mrg isa ARMv7em 559 1.1.1.2 mrg # fp => VFPv4-sp-d16; fpv5 => FPv5-sp-d16; fp.dp => FPv5-d16 560 1.1.1.2 mrg option fp add VFPv4 561 1.1.1.2 mrg optalias vfpv4-sp-d16 fp 562 1.1.1.2 mrg option fpv5 add FPv5 563 1.1.1.2 mrg option fp.dp add FPv5 FP_DBL 564 1.1.1.2 mrg optalias fpv5-d16 fp.dp 565 1.1.1.2 mrg option nofp remove ALL_FP 566 1.1 mrg end arch armv7e-m 567 1.1 mrg 568 1.1 mrg begin arch armv8-a 569 1.1 mrg tune for cortex-a53 570 1.1 mrg tune flags CO_PROC 571 1.1 mrg base 8A 572 1.1.1.2 mrg profile A 573 1.1 mrg isa ARMv8a 574 1.1.1.2 mrg option crc add crc32 575 1.1.1.2 mrg option simd add FP_ARMv8 NEON 576 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 577 1.1.1.2 mrg option nocrypto remove ALL_CRYPTO 578 1.1.1.2 mrg option nofp remove ALL_FP 579 1.1 mrg end arch armv8-a 580 1.1 mrg 581 1.1 mrg begin arch armv8.1-a 582 1.1 mrg tune for cortex-a53 583 1.1 mrg tune flags CO_PROC 584 1.1 mrg base 8A 585 1.1.1.2 mrg profile A 586 1.1 mrg isa ARMv8_1a 587 1.1.1.2 mrg option simd add FP_ARMv8 NEON 588 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 589 1.1.1.2 mrg option nocrypto remove ALL_CRYPTO 590 1.1.1.2 mrg option nofp remove ALL_FP 591 1.1 mrg end arch armv8.1-a 592 1.1 mrg 593 1.1 mrg begin arch armv8.2-a 594 1.1 mrg tune for cortex-a53 595 1.1 mrg tune flags CO_PROC 596 1.1 mrg base 8A 597 1.1.1.2 mrg profile A 598 1.1 mrg isa ARMv8_2a 599 1.1.1.2 mrg option simd add FP_ARMv8 NEON 600 1.1.1.2 mrg option fp16 add fp16 FP_ARMv8 NEON 601 1.1.1.2 mrg option fp16fml add fp16fml fp16 FP_ARMv8 NEON 602 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 603 1.1.1.2 mrg option nocrypto remove ALL_CRYPTO 604 1.1.1.2 mrg option nofp remove ALL_FP 605 1.1.1.2 mrg option dotprod add FP_ARMv8 DOTPROD 606 1.1 mrg end arch armv8.2-a 607 1.1 mrg 608 1.1.1.2 mrg begin arch armv8.3-a 609 1.1.1.2 mrg tune for cortex-a53 610 1.1.1.2 mrg tune flags CO_PROC 611 1.1.1.2 mrg base 8A 612 1.1.1.2 mrg profile A 613 1.1.1.2 mrg isa ARMv8_3a 614 1.1.1.2 mrg option simd add FP_ARMv8 NEON 615 1.1.1.2 mrg option fp16 add fp16 FP_ARMv8 NEON 616 1.1.1.2 mrg option fp16fml add fp16fml fp16 FP_ARMv8 NEON 617 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 618 1.1.1.2 mrg option nocrypto remove ALL_CRYPTO 619 1.1.1.2 mrg option nofp remove ALL_FP 620 1.1.1.2 mrg option dotprod add FP_ARMv8 DOTPROD 621 1.1.1.2 mrg end arch armv8.3-a 622 1.1.1.2 mrg 623 1.1.1.2 mrg begin arch armv8.4-a 624 1.1 mrg tune for cortex-a53 625 1.1 mrg tune flags CO_PROC 626 1.1 mrg base 8A 627 1.1.1.2 mrg profile A 628 1.1.1.2 mrg isa ARMv8_4a 629 1.1.1.2 mrg option simd add FP_ARMv8 DOTPROD 630 1.1.1.2 mrg option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD 631 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO DOTPROD 632 1.1.1.2 mrg option nocrypto remove ALL_CRYPTO 633 1.1.1.2 mrg option nofp remove ALL_FP 634 1.1.1.2 mrg end arch armv8.4-a 635 1.1 mrg 636 1.1 mrg begin arch armv8-m.base 637 1.1 mrg tune for cortex-m23 638 1.1 mrg base 8M_BASE 639 1.1.1.2 mrg profile M 640 1.1 mrg isa ARMv8m_base 641 1.1 mrg end arch armv8-m.base 642 1.1 mrg 643 1.1 mrg begin arch armv8-m.main 644 1.1 mrg tune for cortex-m7 645 1.1 mrg tune flags CO_PROC 646 1.1 mrg base 8M_MAIN 647 1.1.1.2 mrg profile M 648 1.1 mrg isa ARMv8m_main 649 1.1.1.2 mrg option dsp add armv7em 650 1.1.1.2 mrg # fp => FPv5-sp-d16; fp.dp => FPv5-d16 651 1.1.1.2 mrg option fp add FPv5 652 1.1.1.2 mrg option fp.dp add FPv5 FP_DBL 653 1.1.1.2 mrg option nofp remove ALL_FP 654 1.1.1.2 mrg option nodsp remove armv7em 655 1.1 mrg end arch armv8-m.main 656 1.1 mrg 657 1.1.1.2 mrg begin arch armv8-r 658 1.1.1.2 mrg tune for cortex-r52 659 1.1 mrg tune flags CO_PROC 660 1.1.1.2 mrg base 8R 661 1.1.1.2 mrg profile R 662 1.1.1.2 mrg isa ARMv8r 663 1.1.1.2 mrg option crc add crc32 664 1.1.1.2 mrg # fp.sp => fp-armv8 (d16); simd => simd + fp-armv8 + d32 + double precision 665 1.1.1.2 mrg # note: no fp option for fp-armv8 (d16) + double precision at the moment 666 1.1.1.2 mrg option fp.sp add FPv5 667 1.1.1.2 mrg option simd add FP_ARMv8 NEON 668 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 669 1.1.1.2 mrg option nocrypto remove ALL_CRYPTO 670 1.1.1.2 mrg option nofp remove ALL_FP 671 1.1.1.2 mrg end arch armv8-r 672 1.1 mrg 673 1.1 mrg begin arch iwmmxt 674 1.1 mrg tune for iwmmxt 675 1.1 mrg tune flags LDSCHED STRONG XSCALE 676 1.1 mrg base 5TE 677 1.1.1.2 mrg isa ARMv5te xscale iwmmxt 678 1.1 mrg end arch iwmmxt 679 1.1 mrg 680 1.1 mrg begin arch iwmmxt2 681 1.1 mrg tune for iwmmxt2 682 1.1 mrg tune flags LDSCHED STRONG XSCALE 683 1.1 mrg base 5TE 684 1.1.1.2 mrg isa ARMv5te xscale iwmmxt iwmmxt2 685 1.1 mrg end arch iwmmxt2 686 1.1 mrg 687 1.1 mrg # CPU entries 688 1.1 mrg # format: 689 1.1 mrg # begin cpu <name> 690 1.1 mrg # [cname <c-compatible-name>] 691 1.1 mrg # [tune for <cpu-name>] 692 1.1 mrg # [tune flags <list>] 693 1.1 mrg # architecture <name> 694 1.1 mrg # [fpu <name>] 695 1.1 mrg # [isa <additional-isa-flags-list>] 696 1.1.1.2 mrg # [option <name> add|remove <isa-list>]* 697 1.1.1.2 mrg # [optalias <name> <optname>]* 698 1.1 mrg # [costs <name>] 699 1.1 mrg # end cpu <name> 700 1.1 mrg # 701 1.1 mrg # If omitted, cname is formed from transforming the cpuname to convert 702 1.1 mrg # non-valid punctuation characters to '_'. 703 1.1 mrg # If specified, tune for specifies a CPU target to use for tuning this core. 704 1.1 mrg # isa flags are appended to those defined by the architecture. 705 1.1.1.2 mrg # Each add option must have a distinct feature set and each remove 706 1.1.1.2 mrg # option must similarly have a distinct feature set. Option aliases can be 707 1.1.1.2 mrg # added with the optalias statement 708 1.1 mrg 709 1.1 mrg # V2/V2A Architecture Processors 710 1.1 mrg begin cpu arm2 711 1.1 mrg tune flags CO_PROC NO_MODE32 712 1.1 mrg architecture armv2 713 1.1 mrg costs slowmul 714 1.1 mrg end cpu arm2 715 1.1 mrg 716 1.1 mrg begin cpu arm250 717 1.1 mrg tune flags CO_PROC NO_MODE32 718 1.1 mrg architecture armv2 719 1.1 mrg costs slowmul 720 1.1 mrg end cpu arm250 721 1.1 mrg 722 1.1 mrg begin cpu arm3 723 1.1 mrg tune flags CO_PROC NO_MODE32 724 1.1 mrg architecture armv2 725 1.1 mrg costs slowmul 726 1.1 mrg end cpu arm3 727 1.1 mrg 728 1.1 mrg 729 1.1 mrg # V3 Architecture Processors 730 1.1 mrg begin cpu arm6 731 1.1 mrg tune flags CO_PROC 732 1.1 mrg architecture armv3 733 1.1 mrg costs slowmul 734 1.1 mrg end cpu arm6 735 1.1 mrg 736 1.1 mrg begin cpu arm60 737 1.1 mrg tune flags CO_PROC 738 1.1 mrg architecture armv3 739 1.1 mrg costs slowmul 740 1.1 mrg end cpu arm60 741 1.1 mrg 742 1.1 mrg begin cpu arm600 743 1.1 mrg tune flags CO_PROC WBUF 744 1.1 mrg architecture armv3 745 1.1 mrg costs slowmul 746 1.1 mrg end cpu arm600 747 1.1 mrg 748 1.1 mrg begin cpu arm610 749 1.1 mrg tune flags WBUF 750 1.1 mrg architecture armv3 751 1.1 mrg costs slowmul 752 1.1 mrg end cpu arm610 753 1.1 mrg 754 1.1 mrg begin cpu arm620 755 1.1 mrg tune flags CO_PROC WBUF 756 1.1 mrg architecture armv3 757 1.1 mrg costs slowmul 758 1.1 mrg end cpu arm620 759 1.1 mrg 760 1.1 mrg begin cpu arm7 761 1.1 mrg tune flags CO_PROC 762 1.1 mrg architecture armv3 763 1.1 mrg costs slowmul 764 1.1 mrg end cpu arm7 765 1.1 mrg 766 1.1 mrg begin cpu arm7d 767 1.1 mrg tune flags CO_PROC 768 1.1 mrg architecture armv3 769 1.1 mrg costs slowmul 770 1.1 mrg end cpu arm7d 771 1.1 mrg 772 1.1 mrg begin cpu arm7di 773 1.1 mrg tune flags CO_PROC 774 1.1 mrg architecture armv3 775 1.1 mrg costs slowmul 776 1.1 mrg end cpu arm7di 777 1.1 mrg 778 1.1 mrg begin cpu arm70 779 1.1 mrg tune flags CO_PROC 780 1.1 mrg architecture armv3 781 1.1 mrg costs slowmul 782 1.1 mrg end cpu arm70 783 1.1 mrg 784 1.1 mrg begin cpu arm700 785 1.1 mrg tune flags CO_PROC WBUF 786 1.1 mrg architecture armv3 787 1.1 mrg costs slowmul 788 1.1 mrg end cpu arm700 789 1.1 mrg 790 1.1 mrg begin cpu arm700i 791 1.1 mrg tune flags CO_PROC WBUF 792 1.1 mrg architecture armv3 793 1.1 mrg costs slowmul 794 1.1 mrg end cpu arm700i 795 1.1 mrg 796 1.1 mrg begin cpu arm710 797 1.1 mrg tune flags WBUF 798 1.1 mrg architecture armv3 799 1.1 mrg costs slowmul 800 1.1 mrg end cpu arm710 801 1.1 mrg 802 1.1 mrg begin cpu arm720 803 1.1 mrg tune flags WBUF 804 1.1 mrg architecture armv3 805 1.1 mrg costs slowmul 806 1.1 mrg end cpu arm720 807 1.1 mrg 808 1.1 mrg begin cpu arm710c 809 1.1 mrg tune flags WBUF 810 1.1 mrg architecture armv3 811 1.1 mrg costs slowmul 812 1.1 mrg end cpu arm710c 813 1.1 mrg 814 1.1 mrg begin cpu arm7100 815 1.1 mrg tune flags WBUF 816 1.1 mrg architecture armv3 817 1.1 mrg costs slowmul 818 1.1 mrg end cpu arm7100 819 1.1 mrg 820 1.1 mrg begin cpu arm7500 821 1.1 mrg tune flags WBUF 822 1.1 mrg architecture armv3 823 1.1 mrg costs slowmul 824 1.1 mrg end cpu arm7500 825 1.1 mrg 826 1.1 mrg # Doesn't have an external co-proc, but does have embedded FPA 827 1.1 mrg # (the FPA part is no-longer supported). 828 1.1 mrg begin cpu arm7500fe 829 1.1 mrg tune flags CO_PROC WBUF 830 1.1 mrg architecture armv3 831 1.1 mrg costs slowmul 832 1.1 mrg end cpu arm7500fe 833 1.1 mrg 834 1.1 mrg 835 1.1 mrg # V3M Architecture Processors 836 1.1 mrg # arm7m doesn't exist on its own, but only with "D", (and "I"), but 837 1.1 mrg # those don't alter the code, so arm7m is sometimes used. 838 1.1 mrg begin cpu arm7m 839 1.1 mrg tune flags CO_PROC 840 1.1 mrg architecture armv3m 841 1.1 mrg costs fastmul 842 1.1 mrg end cpu arm7m 843 1.1 mrg 844 1.1 mrg begin cpu arm7dm 845 1.1 mrg tune flags CO_PROC 846 1.1 mrg architecture armv3m 847 1.1 mrg costs fastmul 848 1.1 mrg end cpu arm7dm 849 1.1 mrg 850 1.1 mrg begin cpu arm7dmi 851 1.1 mrg tune flags CO_PROC 852 1.1 mrg architecture armv3m 853 1.1 mrg costs fastmul 854 1.1 mrg end cpu arm7dmi 855 1.1 mrg 856 1.1 mrg 857 1.1 mrg # V4 Architecture Processors 858 1.1 mrg begin cpu arm8 859 1.1 mrg tune flags LDSCHED 860 1.1 mrg architecture armv4 861 1.1 mrg costs fastmul 862 1.1 mrg end cpu arm8 863 1.1 mrg 864 1.1 mrg begin cpu arm810 865 1.1 mrg tune flags LDSCHED 866 1.1 mrg architecture armv4 867 1.1 mrg costs fastmul 868 1.1 mrg end cpu arm810 869 1.1 mrg 870 1.1 mrg begin cpu strongarm 871 1.1 mrg tune flags LDSCHED STRONG 872 1.1 mrg architecture armv4 873 1.1 mrg costs strongarm 874 1.1 mrg end cpu strongarm 875 1.1 mrg 876 1.1 mrg begin cpu strongarm110 877 1.1 mrg tune flags LDSCHED STRONG 878 1.1 mrg architecture armv4 879 1.1 mrg costs strongarm 880 1.1 mrg end cpu strongarm110 881 1.1 mrg 882 1.1 mrg begin cpu strongarm1100 883 1.1 mrg tune flags LDSCHED STRONG 884 1.1 mrg architecture armv4 885 1.1 mrg costs strongarm 886 1.1 mrg end cpu strongarm1100 887 1.1 mrg 888 1.1 mrg begin cpu strongarm1110 889 1.1 mrg tune flags LDSCHED STRONG 890 1.1 mrg architecture armv4 891 1.1 mrg costs strongarm 892 1.1 mrg end cpu strongarm1110 893 1.1 mrg 894 1.1 mrg begin cpu fa526 895 1.1 mrg tune flags LDSCHED 896 1.1 mrg architecture armv4 897 1.1 mrg costs fastmul 898 1.1 mrg end cpu fa526 899 1.1 mrg 900 1.1 mrg begin cpu fa626 901 1.1 mrg tune flags LDSCHED 902 1.1 mrg architecture armv4 903 1.1 mrg costs fastmul 904 1.1 mrg end cpu fa626 905 1.1 mrg 906 1.1 mrg 907 1.1 mrg # V4T Architecture Processors 908 1.1 mrg begin cpu arm7tdmi 909 1.1 mrg tune flags CO_PROC 910 1.1 mrg architecture armv4t 911 1.1 mrg costs fastmul 912 1.1 mrg end cpu arm7tdmi 913 1.1 mrg 914 1.1 mrg begin cpu arm7tdmi-s 915 1.1 mrg cname arm7tdmis 916 1.1 mrg tune flags CO_PROC 917 1.1 mrg architecture armv4t 918 1.1 mrg costs fastmul 919 1.1 mrg end cpu arm7tdmi-s 920 1.1 mrg 921 1.1 mrg begin cpu arm710t 922 1.1 mrg tune flags WBUF 923 1.1 mrg architecture armv4t 924 1.1 mrg costs fastmul 925 1.1 mrg end cpu arm710t 926 1.1 mrg 927 1.1 mrg begin cpu arm720t 928 1.1 mrg tune flags WBUF 929 1.1 mrg architecture armv4t 930 1.1 mrg costs fastmul 931 1.1 mrg end cpu arm720t 932 1.1 mrg 933 1.1 mrg begin cpu arm740t 934 1.1 mrg tune flags WBUF 935 1.1 mrg architecture armv4t 936 1.1 mrg costs fastmul 937 1.1 mrg end cpu arm740t 938 1.1 mrg 939 1.1 mrg begin cpu arm9 940 1.1 mrg tune flags LDSCHED 941 1.1 mrg architecture armv4t 942 1.1 mrg costs fastmul 943 1.1 mrg end cpu arm9 944 1.1 mrg 945 1.1 mrg begin cpu arm9tdmi 946 1.1 mrg tune flags LDSCHED 947 1.1 mrg architecture armv4t 948 1.1 mrg costs fastmul 949 1.1 mrg end cpu arm9tdmi 950 1.1 mrg 951 1.1 mrg begin cpu arm920 952 1.1 mrg tune flags LDSCHED 953 1.1 mrg architecture armv4t 954 1.1 mrg costs fastmul 955 1.1 mrg end cpu arm920 956 1.1 mrg 957 1.1 mrg begin cpu arm920t 958 1.1 mrg tune flags LDSCHED 959 1.1 mrg architecture armv4t 960 1.1 mrg costs fastmul 961 1.1 mrg end cpu arm920t 962 1.1 mrg 963 1.1 mrg begin cpu arm922t 964 1.1 mrg tune flags LDSCHED 965 1.1 mrg architecture armv4t 966 1.1 mrg costs fastmul 967 1.1 mrg end cpu arm922t 968 1.1 mrg 969 1.1 mrg begin cpu arm940t 970 1.1 mrg tune flags LDSCHED 971 1.1 mrg architecture armv4t 972 1.1 mrg costs fastmul 973 1.1 mrg end cpu arm940t 974 1.1 mrg 975 1.1 mrg begin cpu ep9312 976 1.1 mrg tune flags LDSCHED 977 1.1 mrg architecture armv4t 978 1.1 mrg costs fastmul 979 1.1 mrg end cpu ep9312 980 1.1 mrg 981 1.1 mrg 982 1.1 mrg # V5T Architecture Processors 983 1.1.1.2 mrg # These used VFPv1 which isn't supported by GCC 984 1.1 mrg begin cpu arm10tdmi 985 1.1 mrg tune flags LDSCHED 986 1.1 mrg architecture armv5t 987 1.1 mrg costs fastmul 988 1.1 mrg end cpu arm10tdmi 989 1.1 mrg 990 1.1 mrg begin cpu arm1020t 991 1.1 mrg tune flags LDSCHED 992 1.1 mrg architecture armv5t 993 1.1 mrg costs fastmul 994 1.1 mrg end cpu arm1020t 995 1.1 mrg 996 1.1 mrg 997 1.1 mrg # V5TE Architecture Processors 998 1.1 mrg begin cpu arm9e 999 1.1 mrg tune flags LDSCHED 1000 1.1 mrg architecture armv5te 1001 1.1.1.2 mrg fpu vfpv2 1002 1.1.1.2 mrg option nofp remove ALL_FP 1003 1.1 mrg costs 9e 1004 1.1 mrg end cpu arm9e 1005 1.1 mrg 1006 1.1 mrg begin cpu arm946e-s 1007 1.1 mrg cname arm946es 1008 1.1 mrg tune flags LDSCHED 1009 1.1 mrg architecture armv5te 1010 1.1.1.2 mrg fpu vfpv2 1011 1.1.1.2 mrg option nofp remove ALL_FP 1012 1.1 mrg costs 9e 1013 1.1 mrg end cpu arm946e-s 1014 1.1 mrg 1015 1.1 mrg begin cpu arm966e-s 1016 1.1 mrg cname arm966es 1017 1.1 mrg tune flags LDSCHED 1018 1.1 mrg architecture armv5te 1019 1.1.1.2 mrg fpu vfpv2 1020 1.1.1.2 mrg option nofp remove ALL_FP 1021 1.1 mrg costs 9e 1022 1.1 mrg end cpu arm966e-s 1023 1.1 mrg 1024 1.1 mrg begin cpu arm968e-s 1025 1.1 mrg cname arm968es 1026 1.1 mrg tune flags LDSCHED 1027 1.1 mrg architecture armv5te 1028 1.1.1.2 mrg fpu vfpv2 1029 1.1.1.2 mrg option nofp remove ALL_FP 1030 1.1 mrg costs 9e 1031 1.1 mrg end cpu arm968e-s 1032 1.1 mrg 1033 1.1 mrg begin cpu arm10e 1034 1.1 mrg tune flags LDSCHED 1035 1.1 mrg architecture armv5te 1036 1.1.1.2 mrg fpu vfpv2 1037 1.1.1.2 mrg option nofp remove ALL_FP 1038 1.1 mrg costs fastmul 1039 1.1 mrg end cpu arm10e 1040 1.1 mrg 1041 1.1 mrg begin cpu arm1020e 1042 1.1 mrg tune flags LDSCHED 1043 1.1 mrg architecture armv5te 1044 1.1.1.2 mrg fpu vfpv2 1045 1.1.1.2 mrg option nofp remove ALL_FP 1046 1.1 mrg costs fastmul 1047 1.1 mrg end cpu arm1020e 1048 1.1 mrg 1049 1.1 mrg begin cpu arm1022e 1050 1.1 mrg tune flags LDSCHED 1051 1.1 mrg architecture armv5te 1052 1.1.1.2 mrg fpu vfpv2 1053 1.1.1.2 mrg option nofp remove ALL_FP 1054 1.1 mrg costs fastmul 1055 1.1 mrg end cpu arm1022e 1056 1.1 mrg 1057 1.1 mrg begin cpu xscale 1058 1.1 mrg tune flags LDSCHED XSCALE 1059 1.1 mrg architecture armv5te 1060 1.1.1.2 mrg isa xscale 1061 1.1 mrg costs xscale 1062 1.1 mrg end cpu xscale 1063 1.1 mrg 1064 1.1 mrg begin cpu iwmmxt 1065 1.1 mrg tune flags LDSCHED XSCALE 1066 1.1 mrg architecture iwmmxt 1067 1.1 mrg costs xscale 1068 1.1 mrg end cpu iwmmxt 1069 1.1 mrg 1070 1.1 mrg begin cpu iwmmxt2 1071 1.1 mrg tune flags LDSCHED XSCALE 1072 1.1 mrg architecture iwmmxt2 1073 1.1 mrg costs xscale 1074 1.1 mrg end cpu iwmmxt2 1075 1.1 mrg 1076 1.1 mrg begin cpu fa606te 1077 1.1 mrg tune flags LDSCHED 1078 1.1 mrg architecture armv5te 1079 1.1 mrg costs 9e 1080 1.1 mrg end cpu fa606te 1081 1.1 mrg 1082 1.1 mrg begin cpu fa626te 1083 1.1 mrg tune flags LDSCHED 1084 1.1 mrg architecture armv5te 1085 1.1 mrg costs 9e 1086 1.1 mrg end cpu fa626te 1087 1.1 mrg 1088 1.1 mrg begin cpu fmp626 1089 1.1 mrg tune flags LDSCHED 1090 1.1 mrg architecture armv5te 1091 1.1 mrg costs 9e 1092 1.1 mrg end cpu fmp626 1093 1.1 mrg 1094 1.1 mrg begin cpu fa726te 1095 1.1 mrg tune flags LDSCHED 1096 1.1 mrg architecture armv5te 1097 1.1 mrg costs fa726te 1098 1.1 mrg end cpu fa726te 1099 1.1 mrg 1100 1.1 mrg 1101 1.1 mrg # V5TEJ Architecture Processors 1102 1.1 mrg begin cpu arm926ej-s 1103 1.1 mrg cname arm926ejs 1104 1.1 mrg tune flags LDSCHED 1105 1.1 mrg architecture armv5tej 1106 1.1.1.2 mrg fpu vfpv2 1107 1.1.1.2 mrg option nofp remove ALL_FP 1108 1.1 mrg costs 9e 1109 1.1 mrg end cpu arm926ej-s 1110 1.1 mrg 1111 1.1 mrg begin cpu arm1026ej-s 1112 1.1 mrg cname arm1026ejs 1113 1.1 mrg tune flags LDSCHED 1114 1.1 mrg architecture armv5tej 1115 1.1.1.2 mrg fpu vfpv2 1116 1.1.1.2 mrg option nofp remove ALL_FP 1117 1.1 mrg costs 9e 1118 1.1 mrg end cpu arm1026ej-s 1119 1.1 mrg 1120 1.1 mrg 1121 1.1 mrg # V6 Architecture Processors 1122 1.1 mrg begin cpu arm1136j-s 1123 1.1 mrg cname arm1136js 1124 1.1 mrg tune flags LDSCHED 1125 1.1 mrg architecture armv6j 1126 1.1 mrg costs 9e 1127 1.1 mrg end cpu arm1136j-s 1128 1.1 mrg 1129 1.1 mrg begin cpu arm1136jf-s 1130 1.1 mrg cname arm1136jfs 1131 1.1 mrg tune flags LDSCHED 1132 1.1 mrg architecture armv6j 1133 1.1 mrg fpu vfpv2 1134 1.1 mrg costs 9e 1135 1.1 mrg end cpu arm1136jf-s 1136 1.1 mrg 1137 1.1 mrg begin cpu arm1176jz-s 1138 1.1 mrg cname arm1176jzs 1139 1.1 mrg tune flags LDSCHED 1140 1.1 mrg architecture armv6kz 1141 1.1 mrg costs 9e 1142 1.1 mrg end cpu arm1176jz-s 1143 1.1 mrg 1144 1.1 mrg begin cpu arm1176jzf-s 1145 1.1 mrg cname arm1176jzfs 1146 1.1 mrg tune flags LDSCHED 1147 1.1 mrg architecture armv6kz 1148 1.1 mrg fpu vfpv2 1149 1.1 mrg costs 9e 1150 1.1 mrg end cpu arm1176jzf-s 1151 1.1 mrg 1152 1.1 mrg begin cpu mpcorenovfp 1153 1.1 mrg tune flags LDSCHED 1154 1.1 mrg architecture armv6k 1155 1.1 mrg costs 9e 1156 1.1 mrg end cpu mpcorenovfp 1157 1.1 mrg 1158 1.1 mrg begin cpu mpcore 1159 1.1 mrg tune flags LDSCHED 1160 1.1 mrg architecture armv6k 1161 1.1 mrg fpu vfpv2 1162 1.1 mrg costs 9e 1163 1.1 mrg end cpu mpcore 1164 1.1 mrg 1165 1.1 mrg begin cpu arm1156t2-s 1166 1.1 mrg cname arm1156t2s 1167 1.1 mrg tune flags LDSCHED 1168 1.1 mrg architecture armv6t2 1169 1.1 mrg costs v6t2 1170 1.1 mrg end cpu arm1156t2-s 1171 1.1 mrg 1172 1.1 mrg begin cpu arm1156t2f-s 1173 1.1 mrg cname arm1156t2fs 1174 1.1 mrg tune flags LDSCHED 1175 1.1 mrg architecture armv6t2 1176 1.1 mrg fpu vfpv2 1177 1.1 mrg costs v6t2 1178 1.1 mrg end cpu arm1156t2f-s 1179 1.1 mrg 1180 1.1 mrg 1181 1.1 mrg # V6M Architecture Processors 1182 1.1 mrg begin cpu cortex-m1 1183 1.1 mrg cname cortexm1 1184 1.1 mrg tune flags LDSCHED 1185 1.1.1.2 mrg architecture armv6s-m 1186 1.1 mrg costs v6m 1187 1.1 mrg end cpu cortex-m1 1188 1.1 mrg 1189 1.1 mrg begin cpu cortex-m0 1190 1.1 mrg cname cortexm0 1191 1.1 mrg tune flags LDSCHED 1192 1.1.1.2 mrg architecture armv6s-m 1193 1.1 mrg costs v6m 1194 1.1 mrg end cpu cortex-m0 1195 1.1 mrg 1196 1.1 mrg begin cpu cortex-m0plus 1197 1.1 mrg cname cortexm0plus 1198 1.1 mrg tune flags LDSCHED 1199 1.1.1.2 mrg architecture armv6s-m 1200 1.1 mrg costs v6m 1201 1.1 mrg end cpu cortex-m0plus 1202 1.1 mrg 1203 1.1 mrg 1204 1.1 mrg # V6M Architecture Processors for small-multiply implementations. 1205 1.1 mrg begin cpu cortex-m1.small-multiply 1206 1.1 mrg cname cortexm1smallmultiply 1207 1.1 mrg tune for cortex-m1 1208 1.1 mrg tune flags LDSCHED SMALLMUL 1209 1.1.1.2 mrg architecture armv6s-m 1210 1.1 mrg costs v6m 1211 1.1 mrg end cpu cortex-m1.small-multiply 1212 1.1 mrg 1213 1.1 mrg begin cpu cortex-m0.small-multiply 1214 1.1 mrg cname cortexm0smallmultiply 1215 1.1 mrg tune for cortex-m0 1216 1.1 mrg tune flags LDSCHED SMALLMUL 1217 1.1.1.2 mrg architecture armv6s-m 1218 1.1 mrg costs v6m 1219 1.1 mrg end cpu cortex-m0.small-multiply 1220 1.1 mrg 1221 1.1 mrg begin cpu cortex-m0plus.small-multiply 1222 1.1 mrg cname cortexm0plussmallmultiply 1223 1.1 mrg tune for cortex-m0plus 1224 1.1 mrg tune flags LDSCHED SMALLMUL 1225 1.1.1.2 mrg architecture armv6s-m 1226 1.1 mrg costs v6m 1227 1.1 mrg end cpu cortex-m0plus.small-multiply 1228 1.1 mrg 1229 1.1 mrg 1230 1.1 mrg # V7 Architecture Processors 1231 1.1 mrg begin cpu generic-armv7-a 1232 1.1 mrg cname genericv7a 1233 1.1 mrg tune flags LDSCHED 1234 1.1 mrg architecture armv7-a 1235 1.1.1.2 mrg option mp add mp 1236 1.1.1.2 mrg option sec add sec 1237 1.1.1.2 mrg fpu vfpv3-d16 1238 1.1.1.2 mrg option vfpv3-d16 add VFPv3 FP_DBL 1239 1.1.1.2 mrg option vfpv3 add VFPv3 FP_D32 1240 1.1.1.2 mrg option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 1241 1.1.1.2 mrg option vfpv3-fp16 add VFPv3 FP_D32 fp16conv 1242 1.1.1.2 mrg option vfpv4-d16 add VFPv4 FP_DBL 1243 1.1.1.2 mrg option vfpv4 add VFPv4 FP_D32 1244 1.1.1.2 mrg option simd add VFPv3 NEON 1245 1.1.1.2 mrg optalias neon simd 1246 1.1.1.2 mrg optalias neon-vfpv3 simd 1247 1.1.1.2 mrg option neon-fp16 add VFPv3 NEON fp16conv 1248 1.1.1.2 mrg option neon-vfpv4 add VFPv4 NEON 1249 1.1.1.2 mrg option nosimd remove ALL_SIMD 1250 1.1.1.2 mrg option nofp remove ALL_FP 1251 1.1 mrg costs cortex 1252 1.1 mrg end cpu generic-armv7-a 1253 1.1 mrg 1254 1.1 mrg begin cpu cortex-a5 1255 1.1 mrg cname cortexa5 1256 1.1 mrg tune flags LDSCHED 1257 1.1.1.2 mrg architecture armv7-a+mp+sec 1258 1.1.1.2 mrg fpu neon-fp16 1259 1.1.1.2 mrg option nosimd remove ALL_SIMD 1260 1.1.1.2 mrg option nofp remove ALL_FP 1261 1.1 mrg costs cortex_a5 1262 1.1 mrg end cpu cortex-a5 1263 1.1 mrg 1264 1.1 mrg begin cpu cortex-a7 1265 1.1 mrg cname cortexa7 1266 1.1 mrg tune flags LDSCHED 1267 1.1 mrg architecture armv7ve 1268 1.1.1.2 mrg fpu neon-vfpv4 1269 1.1.1.2 mrg option nosimd remove ALL_SIMD 1270 1.1.1.2 mrg option nofp remove ALL_FP 1271 1.1 mrg costs cortex_a7 1272 1.1 mrg end cpu cortex-a7 1273 1.1 mrg 1274 1.1 mrg begin cpu cortex-a8 1275 1.1 mrg cname cortexa8 1276 1.1 mrg tune flags LDSCHED 1277 1.1.1.2 mrg architecture armv7-a+sec 1278 1.1.1.2 mrg fpu neon-vfpv3 1279 1.1.1.2 mrg option nofp remove ALL_FP 1280 1.1 mrg costs cortex_a8 1281 1.1 mrg end cpu cortex-a8 1282 1.1 mrg 1283 1.1 mrg begin cpu cortex-a9 1284 1.1 mrg cname cortexa9 1285 1.1 mrg tune flags LDSCHED 1286 1.1.1.2 mrg architecture armv7-a+mp+sec 1287 1.1.1.2 mrg fpu neon-fp16 1288 1.1.1.2 mrg option nosimd remove ALL_SIMD 1289 1.1.1.2 mrg option nofp remove ALL_FP 1290 1.1 mrg costs cortex_a9 1291 1.1 mrg end cpu cortex-a9 1292 1.1 mrg 1293 1.1 mrg begin cpu cortex-a12 1294 1.1 mrg cname cortexa12 1295 1.1 mrg tune for cortex-a17 1296 1.1 mrg tune flags LDSCHED 1297 1.1 mrg architecture armv7ve 1298 1.1.1.2 mrg fpu neon-vfpv4 1299 1.1.1.2 mrg option nofp remove ALL_FP 1300 1.1 mrg costs cortex_a12 1301 1.1 mrg end cpu cortex-a12 1302 1.1 mrg 1303 1.1 mrg begin cpu cortex-a15 1304 1.1 mrg cname cortexa15 1305 1.1 mrg tune flags LDSCHED 1306 1.1 mrg architecture armv7ve 1307 1.1.1.2 mrg fpu neon-vfpv4 1308 1.1.1.2 mrg option nofp remove ALL_FP 1309 1.1 mrg costs cortex_a15 1310 1.1 mrg end cpu cortex-a15 1311 1.1 mrg 1312 1.1 mrg begin cpu cortex-a17 1313 1.1 mrg cname cortexa17 1314 1.1 mrg tune flags LDSCHED 1315 1.1 mrg architecture armv7ve 1316 1.1.1.2 mrg fpu neon-vfpv4 1317 1.1.1.2 mrg option nofp remove ALL_FP 1318 1.1 mrg costs cortex_a12 1319 1.1 mrg end cpu cortex-a17 1320 1.1 mrg 1321 1.1 mrg begin cpu cortex-r4 1322 1.1 mrg cname cortexr4 1323 1.1 mrg tune flags LDSCHED 1324 1.1 mrg architecture armv7-r 1325 1.1 mrg costs cortex 1326 1.1 mrg end cpu cortex-r4 1327 1.1 mrg 1328 1.1 mrg begin cpu cortex-r4f 1329 1.1 mrg cname cortexr4f 1330 1.1 mrg tune flags LDSCHED 1331 1.1 mrg architecture armv7-r 1332 1.1.1.2 mrg fpu vfpv3-d16 1333 1.1 mrg costs cortex 1334 1.1 mrg end cpu cortex-r4f 1335 1.1 mrg 1336 1.1 mrg begin cpu cortex-r5 1337 1.1 mrg cname cortexr5 1338 1.1 mrg tune flags LDSCHED 1339 1.1.1.2 mrg architecture armv7-r+idiv 1340 1.1.1.2 mrg fpu vfpv3-d16 1341 1.1.1.2 mrg option nofp.dp remove FP_DBL 1342 1.1.1.2 mrg option nofp remove ALL_FP 1343 1.1 mrg costs cortex 1344 1.1 mrg end cpu cortex-r5 1345 1.1 mrg 1346 1.1 mrg begin cpu cortex-r7 1347 1.1 mrg cname cortexr7 1348 1.1 mrg tune flags LDSCHED 1349 1.1.1.2 mrg architecture armv7-r+idiv 1350 1.1.1.2 mrg fpu vfpv3-d16-fp16 1351 1.1.1.2 mrg option nofp.dp remove FP_DBL 1352 1.1.1.2 mrg option nofp remove ALL_FP 1353 1.1 mrg costs cortex 1354 1.1 mrg end cpu cortex-r7 1355 1.1 mrg 1356 1.1 mrg begin cpu cortex-r8 1357 1.1 mrg cname cortexr8 1358 1.1 mrg tune for cortex-r7 1359 1.1 mrg tune flags LDSCHED 1360 1.1.1.2 mrg architecture armv7-r+idiv 1361 1.1.1.2 mrg fpu vfpv3-d16-fp16 1362 1.1.1.2 mrg option nofp.dp remove FP_DBL 1363 1.1.1.2 mrg option nofp remove ALL_FP 1364 1.1 mrg costs cortex 1365 1.1 mrg end cpu cortex-r8 1366 1.1 mrg 1367 1.1 mrg begin cpu cortex-m7 1368 1.1 mrg cname cortexm7 1369 1.1 mrg tune flags LDSCHED 1370 1.1 mrg architecture armv7e-m 1371 1.1 mrg isa quirk_no_volatile_ce 1372 1.1.1.2 mrg fpu fpv5-d16 1373 1.1.1.2 mrg option nofp.dp remove FP_DBL 1374 1.1.1.2 mrg option nofp remove ALL_FP 1375 1.1 mrg costs cortex_m7 1376 1.1 mrg end cpu cortex-m7 1377 1.1 mrg 1378 1.1 mrg begin cpu cortex-m4 1379 1.1 mrg cname cortexm4 1380 1.1 mrg tune flags LDSCHED 1381 1.1 mrg architecture armv7e-m 1382 1.1.1.2 mrg fpu fpv4-sp-d16 1383 1.1.1.2 mrg option nofp remove ALL_FP 1384 1.1 mrg costs v7m 1385 1.1 mrg end cpu cortex-m4 1386 1.1 mrg 1387 1.1 mrg begin cpu cortex-m3 1388 1.1 mrg cname cortexm3 1389 1.1 mrg tune flags LDSCHED 1390 1.1 mrg architecture armv7-m 1391 1.1 mrg isa quirk_cm3_ldrd 1392 1.1 mrg costs v7m 1393 1.1 mrg end cpu cortex-m3 1394 1.1 mrg 1395 1.1 mrg begin cpu marvell-pj4 1396 1.1 mrg tune flags LDSCHED 1397 1.1.1.2 mrg architecture armv7-a+mp+sec 1398 1.1 mrg costs marvell_pj4 1399 1.1 mrg end cpu marvell-pj4 1400 1.1 mrg 1401 1.1 mrg 1402 1.1 mrg # V7 big.LITTLE implementations 1403 1.1 mrg begin cpu cortex-a15.cortex-a7 1404 1.1 mrg cname cortexa15cortexa7 1405 1.1 mrg tune for cortex-a7 1406 1.1 mrg tune flags LDSCHED 1407 1.1 mrg architecture armv7ve 1408 1.1.1.2 mrg fpu neon-vfpv4 1409 1.1.1.2 mrg option nofp remove ALL_FP 1410 1.1 mrg costs cortex_a15 1411 1.1 mrg end cpu cortex-a15.cortex-a7 1412 1.1 mrg 1413 1.1 mrg begin cpu cortex-a17.cortex-a7 1414 1.1 mrg cname cortexa17cortexa7 1415 1.1 mrg tune for cortex-a7 1416 1.1 mrg tune flags LDSCHED 1417 1.1 mrg architecture armv7ve 1418 1.1.1.2 mrg fpu neon-vfpv4 1419 1.1.1.2 mrg option nofp remove ALL_FP 1420 1.1 mrg costs cortex_a12 1421 1.1 mrg end cpu cortex-a17.cortex-a7 1422 1.1 mrg 1423 1.1 mrg 1424 1.1 mrg # V8 A-profile Architecture Processors 1425 1.1 mrg begin cpu cortex-a32 1426 1.1 mrg cname cortexa32 1427 1.1 mrg tune for cortex-a53 1428 1.1 mrg tune flags LDSCHED 1429 1.1 mrg architecture armv8-a+crc 1430 1.1.1.2 mrg fpu neon-fp-armv8 1431 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1432 1.1.1.2 mrg option nofp remove ALL_FP 1433 1.1 mrg costs cortex_a35 1434 1.1 mrg end cpu cortex-a32 1435 1.1 mrg 1436 1.1 mrg begin cpu cortex-a35 1437 1.1 mrg cname cortexa35 1438 1.1 mrg tune for cortex-a53 1439 1.1 mrg tune flags LDSCHED 1440 1.1 mrg architecture armv8-a+crc 1441 1.1.1.2 mrg fpu neon-fp-armv8 1442 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1443 1.1.1.2 mrg option nofp remove ALL_FP 1444 1.1 mrg costs cortex_a35 1445 1.1 mrg end cpu cortex-a35 1446 1.1 mrg 1447 1.1 mrg begin cpu cortex-a53 1448 1.1 mrg cname cortexa53 1449 1.1 mrg tune flags LDSCHED 1450 1.1 mrg architecture armv8-a+crc 1451 1.1.1.2 mrg fpu neon-fp-armv8 1452 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1453 1.1.1.2 mrg option nofp remove ALL_FP 1454 1.1 mrg costs cortex_a53 1455 1.1 mrg end cpu cortex-a53 1456 1.1 mrg 1457 1.1 mrg begin cpu cortex-a57 1458 1.1 mrg cname cortexa57 1459 1.1 mrg tune flags LDSCHED 1460 1.1 mrg architecture armv8-a+crc 1461 1.1.1.2 mrg fpu neon-fp-armv8 1462 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1463 1.1 mrg costs cortex_a57 1464 1.1 mrg end cpu cortex-a57 1465 1.1 mrg 1466 1.1 mrg begin cpu cortex-a72 1467 1.1 mrg cname cortexa72 1468 1.1 mrg tune for cortex-a57 1469 1.1 mrg tune flags LDSCHED 1470 1.1 mrg architecture armv8-a+crc 1471 1.1.1.2 mrg fpu neon-fp-armv8 1472 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1473 1.1 mrg costs cortex_a57 1474 1.1 mrg end cpu cortex-a72 1475 1.1 mrg 1476 1.1 mrg begin cpu cortex-a73 1477 1.1 mrg cname cortexa73 1478 1.1 mrg tune for cortex-a57 1479 1.1 mrg tune flags LDSCHED 1480 1.1 mrg architecture armv8-a+crc 1481 1.1.1.2 mrg fpu neon-fp-armv8 1482 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1483 1.1 mrg costs cortex_a73 1484 1.1 mrg end cpu cortex-a73 1485 1.1 mrg 1486 1.1 mrg begin cpu exynos-m1 1487 1.1 mrg cname exynosm1 1488 1.1 mrg tune flags LDSCHED 1489 1.1 mrg architecture armv8-a+crc 1490 1.1.1.2 mrg fpu neon-fp-armv8 1491 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1492 1.1 mrg costs exynosm1 1493 1.1 mrg end cpu exynos-m1 1494 1.1 mrg 1495 1.1 mrg begin cpu xgene1 1496 1.1 mrg tune flags LDSCHED 1497 1.1 mrg architecture armv8-a 1498 1.1.1.2 mrg fpu neon-fp-armv8 1499 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1500 1.1 mrg costs xgene1 1501 1.1 mrg end cpu xgene1 1502 1.1 mrg 1503 1.1 mrg # V8 A-profile big.LITTLE implementations 1504 1.1 mrg begin cpu cortex-a57.cortex-a53 1505 1.1 mrg cname cortexa57cortexa53 1506 1.1 mrg tune for cortex-a53 1507 1.1 mrg tune flags LDSCHED 1508 1.1 mrg architecture armv8-a+crc 1509 1.1.1.2 mrg fpu neon-fp-armv8 1510 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1511 1.1 mrg costs cortex_a57 1512 1.1 mrg end cpu cortex-a57.cortex-a53 1513 1.1 mrg 1514 1.1 mrg begin cpu cortex-a72.cortex-a53 1515 1.1 mrg cname cortexa72cortexa53 1516 1.1 mrg tune for cortex-a53 1517 1.1 mrg tune flags LDSCHED 1518 1.1 mrg architecture armv8-a+crc 1519 1.1.1.2 mrg fpu neon-fp-armv8 1520 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1521 1.1 mrg costs cortex_a57 1522 1.1 mrg end cpu cortex-a72.cortex-a53 1523 1.1 mrg 1524 1.1 mrg begin cpu cortex-a73.cortex-a35 1525 1.1 mrg cname cortexa73cortexa35 1526 1.1 mrg tune for cortex-a53 1527 1.1 mrg tune flags LDSCHED 1528 1.1 mrg architecture armv8-a+crc 1529 1.1.1.2 mrg fpu neon-fp-armv8 1530 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1531 1.1 mrg costs cortex_a73 1532 1.1 mrg end cpu cortex-a73.cortex-a35 1533 1.1 mrg 1534 1.1 mrg begin cpu cortex-a73.cortex-a53 1535 1.1 mrg cname cortexa73cortexa53 1536 1.1 mrg tune for cortex-a53 1537 1.1 mrg tune flags LDSCHED 1538 1.1 mrg architecture armv8-a+crc 1539 1.1.1.2 mrg fpu neon-fp-armv8 1540 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1541 1.1 mrg costs cortex_a73 1542 1.1 mrg end cpu cortex-a73.cortex-a53 1543 1.1 mrg 1544 1.1 mrg 1545 1.1.1.2 mrg # ARMv8.2 A-profile Architecture Processors 1546 1.1.1.2 mrg begin cpu cortex-a55 1547 1.1.1.2 mrg cname cortexa55 1548 1.1.1.2 mrg tune for cortex-a53 1549 1.1.1.2 mrg tune flags LDSCHED 1550 1.1.1.2 mrg architecture armv8.2-a+fp16+dotprod 1551 1.1.1.2 mrg fpu neon-fp-armv8 1552 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1553 1.1.1.2 mrg option nofp remove ALL_FP 1554 1.1.1.2 mrg costs cortex_a53 1555 1.1.1.2 mrg end cpu cortex-a55 1556 1.1.1.2 mrg 1557 1.1.1.2 mrg begin cpu cortex-a75 1558 1.1.1.2 mrg cname cortexa75 1559 1.1.1.2 mrg tune for cortex-a57 1560 1.1.1.2 mrg tune flags LDSCHED 1561 1.1.1.2 mrg architecture armv8.2-a+fp16+dotprod 1562 1.1.1.2 mrg fpu neon-fp-armv8 1563 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1564 1.1.1.2 mrg costs cortex_a73 1565 1.1.1.2 mrg end cpu cortex-a75 1566 1.1.1.2 mrg 1567 1.1.1.2 mrg 1568 1.1.1.2 mrg # ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations 1569 1.1.1.2 mrg begin cpu cortex-a75.cortex-a55 1570 1.1.1.2 mrg cname cortexa75cortexa55 1571 1.1.1.2 mrg tune for cortex-a53 1572 1.1.1.2 mrg tune flags LDSCHED 1573 1.1.1.2 mrg architecture armv8.2-a+fp16+dotprod 1574 1.1.1.2 mrg fpu neon-fp-armv8 1575 1.1.1.2 mrg option crypto add FP_ARMv8 CRYPTO 1576 1.1.1.2 mrg costs cortex_a73 1577 1.1.1.2 mrg end cpu cortex-a75.cortex-a55 1578 1.1.1.2 mrg 1579 1.1 mrg # V8 M-profile implementations. 1580 1.1 mrg begin cpu cortex-m23 1581 1.1 mrg cname cortexm23 1582 1.1 mrg tune flags LDSCHED 1583 1.1 mrg architecture armv8-m.base 1584 1.1 mrg costs v6m 1585 1.1 mrg end cpu cortex-m23 1586 1.1 mrg 1587 1.1 mrg begin cpu cortex-m33 1588 1.1 mrg cname cortexm33 1589 1.1 mrg tune flags LDSCHED 1590 1.1 mrg architecture armv8-m.main+dsp 1591 1.1.1.2 mrg fpu fpv5-sp-d16 1592 1.1.1.2 mrg option nofp remove ALL_FP 1593 1.1.1.2 mrg option nodsp remove armv7em 1594 1.1 mrg costs v7m 1595 1.1 mrg end cpu cortex-m33 1596 1.1 mrg 1597 1.1.1.2 mrg # V8 R-profile implementations. 1598 1.1.1.2 mrg begin cpu cortex-r52 1599 1.1.1.2 mrg cname cortexr52 1600 1.1.1.2 mrg tune flags LDSCHED 1601 1.1.1.2 mrg architecture armv8-r+crc+simd 1602 1.1.1.2 mrg fpu neon-fp-armv8 1603 1.1.1.2 mrg option nofp.dp remove FP_DBL ALL_SIMD 1604 1.1.1.2 mrg costs cortex 1605 1.1.1.2 mrg end cpu cortex-r52 1606 1.1.1.2 mrg 1607 1.1 mrg # FPU entries 1608 1.1 mrg # format: 1609 1.1 mrg # begin fpu <name> 1610 1.1 mrg # isa <isa-flags-list> 1611 1.1 mrg # end fpu <name> 1612 1.1 mrg 1613 1.1 mrg begin fpu vfp 1614 1.1 mrg isa VFPv2 FP_DBL 1615 1.1 mrg end fpu vfp 1616 1.1 mrg 1617 1.1 mrg begin fpu vfpv2 1618 1.1 mrg isa VFPv2 FP_DBL 1619 1.1 mrg end fpu vfpv2 1620 1.1 mrg 1621 1.1 mrg begin fpu vfpv3 1622 1.1 mrg isa VFPv3 FP_D32 1623 1.1 mrg end fpu vfpv3 1624 1.1 mrg 1625 1.1 mrg begin fpu vfpv3-fp16 1626 1.1.1.2 mrg isa VFPv3 FP_D32 fp16conv 1627 1.1 mrg end fpu vfpv3-fp16 1628 1.1 mrg 1629 1.1 mrg begin fpu vfpv3-d16 1630 1.1 mrg isa VFPv3 FP_DBL 1631 1.1 mrg end fpu vfpv3-d16 1632 1.1 mrg 1633 1.1 mrg begin fpu vfpv3-d16-fp16 1634 1.1.1.2 mrg isa VFPv3 FP_DBL fp16conv 1635 1.1 mrg end fpu vfpv3-d16-fp16 1636 1.1 mrg 1637 1.1 mrg begin fpu vfpv3xd 1638 1.1 mrg isa VFPv3 1639 1.1 mrg end fpu vfpv3xd 1640 1.1 mrg 1641 1.1 mrg begin fpu vfpv3xd-fp16 1642 1.1.1.2 mrg isa VFPv3 fp16conv 1643 1.1 mrg end fpu vfpv3xd-fp16 1644 1.1 mrg 1645 1.1 mrg begin fpu neon 1646 1.1 mrg isa VFPv3 NEON 1647 1.1 mrg end fpu neon 1648 1.1 mrg 1649 1.1 mrg begin fpu neon-vfpv3 1650 1.1 mrg isa VFPv3 NEON 1651 1.1 mrg end fpu neon-vfpv3 1652 1.1 mrg 1653 1.1 mrg begin fpu neon-fp16 1654 1.1.1.2 mrg isa VFPv3 NEON fp16conv 1655 1.1 mrg end fpu neon-fp16 1656 1.1 mrg 1657 1.1 mrg begin fpu vfpv4 1658 1.1 mrg isa VFPv4 FP_D32 1659 1.1 mrg end fpu vfpv4 1660 1.1 mrg 1661 1.1 mrg begin fpu neon-vfpv4 1662 1.1 mrg isa VFPv4 NEON 1663 1.1 mrg end fpu neon-vfpv4 1664 1.1 mrg 1665 1.1 mrg begin fpu vfpv4-d16 1666 1.1 mrg isa VFPv4 FP_DBL 1667 1.1 mrg end fpu vfpv4-d16 1668 1.1 mrg 1669 1.1 mrg begin fpu fpv4-sp-d16 1670 1.1 mrg isa VFPv4 1671 1.1 mrg end fpu fpv4-sp-d16 1672 1.1 mrg 1673 1.1 mrg begin fpu fpv5-sp-d16 1674 1.1 mrg isa FPv5 1675 1.1 mrg end fpu fpv5-sp-d16 1676 1.1 mrg 1677 1.1 mrg begin fpu fpv5-d16 1678 1.1 mrg isa FPv5 FP_DBL 1679 1.1 mrg end fpu fpv5-d16 1680 1.1 mrg 1681 1.1 mrg begin fpu fp-armv8 1682 1.1.1.2 mrg isa FP_ARMv8 1683 1.1 mrg end fpu fp-armv8 1684 1.1 mrg 1685 1.1 mrg begin fpu neon-fp-armv8 1686 1.1 mrg isa FP_ARMv8 NEON 1687 1.1 mrg end fpu neon-fp-armv8 1688 1.1 mrg 1689 1.1 mrg begin fpu crypto-neon-fp-armv8 1690 1.1 mrg isa FP_ARMv8 CRYPTO 1691 1.1 mrg end fpu crypto-neon-fp-armv8 1692 1.1 mrg 1693 1.1 mrg # Compatibility aliases. 1694 1.1 mrg begin fpu vfp3 1695 1.1 mrg isa VFPv3 FP_D32 1696 1.1 mrg end fpu vfp3 1697
Indexes created Sun May 03 00:22:47 UTC 2026