mmintrin.h revision 1.1 1 1.1 mrg /* Copyright (C) 2002, 2003, 2004, 2009 Free Software Foundation, Inc.
2 1.1 mrg
3 1.1 mrg This file is part of GCC.
4 1.1 mrg
5 1.1 mrg GCC is free software; you can redistribute it and/or modify it
6 1.1 mrg under the terms of the GNU General Public License as published
7 1.1 mrg by the Free Software Foundation; either version 3, or (at your
8 1.1 mrg option) any later version.
9 1.1 mrg
10 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT
11 1.1 mrg ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 1.1 mrg or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
13 1.1 mrg License for more details.
14 1.1 mrg
15 1.1 mrg Under Section 7 of GPL version 3, you are granted additional
16 1.1 mrg permissions described in the GCC Runtime Library Exception, version
17 1.1 mrg 3.1, as published by the Free Software Foundation.
18 1.1 mrg
19 1.1 mrg You should have received a copy of the GNU General Public License and
20 1.1 mrg a copy of the GCC Runtime Library Exception along with this program;
21 1.1 mrg see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 1.1 mrg <http://www.gnu.org/licenses/>. */
23 1.1 mrg
24 1.1 mrg #ifndef _MMINTRIN_H_INCLUDED
25 1.1 mrg #define _MMINTRIN_H_INCLUDED
26 1.1 mrg
27 1.1 mrg /* The data type intended for user use. */
28 1.1 mrg typedef unsigned long long __m64, __int64;
29 1.1 mrg
30 1.1 mrg /* Internal data types for implementing the intrinsics. */
31 1.1 mrg typedef int __v2si __attribute__ ((vector_size (8)));
32 1.1 mrg typedef short __v4hi __attribute__ ((vector_size (8)));
33 1.1 mrg typedef char __v8qi __attribute__ ((vector_size (8)));
34 1.1 mrg
35 1.1 mrg /* "Convert" __m64 and __int64 into each other. */
36 1.1 mrg static __inline __m64
37 1.1 mrg _mm_cvtsi64_m64 (__int64 __i)
38 1.1 mrg {
39 1.1 mrg return __i;
40 1.1 mrg }
41 1.1 mrg
42 1.1 mrg static __inline __int64
43 1.1 mrg _mm_cvtm64_si64 (__m64 __i)
44 1.1 mrg {
45 1.1 mrg return __i;
46 1.1 mrg }
47 1.1 mrg
48 1.1 mrg static __inline int
49 1.1 mrg _mm_cvtsi64_si32 (__int64 __i)
50 1.1 mrg {
51 1.1 mrg return __i;
52 1.1 mrg }
53 1.1 mrg
54 1.1 mrg static __inline __int64
55 1.1 mrg _mm_cvtsi32_si64 (int __i)
56 1.1 mrg {
57 1.1 mrg return __i;
58 1.1 mrg }
59 1.1 mrg
60 1.1 mrg /* Pack the four 16-bit values from M1 into the lower four 8-bit values of
61 1.1 mrg the result, and the four 16-bit values from M2 into the upper four 8-bit
62 1.1 mrg values of the result, all with signed saturation. */
63 1.1 mrg static __inline __m64
64 1.1 mrg _mm_packs_pi16 (__m64 __m1, __m64 __m2)
65 1.1 mrg {
66 1.1 mrg return (__m64) __builtin_arm_wpackhss ((__v4hi)__m1, (__v4hi)__m2);
67 1.1 mrg }
68 1.1 mrg
69 1.1 mrg /* Pack the two 32-bit values from M1 in to the lower two 16-bit values of
70 1.1 mrg the result, and the two 32-bit values from M2 into the upper two 16-bit
71 1.1 mrg values of the result, all with signed saturation. */
72 1.1 mrg static __inline __m64
73 1.1 mrg _mm_packs_pi32 (__m64 __m1, __m64 __m2)
74 1.1 mrg {
75 1.1 mrg return (__m64) __builtin_arm_wpackwss ((__v2si)__m1, (__v2si)__m2);
76 1.1 mrg }
77 1.1 mrg
78 1.1 mrg /* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
79 1.1 mrg the 64-bit value from M2 into the upper 32-bits of the result, all with
80 1.1 mrg signed saturation for values that do not fit exactly into 32-bits. */
81 1.1 mrg static __inline __m64
82 1.1 mrg _mm_packs_pi64 (__m64 __m1, __m64 __m2)
83 1.1 mrg {
84 1.1 mrg return (__m64) __builtin_arm_wpackdss ((long long)__m1, (long long)__m2);
85 1.1 mrg }
86 1.1 mrg
87 1.1 mrg /* Pack the four 16-bit values from M1 into the lower four 8-bit values of
88 1.1 mrg the result, and the four 16-bit values from M2 into the upper four 8-bit
89 1.1 mrg values of the result, all with unsigned saturation. */
90 1.1 mrg static __inline __m64
91 1.1 mrg _mm_packs_pu16 (__m64 __m1, __m64 __m2)
92 1.1 mrg {
93 1.1 mrg return (__m64) __builtin_arm_wpackhus ((__v4hi)__m1, (__v4hi)__m2);
94 1.1 mrg }
95 1.1 mrg
96 1.1 mrg /* Pack the two 32-bit values from M1 into the lower two 16-bit values of
97 1.1 mrg the result, and the two 32-bit values from M2 into the upper two 16-bit
98 1.1 mrg values of the result, all with unsigned saturation. */
99 1.1 mrg static __inline __m64
100 1.1 mrg _mm_packs_pu32 (__m64 __m1, __m64 __m2)
101 1.1 mrg {
102 1.1 mrg return (__m64) __builtin_arm_wpackwus ((__v2si)__m1, (__v2si)__m2);
103 1.1 mrg }
104 1.1 mrg
105 1.1 mrg /* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
106 1.1 mrg the 64-bit value from M2 into the upper 32-bits of the result, all with
107 1.1 mrg unsigned saturation for values that do not fit exactly into 32-bits. */
108 1.1 mrg static __inline __m64
109 1.1 mrg _mm_packs_pu64 (__m64 __m1, __m64 __m2)
110 1.1 mrg {
111 1.1 mrg return (__m64) __builtin_arm_wpackdus ((long long)__m1, (long long)__m2);
112 1.1 mrg }
113 1.1 mrg
114 1.1 mrg /* Interleave the four 8-bit values from the high half of M1 with the four
115 1.1 mrg 8-bit values from the high half of M2. */
116 1.1 mrg static __inline __m64
117 1.1 mrg _mm_unpackhi_pi8 (__m64 __m1, __m64 __m2)
118 1.1 mrg {
119 1.1 mrg return (__m64) __builtin_arm_wunpckihb ((__v8qi)__m1, (__v8qi)__m2);
120 1.1 mrg }
121 1.1 mrg
122 1.1 mrg /* Interleave the two 16-bit values from the high half of M1 with the two
123 1.1 mrg 16-bit values from the high half of M2. */
124 1.1 mrg static __inline __m64
125 1.1 mrg _mm_unpackhi_pi16 (__m64 __m1, __m64 __m2)
126 1.1 mrg {
127 1.1 mrg return (__m64) __builtin_arm_wunpckihh ((__v4hi)__m1, (__v4hi)__m2);
128 1.1 mrg }
129 1.1 mrg
130 1.1 mrg /* Interleave the 32-bit value from the high half of M1 with the 32-bit
131 1.1 mrg value from the high half of M2. */
132 1.1 mrg static __inline __m64
133 1.1 mrg _mm_unpackhi_pi32 (__m64 __m1, __m64 __m2)
134 1.1 mrg {
135 1.1 mrg return (__m64) __builtin_arm_wunpckihw ((__v2si)__m1, (__v2si)__m2);
136 1.1 mrg }
137 1.1 mrg
138 1.1 mrg /* Interleave the four 8-bit values from the low half of M1 with the four
139 1.1 mrg 8-bit values from the low half of M2. */
140 1.1 mrg static __inline __m64
141 1.1 mrg _mm_unpacklo_pi8 (__m64 __m1, __m64 __m2)
142 1.1 mrg {
143 1.1 mrg return (__m64) __builtin_arm_wunpckilb ((__v8qi)__m1, (__v8qi)__m2);
144 1.1 mrg }
145 1.1 mrg
146 1.1 mrg /* Interleave the two 16-bit values from the low half of M1 with the two
147 1.1 mrg 16-bit values from the low half of M2. */
148 1.1 mrg static __inline __m64
149 1.1 mrg _mm_unpacklo_pi16 (__m64 __m1, __m64 __m2)
150 1.1 mrg {
151 1.1 mrg return (__m64) __builtin_arm_wunpckilh ((__v4hi)__m1, (__v4hi)__m2);
152 1.1 mrg }
153 1.1 mrg
154 1.1 mrg /* Interleave the 32-bit value from the low half of M1 with the 32-bit
155 1.1 mrg value from the low half of M2. */
156 1.1 mrg static __inline __m64
157 1.1 mrg _mm_unpacklo_pi32 (__m64 __m1, __m64 __m2)
158 1.1 mrg {
159 1.1 mrg return (__m64) __builtin_arm_wunpckilw ((__v2si)__m1, (__v2si)__m2);
160 1.1 mrg }
161 1.1 mrg
162 1.1 mrg /* Take the four 8-bit values from the low half of M1, sign extend them,
163 1.1 mrg and return the result as a vector of four 16-bit quantities. */
164 1.1 mrg static __inline __m64
165 1.1 mrg _mm_unpackel_pi8 (__m64 __m1)
166 1.1 mrg {
167 1.1 mrg return (__m64) __builtin_arm_wunpckelsb ((__v8qi)__m1);
168 1.1 mrg }
169 1.1 mrg
170 1.1 mrg /* Take the two 16-bit values from the low half of M1, sign extend them,
171 1.1 mrg and return the result as a vector of two 32-bit quantities. */
172 1.1 mrg static __inline __m64
173 1.1 mrg _mm_unpackel_pi16 (__m64 __m1)
174 1.1 mrg {
175 1.1 mrg return (__m64) __builtin_arm_wunpckelsh ((__v4hi)__m1);
176 1.1 mrg }
177 1.1 mrg
178 1.1 mrg /* Take the 32-bit value from the low half of M1, and return it sign extended
179 1.1 mrg to 64 bits. */
180 1.1 mrg static __inline __m64
181 1.1 mrg _mm_unpackel_pi32 (__m64 __m1)
182 1.1 mrg {
183 1.1 mrg return (__m64) __builtin_arm_wunpckelsw ((__v2si)__m1);
184 1.1 mrg }
185 1.1 mrg
186 1.1 mrg /* Take the four 8-bit values from the high half of M1, sign extend them,
187 1.1 mrg and return the result as a vector of four 16-bit quantities. */
188 1.1 mrg static __inline __m64
189 1.1 mrg _mm_unpackeh_pi8 (__m64 __m1)
190 1.1 mrg {
191 1.1 mrg return (__m64) __builtin_arm_wunpckehsb ((__v8qi)__m1);
192 1.1 mrg }
193 1.1 mrg
194 1.1 mrg /* Take the two 16-bit values from the high half of M1, sign extend them,
195 1.1 mrg and return the result as a vector of two 32-bit quantities. */
196 1.1 mrg static __inline __m64
197 1.1 mrg _mm_unpackeh_pi16 (__m64 __m1)
198 1.1 mrg {
199 1.1 mrg return (__m64) __builtin_arm_wunpckehsh ((__v4hi)__m1);
200 1.1 mrg }
201 1.1 mrg
202 1.1 mrg /* Take the 32-bit value from the high half of M1, and return it sign extended
203 1.1 mrg to 64 bits. */
204 1.1 mrg static __inline __m64
205 1.1 mrg _mm_unpackeh_pi32 (__m64 __m1)
206 1.1 mrg {
207 1.1 mrg return (__m64) __builtin_arm_wunpckehsw ((__v2si)__m1);
208 1.1 mrg }
209 1.1 mrg
210 1.1 mrg /* Take the four 8-bit values from the low half of M1, zero extend them,
211 1.1 mrg and return the result as a vector of four 16-bit quantities. */
212 1.1 mrg static __inline __m64
213 1.1 mrg _mm_unpackel_pu8 (__m64 __m1)
214 1.1 mrg {
215 1.1 mrg return (__m64) __builtin_arm_wunpckelub ((__v8qi)__m1);
216 1.1 mrg }
217 1.1 mrg
218 1.1 mrg /* Take the two 16-bit values from the low half of M1, zero extend them,
219 1.1 mrg and return the result as a vector of two 32-bit quantities. */
220 1.1 mrg static __inline __m64
221 1.1 mrg _mm_unpackel_pu16 (__m64 __m1)
222 1.1 mrg {
223 1.1 mrg return (__m64) __builtin_arm_wunpckeluh ((__v4hi)__m1);
224 1.1 mrg }
225 1.1 mrg
226 1.1 mrg /* Take the 32-bit value from the low half of M1, and return it zero extended
227 1.1 mrg to 64 bits. */
228 1.1 mrg static __inline __m64
229 1.1 mrg _mm_unpackel_pu32 (__m64 __m1)
230 1.1 mrg {
231 1.1 mrg return (__m64) __builtin_arm_wunpckeluw ((__v2si)__m1);
232 1.1 mrg }
233 1.1 mrg
234 1.1 mrg /* Take the four 8-bit values from the high half of M1, zero extend them,
235 1.1 mrg and return the result as a vector of four 16-bit quantities. */
236 1.1 mrg static __inline __m64
237 1.1 mrg _mm_unpackeh_pu8 (__m64 __m1)
238 1.1 mrg {
239 1.1 mrg return (__m64) __builtin_arm_wunpckehub ((__v8qi)__m1);
240 1.1 mrg }
241 1.1 mrg
242 1.1 mrg /* Take the two 16-bit values from the high half of M1, zero extend them,
243 1.1 mrg and return the result as a vector of two 32-bit quantities. */
244 1.1 mrg static __inline __m64
245 1.1 mrg _mm_unpackeh_pu16 (__m64 __m1)
246 1.1 mrg {
247 1.1 mrg return (__m64) __builtin_arm_wunpckehuh ((__v4hi)__m1);
248 1.1 mrg }
249 1.1 mrg
250 1.1 mrg /* Take the 32-bit value from the high half of M1, and return it zero extended
251 1.1 mrg to 64 bits. */
252 1.1 mrg static __inline __m64
253 1.1 mrg _mm_unpackeh_pu32 (__m64 __m1)
254 1.1 mrg {
255 1.1 mrg return (__m64) __builtin_arm_wunpckehuw ((__v2si)__m1);
256 1.1 mrg }
257 1.1 mrg
258 1.1 mrg /* Add the 8-bit values in M1 to the 8-bit values in M2. */
259 1.1 mrg static __inline __m64
260 1.1 mrg _mm_add_pi8 (__m64 __m1, __m64 __m2)
261 1.1 mrg {
262 1.1 mrg return (__m64) __builtin_arm_waddb ((__v8qi)__m1, (__v8qi)__m2);
263 1.1 mrg }
264 1.1 mrg
265 1.1 mrg /* Add the 16-bit values in M1 to the 16-bit values in M2. */
266 1.1 mrg static __inline __m64
267 1.1 mrg _mm_add_pi16 (__m64 __m1, __m64 __m2)
268 1.1 mrg {
269 1.1 mrg return (__m64) __builtin_arm_waddh ((__v4hi)__m1, (__v4hi)__m2);
270 1.1 mrg }
271 1.1 mrg
272 1.1 mrg /* Add the 32-bit values in M1 to the 32-bit values in M2. */
273 1.1 mrg static __inline __m64
274 1.1 mrg _mm_add_pi32 (__m64 __m1, __m64 __m2)
275 1.1 mrg {
276 1.1 mrg return (__m64) __builtin_arm_waddw ((__v2si)__m1, (__v2si)__m2);
277 1.1 mrg }
278 1.1 mrg
279 1.1 mrg /* Add the 8-bit values in M1 to the 8-bit values in M2 using signed
280 1.1 mrg saturated arithmetic. */
281 1.1 mrg static __inline __m64
282 1.1 mrg _mm_adds_pi8 (__m64 __m1, __m64 __m2)
283 1.1 mrg {
284 1.1 mrg return (__m64) __builtin_arm_waddbss ((__v8qi)__m1, (__v8qi)__m2);
285 1.1 mrg }
286 1.1 mrg
287 1.1 mrg /* Add the 16-bit values in M1 to the 16-bit values in M2 using signed
288 1.1 mrg saturated arithmetic. */
289 1.1 mrg static __inline __m64
290 1.1 mrg _mm_adds_pi16 (__m64 __m1, __m64 __m2)
291 1.1 mrg {
292 1.1 mrg return (__m64) __builtin_arm_waddhss ((__v4hi)__m1, (__v4hi)__m2);
293 1.1 mrg }
294 1.1 mrg
295 1.1 mrg /* Add the 32-bit values in M1 to the 32-bit values in M2 using signed
296 1.1 mrg saturated arithmetic. */
297 1.1 mrg static __inline __m64
298 1.1 mrg _mm_adds_pi32 (__m64 __m1, __m64 __m2)
299 1.1 mrg {
300 1.1 mrg return (__m64) __builtin_arm_waddwss ((__v2si)__m1, (__v2si)__m2);
301 1.1 mrg }
302 1.1 mrg
303 1.1 mrg /* Add the 8-bit values in M1 to the 8-bit values in M2 using unsigned
304 1.1 mrg saturated arithmetic. */
305 1.1 mrg static __inline __m64
306 1.1 mrg _mm_adds_pu8 (__m64 __m1, __m64 __m2)
307 1.1 mrg {
308 1.1 mrg return (__m64) __builtin_arm_waddbus ((__v8qi)__m1, (__v8qi)__m2);
309 1.1 mrg }
310 1.1 mrg
311 1.1 mrg /* Add the 16-bit values in M1 to the 16-bit values in M2 using unsigned
312 1.1 mrg saturated arithmetic. */
313 1.1 mrg static __inline __m64
314 1.1 mrg _mm_adds_pu16 (__m64 __m1, __m64 __m2)
315 1.1 mrg {
316 1.1 mrg return (__m64) __builtin_arm_waddhus ((__v4hi)__m1, (__v4hi)__m2);
317 1.1 mrg }
318 1.1 mrg
319 1.1 mrg /* Add the 32-bit values in M1 to the 32-bit values in M2 using unsigned
320 1.1 mrg saturated arithmetic. */
321 1.1 mrg static __inline __m64
322 1.1 mrg _mm_adds_pu32 (__m64 __m1, __m64 __m2)
323 1.1 mrg {
324 1.1 mrg return (__m64) __builtin_arm_waddwus ((__v2si)__m1, (__v2si)__m2);
325 1.1 mrg }
326 1.1 mrg
327 1.1 mrg /* Subtract the 8-bit values in M2 from the 8-bit values in M1. */
328 1.1 mrg static __inline __m64
329 1.1 mrg _mm_sub_pi8 (__m64 __m1, __m64 __m2)
330 1.1 mrg {
331 1.1 mrg return (__m64) __builtin_arm_wsubb ((__v8qi)__m1, (__v8qi)__m2);
332 1.1 mrg }
333 1.1 mrg
334 1.1 mrg /* Subtract the 16-bit values in M2 from the 16-bit values in M1. */
335 1.1 mrg static __inline __m64
336 1.1 mrg _mm_sub_pi16 (__m64 __m1, __m64 __m2)
337 1.1 mrg {
338 1.1 mrg return (__m64) __builtin_arm_wsubh ((__v4hi)__m1, (__v4hi)__m2);
339 1.1 mrg }
340 1.1 mrg
341 1.1 mrg /* Subtract the 32-bit values in M2 from the 32-bit values in M1. */
342 1.1 mrg static __inline __m64
343 1.1 mrg _mm_sub_pi32 (__m64 __m1, __m64 __m2)
344 1.1 mrg {
345 1.1 mrg return (__m64) __builtin_arm_wsubw ((__v2si)__m1, (__v2si)__m2);
346 1.1 mrg }
347 1.1 mrg
348 1.1 mrg /* Subtract the 8-bit values in M2 from the 8-bit values in M1 using signed
349 1.1 mrg saturating arithmetic. */
350 1.1 mrg static __inline __m64
351 1.1 mrg _mm_subs_pi8 (__m64 __m1, __m64 __m2)
352 1.1 mrg {
353 1.1 mrg return (__m64) __builtin_arm_wsubbss ((__v8qi)__m1, (__v8qi)__m2);
354 1.1 mrg }
355 1.1 mrg
356 1.1 mrg /* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
357 1.1 mrg signed saturating arithmetic. */
358 1.1 mrg static __inline __m64
359 1.1 mrg _mm_subs_pi16 (__m64 __m1, __m64 __m2)
360 1.1 mrg {
361 1.1 mrg return (__m64) __builtin_arm_wsubhss ((__v4hi)__m1, (__v4hi)__m2);
362 1.1 mrg }
363 1.1 mrg
364 1.1 mrg /* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
365 1.1 mrg signed saturating arithmetic. */
366 1.1 mrg static __inline __m64
367 1.1 mrg _mm_subs_pi32 (__m64 __m1, __m64 __m2)
368 1.1 mrg {
369 1.1 mrg return (__m64) __builtin_arm_wsubwss ((__v2si)__m1, (__v2si)__m2);
370 1.1 mrg }
371 1.1 mrg
372 1.1 mrg /* Subtract the 8-bit values in M2 from the 8-bit values in M1 using
373 1.1 mrg unsigned saturating arithmetic. */
374 1.1 mrg static __inline __m64
375 1.1 mrg _mm_subs_pu8 (__m64 __m1, __m64 __m2)
376 1.1 mrg {
377 1.1 mrg return (__m64) __builtin_arm_wsubbus ((__v8qi)__m1, (__v8qi)__m2);
378 1.1 mrg }
379 1.1 mrg
380 1.1 mrg /* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
381 1.1 mrg unsigned saturating arithmetic. */
382 1.1 mrg static __inline __m64
383 1.1 mrg _mm_subs_pu16 (__m64 __m1, __m64 __m2)
384 1.1 mrg {
385 1.1 mrg return (__m64) __builtin_arm_wsubhus ((__v4hi)__m1, (__v4hi)__m2);
386 1.1 mrg }
387 1.1 mrg
388 1.1 mrg /* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
389 1.1 mrg unsigned saturating arithmetic. */
390 1.1 mrg static __inline __m64
391 1.1 mrg _mm_subs_pu32 (__m64 __m1, __m64 __m2)
392 1.1 mrg {
393 1.1 mrg return (__m64) __builtin_arm_wsubwus ((__v2si)__m1, (__v2si)__m2);
394 1.1 mrg }
395 1.1 mrg
396 1.1 mrg /* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
397 1.1 mrg four 32-bit intermediate results, which are then summed by pairs to
398 1.1 mrg produce two 32-bit results. */
399 1.1 mrg static __inline __m64
400 1.1 mrg _mm_madd_pi16 (__m64 __m1, __m64 __m2)
401 1.1 mrg {
402 1.1 mrg return (__m64) __builtin_arm_wmadds ((__v4hi)__m1, (__v4hi)__m2);
403 1.1 mrg }
404 1.1 mrg
405 1.1 mrg /* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
406 1.1 mrg four 32-bit intermediate results, which are then summed by pairs to
407 1.1 mrg produce two 32-bit results. */
408 1.1 mrg static __inline __m64
409 1.1 mrg _mm_madd_pu16 (__m64 __m1, __m64 __m2)
410 1.1 mrg {
411 1.1 mrg return (__m64) __builtin_arm_wmaddu ((__v4hi)__m1, (__v4hi)__m2);
412 1.1 mrg }
413 1.1 mrg
414 1.1 mrg /* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
415 1.1 mrg M2 and produce the high 16 bits of the 32-bit results. */
416 1.1 mrg static __inline __m64
417 1.1 mrg _mm_mulhi_pi16 (__m64 __m1, __m64 __m2)
418 1.1 mrg {
419 1.1 mrg return (__m64) __builtin_arm_wmulsm ((__v4hi)__m1, (__v4hi)__m2);
420 1.1 mrg }
421 1.1 mrg
422 1.1 mrg /* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
423 1.1 mrg M2 and produce the high 16 bits of the 32-bit results. */
424 1.1 mrg static __inline __m64
425 1.1 mrg _mm_mulhi_pu16 (__m64 __m1, __m64 __m2)
426 1.1 mrg {
427 1.1 mrg return (__m64) __builtin_arm_wmulum ((__v4hi)__m1, (__v4hi)__m2);
428 1.1 mrg }
429 1.1 mrg
430 1.1 mrg /* Multiply four 16-bit values in M1 by four 16-bit values in M2 and produce
431 1.1 mrg the low 16 bits of the results. */
432 1.1 mrg static __inline __m64
433 1.1 mrg _mm_mullo_pi16 (__m64 __m1, __m64 __m2)
434 1.1 mrg {
435 1.1 mrg return (__m64) __builtin_arm_wmulul ((__v4hi)__m1, (__v4hi)__m2);
436 1.1 mrg }
437 1.1 mrg
438 1.1 mrg /* Shift four 16-bit values in M left by COUNT. */
439 1.1 mrg static __inline __m64
440 1.1 mrg _mm_sll_pi16 (__m64 __m, __m64 __count)
441 1.1 mrg {
442 1.1 mrg return (__m64) __builtin_arm_wsllh ((__v4hi)__m, __count);
443 1.1 mrg }
444 1.1 mrg
445 1.1 mrg static __inline __m64
446 1.1 mrg _mm_slli_pi16 (__m64 __m, int __count)
447 1.1 mrg {
448 1.1 mrg return (__m64) __builtin_arm_wsllhi ((__v4hi)__m, __count);
449 1.1 mrg }
450 1.1 mrg
451 1.1 mrg /* Shift two 32-bit values in M left by COUNT. */
452 1.1 mrg static __inline __m64
453 1.1 mrg _mm_sll_pi32 (__m64 __m, __m64 __count)
454 1.1 mrg {
455 1.1 mrg return (__m64) __builtin_arm_wsllw ((__v2si)__m, __count);
456 1.1 mrg }
457 1.1 mrg
458 1.1 mrg static __inline __m64
459 1.1 mrg _mm_slli_pi32 (__m64 __m, int __count)
460 1.1 mrg {
461 1.1 mrg return (__m64) __builtin_arm_wsllwi ((__v2si)__m, __count);
462 1.1 mrg }
463 1.1 mrg
464 1.1 mrg /* Shift the 64-bit value in M left by COUNT. */
465 1.1 mrg static __inline __m64
466 1.1 mrg _mm_sll_si64 (__m64 __m, __m64 __count)
467 1.1 mrg {
468 1.1 mrg return (__m64) __builtin_arm_wslld (__m, __count);
469 1.1 mrg }
470 1.1 mrg
471 1.1 mrg static __inline __m64
472 1.1 mrg _mm_slli_si64 (__m64 __m, int __count)
473 1.1 mrg {
474 1.1 mrg return (__m64) __builtin_arm_wslldi (__m, __count);
475 1.1 mrg }
476 1.1 mrg
477 1.1 mrg /* Shift four 16-bit values in M right by COUNT; shift in the sign bit. */
478 1.1 mrg static __inline __m64
479 1.1 mrg _mm_sra_pi16 (__m64 __m, __m64 __count)
480 1.1 mrg {
481 1.1 mrg return (__m64) __builtin_arm_wsrah ((__v4hi)__m, __count);
482 1.1 mrg }
483 1.1 mrg
484 1.1 mrg static __inline __m64
485 1.1 mrg _mm_srai_pi16 (__m64 __m, int __count)
486 1.1 mrg {
487 1.1 mrg return (__m64) __builtin_arm_wsrahi ((__v4hi)__m, __count);
488 1.1 mrg }
489 1.1 mrg
490 1.1 mrg /* Shift two 32-bit values in M right by COUNT; shift in the sign bit. */
491 1.1 mrg static __inline __m64
492 1.1 mrg _mm_sra_pi32 (__m64 __m, __m64 __count)
493 1.1 mrg {
494 1.1 mrg return (__m64) __builtin_arm_wsraw ((__v2si)__m, __count);
495 1.1 mrg }
496 1.1 mrg
497 1.1 mrg static __inline __m64
498 1.1 mrg _mm_srai_pi32 (__m64 __m, int __count)
499 1.1 mrg {
500 1.1 mrg return (__m64) __builtin_arm_wsrawi ((__v2si)__m, __count);
501 1.1 mrg }
502 1.1 mrg
503 1.1 mrg /* Shift the 64-bit value in M right by COUNT; shift in the sign bit. */
504 1.1 mrg static __inline __m64
505 1.1 mrg _mm_sra_si64 (__m64 __m, __m64 __count)
506 1.1 mrg {
507 1.1 mrg return (__m64) __builtin_arm_wsrad (__m, __count);
508 1.1 mrg }
509 1.1 mrg
510 1.1 mrg static __inline __m64
511 1.1 mrg _mm_srai_si64 (__m64 __m, int __count)
512 1.1 mrg {
513 1.1 mrg return (__m64) __builtin_arm_wsradi (__m, __count);
514 1.1 mrg }
515 1.1 mrg
516 1.1 mrg /* Shift four 16-bit values in M right by COUNT; shift in zeros. */
517 1.1 mrg static __inline __m64
518 1.1 mrg _mm_srl_pi16 (__m64 __m, __m64 __count)
519 1.1 mrg {
520 1.1 mrg return (__m64) __builtin_arm_wsrlh ((__v4hi)__m, __count);
521 1.1 mrg }
522 1.1 mrg
523 1.1 mrg static __inline __m64
524 1.1 mrg _mm_srli_pi16 (__m64 __m, int __count)
525 1.1 mrg {
526 1.1 mrg return (__m64) __builtin_arm_wsrlhi ((__v4hi)__m, __count);
527 1.1 mrg }
528 1.1 mrg
529 1.1 mrg /* Shift two 32-bit values in M right by COUNT; shift in zeros. */
530 1.1 mrg static __inline __m64
531 1.1 mrg _mm_srl_pi32 (__m64 __m, __m64 __count)
532 1.1 mrg {
533 1.1 mrg return (__m64) __builtin_arm_wsrlw ((__v2si)__m, __count);
534 1.1 mrg }
535 1.1 mrg
536 1.1 mrg static __inline __m64
537 1.1 mrg _mm_srli_pi32 (__m64 __m, int __count)
538 1.1 mrg {
539 1.1 mrg return (__m64) __builtin_arm_wsrlwi ((__v2si)__m, __count);
540 1.1 mrg }
541 1.1 mrg
542 1.1 mrg /* Shift the 64-bit value in M left by COUNT; shift in zeros. */
543 1.1 mrg static __inline __m64
544 1.1 mrg _mm_srl_si64 (__m64 __m, __m64 __count)
545 1.1 mrg {
546 1.1 mrg return (__m64) __builtin_arm_wsrld (__m, __count);
547 1.1 mrg }
548 1.1 mrg
549 1.1 mrg static __inline __m64
550 1.1 mrg _mm_srli_si64 (__m64 __m, int __count)
551 1.1 mrg {
552 1.1 mrg return (__m64) __builtin_arm_wsrldi (__m, __count);
553 1.1 mrg }
554 1.1 mrg
555 1.1 mrg /* Rotate four 16-bit values in M right by COUNT. */
556 1.1 mrg static __inline __m64
557 1.1 mrg _mm_ror_pi16 (__m64 __m, __m64 __count)
558 1.1 mrg {
559 1.1 mrg return (__m64) __builtin_arm_wrorh ((__v4hi)__m, __count);
560 1.1 mrg }
561 1.1 mrg
562 1.1 mrg static __inline __m64
563 1.1 mrg _mm_rori_pi16 (__m64 __m, int __count)
564 1.1 mrg {
565 1.1 mrg return (__m64) __builtin_arm_wrorhi ((__v4hi)__m, __count);
566 1.1 mrg }
567 1.1 mrg
568 1.1 mrg /* Rotate two 32-bit values in M right by COUNT. */
569 1.1 mrg static __inline __m64
570 1.1 mrg _mm_ror_pi32 (__m64 __m, __m64 __count)
571 1.1 mrg {
572 1.1 mrg return (__m64) __builtin_arm_wrorw ((__v2si)__m, __count);
573 1.1 mrg }
574 1.1 mrg
575 1.1 mrg static __inline __m64
576 1.1 mrg _mm_rori_pi32 (__m64 __m, int __count)
577 1.1 mrg {
578 1.1 mrg return (__m64) __builtin_arm_wrorwi ((__v2si)__m, __count);
579 1.1 mrg }
580 1.1 mrg
581 1.1 mrg /* Rotate two 64-bit values in M right by COUNT. */
582 1.1 mrg static __inline __m64
583 1.1 mrg _mm_ror_si64 (__m64 __m, __m64 __count)
584 1.1 mrg {
585 1.1 mrg return (__m64) __builtin_arm_wrord (__m, __count);
586 1.1 mrg }
587 1.1 mrg
588 1.1 mrg static __inline __m64
589 1.1 mrg _mm_rori_si64 (__m64 __m, int __count)
590 1.1 mrg {
591 1.1 mrg return (__m64) __builtin_arm_wrordi (__m, __count);
592 1.1 mrg }
593 1.1 mrg
594 1.1 mrg /* Bit-wise AND the 64-bit values in M1 and M2. */
595 1.1 mrg static __inline __m64
596 1.1 mrg _mm_and_si64 (__m64 __m1, __m64 __m2)
597 1.1 mrg {
598 1.1 mrg return __builtin_arm_wand (__m1, __m2);
599 1.1 mrg }
600 1.1 mrg
601 1.1 mrg /* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the
602 1.1 mrg 64-bit value in M2. */
603 1.1 mrg static __inline __m64
604 1.1 mrg _mm_andnot_si64 (__m64 __m1, __m64 __m2)
605 1.1 mrg {
606 1.1 mrg return __builtin_arm_wandn (__m1, __m2);
607 1.1 mrg }
608 1.1 mrg
609 1.1 mrg /* Bit-wise inclusive OR the 64-bit values in M1 and M2. */
610 1.1 mrg static __inline __m64
611 1.1 mrg _mm_or_si64 (__m64 __m1, __m64 __m2)
612 1.1 mrg {
613 1.1 mrg return __builtin_arm_wor (__m1, __m2);
614 1.1 mrg }
615 1.1 mrg
616 1.1 mrg /* Bit-wise exclusive OR the 64-bit values in M1 and M2. */
617 1.1 mrg static __inline __m64
618 1.1 mrg _mm_xor_si64 (__m64 __m1, __m64 __m2)
619 1.1 mrg {
620 1.1 mrg return __builtin_arm_wxor (__m1, __m2);
621 1.1 mrg }
622 1.1 mrg
623 1.1 mrg /* Compare eight 8-bit values. The result of the comparison is 0xFF if the
624 1.1 mrg test is true and zero if false. */
625 1.1 mrg static __inline __m64
626 1.1 mrg _mm_cmpeq_pi8 (__m64 __m1, __m64 __m2)
627 1.1 mrg {
628 1.1 mrg return (__m64) __builtin_arm_wcmpeqb ((__v8qi)__m1, (__v8qi)__m2);
629 1.1 mrg }
630 1.1 mrg
631 1.1 mrg static __inline __m64
632 1.1 mrg _mm_cmpgt_pi8 (__m64 __m1, __m64 __m2)
633 1.1 mrg {
634 1.1 mrg return (__m64) __builtin_arm_wcmpgtsb ((__v8qi)__m1, (__v8qi)__m2);
635 1.1 mrg }
636 1.1 mrg
637 1.1 mrg static __inline __m64
638 1.1 mrg _mm_cmpgt_pu8 (__m64 __m1, __m64 __m2)
639 1.1 mrg {
640 1.1 mrg return (__m64) __builtin_arm_wcmpgtub ((__v8qi)__m1, (__v8qi)__m2);
641 1.1 mrg }
642 1.1 mrg
643 1.1 mrg /* Compare four 16-bit values. The result of the comparison is 0xFFFF if
644 1.1 mrg the test is true and zero if false. */
645 1.1 mrg static __inline __m64
646 1.1 mrg _mm_cmpeq_pi16 (__m64 __m1, __m64 __m2)
647 1.1 mrg {
648 1.1 mrg return (__m64) __builtin_arm_wcmpeqh ((__v4hi)__m1, (__v4hi)__m2);
649 1.1 mrg }
650 1.1 mrg
651 1.1 mrg static __inline __m64
652 1.1 mrg _mm_cmpgt_pi16 (__m64 __m1, __m64 __m2)
653 1.1 mrg {
654 1.1 mrg return (__m64) __builtin_arm_wcmpgtsh ((__v4hi)__m1, (__v4hi)__m2);
655 1.1 mrg }
656 1.1 mrg
657 1.1 mrg static __inline __m64
658 1.1 mrg _mm_cmpgt_pu16 (__m64 __m1, __m64 __m2)
659 1.1 mrg {
660 1.1 mrg return (__m64) __builtin_arm_wcmpgtuh ((__v4hi)__m1, (__v4hi)__m2);
661 1.1 mrg }
662 1.1 mrg
663 1.1 mrg /* Compare two 32-bit values. The result of the comparison is 0xFFFFFFFF if
664 1.1 mrg the test is true and zero if false. */
665 1.1 mrg static __inline __m64
666 1.1 mrg _mm_cmpeq_pi32 (__m64 __m1, __m64 __m2)
667 1.1 mrg {
668 1.1 mrg return (__m64) __builtin_arm_wcmpeqw ((__v2si)__m1, (__v2si)__m2);
669 1.1 mrg }
670 1.1 mrg
671 1.1 mrg static __inline __m64
672 1.1 mrg _mm_cmpgt_pi32 (__m64 __m1, __m64 __m2)
673 1.1 mrg {
674 1.1 mrg return (__m64) __builtin_arm_wcmpgtsw ((__v2si)__m1, (__v2si)__m2);
675 1.1 mrg }
676 1.1 mrg
677 1.1 mrg static __inline __m64
678 1.1 mrg _mm_cmpgt_pu32 (__m64 __m1, __m64 __m2)
679 1.1 mrg {
680 1.1 mrg return (__m64) __builtin_arm_wcmpgtuw ((__v2si)__m1, (__v2si)__m2);
681 1.1 mrg }
682 1.1 mrg
683 1.1 mrg /* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
684 1.1 mrg by accumulate across all elements and __A. */
685 1.1 mrg static __inline __m64
686 1.1 mrg _mm_mac_pu16 (__m64 __A, __m64 __B, __m64 __C)
687 1.1 mrg {
688 1.1 mrg return __builtin_arm_wmacu (__A, (__v4hi)__B, (__v4hi)__C);
689 1.1 mrg }
690 1.1 mrg
691 1.1 mrg /* Element-wise multiplication of signed 16-bit values __B and __C, followed
692 1.1 mrg by accumulate across all elements and __A. */
693 1.1 mrg static __inline __m64
694 1.1 mrg _mm_mac_pi16 (__m64 __A, __m64 __B, __m64 __C)
695 1.1 mrg {
696 1.1 mrg return __builtin_arm_wmacs (__A, (__v4hi)__B, (__v4hi)__C);
697 1.1 mrg }
698 1.1 mrg
699 1.1 mrg /* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
700 1.1 mrg by accumulate across all elements. */
701 1.1 mrg static __inline __m64
702 1.1 mrg _mm_macz_pu16 (__m64 __A, __m64 __B)
703 1.1 mrg {
704 1.1 mrg return __builtin_arm_wmacuz ((__v4hi)__A, (__v4hi)__B);
705 1.1 mrg }
706 1.1 mrg
707 1.1 mrg /* Element-wise multiplication of signed 16-bit values __B and __C, followed
708 1.1 mrg by accumulate across all elements. */
709 1.1 mrg static __inline __m64
710 1.1 mrg _mm_macz_pi16 (__m64 __A, __m64 __B)
711 1.1 mrg {
712 1.1 mrg return __builtin_arm_wmacsz ((__v4hi)__A, (__v4hi)__B);
713 1.1 mrg }
714 1.1 mrg
715 1.1 mrg /* Accumulate across all unsigned 8-bit values in __A. */
716 1.1 mrg static __inline __m64
717 1.1 mrg _mm_acc_pu8 (__m64 __A)
718 1.1 mrg {
719 1.1 mrg return __builtin_arm_waccb ((__v8qi)__A);
720 1.1 mrg }
721 1.1 mrg
722 1.1 mrg /* Accumulate across all unsigned 16-bit values in __A. */
723 1.1 mrg static __inline __m64
724 1.1 mrg _mm_acc_pu16 (__m64 __A)
725 1.1 mrg {
726 1.1 mrg return __builtin_arm_wacch ((__v4hi)__A);
727 1.1 mrg }
728 1.1 mrg
729 1.1 mrg /* Accumulate across all unsigned 32-bit values in __A. */
730 1.1 mrg static __inline __m64
731 1.1 mrg _mm_acc_pu32 (__m64 __A)
732 1.1 mrg {
733 1.1 mrg return __builtin_arm_waccw ((__v2si)__A);
734 1.1 mrg }
735 1.1 mrg
736 1.1 mrg static __inline __m64
737 1.1 mrg _mm_mia_si64 (__m64 __A, int __B, int __C)
738 1.1 mrg {
739 1.1 mrg return __builtin_arm_tmia (__A, __B, __C);
740 1.1 mrg }
741 1.1 mrg
742 1.1 mrg static __inline __m64
743 1.1 mrg _mm_miaph_si64 (__m64 __A, int __B, int __C)
744 1.1 mrg {
745 1.1 mrg return __builtin_arm_tmiaph (__A, __B, __C);
746 1.1 mrg }
747 1.1 mrg
748 1.1 mrg static __inline __m64
749 1.1 mrg _mm_miabb_si64 (__m64 __A, int __B, int __C)
750 1.1 mrg {
751 1.1 mrg return __builtin_arm_tmiabb (__A, __B, __C);
752 1.1 mrg }
753 1.1 mrg
754 1.1 mrg static __inline __m64
755 1.1 mrg _mm_miabt_si64 (__m64 __A, int __B, int __C)
756 1.1 mrg {
757 1.1 mrg return __builtin_arm_tmiabt (__A, __B, __C);
758 1.1 mrg }
759 1.1 mrg
760 1.1 mrg static __inline __m64
761 1.1 mrg _mm_miatb_si64 (__m64 __A, int __B, int __C)
762 1.1 mrg {
763 1.1 mrg return __builtin_arm_tmiatb (__A, __B, __C);
764 1.1 mrg }
765 1.1 mrg
766 1.1 mrg static __inline __m64
767 1.1 mrg _mm_miatt_si64 (__m64 __A, int __B, int __C)
768 1.1 mrg {
769 1.1 mrg return __builtin_arm_tmiatt (__A, __B, __C);
770 1.1 mrg }
771 1.1 mrg
772 1.1 mrg /* Extract one of the elements of A and sign extend. The selector N must
773 1.1 mrg be immediate. */
774 1.1 mrg #define _mm_extract_pi8(A, N) __builtin_arm_textrmsb ((__v8qi)(A), (N))
775 1.1 mrg #define _mm_extract_pi16(A, N) __builtin_arm_textrmsh ((__v4hi)(A), (N))
776 1.1 mrg #define _mm_extract_pi32(A, N) __builtin_arm_textrmsw ((__v2si)(A), (N))
777 1.1 mrg
778 1.1 mrg /* Extract one of the elements of A and zero extend. The selector N must
779 1.1 mrg be immediate. */
780 1.1 mrg #define _mm_extract_pu8(A, N) __builtin_arm_textrmub ((__v8qi)(A), (N))
781 1.1 mrg #define _mm_extract_pu16(A, N) __builtin_arm_textrmuh ((__v4hi)(A), (N))
782 1.1 mrg #define _mm_extract_pu32(A, N) __builtin_arm_textrmuw ((__v2si)(A), (N))
783 1.1 mrg
784 1.1 mrg /* Inserts word D into one of the elements of A. The selector N must be
785 1.1 mrg immediate. */
786 1.1 mrg #define _mm_insert_pi8(A, D, N) \
787 1.1 mrg ((__m64) __builtin_arm_tinsrb ((__v8qi)(A), (D), (N)))
788 1.1 mrg #define _mm_insert_pi16(A, D, N) \
789 1.1 mrg ((__m64) __builtin_arm_tinsrh ((__v4hi)(A), (D), (N)))
790 1.1 mrg #define _mm_insert_pi32(A, D, N) \
791 1.1 mrg ((__m64) __builtin_arm_tinsrw ((__v2si)(A), (D), (N)))
792 1.1 mrg
793 1.1 mrg /* Compute the element-wise maximum of signed 8-bit values. */
794 1.1 mrg static __inline __m64
795 1.1 mrg _mm_max_pi8 (__m64 __A, __m64 __B)
796 1.1 mrg {
797 1.1 mrg return (__m64) __builtin_arm_wmaxsb ((__v8qi)__A, (__v8qi)__B);
798 1.1 mrg }
799 1.1 mrg
800 1.1 mrg /* Compute the element-wise maximum of signed 16-bit values. */
801 1.1 mrg static __inline __m64
802 1.1 mrg _mm_max_pi16 (__m64 __A, __m64 __B)
803 1.1 mrg {
804 1.1 mrg return (__m64) __builtin_arm_wmaxsh ((__v4hi)__A, (__v4hi)__B);
805 1.1 mrg }
806 1.1 mrg
807 1.1 mrg /* Compute the element-wise maximum of signed 32-bit values. */
808 1.1 mrg static __inline __m64
809 1.1 mrg _mm_max_pi32 (__m64 __A, __m64 __B)
810 1.1 mrg {
811 1.1 mrg return (__m64) __builtin_arm_wmaxsw ((__v2si)__A, (__v2si)__B);
812 1.1 mrg }
813 1.1 mrg
814 1.1 mrg /* Compute the element-wise maximum of unsigned 8-bit values. */
815 1.1 mrg static __inline __m64
816 1.1 mrg _mm_max_pu8 (__m64 __A, __m64 __B)
817 1.1 mrg {
818 1.1 mrg return (__m64) __builtin_arm_wmaxub ((__v8qi)__A, (__v8qi)__B);
819 1.1 mrg }
820 1.1 mrg
821 1.1 mrg /* Compute the element-wise maximum of unsigned 16-bit values. */
822 1.1 mrg static __inline __m64
823 1.1 mrg _mm_max_pu16 (__m64 __A, __m64 __B)
824 1.1 mrg {
825 1.1 mrg return (__m64) __builtin_arm_wmaxuh ((__v4hi)__A, (__v4hi)__B);
826 1.1 mrg }
827 1.1 mrg
828 1.1 mrg /* Compute the element-wise maximum of unsigned 32-bit values. */
829 1.1 mrg static __inline __m64
830 1.1 mrg _mm_max_pu32 (__m64 __A, __m64 __B)
831 1.1 mrg {
832 1.1 mrg return (__m64) __builtin_arm_wmaxuw ((__v2si)__A, (__v2si)__B);
833 1.1 mrg }
834 1.1 mrg
835 1.1 mrg /* Compute the element-wise minimum of signed 16-bit values. */
836 1.1 mrg static __inline __m64
837 1.1 mrg _mm_min_pi8 (__m64 __A, __m64 __B)
838 1.1 mrg {
839 1.1 mrg return (__m64) __builtin_arm_wminsb ((__v8qi)__A, (__v8qi)__B);
840 1.1 mrg }
841 1.1 mrg
842 1.1 mrg /* Compute the element-wise minimum of signed 16-bit values. */
843 1.1 mrg static __inline __m64
844 1.1 mrg _mm_min_pi16 (__m64 __A, __m64 __B)
845 1.1 mrg {
846 1.1 mrg return (__m64) __builtin_arm_wminsh ((__v4hi)__A, (__v4hi)__B);
847 1.1 mrg }
848 1.1 mrg
849 1.1 mrg /* Compute the element-wise minimum of signed 32-bit values. */
850 1.1 mrg static __inline __m64
851 1.1 mrg _mm_min_pi32 (__m64 __A, __m64 __B)
852 1.1 mrg {
853 1.1 mrg return (__m64) __builtin_arm_wminsw ((__v2si)__A, (__v2si)__B);
854 1.1 mrg }
855 1.1 mrg
856 1.1 mrg /* Compute the element-wise minimum of unsigned 16-bit values. */
857 1.1 mrg static __inline __m64
858 1.1 mrg _mm_min_pu8 (__m64 __A, __m64 __B)
859 1.1 mrg {
860 1.1 mrg return (__m64) __builtin_arm_wminub ((__v8qi)__A, (__v8qi)__B);
861 1.1 mrg }
862 1.1 mrg
863 1.1 mrg /* Compute the element-wise minimum of unsigned 16-bit values. */
864 1.1 mrg static __inline __m64
865 1.1 mrg _mm_min_pu16 (__m64 __A, __m64 __B)
866 1.1 mrg {
867 1.1 mrg return (__m64) __builtin_arm_wminuh ((__v4hi)__A, (__v4hi)__B);
868 1.1 mrg }
869 1.1 mrg
870 1.1 mrg /* Compute the element-wise minimum of unsigned 32-bit values. */
871 1.1 mrg static __inline __m64
872 1.1 mrg _mm_min_pu32 (__m64 __A, __m64 __B)
873 1.1 mrg {
874 1.1 mrg return (__m64) __builtin_arm_wminuw ((__v2si)__A, (__v2si)__B);
875 1.1 mrg }
876 1.1 mrg
877 1.1 mrg /* Create an 8-bit mask of the signs of 8-bit values. */
878 1.1 mrg static __inline int
879 1.1 mrg _mm_movemask_pi8 (__m64 __A)
880 1.1 mrg {
881 1.1 mrg return __builtin_arm_tmovmskb ((__v8qi)__A);
882 1.1 mrg }
883 1.1 mrg
884 1.1 mrg /* Create an 8-bit mask of the signs of 16-bit values. */
885 1.1 mrg static __inline int
886 1.1 mrg _mm_movemask_pi16 (__m64 __A)
887 1.1 mrg {
888 1.1 mrg return __builtin_arm_tmovmskh ((__v4hi)__A);
889 1.1 mrg }
890 1.1 mrg
891 1.1 mrg /* Create an 8-bit mask of the signs of 32-bit values. */
892 1.1 mrg static __inline int
893 1.1 mrg _mm_movemask_pi32 (__m64 __A)
894 1.1 mrg {
895 1.1 mrg return __builtin_arm_tmovmskw ((__v2si)__A);
896 1.1 mrg }
897 1.1 mrg
898 1.1 mrg /* Return a combination of the four 16-bit values in A. The selector
899 1.1 mrg must be an immediate. */
900 1.1 mrg #define _mm_shuffle_pi16(A, N) \
901 1.1 mrg ((__m64) __builtin_arm_wshufh ((__v4hi)(A), (N)))
902 1.1 mrg
903 1.1 mrg
904 1.1 mrg /* Compute the rounded averages of the unsigned 8-bit values in A and B. */
905 1.1 mrg static __inline __m64
906 1.1 mrg _mm_avg_pu8 (__m64 __A, __m64 __B)
907 1.1 mrg {
908 1.1 mrg return (__m64) __builtin_arm_wavg2br ((__v8qi)__A, (__v8qi)__B);
909 1.1 mrg }
910 1.1 mrg
911 1.1 mrg /* Compute the rounded averages of the unsigned 16-bit values in A and B. */
912 1.1 mrg static __inline __m64
913 1.1 mrg _mm_avg_pu16 (__m64 __A, __m64 __B)
914 1.1 mrg {
915 1.1 mrg return (__m64) __builtin_arm_wavg2hr ((__v4hi)__A, (__v4hi)__B);
916 1.1 mrg }
917 1.1 mrg
918 1.1 mrg /* Compute the averages of the unsigned 8-bit values in A and B. */
919 1.1 mrg static __inline __m64
920 1.1 mrg _mm_avg2_pu8 (__m64 __A, __m64 __B)
921 1.1 mrg {
922 1.1 mrg return (__m64) __builtin_arm_wavg2b ((__v8qi)__A, (__v8qi)__B);
923 1.1 mrg }
924 1.1 mrg
925 1.1 mrg /* Compute the averages of the unsigned 16-bit values in A and B. */
926 1.1 mrg static __inline __m64
927 1.1 mrg _mm_avg2_pu16 (__m64 __A, __m64 __B)
928 1.1 mrg {
929 1.1 mrg return (__m64) __builtin_arm_wavg2h ((__v4hi)__A, (__v4hi)__B);
930 1.1 mrg }
931 1.1 mrg
932 1.1 mrg /* Compute the sum of the absolute differences of the unsigned 8-bit
933 1.1 mrg values in A and B. Return the value in the lower 16-bit word; the
934 1.1 mrg upper words are cleared. */
935 1.1 mrg static __inline __m64
936 1.1 mrg _mm_sad_pu8 (__m64 __A, __m64 __B)
937 1.1 mrg {
938 1.1 mrg return (__m64) __builtin_arm_wsadb ((__v8qi)__A, (__v8qi)__B);
939 1.1 mrg }
940 1.1 mrg
941 1.1 mrg /* Compute the sum of the absolute differences of the unsigned 16-bit
942 1.1 mrg values in A and B. Return the value in the lower 32-bit word; the
943 1.1 mrg upper words are cleared. */
944 1.1 mrg static __inline __m64
945 1.1 mrg _mm_sad_pu16 (__m64 __A, __m64 __B)
946 1.1 mrg {
947 1.1 mrg return (__m64) __builtin_arm_wsadh ((__v4hi)__A, (__v4hi)__B);
948 1.1 mrg }
949 1.1 mrg
950 1.1 mrg /* Compute the sum of the absolute differences of the unsigned 8-bit
951 1.1 mrg values in A and B. Return the value in the lower 16-bit word; the
952 1.1 mrg upper words are cleared. */
953 1.1 mrg static __inline __m64
954 1.1 mrg _mm_sadz_pu8 (__m64 __A, __m64 __B)
955 1.1 mrg {
956 1.1 mrg return (__m64) __builtin_arm_wsadbz ((__v8qi)__A, (__v8qi)__B);
957 1.1 mrg }
958 1.1 mrg
959 1.1 mrg /* Compute the sum of the absolute differences of the unsigned 16-bit
960 1.1 mrg values in A and B. Return the value in the lower 32-bit word; the
961 1.1 mrg upper words are cleared. */
962 1.1 mrg static __inline __m64
963 1.1 mrg _mm_sadz_pu16 (__m64 __A, __m64 __B)
964 1.1 mrg {
965 1.1 mrg return (__m64) __builtin_arm_wsadhz ((__v4hi)__A, (__v4hi)__B);
966 1.1 mrg }
967 1.1 mrg
968 1.1 mrg static __inline __m64
969 1.1 mrg _mm_align_si64 (__m64 __A, __m64 __B, int __C)
970 1.1 mrg {
971 1.1 mrg return (__m64) __builtin_arm_walign ((__v8qi)__A, (__v8qi)__B, __C);
972 1.1 mrg }
973 1.1 mrg
974 1.1 mrg /* Creates a 64-bit zero. */
975 1.1 mrg static __inline __m64
976 1.1 mrg _mm_setzero_si64 (void)
977 1.1 mrg {
978 1.1 mrg return __builtin_arm_wzero ();
979 1.1 mrg }
980 1.1 mrg
981 1.1 mrg /* Set and Get arbitrary iWMMXt Control registers.
982 1.1 mrg Note only registers 0-3 and 8-11 are currently defined,
983 1.1 mrg the rest are reserved. */
984 1.1 mrg
985 1.1 mrg static __inline void
986 1.1 mrg _mm_setwcx (const int __value, const int __regno)
987 1.1 mrg {
988 1.1 mrg switch (__regno)
989 1.1 mrg {
990 1.1 mrg case 0: __builtin_arm_setwcx (__value, 0); break;
991 1.1 mrg case 1: __builtin_arm_setwcx (__value, 1); break;
992 1.1 mrg case 2: __builtin_arm_setwcx (__value, 2); break;
993 1.1 mrg case 3: __builtin_arm_setwcx (__value, 3); break;
994 1.1 mrg case 8: __builtin_arm_setwcx (__value, 8); break;
995 1.1 mrg case 9: __builtin_arm_setwcx (__value, 9); break;
996 1.1 mrg case 10: __builtin_arm_setwcx (__value, 10); break;
997 1.1 mrg case 11: __builtin_arm_setwcx (__value, 11); break;
998 1.1 mrg default: break;
999 1.1 mrg }
1000 1.1 mrg }
1001 1.1 mrg
1002 1.1 mrg static __inline int
1003 1.1 mrg _mm_getwcx (const int __regno)
1004 1.1 mrg {
1005 1.1 mrg switch (__regno)
1006 1.1 mrg {
1007 1.1 mrg case 0: return __builtin_arm_getwcx (0);
1008 1.1 mrg case 1: return __builtin_arm_getwcx (1);
1009 1.1 mrg case 2: return __builtin_arm_getwcx (2);
1010 1.1 mrg case 3: return __builtin_arm_getwcx (3);
1011 1.1 mrg case 8: return __builtin_arm_getwcx (8);
1012 1.1 mrg case 9: return __builtin_arm_getwcx (9);
1013 1.1 mrg case 10: return __builtin_arm_getwcx (10);
1014 1.1 mrg case 11: return __builtin_arm_getwcx (11);
1015 1.1 mrg default: return 0;
1016 1.1 mrg }
1017 1.1 mrg }
1018 1.1 mrg
1019 1.1 mrg /* Creates a vector of two 32-bit values; I0 is least significant. */
1020 1.1 mrg static __inline __m64
1021 1.1 mrg _mm_set_pi32 (int __i1, int __i0)
1022 1.1 mrg {
1023 1.1 mrg union {
1024 1.1 mrg __m64 __q;
1025 1.1 mrg struct {
1026 1.1 mrg unsigned int __i0;
1027 1.1 mrg unsigned int __i1;
1028 1.1 mrg } __s;
1029 1.1 mrg } __u;
1030 1.1 mrg
1031 1.1 mrg __u.__s.__i0 = __i0;
1032 1.1 mrg __u.__s.__i1 = __i1;
1033 1.1 mrg
1034 1.1 mrg return __u.__q;
1035 1.1 mrg }
1036 1.1 mrg
1037 1.1 mrg /* Creates a vector of four 16-bit values; W0 is least significant. */
1038 1.1 mrg static __inline __m64
1039 1.1 mrg _mm_set_pi16 (short __w3, short __w2, short __w1, short __w0)
1040 1.1 mrg {
1041 1.1 mrg unsigned int __i1 = (unsigned short)__w3 << 16 | (unsigned short)__w2;
1042 1.1 mrg unsigned int __i0 = (unsigned short)__w1 << 16 | (unsigned short)__w0;
1043 1.1 mrg return _mm_set_pi32 (__i1, __i0);
1044 1.1 mrg
1045 1.1 mrg }
1046 1.1 mrg
1047 1.1 mrg /* Creates a vector of eight 8-bit values; B0 is least significant. */
1048 1.1 mrg static __inline __m64
1049 1.1 mrg _mm_set_pi8 (char __b7, char __b6, char __b5, char __b4,
1050 1.1 mrg char __b3, char __b2, char __b1, char __b0)
1051 1.1 mrg {
1052 1.1 mrg unsigned int __i1, __i0;
1053 1.1 mrg
1054 1.1 mrg __i1 = (unsigned char)__b7;
1055 1.1 mrg __i1 = __i1 << 8 | (unsigned char)__b6;
1056 1.1 mrg __i1 = __i1 << 8 | (unsigned char)__b5;
1057 1.1 mrg __i1 = __i1 << 8 | (unsigned char)__b4;
1058 1.1 mrg
1059 1.1 mrg __i0 = (unsigned char)__b3;
1060 1.1 mrg __i0 = __i0 << 8 | (unsigned char)__b2;
1061 1.1 mrg __i0 = __i0 << 8 | (unsigned char)__b1;
1062 1.1 mrg __i0 = __i0 << 8 | (unsigned char)__b0;
1063 1.1 mrg
1064 1.1 mrg return _mm_set_pi32 (__i1, __i0);
1065 1.1 mrg }
1066 1.1 mrg
1067 1.1 mrg /* Similar, but with the arguments in reverse order. */
1068 1.1 mrg static __inline __m64
1069 1.1 mrg _mm_setr_pi32 (int __i0, int __i1)
1070 1.1 mrg {
1071 1.1 mrg return _mm_set_pi32 (__i1, __i0);
1072 1.1 mrg }
1073 1.1 mrg
1074 1.1 mrg static __inline __m64
1075 1.1 mrg _mm_setr_pi16 (short __w0, short __w1, short __w2, short __w3)
1076 1.1 mrg {
1077 1.1 mrg return _mm_set_pi16 (__w3, __w2, __w1, __w0);
1078 1.1 mrg }
1079 1.1 mrg
1080 1.1 mrg static __inline __m64
1081 1.1 mrg _mm_setr_pi8 (char __b0, char __b1, char __b2, char __b3,
1082 1.1 mrg char __b4, char __b5, char __b6, char __b7)
1083 1.1 mrg {
1084 1.1 mrg return _mm_set_pi8 (__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
1085 1.1 mrg }
1086 1.1 mrg
1087 1.1 mrg /* Creates a vector of two 32-bit values, both elements containing I. */
1088 1.1 mrg static __inline __m64
1089 1.1 mrg _mm_set1_pi32 (int __i)
1090 1.1 mrg {
1091 1.1 mrg return _mm_set_pi32 (__i, __i);
1092 1.1 mrg }
1093 1.1 mrg
1094 1.1 mrg /* Creates a vector of four 16-bit values, all elements containing W. */
1095 1.1 mrg static __inline __m64
1096 1.1 mrg _mm_set1_pi16 (short __w)
1097 1.1 mrg {
1098 1.1 mrg unsigned int __i = (unsigned short)__w << 16 | (unsigned short)__w;
1099 1.1 mrg return _mm_set1_pi32 (__i);
1100 1.1 mrg }
1101 1.1 mrg
1102 1.1 mrg /* Creates a vector of four 16-bit values, all elements containing B. */
1103 1.1 mrg static __inline __m64
1104 1.1 mrg _mm_set1_pi8 (char __b)
1105 1.1 mrg {
1106 1.1 mrg unsigned int __w = (unsigned char)__b << 8 | (unsigned char)__b;
1107 1.1 mrg unsigned int __i = __w << 16 | __w;
1108 1.1 mrg return _mm_set1_pi32 (__i);
1109 1.1 mrg }
1110 1.1 mrg
1111 1.1 mrg /* Convert an integer to a __m64 object. */
1112 1.1 mrg static __inline __m64
1113 1.1 mrg _m_from_int (int __a)
1114 1.1 mrg {
1115 1.1 mrg return (__m64)__a;
1116 1.1 mrg }
1117 1.1 mrg
1118 1.1 mrg #define _m_packsswb _mm_packs_pi16
1119 1.1 mrg #define _m_packssdw _mm_packs_pi32
1120 1.1 mrg #define _m_packuswb _mm_packs_pu16
1121 1.1 mrg #define _m_packusdw _mm_packs_pu32
1122 1.1 mrg #define _m_packssqd _mm_packs_pi64
1123 1.1 mrg #define _m_packusqd _mm_packs_pu64
1124 1.1 mrg #define _mm_packs_si64 _mm_packs_pi64
1125 1.1 mrg #define _mm_packs_su64 _mm_packs_pu64
1126 1.1 mrg #define _m_punpckhbw _mm_unpackhi_pi8
1127 1.1 mrg #define _m_punpckhwd _mm_unpackhi_pi16
1128 1.1 mrg #define _m_punpckhdq _mm_unpackhi_pi32
1129 1.1 mrg #define _m_punpcklbw _mm_unpacklo_pi8
1130 1.1 mrg #define _m_punpcklwd _mm_unpacklo_pi16
1131 1.1 mrg #define _m_punpckldq _mm_unpacklo_pi32
1132 1.1 mrg #define _m_punpckehsbw _mm_unpackeh_pi8
1133 1.1 mrg #define _m_punpckehswd _mm_unpackeh_pi16
1134 1.1 mrg #define _m_punpckehsdq _mm_unpackeh_pi32
1135 1.1 mrg #define _m_punpckehubw _mm_unpackeh_pu8
1136 1.1 mrg #define _m_punpckehuwd _mm_unpackeh_pu16
1137 1.1 mrg #define _m_punpckehudq _mm_unpackeh_pu32
1138 1.1 mrg #define _m_punpckelsbw _mm_unpackel_pi8
1139 1.1 mrg #define _m_punpckelswd _mm_unpackel_pi16
1140 1.1 mrg #define _m_punpckelsdq _mm_unpackel_pi32
1141 1.1 mrg #define _m_punpckelubw _mm_unpackel_pu8
1142 1.1 mrg #define _m_punpckeluwd _mm_unpackel_pu16
1143 1.1 mrg #define _m_punpckeludq _mm_unpackel_pu32
1144 1.1 mrg #define _m_paddb _mm_add_pi8
1145 1.1 mrg #define _m_paddw _mm_add_pi16
1146 1.1 mrg #define _m_paddd _mm_add_pi32
1147 1.1 mrg #define _m_paddsb _mm_adds_pi8
1148 1.1 mrg #define _m_paddsw _mm_adds_pi16
1149 1.1 mrg #define _m_paddsd _mm_adds_pi32
1150 1.1 mrg #define _m_paddusb _mm_adds_pu8
1151 1.1 mrg #define _m_paddusw _mm_adds_pu16
1152 1.1 mrg #define _m_paddusd _mm_adds_pu32
1153 1.1 mrg #define _m_psubb _mm_sub_pi8
1154 1.1 mrg #define _m_psubw _mm_sub_pi16
1155 1.1 mrg #define _m_psubd _mm_sub_pi32
1156 1.1 mrg #define _m_psubsb _mm_subs_pi8
1157 1.1 mrg #define _m_psubsw _mm_subs_pi16
1158 1.1 mrg #define _m_psubuw _mm_subs_pi32
1159 1.1 mrg #define _m_psubusb _mm_subs_pu8
1160 1.1 mrg #define _m_psubusw _mm_subs_pu16
1161 1.1 mrg #define _m_psubusd _mm_subs_pu32
1162 1.1 mrg #define _m_pmaddwd _mm_madd_pi16
1163 1.1 mrg #define _m_pmadduwd _mm_madd_pu16
1164 1.1 mrg #define _m_pmulhw _mm_mulhi_pi16
1165 1.1 mrg #define _m_pmulhuw _mm_mulhi_pu16
1166 1.1 mrg #define _m_pmullw _mm_mullo_pi16
1167 1.1 mrg #define _m_pmacsw _mm_mac_pi16
1168 1.1 mrg #define _m_pmacuw _mm_mac_pu16
1169 1.1 mrg #define _m_pmacszw _mm_macz_pi16
1170 1.1 mrg #define _m_pmacuzw _mm_macz_pu16
1171 1.1 mrg #define _m_paccb _mm_acc_pu8
1172 1.1 mrg #define _m_paccw _mm_acc_pu16
1173 1.1 mrg #define _m_paccd _mm_acc_pu32
1174 1.1 mrg #define _m_pmia _mm_mia_si64
1175 1.1 mrg #define _m_pmiaph _mm_miaph_si64
1176 1.1 mrg #define _m_pmiabb _mm_miabb_si64
1177 1.1 mrg #define _m_pmiabt _mm_miabt_si64
1178 1.1 mrg #define _m_pmiatb _mm_miatb_si64
1179 1.1 mrg #define _m_pmiatt _mm_miatt_si64
1180 1.1 mrg #define _m_psllw _mm_sll_pi16
1181 1.1 mrg #define _m_psllwi _mm_slli_pi16
1182 1.1 mrg #define _m_pslld _mm_sll_pi32
1183 1.1 mrg #define _m_pslldi _mm_slli_pi32
1184 1.1 mrg #define _m_psllq _mm_sll_si64
1185 1.1 mrg #define _m_psllqi _mm_slli_si64
1186 1.1 mrg #define _m_psraw _mm_sra_pi16
1187 1.1 mrg #define _m_psrawi _mm_srai_pi16
1188 1.1 mrg #define _m_psrad _mm_sra_pi32
1189 1.1 mrg #define _m_psradi _mm_srai_pi32
1190 1.1 mrg #define _m_psraq _mm_sra_si64
1191 1.1 mrg #define _m_psraqi _mm_srai_si64
1192 1.1 mrg #define _m_psrlw _mm_srl_pi16
1193 1.1 mrg #define _m_psrlwi _mm_srli_pi16
1194 1.1 mrg #define _m_psrld _mm_srl_pi32
1195 1.1 mrg #define _m_psrldi _mm_srli_pi32
1196 1.1 mrg #define _m_psrlq _mm_srl_si64
1197 1.1 mrg #define _m_psrlqi _mm_srli_si64
1198 1.1 mrg #define _m_prorw _mm_ror_pi16
1199 1.1 mrg #define _m_prorwi _mm_rori_pi16
1200 1.1 mrg #define _m_prord _mm_ror_pi32
1201 1.1 mrg #define _m_prordi _mm_rori_pi32
1202 1.1 mrg #define _m_prorq _mm_ror_si64
1203 1.1 mrg #define _m_prorqi _mm_rori_si64
1204 1.1 mrg #define _m_pand _mm_and_si64
1205 1.1 mrg #define _m_pandn _mm_andnot_si64
1206 1.1 mrg #define _m_por _mm_or_si64
1207 1.1 mrg #define _m_pxor _mm_xor_si64
1208 1.1 mrg #define _m_pcmpeqb _mm_cmpeq_pi8
1209 1.1 mrg #define _m_pcmpeqw _mm_cmpeq_pi16
1210 1.1 mrg #define _m_pcmpeqd _mm_cmpeq_pi32
1211 1.1 mrg #define _m_pcmpgtb _mm_cmpgt_pi8
1212 1.1 mrg #define _m_pcmpgtub _mm_cmpgt_pu8
1213 1.1 mrg #define _m_pcmpgtw _mm_cmpgt_pi16
1214 1.1 mrg #define _m_pcmpgtuw _mm_cmpgt_pu16
1215 1.1 mrg #define _m_pcmpgtd _mm_cmpgt_pi32
1216 1.1 mrg #define _m_pcmpgtud _mm_cmpgt_pu32
1217 1.1 mrg #define _m_pextrb _mm_extract_pi8
1218 1.1 mrg #define _m_pextrw _mm_extract_pi16
1219 1.1 mrg #define _m_pextrd _mm_extract_pi32
1220 1.1 mrg #define _m_pextrub _mm_extract_pu8
1221 1.1 mrg #define _m_pextruw _mm_extract_pu16
1222 1.1 mrg #define _m_pextrud _mm_extract_pu32
1223 1.1 mrg #define _m_pinsrb _mm_insert_pi8
1224 1.1 mrg #define _m_pinsrw _mm_insert_pi16
1225 1.1 mrg #define _m_pinsrd _mm_insert_pi32
1226 1.1 mrg #define _m_pmaxsb _mm_max_pi8
1227 1.1 mrg #define _m_pmaxsw _mm_max_pi16
1228 1.1 mrg #define _m_pmaxsd _mm_max_pi32
1229 1.1 mrg #define _m_pmaxub _mm_max_pu8
1230 1.1 mrg #define _m_pmaxuw _mm_max_pu16
1231 1.1 mrg #define _m_pmaxud _mm_max_pu32
1232 1.1 mrg #define _m_pminsb _mm_min_pi8
1233 1.1 mrg #define _m_pminsw _mm_min_pi16
1234 1.1 mrg #define _m_pminsd _mm_min_pi32
1235 1.1 mrg #define _m_pminub _mm_min_pu8
1236 1.1 mrg #define _m_pminuw _mm_min_pu16
1237 1.1 mrg #define _m_pminud _mm_min_pu32
1238 1.1 mrg #define _m_pmovmskb _mm_movemask_pi8
1239 1.1 mrg #define _m_pmovmskw _mm_movemask_pi16
1240 1.1 mrg #define _m_pmovmskd _mm_movemask_pi32
1241 1.1 mrg #define _m_pshufw _mm_shuffle_pi16
1242 1.1 mrg #define _m_pavgb _mm_avg_pu8
1243 1.1 mrg #define _m_pavgw _mm_avg_pu16
1244 1.1 mrg #define _m_pavg2b _mm_avg2_pu8
1245 1.1 mrg #define _m_pavg2w _mm_avg2_pu16
1246 1.1 mrg #define _m_psadbw _mm_sad_pu8
1247 1.1 mrg #define _m_psadwd _mm_sad_pu16
1248 1.1 mrg #define _m_psadzbw _mm_sadz_pu8
1249 1.1 mrg #define _m_psadzwd _mm_sadz_pu16
1250 1.1 mrg #define _m_paligniq _mm_align_si64
1251 1.1 mrg #define _m_cvt_si2pi _mm_cvtsi64_m64
1252 1.1 mrg #define _m_cvt_pi2si _mm_cvtm64_si64
1253 1.1 mrg
1254 1.1 mrg #endif /* _MMINTRIN_H_INCLUDED */
1255