csky.h revision 1.1.1.3
1 /* Declarations for the C-SKY back end. 2 Copyright (C) 2018-2022 Free Software Foundation, Inc. 3 Contributed by C-SKY Microsystems and Mentor Graphics. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21 22 #ifndef GCC_CSKY_H 23 #define GCC_CSKY_H 24 25 /* In some places e.g. csky_secondary_reload, we use -1 to indicate an 26 invalid register. In other places where N is unsigned the comparison 27 to zero would give an error, so explicitly cast to int here. */ 28 #define CSKY_GENERAL_REGNO_P(N) \ 29 ((N) < CSKY_NGPR_REGS && (int)(N) >= 0) 30 31 #define CSKY_VREG_LO_P(N) \ 32 ((N) >= CSKY_FIRST_VFP_REGNUM \ 33 && (N) <= CSKY_LAST_VFP_REGNUM) 34 35 #define CSKY_VREG_HI_P(N) \ 36 ((N) >= CSKY_FIRST_VFP3_REGNUM \ 37 && (N) <= CSKY_LAST_VFP3_REGNUM) 38 39 #define CSKY_VREG_P(N) \ 40 (CSKY_VREG_LO_P(N) \ 41 || CSKY_VREG_HI_P(N)) 42 43 #define CSKY_HILO_REG_P(N) \ 44 ((N) == CSKY_HI_REGNUM || (N) == CSKY_LO_REGNUM) 45 46 /* Helper macros for constant constraints and predicates. */ 47 #define CSKY_VALUE_BETWEEN(VALUE, LOW, HIGH) \ 48 ((VALUE) >= (LOW) && (VALUE) <= (HIGH)) 49 50 #define CSKY_CONST_OK_FOR_I(VALUE) \ 51 CSKY_VALUE_BETWEEN (VALUE, 0, 65535) 52 53 #define CSKY_CONST_OK_FOR_J(VALUE) \ 54 CSKY_VALUE_BETWEEN (VALUE, 1, 32) 55 56 #define CSKY_CONST_OK_FOR_K(VALUE) \ 57 CSKY_VALUE_BETWEEN (VALUE, 0, 31) 58 59 #define CSKY_CONST_OK_FOR_L(VALUE) \ 60 CSKY_VALUE_BETWEEN (VALUE, 1, 8) 61 62 #define CSKY_CONST_OK_FOR_M(VALUE) \ 63 CSKY_VALUE_BETWEEN (VALUE, 1, 4096) 64 65 #define CSKY_CONST_OK_FOR_N(VALUE) \ 66 CSKY_VALUE_BETWEEN (VALUE, 1, 256) 67 68 #define CSKY_CONST_OK_FOR_O(VALUE) \ 69 CSKY_VALUE_BETWEEN (VALUE, 0, 4095) 70 71 #define CSKY_CONST_OK_FOR_P(VALUE) \ 72 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 4, 508)) 73 74 #define CSKY_CONST_OK_FOR_T(VALUE) \ 75 CSKY_VALUE_BETWEEN (VALUE, -256, -1) 76 77 #define CSKY_CONST_OK_FOR_Ub(VALUE) \ 78 (exact_log2 (VALUE & 0xFFFFFFFF) >= 0) 79 80 #define CSKY_CONST_OK_FOR_Uc(VALUE) \ 81 ((VALUE) == (HOST_WIDE_INT) -1 \ 82 || (exact_log2 ((VALUE) + 1) >= 0 \ 83 && exact_log2 ((VALUE) + 1) <= 31)) 84 85 #define CSKY_CONST_OK_FOR_Ud(VALUE) \ 86 ((CSKY_CONST_OK_FOR_I ((VALUE) & 0xffffffff) \ 87 || CSKY_CONST_OK_FOR_Ub ((VALUE)) \ 88 || CSKY_CONST_OK_FOR_Uc (((VALUE) << 32) >> 32)) \ 89 && (CSKY_CONST_OK_FOR_I ((VALUE) >> 32) \ 90 || CSKY_CONST_OK_FOR_Ub ((VALUE) >> 32) \ 91 || CSKY_CONST_OK_FOR_Uc ((VALUE) >> 32))) \ 92 93 #define CSKY_CONST_OK_FOR_Ug(VALUE) \ 94 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -508, -4)) 95 96 #define CSKY_CONST_OK_FOR_Uh(VALUE) \ 97 CSKY_VALUE_BETWEEN (VALUE, -31, 0) 98 99 #define CSKY_CONST_OK_FOR_Uj(VALUE) \ 100 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 1, 1024)) 101 102 #define CSKY_CONST_OK_FOR_Uk(VALUE) \ 103 CSKY_VALUE_BETWEEN (VALUE, 1, 65536) 104 105 #define CSKY_CONST_OK_FOR_Ul(VALUE) \ 106 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -1024, -4)) 107 108 #define CSKY_CONST_OK_FOR_Um(VALUE) \ 109 CSKY_VALUE_BETWEEN (VALUE, -4096, -1) 110 111 #define CSKY_CONST_OK_FOR_US(VALUE) \ 112 CSKY_VALUE_BETWEEN (VALUE, -8, -1) 113 114 #define CSKY_CONST_OK_FOR_MOVIH(VALUE) \ 115 (((VALUE) & 0xFFFF) == 0) 116 117 #ifndef TARGET_CPU_DEFAULT 118 #define TARGET_CPU_DEFAULT CSKY_TARGET_CORE_GET(ck810f) 119 #endif 120 121 /* Options that are enabled by default are specified as such in the 122 .opt file. */ 123 #define TARGET_DEFAULT 0 124 125 /* The highest CSKY architecture version supported by the target. */ 126 #define CSKY_TARGET_ARCH(arch) \ 127 (csky_base_arch == CSKY_TARGET_ARCH_GET (arch)) 128 129 /* Define some macros for target code generation options. */ 130 #define TARGET_SOFT_FPU \ 131 (csky_fpu_index == TARGET_FPU_fpv2_sf) 132 #define TARGET_CASESI \ 133 (optimize_size && TARGET_CONSTANT_POOL \ 134 && (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802))) 135 #define TARGET_TLS \ 136 (CSKY_TARGET_ARCH (CK807) || CSKY_TARGET_ARCH (CK810) || CSKY_TARGET_ARCH (CK860)) 137 138 /* Run-time Target Specification. */ 139 #define TARGET_SOFT_FLOAT (csky_float_abi == CSKY_FLOAT_ABI_SOFT) 140 /* Use hardware floating point instructions. */ 141 #define TARGET_HARD_FLOAT (csky_float_abi != CSKY_FLOAT_ABI_SOFT) 142 /* Use hardware floating point calling convention. */ 143 #define TARGET_HARD_FLOAT_ABI (csky_float_abi == CSKY_FLOAT_ABI_HARD) 144 145 #define TARGET_SINGLE_FPU (csky_fpu_index == TARGET_FPU_fpv2_sf \ 146 || csky_fpu_index == TARGET_FPU_fpv3_hsf \ 147 || csky_fpu_index == TARGET_FPU_fpv3_hf) 148 #define TARGET_DOUBLE_FPU (TARGET_HARD_FLOAT && !TARGET_SINGLE_FPU) 149 150 #define FUNCTION_VARG_REGNO_P(REGNO) \ 151 (TARGET_HARD_FLOAT_ABI \ 152 && IN_RANGE ((REGNO), CSKY_FIRST_VFP_REGNUM, \ 153 CSKY_FIRST_VFP_REGNUM + CSKY_NPARM_FREGS - 1)) 154 155 #define CSKY_VREG_MODE_P(mode) \ 156 ((mode) == SFmode || (mode) == DFmode \ 157 || (CSKY_ISA_FEATURE(fpv3_hf) && (mode) == HFmode)) 158 159 #define FUNCTION_VARG_MODE_P(mode) \ 160 (TARGET_HARD_FLOAT_ABI \ 161 && CSKY_VREG_MODE_P(mode) \ 162 && !(mode == DFmode && TARGET_SINGLE_FPU)) 163 164 #define TARGET_SUPPORT_FPV3 (CSKY_ISA_FEATURE (fpv3_hf) \ 165 || CSKY_ISA_FEATURE (fpv3_sf) \ 166 || CSKY_ISA_FEATURE (fpv3_df)) 167 168 /* Number of loads/stores handled by ldm/stm. */ 169 #define CSKY_MIN_MULTIPLE_STLD 3 170 #define CSKY_MAX_MULTIPLE_STLD 12 171 172 /* Pull in enums and defines for processor/arch variants. This makes 173 it possible to use CSKY_TARGET_ARCH in macros defined in this file. */ 174 #include "csky_opts.h" 175 extern enum csky_base_architecture csky_base_arch; 176 177 /* Pull in enums and defines for ISA features. Likewise required to 178 support use of CSKY_ISA_FEATURE in this file. 179 Note that the CSKY_ISA_FEATURE macro tests properties of the 180 particular processor we're compiling for, not code generation 181 options that may have dependencies on those features. The latter 182 are handled by TARGET_xxxx macros/variables instead. See csky.opt. */ 183 #include "csky_isa.h" 184 extern int csky_arch_isa_features[]; 185 #define CSKY_ISA_FEATURE(IDENT) \ 186 csky_arch_isa_features[CSKY_ISA_FEATURE_GET (IDENT)] 187 188 /****************************************************************** 189 * Storage Layout * 190 ******************************************************************/ 191 192 193 /* Define this if most significant bit is lowest numbered 194 in instructions that operate on numbered bit-fields. */ 195 #define BITS_BIG_ENDIAN 0 196 197 /* If the most significant byte of a word is the lowest numbered. */ 198 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0) 199 200 /* If the most significant word of a multiword number is the lowest. */ 201 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN) 202 203 /* Width of a word, in units (bytes). */ 204 #define UNITS_PER_WORD 4 205 206 /* Define this macro if it is advisable to hold scalars in registers 207 in a wider mode than that declared by the program. In such cases, 208 the value is constrained to be within the bounds of the declared 209 type, but kept valid in the wider mode. The signedness of the 210 extension may differ from that of the type. */ 211 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 212 if (GET_MODE_CLASS (MODE) == MODE_INT \ 213 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ 214 (MODE) = SImode; 215 216 217 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 218 #define PARM_BOUNDARY 32 219 220 /* Boundary (in *bits*) on which stack pointer should be aligned. 221 Per C-SKY, the published V2 ABI document is incorrect and the proper 222 alignment is on a 4-byte boundary rather than 8 bytes. */ 223 #define STACK_BOUNDARY 32 224 225 /* Align definitions of arrays, unions and structures so that 226 initializations and copies can be made more efficient. This is not 227 ABI-changing, so it only affects places where we can see the 228 definition. Increasing the alignment tends to introduce padding, 229 so don't do this when optimizing for size/conserving stack space. */ 230 #define CSKY_EXPAND_ALIGNMENT(COND, EXP, ALIGN) \ 231 (((COND) && ((ALIGN) < BITS_PER_WORD) \ 232 && (TREE_CODE (EXP) == ARRAY_TYPE \ 233 || TREE_CODE (EXP) == UNION_TYPE \ 234 || TREE_CODE (EXP) == RECORD_TYPE)) \ 235 ? BITS_PER_WORD : (ALIGN)) 236 237 /* Align global data. */ 238 #define DATA_ALIGNMENT(EXP, ALIGN) \ 239 CSKY_EXPAND_ALIGNMENT (!optimize_size, EXP, ALIGN) 240 241 /* Similarly, make sure that objects on the stack are sensibly aligned. */ 242 #define LOCAL_ALIGNMENT(EXP, ALIGN) \ 243 CSKY_EXPAND_ALIGNMENT (!flag_conserve_stack, EXP, ALIGN) 244 245 /* No data type wants to be aligned rounder than this. */ 246 #define BIGGEST_ALIGNMENT 32 247 248 /* Every structures size must be a multiple of 8 bits. */ 249 #define STRUCTURE_SIZE_BOUNDARY 8 250 251 /* Look at the fundamental type that is used for a bit-field and use 252 that to impose alignment on the enclosing structure. 253 struct s {int a:8}; should have same alignment as "int", not "char". */ 254 #define PCC_BITFIELD_TYPE_MATTERS 1 255 256 /* Largest integer machine mode for structures. If undefined, the default 257 is GET_MODE_SIZE(DImode). */ 258 #define MAX_FIXED_MODE_SIZE 64 259 260 /* Allocation boundary (in *bits*) for the code of a function. 261 Optimize ck801 and ck802 a little harder for size. */ 262 #define FUNCTION_BOUNDARY \ 263 (((CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)) \ 264 && optimize_size) \ 265 ? 16 : 32) 266 267 /* C-SKY does not support unaligned access. */ 268 #define STRICT_ALIGNMENT 1 269 270 #undef SIZE_TYPE 271 #define SIZE_TYPE "unsigned int" 272 273 #undef PTRDIFF_TYPE 274 #define PTRDIFF_TYPE "int" 275 276 #undef WCHAR_TYPE 277 #define WCHAR_TYPE "long int" 278 279 #undef UINT_LEAST32_TYPE 280 #define UINT_LEAST32_TYPE "unsigned int" 281 282 #undef INT_LEAST32_TYPE 283 #define INT_LEAST32_TYPE "int" 284 285 #undef WCHAR_TYPE_SIZE 286 #define WCHAR_TYPE_SIZE BITS_PER_WORD 287 288 /****************************************************************** 289 * Layout of Source Language Data Types * 290 ******************************************************************/ 291 292 293 /* 'char' is unsigned by default for backward compatibility. */ 294 #define DEFAULT_SIGNED_CHAR 0 295 296 297 /****************************************************************** 298 * Stack Layout and Calling Conventions * 299 ******************************************************************/ 300 301 302 /* Basic Stack Layout */ 303 304 305 /* Define this if pushing a word on the stack 306 makes the stack pointer a smaller address. */ 307 #define STACK_GROWS_DOWNWARD 1 308 309 /* Define this to nonzero if the nominal address of the stack frame 310 is at the high-address end of the local variables; 311 that is, each additional local variable allocated 312 goes at a more negative offset in the frame. */ 313 #define FRAME_GROWS_DOWNWARD 1 314 315 /* Offset of first parameter from the argument pointer register value. */ 316 #define FIRST_PARM_OFFSET(FNDECL) 0 317 318 /* A C expression whose value is RTL representing the value of the return 319 address for the frame COUNT steps up from the current frame. */ 320 #define RETURN_ADDR_RTX(COUNT, FRAME) \ 321 csky_return_addr (COUNT, FRAME) 322 323 /* Pick up the return address upon entry to a procedure. Used for 324 dwarf2 unwind information. This also enables the table driven 325 mechanism. */ 326 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CSKY_LR_REGNUM) 327 328 329 /* Exception Handling Support */ 330 331 /* The register that holds the return address in exception handlers. */ 332 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CSKY_EH_STACKADJ_REGNUM) 333 334 /* Select a format to encode pointers in exception handling data. */ 335 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 336 (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4) 337 338 /* Registers That Address the Stack Frame */ 339 340 341 /* Register to use for pushing function arguments. */ 342 #define STACK_POINTER_REGNUM CSKY_SP_REGNUM 343 344 /* Base register for access to local variables of the function. */ 345 #define FRAME_POINTER_REGNUM 36 346 #define HARD_FRAME_POINTER_REGNUM 8 347 348 /* Base register for access to arguments of the function. This is a fake 349 register that is always eliminated. */ 350 #define ARG_POINTER_REGNUM 32 351 352 /* Static chain register. 353 Register use is more restricted on CK801. */ 354 #define STATIC_CHAIN_REGNUM (CSKY_TARGET_ARCH (CK801) ? 13 : 12) 355 356 357 /* Eliminating Frame Pointer and Arg Pointer */ 358 359 360 /* Definitions for register eliminations. 361 362 This is an array of structures. Each structure initializes one pair 363 of eliminable registers. The "from" register number is given first, 364 followed by "to". Eliminations of the same "from" register are listed 365 in order of preference. 366 367 We have two registers that can be eliminated on the CSKY. First, the 368 arg pointer register can often be eliminated in favor of the stack 369 pointer register. Secondly, the pseudo frame pointer register can always 370 be eliminated; it is replaced with the stack pointer. */ 371 #define ELIMINABLE_REGS \ 372 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\ 373 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\ 374 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },\ 375 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },\ 376 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }} 377 378 /* Define the offset between two registers, one to be eliminated, and the 379 other its replacement, at the start of a routine. */ 380 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 381 (OFFSET) = csky_initial_elimination_offset (FROM, TO) 382 383 384 /* Passing Function Arguments on the Stack */ 385 386 387 /* Define this if the maximum size of all the outgoing args is to be 388 accumulated and pushed during the prologue. The amount can be 389 found in the variable crtl->outgoing_args_size. */ 390 #define ACCUMULATE_OUTGOING_ARGS 1 391 392 393 /* Passing Arguments in Registers */ 394 395 396 /* A C type for declaring a variable that is used as the first argument of 397 TARGET_ FUNCTION_ARG and other related values. */ 398 #if !defined (USED_FOR_TARGET) 399 typedef struct 400 { 401 int reg; 402 int freg; 403 bool is_stdarg; 404 } CUMULATIVE_ARGS; 405 #endif 406 407 /* Initialize a variable CUM of type CUMULATIVE_ARGS 408 for a call to a function whose data type is FNTYPE. 409 For a library call, FNTYPE is 0. 410 411 On CSKY, the offset always starts at 0: the first parm reg is always 412 the same reg. */ 413 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 414 csky_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (INDIRECT)) 415 416 /* True if N is a possible register number for function argument passing. 417 On the CSKY, r0-r3 are used to pass args. 418 The int cast is to prevent a complaint about unsigned comparison to 419 zero, since CSKY_FIRST_PARM_REGNUM is zero. */ 420 #define FUNCTION_ARG_REGNO_P(REGNO) \ 421 (((REGNO) >= CSKY_FIRST_PARM_REGNUM \ 422 && (REGNO) < (CSKY_NPARM_REGS + CSKY_FIRST_PARM_REGNUM)) \ 423 || FUNCTION_VARG_REGNO_P(REGNO)) 424 425 /* How Large Values Are Returned */ 426 427 428 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return 429 values must be in memory. On the CSKY, small 430 structures (eight bytes or fewer) are returned in 431 the register pair r0/r1. */ 432 #define DEFAULT_PCC_STRUCT_RETURN 0 433 434 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 435 the stack pointer does not matter. The value is tested only in 436 functions that have frame pointers. 437 No definition is equivalent to always zero. 438 439 On the CSKY, the function epilogue recovers the stack pointer from the 440 frame. */ 441 #define EXIT_IGNORE_STACK 1 442 443 444 /****************************************************************** 445 * Register Usage & Register Classes * 446 ******************************************************************/ 447 448 449 #define FIRST_PSEUDO_REGISTER 202 450 451 /* 1 for registers that have pervasive standard uses 452 and are not available for the register allocator. 453 On C-SKY, r14 is SP, r26 is used by linker, 454 r27 is used by assembler, r28 is data base address, 455 r29 is GOT base address, r30 is handler base address, 456 r31 is TLS register. */ 457 #define FIXED_REGISTERS \ 458 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \ 459 { 0, 0, 0, 0, 0, 0, 0, 0, \ 460 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \ 461 0, 0, 0, 0, 0, 0, 1, 0, \ 462 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \ 463 0, 0, 0, 0, 0, 0, 0, 0, \ 464 /* r24 r25 r26 r27 r28 r29 r30 tls */ \ 465 0, 0, 1, 1, 1, 1, 1, 1, \ 466 /* reserved c hi lo */ \ 467 1, 1, 0, 0, \ 468 /* reserved */ \ 469 1, 1, 1, 1, 1, 1, 1, 1, \ 470 1, 1, 1, 1, 1, 1, 1, 1, \ 471 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \ 472 0, 0, 0, 0, 0, 0, 0, 0, \ 473 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \ 474 0, 0, 0, 0, 0, 0, 0, 0 , \ 475 /* reserved */ \ 476 1, 1, \ 477 /* epc */ \ 478 1, \ 479 /* vr16 vr17 vr18 vr19 vr20 vr21 vr22 vr23 */ \ 480 0, 0, 0, 0, 0, 0, 0, 0, \ 481 /* vr24 vr25 vr26 vr27 vr28 vr29 vr30 vr31 */ \ 482 0, 0, 0, 0, 0, 0, 0, 0 , \ 483 /* reserved */ \ 484 1, 1, 1, 1, 1, 1, 1, 1, \ 485 1, 1, 1, 1, 1, 1, 1, 1, \ 486 /* reserved */ \ 487 1, 1, 1, 1, 1, 1, 1, 1, \ 488 1, 1, 1, 1, 1, 1, 1, 1, \ 489 1, 1, 1, 1, 1, 1, 1, 1, \ 490 1, 1, 1, 1, 1, 1, 1, 1, \ 491 \ 492 1, 1, 1, 1, 1, 1, 1, 1, \ 493 1, 1, 1, 1, 1, 1, 1, 1, \ 494 1, 1, 1, 1, 1, 1, 1, 1, \ 495 1, 1, 1, 1, 1, 1, 1, 1, \ 496 \ 497 1, 1, 1, 1, 1, 1, 1, 1, \ 498 1, 1, 1, 1, 1, 1, 1, 1, \ 499 1, 1, 1, 1, 1, 1, 1, 1, \ 500 1, 1, 1, 1, 1, 1, 1, 1, \ 501 \ 502 1, 1, 1 \ 503 } 504 505 /* Like `CALL_USED_REGISTERS' but used to overcome a historical 506 problem which makes CALL_USED_REGISTERS *always* include 507 all the FIXED_REGISTERS. Until this problem has been 508 resolved this macro can be used to overcome this situation. 509 In particular, block_propagate() requires this list 510 be accurate, or we can remove registers which should be live. 511 This macro is used in get_csky_live_regs(). */ 512 #define CALL_REALLY_USED_REGISTERS \ 513 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \ 514 { 1, 1, 1, 1, 0, 0, 0, 0, \ 515 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \ 516 0, 0, 0, 0, 1, 1, 1, 0, \ 517 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \ 518 0, 0, 1, 1, 1, 1, 1, 1, \ 519 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \ 520 1, 1, 1, 1, 1, 1, 1, 1, \ 521 /* reserved c hi lo */ \ 522 1, 1, 1, 1, \ 523 /* reserved */ \ 524 1, 1, 1, 1, 1, 1, 1, 1, \ 525 1, 1, 1, 1, 1, 1, 1, 1, \ 526 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \ 527 1, 1, 1, 1, 1, 1, 1, 1, \ 528 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \ 529 1, 1, 1, 1, 1, 1, 1, 1, \ 530 /* reserved */ \ 531 1, 1, \ 532 /* epc */ \ 533 1, \ 534 /* vr16 vr17 vr18 vr19 vr20 vr21 vr22 vr23*/ \ 535 1, 1, 1, 1, 1, 1, 1, 1, \ 536 /* vr24 vr25 vr26 vr27 vr28 vr29 vr30 vr31 */ \ 537 1, 1, 1, 1, 1, 1, 1, 1, \ 538 /* reserved */ \ 539 1, 1, 1, 1, 1, 1, 1, 1, \ 540 1, 1, 1, 1, 1, 1, 1, 1, \ 541 /* reserved */ \ 542 1, 1, 1, 1, 1, 1, 1, 1, \ 543 1, 1, 1, 1, 1, 1, 1, 1, \ 544 1, 1, 1, 1, 1, 1, 1, 1, \ 545 1, 1, 1, 1, 1, 1, 1, 1, \ 546 \ 547 1, 1, 1, 1, 1, 1, 1, 1, \ 548 1, 1, 1, 1, 1, 1, 1, 1, \ 549 1, 1, 1, 1, 1, 1, 1, 1, \ 550 1, 1, 1, 1, 1, 1, 1, 1, \ 551 \ 552 1, 1, 1, 1, 1, 1, 1, 1, \ 553 1, 1, 1, 1, 1, 1, 1, 1, \ 554 1, 1, 1, 1, 1, 1, 1, 1, \ 555 1, 1, 1, 1, 1, 1, 1, 1, \ 556 \ 557 1, 1, 1 \ 558 } 559 560 #define REGISTER_NAMES \ 561 { \ 562 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3", \ 563 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr", \ 564 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7", \ 565 "t8", "t9", "r26", "r27", "gb", "r29", "svbr", "r31", \ 566 /* reserved */ \ 567 "reserved", \ 568 /* CC register: 33 */ \ 569 "c", \ 570 /* DSP instruction register: 34, 35 */ \ 571 "hi", "lo", \ 572 "reserved", "reserved", "reserved", "reserved", "reserved", \ 573 "reserved", "reserved", "reserved", "reserved", "reserved", \ 574 "reserved", "reserved", "reserved", "reserved", "reserved", \ 575 "reserved", \ 576 /* V registers: 52~67 */ \ 577 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \ 578 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \ 579 "reserved", "reserved", \ 580 "epc", \ 581 /* V registers: 71~86 */ \ 582 "vr16", "vr17", "vr18", "vr19", "vr20", "vr21", "vr22", "vr23", \ 583 "vr24", "vr25", "vr26", "vr27", "vr28", "vr29", "vr30", "vr31", \ 584 "reserved", "reserved", "reserved", "reserved", "reserved", \ 585 "reserved", "reserved", "reserved", "reserved", "reserved", \ 586 "reserved", "reserved", "reserved", "reserved", "reserved", \ 587 "reserved", \ 588 /* reserved: 87~201*/ \ 589 "reserved", "reserved", "reserved", "reserved", "reserved", \ 590 "reserved", "reserved", "reserved", "reserved", "reserved", \ 591 "reserved", "reserved", "reserved", "reserved", "reserved", \ 592 "reserved", "reserved", "reserved", "reserved", "reserved", \ 593 "reserved", "reserved", "reserved", "reserved", "reserved", \ 594 "reserved", "reserved", "reserved", "reserved", "reserved", \ 595 "reserved", "reserved", \ 596 "reserved", "reserved", "reserved", "reserved", "reserved", \ 597 "reserved", "reserved", "reserved", "reserved", "reserved", \ 598 "reserved", "reserved", "reserved", "reserved", "reserved", \ 599 "reserved", "reserved", "reserved", "reserved", "reserved", \ 600 "reserved", "reserved", "reserved", "reserved", "reserved", \ 601 "reserved", "reserved", "reserved", "reserved", "reserved", \ 602 "reserved", "reserved", \ 603 "reserved", "reserved", "reserved", "reserved", "reserved", \ 604 "reserved", "reserved", "reserved", "reserved", "reserved", \ 605 "reserved", "reserved", "reserved", "reserved", "reserved", \ 606 "reserved", "reserved", "reserved", "reserved", "reserved", \ 607 "reserved", "reserved", "reserved", "reserved", "reserved", \ 608 "reserved", "reserved", "reserved", "reserved", "reserved", \ 609 "reserved", "reserved", \ 610 "reserved", "reserved", "reserved" \ 611 } 612 613 /* Table of additional register names to use in user input. */ 614 #define ADDITIONAL_REGISTER_NAMES \ 615 { \ 616 {"r0", 0}, \ 617 {"r1", 1}, \ 618 {"r2", 2}, \ 619 {"r3", 3}, \ 620 {"r4", 4}, \ 621 {"r5", 5}, \ 622 {"r6", 6}, \ 623 {"r7", 7}, \ 624 {"r8", 8}, \ 625 {"r9", 9}, \ 626 {"r10", 10}, \ 627 {"r11", 11}, \ 628 {"r12", 12}, \ 629 {"r13", 13}, \ 630 {"r14", 14}, \ 631 {"r15", 15}, \ 632 {"r16", 16}, \ 633 {"r17", 17}, \ 634 {"r18", 18}, \ 635 {"r19", 19}, \ 636 {"r20", 20}, \ 637 {"r21", 21}, \ 638 {"r22", 22}, \ 639 {"r23", 23}, \ 640 {"r24", 24}, \ 641 {"r25", 25}, \ 642 {"r26", 26}, \ 643 {"r27", 27}, \ 644 {"r28", 28}, \ 645 {"r29", 29}, \ 646 {"r30", 30}, \ 647 {"r31", 31}, \ 648 } 649 650 /* The order in which registers should be allocated. 651 It is better to use the registers the caller need not save. 652 Allocate r0 through r3 in reverse order since r3 is least likely 653 to contain a function parameter; in addition results are returned 654 in r0. It is quite good to use lr since other calls may clobber 655 it anyway. */ 656 #define REG_ALLOC_ORDER \ 657 /* r3 r2 r1 r0 r12 r13 r18 r19 */ \ 658 { 3, 2, 1, 0, 12, 13, 18, 19, \ 659 /* r20 r21 r22 r23 r24 r25 */ \ 660 20, 21, 22, 23, 24, 25, \ 661 /* r15 r4 r5 r6 r7 r8 r9 r10 r11 */ \ 662 15, 4, 5, 6, 7, 8, 9, 10, 11, \ 663 /* r16 r17 r26 r27 r28 r29 r30 hi lo */ \ 664 16, 17, 26, 27, 28, 29, 30, 34, 35, \ 665 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \ 666 52, 53, 54, 55, 56, 57, 58, 59, \ 667 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \ 668 60, 61, 62, 63, 64, 65, 66, 67, \ 669 /* vr16 vr17 vr18 vr18 vr20 vr21 vr22 vr23 */ \ 670 71, 72, 73, 74, 75, 76, 77, 78, \ 671 /* vr24 vr25 vr26 vr27 vr28 vr28 vr30 vr31 */ \ 672 79, 80, 81, 82, 83, 84, 85, 86, \ 673 /* reserved */ \ 674 36, 37, 38, 39, 40, 41, 42, 43, \ 675 44, 45, 46, 47, 48, 49, 50, 51, \ 676 /* reserved */ \ 677 87, 88, 89, 90, 91, 92, 93, 94, \ 678 95, 96, 97, 98, 99, 100, 101, 102, \ 679 /* sp tls reserved c reserved epc */ \ 680 14, 31, 32, 33, 68, 69, 70 } 681 682 /* Register classes. */ 683 enum reg_class 684 { 685 NO_REGS, 686 MINI_REGS, 687 SP_REGS, 688 LOW_REGS, 689 GENERAL_REGS, 690 C_REGS, 691 HILO_REGS, 692 V_REGS, 693 OTHER_REGS, 694 RESERVE_REGS, 695 ALL_REGS, 696 LIM_REG_CLASSES 697 }; 698 699 #define N_REG_CLASSES (int) LIM_REG_CLASSES 700 701 /* Give names of register classes as strings for dump file. */ 702 #define REG_CLASS_NAMES \ 703 { \ 704 "NO_REGS", \ 705 "MINI_REGS", \ 706 "SP_REGS", \ 707 "LOW_REGS", \ 708 "GENERAL_REGS", \ 709 "C_REGS", \ 710 "HILO_REGS", \ 711 "V_REGS", \ 712 "OTHER_REGS", \ 713 "RESERVE_REGS", \ 714 "ALL_REGS", \ 715 } 716 717 /* Define which registers fit in which classes. This is an initializer 718 for a vector of HARD_REG_SET of length N_REG_CLASSES. */ 719 #define REG_CLASS_CONTENTS \ 720 { \ 721 {0x00000000, 0x00000000, 0x00000000, 0x00000000, \ 722 0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \ 723 {0x000000FF, 0x00000000, 0x00000000, 0x00000000, \ 724 0x00000000, 0x00000000, 0x00000000}, /* MINI_REGS */ \ 725 {0x00004000, 0x00000000, 0x00000000, 0x00000000, \ 726 0x00000000, 0x00000000, 0x00000000}, /* SP_REGS */ \ 727 {0x0000FFFF, 0x00000000, 0x00000000, 0x00000000, \ 728 0x00000000, 0x00000000, 0x00000000}, /* LOW_REGS */ \ 729 {0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, \ 730 0x00000000, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \ 731 {0x00000000, 0x00000002, 0x00000000, 0x00000000, \ 732 0x00000000, 0x00000000, 0x00000000}, /* C_REGS */ \ 733 {0x00000000, 0x0000000c, 0x00000000, 0x00000000, \ 734 0x00000000, 0x00000000, 0x00000000}, /* HILO_REGS */ \ 735 {0x00000000, 0xFFF00000, 0x007FFF8F, 0x00000000, \ 736 0x00000000, 0x00000000, 0x00000000}, /* V_REGS */ \ 737 {0x00000000, 0x00000000, 0x00000040, 0x00000000, \ 738 0x00000000, 0x00000000, 0x00000000}, /* OTHER_REGS */ \ 739 {0x00000000, 0x000FFFF1, 0xFF800030, 0xFFFFFFFF, \ 740 0xFFFFFFFF, 0xFFFFFFFF, 0x000003FF}, /* RESERVE_REGS */ \ 741 {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \ 742 0xFFFFFFFF, 0xFFFFFFFF, 0x000003FF}, /* ALL_REGS */ \ 743 } 744 745 /* Return register class from regno. */ 746 extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER]; 747 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO] 748 749 /* The class value for index registers, and the one for base regs. */ 750 #define INDEX_REG_CLASS (CSKY_ISA_FEATURE (2E3) ? GENERAL_REGS : NO_REGS) 751 #define BASE_REG_CLASS GENERAL_REGS 752 753 /* TODO is it necessary to set it to MINI_REGS to emit more 16-bit 754 instructions? */ 755 #define MODE_BASE_REG_CLASS(MODE) GENERAL_REGS 756 757 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 758 and check its validity for a certain class. 759 We have two alternate definitions for each of them. 760 The usual definition accepts all pseudo regs; the other rejects 761 them unless they have been allocated suitable hard regs. 762 The symbol REG_OK_STRICT causes the latter definition to be used. 763 764 Most source files want to accept pseudo regs in the hope that 765 they will get allocated to the class that the insn wants them to be in. 766 Source files for reload pass need to be strict. 767 After reload, it makes no difference, since pseudo regs have 768 been eliminated by then. 769 770 The reg_renumber is used to map pseudo regs into hardware 771 regs, it is set up as a result of register allocation. */ 772 #ifdef REG_OK_STRICT 773 #define REGNO_OK_FOR_BASE_P(REGNO) \ 774 (CSKY_GENERAL_REGNO_P (REGNO) \ 775 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) ) 776 #else 777 #define REGNO_OK_FOR_BASE_P(REGNO) \ 778 (CSKY_GENERAL_REGNO_P (REGNO) \ 779 || (REGNO) >= FIRST_PSEUDO_REGISTER) 780 #endif 781 782 783 #ifdef REG_OK_STRICT 784 #define REGNO_OK_FOR_INDEX_P(REGNO) \ 785 (CSKY_GENERAL_REGNO_P (REGNO) \ 786 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) ) 787 #else 788 #define REGNO_OK_FOR_INDEX_P(REGNO) \ 789 (CSKY_GENERAL_REGNO_P (REGNO) \ 790 || (REGNO) >= FIRST_PSEUDO_REGISTER) 791 #endif 792 793 794 /****************************************************************** 795 * Addressing Modes * 796 ******************************************************************/ 797 798 799 /* Recognize any constant value that is a valid address. */ 800 #define CONSTANT_ADDRESS_P(X) \ 801 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF) 802 803 /* Maximum number of registers that can appear in a valid memory address. 804 Shifts in addresses can't be by a register. */ 805 #define MAX_REGS_PER_ADDRESS 2 806 807 808 /****************************************************************** 809 * Run-time Target * 810 ******************************************************************/ 811 812 813 #define TARGET_CPU_CPP_BUILTINS() \ 814 csky_cpu_cpp_builtins (pfile) 815 816 /****************************************************************** 817 * Per-function Data * 818 ******************************************************************/ 819 820 821 /* Initialize data used by insn expanders. This is called from insn_emit, 822 once for every function before code is generated. */ 823 #define INIT_EXPANDERS csky_init_expanders () 824 825 826 /****************************************************************** 827 * Dividing the Output into Sections (Texts, Data, . . . ) * 828 ******************************************************************/ 829 830 831 /* Switch to the text or data segment. */ 832 #define TEXT_SECTION_ASM_OP "\t.text" 833 #define DATA_SECTION_ASM_OP "\t.data" 834 835 /* The subroutine calls in the .init and .fini sections create literal 836 pools which must be jumped around... */ 837 #define FORCE_CODE_SECTION_ALIGN \ 838 asm ("br 1f ; .literals ; .align 2 ; 1:"); 839 840 /* Define this macro to be an expression with a nonzero value if 841 jump tables (for tablejump insns) should be output in the text section, 842 along with the assembler instructions. */ 843 #define JUMP_TABLES_IN_TEXT_SECTION TARGET_CASESI 844 845 846 /****************************************************************** 847 * Assembler Format * 848 ******************************************************************/ 849 850 851 /* A C string constant for text to be output before(after) each asm 852 statement or group of consecutive ones. */ 853 #undef ASM_APP_ON 854 #define ASM_APP_ON "// inline asm begin\n" 855 #undef ASM_APP_OFF 856 #define ASM_APP_OFF "// inline asm end\n" 857 858 /* A C string constant describing how to begin a comment in the target 859 assembler language. */ 860 #define ASM_COMMENT_START "\t//" 861 862 /* This says how to output an assembler line 863 to define a global common symbol, with alignment information. */ 864 #undef ASM_OUTPUT_ALIGNED_COMMON 865 #define ASM_OUTPUT_ALIGNED_COMMON(STREAM, NAME, SIZE, ALIGN) \ 866 do \ 867 { \ 868 fputs ("\t.comm\t", STREAM); \ 869 assemble_name (STREAM, NAME); \ 870 fprintf (STREAM, ",%lu, %u\n", (unsigned long)(SIZE), \ 871 (ALIGN) / BITS_PER_UNIT); \ 872 } \ 873 while (0) 874 875 /* Define a local common symbol whose alignment we wish to specify. 876 ALIGN comes in as bits, we have to turn it into bytes. */ 877 #undef ASM_OUTPUT_ALIGNED_LOCAL 878 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \ 879 do \ 880 { \ 881 fputs ("\t.bss\t", (STREAM)); \ 882 assemble_name ((STREAM), (NAME)); \ 883 fprintf ((STREAM), ",%d, %d\n", (int)(SIZE), \ 884 (ALIGN) / BITS_PER_UNIT); \ 885 } \ 886 while (0) 887 888 /* Globalizing directive for a label. */ 889 #define GLOBAL_ASM_OP "\t.global\t" 890 891 /* Output a reference to a label. */ 892 #undef ASM_OUTPUT_LABELREF 893 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ 894 fprintf (STREAM, "%s%s", user_label_prefix, \ 895 (* targetm.strip_name_encoding) (NAME)) 896 897 /* Make an internal label into a string. */ 898 #undef ASM_GENERATE_INTERNAL_LABEL 899 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ 900 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM) 901 902 /* This is how to output an insn to push a register on the stack. 903 It need not be very fast code. */ 904 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \ 905 fprintf (STREAM, "\tsubi\t %s,%d\n\tst.w\t %s,(%s)\n", \ 906 reg_names[STACK_POINTER_REGNUM], \ 907 (STACK_BOUNDARY / BITS_PER_UNIT), \ 908 reg_names[REGNO], \ 909 reg_names[STACK_POINTER_REGNUM]) 910 911 /* This is how to output an insn to pop a register from the stack. */ 912 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \ 913 fprintf (STREAM, "\tld.w\t %s,(%s)\n\taddi\t %s,%d\n", \ 914 reg_names[REGNO], \ 915 reg_names[STACK_POINTER_REGNUM], \ 916 reg_names[STACK_POINTER_REGNUM], \ 917 (STACK_BOUNDARY / BITS_PER_UNIT)) 918 919 /* Output an element of a dispatch table. */ 920 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \ 921 fprintf (STREAM, "\t.long\t.L%d\n", VALUE) 922 923 /* This is how to output an assembler line 924 that says to advance the location counter by SIZE bytes. */ 925 #undef ASM_OUTPUT_SKIP 926 #define ASM_OUTPUT_SKIP(STREAM,SIZE) \ 927 fprintf (STREAM, "\t.fill %d, 1\n", (int)(SIZE)) 928 929 /* Align output to a power of two. Note ".align 0" is redundant, 930 and also GAS will treat it as ".align 2" which we do not want. */ 931 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 932 do \ 933 { \ 934 if ((POWER) > 0) \ 935 fprintf (STREAM, "\t.align\t%d\n", POWER); \ 936 } \ 937 while (0) 938 939 940 /****************************************************************** 941 * Controlling the Compilation Driver * 942 ******************************************************************/ 943 944 945 /* Define this macro as a C expression for the initializer of an 946 array of string to tell the driver program which options are 947 defaults for this target and thus do not need to be handled 948 specially when using MULTILIB_OPTIONS. */ 949 #undef MULTILIB_DEFAULTS 950 #define MULTILIB_DEFAULTS \ 951 {"mlittle-endian", "mcpu=ck810f", "msoft-float"} 952 953 /* Support for a compile-time default CPU, et cetera. The rules are: 954 --with-arch is ignored if -march or -mcpu are specified. 955 --with-cpu is ignored if -march or -mcpu are specified, and is overridden 956 by --with-arch. */ 957 #define OPTION_DEFAULT_SPECS \ 958 {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \ 959 {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \ 960 {"endian", "%{!mbig-endian:%{!mlittle-endian:-m%(VALUE)-endian}}" }, \ 961 {"float", "%{!mfloat-abi=*:-mfloat-abi=%(VALUE)}" }, 962 963 964 /****************************************************************** 965 * Position Independent Code * 966 ******************************************************************/ 967 968 /* Define the global table register. */ 969 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CSKY_GB_REGNUM : INVALID_REGNUM) 970 971 /* Nonzero if x is a legitimate immediate operand on the target machine 972 when generating position-independent code. */ 973 #define LEGITIMATE_PIC_OPERAND_P(X) \ 974 csky_legitimate_pic_operand_p (X) 975 976 977 /****************************************************************** 978 * Controlling Debugging Information Format * 979 ******************************************************************/ 980 981 982 /* Define this macro if GCC should produce dwarf version 2 format debugging 983 output in response to the `-g' option. */ 984 #define DWARF2_DEBUGGING_INFO 1 985 986 /* Define this macro to 0 if your target supports DWARF 2 frame unwind 987 information, but it does not yet work with exception handling. */ 988 #define DWARF2_UNWIND_INFO 1 989 990 /* Define this if you have arranged for GCC to support 991 more than one format of debugging output. 992 The value of this macro only affects the default debugging output. */ 993 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 994 995 /* Define this macro if the targets representation 996 for dwarf registers used in .eh_frame or .debug_frame 997 is different from that used in other debug info sections. 998 Given a GCC hard register number, 999 this macro should return the .eh_frame register number.*/ 1000 #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG) 1001 1002 /* If INCOMING_RETURN_ADDR_RTX is defined & the RTL is REG, 1003 define DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM. */ 1004 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM) 1005 1006 /* Use r0 and r1 to pass exception handling information. */ 1007 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? N : INVALID_REGNUM) 1008 1009 /* How to renumber registers for dbx and gdb. */ 1010 extern const int csky_dbx_regno[]; 1011 #define DBX_REGISTER_NUMBER(REGNO) ((unsigned int) csky_dbx_regno[REGNO]) 1012 1013 1014 /****************************************************************** 1015 * Miscellaneous Parameters * 1016 ******************************************************************/ 1017 1018 1019 /* Specify the machine mode that this machine uses 1020 for the index in the tablejump instruction. */ 1021 #define CASE_VECTOR_MODE SImode 1022 1023 /* Define if operations between registers always perform the operation 1024 on the full register even if a narrower mode is specified. */ 1025 #define WORD_REGISTER_OPERATIONS 1 1026 1027 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD 1028 will either zero-extend or sign-extend. The value of this macro should 1029 be the code that says which one of the two operations is implicitly 1030 done, UNKNOWN if none. */ 1031 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1032 1033 /* Max number of bytes we can move from memory to memory 1034 in one reasonably fast instruction. */ 1035 #define MOVE_MAX 4 1036 1037 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected 1038 5-bits, so we cannot define SHIFT_COUNT_TRUNCATED to true for this 1039 target. */ 1040 #define SHIFT_COUNT_TRUNCATED 0 1041 1042 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1) 1043 1044 /* The machine modes of pointers and functions. */ 1045 #define Pmode SImode 1046 #define FUNCTION_MODE Pmode 1047 1048 /* Define this macro to be a C expression to indicate when jump-tables 1049 should contain relative addresses. */ 1050 #define CASE_VECTOR_PC_RELATIVE \ 1051 (optimize_size && TARGET_CONSTANT_POOL \ 1052 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) 1053 1054 /* Return the preferred mode for an addr_diff_vec when the minimum 1055 and maximum offset are known. */ 1056 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \ 1057 (min >= 0 && max < 512 \ 1058 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, QImode) \ 1059 : min >= -256 && max < 256 \ 1060 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, QImode) \ 1061 : min >= 0 && max < 8192 \ 1062 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, HImode) \ 1063 : min >= -4096 && max < 4096 \ 1064 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \ 1065 : SImode) 1066 1067 /* This is how to output an element of a case-vector that is relative. */ 1068 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ 1069 do \ 1070 { \ 1071 if (optimize_size && TARGET_CONSTANT_POOL \ 1072 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) \ 1073 { \ 1074 switch (GET_MODE (BODY)) \ 1075 { \ 1076 case E_QImode: \ 1077 asm_fprintf (STREAM, "\t.byte\t(.L%d-.L%d)/2\n", \ 1078 VALUE, REL); \ 1079 break; \ 1080 case E_HImode: /* TBH */ \ 1081 asm_fprintf (STREAM, "\t.short\t(.L%d-.L%d)/2\n", \ 1082 VALUE, REL); \ 1083 break; \ 1084 case E_SImode: \ 1085 asm_fprintf (STREAM, "\t.long\t.L%d-.L%d\n", \ 1086 VALUE, REL); \ 1087 break; \ 1088 default: \ 1089 gcc_unreachable (); \ 1090 } \ 1091 } \ 1092 else \ 1093 asm_fprintf (STREAM, "\t.long\t.L%d@GOTOFF\n", VALUE); \ 1094 } while (0) 1095 1096 /* This macro is not documented yet. 1097 But we do need it to make jump table vector aligned. */ 1098 #define ADDR_VEC_ALIGN(JUMPTABLE) 0 1099 1100 /* We have to undef this first to override the version from elfos.h. */ 1101 #undef ASM_OUTPUT_CASE_LABEL 1102 #define ASM_OUTPUT_CASE_LABEL(stream, prefix, num, table) \ 1103 do \ 1104 { \ 1105 if (GET_MODE (PATTERN (table)) == SImode) \ 1106 ASM_OUTPUT_ALIGN (stream, 2); \ 1107 (*targetm.asm_out.internal_label) (stream, prefix, num); \ 1108 } while (0) 1109 1110 /* Make sure subsequent insns are aligned after a byte-sized jump offset 1111 table. */ 1112 #define ASM_OUTPUT_CASE_END(stream, num, table) \ 1113 do \ 1114 { \ 1115 if (GET_MODE (PATTERN (table)) == QImode) \ 1116 ASM_OUTPUT_ALIGN (stream, 1); \ 1117 } while (0) 1118 1119 1120 1121 1122 /****************************************************************** 1123 * Trampolines for Nested Functions * 1124 ******************************************************************/ 1125 1126 1127 /* Length in units of the trampoline for entering a nested function. */ 1128 #define TRAMPOLINE_SIZE (CSKY_ISA_FEATURE (2E3) ? 16 : 20) 1129 1130 /* Alignment required for a trampoline in bits. */ 1131 #define TRAMPOLINE_ALIGNMENT 32 1132 1133 1134 /****************************************************************** 1135 * Describing Relative Costs of Operations * 1136 ******************************************************************/ 1137 1138 1139 /* Nonzero if access to memory by bytes is slow and undesirable. 1140 For RISC chips, it means that access to memory by bytes is no 1141 better than access by words when possible, so grab a whole word 1142 and maybe make use of that. */ 1143 #define SLOW_BYTE_ACCESS 0 1144 1145 /* On C-SKY, function CSE would allow use of 16-bit jsr instructions 1146 instead of normal 32-bit calls. But it also needs a separate constant 1147 pool entry for the function address and an instruction to load it, and 1148 may cause additional spills due to increased register pressure, etc. 1149 It doesn't seem like a good idea overall. */ 1150 #define NO_FUNCTION_CSE 1 1151 1152 /* Try to generate sequences that don't involve branches, we can then use 1153 conditional instructions. */ 1154 #define BRANCH_COST(speed_p, predictable_p) \ 1155 csky_default_branch_cost (speed_p, predictable_p) 1156 1157 /* False if short circuit operation is preferred. */ 1158 #define LOGICAL_OP_NON_SHORT_CIRCUIT \ 1159 (csky_default_logical_op_non_short_circuit ()) 1160 1161 1162 /****************************************************************** 1163 * Generating Code for Profiling * 1164 ******************************************************************/ 1165 1166 1167 #define FUNCTION_PROFILER(FILE, LABELNO) 1168 1169 #endif /* GCC_CSKY_H */ 1170
Indexes created Sat Apr 18 00:22:28 UTC 2026