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genmova.sh revision 1.11
      1   1.1  mrg #!/bin/sh
      2   1.1  mrg # Generate mova.md, a file containing patterns that can be implemented
      3   1.1  mrg # using the h8sx mova instruction.
      4   1.1  mrg 
      5  1.11  mrg # Copyright (C) 2004-2020 Free Software Foundation, Inc.
      6   1.1  mrg #
      7   1.1  mrg # This file is part of GCC.
      8   1.1  mrg #
      9   1.1  mrg # GCC is free software; you can redistribute it and/or modify
     10   1.1  mrg # it under the terms of the GNU General Public License as published by
     11   1.1  mrg # the Free Software Foundation; either version 3, or (at your option)
     12   1.1  mrg # any later version.
     13   1.1  mrg #
     14   1.1  mrg # GCC is distributed in the hope that it will be useful,
     15   1.1  mrg # but WITHOUT ANY WARRANTY; without even the implied warranty of
     16   1.1  mrg # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17   1.1  mrg # GNU General Public License for more details.
     18   1.1  mrg #
     19   1.1  mrg # You should have received a copy of the GNU General Public License
     20   1.1  mrg # along with GCC; see the file COPYING3.  If not see
     21   1.1  mrg # <http://www.gnu.org/licenses/>.
     22   1.1  mrg 
     23   1.1  mrg echo ";; -*- buffer-read-only: t -*-"
     24   1.1  mrg echo ";; Generated automatically from genmova.sh"
     25  1.11  mrg echo ";; Copyright (C) 2004-2020 Free Software Foundation, Inc."
     26   1.1  mrg echo ";;"
     27   1.1  mrg echo ";; This file is part of GCC."
     28   1.1  mrg echo ";;"
     29   1.1  mrg echo ";; GCC is free software; you can redistribute it and/or modify"
     30   1.1  mrg echo ";; it under the terms of the GNU General Public License as published by"
     31   1.1  mrg echo ";; the Free Software Foundation; either version 3, or (at your option)"
     32   1.1  mrg echo ";; any later version."
     33   1.1  mrg echo ";;"
     34   1.1  mrg echo ";; GCC is distributed in the hope that it will be useful,"
     35   1.1  mrg echo ";; but WITHOUT ANY WARRANTY; without even the implied warranty of"
     36   1.1  mrg echo ";; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the"
     37   1.1  mrg echo ";; GNU General Public License for more details."
     38   1.1  mrg echo ";;"
     39   1.1  mrg echo ";; You should have received a copy of the GNU General Public License"
     40   1.1  mrg echo ";; along with GCC; see the file COPYING3.  If not see"
     41   1.1  mrg echo ";; <http://www.gnu.org/licenses/>."
     42   1.1  mrg 
     43   1.1  mrg # Loop over modes for the source operand (the index).  Only 8-bit and
     44   1.1  mrg # 16-bit indices are allowed.
     45   1.1  mrg for s in QI HI; do
     46   1.1  mrg 
     47   1.1  mrg   # Set $src to the operand syntax for this size of index.
     48   1.1  mrg   case $s in
     49   1.1  mrg     QI) src=%X1.b;;
     50   1.1  mrg     HI) src=%T1.w;;
     51   1.1  mrg   esac
     52   1.1  mrg 
     53   1.1  mrg   # A match_operand for the source.
     54   1.1  mrg   operand="(match_operand:$s 1 \"h8300_dst_operand\" \"0,rQ\")"
     55   1.1  mrg 
     56   1.1  mrg   # Loop over the destination register's mode.  The QI and HI versions use
     57   1.1  mrg   # the same instructions as the SI ones, they just ignore the upper bits
     58   1.1  mrg   # of the result.
     59   1.1  mrg   for d in QI HI SI; do
     60   1.1  mrg 
     61   1.1  mrg     # If the destination is larger than the source, include a
     62   1.1  mrg     # zero_extend/plus pattern.  We could also match zero extensions
     63   1.1  mrg     # of memory without the plus, but it's not any smaller or faster
     64   1.1  mrg     # than separate insns.
     65   1.1  mrg     case $d:$s in
     66   1.1  mrg       SI:QI | SI:HI | HI:QI)
     67   1.1  mrg 	cat <<EOF
     68   1.1  mrg (define_insn ""
     69   1.1  mrg   [(set (match_operand:$d 0 "register_operand" "=r,r")
     70   1.1  mrg 	(plus:$d (zero_extend:$d $operand)
     71   1.1  mrg 		 (match_operand:$d 2 "immediate_operand" "i,i")))]
     72   1.1  mrg   "TARGET_H8300SX"
     73   1.3  mrg   "mova/b.l @(%o2%C2,$src),%S0"
     74   1.1  mrg   [(set_attr "length_table" "mova")
     75   1.1  mrg    (set_attr "cc" "none")])
     76   1.1  mrg 
     77   1.1  mrg EOF
     78   1.1  mrg 	;;
     79   1.1  mrg     esac
     80   1.1  mrg 
     81   1.1  mrg     # Loop over the shift amount.
     82   1.1  mrg     for shift in 1 2; do
     83   1.1  mrg       case $shift in
     84   1.1  mrg 	1) opsize=w mult=2;;
     85   1.1  mrg 	2) opsize=l mult=4;;
     86   1.1  mrg       esac
     87   1.1  mrg 
     88   1.1  mrg       # Calculate the mask of bits that will be nonzero after the source
     89   1.1  mrg       # has been extended and shifted.
     90   1.1  mrg       case $s:$shift in
     91   1.1  mrg 	QI:1) mask=510;;
     92   1.1  mrg 	QI:2) mask=1020;;
     93   1.1  mrg 	HI:1) mask=131070;;
     94   1.1  mrg 	HI:2) mask=262140;;
     95   1.1  mrg       esac
     96   1.1  mrg 
     97   1.1  mrg       # There doesn't seem to be a well-established canonical form for
     98   1.1  mrg       # some of the patterns we need.  Emit both shift and multiplication
     99   1.1  mrg       # patterns.
    100   1.1  mrg       for form in mult ashift; do
    101   1.1  mrg 	case $form in
    102   1.1  mrg 	  mult) amount=$mult;;
    103   1.1  mrg 	  ashift) amount=$shift;;
    104   1.1  mrg 	esac
    105   1.1  mrg 
    106   1.1  mrg 	case $d:$s in
    107   1.1  mrg 	  # If the source and destination are the same size, we can treat
    108   1.1  mrg 	  # mova as a sort of multiply-add instruction.
    109   1.1  mrg 	  QI:QI | HI:HI)
    110   1.1  mrg 	    cat <<EOF
    111   1.1  mrg (define_insn ""
    112   1.1  mrg   [(set (match_operand:$d 0 "register_operand" "=r,r")
    113   1.1  mrg 	(plus:$d ($form:$d $operand
    114   1.1  mrg 			   (const_int $amount))
    115   1.1  mrg 		 (match_operand:$d 2 "immediate_operand" "i,i")))]
    116   1.1  mrg   "TARGET_H8300SX"
    117   1.3  mrg   "mova/$opsize.l @(%o2%C2,$src),%S0"
    118   1.1  mrg   [(set_attr "length_table" "mova")
    119   1.1  mrg    (set_attr "cc" "none")])
    120   1.1  mrg 
    121   1.1  mrg EOF
    122   1.1  mrg 	    ;;
    123   1.1  mrg 
    124   1.1  mrg 	  # Handle the cases where the source is smaller than the
    125   1.1  mrg 	  # destination.  Sometimes combine will keep the extension,
    126   1.1  mrg 	  # sometimes it will use an AND.
    127   1.1  mrg 	  SI:QI | SI:HI | HI:QI)
    128   1.1  mrg 
    129   1.1  mrg 	    # Emit the forms that use zero_extend.
    130   1.1  mrg 	    cat <<EOF
    131   1.1  mrg (define_insn ""
    132   1.1  mrg   [(set (match_operand:$d 0 "register_operand" "=r,r")
    133   1.1  mrg 	($form:$d (zero_extend:$d $operand)
    134   1.1  mrg 		  (const_int $amount)))]
    135   1.1  mrg   "TARGET_H8300SX"
    136   1.1  mrg   "mova/$opsize.l @(0,$src),%S0"
    137   1.1  mrg   [(set_attr "length_table" "mova_zero")
    138   1.1  mrg    (set_attr "cc" "none")])
    139   1.1  mrg 
    140   1.1  mrg (define_insn ""
    141   1.1  mrg   [(set (match_operand:$d 0 "register_operand" "=r,r")
    142   1.1  mrg 	(plus:$d ($form:$d (zero_extend:$d $operand)
    143   1.1  mrg 			   (const_int $amount))
    144   1.1  mrg 		 (match_operand:$d 2 "immediate_operand" "i,i")))]
    145   1.1  mrg   "TARGET_H8300SX"
    146   1.3  mrg   "mova/$opsize.l @(%o2%C2,$src),%S0"
    147   1.1  mrg   [(set_attr "length_table" "mova")
    148   1.1  mrg    (set_attr "cc" "none")])
    149   1.1  mrg 
    150   1.1  mrg EOF
    151   1.1  mrg 
    152   1.1  mrg 	    # Now emit the forms that use AND.  When the index is a register,
    153   1.1  mrg 	    # these forms are effectively $d-mode operations: the index will
    154   1.1  mrg 	    # be a $d-mode REG or SUBREG.  When the index is a memory
    155   1.1  mrg 	    # location, we will have a paradoxical subreg such as:
    156   1.1  mrg 	    #
    157   1.1  mrg 	    #	(and:SI (mult:SI (subreg:SI (mem:QI ...) 0)
    158   1.1  mrg 	    #			 (const_int 4))
    159   1.1  mrg 	    #		(const_int 1020))
    160   1.1  mrg 	    #
    161   1.1  mrg 	    # Match the two case separately: a $d-mode register_operand
    162   1.1  mrg 	    # or a $d-mode subreg of an $s-mode memory_operand.  Match the
    163   1.1  mrg 	    # memory form first since register_operand accepts mem subregs
    164   1.1  mrg 	    # before reload.
    165   1.1  mrg 	    memory="(match_operand:$s 1 \"memory_operand\" \"m\")"
    166   1.1  mrg 	    memory="(subreg:$d $memory 0)"
    167   1.1  mrg 	    register="(match_operand:$d 1 \"register_operand\" \"0\")"
    168   1.1  mrg 	    for paradoxical in "$memory" "$register"; do
    169   1.1  mrg 	      cat <<EOF
    170   1.1  mrg (define_insn ""
    171   1.1  mrg   [(set (match_operand:$d 0 "register_operand" "=r")
    172   1.1  mrg 	(and:$d ($form:$d $paradoxical
    173   1.1  mrg 			  (const_int $amount))
    174   1.1  mrg 		(const_int $mask)))]
    175   1.1  mrg   "TARGET_H8300SX"
    176   1.1  mrg   "mova/$opsize.l @(0,$src),%S0"
    177   1.1  mrg   [(set_attr "length_table" "mova_zero")
    178   1.1  mrg    (set_attr "cc" "none")])
    179   1.1  mrg 
    180   1.1  mrg (define_insn ""
    181   1.1  mrg   [(set (match_operand:$d 0 "register_operand" "=r")
    182   1.1  mrg 	(plus:$d (and:$d ($form:$d $paradoxical
    183   1.1  mrg 				   (const_int $amount))
    184   1.1  mrg 			 (const_int $mask))
    185   1.1  mrg 		 (match_operand:$d 2 "immediate_operand" "i")))]
    186   1.1  mrg   "TARGET_H8300SX"
    187   1.3  mrg   "mova/$opsize.l @(%o2%C2,$src),%S0"
    188   1.1  mrg   [(set_attr "length_table" "mova")
    189   1.1  mrg    (set_attr "cc" "none")])
    190   1.1  mrg 
    191   1.1  mrg EOF
    192   1.1  mrg 	      done
    193   1.1  mrg 	    ;;
    194   1.1  mrg 	esac
    195   1.1  mrg       done
    196   1.1  mrg     done
    197   1.1  mrg   done
    198   1.1  mrg done
    199