Home | History | Annotate | Line # | Download | only in i386
avx512ifmavlintrin.h revision 1.1.1.1
      1  1.1  mrg /* Copyright (C) 2013-2015 Free Software Foundation, Inc.
      2  1.1  mrg 
      3  1.1  mrg    This file is part of GCC.
      4  1.1  mrg 
      5  1.1  mrg    GCC is free software; you can redistribute it and/or modify
      6  1.1  mrg    it under the terms of the GNU General Public License as published by
      7  1.1  mrg    the Free Software Foundation; either version 3, or (at your option)
      8  1.1  mrg    any later version.
      9  1.1  mrg 
     10  1.1  mrg    GCC is distributed in the hope that it will be useful,
     11  1.1  mrg    but WITHOUT ANY WARRANTY; without even the implied warranty of
     12  1.1  mrg    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     13  1.1  mrg    GNU General Public License for more details.
     14  1.1  mrg 
     15  1.1  mrg    Under Section 7 of GPL version 3, you are granted additional
     16  1.1  mrg    permissions described in the GCC Runtime Library Exception, version
     17  1.1  mrg    3.1, as published by the Free Software Foundation.
     18  1.1  mrg 
     19  1.1  mrg    You should have received a copy of the GNU General Public License and
     20  1.1  mrg    a copy of the GCC Runtime Library Exception along with this program;
     21  1.1  mrg    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
     22  1.1  mrg    <http://www.gnu.org/licenses/>.  */
     23  1.1  mrg 
     24  1.1  mrg #ifndef _IMMINTRIN_H_INCLUDED
     25  1.1  mrg #error "Never use <avx512ifmavlintrin.h> directly; include <immintrin.h> instead."
     26  1.1  mrg #endif
     27  1.1  mrg 
     28  1.1  mrg #ifndef _AVX512IFMAVLINTRIN_H_INCLUDED
     29  1.1  mrg #define _AVX512IFMAVLINTRIN_H_INCLUDED
     30  1.1  mrg 
     31  1.1  mrg #if !defined(__AVX512VL__) || !defined(__AVX512IFMA__)
     32  1.1  mrg #pragma GCC push_options
     33  1.1  mrg #pragma GCC target("avx512ifma,avx512vl")
     34  1.1  mrg #define __DISABLE_AVX512IFMAVL__
     35  1.1  mrg #endif /* __AVX512IFMAVL__ */
     36  1.1  mrg 
     37  1.1  mrg extern __inline __m128i
     38  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
     39  1.1  mrg _mm_madd52lo_epu64 (__m128i __X, __m128i __Y, __m128i __Z)
     40  1.1  mrg {
     41  1.1  mrg   return (__m128i) __builtin_ia32_vpmadd52luq128_mask ((__v2di) __X,
     42  1.1  mrg 						       (__v2di) __Y,
     43  1.1  mrg 						       (__v2di) __Z,
     44  1.1  mrg 						       (__mmask8) - 1);
     45  1.1  mrg }
     46  1.1  mrg 
     47  1.1  mrg extern __inline __m128i
     48  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
     49  1.1  mrg _mm_madd52hi_epu64 (__m128i __X, __m128i __Y, __m128i __Z)
     50  1.1  mrg {
     51  1.1  mrg   return (__m128i) __builtin_ia32_vpmadd52huq128_mask ((__v2di) __X,
     52  1.1  mrg 						       (__v2di) __Y,
     53  1.1  mrg 						       (__v2di) __Z,
     54  1.1  mrg 						       (__mmask8) - 1);
     55  1.1  mrg }
     56  1.1  mrg 
     57  1.1  mrg extern __inline __m256i
     58  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
     59  1.1  mrg _mm256_madd52lo_epu64 (__m256i __X, __m256i __Y, __m256i __Z)
     60  1.1  mrg {
     61  1.1  mrg   return (__m256i) __builtin_ia32_vpmadd52luq256_mask ((__v4di) __X,
     62  1.1  mrg 						       (__v4di) __Y,
     63  1.1  mrg 						       (__v4di) __Z,
     64  1.1  mrg 						       (__mmask8) - 1);
     65  1.1  mrg }
     66  1.1  mrg 
     67  1.1  mrg extern __inline __m256i
     68  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
     69  1.1  mrg _mm256_madd52hi_epu64 (__m256i __X, __m256i __Y, __m256i __Z)
     70  1.1  mrg {
     71  1.1  mrg   return (__m256i) __builtin_ia32_vpmadd52huq256_mask ((__v4di) __X,
     72  1.1  mrg 						       (__v4di) __Y,
     73  1.1  mrg 						       (__v4di) __Z,
     74  1.1  mrg 						       (__mmask8) - 1);
     75  1.1  mrg }
     76  1.1  mrg 
     77  1.1  mrg extern __inline __m128i
     78  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
     79  1.1  mrg _mm_mask_madd52lo_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
     80  1.1  mrg {
     81  1.1  mrg   return (__m128i) __builtin_ia32_vpmadd52luq128_mask ((__v2di) __W,
     82  1.1  mrg 						       (__v2di) __X,
     83  1.1  mrg 						       (__v2di) __Y,
     84  1.1  mrg 						       (__mmask8) __M);
     85  1.1  mrg }
     86  1.1  mrg 
     87  1.1  mrg extern __inline __m128i
     88  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
     89  1.1  mrg _mm_mask_madd52hi_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
     90  1.1  mrg {
     91  1.1  mrg   return (__m128i) __builtin_ia32_vpmadd52huq128_mask ((__v2di) __W,
     92  1.1  mrg 						       (__v2di) __X,
     93  1.1  mrg 						       (__v2di) __Y,
     94  1.1  mrg 						       (__mmask8) __M);
     95  1.1  mrg }
     96  1.1  mrg 
     97  1.1  mrg extern __inline __m256i
     98  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
     99  1.1  mrg _mm256_mask_madd52lo_epu64 (__m256i __W, __mmask8 __M, __m256i __X,
    100  1.1  mrg 			    __m256i __Y)
    101  1.1  mrg {
    102  1.1  mrg   return (__m256i) __builtin_ia32_vpmadd52luq256_mask ((__v4di) __W,
    103  1.1  mrg 						       (__v4di) __X,
    104  1.1  mrg 						       (__v4di) __Y,
    105  1.1  mrg 						       (__mmask8) __M);
    106  1.1  mrg }
    107  1.1  mrg 
    108  1.1  mrg extern __inline __m256i
    109  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
    110  1.1  mrg _mm256_mask_madd52hi_epu64 (__m256i __W, __mmask8 __M, __m256i __X,
    111  1.1  mrg 			    __m256i __Y)
    112  1.1  mrg {
    113  1.1  mrg   return (__m256i) __builtin_ia32_vpmadd52huq256_mask ((__v4di) __W,
    114  1.1  mrg 						       (__v4di) __X,
    115  1.1  mrg 						       (__v4di) __Y,
    116  1.1  mrg 						       (__mmask8) __M);
    117  1.1  mrg }
    118  1.1  mrg 
    119  1.1  mrg extern __inline __m128i
    120  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
    121  1.1  mrg _mm_maskz_madd52lo_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z)
    122  1.1  mrg {
    123  1.1  mrg   return (__m128i) __builtin_ia32_vpmadd52luq128_maskz ((__v2di) __X,
    124  1.1  mrg 							(__v2di) __Y,
    125  1.1  mrg 							(__v2di) __Z,
    126  1.1  mrg 							(__mmask8) __M);
    127  1.1  mrg }
    128  1.1  mrg 
    129  1.1  mrg extern __inline __m128i
    130  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
    131  1.1  mrg _mm_maskz_madd52hi_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z)
    132  1.1  mrg {
    133  1.1  mrg   return (__m128i) __builtin_ia32_vpmadd52huq128_maskz ((__v2di) __X,
    134  1.1  mrg 							(__v2di) __Y,
    135  1.1  mrg 							(__v2di) __Z,
    136  1.1  mrg 							(__mmask8) __M);
    137  1.1  mrg }
    138  1.1  mrg 
    139  1.1  mrg extern __inline __m256i
    140  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
    141  1.1  mrg _mm256_maskz_madd52lo_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z)
    142  1.1  mrg {
    143  1.1  mrg   return (__m256i) __builtin_ia32_vpmadd52luq256_maskz ((__v4di) __X,
    144  1.1  mrg 							(__v4di) __Y,
    145  1.1  mrg 							(__v4di) __Z,
    146  1.1  mrg 							(__mmask8) __M);
    147  1.1  mrg }
    148  1.1  mrg 
    149  1.1  mrg extern __inline __m256i
    150  1.1  mrg __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
    151  1.1  mrg _mm256_maskz_madd52hi_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z)
    152  1.1  mrg {
    153  1.1  mrg   return (__m256i) __builtin_ia32_vpmadd52huq256_maskz ((__v4di) __X,
    154  1.1  mrg 							(__v4di) __Y,
    155  1.1  mrg 							(__v4di) __Z,
    156  1.1  mrg 							(__mmask8) __M);
    157  1.1  mrg }
    158  1.1  mrg 
    159  1.1  mrg #ifdef __DISABLE_AVX512IFMAVL__
    160  1.1  mrg #undef __DISABLE_AVX512IFMAVL__
    161  1.1  mrg #pragma GCC pop_options
    162  1.1  mrg #endif /* __DISABLE_AVX512IFMAVL__ */
    163  1.1  mrg 
    164  1.1  mrg #endif /* _AVX512IFMAVLINTRIN_H_INCLUDED */
    165