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avx512vnnivlintrin.h revision 1.1.1.1
      1  1.1  mrg /* Copyright (C) 2013-2018 Free Software Foundation, Inc.
      2  1.1  mrg 
      3  1.1  mrg    This file is part of GCC.
      4  1.1  mrg 
      5  1.1  mrg    GCC is free software; you can redistribute it and/or modify
      6  1.1  mrg    it under the terms of the GNU General Public License as published by
      7  1.1  mrg    the Free Software Foundation; either version 3, or (at your option)
      8  1.1  mrg    any later version.
      9  1.1  mrg 
     10  1.1  mrg    GCC is distributed in the hope that it will be useful,
     11  1.1  mrg    but WITHOUT ANY WARRANTY; without even the implied warranty of
     12  1.1  mrg    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     13  1.1  mrg    GNU General Public License for more details.
     14  1.1  mrg 
     15  1.1  mrg    Under Section 7 of GPL version 3, you are granted additional
     16  1.1  mrg    permissions described in the GCC Runtime Library Exception, version
     17  1.1  mrg    3.1, as published by the Free Software Foundation.
     18  1.1  mrg 
     19  1.1  mrg    You should have received a copy of the GNU General Public License and
     20  1.1  mrg    a copy of the GCC Runtime Library Exception along with this program;
     21  1.1  mrg    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
     22  1.1  mrg    <http://www.gnu.org/licenses/>.  */
     23  1.1  mrg 
     24  1.1  mrg #ifndef _IMMINTRIN_H_INCLUDED
     25  1.1  mrg #error "Never use <avx512vnnivlintrin.h> directly; include <immintrin.h> instead."
     26  1.1  mrg #endif
     27  1.1  mrg 
     28  1.1  mrg #ifndef _AVX512VNNIVLINTRIN_H_INCLUDED
     29  1.1  mrg #define _AVX512VNNIVLINTRIN_H_INCLUDED
     30  1.1  mrg 
     31  1.1  mrg #if !defined(__AVX512VL__) || !defined(__AVX512VNNI__)
     32  1.1  mrg #pragma GCC push_options
     33  1.1  mrg #pragma GCC target("avx512vnni,avx512vl")
     34  1.1  mrg #define __DISABLE_AVX512VNNIVL__
     35  1.1  mrg #endif /* __AVX512VNNIVL__ */
     36  1.1  mrg 
     37  1.1  mrg extern __inline __m256i
     38  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     39  1.1  mrg _mm256_dpbusd_epi32 (__m256i __A, __m256i __B, __m256i __C)
     40  1.1  mrg {
     41  1.1  mrg   return (__m256i) __builtin_ia32_vpdpbusd_v8si ((__v8si)__A, (__v8si) __B,
     42  1.1  mrg 								(__v8si) __C);
     43  1.1  mrg }
     44  1.1  mrg 
     45  1.1  mrg extern __inline __m256i
     46  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     47  1.1  mrg _mm256_mask_dpbusd_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D)
     48  1.1  mrg {
     49  1.1  mrg   return (__m256i)__builtin_ia32_vpdpbusd_v8si_mask ((__v8si)__A, (__v8si) __C,
     50  1.1  mrg 						(__v8si) __D, (__mmask8)__B);
     51  1.1  mrg }
     52  1.1  mrg 
     53  1.1  mrg extern __inline __m256i
     54  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     55  1.1  mrg _mm256_maskz_dpbusd_epi32 (__mmask8 __A, __m256i __B, __m256i __C, __m256i __D)
     56  1.1  mrg {
     57  1.1  mrg   return (__m256i)__builtin_ia32_vpdpbusd_v8si_maskz ((__v8si)__B,
     58  1.1  mrg 				(__v8si) __C, (__v8si) __D, (__mmask8)__A);
     59  1.1  mrg }
     60  1.1  mrg 
     61  1.1  mrg extern __inline __m128i
     62  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     63  1.1  mrg _mm_dpbusd_epi32 (__m128i __A, __m128i __B, __m128i __C)
     64  1.1  mrg {
     65  1.1  mrg   return (__m128i) __builtin_ia32_vpdpbusd_v4si ((__v4si)__A, (__v4si) __B,
     66  1.1  mrg 								(__v4si) __C);
     67  1.1  mrg }
     68  1.1  mrg 
     69  1.1  mrg extern __inline __m128i
     70  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     71  1.1  mrg _mm_mask_dpbusd_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D)
     72  1.1  mrg {
     73  1.1  mrg   return (__m128i)__builtin_ia32_vpdpbusd_v4si_mask ((__v4si)__A, (__v4si) __C,
     74  1.1  mrg 						(__v4si) __D, (__mmask8)__B);
     75  1.1  mrg }
     76  1.1  mrg 
     77  1.1  mrg extern __inline __m128i
     78  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     79  1.1  mrg _mm_maskz_dpbusd_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
     80  1.1  mrg {
     81  1.1  mrg   return (__m128i)__builtin_ia32_vpdpbusd_v4si_maskz ((__v4si)__B,
     82  1.1  mrg 				(__v4si) __C, (__v4si) __D, (__mmask8)__A);
     83  1.1  mrg }
     84  1.1  mrg 
     85  1.1  mrg extern __inline __m256i
     86  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     87  1.1  mrg _mm256_dpbusds_epi32 (__m256i __A, __m256i __B, __m256i __C)
     88  1.1  mrg {
     89  1.1  mrg   return (__m256i) __builtin_ia32_vpdpbusds_v8si ((__v8si)__A, (__v8si) __B,
     90  1.1  mrg 								(__v8si) __C);
     91  1.1  mrg }
     92  1.1  mrg 
     93  1.1  mrg extern __inline __m256i
     94  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
     95  1.1  mrg _mm256_mask_dpbusds_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D)
     96  1.1  mrg {
     97  1.1  mrg   return (__m256i)__builtin_ia32_vpdpbusds_v8si_mask ((__v8si)__A,
     98  1.1  mrg 				(__v8si) __C, (__v8si) __D, (__mmask8)__B);
     99  1.1  mrg }
    100  1.1  mrg 
    101  1.1  mrg extern __inline __m256i
    102  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    103  1.1  mrg _mm256_maskz_dpbusds_epi32 (__mmask8 __A, __m256i __B, __m256i __C,
    104  1.1  mrg 								__m256i __D)
    105  1.1  mrg {
    106  1.1  mrg   return (__m256i)__builtin_ia32_vpdpbusds_v8si_maskz ((__v8si)__B,
    107  1.1  mrg 				(__v8si) __C, (__v8si) __D, (__mmask8)__A);
    108  1.1  mrg }
    109  1.1  mrg 
    110  1.1  mrg extern __inline __m128i
    111  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    112  1.1  mrg _mm_dpbusds_epi32 (__m128i __A, __m128i __B, __m128i __C)
    113  1.1  mrg {
    114  1.1  mrg   return (__m128i) __builtin_ia32_vpdpbusds_v4si ((__v4si)__A, (__v4si) __B,
    115  1.1  mrg 								(__v4si) __C);
    116  1.1  mrg }
    117  1.1  mrg 
    118  1.1  mrg extern __inline __m128i
    119  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    120  1.1  mrg _mm_mask_dpbusds_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D)
    121  1.1  mrg {
    122  1.1  mrg   return (__m128i)__builtin_ia32_vpdpbusds_v4si_mask ((__v4si)__A,
    123  1.1  mrg 				(__v4si) __C, (__v4si) __D, (__mmask8)__B);
    124  1.1  mrg }
    125  1.1  mrg 
    126  1.1  mrg extern __inline __m128i
    127  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    128  1.1  mrg _mm_maskz_dpbusds_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
    129  1.1  mrg {
    130  1.1  mrg   return (__m128i)__builtin_ia32_vpdpbusds_v4si_maskz ((__v4si)__B,
    131  1.1  mrg 				(__v4si) __C, (__v4si) __D, (__mmask8)__A);
    132  1.1  mrg }
    133  1.1  mrg 
    134  1.1  mrg extern __inline __m256i
    135  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    136  1.1  mrg _mm256_dpwssd_epi32 (__m256i __A, __m256i __B, __m256i __C)
    137  1.1  mrg {
    138  1.1  mrg   return (__m256i) __builtin_ia32_vpdpwssd_v8si ((__v8si)__A, (__v8si) __B,
    139  1.1  mrg 								(__v8si) __C);
    140  1.1  mrg }
    141  1.1  mrg 
    142  1.1  mrg extern __inline __m256i
    143  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    144  1.1  mrg _mm256_mask_dpwssd_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D)
    145  1.1  mrg {
    146  1.1  mrg   return (__m256i)__builtin_ia32_vpdpwssd_v8si_mask ((__v8si)__A, (__v8si) __C,
    147  1.1  mrg 						(__v8si) __D, (__mmask8)__B);
    148  1.1  mrg }
    149  1.1  mrg 
    150  1.1  mrg extern __inline __m256i
    151  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    152  1.1  mrg _mm256_maskz_dpwssd_epi32 (__mmask8 __A, __m256i __B, __m256i __C, __m256i __D)
    153  1.1  mrg {
    154  1.1  mrg   return (__m256i)__builtin_ia32_vpdpwssd_v8si_maskz ((__v8si)__B,
    155  1.1  mrg 				(__v8si) __C, (__v8si) __D, (__mmask8)__A);
    156  1.1  mrg }
    157  1.1  mrg 
    158  1.1  mrg extern __inline __m128i
    159  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    160  1.1  mrg _mm_dpwssd_epi32 (__m128i __A, __m128i __B, __m128i __C)
    161  1.1  mrg {
    162  1.1  mrg   return (__m128i) __builtin_ia32_vpdpwssd_v4si ((__v4si)__A, (__v4si) __B,
    163  1.1  mrg 								(__v4si) __C);
    164  1.1  mrg }
    165  1.1  mrg 
    166  1.1  mrg extern __inline __m128i
    167  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    168  1.1  mrg _mm_mask_dpwssd_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D)
    169  1.1  mrg {
    170  1.1  mrg   return (__m128i)__builtin_ia32_vpdpwssd_v4si_mask ((__v4si)__A, (__v4si) __C,
    171  1.1  mrg 						(__v4si) __D, (__mmask8)__B);
    172  1.1  mrg }
    173  1.1  mrg 
    174  1.1  mrg extern __inline __m128i
    175  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    176  1.1  mrg _mm_maskz_dpwssd_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
    177  1.1  mrg {
    178  1.1  mrg   return (__m128i)__builtin_ia32_vpdpwssd_v4si_maskz ((__v4si)__B,
    179  1.1  mrg 				(__v4si) __C, (__v4si) __D, (__mmask8)__A);
    180  1.1  mrg }
    181  1.1  mrg 
    182  1.1  mrg extern __inline __m256i
    183  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    184  1.1  mrg _mm256_dpwssds_epi32 (__m256i __A, __m256i __B, __m256i __C)
    185  1.1  mrg {
    186  1.1  mrg   return (__m256i) __builtin_ia32_vpdpwssds_v8si ((__v8si)__A, (__v8si) __B,
    187  1.1  mrg 								(__v8si) __C);
    188  1.1  mrg }
    189  1.1  mrg 
    190  1.1  mrg extern __inline __m256i
    191  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    192  1.1  mrg _mm256_mask_dpwssds_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D)
    193  1.1  mrg {
    194  1.1  mrg   return (__m256i)__builtin_ia32_vpdpwssds_v8si_mask ((__v8si)__A,
    195  1.1  mrg 				(__v8si) __C, (__v8si) __D, (__mmask8)__B);
    196  1.1  mrg }
    197  1.1  mrg 
    198  1.1  mrg extern __inline __m256i
    199  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    200  1.1  mrg _mm256_maskz_dpwssds_epi32 (__mmask8 __A, __m256i __B, __m256i __C,
    201  1.1  mrg 							__m256i __D)
    202  1.1  mrg {
    203  1.1  mrg   return (__m256i)__builtin_ia32_vpdpwssds_v8si_maskz ((__v8si)__B,
    204  1.1  mrg 				(__v8si) __C, (__v8si) __D, (__mmask8)__A);
    205  1.1  mrg }
    206  1.1  mrg 
    207  1.1  mrg extern __inline __m128i
    208  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    209  1.1  mrg _mm_dpwssds_epi32 (__m128i __A, __m128i __B, __m128i __C)
    210  1.1  mrg {
    211  1.1  mrg   return (__m128i) __builtin_ia32_vpdpwssds_v4si ((__v4si)__A, (__v4si) __B,
    212  1.1  mrg 								(__v4si) __C);
    213  1.1  mrg }
    214  1.1  mrg 
    215  1.1  mrg extern __inline __m128i
    216  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    217  1.1  mrg _mm_mask_dpwssds_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D)
    218  1.1  mrg {
    219  1.1  mrg   return (__m128i)__builtin_ia32_vpdpwssds_v4si_mask ((__v4si)__A,
    220  1.1  mrg 				(__v4si) __C, (__v4si) __D, (__mmask8)__B);
    221  1.1  mrg }
    222  1.1  mrg 
    223  1.1  mrg extern __inline __m128i
    224  1.1  mrg __attribute__((__gnu_inline__, __always_inline__, __artificial__))
    225  1.1  mrg _mm_maskz_dpwssds_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
    226  1.1  mrg {
    227  1.1  mrg   return (__m128i)__builtin_ia32_vpdpwssds_v4si_maskz ((__v4si)__B,
    228  1.1  mrg 				(__v4si) __C, (__v4si) __D, (__mmask8)__A);
    229  1.1  mrg }
    230  1.1  mrg #ifdef __DISABLE_AVX512VNNIVL__
    231  1.1  mrg #undef __DISABLE_AVX512VNNIVL__
    232  1.1  mrg #pragma GCC pop_options
    233  1.1  mrg #endif /* __DISABLE_AVX512VNNIVL__ */
    234  1.1  mrg #endif /* __DISABLE_AVX512VNNIVL__ */
    235