i386.h revision 1.1.1.1.8.2
1 1.1.1.1.8.2 tls /* Definitions of target machine for GCC for IA-32. 2 1.1.1.1.8.2 tls Copyright (C) 1988, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 3 1.1.1.1.8.2 tls 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 4 1.1.1.1.8.2 tls Free Software Foundation, Inc. 5 1.1.1.1.8.2 tls 6 1.1.1.1.8.2 tls This file is part of GCC. 7 1.1.1.1.8.2 tls 8 1.1.1.1.8.2 tls GCC is free software; you can redistribute it and/or modify 9 1.1.1.1.8.2 tls it under the terms of the GNU General Public License as published by 10 1.1.1.1.8.2 tls the Free Software Foundation; either version 3, or (at your option) 11 1.1.1.1.8.2 tls any later version. 12 1.1.1.1.8.2 tls 13 1.1.1.1.8.2 tls GCC is distributed in the hope that it will be useful, 14 1.1.1.1.8.2 tls but WITHOUT ANY WARRANTY; without even the implied warranty of 15 1.1.1.1.8.2 tls MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 1.1.1.1.8.2 tls GNU General Public License for more details. 17 1.1.1.1.8.2 tls 18 1.1.1.1.8.2 tls Under Section 7 of GPL version 3, you are granted additional 19 1.1.1.1.8.2 tls permissions described in the GCC Runtime Library Exception, version 20 1.1.1.1.8.2 tls 3.1, as published by the Free Software Foundation. 21 1.1.1.1.8.2 tls 22 1.1.1.1.8.2 tls You should have received a copy of the GNU General Public License and 23 1.1.1.1.8.2 tls a copy of the GCC Runtime Library Exception along with this program; 24 1.1.1.1.8.2 tls see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 25 1.1.1.1.8.2 tls <http://www.gnu.org/licenses/>. */ 26 1.1.1.1.8.2 tls 27 1.1.1.1.8.2 tls /* The purpose of this file is to define the characteristics of the i386, 28 1.1.1.1.8.2 tls independent of assembler syntax or operating system. 29 1.1.1.1.8.2 tls 30 1.1.1.1.8.2 tls Three other files build on this one to describe a specific assembler syntax: 31 1.1.1.1.8.2 tls bsd386.h, att386.h, and sun386.h. 32 1.1.1.1.8.2 tls 33 1.1.1.1.8.2 tls The actual tm.h file for a particular system should include 34 1.1.1.1.8.2 tls this file, and then the file for the appropriate assembler syntax. 35 1.1.1.1.8.2 tls 36 1.1.1.1.8.2 tls Many macros that specify assembler syntax are omitted entirely from 37 1.1.1.1.8.2 tls this file because they really belong in the files for particular 38 1.1.1.1.8.2 tls assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR, 39 1.1.1.1.8.2 tls ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many 40 1.1.1.1.8.2 tls that start with ASM_ or end in ASM_OP. */ 41 1.1.1.1.8.2 tls 42 1.1.1.1.8.2 tls /* Redefines for option macros. */ 43 1.1.1.1.8.2 tls 44 1.1.1.1.8.2 tls #define TARGET_64BIT OPTION_ISA_64BIT 45 1.1.1.1.8.2 tls #define TARGET_MMX OPTION_ISA_MMX 46 1.1.1.1.8.2 tls #define TARGET_3DNOW OPTION_ISA_3DNOW 47 1.1.1.1.8.2 tls #define TARGET_3DNOW_A OPTION_ISA_3DNOW_A 48 1.1.1.1.8.2 tls #define TARGET_SSE OPTION_ISA_SSE 49 1.1.1.1.8.2 tls #define TARGET_SSE2 OPTION_ISA_SSE2 50 1.1.1.1.8.2 tls #define TARGET_SSE3 OPTION_ISA_SSE3 51 1.1.1.1.8.2 tls #define TARGET_SSSE3 OPTION_ISA_SSSE3 52 1.1.1.1.8.2 tls #define TARGET_SSE4_1 OPTION_ISA_SSE4_1 53 1.1.1.1.8.2 tls #define TARGET_SSE4_2 OPTION_ISA_SSE4_2 54 1.1.1.1.8.2 tls #define TARGET_AVX OPTION_ISA_AVX 55 1.1.1.1.8.2 tls #define TARGET_FMA OPTION_ISA_FMA 56 1.1.1.1.8.2 tls #define TARGET_SSE4A OPTION_ISA_SSE4A 57 1.1.1.1.8.2 tls #define TARGET_FMA4 OPTION_ISA_FMA4 58 1.1.1.1.8.2 tls #define TARGET_XOP OPTION_ISA_XOP 59 1.1.1.1.8.2 tls #define TARGET_LWP OPTION_ISA_LWP 60 1.1.1.1.8.2 tls #define TARGET_ROUND OPTION_ISA_ROUND 61 1.1.1.1.8.2 tls #define TARGET_ABM OPTION_ISA_ABM 62 1.1.1.1.8.2 tls #define TARGET_POPCNT OPTION_ISA_POPCNT 63 1.1.1.1.8.2 tls #define TARGET_SAHF OPTION_ISA_SAHF 64 1.1.1.1.8.2 tls #define TARGET_MOVBE OPTION_ISA_MOVBE 65 1.1.1.1.8.2 tls #define TARGET_CRC32 OPTION_ISA_CRC32 66 1.1.1.1.8.2 tls #define TARGET_AES OPTION_ISA_AES 67 1.1.1.1.8.2 tls #define TARGET_PCLMUL OPTION_ISA_PCLMUL 68 1.1.1.1.8.2 tls #define TARGET_CMPXCHG16B OPTION_ISA_CX16 69 1.1.1.1.8.2 tls 70 1.1.1.1.8.2 tls 71 1.1.1.1.8.2 tls /* SSE4.1 defines round instructions */ 72 1.1.1.1.8.2 tls #define OPTION_MASK_ISA_ROUND OPTION_MASK_ISA_SSE4_1 73 1.1.1.1.8.2 tls #define OPTION_ISA_ROUND ((ix86_isa_flags & OPTION_MASK_ISA_ROUND) != 0) 74 1.1.1.1.8.2 tls 75 1.1.1.1.8.2 tls #include "config/vxworks-dummy.h" 76 1.1.1.1.8.2 tls 77 1.1.1.1.8.2 tls /* Algorithm to expand string function with. */ 78 1.1.1.1.8.2 tls enum stringop_alg 79 1.1.1.1.8.2 tls { 80 1.1.1.1.8.2 tls no_stringop, 81 1.1.1.1.8.2 tls libcall, 82 1.1.1.1.8.2 tls rep_prefix_1_byte, 83 1.1.1.1.8.2 tls rep_prefix_4_byte, 84 1.1.1.1.8.2 tls rep_prefix_8_byte, 85 1.1.1.1.8.2 tls loop_1_byte, 86 1.1.1.1.8.2 tls loop, 87 1.1.1.1.8.2 tls unrolled_loop 88 1.1.1.1.8.2 tls }; 89 1.1.1.1.8.2 tls 90 1.1.1.1.8.2 tls #define NAX_STRINGOP_ALGS 4 91 1.1.1.1.8.2 tls 92 1.1.1.1.8.2 tls /* Specify what algorithm to use for stringops on known size. 93 1.1.1.1.8.2 tls When size is unknown, the UNKNOWN_SIZE alg is used. When size is 94 1.1.1.1.8.2 tls known at compile time or estimated via feedback, the SIZE array 95 1.1.1.1.8.2 tls is walked in order until MAX is greater then the estimate (or -1 96 1.1.1.1.8.2 tls means infinity). Corresponding ALG is used then. 97 1.1.1.1.8.2 tls For example initializer: 98 1.1.1.1.8.2 tls {{256, loop}, {-1, rep_prefix_4_byte}} 99 1.1.1.1.8.2 tls will use loop for blocks smaller or equal to 256 bytes, rep prefix will 100 1.1.1.1.8.2 tls be used otherwise. */ 101 1.1.1.1.8.2 tls struct stringop_algs 102 1.1.1.1.8.2 tls { 103 1.1.1.1.8.2 tls const enum stringop_alg unknown_size; 104 1.1.1.1.8.2 tls const struct stringop_strategy { 105 1.1.1.1.8.2 tls const int max; 106 1.1.1.1.8.2 tls const enum stringop_alg alg; 107 1.1.1.1.8.2 tls } size [NAX_STRINGOP_ALGS]; 108 1.1.1.1.8.2 tls }; 109 1.1.1.1.8.2 tls 110 1.1.1.1.8.2 tls /* Define the specific costs for a given cpu */ 111 1.1.1.1.8.2 tls 112 1.1.1.1.8.2 tls struct processor_costs { 113 1.1.1.1.8.2 tls const int add; /* cost of an add instruction */ 114 1.1.1.1.8.2 tls const int lea; /* cost of a lea instruction */ 115 1.1.1.1.8.2 tls const int shift_var; /* variable shift costs */ 116 1.1.1.1.8.2 tls const int shift_const; /* constant shift costs */ 117 1.1.1.1.8.2 tls const int mult_init[5]; /* cost of starting a multiply 118 1.1.1.1.8.2 tls in QImode, HImode, SImode, DImode, TImode*/ 119 1.1.1.1.8.2 tls const int mult_bit; /* cost of multiply per each bit set */ 120 1.1.1.1.8.2 tls const int divide[5]; /* cost of a divide/mod 121 1.1.1.1.8.2 tls in QImode, HImode, SImode, DImode, TImode*/ 122 1.1.1.1.8.2 tls int movsx; /* The cost of movsx operation. */ 123 1.1.1.1.8.2 tls int movzx; /* The cost of movzx operation. */ 124 1.1.1.1.8.2 tls const int large_insn; /* insns larger than this cost more */ 125 1.1.1.1.8.2 tls const int move_ratio; /* The threshold of number of scalar 126 1.1.1.1.8.2 tls memory-to-memory move insns. */ 127 1.1.1.1.8.2 tls const int movzbl_load; /* cost of loading using movzbl */ 128 1.1.1.1.8.2 tls const int int_load[3]; /* cost of loading integer registers 129 1.1.1.1.8.2 tls in QImode, HImode and SImode relative 130 1.1.1.1.8.2 tls to reg-reg move (2). */ 131 1.1.1.1.8.2 tls const int int_store[3]; /* cost of storing integer register 132 1.1.1.1.8.2 tls in QImode, HImode and SImode */ 133 1.1.1.1.8.2 tls const int fp_move; /* cost of reg,reg fld/fst */ 134 1.1.1.1.8.2 tls const int fp_load[3]; /* cost of loading FP register 135 1.1.1.1.8.2 tls in SFmode, DFmode and XFmode */ 136 1.1.1.1.8.2 tls const int fp_store[3]; /* cost of storing FP register 137 1.1.1.1.8.2 tls in SFmode, DFmode and XFmode */ 138 1.1.1.1.8.2 tls const int mmx_move; /* cost of moving MMX register. */ 139 1.1.1.1.8.2 tls const int mmx_load[2]; /* cost of loading MMX register 140 1.1.1.1.8.2 tls in SImode and DImode */ 141 1.1.1.1.8.2 tls const int mmx_store[2]; /* cost of storing MMX register 142 1.1.1.1.8.2 tls in SImode and DImode */ 143 1.1.1.1.8.2 tls const int sse_move; /* cost of moving SSE register. */ 144 1.1.1.1.8.2 tls const int sse_load[3]; /* cost of loading SSE register 145 1.1.1.1.8.2 tls in SImode, DImode and TImode*/ 146 1.1.1.1.8.2 tls const int sse_store[3]; /* cost of storing SSE register 147 1.1.1.1.8.2 tls in SImode, DImode and TImode*/ 148 1.1.1.1.8.2 tls const int mmxsse_to_integer; /* cost of moving mmxsse register to 149 1.1.1.1.8.2 tls integer and vice versa. */ 150 1.1.1.1.8.2 tls const int l1_cache_size; /* size of l1 cache, in kilobytes. */ 151 1.1.1.1.8.2 tls const int l2_cache_size; /* size of l2 cache, in kilobytes. */ 152 1.1.1.1.8.2 tls const int prefetch_block; /* bytes moved to cache for prefetch. */ 153 1.1.1.1.8.2 tls const int simultaneous_prefetches; /* number of parallel prefetch 154 1.1.1.1.8.2 tls operations. */ 155 1.1.1.1.8.2 tls const int branch_cost; /* Default value for BRANCH_COST. */ 156 1.1.1.1.8.2 tls const int fadd; /* cost of FADD and FSUB instructions. */ 157 1.1.1.1.8.2 tls const int fmul; /* cost of FMUL instruction. */ 158 1.1.1.1.8.2 tls const int fdiv; /* cost of FDIV instruction. */ 159 1.1.1.1.8.2 tls const int fabs; /* cost of FABS instruction. */ 160 1.1.1.1.8.2 tls const int fchs; /* cost of FCHS instruction. */ 161 1.1.1.1.8.2 tls const int fsqrt; /* cost of FSQRT instruction. */ 162 1.1.1.1.8.2 tls /* Specify what algorithm 163 1.1.1.1.8.2 tls to use for stringops on unknown size. */ 164 1.1.1.1.8.2 tls struct stringop_algs memcpy[2], memset[2]; 165 1.1.1.1.8.2 tls const int scalar_stmt_cost; /* Cost of any scalar operation, excluding 166 1.1.1.1.8.2 tls load and store. */ 167 1.1.1.1.8.2 tls const int scalar_load_cost; /* Cost of scalar load. */ 168 1.1.1.1.8.2 tls const int scalar_store_cost; /* Cost of scalar store. */ 169 1.1.1.1.8.2 tls const int vec_stmt_cost; /* Cost of any vector operation, excluding 170 1.1.1.1.8.2 tls load, store, vector-to-scalar and 171 1.1.1.1.8.2 tls scalar-to-vector operation. */ 172 1.1.1.1.8.2 tls const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */ 173 1.1.1.1.8.2 tls const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */ 174 1.1.1.1.8.2 tls const int vec_align_load_cost; /* Cost of aligned vector load. */ 175 1.1.1.1.8.2 tls const int vec_unalign_load_cost; /* Cost of unaligned vector load. */ 176 1.1.1.1.8.2 tls const int vec_store_cost; /* Cost of vector store. */ 177 1.1.1.1.8.2 tls const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer 178 1.1.1.1.8.2 tls cost model. */ 179 1.1.1.1.8.2 tls const int cond_not_taken_branch_cost;/* Cost of not taken branch for 180 1.1.1.1.8.2 tls vectorizer cost model. */ 181 1.1.1.1.8.2 tls }; 182 1.1.1.1.8.2 tls 183 1.1.1.1.8.2 tls extern const struct processor_costs *ix86_cost; 184 1.1.1.1.8.2 tls extern const struct processor_costs ix86_size_cost; 185 1.1.1.1.8.2 tls 186 1.1.1.1.8.2 tls #define ix86_cur_cost() \ 187 1.1.1.1.8.2 tls (optimize_insn_for_size_p () ? &ix86_size_cost: ix86_cost) 188 1.1.1.1.8.2 tls 189 1.1.1.1.8.2 tls /* Macros used in the machine description to test the flags. */ 190 1.1.1.1.8.2 tls 191 1.1.1.1.8.2 tls /* configure can arrange to make this 2, to force a 486. */ 192 1.1.1.1.8.2 tls 193 1.1.1.1.8.2 tls #ifndef TARGET_CPU_DEFAULT 194 1.1.1.1.8.2 tls #define TARGET_CPU_DEFAULT TARGET_CPU_DEFAULT_generic 195 1.1.1.1.8.2 tls #endif 196 1.1.1.1.8.2 tls 197 1.1.1.1.8.2 tls #ifndef TARGET_FPMATH_DEFAULT 198 1.1.1.1.8.2 tls #define TARGET_FPMATH_DEFAULT \ 199 1.1.1.1.8.2 tls (TARGET_64BIT && TARGET_SSE ? FPMATH_SSE : FPMATH_387) 200 1.1.1.1.8.2 tls #endif 201 1.1.1.1.8.2 tls 202 1.1.1.1.8.2 tls #define TARGET_FLOAT_RETURNS_IN_80387 TARGET_FLOAT_RETURNS 203 1.1.1.1.8.2 tls 204 1.1.1.1.8.2 tls /* 64bit Sledgehammer mode. For libgcc2 we make sure this is a 205 1.1.1.1.8.2 tls compile-time constant. */ 206 1.1.1.1.8.2 tls #ifdef IN_LIBGCC2 207 1.1.1.1.8.2 tls #undef TARGET_64BIT 208 1.1.1.1.8.2 tls #ifdef __x86_64__ 209 1.1.1.1.8.2 tls #define TARGET_64BIT 1 210 1.1.1.1.8.2 tls #else 211 1.1.1.1.8.2 tls #define TARGET_64BIT 0 212 1.1.1.1.8.2 tls #endif 213 1.1.1.1.8.2 tls #else 214 1.1.1.1.8.2 tls #ifndef TARGET_BI_ARCH 215 1.1.1.1.8.2 tls #undef TARGET_64BIT 216 1.1.1.1.8.2 tls #if TARGET_64BIT_DEFAULT 217 1.1.1.1.8.2 tls #define TARGET_64BIT 1 218 1.1.1.1.8.2 tls #else 219 1.1.1.1.8.2 tls #define TARGET_64BIT 0 220 1.1.1.1.8.2 tls #endif 221 1.1.1.1.8.2 tls #endif 222 1.1.1.1.8.2 tls #endif 223 1.1.1.1.8.2 tls 224 1.1.1.1.8.2 tls #define HAS_LONG_COND_BRANCH 1 225 1.1.1.1.8.2 tls #define HAS_LONG_UNCOND_BRANCH 1 226 1.1.1.1.8.2 tls 227 1.1.1.1.8.2 tls #define TARGET_386 (ix86_tune == PROCESSOR_I386) 228 1.1.1.1.8.2 tls #define TARGET_486 (ix86_tune == PROCESSOR_I486) 229 1.1.1.1.8.2 tls #define TARGET_PENTIUM (ix86_tune == PROCESSOR_PENTIUM) 230 1.1.1.1.8.2 tls #define TARGET_PENTIUMPRO (ix86_tune == PROCESSOR_PENTIUMPRO) 231 1.1.1.1.8.2 tls #define TARGET_GEODE (ix86_tune == PROCESSOR_GEODE) 232 1.1.1.1.8.2 tls #define TARGET_K6 (ix86_tune == PROCESSOR_K6) 233 1.1.1.1.8.2 tls #define TARGET_ATHLON (ix86_tune == PROCESSOR_ATHLON) 234 1.1.1.1.8.2 tls #define TARGET_PENTIUM4 (ix86_tune == PROCESSOR_PENTIUM4) 235 1.1.1.1.8.2 tls #define TARGET_K8 (ix86_tune == PROCESSOR_K8) 236 1.1.1.1.8.2 tls #define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON) 237 1.1.1.1.8.2 tls #define TARGET_NOCONA (ix86_tune == PROCESSOR_NOCONA) 238 1.1.1.1.8.2 tls #define TARGET_CORE2 (ix86_tune == PROCESSOR_CORE2) 239 1.1.1.1.8.2 tls #define TARGET_GENERIC32 (ix86_tune == PROCESSOR_GENERIC32) 240 1.1.1.1.8.2 tls #define TARGET_GENERIC64 (ix86_tune == PROCESSOR_GENERIC64) 241 1.1.1.1.8.2 tls #define TARGET_GENERIC (TARGET_GENERIC32 || TARGET_GENERIC64) 242 1.1.1.1.8.2 tls #define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10) 243 1.1.1.1.8.2 tls #define TARGET_ATOM (ix86_tune == PROCESSOR_ATOM) 244 1.1.1.1.8.2 tls 245 1.1.1.1.8.2 tls /* Feature tests against the various tunings. */ 246 1.1.1.1.8.2 tls enum ix86_tune_indices { 247 1.1.1.1.8.2 tls X86_TUNE_USE_LEAVE, 248 1.1.1.1.8.2 tls X86_TUNE_PUSH_MEMORY, 249 1.1.1.1.8.2 tls X86_TUNE_ZERO_EXTEND_WITH_AND, 250 1.1.1.1.8.2 tls X86_TUNE_UNROLL_STRLEN, 251 1.1.1.1.8.2 tls X86_TUNE_DEEP_BRANCH_PREDICTION, 252 1.1.1.1.8.2 tls X86_TUNE_BRANCH_PREDICTION_HINTS, 253 1.1.1.1.8.2 tls X86_TUNE_DOUBLE_WITH_ADD, 254 1.1.1.1.8.2 tls X86_TUNE_USE_SAHF, 255 1.1.1.1.8.2 tls X86_TUNE_MOVX, 256 1.1.1.1.8.2 tls X86_TUNE_PARTIAL_REG_STALL, 257 1.1.1.1.8.2 tls X86_TUNE_PARTIAL_FLAG_REG_STALL, 258 1.1.1.1.8.2 tls X86_TUNE_USE_HIMODE_FIOP, 259 1.1.1.1.8.2 tls X86_TUNE_USE_SIMODE_FIOP, 260 1.1.1.1.8.2 tls X86_TUNE_USE_MOV0, 261 1.1.1.1.8.2 tls X86_TUNE_USE_CLTD, 262 1.1.1.1.8.2 tls X86_TUNE_USE_XCHGB, 263 1.1.1.1.8.2 tls X86_TUNE_SPLIT_LONG_MOVES, 264 1.1.1.1.8.2 tls X86_TUNE_READ_MODIFY_WRITE, 265 1.1.1.1.8.2 tls X86_TUNE_READ_MODIFY, 266 1.1.1.1.8.2 tls X86_TUNE_PROMOTE_QIMODE, 267 1.1.1.1.8.2 tls X86_TUNE_FAST_PREFIX, 268 1.1.1.1.8.2 tls X86_TUNE_SINGLE_STRINGOP, 269 1.1.1.1.8.2 tls X86_TUNE_QIMODE_MATH, 270 1.1.1.1.8.2 tls X86_TUNE_HIMODE_MATH, 271 1.1.1.1.8.2 tls X86_TUNE_PROMOTE_QI_REGS, 272 1.1.1.1.8.2 tls X86_TUNE_PROMOTE_HI_REGS, 273 1.1.1.1.8.2 tls X86_TUNE_ADD_ESP_4, 274 1.1.1.1.8.2 tls X86_TUNE_ADD_ESP_8, 275 1.1.1.1.8.2 tls X86_TUNE_SUB_ESP_4, 276 1.1.1.1.8.2 tls X86_TUNE_SUB_ESP_8, 277 1.1.1.1.8.2 tls X86_TUNE_INTEGER_DFMODE_MOVES, 278 1.1.1.1.8.2 tls X86_TUNE_PARTIAL_REG_DEPENDENCY, 279 1.1.1.1.8.2 tls X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY, 280 1.1.1.1.8.2 tls X86_TUNE_SSE_UNALIGNED_MOVE_OPTIMAL, 281 1.1.1.1.8.2 tls X86_TUNE_SSE_SPLIT_REGS, 282 1.1.1.1.8.2 tls X86_TUNE_SSE_TYPELESS_STORES, 283 1.1.1.1.8.2 tls X86_TUNE_SSE_LOAD0_BY_PXOR, 284 1.1.1.1.8.2 tls X86_TUNE_MEMORY_MISMATCH_STALL, 285 1.1.1.1.8.2 tls X86_TUNE_PROLOGUE_USING_MOVE, 286 1.1.1.1.8.2 tls X86_TUNE_EPILOGUE_USING_MOVE, 287 1.1.1.1.8.2 tls X86_TUNE_SHIFT1, 288 1.1.1.1.8.2 tls X86_TUNE_USE_FFREEP, 289 1.1.1.1.8.2 tls X86_TUNE_INTER_UNIT_MOVES, 290 1.1.1.1.8.2 tls X86_TUNE_INTER_UNIT_CONVERSIONS, 291 1.1.1.1.8.2 tls X86_TUNE_FOUR_JUMP_LIMIT, 292 1.1.1.1.8.2 tls X86_TUNE_SCHEDULE, 293 1.1.1.1.8.2 tls X86_TUNE_USE_BT, 294 1.1.1.1.8.2 tls X86_TUNE_USE_INCDEC, 295 1.1.1.1.8.2 tls X86_TUNE_PAD_RETURNS, 296 1.1.1.1.8.2 tls X86_TUNE_EXT_80387_CONSTANTS, 297 1.1.1.1.8.2 tls X86_TUNE_SHORTEN_X87_SSE, 298 1.1.1.1.8.2 tls X86_TUNE_AVOID_VECTOR_DECODE, 299 1.1.1.1.8.2 tls X86_TUNE_PROMOTE_HIMODE_IMUL, 300 1.1.1.1.8.2 tls X86_TUNE_SLOW_IMUL_IMM32_MEM, 301 1.1.1.1.8.2 tls X86_TUNE_SLOW_IMUL_IMM8, 302 1.1.1.1.8.2 tls X86_TUNE_MOVE_M1_VIA_OR, 303 1.1.1.1.8.2 tls X86_TUNE_NOT_UNPAIRABLE, 304 1.1.1.1.8.2 tls X86_TUNE_NOT_VECTORMODE, 305 1.1.1.1.8.2 tls X86_TUNE_USE_VECTOR_FP_CONVERTS, 306 1.1.1.1.8.2 tls X86_TUNE_USE_VECTOR_CONVERTS, 307 1.1.1.1.8.2 tls X86_TUNE_FUSE_CMP_AND_BRANCH, 308 1.1.1.1.8.2 tls X86_TUNE_OPT_AGU, 309 1.1.1.1.8.2 tls 310 1.1.1.1.8.2 tls X86_TUNE_LAST 311 1.1.1.1.8.2 tls }; 312 1.1.1.1.8.2 tls 313 1.1.1.1.8.2 tls extern unsigned char ix86_tune_features[X86_TUNE_LAST]; 314 1.1.1.1.8.2 tls 315 1.1.1.1.8.2 tls #define TARGET_USE_LEAVE ix86_tune_features[X86_TUNE_USE_LEAVE] 316 1.1.1.1.8.2 tls #define TARGET_PUSH_MEMORY ix86_tune_features[X86_TUNE_PUSH_MEMORY] 317 1.1.1.1.8.2 tls #define TARGET_ZERO_EXTEND_WITH_AND \ 318 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_ZERO_EXTEND_WITH_AND] 319 1.1.1.1.8.2 tls #define TARGET_UNROLL_STRLEN ix86_tune_features[X86_TUNE_UNROLL_STRLEN] 320 1.1.1.1.8.2 tls #define TARGET_DEEP_BRANCH_PREDICTION \ 321 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_DEEP_BRANCH_PREDICTION] 322 1.1.1.1.8.2 tls #define TARGET_BRANCH_PREDICTION_HINTS \ 323 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_BRANCH_PREDICTION_HINTS] 324 1.1.1.1.8.2 tls #define TARGET_DOUBLE_WITH_ADD ix86_tune_features[X86_TUNE_DOUBLE_WITH_ADD] 325 1.1.1.1.8.2 tls #define TARGET_USE_SAHF ix86_tune_features[X86_TUNE_USE_SAHF] 326 1.1.1.1.8.2 tls #define TARGET_MOVX ix86_tune_features[X86_TUNE_MOVX] 327 1.1.1.1.8.2 tls #define TARGET_PARTIAL_REG_STALL ix86_tune_features[X86_TUNE_PARTIAL_REG_STALL] 328 1.1.1.1.8.2 tls #define TARGET_PARTIAL_FLAG_REG_STALL \ 329 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_PARTIAL_FLAG_REG_STALL] 330 1.1.1.1.8.2 tls #define TARGET_USE_HIMODE_FIOP ix86_tune_features[X86_TUNE_USE_HIMODE_FIOP] 331 1.1.1.1.8.2 tls #define TARGET_USE_SIMODE_FIOP ix86_tune_features[X86_TUNE_USE_SIMODE_FIOP] 332 1.1.1.1.8.2 tls #define TARGET_USE_MOV0 ix86_tune_features[X86_TUNE_USE_MOV0] 333 1.1.1.1.8.2 tls #define TARGET_USE_CLTD ix86_tune_features[X86_TUNE_USE_CLTD] 334 1.1.1.1.8.2 tls #define TARGET_USE_XCHGB ix86_tune_features[X86_TUNE_USE_XCHGB] 335 1.1.1.1.8.2 tls #define TARGET_SPLIT_LONG_MOVES ix86_tune_features[X86_TUNE_SPLIT_LONG_MOVES] 336 1.1.1.1.8.2 tls #define TARGET_READ_MODIFY_WRITE ix86_tune_features[X86_TUNE_READ_MODIFY_WRITE] 337 1.1.1.1.8.2 tls #define TARGET_READ_MODIFY ix86_tune_features[X86_TUNE_READ_MODIFY] 338 1.1.1.1.8.2 tls #define TARGET_PROMOTE_QImode ix86_tune_features[X86_TUNE_PROMOTE_QIMODE] 339 1.1.1.1.8.2 tls #define TARGET_FAST_PREFIX ix86_tune_features[X86_TUNE_FAST_PREFIX] 340 1.1.1.1.8.2 tls #define TARGET_SINGLE_STRINGOP ix86_tune_features[X86_TUNE_SINGLE_STRINGOP] 341 1.1.1.1.8.2 tls #define TARGET_QIMODE_MATH ix86_tune_features[X86_TUNE_QIMODE_MATH] 342 1.1.1.1.8.2 tls #define TARGET_HIMODE_MATH ix86_tune_features[X86_TUNE_HIMODE_MATH] 343 1.1.1.1.8.2 tls #define TARGET_PROMOTE_QI_REGS ix86_tune_features[X86_TUNE_PROMOTE_QI_REGS] 344 1.1.1.1.8.2 tls #define TARGET_PROMOTE_HI_REGS ix86_tune_features[X86_TUNE_PROMOTE_HI_REGS] 345 1.1.1.1.8.2 tls #define TARGET_ADD_ESP_4 ix86_tune_features[X86_TUNE_ADD_ESP_4] 346 1.1.1.1.8.2 tls #define TARGET_ADD_ESP_8 ix86_tune_features[X86_TUNE_ADD_ESP_8] 347 1.1.1.1.8.2 tls #define TARGET_SUB_ESP_4 ix86_tune_features[X86_TUNE_SUB_ESP_4] 348 1.1.1.1.8.2 tls #define TARGET_SUB_ESP_8 ix86_tune_features[X86_TUNE_SUB_ESP_8] 349 1.1.1.1.8.2 tls #define TARGET_INTEGER_DFMODE_MOVES \ 350 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_INTEGER_DFMODE_MOVES] 351 1.1.1.1.8.2 tls #define TARGET_PARTIAL_REG_DEPENDENCY \ 352 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_PARTIAL_REG_DEPENDENCY] 353 1.1.1.1.8.2 tls #define TARGET_SSE_PARTIAL_REG_DEPENDENCY \ 354 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY] 355 1.1.1.1.8.2 tls #define TARGET_SSE_UNALIGNED_MOVE_OPTIMAL \ 356 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_SSE_UNALIGNED_MOVE_OPTIMAL] 357 1.1.1.1.8.2 tls #define TARGET_SSE_SPLIT_REGS ix86_tune_features[X86_TUNE_SSE_SPLIT_REGS] 358 1.1.1.1.8.2 tls #define TARGET_SSE_TYPELESS_STORES \ 359 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_SSE_TYPELESS_STORES] 360 1.1.1.1.8.2 tls #define TARGET_SSE_LOAD0_BY_PXOR ix86_tune_features[X86_TUNE_SSE_LOAD0_BY_PXOR] 361 1.1.1.1.8.2 tls #define TARGET_MEMORY_MISMATCH_STALL \ 362 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_MEMORY_MISMATCH_STALL] 363 1.1.1.1.8.2 tls #define TARGET_PROLOGUE_USING_MOVE \ 364 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_PROLOGUE_USING_MOVE] 365 1.1.1.1.8.2 tls #define TARGET_EPILOGUE_USING_MOVE \ 366 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_EPILOGUE_USING_MOVE] 367 1.1.1.1.8.2 tls #define TARGET_SHIFT1 ix86_tune_features[X86_TUNE_SHIFT1] 368 1.1.1.1.8.2 tls #define TARGET_USE_FFREEP ix86_tune_features[X86_TUNE_USE_FFREEP] 369 1.1.1.1.8.2 tls #define TARGET_INTER_UNIT_MOVES ix86_tune_features[X86_TUNE_INTER_UNIT_MOVES] 370 1.1.1.1.8.2 tls #define TARGET_INTER_UNIT_CONVERSIONS\ 371 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_INTER_UNIT_CONVERSIONS] 372 1.1.1.1.8.2 tls #define TARGET_FOUR_JUMP_LIMIT ix86_tune_features[X86_TUNE_FOUR_JUMP_LIMIT] 373 1.1.1.1.8.2 tls #define TARGET_SCHEDULE ix86_tune_features[X86_TUNE_SCHEDULE] 374 1.1.1.1.8.2 tls #define TARGET_USE_BT ix86_tune_features[X86_TUNE_USE_BT] 375 1.1.1.1.8.2 tls #define TARGET_USE_INCDEC ix86_tune_features[X86_TUNE_USE_INCDEC] 376 1.1.1.1.8.2 tls #define TARGET_PAD_RETURNS ix86_tune_features[X86_TUNE_PAD_RETURNS] 377 1.1.1.1.8.2 tls #define TARGET_EXT_80387_CONSTANTS \ 378 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_EXT_80387_CONSTANTS] 379 1.1.1.1.8.2 tls #define TARGET_SHORTEN_X87_SSE ix86_tune_features[X86_TUNE_SHORTEN_X87_SSE] 380 1.1.1.1.8.2 tls #define TARGET_AVOID_VECTOR_DECODE \ 381 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_AVOID_VECTOR_DECODE] 382 1.1.1.1.8.2 tls #define TARGET_TUNE_PROMOTE_HIMODE_IMUL \ 383 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_PROMOTE_HIMODE_IMUL] 384 1.1.1.1.8.2 tls #define TARGET_SLOW_IMUL_IMM32_MEM \ 385 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_SLOW_IMUL_IMM32_MEM] 386 1.1.1.1.8.2 tls #define TARGET_SLOW_IMUL_IMM8 ix86_tune_features[X86_TUNE_SLOW_IMUL_IMM8] 387 1.1.1.1.8.2 tls #define TARGET_MOVE_M1_VIA_OR ix86_tune_features[X86_TUNE_MOVE_M1_VIA_OR] 388 1.1.1.1.8.2 tls #define TARGET_NOT_UNPAIRABLE ix86_tune_features[X86_TUNE_NOT_UNPAIRABLE] 389 1.1.1.1.8.2 tls #define TARGET_NOT_VECTORMODE ix86_tune_features[X86_TUNE_NOT_VECTORMODE] 390 1.1.1.1.8.2 tls #define TARGET_USE_VECTOR_FP_CONVERTS \ 391 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_USE_VECTOR_FP_CONVERTS] 392 1.1.1.1.8.2 tls #define TARGET_USE_VECTOR_CONVERTS \ 393 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_USE_VECTOR_CONVERTS] 394 1.1.1.1.8.2 tls #define TARGET_FUSE_CMP_AND_BRANCH \ 395 1.1.1.1.8.2 tls ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH] 396 1.1.1.1.8.2 tls #define TARGET_OPT_AGU ix86_tune_features[X86_TUNE_OPT_AGU] 397 1.1.1.1.8.2 tls 398 1.1.1.1.8.2 tls /* Feature tests against the various architecture variations. */ 399 1.1.1.1.8.2 tls enum ix86_arch_indices { 400 1.1.1.1.8.2 tls X86_ARCH_CMOV, 401 1.1.1.1.8.2 tls X86_ARCH_CMPXCHG, 402 1.1.1.1.8.2 tls X86_ARCH_CMPXCHG8B, 403 1.1.1.1.8.2 tls X86_ARCH_XADD, 404 1.1.1.1.8.2 tls X86_ARCH_BSWAP, 405 1.1.1.1.8.2 tls 406 1.1.1.1.8.2 tls X86_ARCH_LAST 407 1.1.1.1.8.2 tls }; 408 1.1.1.1.8.2 tls 409 1.1.1.1.8.2 tls extern unsigned char ix86_arch_features[X86_ARCH_LAST]; 410 1.1.1.1.8.2 tls 411 1.1.1.1.8.2 tls #define TARGET_CMOV ix86_arch_features[X86_ARCH_CMOV] 412 1.1.1.1.8.2 tls #define TARGET_CMPXCHG ix86_arch_features[X86_ARCH_CMPXCHG] 413 1.1.1.1.8.2 tls #define TARGET_CMPXCHG8B ix86_arch_features[X86_ARCH_CMPXCHG8B] 414 1.1.1.1.8.2 tls #define TARGET_XADD ix86_arch_features[X86_ARCH_XADD] 415 1.1.1.1.8.2 tls #define TARGET_BSWAP ix86_arch_features[X86_ARCH_BSWAP] 416 1.1.1.1.8.2 tls 417 1.1.1.1.8.2 tls /* For sane SSE instruction set generation we need fcomi instruction. 418 1.1.1.1.8.2 tls It is safe to enable all CMOVE instructions. */ 419 1.1.1.1.8.2 tls #define TARGET_CMOVE (TARGET_CMOV || TARGET_SSE) 420 1.1.1.1.8.2 tls 421 1.1.1.1.8.2 tls #define TARGET_FISTTP (TARGET_SSE3 && TARGET_80387) 422 1.1.1.1.8.2 tls 423 1.1.1.1.8.2 tls extern int x86_prefetch_sse; 424 1.1.1.1.8.2 tls 425 1.1.1.1.8.2 tls #define TARGET_PREFETCH_SSE x86_prefetch_sse 426 1.1.1.1.8.2 tls 427 1.1.1.1.8.2 tls #define ASSEMBLER_DIALECT (ix86_asm_dialect) 428 1.1.1.1.8.2 tls 429 1.1.1.1.8.2 tls #define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0) 430 1.1.1.1.8.2 tls #define TARGET_MIX_SSE_I387 \ 431 1.1.1.1.8.2 tls ((ix86_fpmath & (FPMATH_SSE | FPMATH_387)) == (FPMATH_SSE | FPMATH_387)) 432 1.1.1.1.8.2 tls 433 1.1.1.1.8.2 tls #define TARGET_GNU_TLS (ix86_tls_dialect == TLS_DIALECT_GNU) 434 1.1.1.1.8.2 tls #define TARGET_GNU2_TLS (ix86_tls_dialect == TLS_DIALECT_GNU2) 435 1.1.1.1.8.2 tls #define TARGET_ANY_GNU_TLS (TARGET_GNU_TLS || TARGET_GNU2_TLS) 436 1.1.1.1.8.2 tls #define TARGET_SUN_TLS 0 437 1.1.1.1.8.2 tls 438 1.1.1.1.8.2 tls extern int ix86_isa_flags; 439 1.1.1.1.8.2 tls 440 1.1.1.1.8.2 tls #ifndef TARGET_64BIT_DEFAULT 441 1.1.1.1.8.2 tls #define TARGET_64BIT_DEFAULT 0 442 1.1.1.1.8.2 tls #endif 443 1.1.1.1.8.2 tls #ifndef TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 444 1.1.1.1.8.2 tls #define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0 445 1.1.1.1.8.2 tls #endif 446 1.1.1.1.8.2 tls 447 1.1.1.1.8.2 tls /* Fence to use after loop using storent. */ 448 1.1.1.1.8.2 tls 449 1.1.1.1.8.2 tls extern tree x86_mfence; 450 1.1.1.1.8.2 tls #define FENCE_FOLLOWING_MOVNT x86_mfence 451 1.1.1.1.8.2 tls 452 1.1.1.1.8.2 tls /* Once GDB has been enhanced to deal with functions without frame 453 1.1.1.1.8.2 tls pointers, we can change this to allow for elimination of 454 1.1.1.1.8.2 tls the frame pointer in leaf functions. */ 455 1.1.1.1.8.2 tls #define TARGET_DEFAULT 0 456 1.1.1.1.8.2 tls 457 1.1.1.1.8.2 tls /* Extra bits to force. */ 458 1.1.1.1.8.2 tls #define TARGET_SUBTARGET_DEFAULT 0 459 1.1.1.1.8.2 tls #define TARGET_SUBTARGET_ISA_DEFAULT 0 460 1.1.1.1.8.2 tls 461 1.1.1.1.8.2 tls /* Extra bits to force on w/ 32-bit mode. */ 462 1.1.1.1.8.2 tls #define TARGET_SUBTARGET32_DEFAULT 0 463 1.1.1.1.8.2 tls #define TARGET_SUBTARGET32_ISA_DEFAULT 0 464 1.1.1.1.8.2 tls 465 1.1.1.1.8.2 tls /* Extra bits to force on w/ 64-bit mode. */ 466 1.1.1.1.8.2 tls #define TARGET_SUBTARGET64_DEFAULT 0 467 1.1.1.1.8.2 tls #define TARGET_SUBTARGET64_ISA_DEFAULT 0 468 1.1.1.1.8.2 tls 469 1.1.1.1.8.2 tls /* This is not really a target flag, but is done this way so that 470 1.1.1.1.8.2 tls it's analogous to similar code for Mach-O on PowerPC. darwin.h 471 1.1.1.1.8.2 tls redefines this to 1. */ 472 1.1.1.1.8.2 tls #define TARGET_MACHO 0 473 1.1.1.1.8.2 tls 474 1.1.1.1.8.2 tls /* Likewise, for the Windows 64-bit ABI. */ 475 1.1.1.1.8.2 tls #define TARGET_64BIT_MS_ABI (TARGET_64BIT && ix86_cfun_abi () == MS_ABI) 476 1.1.1.1.8.2 tls 477 1.1.1.1.8.2 tls /* Available call abi. */ 478 1.1.1.1.8.2 tls enum calling_abi 479 1.1.1.1.8.2 tls { 480 1.1.1.1.8.2 tls SYSV_ABI = 0, 481 1.1.1.1.8.2 tls MS_ABI = 1 482 1.1.1.1.8.2 tls }; 483 1.1.1.1.8.2 tls 484 1.1.1.1.8.2 tls /* The abi used by target. */ 485 1.1.1.1.8.2 tls extern enum calling_abi ix86_abi; 486 1.1.1.1.8.2 tls 487 1.1.1.1.8.2 tls /* The default abi used by target. */ 488 1.1.1.1.8.2 tls #define DEFAULT_ABI SYSV_ABI 489 1.1.1.1.8.2 tls 490 1.1.1.1.8.2 tls /* Subtargets may reset this to 1 in order to enable 96-bit long double 491 1.1.1.1.8.2 tls with the rounding mode forced to 53 bits. */ 492 1.1.1.1.8.2 tls #define TARGET_96_ROUND_53_LONG_DOUBLE 0 493 1.1.1.1.8.2 tls 494 1.1.1.1.8.2 tls /* Sometimes certain combinations of command options do not make 495 1.1.1.1.8.2 tls sense on a particular target machine. You can define a macro 496 1.1.1.1.8.2 tls `OVERRIDE_OPTIONS' to take account of this. This macro, if 497 1.1.1.1.8.2 tls defined, is executed once just after all the command options have 498 1.1.1.1.8.2 tls been parsed. 499 1.1.1.1.8.2 tls 500 1.1.1.1.8.2 tls Don't use this macro to turn on various extra optimizations for 501 1.1.1.1.8.2 tls `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */ 502 1.1.1.1.8.2 tls 503 1.1.1.1.8.2 tls #define OVERRIDE_OPTIONS override_options (true) 504 1.1.1.1.8.2 tls 505 1.1.1.1.8.2 tls /* Define this to change the optimizations performed by default. */ 506 1.1.1.1.8.2 tls #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 507 1.1.1.1.8.2 tls optimization_options ((LEVEL), (SIZE)) 508 1.1.1.1.8.2 tls 509 1.1.1.1.8.2 tls /* -march=native handling only makes sense with compiler running on 510 1.1.1.1.8.2 tls an x86 or x86_64 chip. If changing this condition, also change 511 1.1.1.1.8.2 tls the condition in driver-i386.c. */ 512 1.1.1.1.8.2 tls #if defined(__i386__) || defined(__x86_64__) 513 1.1.1.1.8.2 tls /* In driver-i386.c. */ 514 1.1.1.1.8.2 tls extern const char *host_detect_local_cpu (int argc, const char **argv); 515 1.1.1.1.8.2 tls #define EXTRA_SPEC_FUNCTIONS \ 516 1.1.1.1.8.2 tls { "local_cpu_detect", host_detect_local_cpu }, 517 1.1.1.1.8.2 tls #define HAVE_LOCAL_CPU_DETECT 518 1.1.1.1.8.2 tls #endif 519 1.1.1.1.8.2 tls 520 1.1.1.1.8.2 tls #if TARGET_64BIT_DEFAULT 521 1.1.1.1.8.2 tls #define OPT_ARCH64 "!m32" 522 1.1.1.1.8.2 tls #define OPT_ARCH32 "m32" 523 1.1.1.1.8.2 tls #else 524 1.1.1.1.8.2 tls #define OPT_ARCH64 "m64" 525 1.1.1.1.8.2 tls #define OPT_ARCH32 "!m64" 526 1.1.1.1.8.2 tls #endif 527 1.1.1.1.8.2 tls 528 1.1.1.1.8.2 tls /* Support for configure-time defaults of some command line options. 529 1.1.1.1.8.2 tls The order here is important so that -march doesn't squash the 530 1.1.1.1.8.2 tls tune or cpu values. */ 531 1.1.1.1.8.2 tls #define OPTION_DEFAULT_SPECS \ 532 1.1.1.1.8.2 tls {"tune", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ 533 1.1.1.1.8.2 tls {"tune_32", "%{" OPT_ARCH32 ":%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}}" }, \ 534 1.1.1.1.8.2 tls {"tune_64", "%{" OPT_ARCH64 ":%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}}" }, \ 535 1.1.1.1.8.2 tls {"cpu", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \ 536 1.1.1.1.8.2 tls {"cpu_32", "%{" OPT_ARCH32 ":%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}}" }, \ 537 1.1.1.1.8.2 tls {"cpu_64", "%{" OPT_ARCH64 ":%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}}" }, \ 538 1.1.1.1.8.2 tls {"arch", "%{!march=*:-march=%(VALUE)}"}, \ 539 1.1.1.1.8.2 tls {"arch_32", "%{" OPT_ARCH32 ":%{!march=*:-march=%(VALUE)}}"}, \ 540 1.1.1.1.8.2 tls {"arch_64", "%{" OPT_ARCH64 ":%{!march=*:-march=%(VALUE)}}"}, 541 1.1.1.1.8.2 tls 542 1.1.1.1.8.2 tls /* Specs for the compiler proper */ 543 1.1.1.1.8.2 tls 544 1.1.1.1.8.2 tls #ifndef CC1_CPU_SPEC 545 1.1.1.1.8.2 tls #define CC1_CPU_SPEC_1 "\ 546 1.1.1.1.8.2 tls %{mcpu=*:-mtune=%* \ 547 1.1.1.1.8.2 tls %n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n} \ 548 1.1.1.1.8.2 tls %<mcpu=* \ 549 1.1.1.1.8.2 tls %{mintel-syntax:-masm=intel \ 550 1.1.1.1.8.2 tls %n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \ 551 1.1.1.1.8.2 tls %{msse5:-mavx \ 552 1.1.1.1.8.2 tls %n'-msse5' was removed.\n} \ 553 1.1.1.1.8.2 tls %{mno-intel-syntax:-masm=att \ 554 1.1.1.1.8.2 tls %n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}" 555 1.1.1.1.8.2 tls 556 1.1.1.1.8.2 tls #ifndef HAVE_LOCAL_CPU_DETECT 557 1.1.1.1.8.2 tls #define CC1_CPU_SPEC CC1_CPU_SPEC_1 558 1.1.1.1.8.2 tls #else 559 1.1.1.1.8.2 tls #define CC1_CPU_SPEC CC1_CPU_SPEC_1 \ 560 1.1.1.1.8.2 tls "%{march=native:%<march=native %:local_cpu_detect(arch) \ 561 1.1.1.1.8.2 tls %{!mtune=*:%<mtune=native %:local_cpu_detect(tune)}} \ 562 1.1.1.1.8.2 tls %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}" 563 1.1.1.1.8.2 tls #endif 564 1.1.1.1.8.2 tls #endif 565 1.1.1.1.8.2 tls 566 1.1.1.1.8.2 tls /* Target CPU builtins. */ 568 1.1.1.1.8.2 tls #define TARGET_CPU_CPP_BUILTINS() ix86_target_macros () 569 1.1.1.1.8.2 tls 570 1.1.1.1.8.2 tls /* Target Pragmas. */ 571 1.1.1.1.8.2 tls #define REGISTER_TARGET_PRAGMAS() ix86_register_pragmas () 572 1.1.1.1.8.2 tls 573 1.1.1.1.8.2 tls enum target_cpu_default 574 1.1.1.1.8.2 tls { 575 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_generic = 0, 576 1.1.1.1.8.2 tls 577 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_i386, 578 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_i486, 579 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_pentium, 580 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_pentium_mmx, 581 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_pentiumpro, 582 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_pentium2, 583 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_pentium3, 584 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_pentium4, 585 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_pentium_m, 586 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_prescott, 587 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_nocona, 588 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_core2, 589 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_atom, 590 1.1.1.1.8.2 tls 591 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_geode, 592 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_k6, 593 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_k6_2, 594 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_k6_3, 595 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_athlon, 596 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_athlon_sse, 597 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_k8, 598 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_amdfam10, 599 1.1.1.1.8.2 tls 600 1.1.1.1.8.2 tls TARGET_CPU_DEFAULT_max 601 1.1.1.1.8.2 tls }; 602 1.1.1.1.8.2 tls 603 1.1.1.1.8.2 tls #ifndef CC1_SPEC 604 1.1.1.1.8.2 tls #define CC1_SPEC "%(cc1_cpu) " 605 1.1.1.1.8.2 tls #endif 606 1.1.1.1.8.2 tls 607 1.1.1.1.8.2 tls /* This macro defines names of additional specifications to put in the 608 1.1.1.1.8.2 tls specs that can be used in various specifications like CC1_SPEC. Its 609 1.1.1.1.8.2 tls definition is an initializer with a subgrouping for each command option. 610 1.1.1.1.8.2 tls 611 1.1.1.1.8.2 tls Each subgrouping contains a string constant, that defines the 612 1.1.1.1.8.2 tls specification name, and a string constant that used by the GCC driver 613 1.1.1.1.8.2 tls program. 614 1.1.1.1.8.2 tls 615 1.1.1.1.8.2 tls Do not define this macro if it does not need to do anything. */ 616 1.1.1.1.8.2 tls 617 1.1.1.1.8.2 tls #ifndef SUBTARGET_EXTRA_SPECS 618 1.1.1.1.8.2 tls #define SUBTARGET_EXTRA_SPECS 619 1.1.1.1.8.2 tls #endif 620 1.1.1.1.8.2 tls 621 1.1.1.1.8.2 tls #define EXTRA_SPECS \ 622 1.1.1.1.8.2 tls { "cc1_cpu", CC1_CPU_SPEC }, \ 623 1.1.1.1.8.2 tls SUBTARGET_EXTRA_SPECS 624 1.1.1.1.8.2 tls 625 1.1.1.1.8.2 tls 627 1.1.1.1.8.2 tls /* Set the value of FLT_EVAL_METHOD in float.h. When using only the 628 1.1.1.1.8.2 tls FPU, assume that the fpcw is set to extended precision; when using 629 1.1.1.1.8.2 tls only SSE, rounding is correct; when using both SSE and the FPU, 630 1.1.1.1.8.2 tls the rounding precision is indeterminate, since either may be chosen 631 1.1.1.1.8.2 tls apparently at random. */ 632 1.1.1.1.8.2 tls #define TARGET_FLT_EVAL_METHOD \ 633 1.1.1.1.8.2 tls (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 0 : 2) 634 1.1.1.1.8.2 tls 635 1.1.1.1.8.2 tls /* Whether to allow x87 floating-point arithmetic on MODE (one of 636 1.1.1.1.8.2 tls SFmode, DFmode and XFmode) in the current excess precision 637 1.1.1.1.8.2 tls configuration. */ 638 1.1.1.1.8.2 tls #define X87_ENABLE_ARITH(MODE) \ 639 1.1.1.1.8.2 tls (flag_excess_precision == EXCESS_PRECISION_FAST || (MODE) == XFmode) 640 1.1.1.1.8.2 tls 641 1.1.1.1.8.2 tls /* Likewise, whether to allow direct conversions from integer mode 642 1.1.1.1.8.2 tls IMODE (HImode, SImode or DImode) to MODE. */ 643 1.1.1.1.8.2 tls #define X87_ENABLE_FLOAT(MODE, IMODE) \ 644 1.1.1.1.8.2 tls (flag_excess_precision == EXCESS_PRECISION_FAST \ 645 1.1.1.1.8.2 tls || (MODE) == XFmode \ 646 1.1.1.1.8.2 tls || ((MODE) == DFmode && (IMODE) == SImode) \ 647 1.1.1.1.8.2 tls || (IMODE) == HImode) 648 1.1.1.1.8.2 tls 649 1.1.1.1.8.2 tls /* target machine storage layout */ 650 1.1.1.1.8.2 tls 651 1.1.1.1.8.2 tls #define SHORT_TYPE_SIZE 16 652 1.1.1.1.8.2 tls #define INT_TYPE_SIZE 32 653 1.1.1.1.8.2 tls #define FLOAT_TYPE_SIZE 32 654 1.1.1.1.8.2 tls #define LONG_TYPE_SIZE BITS_PER_WORD 655 1.1.1.1.8.2 tls #define DOUBLE_TYPE_SIZE 64 656 1.1.1.1.8.2 tls #define LONG_LONG_TYPE_SIZE 64 657 1.1.1.1.8.2 tls #define LONG_DOUBLE_TYPE_SIZE 80 658 1.1.1.1.8.2 tls 659 1.1.1.1.8.2 tls #define WIDEST_HARDWARE_FP_SIZE LONG_DOUBLE_TYPE_SIZE 660 1.1.1.1.8.2 tls 661 1.1.1.1.8.2 tls #if defined (TARGET_BI_ARCH) || TARGET_64BIT_DEFAULT 662 1.1.1.1.8.2 tls #define MAX_BITS_PER_WORD 64 663 1.1.1.1.8.2 tls #else 664 1.1.1.1.8.2 tls #define MAX_BITS_PER_WORD 32 665 1.1.1.1.8.2 tls #endif 666 1.1.1.1.8.2 tls 667 1.1.1.1.8.2 tls /* Define this if most significant byte of a word is the lowest numbered. */ 668 1.1.1.1.8.2 tls /* That is true on the 80386. */ 669 1.1.1.1.8.2 tls 670 1.1.1.1.8.2 tls #define BITS_BIG_ENDIAN 0 671 1.1.1.1.8.2 tls 672 1.1.1.1.8.2 tls /* Define this if most significant byte of a word is the lowest numbered. */ 673 1.1.1.1.8.2 tls /* That is not true on the 80386. */ 674 1.1.1.1.8.2 tls #define BYTES_BIG_ENDIAN 0 675 1.1.1.1.8.2 tls 676 1.1.1.1.8.2 tls /* Define this if most significant word of a multiword number is the lowest 677 1.1.1.1.8.2 tls numbered. */ 678 1.1.1.1.8.2 tls /* Not true for 80386 */ 679 1.1.1.1.8.2 tls #define WORDS_BIG_ENDIAN 0 680 1.1.1.1.8.2 tls 681 1.1.1.1.8.2 tls /* Width of a word, in units (bytes). */ 682 1.1.1.1.8.2 tls #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 683 1.1.1.1.8.2 tls #ifdef IN_LIBGCC2 684 1.1.1.1.8.2 tls #define MIN_UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) 685 1.1.1.1.8.2 tls #else 686 1.1.1.1.8.2 tls #define MIN_UNITS_PER_WORD 4 687 1.1.1.1.8.2 tls #endif 688 1.1.1.1.8.2 tls 689 1.1.1.1.8.2 tls /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 690 1.1.1.1.8.2 tls #define PARM_BOUNDARY BITS_PER_WORD 691 1.1.1.1.8.2 tls 692 1.1.1.1.8.2 tls /* Boundary (in *bits*) on which stack pointer should be aligned. */ 693 1.1.1.1.8.2 tls #define STACK_BOUNDARY \ 694 1.1.1.1.8.2 tls (TARGET_64BIT && ix86_abi == MS_ABI ? 128 : BITS_PER_WORD) 695 1.1.1.1.8.2 tls 696 1.1.1.1.8.2 tls /* Stack boundary of the main function guaranteed by OS. */ 697 1.1.1.1.8.2 tls #define MAIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) 698 1.1.1.1.8.2 tls 699 1.1.1.1.8.2 tls /* Minimum stack boundary. */ 700 1.1.1.1.8.2 tls #define MIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) 701 1.1.1.1.8.2 tls 702 1.1.1.1.8.2 tls /* Boundary (in *bits*) on which the stack pointer prefers to be 703 1.1.1.1.8.2 tls aligned; the compiler cannot rely on having this alignment. */ 704 1.1.1.1.8.2 tls #define PREFERRED_STACK_BOUNDARY ix86_preferred_stack_boundary 705 1.1.1.1.8.2 tls 706 1.1.1.1.8.2 tls /* It should be MIN_STACK_BOUNDARY. But we set it to 128 bits for 707 1.1.1.1.8.2 tls both 32bit and 64bit, to support codes that need 128 bit stack 708 1.1.1.1.8.2 tls alignment for SSE instructions, but can't realign the stack. */ 709 1.1.1.1.8.2 tls #define PREFERRED_STACK_BOUNDARY_DEFAULT 128 710 1.1.1.1.8.2 tls 711 1.1.1.1.8.2 tls /* 1 if -mstackrealign should be turned on by default. It will 712 1.1.1.1.8.2 tls generate an alternate prologue and epilogue that realigns the 713 1.1.1.1.8.2 tls runtime stack if nessary. This supports mixing codes that keep a 714 1.1.1.1.8.2 tls 4-byte aligned stack, as specified by i386 psABI, with codes that 715 1.1.1.1.8.2 tls need a 16-byte aligned stack, as required by SSE instructions. */ 716 1.1.1.1.8.2 tls #define STACK_REALIGN_DEFAULT 0 717 1.1.1.1.8.2 tls 718 1.1.1.1.8.2 tls /* Boundary (in *bits*) on which the incoming stack is aligned. */ 719 1.1.1.1.8.2 tls #define INCOMING_STACK_BOUNDARY ix86_incoming_stack_boundary 720 1.1.1.1.8.2 tls 721 1.1.1.1.8.2 tls /* Target OS keeps a vector-aligned (128-bit, 16-byte) stack. This is 722 1.1.1.1.8.2 tls mandatory for the 64-bit ABI, and may or may not be true for other 723 1.1.1.1.8.2 tls operating systems. */ 724 1.1.1.1.8.2 tls #define TARGET_KEEPS_VECTOR_ALIGNED_STACK TARGET_64BIT 725 1.1.1.1.8.2 tls 726 1.1.1.1.8.2 tls /* Minimum allocation boundary for the code of a function. */ 727 1.1.1.1.8.2 tls #define FUNCTION_BOUNDARY 8 728 1.1.1.1.8.2 tls 729 1.1.1.1.8.2 tls /* C++ stores the virtual bit in the lowest bit of function pointers. */ 730 1.1.1.1.8.2 tls #define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_pfn 731 1.1.1.1.8.2 tls 732 1.1.1.1.8.2 tls /* Alignment of field after `int : 0' in a structure. */ 733 1.1.1.1.8.2 tls 734 1.1.1.1.8.2 tls #define EMPTY_FIELD_BOUNDARY BITS_PER_WORD 735 1.1.1.1.8.2 tls 736 1.1.1.1.8.2 tls /* Minimum size in bits of the largest boundary to which any 737 1.1.1.1.8.2 tls and all fundamental data types supported by the hardware 738 1.1.1.1.8.2 tls might need to be aligned. No data type wants to be aligned 739 1.1.1.1.8.2 tls rounder than this. 740 1.1.1.1.8.2 tls 741 1.1.1.1.8.2 tls Pentium+ prefers DFmode values to be aligned to 64 bit boundary 742 1.1.1.1.8.2 tls and Pentium Pro XFmode values at 128 bit boundaries. */ 743 1.1.1.1.8.2 tls 744 1.1.1.1.8.2 tls #define BIGGEST_ALIGNMENT (TARGET_AVX ? 256: 128) 745 1.1.1.1.8.2 tls 746 1.1.1.1.8.2 tls /* Maximum stack alignment. */ 747 1.1.1.1.8.2 tls #define MAX_STACK_ALIGNMENT MAX_OFILE_ALIGNMENT 748 1.1.1.1.8.2 tls 749 1.1.1.1.8.2 tls /* Alignment value for attribute ((aligned)). It is a constant since 750 1.1.1.1.8.2 tls it is the part of the ABI. We shouldn't change it with -mavx. */ 751 1.1.1.1.8.2 tls #define ATTRIBUTE_ALIGNED_VALUE 128 752 1.1.1.1.8.2 tls 753 1.1.1.1.8.2 tls /* Decide whether a variable of mode MODE should be 128 bit aligned. */ 754 1.1.1.1.8.2 tls #define ALIGN_MODE_128(MODE) \ 755 1.1.1.1.8.2 tls ((MODE) == XFmode || SSE_REG_MODE_P (MODE)) 756 1.1.1.1.8.2 tls 757 1.1.1.1.8.2 tls /* The published ABIs say that doubles should be aligned on word 758 1.1.1.1.8.2 tls boundaries, so lower the alignment for structure fields unless 759 1.1.1.1.8.2 tls -malign-double is set. */ 760 1.1.1.1.8.2 tls 761 1.1.1.1.8.2 tls /* ??? Blah -- this macro is used directly by libobjc. Since it 762 1.1.1.1.8.2 tls supports no vector modes, cut out the complexity and fall back 763 1.1.1.1.8.2 tls on BIGGEST_FIELD_ALIGNMENT. */ 764 1.1.1.1.8.2 tls #ifdef IN_TARGET_LIBS 765 1.1.1.1.8.2 tls #ifdef __x86_64__ 766 1.1.1.1.8.2 tls #define BIGGEST_FIELD_ALIGNMENT 128 767 1.1.1.1.8.2 tls #else 768 1.1.1.1.8.2 tls #define BIGGEST_FIELD_ALIGNMENT 32 769 1.1.1.1.8.2 tls #endif 770 1.1.1.1.8.2 tls #else 771 1.1.1.1.8.2 tls #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 772 1.1.1.1.8.2 tls x86_field_alignment (FIELD, COMPUTED) 773 1.1.1.1.8.2 tls #endif 774 1.1.1.1.8.2 tls 775 1.1.1.1.8.2 tls /* If defined, a C expression to compute the alignment given to a 776 1.1.1.1.8.2 tls constant that is being placed in memory. EXP is the constant 777 1.1.1.1.8.2 tls and ALIGN is the alignment that the object would ordinarily have. 778 1.1.1.1.8.2 tls The value of this macro is used instead of that alignment to align 779 1.1.1.1.8.2 tls the object. 780 1.1.1.1.8.2 tls 781 1.1.1.1.8.2 tls If this macro is not defined, then ALIGN is used. 782 1.1.1.1.8.2 tls 783 1.1.1.1.8.2 tls The typical use of this macro is to increase alignment for string 784 1.1.1.1.8.2 tls constants to be word aligned so that `strcpy' calls that copy 785 1.1.1.1.8.2 tls constants can be done inline. */ 786 1.1.1.1.8.2 tls 787 1.1.1.1.8.2 tls #define CONSTANT_ALIGNMENT(EXP, ALIGN) ix86_constant_alignment ((EXP), (ALIGN)) 788 1.1.1.1.8.2 tls 789 1.1.1.1.8.2 tls /* If defined, a C expression to compute the alignment for a static 790 1.1.1.1.8.2 tls variable. TYPE is the data type, and ALIGN is the alignment that 791 1.1.1.1.8.2 tls the object would ordinarily have. The value of this macro is used 792 1.1.1.1.8.2 tls instead of that alignment to align the object. 793 1.1.1.1.8.2 tls 794 1.1.1.1.8.2 tls If this macro is not defined, then ALIGN is used. 795 1.1.1.1.8.2 tls 796 1.1.1.1.8.2 tls One use of this macro is to increase alignment of medium-size 797 1.1.1.1.8.2 tls data to make it all fit in fewer cache lines. Another is to 798 1.1.1.1.8.2 tls cause character arrays to be word-aligned so that `strcpy' calls 799 1.1.1.1.8.2 tls that copy constants to character arrays can be done inline. */ 800 1.1.1.1.8.2 tls 801 1.1.1.1.8.2 tls #define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN)) 802 1.1.1.1.8.2 tls 803 1.1.1.1.8.2 tls /* If defined, a C expression to compute the alignment for a local 804 1.1.1.1.8.2 tls variable. TYPE is the data type, and ALIGN is the alignment that 805 1.1.1.1.8.2 tls the object would ordinarily have. The value of this macro is used 806 1.1.1.1.8.2 tls instead of that alignment to align the object. 807 1.1.1.1.8.2 tls 808 1.1.1.1.8.2 tls If this macro is not defined, then ALIGN is used. 809 1.1.1.1.8.2 tls 810 1.1.1.1.8.2 tls One use of this macro is to increase alignment of medium-size 811 1.1.1.1.8.2 tls data to make it all fit in fewer cache lines. */ 812 1.1.1.1.8.2 tls 813 1.1.1.1.8.2 tls #define LOCAL_ALIGNMENT(TYPE, ALIGN) \ 814 1.1.1.1.8.2 tls ix86_local_alignment ((TYPE), VOIDmode, (ALIGN)) 815 1.1.1.1.8.2 tls 816 1.1.1.1.8.2 tls /* If defined, a C expression to compute the alignment for stack slot. 817 1.1.1.1.8.2 tls TYPE is the data type, MODE is the widest mode available, and ALIGN 818 1.1.1.1.8.2 tls is the alignment that the slot would ordinarily have. The value of 819 1.1.1.1.8.2 tls this macro is used instead of that alignment to align the slot. 820 1.1.1.1.8.2 tls 821 1.1.1.1.8.2 tls If this macro is not defined, then ALIGN is used when TYPE is NULL, 822 1.1.1.1.8.2 tls Otherwise, LOCAL_ALIGNMENT will be used. 823 1.1.1.1.8.2 tls 824 1.1.1.1.8.2 tls One use of this macro is to set alignment of stack slot to the 825 1.1.1.1.8.2 tls maximum alignment of all possible modes which the slot may have. */ 826 1.1.1.1.8.2 tls 827 1.1.1.1.8.2 tls #define STACK_SLOT_ALIGNMENT(TYPE, MODE, ALIGN) \ 828 1.1.1.1.8.2 tls ix86_local_alignment ((TYPE), (MODE), (ALIGN)) 829 1.1.1.1.8.2 tls 830 1.1.1.1.8.2 tls /* If defined, a C expression to compute the alignment for a local 831 1.1.1.1.8.2 tls variable DECL. 832 1.1.1.1.8.2 tls 833 1.1.1.1.8.2 tls If this macro is not defined, then 834 1.1.1.1.8.2 tls LOCAL_ALIGNMENT (TREE_TYPE (DECL), DECL_ALIGN (DECL)) will be used. 835 1.1.1.1.8.2 tls 836 1.1.1.1.8.2 tls One use of this macro is to increase alignment of medium-size 837 1.1.1.1.8.2 tls data to make it all fit in fewer cache lines. */ 838 1.1.1.1.8.2 tls 839 1.1.1.1.8.2 tls #define LOCAL_DECL_ALIGNMENT(DECL) \ 840 1.1.1.1.8.2 tls ix86_local_alignment ((DECL), VOIDmode, DECL_ALIGN (DECL)) 841 1.1.1.1.8.2 tls 842 1.1.1.1.8.2 tls /* If defined, a C expression to compute the minimum required alignment 843 1.1.1.1.8.2 tls for dynamic stack realignment purposes for EXP (a TYPE or DECL), 844 1.1.1.1.8.2 tls MODE, assuming normal alignment ALIGN. 845 1.1.1.1.8.2 tls 846 1.1.1.1.8.2 tls If this macro is not defined, then (ALIGN) will be used. */ 847 1.1.1.1.8.2 tls 848 1.1.1.1.8.2 tls #define MINIMUM_ALIGNMENT(EXP, MODE, ALIGN) \ 849 1.1.1.1.8.2 tls ix86_minimum_alignment (EXP, MODE, ALIGN) 850 1.1.1.1.8.2 tls 851 1.1.1.1.8.2 tls 852 1.1.1.1.8.2 tls /* If defined, a C expression that gives the alignment boundary, in 853 1.1.1.1.8.2 tls bits, of an argument with the specified mode and type. If it is 854 1.1.1.1.8.2 tls not defined, `PARM_BOUNDARY' is used for all arguments. */ 855 1.1.1.1.8.2 tls 856 1.1.1.1.8.2 tls #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 857 1.1.1.1.8.2 tls ix86_function_arg_boundary ((MODE), (TYPE)) 858 1.1.1.1.8.2 tls 859 1.1.1.1.8.2 tls /* Set this nonzero if move instructions will actually fail to work 860 1.1.1.1.8.2 tls when given unaligned data. */ 861 1.1.1.1.8.2 tls #define STRICT_ALIGNMENT 0 862 1.1.1.1.8.2 tls 863 1.1.1.1.8.2 tls /* If bit field type is int, don't let it cross an int, 864 1.1.1.1.8.2 tls and give entire struct the alignment of an int. */ 865 1.1.1.1.8.2 tls /* Required on the 386 since it doesn't have bit-field insns. */ 866 1.1.1.1.8.2 tls #define PCC_BITFIELD_TYPE_MATTERS 1 867 1.1.1.1.8.2 tls 868 1.1.1.1.8.2 tls /* Standard register usage. */ 870 1.1.1.1.8.2 tls 871 1.1.1.1.8.2 tls /* This processor has special stack-like registers. See reg-stack.c 872 1.1.1.1.8.2 tls for details. */ 873 1.1.1.1.8.2 tls 874 1.1.1.1.8.2 tls #define STACK_REGS 875 1.1.1.1.8.2 tls 876 1.1.1.1.8.2 tls #define IS_STACK_MODE(MODE) \ 877 1.1.1.1.8.2 tls (((MODE) == SFmode && (!TARGET_SSE || !TARGET_SSE_MATH)) \ 878 1.1.1.1.8.2 tls || ((MODE) == DFmode && (!TARGET_SSE2 || !TARGET_SSE_MATH)) \ 879 1.1.1.1.8.2 tls || (MODE) == XFmode) 880 1.1.1.1.8.2 tls 881 1.1.1.1.8.2 tls /* Cover class containing the stack registers. */ 882 1.1.1.1.8.2 tls #define STACK_REG_COVER_CLASS FLOAT_REGS 883 1.1.1.1.8.2 tls 884 1.1.1.1.8.2 tls /* Number of actual hardware registers. 885 1.1.1.1.8.2 tls The hardware registers are assigned numbers for the compiler 886 1.1.1.1.8.2 tls from 0 to just below FIRST_PSEUDO_REGISTER. 887 1.1.1.1.8.2 tls All registers that the compiler knows about must be given numbers, 888 1.1.1.1.8.2 tls even those that are not normally considered general registers. 889 1.1.1.1.8.2 tls 890 1.1.1.1.8.2 tls In the 80386 we give the 8 general purpose registers the numbers 0-7. 891 1.1.1.1.8.2 tls We number the floating point registers 8-15. 892 1.1.1.1.8.2 tls Note that registers 0-7 can be accessed as a short or int, 893 1.1.1.1.8.2 tls while only 0-3 may be used with byte `mov' instructions. 894 1.1.1.1.8.2 tls 895 1.1.1.1.8.2 tls Reg 16 does not correspond to any hardware register, but instead 896 1.1.1.1.8.2 tls appears in the RTL as an argument pointer prior to reload, and is 897 1.1.1.1.8.2 tls eliminated during reloading in favor of either the stack or frame 898 1.1.1.1.8.2 tls pointer. */ 899 1.1.1.1.8.2 tls 900 1.1.1.1.8.2 tls #define FIRST_PSEUDO_REGISTER 53 901 1.1.1.1.8.2 tls 902 1.1.1.1.8.2 tls /* Number of hardware registers that go into the DWARF-2 unwind info. 903 1.1.1.1.8.2 tls If not defined, equals FIRST_PSEUDO_REGISTER. */ 904 1.1.1.1.8.2 tls 905 1.1.1.1.8.2 tls #define DWARF_FRAME_REGISTERS 17 906 1.1.1.1.8.2 tls 907 1.1.1.1.8.2 tls /* 1 for registers that have pervasive standard uses 908 1.1.1.1.8.2 tls and are not available for the register allocator. 909 1.1.1.1.8.2 tls On the 80386, the stack pointer is such, as is the arg pointer. 910 1.1.1.1.8.2 tls 911 1.1.1.1.8.2 tls The value is zero if the register is not fixed on either 32 or 912 1.1.1.1.8.2 tls 64 bit targets, one if the register if fixed on both 32 and 64 913 1.1.1.1.8.2 tls bit targets, two if it is only fixed on 32bit targets and three 914 1.1.1.1.8.2 tls if its only fixed on 64bit targets. 915 1.1.1.1.8.2 tls Proper values are computed in the CONDITIONAL_REGISTER_USAGE. 916 1.1.1.1.8.2 tls */ 917 1.1.1.1.8.2 tls #define FIXED_REGISTERS \ 918 1.1.1.1.8.2 tls /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 919 1.1.1.1.8.2 tls { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 920 1.1.1.1.8.2 tls /*arg,flags,fpsr,fpcr,frame*/ \ 921 1.1.1.1.8.2 tls 1, 1, 1, 1, 1, \ 922 1.1.1.1.8.2 tls /*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 923 1.1.1.1.8.2 tls 0, 0, 0, 0, 0, 0, 0, 0, \ 924 1.1.1.1.8.2 tls /* mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7*/ \ 925 1.1.1.1.8.2 tls 0, 0, 0, 0, 0, 0, 0, 0, \ 926 1.1.1.1.8.2 tls /* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 927 1.1.1.1.8.2 tls 2, 2, 2, 2, 2, 2, 2, 2, \ 928 1.1.1.1.8.2 tls /*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 929 1.1.1.1.8.2 tls 2, 2, 2, 2, 2, 2, 2, 2 } 930 1.1.1.1.8.2 tls 931 1.1.1.1.8.2 tls 932 1.1.1.1.8.2 tls /* 1 for registers not available across function calls. 933 1.1.1.1.8.2 tls These must include the FIXED_REGISTERS and also any 934 1.1.1.1.8.2 tls registers that can be used without being saved. 935 1.1.1.1.8.2 tls The latter must include the registers where values are returned 936 1.1.1.1.8.2 tls and the register where structure-value addresses are passed. 937 1.1.1.1.8.2 tls Aside from that, you can include as many other registers as you like. 938 1.1.1.1.8.2 tls 939 1.1.1.1.8.2 tls The value is zero if the register is not call used on either 32 or 940 1.1.1.1.8.2 tls 64 bit targets, one if the register if call used on both 32 and 64 941 1.1.1.1.8.2 tls bit targets, two if it is only call used on 32bit targets and three 942 1.1.1.1.8.2 tls if its only call used on 64bit targets. 943 1.1.1.1.8.2 tls Proper values are computed in the CONDITIONAL_REGISTER_USAGE. 944 1.1.1.1.8.2 tls */ 945 1.1.1.1.8.2 tls #define CALL_USED_REGISTERS \ 946 1.1.1.1.8.2 tls /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ 947 1.1.1.1.8.2 tls { 1, 1, 1, 0, 3, 3, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ 948 1.1.1.1.8.2 tls /*arg,flags,fpsr,fpcr,frame*/ \ 949 1.1.1.1.8.2 tls 1, 1, 1, 1, 1, \ 950 1.1.1.1.8.2 tls /*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ 951 1.1.1.1.8.2 tls 1, 1, 1, 1, 1, 1, 1, 1, \ 952 1.1.1.1.8.2 tls /* mm0, mm1, mm2, mm3, mm4, mm5, mm6, mm7*/ \ 953 1.1.1.1.8.2 tls 1, 1, 1, 1, 1, 1, 1, 1, \ 954 1.1.1.1.8.2 tls /* r8, r9, r10, r11, r12, r13, r14, r15*/ \ 955 1.1.1.1.8.2 tls 1, 1, 1, 1, 2, 2, 2, 2, \ 956 1.1.1.1.8.2 tls /*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/ \ 957 1.1.1.1.8.2 tls 1, 1, 1, 1, 1, 1, 1, 1 } 958 1.1.1.1.8.2 tls 959 1.1.1.1.8.2 tls /* Order in which to allocate registers. Each register must be 960 1.1.1.1.8.2 tls listed once, even those in FIXED_REGISTERS. List frame pointer 961 1.1.1.1.8.2 tls late and fixed registers last. Note that, in general, we prefer 962 1.1.1.1.8.2 tls registers listed in CALL_USED_REGISTERS, keeping the others 963 1.1.1.1.8.2 tls available for storage of persistent values. 964 1.1.1.1.8.2 tls 965 1.1.1.1.8.2 tls The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order, 966 1.1.1.1.8.2 tls so this is just empty initializer for array. */ 967 1.1.1.1.8.2 tls 968 1.1.1.1.8.2 tls #define REG_ALLOC_ORDER \ 969 1.1.1.1.8.2 tls { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ 970 1.1.1.1.8.2 tls 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, \ 971 1.1.1.1.8.2 tls 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 972 1.1.1.1.8.2 tls 48, 49, 50, 51, 52 } 973 1.1.1.1.8.2 tls 974 1.1.1.1.8.2 tls /* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order 975 1.1.1.1.8.2 tls to be rearranged based on a particular function. When using sse math, 976 1.1.1.1.8.2 tls we want to allocate SSE before x87 registers and vice versa. */ 977 1.1.1.1.8.2 tls 978 1.1.1.1.8.2 tls #define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc () 979 1.1.1.1.8.2 tls 980 1.1.1.1.8.2 tls 981 1.1.1.1.8.2 tls #define OVERRIDE_ABI_FORMAT(FNDECL) ix86_call_abi_override (FNDECL) 982 1.1.1.1.8.2 tls 983 1.1.1.1.8.2 tls /* Macro to conditionally modify fixed_regs/call_used_regs. */ 984 1.1.1.1.8.2 tls #define CONDITIONAL_REGISTER_USAGE ix86_conditional_register_usage () 985 1.1.1.1.8.2 tls 986 1.1.1.1.8.2 tls /* Return number of consecutive hard regs needed starting at reg REGNO 987 1.1.1.1.8.2 tls to hold something of mode MODE. 988 1.1.1.1.8.2 tls This is ordinarily the length in words of a value of mode MODE 989 1.1.1.1.8.2 tls but can be less for certain modes in special long registers. 990 1.1.1.1.8.2 tls 991 1.1.1.1.8.2 tls Actually there are no two word move instructions for consecutive 992 1.1.1.1.8.2 tls registers. And only registers 0-3 may have mov byte instructions 993 1.1.1.1.8.2 tls applied to them. 994 1.1.1.1.8.2 tls */ 995 1.1.1.1.8.2 tls 996 1.1.1.1.8.2 tls #define HARD_REGNO_NREGS(REGNO, MODE) \ 997 1.1.1.1.8.2 tls (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 998 1.1.1.1.8.2 tls ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 999 1.1.1.1.8.2 tls : ((MODE) == XFmode \ 1000 1.1.1.1.8.2 tls ? (TARGET_64BIT ? 2 : 3) \ 1001 1.1.1.1.8.2 tls : (MODE) == XCmode \ 1002 1.1.1.1.8.2 tls ? (TARGET_64BIT ? 4 : 6) \ 1003 1.1.1.1.8.2 tls : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) 1004 1.1.1.1.8.2 tls 1005 1.1.1.1.8.2 tls #define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) \ 1006 1.1.1.1.8.2 tls ((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT) \ 1007 1.1.1.1.8.2 tls ? (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ 1008 1.1.1.1.8.2 tls ? 0 \ 1009 1.1.1.1.8.2 tls : ((MODE) == XFmode || (MODE) == XCmode)) \ 1010 1.1.1.1.8.2 tls : 0) 1011 1.1.1.1.8.2 tls 1012 1.1.1.1.8.2 tls #define HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE) ((MODE) == XFmode ? 4 : 8) 1013 1.1.1.1.8.2 tls 1014 1.1.1.1.8.2 tls #define VALID_AVX256_REG_MODE(MODE) \ 1015 1.1.1.1.8.2 tls ((MODE) == V32QImode || (MODE) == V16HImode || (MODE) == V8SImode \ 1016 1.1.1.1.8.2 tls || (MODE) == V4DImode || (MODE) == V8SFmode || (MODE) == V4DFmode) 1017 1.1.1.1.8.2 tls 1018 1.1.1.1.8.2 tls #define VALID_SSE2_REG_MODE(MODE) \ 1019 1.1.1.1.8.2 tls ((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \ 1020 1.1.1.1.8.2 tls || (MODE) == V2DImode || (MODE) == DFmode) 1021 1.1.1.1.8.2 tls 1022 1.1.1.1.8.2 tls #define VALID_SSE_REG_MODE(MODE) \ 1023 1.1.1.1.8.2 tls ((MODE) == V1TImode || (MODE) == TImode \ 1024 1.1.1.1.8.2 tls || (MODE) == V4SFmode || (MODE) == V4SImode \ 1025 1.1.1.1.8.2 tls || (MODE) == SFmode || (MODE) == TFmode) 1026 1.1.1.1.8.2 tls 1027 1.1.1.1.8.2 tls #define VALID_MMX_REG_MODE_3DNOW(MODE) \ 1028 1.1.1.1.8.2 tls ((MODE) == V2SFmode || (MODE) == SFmode) 1029 1.1.1.1.8.2 tls 1030 1.1.1.1.8.2 tls #define VALID_MMX_REG_MODE(MODE) \ 1031 1.1.1.1.8.2 tls ((MODE == V1DImode) || (MODE) == DImode \ 1032 1.1.1.1.8.2 tls || (MODE) == V2SImode || (MODE) == SImode \ 1033 1.1.1.1.8.2 tls || (MODE) == V4HImode || (MODE) == V8QImode) 1034 1.1.1.1.8.2 tls 1035 1.1.1.1.8.2 tls /* ??? No autovectorization into MMX or 3DNOW until we can reliably 1036 1.1.1.1.8.2 tls place emms and femms instructions. 1037 1.1.1.1.8.2 tls FIXME: AVX has 32byte floating point vector operations and 16byte 1038 1.1.1.1.8.2 tls integer vector operations. But vectorizer doesn't support 1039 1.1.1.1.8.2 tls different sizes for integer and floating point vectors. We limit 1040 1.1.1.1.8.2 tls vector size to 16byte. */ 1041 1.1.1.1.8.2 tls #define UNITS_PER_SIMD_WORD(MODE) \ 1042 1.1.1.1.8.2 tls (TARGET_AVX ? (((MODE) == DFmode || (MODE) == SFmode) ? 16 : 16) \ 1043 1.1.1.1.8.2 tls : (TARGET_SSE ? 16 : UNITS_PER_WORD)) 1044 1.1.1.1.8.2 tls 1045 1.1.1.1.8.2 tls #define VALID_DFP_MODE_P(MODE) \ 1046 1.1.1.1.8.2 tls ((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode) 1047 1.1.1.1.8.2 tls 1048 1.1.1.1.8.2 tls #define VALID_FP_MODE_P(MODE) \ 1049 1.1.1.1.8.2 tls ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \ 1050 1.1.1.1.8.2 tls || (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \ 1051 1.1.1.1.8.2 tls 1052 1.1.1.1.8.2 tls #define VALID_INT_MODE_P(MODE) \ 1053 1.1.1.1.8.2 tls ((MODE) == QImode || (MODE) == HImode || (MODE) == SImode \ 1054 1.1.1.1.8.2 tls || (MODE) == DImode \ 1055 1.1.1.1.8.2 tls || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \ 1056 1.1.1.1.8.2 tls || (MODE) == CDImode \ 1057 1.1.1.1.8.2 tls || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode \ 1058 1.1.1.1.8.2 tls || (MODE) == TFmode || (MODE) == TCmode))) 1059 1.1.1.1.8.2 tls 1060 1.1.1.1.8.2 tls /* Return true for modes passed in SSE registers. */ 1061 1.1.1.1.8.2 tls #define SSE_REG_MODE_P(MODE) \ 1062 1.1.1.1.8.2 tls ((MODE) == V1TImode || (MODE) == TImode || (MODE) == V16QImode \ 1063 1.1.1.1.8.2 tls || (MODE) == TFmode || (MODE) == V8HImode || (MODE) == V2DFmode \ 1064 1.1.1.1.8.2 tls || (MODE) == V2DImode || (MODE) == V4SFmode || (MODE) == V4SImode \ 1065 1.1.1.1.8.2 tls || (MODE) == V32QImode || (MODE) == V16HImode || (MODE) == V8SImode \ 1066 1.1.1.1.8.2 tls || (MODE) == V4DImode || (MODE) == V8SFmode || (MODE) == V4DFmode) 1067 1.1.1.1.8.2 tls 1068 1.1.1.1.8.2 tls /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ 1069 1.1.1.1.8.2 tls 1070 1.1.1.1.8.2 tls #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 1071 1.1.1.1.8.2 tls ix86_hard_regno_mode_ok ((REGNO), (MODE)) 1072 1.1.1.1.8.2 tls 1073 1.1.1.1.8.2 tls /* Value is 1 if it is a good idea to tie two pseudo registers 1074 1.1.1.1.8.2 tls when one has mode MODE1 and one has mode MODE2. 1075 1.1.1.1.8.2 tls If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 1076 1.1.1.1.8.2 tls for any hard reg, then this must be 0 for correct output. */ 1077 1.1.1.1.8.2 tls 1078 1.1.1.1.8.2 tls #define MODES_TIEABLE_P(MODE1, MODE2) ix86_modes_tieable_p (MODE1, MODE2) 1079 1.1.1.1.8.2 tls 1080 1.1.1.1.8.2 tls /* It is possible to write patterns to move flags; but until someone 1081 1.1.1.1.8.2 tls does it, */ 1082 1.1.1.1.8.2 tls #define AVOID_CCMODE_COPIES 1083 1.1.1.1.8.2 tls 1084 1.1.1.1.8.2 tls /* Specify the modes required to caller save a given hard regno. 1085 1.1.1.1.8.2 tls We do this on i386 to prevent flags from being saved at all. 1086 1.1.1.1.8.2 tls 1087 1.1.1.1.8.2 tls Kill any attempts to combine saving of modes. */ 1088 1.1.1.1.8.2 tls 1089 1.1.1.1.8.2 tls #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 1090 1.1.1.1.8.2 tls (CC_REGNO_P (REGNO) ? VOIDmode \ 1091 1.1.1.1.8.2 tls : MMX_REGNO_P (REGNO) ? V8QImode \ 1092 1.1.1.1.8.2 tls : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \ 1093 1.1.1.1.8.2 tls : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false) \ 1094 1.1.1.1.8.2 tls : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \ 1095 1.1.1.1.8.2 tls : (MODE) == QImode && (REGNO) > BX_REG && !TARGET_64BIT ? SImode \ 1096 1.1.1.1.8.2 tls : (MODE)) 1097 1.1.1.1.8.2 tls 1098 1.1.1.1.8.2 tls /* Specify the registers used for certain standard purposes. 1099 1.1.1.1.8.2 tls The values of these macros are register numbers. */ 1100 1.1.1.1.8.2 tls 1101 1.1.1.1.8.2 tls /* on the 386 the pc register is %eip, and is not usable as a general 1102 1.1.1.1.8.2 tls register. The ordinary mov instructions won't work */ 1103 1.1.1.1.8.2 tls /* #define PC_REGNUM */ 1104 1.1.1.1.8.2 tls 1105 1.1.1.1.8.2 tls /* Register to use for pushing function arguments. */ 1106 1.1.1.1.8.2 tls #define STACK_POINTER_REGNUM 7 1107 1.1.1.1.8.2 tls 1108 1.1.1.1.8.2 tls /* Base register for access to local variables of the function. */ 1109 1.1.1.1.8.2 tls #define HARD_FRAME_POINTER_REGNUM 6 1110 1.1.1.1.8.2 tls 1111 1.1.1.1.8.2 tls /* Base register for access to local variables of the function. */ 1112 1.1.1.1.8.2 tls #define FRAME_POINTER_REGNUM 20 1113 1.1.1.1.8.2 tls 1114 1.1.1.1.8.2 tls /* First floating point reg */ 1115 1.1.1.1.8.2 tls #define FIRST_FLOAT_REG 8 1116 1.1.1.1.8.2 tls 1117 1.1.1.1.8.2 tls /* First & last stack-like regs */ 1118 1.1.1.1.8.2 tls #define FIRST_STACK_REG FIRST_FLOAT_REG 1119 1.1.1.1.8.2 tls #define LAST_STACK_REG (FIRST_FLOAT_REG + 7) 1120 1.1.1.1.8.2 tls 1121 1.1.1.1.8.2 tls #define FIRST_SSE_REG (FRAME_POINTER_REGNUM + 1) 1122 1.1.1.1.8.2 tls #define LAST_SSE_REG (FIRST_SSE_REG + 7) 1123 1.1.1.1.8.2 tls 1124 1.1.1.1.8.2 tls #define FIRST_MMX_REG (LAST_SSE_REG + 1) 1125 1.1.1.1.8.2 tls #define LAST_MMX_REG (FIRST_MMX_REG + 7) 1126 1.1.1.1.8.2 tls 1127 1.1.1.1.8.2 tls #define FIRST_REX_INT_REG (LAST_MMX_REG + 1) 1128 1.1.1.1.8.2 tls #define LAST_REX_INT_REG (FIRST_REX_INT_REG + 7) 1129 1.1.1.1.8.2 tls 1130 1.1.1.1.8.2 tls #define FIRST_REX_SSE_REG (LAST_REX_INT_REG + 1) 1131 1.1.1.1.8.2 tls #define LAST_REX_SSE_REG (FIRST_REX_SSE_REG + 7) 1132 1.1.1.1.8.2 tls 1133 1.1.1.1.8.2 tls /* Override this in other tm.h files to cope with various OS lossage 1134 1.1.1.1.8.2 tls requiring a frame pointer. */ 1135 1.1.1.1.8.2 tls #ifndef SUBTARGET_FRAME_POINTER_REQUIRED 1136 1.1.1.1.8.2 tls #define SUBTARGET_FRAME_POINTER_REQUIRED 0 1137 1.1.1.1.8.2 tls #endif 1138 1.1.1.1.8.2 tls 1139 1.1.1.1.8.2 tls /* Make sure we can access arbitrary call frames. */ 1140 1.1.1.1.8.2 tls #define SETUP_FRAME_ADDRESSES() ix86_setup_frame_addresses () 1141 1.1.1.1.8.2 tls 1142 1.1.1.1.8.2 tls /* Base register for access to arguments of the function. */ 1143 1.1.1.1.8.2 tls #define ARG_POINTER_REGNUM 16 1144 1.1.1.1.8.2 tls 1145 1.1.1.1.8.2 tls /* Register to hold the addressing base for position independent 1146 1.1.1.1.8.2 tls code access to data items. We don't use PIC pointer for 64bit 1147 1.1.1.1.8.2 tls mode. Define the regnum to dummy value to prevent gcc from 1148 1.1.1.1.8.2 tls pessimizing code dealing with EBX. 1149 1.1.1.1.8.2 tls 1150 1.1.1.1.8.2 tls To avoid clobbering a call-saved register unnecessarily, we renumber 1151 1.1.1.1.8.2 tls the pic register when possible. The change is visible after the 1152 1.1.1.1.8.2 tls prologue has been emitted. */ 1153 1.1.1.1.8.2 tls 1154 1.1.1.1.8.2 tls #define REAL_PIC_OFFSET_TABLE_REGNUM BX_REG 1155 1.1.1.1.8.2 tls 1156 1.1.1.1.8.2 tls #define PIC_OFFSET_TABLE_REGNUM \ 1157 1.1.1.1.8.2 tls ((TARGET_64BIT && ix86_cmodel == CM_SMALL_PIC) \ 1158 1.1.1.1.8.2 tls || !flag_pic ? INVALID_REGNUM \ 1159 1.1.1.1.8.2 tls : reload_completed ? REGNO (pic_offset_table_rtx) \ 1160 1.1.1.1.8.2 tls : REAL_PIC_OFFSET_TABLE_REGNUM) 1161 1.1.1.1.8.2 tls 1162 1.1.1.1.8.2 tls #define GOT_SYMBOL_NAME "_GLOBAL_OFFSET_TABLE_" 1163 1.1.1.1.8.2 tls 1164 1.1.1.1.8.2 tls /* This is overridden by <cygwin.h>. */ 1165 1.1.1.1.8.2 tls #define MS_AGGREGATE_RETURN 0 1166 1.1.1.1.8.2 tls 1167 1.1.1.1.8.2 tls /* This is overridden by <netware.h>. */ 1168 1.1.1.1.8.2 tls #define KEEP_AGGREGATE_RETURN_POINTER 0 1169 1.1.1.1.8.2 tls 1170 1.1.1.1.8.2 tls /* Define the classes of registers for register constraints in the 1172 1.1.1.1.8.2 tls machine description. Also define ranges of constants. 1173 1.1.1.1.8.2 tls 1174 1.1.1.1.8.2 tls One of the classes must always be named ALL_REGS and include all hard regs. 1175 1.1.1.1.8.2 tls If there is more than one class, another class must be named NO_REGS 1176 1.1.1.1.8.2 tls and contain no registers. 1177 1.1.1.1.8.2 tls 1178 1.1.1.1.8.2 tls The name GENERAL_REGS must be the name of a class (or an alias for 1179 1.1.1.1.8.2 tls another name such as ALL_REGS). This is the class of registers 1180 1.1.1.1.8.2 tls that is allowed by "g" or "r" in a register constraint. 1181 1.1.1.1.8.2 tls Also, registers outside this class are allocated only when 1182 1.1.1.1.8.2 tls instructions express preferences for them. 1183 1.1.1.1.8.2 tls 1184 1.1.1.1.8.2 tls The classes must be numbered in nondecreasing order; that is, 1185 1.1.1.1.8.2 tls a larger-numbered class must never be contained completely 1186 1.1.1.1.8.2 tls in a smaller-numbered class. 1187 1.1.1.1.8.2 tls 1188 1.1.1.1.8.2 tls For any two classes, it is very desirable that there be another 1189 1.1.1.1.8.2 tls class that represents their union. 1190 1.1.1.1.8.2 tls 1191 1.1.1.1.8.2 tls It might seem that class BREG is unnecessary, since no useful 386 1192 1.1.1.1.8.2 tls opcode needs reg %ebx. But some systems pass args to the OS in ebx, 1193 1.1.1.1.8.2 tls and the "b" register constraint is useful in asms for syscalls. 1194 1.1.1.1.8.2 tls 1195 1.1.1.1.8.2 tls The flags, fpsr and fpcr registers are in no class. */ 1196 1.1.1.1.8.2 tls 1197 1.1.1.1.8.2 tls enum reg_class 1198 1.1.1.1.8.2 tls { 1199 1.1.1.1.8.2 tls NO_REGS, 1200 1.1.1.1.8.2 tls AREG, DREG, CREG, BREG, SIREG, DIREG, 1201 1.1.1.1.8.2 tls AD_REGS, /* %eax/%edx for DImode */ 1202 1.1.1.1.8.2 tls CLOBBERED_REGS, /* call-clobbered integers */ 1203 1.1.1.1.8.2 tls Q_REGS, /* %eax %ebx %ecx %edx */ 1204 1.1.1.1.8.2 tls NON_Q_REGS, /* %esi %edi %ebp %esp */ 1205 1.1.1.1.8.2 tls INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ 1206 1.1.1.1.8.2 tls LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ 1207 1.1.1.1.8.2 tls GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/ 1208 1.1.1.1.8.2 tls FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ 1209 1.1.1.1.8.2 tls FLOAT_REGS, 1210 1.1.1.1.8.2 tls SSE_FIRST_REG, 1211 1.1.1.1.8.2 tls SSE_REGS, 1212 1.1.1.1.8.2 tls MMX_REGS, 1213 1.1.1.1.8.2 tls FP_TOP_SSE_REGS, 1214 1.1.1.1.8.2 tls FP_SECOND_SSE_REGS, 1215 1.1.1.1.8.2 tls FLOAT_SSE_REGS, 1216 1.1.1.1.8.2 tls FLOAT_INT_REGS, 1217 1.1.1.1.8.2 tls INT_SSE_REGS, 1218 1.1.1.1.8.2 tls FLOAT_INT_SSE_REGS, 1219 1.1.1.1.8.2 tls ALL_REGS, LIM_REG_CLASSES 1220 1.1.1.1.8.2 tls }; 1221 1.1.1.1.8.2 tls 1222 1.1.1.1.8.2 tls #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 1223 1.1.1.1.8.2 tls 1224 1.1.1.1.8.2 tls #define INTEGER_CLASS_P(CLASS) \ 1225 1.1.1.1.8.2 tls reg_class_subset_p ((CLASS), GENERAL_REGS) 1226 1.1.1.1.8.2 tls #define FLOAT_CLASS_P(CLASS) \ 1227 1.1.1.1.8.2 tls reg_class_subset_p ((CLASS), FLOAT_REGS) 1228 1.1.1.1.8.2 tls #define SSE_CLASS_P(CLASS) \ 1229 1.1.1.1.8.2 tls reg_class_subset_p ((CLASS), SSE_REGS) 1230 1.1.1.1.8.2 tls #define MMX_CLASS_P(CLASS) \ 1231 1.1.1.1.8.2 tls ((CLASS) == MMX_REGS) 1232 1.1.1.1.8.2 tls #define MAYBE_INTEGER_CLASS_P(CLASS) \ 1233 1.1.1.1.8.2 tls reg_classes_intersect_p ((CLASS), GENERAL_REGS) 1234 1.1.1.1.8.2 tls #define MAYBE_FLOAT_CLASS_P(CLASS) \ 1235 1.1.1.1.8.2 tls reg_classes_intersect_p ((CLASS), FLOAT_REGS) 1236 1.1.1.1.8.2 tls #define MAYBE_SSE_CLASS_P(CLASS) \ 1237 1.1.1.1.8.2 tls reg_classes_intersect_p (SSE_REGS, (CLASS)) 1238 1.1.1.1.8.2 tls #define MAYBE_MMX_CLASS_P(CLASS) \ 1239 1.1.1.1.8.2 tls reg_classes_intersect_p (MMX_REGS, (CLASS)) 1240 1.1.1.1.8.2 tls 1241 1.1.1.1.8.2 tls #define Q_CLASS_P(CLASS) \ 1242 1.1.1.1.8.2 tls reg_class_subset_p ((CLASS), Q_REGS) 1243 1.1.1.1.8.2 tls 1244 1.1.1.1.8.2 tls /* Give names of register classes as strings for dump file. */ 1245 1.1.1.1.8.2 tls 1246 1.1.1.1.8.2 tls #define REG_CLASS_NAMES \ 1247 1.1.1.1.8.2 tls { "NO_REGS", \ 1248 1.1.1.1.8.2 tls "AREG", "DREG", "CREG", "BREG", \ 1249 1.1.1.1.8.2 tls "SIREG", "DIREG", \ 1250 1.1.1.1.8.2 tls "AD_REGS", \ 1251 1.1.1.1.8.2 tls "CLOBBERED_REGS", \ 1252 1.1.1.1.8.2 tls "Q_REGS", "NON_Q_REGS", \ 1253 1.1.1.1.8.2 tls "INDEX_REGS", \ 1254 1.1.1.1.8.2 tls "LEGACY_REGS", \ 1255 1.1.1.1.8.2 tls "GENERAL_REGS", \ 1256 1.1.1.1.8.2 tls "FP_TOP_REG", "FP_SECOND_REG", \ 1257 1.1.1.1.8.2 tls "FLOAT_REGS", \ 1258 1.1.1.1.8.2 tls "SSE_FIRST_REG", \ 1259 1.1.1.1.8.2 tls "SSE_REGS", \ 1260 1.1.1.1.8.2 tls "MMX_REGS", \ 1261 1.1.1.1.8.2 tls "FP_TOP_SSE_REGS", \ 1262 1.1.1.1.8.2 tls "FP_SECOND_SSE_REGS", \ 1263 1.1.1.1.8.2 tls "FLOAT_SSE_REGS", \ 1264 1.1.1.1.8.2 tls "FLOAT_INT_REGS", \ 1265 1.1.1.1.8.2 tls "INT_SSE_REGS", \ 1266 1.1.1.1.8.2 tls "FLOAT_INT_SSE_REGS", \ 1267 1.1.1.1.8.2 tls "ALL_REGS" } 1268 1.1.1.1.8.2 tls 1269 1.1.1.1.8.2 tls /* Define which registers fit in which classes. This is an initializer 1270 1.1.1.1.8.2 tls for a vector of HARD_REG_SET of length N_REG_CLASSES. 1271 1.1.1.1.8.2 tls 1272 1.1.1.1.8.2 tls Note that the default setting of CLOBBERED_REGS is for 32-bit; this 1273 1.1.1.1.8.2 tls is adjusted by CONDITIONAL_REGISTER_USAGE for the 64-bit ABI in effect. */ 1274 1.1.1.1.8.2 tls 1275 1.1.1.1.8.2 tls #define REG_CLASS_CONTENTS \ 1276 1.1.1.1.8.2 tls { { 0x00, 0x0 }, \ 1277 1.1.1.1.8.2 tls { 0x01, 0x0 }, { 0x02, 0x0 }, /* AREG, DREG */ \ 1278 1.1.1.1.8.2 tls { 0x04, 0x0 }, { 0x08, 0x0 }, /* CREG, BREG */ \ 1279 1.1.1.1.8.2 tls { 0x10, 0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */ \ 1280 1.1.1.1.8.2 tls { 0x03, 0x0 }, /* AD_REGS */ \ 1281 1.1.1.1.8.2 tls { 0x07, 0x0 }, /* CLOBBERED_REGS */ \ 1282 1.1.1.1.8.2 tls { 0x0f, 0x0 }, /* Q_REGS */ \ 1283 1.1.1.1.8.2 tls { 0x1100f0, 0x1fe0 }, /* NON_Q_REGS */ \ 1284 1.1.1.1.8.2 tls { 0x7f, 0x1fe0 }, /* INDEX_REGS */ \ 1285 1.1.1.1.8.2 tls { 0x1100ff, 0x0 }, /* LEGACY_REGS */ \ 1286 1.1.1.1.8.2 tls { 0x1100ff, 0x1fe0 }, /* GENERAL_REGS */ \ 1287 1.1.1.1.8.2 tls { 0x100, 0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\ 1288 1.1.1.1.8.2 tls { 0xff00, 0x0 }, /* FLOAT_REGS */ \ 1289 1.1.1.1.8.2 tls { 0x200000, 0x0 }, /* SSE_FIRST_REG */ \ 1290 1.1.1.1.8.2 tls { 0x1fe00000,0x1fe000 }, /* SSE_REGS */ \ 1291 1.1.1.1.8.2 tls { 0xe0000000, 0x1f }, /* MMX_REGS */ \ 1292 1.1.1.1.8.2 tls { 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \ 1293 1.1.1.1.8.2 tls { 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \ 1294 1.1.1.1.8.2 tls { 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \ 1295 1.1.1.1.8.2 tls { 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \ 1296 1.1.1.1.8.2 tls { 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \ 1297 1.1.1.1.8.2 tls { 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \ 1298 1.1.1.1.8.2 tls { 0xffffffff,0x1fffff } \ 1299 1.1.1.1.8.2 tls } 1300 1.1.1.1.8.2 tls 1301 1.1.1.1.8.2 tls /* The same information, inverted: 1302 1.1.1.1.8.2 tls Return the class number of the smallest class containing 1303 1.1.1.1.8.2 tls reg number REGNO. This could be a conditional expression 1304 1.1.1.1.8.2 tls or could index an array. */ 1305 1.1.1.1.8.2 tls 1306 1.1.1.1.8.2 tls #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO]) 1307 1.1.1.1.8.2 tls 1308 1.1.1.1.8.2 tls /* When defined, the compiler allows registers explicitly used in the 1309 1.1.1.1.8.2 tls rtl to be used as spill registers but prevents the compiler from 1310 1.1.1.1.8.2 tls extending the lifetime of these registers. */ 1311 1.1.1.1.8.2 tls 1312 1.1.1.1.8.2 tls #define SMALL_REGISTER_CLASSES 1 1313 1.1.1.1.8.2 tls 1314 1.1.1.1.8.2 tls #define QI_REG_P(X) (REG_P (X) && REGNO (X) <= BX_REG) 1315 1.1.1.1.8.2 tls 1316 1.1.1.1.8.2 tls #define GENERAL_REGNO_P(N) \ 1317 1.1.1.1.8.2 tls ((N) <= STACK_POINTER_REGNUM || REX_INT_REGNO_P (N)) 1318 1.1.1.1.8.2 tls 1319 1.1.1.1.8.2 tls #define GENERAL_REG_P(X) \ 1320 1.1.1.1.8.2 tls (REG_P (X) && GENERAL_REGNO_P (REGNO (X))) 1321 1.1.1.1.8.2 tls 1322 1.1.1.1.8.2 tls #define ANY_QI_REG_P(X) (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X)) 1323 1.1.1.1.8.2 tls 1324 1.1.1.1.8.2 tls #define REX_INT_REGNO_P(N) \ 1325 1.1.1.1.8.2 tls IN_RANGE ((N), FIRST_REX_INT_REG, LAST_REX_INT_REG) 1326 1.1.1.1.8.2 tls #define REX_INT_REG_P(X) (REG_P (X) && REX_INT_REGNO_P (REGNO (X))) 1327 1.1.1.1.8.2 tls 1328 1.1.1.1.8.2 tls #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X))) 1329 1.1.1.1.8.2 tls #define FP_REGNO_P(N) IN_RANGE ((N), FIRST_STACK_REG, LAST_STACK_REG) 1330 1.1.1.1.8.2 tls #define ANY_FP_REG_P(X) (REG_P (X) && ANY_FP_REGNO_P (REGNO (X))) 1331 1.1.1.1.8.2 tls #define ANY_FP_REGNO_P(N) (FP_REGNO_P (N) || SSE_REGNO_P (N)) 1332 1.1.1.1.8.2 tls 1333 1.1.1.1.8.2 tls #define X87_FLOAT_MODE_P(MODE) \ 1334 1.1.1.1.8.2 tls (TARGET_80387 && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) 1335 1.1.1.1.8.2 tls 1336 1.1.1.1.8.2 tls #define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) 1337 1.1.1.1.8.2 tls #define SSE_REGNO_P(N) \ 1338 1.1.1.1.8.2 tls (IN_RANGE ((N), FIRST_SSE_REG, LAST_SSE_REG) \ 1339 1.1.1.1.8.2 tls || REX_SSE_REGNO_P (N)) 1340 1.1.1.1.8.2 tls 1341 1.1.1.1.8.2 tls #define REX_SSE_REGNO_P(N) \ 1342 1.1.1.1.8.2 tls IN_RANGE ((N), FIRST_REX_SSE_REG, LAST_REX_SSE_REG) 1343 1.1.1.1.8.2 tls 1344 1.1.1.1.8.2 tls #define SSE_REGNO(N) \ 1345 1.1.1.1.8.2 tls ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8) 1346 1.1.1.1.8.2 tls 1347 1.1.1.1.8.2 tls #define SSE_FLOAT_MODE_P(MODE) \ 1348 1.1.1.1.8.2 tls ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode)) 1349 1.1.1.1.8.2 tls 1350 1.1.1.1.8.2 tls #define SSE_VEC_FLOAT_MODE_P(MODE) \ 1351 1.1.1.1.8.2 tls ((TARGET_SSE && (MODE) == V4SFmode) || (TARGET_SSE2 && (MODE) == V2DFmode)) 1352 1.1.1.1.8.2 tls 1353 1.1.1.1.8.2 tls #define AVX_FLOAT_MODE_P(MODE) \ 1354 1.1.1.1.8.2 tls (TARGET_AVX && ((MODE) == SFmode || (MODE) == DFmode)) 1355 1.1.1.1.8.2 tls 1356 1.1.1.1.8.2 tls #define AVX128_VEC_FLOAT_MODE_P(MODE) \ 1357 1.1.1.1.8.2 tls (TARGET_AVX && ((MODE) == V4SFmode || (MODE) == V2DFmode)) 1358 1.1.1.1.8.2 tls 1359 1.1.1.1.8.2 tls #define AVX256_VEC_FLOAT_MODE_P(MODE) \ 1360 1.1.1.1.8.2 tls (TARGET_AVX && ((MODE) == V8SFmode || (MODE) == V4DFmode)) 1361 1.1.1.1.8.2 tls 1362 1.1.1.1.8.2 tls #define AVX_VEC_FLOAT_MODE_P(MODE) \ 1363 1.1.1.1.8.2 tls (TARGET_AVX && ((MODE) == V4SFmode || (MODE) == V2DFmode \ 1364 1.1.1.1.8.2 tls || (MODE) == V8SFmode || (MODE) == V4DFmode)) 1365 1.1.1.1.8.2 tls 1366 1.1.1.1.8.2 tls #define FMA4_VEC_FLOAT_MODE_P(MODE) \ 1367 1.1.1.1.8.2 tls (TARGET_FMA4 && ((MODE) == V4SFmode || (MODE) == V2DFmode \ 1368 1.1.1.1.8.2 tls || (MODE) == V8SFmode || (MODE) == V4DFmode)) 1369 1.1.1.1.8.2 tls 1370 1.1.1.1.8.2 tls #define MMX_REG_P(XOP) (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP))) 1371 1.1.1.1.8.2 tls #define MMX_REGNO_P(N) IN_RANGE ((N), FIRST_MMX_REG, LAST_MMX_REG) 1372 1.1.1.1.8.2 tls 1373 1.1.1.1.8.2 tls #define STACK_REG_P(XOP) (REG_P (XOP) && STACK_REGNO_P (REGNO (XOP))) 1374 1.1.1.1.8.2 tls #define STACK_REGNO_P(N) IN_RANGE ((N), FIRST_STACK_REG, LAST_STACK_REG) 1375 1.1.1.1.8.2 tls 1376 1.1.1.1.8.2 tls #define STACK_TOP_P(XOP) (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG) 1377 1.1.1.1.8.2 tls 1378 1.1.1.1.8.2 tls #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X))) 1379 1.1.1.1.8.2 tls #define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG) 1380 1.1.1.1.8.2 tls 1381 1.1.1.1.8.2 tls /* The class value for index registers, and the one for base regs. */ 1382 1.1.1.1.8.2 tls 1383 1.1.1.1.8.2 tls #define INDEX_REG_CLASS INDEX_REGS 1384 1.1.1.1.8.2 tls #define BASE_REG_CLASS GENERAL_REGS 1385 1.1.1.1.8.2 tls 1386 1.1.1.1.8.2 tls /* Place additional restrictions on the register class to use when it 1387 1.1.1.1.8.2 tls is necessary to be able to hold a value of mode MODE in a reload 1388 1.1.1.1.8.2 tls register for which class CLASS would ordinarily be used. */ 1389 1.1.1.1.8.2 tls 1390 1.1.1.1.8.2 tls #define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 1391 1.1.1.1.8.2 tls ((MODE) == QImode && !TARGET_64BIT \ 1392 1.1.1.1.8.2 tls && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \ 1393 1.1.1.1.8.2 tls || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \ 1394 1.1.1.1.8.2 tls ? Q_REGS : (CLASS)) 1395 1.1.1.1.8.2 tls 1396 1.1.1.1.8.2 tls /* Given an rtx X being reloaded into a reg required to be 1397 1.1.1.1.8.2 tls in class CLASS, return the class of reg to actually use. 1398 1.1.1.1.8.2 tls In general this is just CLASS; but on some machines 1399 1.1.1.1.8.2 tls in some cases it is preferable to use a more restrictive class. 1400 1.1.1.1.8.2 tls On the 80386 series, we prevent floating constants from being 1401 1.1.1.1.8.2 tls reloaded into floating registers (since no move-insn can do that) 1402 1.1.1.1.8.2 tls and we ensure that QImodes aren't reloaded into the esi or edi reg. */ 1403 1.1.1.1.8.2 tls 1404 1.1.1.1.8.2 tls /* Put float CONST_DOUBLE in the constant pool instead of fp regs. 1405 1.1.1.1.8.2 tls QImode must go into class Q_REGS. 1406 1.1.1.1.8.2 tls Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and 1407 1.1.1.1.8.2 tls movdf to do mem-to-mem moves through integer regs. */ 1408 1.1.1.1.8.2 tls 1409 1.1.1.1.8.2 tls #define PREFERRED_RELOAD_CLASS(X, CLASS) \ 1410 1.1.1.1.8.2 tls ix86_preferred_reload_class ((X), (CLASS)) 1411 1.1.1.1.8.2 tls 1412 1.1.1.1.8.2 tls /* Discourage putting floating-point values in SSE registers unless 1413 1.1.1.1.8.2 tls SSE math is being used, and likewise for the 387 registers. */ 1414 1.1.1.1.8.2 tls 1415 1.1.1.1.8.2 tls #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \ 1416 1.1.1.1.8.2 tls ix86_preferred_output_reload_class ((X), (CLASS)) 1417 1.1.1.1.8.2 tls 1418 1.1.1.1.8.2 tls /* If we are copying between general and FP registers, we need a memory 1419 1.1.1.1.8.2 tls location. The same is true for SSE and MMX registers. */ 1420 1.1.1.1.8.2 tls #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \ 1421 1.1.1.1.8.2 tls ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1) 1422 1.1.1.1.8.2 tls 1423 1.1.1.1.8.2 tls /* Get_secondary_mem widens integral modes to BITS_PER_WORD. 1424 1.1.1.1.8.2 tls There is no need to emit full 64 bit move on 64 bit targets 1425 1.1.1.1.8.2 tls for integral modes that can be moved using 32 bit move. */ 1426 1.1.1.1.8.2 tls #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ 1427 1.1.1.1.8.2 tls (GET_MODE_BITSIZE (MODE) < 32 && INTEGRAL_MODE_P (MODE) \ 1428 1.1.1.1.8.2 tls ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \ 1429 1.1.1.1.8.2 tls : MODE) 1430 1.1.1.1.8.2 tls 1431 1.1.1.1.8.2 tls /* Return the maximum number of consecutive registers 1432 1.1.1.1.8.2 tls needed to represent mode MODE in a register of class CLASS. */ 1433 1.1.1.1.8.2 tls /* On the 80386, this is the size of MODE in words, 1434 1.1.1.1.8.2 tls except in the FP regs, where a single reg is always enough. */ 1435 1.1.1.1.8.2 tls #define CLASS_MAX_NREGS(CLASS, MODE) \ 1436 1.1.1.1.8.2 tls (!MAYBE_INTEGER_CLASS_P (CLASS) \ 1437 1.1.1.1.8.2 tls ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ 1438 1.1.1.1.8.2 tls : (((((MODE) == XFmode ? 12 : GET_MODE_SIZE (MODE))) \ 1439 1.1.1.1.8.2 tls + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) 1440 1.1.1.1.8.2 tls 1441 1.1.1.1.8.2 tls /* A C expression whose value is nonzero if pseudos that have been 1442 1.1.1.1.8.2 tls assigned to registers of class CLASS would likely be spilled 1443 1.1.1.1.8.2 tls because registers of CLASS are needed for spill registers. 1444 1.1.1.1.8.2 tls 1445 1.1.1.1.8.2 tls The default value of this macro returns 1 if CLASS has exactly one 1446 1.1.1.1.8.2 tls register and zero otherwise. On most machines, this default 1447 1.1.1.1.8.2 tls should be used. Only define this macro to some other expression 1448 1.1.1.1.8.2 tls if pseudo allocated by `local-alloc.c' end up in memory because 1449 1.1.1.1.8.2 tls their hard registers were needed for spill registers. If this 1450 1.1.1.1.8.2 tls macro returns nonzero for those classes, those pseudos will only 1451 1.1.1.1.8.2 tls be allocated by `global.c', which knows how to reallocate the 1452 1.1.1.1.8.2 tls pseudo to another register. If there would not be another 1453 1.1.1.1.8.2 tls register available for reallocation, you should not change the 1454 1.1.1.1.8.2 tls definition of this macro since the only effect of such a 1455 1.1.1.1.8.2 tls definition would be to slow down register allocation. */ 1456 1.1.1.1.8.2 tls 1457 1.1.1.1.8.2 tls #define CLASS_LIKELY_SPILLED_P(CLASS) \ 1458 1.1.1.1.8.2 tls (((CLASS) == AREG) \ 1459 1.1.1.1.8.2 tls || ((CLASS) == DREG) \ 1460 1.1.1.1.8.2 tls || ((CLASS) == CREG) \ 1461 1.1.1.1.8.2 tls || ((CLASS) == BREG) \ 1462 1.1.1.1.8.2 tls || ((CLASS) == AD_REGS) \ 1463 1.1.1.1.8.2 tls || ((CLASS) == SIREG) \ 1464 1.1.1.1.8.2 tls || ((CLASS) == DIREG) \ 1465 1.1.1.1.8.2 tls || ((CLASS) == SSE_FIRST_REG) \ 1466 1.1.1.1.8.2 tls || ((CLASS) == FP_TOP_REG) \ 1467 1.1.1.1.8.2 tls || ((CLASS) == FP_SECOND_REG)) 1468 1.1.1.1.8.2 tls 1469 1.1.1.1.8.2 tls /* Return a class of registers that cannot change FROM mode to TO mode. */ 1470 1.1.1.1.8.2 tls 1471 1.1.1.1.8.2 tls #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 1472 1.1.1.1.8.2 tls ix86_cannot_change_mode_class (FROM, TO, CLASS) 1473 1.1.1.1.8.2 tls 1474 1.1.1.1.8.2 tls /* Stack layout; function entry, exit and calling. */ 1476 1.1.1.1.8.2 tls 1477 1.1.1.1.8.2 tls /* Define this if pushing a word on the stack 1478 1.1.1.1.8.2 tls makes the stack pointer a smaller address. */ 1479 1.1.1.1.8.2 tls #define STACK_GROWS_DOWNWARD 1480 1.1.1.1.8.2 tls 1481 1.1.1.1.8.2 tls /* Define this to nonzero if the nominal address of the stack frame 1482 1.1.1.1.8.2 tls is at the high-address end of the local variables; 1483 1.1.1.1.8.2 tls that is, each additional local variable allocated 1484 1.1.1.1.8.2 tls goes at a more negative offset in the frame. */ 1485 1.1.1.1.8.2 tls #define FRAME_GROWS_DOWNWARD 1 1486 1.1.1.1.8.2 tls 1487 1.1.1.1.8.2 tls /* Offset within stack frame to start allocating local variables at. 1488 1.1.1.1.8.2 tls If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 1489 1.1.1.1.8.2 tls first local allocated. Otherwise, it is the offset to the BEGINNING 1490 1.1.1.1.8.2 tls of the first local allocated. */ 1491 1.1.1.1.8.2 tls #define STARTING_FRAME_OFFSET 0 1492 1.1.1.1.8.2 tls 1493 1.1.1.1.8.2 tls /* If we generate an insn to push BYTES bytes, 1494 1.1.1.1.8.2 tls this says how many the stack pointer really advances by. 1495 1.1.1.1.8.2 tls On 386, we have pushw instruction that decrements by exactly 2 no 1496 1.1.1.1.8.2 tls matter what the position was, there is no pushb. 1497 1.1.1.1.8.2 tls But as CIE data alignment factor on this arch is -4, we need to make 1498 1.1.1.1.8.2 tls sure all stack pointer adjustments are in multiple of 4. 1499 1.1.1.1.8.2 tls 1500 1.1.1.1.8.2 tls For 64bit ABI we round up to 8 bytes. 1501 1.1.1.1.8.2 tls */ 1502 1.1.1.1.8.2 tls 1503 1.1.1.1.8.2 tls #define PUSH_ROUNDING(BYTES) \ 1504 1.1.1.1.8.2 tls (TARGET_64BIT \ 1505 1.1.1.1.8.2 tls ? (((BYTES) + 7) & (-8)) \ 1506 1.1.1.1.8.2 tls : (((BYTES) + 3) & (-4))) 1507 1.1.1.1.8.2 tls 1508 1.1.1.1.8.2 tls /* If defined, the maximum amount of space required for outgoing arguments will 1509 1.1.1.1.8.2 tls be computed and placed into the variable 1510 1.1.1.1.8.2 tls `crtl->outgoing_args_size'. No space will be pushed onto the 1511 1.1.1.1.8.2 tls stack for each call; instead, the function prologue should increase the stack 1512 1.1.1.1.8.2 tls frame size by this amount. 1513 1.1.1.1.8.2 tls 1514 1.1.1.1.8.2 tls MS ABI seem to require 16 byte alignment everywhere except for function 1515 1.1.1.1.8.2 tls prologue and apilogue. This is not possible without 1516 1.1.1.1.8.2 tls ACCUMULATE_OUTGOING_ARGS. */ 1517 1.1.1.1.8.2 tls 1518 1.1.1.1.8.2 tls #define ACCUMULATE_OUTGOING_ARGS \ 1519 1.1.1.1.8.2 tls (TARGET_ACCUMULATE_OUTGOING_ARGS || ix86_cfun_abi () == MS_ABI) 1520 1.1.1.1.8.2 tls 1521 1.1.1.1.8.2 tls /* If defined, a C expression whose value is nonzero when we want to use PUSH 1522 1.1.1.1.8.2 tls instructions to pass outgoing arguments. */ 1523 1.1.1.1.8.2 tls 1524 1.1.1.1.8.2 tls #define PUSH_ARGS (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS) 1525 1.1.1.1.8.2 tls 1526 1.1.1.1.8.2 tls /* We want the stack and args grow in opposite directions, even if 1527 1.1.1.1.8.2 tls PUSH_ARGS is 0. */ 1528 1.1.1.1.8.2 tls #define PUSH_ARGS_REVERSED 1 1529 1.1.1.1.8.2 tls 1530 1.1.1.1.8.2 tls /* Offset of first parameter from the argument pointer register value. */ 1531 1.1.1.1.8.2 tls #define FIRST_PARM_OFFSET(FNDECL) 0 1532 1.1.1.1.8.2 tls 1533 1.1.1.1.8.2 tls /* Define this macro if functions should assume that stack space has been 1534 1.1.1.1.8.2 tls allocated for arguments even when their values are passed in registers. 1535 1.1.1.1.8.2 tls 1536 1.1.1.1.8.2 tls The value of this macro is the size, in bytes, of the area reserved for 1537 1.1.1.1.8.2 tls arguments passed in registers for the function represented by FNDECL. 1538 1.1.1.1.8.2 tls 1539 1.1.1.1.8.2 tls This space can be allocated by the caller, or be a part of the 1540 1.1.1.1.8.2 tls machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says 1541 1.1.1.1.8.2 tls which. */ 1542 1.1.1.1.8.2 tls #define REG_PARM_STACK_SPACE(FNDECL) ix86_reg_parm_stack_space (FNDECL) 1543 1.1.1.1.8.2 tls 1544 1.1.1.1.8.2 tls #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) \ 1545 1.1.1.1.8.2 tls (ix86_function_type_abi (FNTYPE) == MS_ABI) 1546 1.1.1.1.8.2 tls 1547 1.1.1.1.8.2 tls /* Value is the number of bytes of arguments automatically 1548 1.1.1.1.8.2 tls popped when returning from a subroutine call. 1549 1.1.1.1.8.2 tls FUNDECL is the declaration node of the function (as a tree), 1550 1.1.1.1.8.2 tls FUNTYPE is the data type of the function (as a tree), 1551 1.1.1.1.8.2 tls or for a library call it is an identifier node for the subroutine name. 1552 1.1.1.1.8.2 tls SIZE is the number of bytes of arguments passed on the stack. 1553 1.1.1.1.8.2 tls 1554 1.1.1.1.8.2 tls On the 80386, the RTD insn may be used to pop them if the number 1555 1.1.1.1.8.2 tls of args is fixed, but if the number is variable then the caller 1556 1.1.1.1.8.2 tls must pop them all. RTD can't be used for library calls now 1557 1.1.1.1.8.2 tls because the library is compiled with the Unix compiler. 1558 1.1.1.1.8.2 tls Use of RTD is a selectable option, since it is incompatible with 1559 1.1.1.1.8.2 tls standard Unix calling sequences. If the option is not selected, 1560 1.1.1.1.8.2 tls the caller must always pop the args. 1561 1.1.1.1.8.2 tls 1562 1.1.1.1.8.2 tls The attribute stdcall is equivalent to RTD on a per module basis. */ 1563 1.1.1.1.8.2 tls 1564 1.1.1.1.8.2 tls #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) \ 1565 1.1.1.1.8.2 tls ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE)) 1566 1.1.1.1.8.2 tls 1567 1.1.1.1.8.2 tls #define FUNCTION_VALUE_REGNO_P(N) ix86_function_value_regno_p (N) 1568 1.1.1.1.8.2 tls 1569 1.1.1.1.8.2 tls /* Define how to find the value returned by a library function 1570 1.1.1.1.8.2 tls assuming the value has mode MODE. */ 1571 1.1.1.1.8.2 tls 1572 1.1.1.1.8.2 tls #define LIBCALL_VALUE(MODE) ix86_libcall_value (MODE) 1573 1.1.1.1.8.2 tls 1574 1.1.1.1.8.2 tls /* Define the size of the result block used for communication between 1575 1.1.1.1.8.2 tls untyped_call and untyped_return. The block contains a DImode value 1576 1.1.1.1.8.2 tls followed by the block used by fnsave and frstor. */ 1577 1.1.1.1.8.2 tls 1578 1.1.1.1.8.2 tls #define APPLY_RESULT_SIZE (8+108) 1579 1.1.1.1.8.2 tls 1580 1.1.1.1.8.2 tls /* 1 if N is a possible register number for function argument passing. */ 1581 1.1.1.1.8.2 tls #define FUNCTION_ARG_REGNO_P(N) ix86_function_arg_regno_p (N) 1582 1.1.1.1.8.2 tls 1583 1.1.1.1.8.2 tls /* Define a data type for recording info about an argument list 1584 1.1.1.1.8.2 tls during the scan of that argument list. This data type should 1585 1.1.1.1.8.2 tls hold all necessary information about the function itself 1586 1.1.1.1.8.2 tls and about the args processed so far, enough to enable macros 1587 1.1.1.1.8.2 tls such as FUNCTION_ARG to determine where the next arg should go. */ 1588 1.1.1.1.8.2 tls 1589 1.1.1.1.8.2 tls typedef struct ix86_args { 1590 1.1.1.1.8.2 tls int words; /* # words passed so far */ 1591 1.1.1.1.8.2 tls int nregs; /* # registers available for passing */ 1592 1.1.1.1.8.2 tls int regno; /* next available register number */ 1593 1.1.1.1.8.2 tls int fastcall; /* fastcall calling convention is used */ 1594 1.1.1.1.8.2 tls int sse_words; /* # sse words passed so far */ 1595 1.1.1.1.8.2 tls int sse_nregs; /* # sse registers available for passing */ 1596 1.1.1.1.8.2 tls int warn_avx; /* True when we want to warn about AVX ABI. */ 1597 1.1.1.1.8.2 tls int warn_sse; /* True when we want to warn about SSE ABI. */ 1598 1.1.1.1.8.2 tls int warn_mmx; /* True when we want to warn about MMX ABI. */ 1599 1.1.1.1.8.2 tls int sse_regno; /* next available sse register number */ 1600 1.1.1.1.8.2 tls int mmx_words; /* # mmx words passed so far */ 1601 1.1.1.1.8.2 tls int mmx_nregs; /* # mmx registers available for passing */ 1602 1.1.1.1.8.2 tls int mmx_regno; /* next available mmx register number */ 1603 1.1.1.1.8.2 tls int maybe_vaarg; /* true for calls to possibly vardic fncts. */ 1604 1.1.1.1.8.2 tls int float_in_sse; /* 1 if in 32-bit mode SFmode (2 for DFmode) should 1605 1.1.1.1.8.2 tls be passed in SSE registers. Otherwise 0. */ 1606 1.1.1.1.8.2 tls enum calling_abi call_abi; /* Set to SYSV_ABI for sysv abi. Otherwise 1607 1.1.1.1.8.2 tls MS_ABI for ms abi. */ 1608 1.1.1.1.8.2 tls } CUMULATIVE_ARGS; 1609 1.1.1.1.8.2 tls 1610 1.1.1.1.8.2 tls /* Initialize a variable CUM of type CUMULATIVE_ARGS 1611 1.1.1.1.8.2 tls for a call to a function whose data type is FNTYPE. 1612 1.1.1.1.8.2 tls For a library call, FNTYPE is 0. */ 1613 1.1.1.1.8.2 tls 1614 1.1.1.1.8.2 tls #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1615 1.1.1.1.8.2 tls init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL)) 1616 1.1.1.1.8.2 tls 1617 1.1.1.1.8.2 tls /* Update the data in CUM to advance over an argument 1618 1.1.1.1.8.2 tls of mode MODE and data type TYPE. 1619 1.1.1.1.8.2 tls (TYPE is null for libcalls where that information may not be available.) */ 1620 1.1.1.1.8.2 tls 1621 1.1.1.1.8.2 tls #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1622 1.1.1.1.8.2 tls function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED)) 1623 1.1.1.1.8.2 tls 1624 1.1.1.1.8.2 tls /* Define where to put the arguments to a function. 1625 1.1.1.1.8.2 tls Value is zero to push the argument on the stack, 1626 1.1.1.1.8.2 tls or a hard register in which to store the argument. 1627 1.1.1.1.8.2 tls 1628 1.1.1.1.8.2 tls MODE is the argument's machine mode. 1629 1.1.1.1.8.2 tls TYPE is the data type of the argument (as a tree). 1630 1.1.1.1.8.2 tls This is null for libcalls where that information may 1631 1.1.1.1.8.2 tls not be available. 1632 1.1.1.1.8.2 tls CUM is a variable of type CUMULATIVE_ARGS which gives info about 1633 1.1.1.1.8.2 tls the preceding args and about the function being called. 1634 1.1.1.1.8.2 tls NAMED is nonzero if this argument is a named parameter 1635 1.1.1.1.8.2 tls (otherwise it is an extra parameter matching an ellipsis). */ 1636 1.1.1.1.8.2 tls 1637 1.1.1.1.8.2 tls #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1638 1.1.1.1.8.2 tls function_arg (&(CUM), (MODE), (TYPE), (NAMED)) 1639 1.1.1.1.8.2 tls 1640 1.1.1.1.8.2 tls /* Output assembler code to FILE to increment profiler label # LABELNO 1641 1.1.1.1.8.2 tls for profiling a function entry. */ 1642 1.1.1.1.8.2 tls 1643 1.1.1.1.8.2 tls #define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO) 1644 1.1.1.1.8.2 tls 1645 1.1.1.1.8.2 tls #define MCOUNT_NAME "_mcount" 1646 1.1.1.1.8.2 tls 1647 1.1.1.1.8.2 tls #define PROFILE_COUNT_REGISTER "edx" 1648 1.1.1.1.8.2 tls 1649 1.1.1.1.8.2 tls /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 1650 1.1.1.1.8.2 tls the stack pointer does not matter. The value is tested only in 1651 1.1.1.1.8.2 tls functions that have frame pointers. 1652 1.1.1.1.8.2 tls No definition is equivalent to always zero. */ 1653 1.1.1.1.8.2 tls /* Note on the 386 it might be more efficient not to define this since 1654 1.1.1.1.8.2 tls we have to restore it ourselves from the frame pointer, in order to 1655 1.1.1.1.8.2 tls use pop */ 1656 1.1.1.1.8.2 tls 1657 1.1.1.1.8.2 tls #define EXIT_IGNORE_STACK 1 1658 1.1.1.1.8.2 tls 1659 1.1.1.1.8.2 tls /* Output assembler code for a block containing the constant parts 1660 1.1.1.1.8.2 tls of a trampoline, leaving space for the variable parts. */ 1661 1.1.1.1.8.2 tls 1662 1.1.1.1.8.2 tls /* On the 386, the trampoline contains two instructions: 1663 1.1.1.1.8.2 tls mov #STATIC,ecx 1664 1.1.1.1.8.2 tls jmp FUNCTION 1665 1.1.1.1.8.2 tls The trampoline is generated entirely at runtime. The operand of JMP 1666 1.1.1.1.8.2 tls is the address of FUNCTION relative to the instruction following the 1667 1.1.1.1.8.2 tls JMP (which is 5 bytes long). */ 1668 1.1.1.1.8.2 tls 1669 1.1.1.1.8.2 tls /* Length in units of the trampoline for entering a nested function. */ 1670 1.1.1.1.8.2 tls 1671 1.1.1.1.8.2 tls #define TRAMPOLINE_SIZE (TARGET_64BIT ? 24 : 10) 1672 1.1.1.1.8.2 tls 1673 1.1.1.1.8.2 tls /* Definitions for register eliminations. 1675 1.1.1.1.8.2 tls 1676 1.1.1.1.8.2 tls This is an array of structures. Each structure initializes one pair 1677 1.1.1.1.8.2 tls of eliminable registers. The "from" register number is given first, 1678 1.1.1.1.8.2 tls followed by "to". Eliminations of the same "from" register are listed 1679 1.1.1.1.8.2 tls in order of preference. 1680 1.1.1.1.8.2 tls 1681 1.1.1.1.8.2 tls There are two registers that can always be eliminated on the i386. 1682 1.1.1.1.8.2 tls The frame pointer and the arg pointer can be replaced by either the 1683 1.1.1.1.8.2 tls hard frame pointer or to the stack pointer, depending upon the 1684 1.1.1.1.8.2 tls circumstances. The hard frame pointer is not used before reload and 1685 1.1.1.1.8.2 tls so it is not eligible for elimination. */ 1686 1.1.1.1.8.2 tls 1687 1.1.1.1.8.2 tls #define ELIMINABLE_REGS \ 1688 1.1.1.1.8.2 tls {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1689 1.1.1.1.8.2 tls { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 1690 1.1.1.1.8.2 tls { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1691 1.1.1.1.8.2 tls { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} \ 1692 1.1.1.1.8.2 tls 1693 1.1.1.1.8.2 tls /* Define the offset between two registers, one to be eliminated, and the other 1694 1.1.1.1.8.2 tls its replacement, at the start of a routine. */ 1695 1.1.1.1.8.2 tls 1696 1.1.1.1.8.2 tls #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1697 1.1.1.1.8.2 tls ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO))) 1698 1.1.1.1.8.2 tls 1699 1.1.1.1.8.2 tls /* Addressing modes, and classification of registers for them. */ 1701 1.1.1.1.8.2 tls 1702 1.1.1.1.8.2 tls /* Macros to check register numbers against specific register classes. */ 1703 1.1.1.1.8.2 tls 1704 1.1.1.1.8.2 tls /* These assume that REGNO is a hard or pseudo reg number. 1705 1.1.1.1.8.2 tls They give nonzero only if REGNO is a hard reg of the suitable class 1706 1.1.1.1.8.2 tls or a pseudo reg currently allocated to a suitable hard reg. 1707 1.1.1.1.8.2 tls Since they use reg_renumber, they are safe only once reg_renumber 1708 1.1.1.1.8.2 tls has been allocated, which happens in local-alloc.c. */ 1709 1.1.1.1.8.2 tls 1710 1.1.1.1.8.2 tls #define REGNO_OK_FOR_INDEX_P(REGNO) \ 1711 1.1.1.1.8.2 tls ((REGNO) < STACK_POINTER_REGNUM \ 1712 1.1.1.1.8.2 tls || REX_INT_REGNO_P (REGNO) \ 1713 1.1.1.1.8.2 tls || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM \ 1714 1.1.1.1.8.2 tls || REX_INT_REGNO_P ((unsigned) reg_renumber[(REGNO)])) 1715 1.1.1.1.8.2 tls 1716 1.1.1.1.8.2 tls #define REGNO_OK_FOR_BASE_P(REGNO) \ 1717 1.1.1.1.8.2 tls (GENERAL_REGNO_P (REGNO) \ 1718 1.1.1.1.8.2 tls || (REGNO) == ARG_POINTER_REGNUM \ 1719 1.1.1.1.8.2 tls || (REGNO) == FRAME_POINTER_REGNUM \ 1720 1.1.1.1.8.2 tls || GENERAL_REGNO_P ((unsigned) reg_renumber[(REGNO)])) 1721 1.1.1.1.8.2 tls 1722 1.1.1.1.8.2 tls /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 1723 1.1.1.1.8.2 tls and check its validity for a certain class. 1724 1.1.1.1.8.2 tls We have two alternate definitions for each of them. 1725 1.1.1.1.8.2 tls The usual definition accepts all pseudo regs; the other rejects 1726 1.1.1.1.8.2 tls them unless they have been allocated suitable hard regs. 1727 1.1.1.1.8.2 tls The symbol REG_OK_STRICT causes the latter definition to be used. 1728 1.1.1.1.8.2 tls 1729 1.1.1.1.8.2 tls Most source files want to accept pseudo regs in the hope that 1730 1.1.1.1.8.2 tls they will get allocated to the class that the insn wants them to be in. 1731 1.1.1.1.8.2 tls Source files for reload pass need to be strict. 1732 1.1.1.1.8.2 tls After reload, it makes no difference, since pseudo regs have 1733 1.1.1.1.8.2 tls been eliminated by then. */ 1734 1.1.1.1.8.2 tls 1735 1.1.1.1.8.2 tls 1736 1.1.1.1.8.2 tls /* Non strict versions, pseudos are ok. */ 1737 1.1.1.1.8.2 tls #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \ 1738 1.1.1.1.8.2 tls (REGNO (X) < STACK_POINTER_REGNUM \ 1739 1.1.1.1.8.2 tls || REX_INT_REGNO_P (REGNO (X)) \ 1740 1.1.1.1.8.2 tls || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1741 1.1.1.1.8.2 tls 1742 1.1.1.1.8.2 tls #define REG_OK_FOR_BASE_NONSTRICT_P(X) \ 1743 1.1.1.1.8.2 tls (GENERAL_REGNO_P (REGNO (X)) \ 1744 1.1.1.1.8.2 tls || REGNO (X) == ARG_POINTER_REGNUM \ 1745 1.1.1.1.8.2 tls || REGNO (X) == FRAME_POINTER_REGNUM \ 1746 1.1.1.1.8.2 tls || REGNO (X) >= FIRST_PSEUDO_REGISTER) 1747 1.1.1.1.8.2 tls 1748 1.1.1.1.8.2 tls /* Strict versions, hard registers only */ 1749 1.1.1.1.8.2 tls #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 1750 1.1.1.1.8.2 tls #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 1751 1.1.1.1.8.2 tls 1752 1.1.1.1.8.2 tls #ifndef REG_OK_STRICT 1753 1.1.1.1.8.2 tls #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X) 1754 1.1.1.1.8.2 tls #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X) 1755 1.1.1.1.8.2 tls 1756 1.1.1.1.8.2 tls #else 1757 1.1.1.1.8.2 tls #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X) 1758 1.1.1.1.8.2 tls #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X) 1759 1.1.1.1.8.2 tls #endif 1760 1.1.1.1.8.2 tls 1761 1.1.1.1.8.2 tls /* TARGET_LEGITIMATE_ADDRESS_P recognizes an RTL expression 1762 1.1.1.1.8.2 tls that is a valid memory address for an instruction. 1763 1.1.1.1.8.2 tls The MODE argument is the machine mode for the MEM expression 1764 1.1.1.1.8.2 tls that wants to use this address. 1765 1.1.1.1.8.2 tls 1766 1.1.1.1.8.2 tls The other macros defined here are used only in TARGET_LEGITIMATE_ADDRESS_P, 1767 1.1.1.1.8.2 tls except for CONSTANT_ADDRESS_P which is usually machine-independent. 1768 1.1.1.1.8.2 tls 1769 1.1.1.1.8.2 tls See legitimize_pic_address in i386.c for details as to what 1770 1.1.1.1.8.2 tls constitutes a legitimate address when -fpic is used. */ 1771 1.1.1.1.8.2 tls 1772 1.1.1.1.8.2 tls #define MAX_REGS_PER_ADDRESS 2 1773 1.1.1.1.8.2 tls 1774 1.1.1.1.8.2 tls #define CONSTANT_ADDRESS_P(X) constant_address_p (X) 1775 1.1.1.1.8.2 tls 1776 1.1.1.1.8.2 tls /* Nonzero if the constant value X is a legitimate general operand. 1777 1.1.1.1.8.2 tls It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1778 1.1.1.1.8.2 tls 1779 1.1.1.1.8.2 tls #define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) 1780 1.1.1.1.8.2 tls 1781 1.1.1.1.8.2 tls /* Try a machine-dependent way of reloading an illegitimate address 1782 1.1.1.1.8.2 tls operand. If we find one, push the reload and jump to WIN. This 1783 1.1.1.1.8.2 tls macro is used in only one place: `find_reloads_address' in reload.c. */ 1784 1.1.1.1.8.2 tls 1785 1.1.1.1.8.2 tls #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, INDL, WIN) \ 1786 1.1.1.1.8.2 tls do { \ 1787 1.1.1.1.8.2 tls if (ix86_legitimize_reload_address ((X), (MODE), (OPNUM), \ 1788 1.1.1.1.8.2 tls (int)(TYPE), (INDL))) \ 1789 1.1.1.1.8.2 tls goto WIN; \ 1790 1.1.1.1.8.2 tls } while (0) 1791 1.1.1.1.8.2 tls 1792 1.1.1.1.8.2 tls /* If defined, a C expression to determine the base term of address X. 1793 1.1.1.1.8.2 tls This macro is used in only one place: `find_base_term' in alias.c. 1794 1.1.1.1.8.2 tls 1795 1.1.1.1.8.2 tls It is always safe for this macro to not be defined. It exists so 1796 1.1.1.1.8.2 tls that alias analysis can understand machine-dependent addresses. 1797 1.1.1.1.8.2 tls 1798 1.1.1.1.8.2 tls The typical use of this macro is to handle addresses containing 1799 1.1.1.1.8.2 tls a label_ref or symbol_ref within an UNSPEC. */ 1800 1.1.1.1.8.2 tls 1801 1.1.1.1.8.2 tls #define FIND_BASE_TERM(X) ix86_find_base_term (X) 1802 1.1.1.1.8.2 tls 1803 1.1.1.1.8.2 tls /* Nonzero if the constant value X is a legitimate general operand 1804 1.1.1.1.8.2 tls when generating PIC code. It is given that flag_pic is on and 1805 1.1.1.1.8.2 tls that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 1806 1.1.1.1.8.2 tls 1807 1.1.1.1.8.2 tls #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) 1808 1.1.1.1.8.2 tls 1809 1.1.1.1.8.2 tls #define SYMBOLIC_CONST(X) \ 1810 1.1.1.1.8.2 tls (GET_CODE (X) == SYMBOL_REF \ 1811 1.1.1.1.8.2 tls || GET_CODE (X) == LABEL_REF \ 1812 1.1.1.1.8.2 tls || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) 1813 1.1.1.1.8.2 tls 1814 1.1.1.1.8.2 tls /* Max number of args passed in registers. If this is more than 3, we will 1816 1.1.1.1.8.2 tls have problems with ebx (register #4), since it is a caller save register and 1817 1.1.1.1.8.2 tls is also used as the pic register in ELF. So for now, don't allow more than 1818 1.1.1.1.8.2 tls 3 registers to be passed in registers. */ 1819 1.1.1.1.8.2 tls 1820 1.1.1.1.8.2 tls /* Abi specific values for REGPARM_MAX and SSE_REGPARM_MAX */ 1821 1.1.1.1.8.2 tls #define X86_64_REGPARM_MAX 6 1822 1.1.1.1.8.2 tls #define X86_64_MS_REGPARM_MAX 4 1823 1.1.1.1.8.2 tls 1824 1.1.1.1.8.2 tls #define X86_32_REGPARM_MAX 3 1825 1.1.1.1.8.2 tls 1826 1.1.1.1.8.2 tls #define REGPARM_MAX \ 1827 1.1.1.1.8.2 tls (TARGET_64BIT ? (TARGET_64BIT_MS_ABI ? X86_64_MS_REGPARM_MAX \ 1828 1.1.1.1.8.2 tls : X86_64_REGPARM_MAX) \ 1829 1.1.1.1.8.2 tls : X86_32_REGPARM_MAX) 1830 1.1.1.1.8.2 tls 1831 1.1.1.1.8.2 tls #define X86_64_SSE_REGPARM_MAX 8 1832 1.1.1.1.8.2 tls #define X86_64_MS_SSE_REGPARM_MAX 4 1833 1.1.1.1.8.2 tls 1834 1.1.1.1.8.2 tls #define X86_32_SSE_REGPARM_MAX (TARGET_SSE ? (TARGET_MACHO ? 4 : 3) : 0) 1835 1.1.1.1.8.2 tls 1836 1.1.1.1.8.2 tls #define SSE_REGPARM_MAX \ 1837 1.1.1.1.8.2 tls (TARGET_64BIT ? (TARGET_64BIT_MS_ABI ? X86_64_MS_SSE_REGPARM_MAX \ 1838 1.1.1.1.8.2 tls : X86_64_SSE_REGPARM_MAX) \ 1839 1.1.1.1.8.2 tls : X86_32_SSE_REGPARM_MAX) 1840 1.1.1.1.8.2 tls 1841 1.1.1.1.8.2 tls #define MMX_REGPARM_MAX (TARGET_64BIT ? 0 : (TARGET_MMX ? 3 : 0)) 1842 1.1.1.1.8.2 tls 1843 1.1.1.1.8.2 tls 1844 1.1.1.1.8.2 tls /* Specify the machine mode that this machine uses 1846 1.1.1.1.8.2 tls for the index in the tablejump instruction. */ 1847 1.1.1.1.8.2 tls #define CASE_VECTOR_MODE \ 1848 1.1.1.1.8.2 tls (!TARGET_64BIT || (flag_pic && ix86_cmodel != CM_LARGE_PIC) ? SImode : DImode) 1849 1.1.1.1.8.2 tls 1850 1.1.1.1.8.2 tls /* Define this as 1 if `char' should by default be signed; else as 0. */ 1851 1.1.1.1.8.2 tls #define DEFAULT_SIGNED_CHAR 1 1852 1.1.1.1.8.2 tls 1853 1.1.1.1.8.2 tls /* Max number of bytes we can move from memory to memory 1854 1.1.1.1.8.2 tls in one reasonably fast instruction. */ 1855 1.1.1.1.8.2 tls #define MOVE_MAX 16 1856 1.1.1.1.8.2 tls 1857 1.1.1.1.8.2 tls /* MOVE_MAX_PIECES is the number of bytes at a time which we can 1858 1.1.1.1.8.2 tls move efficiently, as opposed to MOVE_MAX which is the maximum 1859 1.1.1.1.8.2 tls number of bytes we can move with a single instruction. */ 1860 1.1.1.1.8.2 tls #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4) 1861 1.1.1.1.8.2 tls 1862 1.1.1.1.8.2 tls /* If a memory-to-memory move would take MOVE_RATIO or more simple 1863 1.1.1.1.8.2 tls move-instruction pairs, we will do a movmem or libcall instead. 1864 1.1.1.1.8.2 tls Increasing the value will always make code faster, but eventually 1865 1.1.1.1.8.2 tls incurs high cost in increased code size. 1866 1.1.1.1.8.2 tls 1867 1.1.1.1.8.2 tls If you don't define this, a reasonable default is used. */ 1868 1.1.1.1.8.2 tls 1869 1.1.1.1.8.2 tls #define MOVE_RATIO(speed) ((speed) ? ix86_cost->move_ratio : 3) 1870 1.1.1.1.8.2 tls 1871 1.1.1.1.8.2 tls /* If a clear memory operation would take CLEAR_RATIO or more simple 1872 1.1.1.1.8.2 tls move-instruction sequences, we will do a clrmem or libcall instead. */ 1873 1.1.1.1.8.2 tls 1874 1.1.1.1.8.2 tls #define CLEAR_RATIO(speed) ((speed) ? MIN (6, ix86_cost->move_ratio) : 2) 1875 1.1.1.1.8.2 tls 1876 1.1.1.1.8.2 tls /* Define if shifts truncate the shift count 1877 1.1.1.1.8.2 tls which implies one can omit a sign-extension or zero-extension 1878 1.1.1.1.8.2 tls of a shift count. */ 1879 1.1.1.1.8.2 tls /* On i386, shifts do truncate the count. But bit opcodes don't. */ 1880 1.1.1.1.8.2 tls 1881 1.1.1.1.8.2 tls /* #define SHIFT_COUNT_TRUNCATED */ 1882 1.1.1.1.8.2 tls 1883 1.1.1.1.8.2 tls /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1884 1.1.1.1.8.2 tls is done just by pretending it is already truncated. */ 1885 1.1.1.1.8.2 tls #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1886 1.1.1.1.8.2 tls 1887 1.1.1.1.8.2 tls /* A macro to update M and UNSIGNEDP when an object whose type is 1888 1.1.1.1.8.2 tls TYPE and which has the specified mode and signedness is to be 1889 1.1.1.1.8.2 tls stored in a register. This macro is only called when TYPE is a 1890 1.1.1.1.8.2 tls scalar type. 1891 1.1.1.1.8.2 tls 1892 1.1.1.1.8.2 tls On i386 it is sometimes useful to promote HImode and QImode 1893 1.1.1.1.8.2 tls quantities to SImode. The choice depends on target type. */ 1894 1.1.1.1.8.2 tls 1895 1.1.1.1.8.2 tls #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 1896 1.1.1.1.8.2 tls do { \ 1897 1.1.1.1.8.2 tls if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS) \ 1898 1.1.1.1.8.2 tls || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS)) \ 1899 1.1.1.1.8.2 tls (MODE) = SImode; \ 1900 1.1.1.1.8.2 tls } while (0) 1901 1.1.1.1.8.2 tls 1902 1.1.1.1.8.2 tls /* Specify the machine mode that pointers have. 1903 1.1.1.1.8.2 tls After generation of rtl, the compiler makes no further distinction 1904 1.1.1.1.8.2 tls between pointers and any other objects of this machine mode. */ 1905 1.1.1.1.8.2 tls #define Pmode (TARGET_64BIT ? DImode : SImode) 1906 1.1.1.1.8.2 tls 1907 1.1.1.1.8.2 tls /* A function address in a call instruction 1908 1.1.1.1.8.2 tls is a byte address (for indexing purposes) 1909 1.1.1.1.8.2 tls so give the MEM rtx a byte's mode. */ 1910 1.1.1.1.8.2 tls #define FUNCTION_MODE QImode 1911 1.1.1.1.8.2 tls 1912 1.1.1.1.8.2 tls /* A C expression for the cost of moving data from a register in class FROM to 1914 1.1.1.1.8.2 tls one in class TO. The classes are expressed using the enumeration values 1915 1.1.1.1.8.2 tls such as `GENERAL_REGS'. A value of 2 is the default; other values are 1916 1.1.1.1.8.2 tls interpreted relative to that. 1917 1.1.1.1.8.2 tls 1918 1.1.1.1.8.2 tls It is not required that the cost always equal 2 when FROM is the same as TO; 1919 1.1.1.1.8.2 tls on some machines it is expensive to move between registers if they are not 1920 1.1.1.1.8.2 tls general registers. */ 1921 1.1.1.1.8.2 tls 1922 1.1.1.1.8.2 tls #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 1923 1.1.1.1.8.2 tls ix86_register_move_cost ((MODE), (CLASS1), (CLASS2)) 1924 1.1.1.1.8.2 tls 1925 1.1.1.1.8.2 tls /* A C expression for the cost of moving data of mode M between a 1926 1.1.1.1.8.2 tls register and memory. A value of 2 is the default; this cost is 1927 1.1.1.1.8.2 tls relative to those in `REGISTER_MOVE_COST'. 1928 1.1.1.1.8.2 tls 1929 1.1.1.1.8.2 tls If moving between registers and memory is more expensive than 1930 1.1.1.1.8.2 tls between two registers, you should define this macro to express the 1931 1.1.1.1.8.2 tls relative cost. */ 1932 1.1.1.1.8.2 tls 1933 1.1.1.1.8.2 tls #define MEMORY_MOVE_COST(MODE, CLASS, IN) \ 1934 1.1.1.1.8.2 tls ix86_memory_move_cost ((MODE), (CLASS), (IN)) 1935 1.1.1.1.8.2 tls 1936 1.1.1.1.8.2 tls /* A C expression for the cost of a branch instruction. A value of 1 1937 1.1.1.1.8.2 tls is the default; other values are interpreted relative to that. */ 1938 1.1.1.1.8.2 tls 1939 1.1.1.1.8.2 tls #define BRANCH_COST(speed_p, predictable_p) \ 1940 1.1.1.1.8.2 tls (!(speed_p) ? 2 : (predictable_p) ? 0 : ix86_branch_cost) 1941 1.1.1.1.8.2 tls 1942 1.1.1.1.8.2 tls /* Define this macro as a C expression which is nonzero if accessing 1943 1.1.1.1.8.2 tls less than a word of memory (i.e. a `char' or a `short') is no 1944 1.1.1.1.8.2 tls faster than accessing a word of memory, i.e., if such access 1945 1.1.1.1.8.2 tls require more than one instruction or if there is no difference in 1946 1.1.1.1.8.2 tls cost between byte and (aligned) word loads. 1947 1.1.1.1.8.2 tls 1948 1.1.1.1.8.2 tls When this macro is not defined, the compiler will access a field by 1949 1.1.1.1.8.2 tls finding the smallest containing object; when it is defined, a 1950 1.1.1.1.8.2 tls fullword load will be used if alignment permits. Unless bytes 1951 1.1.1.1.8.2 tls accesses are faster than word accesses, using word accesses is 1952 1.1.1.1.8.2 tls preferable since it may eliminate subsequent memory access if 1953 1.1.1.1.8.2 tls subsequent accesses occur to other fields in the same word of the 1954 1.1.1.1.8.2 tls structure, but to different bytes. */ 1955 1.1.1.1.8.2 tls 1956 1.1.1.1.8.2 tls #define SLOW_BYTE_ACCESS 0 1957 1.1.1.1.8.2 tls 1958 1.1.1.1.8.2 tls /* Nonzero if access to memory by shorts is slow and undesirable. */ 1959 1.1.1.1.8.2 tls #define SLOW_SHORT_ACCESS 0 1960 1.1.1.1.8.2 tls 1961 1.1.1.1.8.2 tls /* Define this macro to be the value 1 if unaligned accesses have a 1962 1.1.1.1.8.2 tls cost many times greater than aligned accesses, for example if they 1963 1.1.1.1.8.2 tls are emulated in a trap handler. 1964 1.1.1.1.8.2 tls 1965 1.1.1.1.8.2 tls When this macro is nonzero, the compiler will act as if 1966 1.1.1.1.8.2 tls `STRICT_ALIGNMENT' were nonzero when generating code for block 1967 1.1.1.1.8.2 tls moves. This can cause significantly more instructions to be 1968 1.1.1.1.8.2 tls produced. Therefore, do not set this macro nonzero if unaligned 1969 1.1.1.1.8.2 tls accesses only add a cycle or two to the time for a memory access. 1970 1.1.1.1.8.2 tls 1971 1.1.1.1.8.2 tls If the value of this macro is always zero, it need not be defined. */ 1972 1.1.1.1.8.2 tls 1973 1.1.1.1.8.2 tls /* #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 0 */ 1974 1.1.1.1.8.2 tls 1975 1.1.1.1.8.2 tls /* Define this macro if it is as good or better to call a constant 1976 1.1.1.1.8.2 tls function address than to call an address kept in a register. 1977 1.1.1.1.8.2 tls 1978 1.1.1.1.8.2 tls Desirable on the 386 because a CALL with a constant address is 1979 1.1.1.1.8.2 tls faster than one with a register address. */ 1980 1.1.1.1.8.2 tls 1981 1.1.1.1.8.2 tls #define NO_FUNCTION_CSE 1982 1.1.1.1.8.2 tls 1983 1.1.1.1.8.2 tls /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, 1985 1.1.1.1.8.2 tls return the mode to be used for the comparison. 1986 1.1.1.1.8.2 tls 1987 1.1.1.1.8.2 tls For floating-point equality comparisons, CCFPEQmode should be used. 1988 1.1.1.1.8.2 tls VOIDmode should be used in all other cases. 1989 1.1.1.1.8.2 tls 1990 1.1.1.1.8.2 tls For integer comparisons against zero, reduce to CCNOmode or CCZmode if 1991 1.1.1.1.8.2 tls possible, to allow for more combinations. */ 1992 1.1.1.1.8.2 tls 1993 1.1.1.1.8.2 tls #define SELECT_CC_MODE(OP, X, Y) ix86_cc_mode ((OP), (X), (Y)) 1994 1.1.1.1.8.2 tls 1995 1.1.1.1.8.2 tls /* Return nonzero if MODE implies a floating point inequality can be 1996 1.1.1.1.8.2 tls reversed. */ 1997 1.1.1.1.8.2 tls 1998 1.1.1.1.8.2 tls #define REVERSIBLE_CC_MODE(MODE) 1 1999 1.1.1.1.8.2 tls 2000 1.1.1.1.8.2 tls /* A C expression whose value is reversed condition code of the CODE for 2001 1.1.1.1.8.2 tls comparison done in CC_MODE mode. */ 2002 1.1.1.1.8.2 tls #define REVERSE_CONDITION(CODE, MODE) ix86_reverse_condition ((CODE), (MODE)) 2003 1.1.1.1.8.2 tls 2004 1.1.1.1.8.2 tls 2005 1.1.1.1.8.2 tls /* Control the assembler format that we output, to the extent 2007 1.1.1.1.8.2 tls this does not vary between assemblers. */ 2008 1.1.1.1.8.2 tls 2009 1.1.1.1.8.2 tls /* How to refer to registers in assembler output. 2010 1.1.1.1.8.2 tls This sequence is indexed by compiler's hard-register-number (see above). */ 2011 1.1.1.1.8.2 tls 2012 1.1.1.1.8.2 tls /* In order to refer to the first 8 regs as 32-bit regs, prefix an "e". 2013 1.1.1.1.8.2 tls For non floating point regs, the following are the HImode names. 2014 1.1.1.1.8.2 tls 2015 1.1.1.1.8.2 tls For float regs, the stack top is sometimes referred to as "%st(0)" 2016 1.1.1.1.8.2 tls instead of just "%st". PRINT_OPERAND handles this with the "y" code. */ 2017 1.1.1.1.8.2 tls 2018 1.1.1.1.8.2 tls #define HI_REGISTER_NAMES \ 2019 1.1.1.1.8.2 tls {"ax","dx","cx","bx","si","di","bp","sp", \ 2020 1.1.1.1.8.2 tls "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)", \ 2021 1.1.1.1.8.2 tls "argp", "flags", "fpsr", "fpcr", "frame", \ 2022 1.1.1.1.8.2 tls "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7", \ 2023 1.1.1.1.8.2 tls "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7", \ 2024 1.1.1.1.8.2 tls "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ 2025 1.1.1.1.8.2 tls "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"} 2026 1.1.1.1.8.2 tls 2027 1.1.1.1.8.2 tls #define REGISTER_NAMES HI_REGISTER_NAMES 2028 1.1.1.1.8.2 tls 2029 1.1.1.1.8.2 tls /* Table of additional register names to use in user input. */ 2030 1.1.1.1.8.2 tls 2031 1.1.1.1.8.2 tls #define ADDITIONAL_REGISTER_NAMES \ 2032 1.1.1.1.8.2 tls { { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \ 2033 1.1.1.1.8.2 tls { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \ 2034 1.1.1.1.8.2 tls { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \ 2035 1.1.1.1.8.2 tls { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \ 2036 1.1.1.1.8.2 tls { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \ 2037 1.1.1.1.8.2 tls { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } } 2038 1.1.1.1.8.2 tls 2039 1.1.1.1.8.2 tls /* Note we are omitting these since currently I don't know how 2040 1.1.1.1.8.2 tls to get gcc to use these, since they want the same but different 2041 1.1.1.1.8.2 tls number as al, and ax. 2042 1.1.1.1.8.2 tls */ 2043 1.1.1.1.8.2 tls 2044 1.1.1.1.8.2 tls #define QI_REGISTER_NAMES \ 2045 1.1.1.1.8.2 tls {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",} 2046 1.1.1.1.8.2 tls 2047 1.1.1.1.8.2 tls /* These parallel the array above, and can be used to access bits 8:15 2048 1.1.1.1.8.2 tls of regs 0 through 3. */ 2049 1.1.1.1.8.2 tls 2050 1.1.1.1.8.2 tls #define QI_HIGH_REGISTER_NAMES \ 2051 1.1.1.1.8.2 tls {"ah", "dh", "ch", "bh", } 2052 1.1.1.1.8.2 tls 2053 1.1.1.1.8.2 tls /* How to renumber registers for dbx and gdb. */ 2054 1.1.1.1.8.2 tls 2055 1.1.1.1.8.2 tls #define DBX_REGISTER_NUMBER(N) \ 2056 1.1.1.1.8.2 tls (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)]) 2057 1.1.1.1.8.2 tls 2058 1.1.1.1.8.2 tls extern int const dbx_register_map[FIRST_PSEUDO_REGISTER]; 2059 1.1.1.1.8.2 tls extern int const dbx64_register_map[FIRST_PSEUDO_REGISTER]; 2060 1.1.1.1.8.2 tls extern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]; 2061 1.1.1.1.8.2 tls 2062 1.1.1.1.8.2 tls /* Before the prologue, RA is at 0(%esp). */ 2063 1.1.1.1.8.2 tls #define INCOMING_RETURN_ADDR_RTX \ 2064 1.1.1.1.8.2 tls gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) 2065 1.1.1.1.8.2 tls 2066 1.1.1.1.8.2 tls /* After the prologue, RA is at -4(AP) in the current frame. */ 2067 1.1.1.1.8.2 tls #define RETURN_ADDR_RTX(COUNT, FRAME) \ 2068 1.1.1.1.8.2 tls ((COUNT) == 0 \ 2069 1.1.1.1.8.2 tls ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -UNITS_PER_WORD)) \ 2070 1.1.1.1.8.2 tls : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD))) 2071 1.1.1.1.8.2 tls 2072 1.1.1.1.8.2 tls /* PC is dbx register 8; let's use that column for RA. */ 2073 1.1.1.1.8.2 tls #define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8) 2074 1.1.1.1.8.2 tls 2075 1.1.1.1.8.2 tls /* Before the prologue, the top of the frame is at 4(%esp). */ 2076 1.1.1.1.8.2 tls #define INCOMING_FRAME_SP_OFFSET UNITS_PER_WORD 2077 1.1.1.1.8.2 tls 2078 1.1.1.1.8.2 tls /* Describe how we implement __builtin_eh_return. */ 2079 1.1.1.1.8.2 tls #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM) 2080 1.1.1.1.8.2 tls #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 2) 2081 1.1.1.1.8.2 tls 2082 1.1.1.1.8.2 tls 2083 1.1.1.1.8.2 tls /* Select a format to encode pointers in exception handling data. CODE 2084 1.1.1.1.8.2 tls is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is 2085 1.1.1.1.8.2 tls true if the symbol may be affected by dynamic relocations. 2086 1.1.1.1.8.2 tls 2087 1.1.1.1.8.2 tls ??? All x86 object file formats are capable of representing this. 2088 1.1.1.1.8.2 tls After all, the relocation needed is the same as for the call insn. 2089 1.1.1.1.8.2 tls Whether or not a particular assembler allows us to enter such, I 2090 1.1.1.1.8.2 tls guess we'll have to see. */ 2091 1.1.1.1.8.2 tls #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ 2092 1.1.1.1.8.2 tls asm_preferred_eh_data_format ((CODE), (GLOBAL)) 2093 1.1.1.1.8.2 tls 2094 1.1.1.1.8.2 tls /* This is how to output an insn to push a register on the stack. 2095 1.1.1.1.8.2 tls It need not be very fast code. */ 2096 1.1.1.1.8.2 tls 2097 1.1.1.1.8.2 tls #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 2098 1.1.1.1.8.2 tls do { \ 2099 1.1.1.1.8.2 tls if (TARGET_64BIT) \ 2100 1.1.1.1.8.2 tls asm_fprintf ((FILE), "\tpush{q}\t%%r%s\n", \ 2101 1.1.1.1.8.2 tls reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2102 1.1.1.1.8.2 tls else \ 2103 1.1.1.1.8.2 tls asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2104 1.1.1.1.8.2 tls } while (0) 2105 1.1.1.1.8.2 tls 2106 1.1.1.1.8.2 tls /* This is how to output an insn to pop a register from the stack. 2107 1.1.1.1.8.2 tls It need not be very fast code. */ 2108 1.1.1.1.8.2 tls 2109 1.1.1.1.8.2 tls #define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 2110 1.1.1.1.8.2 tls do { \ 2111 1.1.1.1.8.2 tls if (TARGET_64BIT) \ 2112 1.1.1.1.8.2 tls asm_fprintf ((FILE), "\tpop{q}\t%%r%s\n", \ 2113 1.1.1.1.8.2 tls reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0)); \ 2114 1.1.1.1.8.2 tls else \ 2115 1.1.1.1.8.2 tls asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]); \ 2116 1.1.1.1.8.2 tls } while (0) 2117 1.1.1.1.8.2 tls 2118 1.1.1.1.8.2 tls /* This is how to output an element of a case-vector that is absolute. */ 2119 1.1.1.1.8.2 tls 2120 1.1.1.1.8.2 tls #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 2121 1.1.1.1.8.2 tls ix86_output_addr_vec_elt ((FILE), (VALUE)) 2122 1.1.1.1.8.2 tls 2123 1.1.1.1.8.2 tls /* This is how to output an element of a case-vector that is relative. */ 2124 1.1.1.1.8.2 tls 2125 1.1.1.1.8.2 tls #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 2126 1.1.1.1.8.2 tls ix86_output_addr_diff_elt ((FILE), (VALUE), (REL)) 2127 1.1.1.1.8.2 tls 2128 1.1.1.1.8.2 tls /* When we see %v, we will print the 'v' prefix if TARGET_AVX is 2129 1.1.1.1.8.2 tls true. */ 2130 1.1.1.1.8.2 tls 2131 1.1.1.1.8.2 tls #define ASM_OUTPUT_AVX_PREFIX(STREAM, PTR) \ 2132 1.1.1.1.8.2 tls { \ 2133 1.1.1.1.8.2 tls if ((PTR)[0] == '%' && (PTR)[1] == 'v') \ 2134 1.1.1.1.8.2 tls { \ 2135 1.1.1.1.8.2 tls if (TARGET_AVX) \ 2136 1.1.1.1.8.2 tls (PTR) += 1; \ 2137 1.1.1.1.8.2 tls else \ 2138 1.1.1.1.8.2 tls (PTR) += 2; \ 2139 1.1.1.1.8.2 tls } \ 2140 1.1.1.1.8.2 tls } 2141 1.1.1.1.8.2 tls 2142 1.1.1.1.8.2 tls /* A C statement or statements which output an assembler instruction 2143 1.1.1.1.8.2 tls opcode to the stdio stream STREAM. The macro-operand PTR is a 2144 1.1.1.1.8.2 tls variable of type `char *' which points to the opcode name in 2145 1.1.1.1.8.2 tls its "internal" form--the form that is written in the machine 2146 1.1.1.1.8.2 tls description. */ 2147 1.1.1.1.8.2 tls 2148 1.1.1.1.8.2 tls #define ASM_OUTPUT_OPCODE(STREAM, PTR) \ 2149 1.1.1.1.8.2 tls ASM_OUTPUT_AVX_PREFIX ((STREAM), (PTR)) 2150 1.1.1.1.8.2 tls 2151 1.1.1.1.8.2 tls /* A C statement to output to the stdio stream FILE an assembler 2152 1.1.1.1.8.2 tls command to pad the location counter to a multiple of 1<<LOG 2153 1.1.1.1.8.2 tls bytes if it is within MAX_SKIP bytes. */ 2154 1.1.1.1.8.2 tls 2155 1.1.1.1.8.2 tls #ifdef HAVE_GAS_MAX_SKIP_P2ALIGN 2156 1.1.1.1.8.2 tls #undef ASM_OUTPUT_MAX_SKIP_PAD 2157 1.1.1.1.8.2 tls #define ASM_OUTPUT_MAX_SKIP_PAD(FILE, LOG, MAX_SKIP) \ 2158 1.1.1.1.8.2 tls if ((LOG) != 0) \ 2159 1.1.1.1.8.2 tls { \ 2160 1.1.1.1.8.2 tls if ((MAX_SKIP) == 0) \ 2161 1.1.1.1.8.2 tls fprintf ((FILE), "\t.p2align %d\n", (LOG)); \ 2162 1.1.1.1.8.2 tls else \ 2163 1.1.1.1.8.2 tls fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP)); \ 2164 1.1.1.1.8.2 tls } 2165 1.1.1.1.8.2 tls #endif 2166 1.1.1.1.8.2 tls 2167 1.1.1.1.8.2 tls /* Under some conditions we need jump tables in the text section, 2168 1.1.1.1.8.2 tls because the assembler cannot handle label differences between 2169 1.1.1.1.8.2 tls sections. This is the case for x86_64 on Mach-O for example. */ 2170 1.1.1.1.8.2 tls 2171 1.1.1.1.8.2 tls #define JUMP_TABLES_IN_TEXT_SECTION \ 2172 1.1.1.1.8.2 tls (flag_pic && ((TARGET_MACHO && TARGET_64BIT) \ 2173 1.1.1.1.8.2 tls || (!TARGET_64BIT && !HAVE_AS_GOTOFF_IN_DATA))) 2174 1.1.1.1.8.2 tls 2175 1.1.1.1.8.2 tls /* Switch to init or fini section via SECTION_OP, emit a call to FUNC, 2176 1.1.1.1.8.2 tls and switch back. For x86 we do this only to save a few bytes that 2177 1.1.1.1.8.2 tls would otherwise be unused in the text section. */ 2178 1.1.1.1.8.2 tls #define CRT_MKSTR2(VAL) #VAL 2179 1.1.1.1.8.2 tls #define CRT_MKSTR(x) CRT_MKSTR2(x) 2180 1.1.1.1.8.2 tls 2181 1.1.1.1.8.2 tls #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ 2182 1.1.1.1.8.2 tls asm (SECTION_OP "\n\t" \ 2183 1.1.1.1.8.2 tls "call " CRT_MKSTR(__USER_LABEL_PREFIX__) #FUNC "\n" \ 2184 1.1.1.1.8.2 tls TEXT_SECTION_ASM_OP); 2185 1.1.1.1.8.2 tls 2186 1.1.1.1.8.2 tls /* Print operand X (an rtx) in assembler syntax to file FILE. 2188 1.1.1.1.8.2 tls CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. 2189 1.1.1.1.8.2 tls Effect of various CODE letters is described in i386.c near 2190 1.1.1.1.8.2 tls print_operand function. */ 2191 1.1.1.1.8.2 tls 2192 1.1.1.1.8.2 tls #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2193 1.1.1.1.8.2 tls ((CODE) == '*' || (CODE) == '+' || (CODE) == '&' || (CODE) == ';') 2194 1.1.1.1.8.2 tls 2195 1.1.1.1.8.2 tls #define PRINT_OPERAND(FILE, X, CODE) \ 2196 1.1.1.1.8.2 tls print_operand ((FILE), (X), (CODE)) 2197 1.1.1.1.8.2 tls 2198 1.1.1.1.8.2 tls #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 2199 1.1.1.1.8.2 tls print_operand_address ((FILE), (ADDR)) 2200 1.1.1.1.8.2 tls 2201 1.1.1.1.8.2 tls #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ 2202 1.1.1.1.8.2 tls do { \ 2203 1.1.1.1.8.2 tls if (! output_addr_const_extra (FILE, (X))) \ 2204 1.1.1.1.8.2 tls goto FAIL; \ 2205 1.1.1.1.8.2 tls } while (0); 2206 1.1.1.1.8.2 tls 2207 1.1.1.1.8.2 tls /* Which processor to schedule for. The cpu attribute defines a list that 2209 1.1.1.1.8.2 tls mirrors this list, so changes to i386.md must be made at the same time. */ 2210 1.1.1.1.8.2 tls 2211 1.1.1.1.8.2 tls enum processor_type 2212 1.1.1.1.8.2 tls { 2213 1.1.1.1.8.2 tls PROCESSOR_I386 = 0, /* 80386 */ 2214 1.1.1.1.8.2 tls PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */ 2215 1.1.1.1.8.2 tls PROCESSOR_PENTIUM, 2216 1.1.1.1.8.2 tls PROCESSOR_PENTIUMPRO, 2217 1.1.1.1.8.2 tls PROCESSOR_GEODE, 2218 1.1.1.1.8.2 tls PROCESSOR_K6, 2219 1.1.1.1.8.2 tls PROCESSOR_ATHLON, 2220 1.1.1.1.8.2 tls PROCESSOR_PENTIUM4, 2221 1.1.1.1.8.2 tls PROCESSOR_K8, 2222 1.1.1.1.8.2 tls PROCESSOR_NOCONA, 2223 1.1.1.1.8.2 tls PROCESSOR_CORE2, 2224 1.1.1.1.8.2 tls PROCESSOR_GENERIC32, 2225 1.1.1.1.8.2 tls PROCESSOR_GENERIC64, 2226 1.1.1.1.8.2 tls PROCESSOR_AMDFAM10, 2227 1.1.1.1.8.2 tls PROCESSOR_ATOM, 2228 1.1.1.1.8.2 tls PROCESSOR_max 2229 1.1.1.1.8.2 tls }; 2230 1.1.1.1.8.2 tls 2231 1.1.1.1.8.2 tls extern enum processor_type ix86_tune; 2232 1.1.1.1.8.2 tls extern enum processor_type ix86_arch; 2233 1.1.1.1.8.2 tls 2234 1.1.1.1.8.2 tls enum fpmath_unit 2235 1.1.1.1.8.2 tls { 2236 1.1.1.1.8.2 tls FPMATH_387 = 1, 2237 1.1.1.1.8.2 tls FPMATH_SSE = 2 2238 1.1.1.1.8.2 tls }; 2239 1.1.1.1.8.2 tls 2240 1.1.1.1.8.2 tls extern enum fpmath_unit ix86_fpmath; 2241 1.1.1.1.8.2 tls 2242 1.1.1.1.8.2 tls enum tls_dialect 2243 1.1.1.1.8.2 tls { 2244 1.1.1.1.8.2 tls TLS_DIALECT_GNU, 2245 1.1.1.1.8.2 tls TLS_DIALECT_GNU2, 2246 1.1.1.1.8.2 tls TLS_DIALECT_SUN 2247 1.1.1.1.8.2 tls }; 2248 1.1.1.1.8.2 tls 2249 1.1.1.1.8.2 tls extern enum tls_dialect ix86_tls_dialect; 2250 1.1.1.1.8.2 tls 2251 1.1.1.1.8.2 tls enum cmodel { 2252 1.1.1.1.8.2 tls CM_32, /* The traditional 32-bit ABI. */ 2253 1.1.1.1.8.2 tls CM_SMALL, /* Assumes all code and data fits in the low 31 bits. */ 2254 1.1.1.1.8.2 tls CM_KERNEL, /* Assumes all code and data fits in the high 31 bits. */ 2255 1.1.1.1.8.2 tls CM_MEDIUM, /* Assumes code fits in the low 31 bits; data unlimited. */ 2256 1.1.1.1.8.2 tls CM_LARGE, /* No assumptions. */ 2257 1.1.1.1.8.2 tls CM_SMALL_PIC, /* Assumes code+data+got/plt fits in a 31 bit region. */ 2258 1.1.1.1.8.2 tls CM_MEDIUM_PIC,/* Assumes code+got/plt fits in a 31 bit region. */ 2259 1.1.1.1.8.2 tls CM_LARGE_PIC /* No assumptions. */ 2260 1.1.1.1.8.2 tls }; 2261 1.1.1.1.8.2 tls 2262 1.1.1.1.8.2 tls extern enum cmodel ix86_cmodel; 2263 1.1.1.1.8.2 tls 2264 1.1.1.1.8.2 tls /* Size of the RED_ZONE area. */ 2265 1.1.1.1.8.2 tls #define RED_ZONE_SIZE 128 2266 1.1.1.1.8.2 tls /* Reserved area of the red zone for temporaries. */ 2267 1.1.1.1.8.2 tls #define RED_ZONE_RESERVE 8 2268 1.1.1.1.8.2 tls 2269 1.1.1.1.8.2 tls enum asm_dialect { 2270 1.1.1.1.8.2 tls ASM_ATT, 2271 1.1.1.1.8.2 tls ASM_INTEL 2272 1.1.1.1.8.2 tls }; 2273 1.1.1.1.8.2 tls 2274 1.1.1.1.8.2 tls extern enum asm_dialect ix86_asm_dialect; 2275 1.1.1.1.8.2 tls extern unsigned int ix86_preferred_stack_boundary; 2276 1.1.1.1.8.2 tls extern unsigned int ix86_incoming_stack_boundary; 2277 1.1.1.1.8.2 tls extern int ix86_branch_cost, ix86_section_threshold; 2278 1.1.1.1.8.2 tls 2279 1.1.1.1.8.2 tls /* Smallest class containing REGNO. */ 2280 1.1.1.1.8.2 tls extern enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]; 2281 1.1.1.1.8.2 tls 2282 1.1.1.1.8.2 tls extern rtx ix86_compare_op0; /* operand 0 for comparisons */ 2283 1.1.1.1.8.2 tls extern rtx ix86_compare_op1; /* operand 1 for comparisons */ 2284 1.1.1.1.8.2 tls 2285 1.1.1.1.8.2 tls enum ix86_fpcmp_strategy { 2286 1.1.1.1.8.2 tls IX86_FPCMP_SAHF, 2287 1.1.1.1.8.2 tls IX86_FPCMP_COMI, 2288 1.1.1.1.8.2 tls IX86_FPCMP_ARITH 2289 1.1.1.1.8.2 tls }; 2290 1.1.1.1.8.2 tls 2291 1.1.1.1.8.2 tls /* To properly truncate FP values into integers, we need to set i387 control 2293 1.1.1.1.8.2 tls word. We can't emit proper mode switching code before reload, as spills 2294 1.1.1.1.8.2 tls generated by reload may truncate values incorrectly, but we still can avoid 2295 1.1.1.1.8.2 tls redundant computation of new control word by the mode switching pass. 2296 1.1.1.1.8.2 tls The fldcw instructions are still emitted redundantly, but this is probably 2297 1.1.1.1.8.2 tls not going to be noticeable problem, as most CPUs do have fast path for 2298 1.1.1.1.8.2 tls the sequence. 2299 1.1.1.1.8.2 tls 2300 1.1.1.1.8.2 tls The machinery is to emit simple truncation instructions and split them 2301 1.1.1.1.8.2 tls before reload to instructions having USEs of two memory locations that 2302 1.1.1.1.8.2 tls are filled by this code to old and new control word. 2303 1.1.1.1.8.2 tls 2304 1.1.1.1.8.2 tls Post-reload pass may be later used to eliminate the redundant fildcw if 2305 1.1.1.1.8.2 tls needed. */ 2306 1.1.1.1.8.2 tls 2307 1.1.1.1.8.2 tls enum ix86_entity 2308 1.1.1.1.8.2 tls { 2309 1.1.1.1.8.2 tls I387_TRUNC = 0, 2310 1.1.1.1.8.2 tls I387_FLOOR, 2311 1.1.1.1.8.2 tls I387_CEIL, 2312 1.1.1.1.8.2 tls I387_MASK_PM, 2313 1.1.1.1.8.2 tls MAX_386_ENTITIES 2314 1.1.1.1.8.2 tls }; 2315 1.1.1.1.8.2 tls 2316 1.1.1.1.8.2 tls enum ix86_stack_slot 2317 1.1.1.1.8.2 tls { 2318 1.1.1.1.8.2 tls SLOT_VIRTUAL = 0, 2319 1.1.1.1.8.2 tls SLOT_TEMP, 2320 1.1.1.1.8.2 tls SLOT_CW_STORED, 2321 1.1.1.1.8.2 tls SLOT_CW_TRUNC, 2322 1.1.1.1.8.2 tls SLOT_CW_FLOOR, 2323 1.1.1.1.8.2 tls SLOT_CW_CEIL, 2324 1.1.1.1.8.2 tls SLOT_CW_MASK_PM, 2325 1.1.1.1.8.2 tls MAX_386_STACK_LOCALS 2326 1.1.1.1.8.2 tls }; 2327 1.1.1.1.8.2 tls 2328 1.1.1.1.8.2 tls /* Define this macro if the port needs extra instructions inserted 2329 1.1.1.1.8.2 tls for mode switching in an optimizing compilation. */ 2330 1.1.1.1.8.2 tls 2331 1.1.1.1.8.2 tls #define OPTIMIZE_MODE_SWITCHING(ENTITY) \ 2332 1.1.1.1.8.2 tls ix86_optimize_mode_switching[(ENTITY)] 2333 1.1.1.1.8.2 tls 2334 1.1.1.1.8.2 tls /* If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as 2335 1.1.1.1.8.2 tls initializer for an array of integers. Each initializer element N 2336 1.1.1.1.8.2 tls refers to an entity that needs mode switching, and specifies the 2337 1.1.1.1.8.2 tls number of different modes that might need to be set for this 2338 1.1.1.1.8.2 tls entity. The position of the initializer in the initializer - 2339 1.1.1.1.8.2 tls starting counting at zero - determines the integer that is used to 2340 1.1.1.1.8.2 tls refer to the mode-switched entity in question. */ 2341 1.1.1.1.8.2 tls 2342 1.1.1.1.8.2 tls #define NUM_MODES_FOR_MODE_SWITCHING \ 2343 1.1.1.1.8.2 tls { I387_CW_ANY, I387_CW_ANY, I387_CW_ANY, I387_CW_ANY } 2344 1.1.1.1.8.2 tls 2345 1.1.1.1.8.2 tls /* ENTITY is an integer specifying a mode-switched entity. If 2346 1.1.1.1.8.2 tls `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to 2347 1.1.1.1.8.2 tls return an integer value not larger than the corresponding element 2348 1.1.1.1.8.2 tls in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY 2349 1.1.1.1.8.2 tls must be switched into prior to the execution of INSN. */ 2350 1.1.1.1.8.2 tls 2351 1.1.1.1.8.2 tls #define MODE_NEEDED(ENTITY, I) ix86_mode_needed ((ENTITY), (I)) 2352 1.1.1.1.8.2 tls 2353 1.1.1.1.8.2 tls /* This macro specifies the order in which modes for ENTITY are 2354 1.1.1.1.8.2 tls processed. 0 is the highest priority. */ 2355 1.1.1.1.8.2 tls 2356 1.1.1.1.8.2 tls #define MODE_PRIORITY_TO_MODE(ENTITY, N) (N) 2357 1.1.1.1.8.2 tls 2358 1.1.1.1.8.2 tls /* Generate one or more insns to set ENTITY to MODE. HARD_REG_LIVE 2359 1.1.1.1.8.2 tls is the set of hard registers live at the point where the insn(s) 2360 1.1.1.1.8.2 tls are to be inserted. */ 2361 1.1.1.1.8.2 tls 2362 1.1.1.1.8.2 tls #define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \ 2363 1.1.1.1.8.2 tls ((MODE) != I387_CW_ANY && (MODE) != I387_CW_UNINITIALIZED \ 2364 1.1.1.1.8.2 tls ? emit_i387_cw_initialization (MODE), 0 \ 2365 1.1.1.1.8.2 tls : 0) 2366 1.1.1.1.8.2 tls 2367 1.1.1.1.8.2 tls 2368 1.1.1.1.8.2 tls /* Avoid renaming of stack registers, as doing so in combination with 2370 1.1.1.1.8.2 tls scheduling just increases amount of live registers at time and in 2371 1.1.1.1.8.2 tls the turn amount of fxch instructions needed. 2372 1.1.1.1.8.2 tls 2373 1.1.1.1.8.2 tls ??? Maybe Pentium chips benefits from renaming, someone can try.... */ 2374 1.1.1.1.8.2 tls 2375 1.1.1.1.8.2 tls #define HARD_REGNO_RENAME_OK(SRC, TARGET) \ 2376 1.1.1.1.8.2 tls (! IN_RANGE ((SRC), FIRST_STACK_REG, LAST_STACK_REG)) 2377 1.1.1.1.8.2 tls 2378 1.1.1.1.8.2 tls 2379 1.1.1.1.8.2 tls #define FASTCALL_PREFIX '@' 2381 1.1.1.1.8.2 tls 2382 1.1.1.1.8.2 tls /* Machine specific CFA tracking during prologue/epilogue generation. */ 2384 1.1.1.1.8.2 tls 2385 1.1.1.1.8.2 tls #ifndef USED_FOR_TARGET 2386 1.1.1.1.8.2 tls struct GTY(()) machine_cfa_state 2387 1.1.1.1.8.2 tls { 2388 1.1.1.1.8.2 tls rtx reg; 2389 1.1.1.1.8.2 tls HOST_WIDE_INT offset; 2390 1.1.1.1.8.2 tls }; 2391 1.1.1.1.8.2 tls 2392 1.1.1.1.8.2 tls struct GTY(()) machine_function { 2393 1.1.1.1.8.2 tls struct stack_local_entry *stack_locals; 2394 1.1.1.1.8.2 tls const char *some_ld_name; 2395 1.1.1.1.8.2 tls int varargs_gpr_size; 2396 1.1.1.1.8.2 tls int varargs_fpr_size; 2397 1.1.1.1.8.2 tls int optimize_mode_switching[MAX_386_ENTITIES]; 2398 1.1.1.1.8.2 tls 2399 1.1.1.1.8.2 tls /* Number of saved registers USE_FAST_PROLOGUE_EPILOGUE 2400 1.1.1.1.8.2 tls has been computed for. */ 2401 1.1.1.1.8.2 tls int use_fast_prologue_epilogue_nregs; 2402 1.1.1.1.8.2 tls 2403 1.1.1.1.8.2 tls /* The CFA state at the end of the prologue. */ 2404 1.1.1.1.8.2 tls struct machine_cfa_state cfa; 2405 1.1.1.1.8.2 tls 2406 1.1.1.1.8.2 tls /* This value is used for amd64 targets and specifies the current abi 2407 1.1.1.1.8.2 tls to be used. MS_ABI means ms abi. Otherwise SYSV_ABI means sysv abi. */ 2408 1.1.1.1.8.2 tls enum calling_abi call_abi; 2409 1.1.1.1.8.2 tls 2410 1.1.1.1.8.2 tls /* Nonzero if the function accesses a previous frame. */ 2411 1.1.1.1.8.2 tls BOOL_BITFIELD accesses_prev_frame : 1; 2412 1.1.1.1.8.2 tls 2413 1.1.1.1.8.2 tls /* Nonzero if the function requires a CLD in the prologue. */ 2414 1.1.1.1.8.2 tls BOOL_BITFIELD needs_cld : 1; 2415 1.1.1.1.8.2 tls 2416 1.1.1.1.8.2 tls /* Set by ix86_compute_frame_layout and used by prologue/epilogue 2417 1.1.1.1.8.2 tls expander to determine the style used. */ 2418 1.1.1.1.8.2 tls BOOL_BITFIELD use_fast_prologue_epilogue : 1; 2419 1.1.1.1.8.2 tls 2420 1.1.1.1.8.2 tls /* If true, the current function needs the default PIC register, not 2421 1.1.1.1.8.2 tls an alternate register (on x86) and must not use the red zone (on 2422 1.1.1.1.8.2 tls x86_64), even if it's a leaf function. We don't want the 2423 1.1.1.1.8.2 tls function to be regarded as non-leaf because TLS calls need not 2424 1.1.1.1.8.2 tls affect register allocation. This flag is set when a TLS call 2425 1.1.1.1.8.2 tls instruction is expanded within a function, and never reset, even 2426 1.1.1.1.8.2 tls if all such instructions are optimized away. Use the 2427 1.1.1.1.8.2 tls ix86_current_function_calls_tls_descriptor macro for a better 2428 1.1.1.1.8.2 tls approximation. */ 2429 1.1.1.1.8.2 tls BOOL_BITFIELD tls_descriptor_call_expanded_p : 1; 2430 1.1.1.1.8.2 tls 2431 1.1.1.1.8.2 tls /* If true, the current function has a STATIC_CHAIN is placed on the 2432 1.1.1.1.8.2 tls stack below the return address. */ 2433 1.1.1.1.8.2 tls BOOL_BITFIELD static_chain_on_stack : 1; 2434 1.1.1.1.8.2 tls }; 2435 1.1.1.1.8.2 tls #endif 2436 1.1.1.1.8.2 tls 2437 1.1.1.1.8.2 tls #define ix86_stack_locals (cfun->machine->stack_locals) 2438 1.1.1.1.8.2 tls #define ix86_varargs_gpr_size (cfun->machine->varargs_gpr_size) 2439 1.1.1.1.8.2 tls #define ix86_varargs_fpr_size (cfun->machine->varargs_fpr_size) 2440 1.1.1.1.8.2 tls #define ix86_optimize_mode_switching (cfun->machine->optimize_mode_switching) 2441 1.1.1.1.8.2 tls #define ix86_current_function_needs_cld (cfun->machine->needs_cld) 2442 1.1.1.1.8.2 tls #define ix86_tls_descriptor_calls_expanded_in_cfun \ 2443 1.1.1.1.8.2 tls (cfun->machine->tls_descriptor_call_expanded_p) 2444 1.1.1.1.8.2 tls /* Since tls_descriptor_call_expanded is not cleared, even if all TLS 2445 1.1.1.1.8.2 tls calls are optimized away, we try to detect cases in which it was 2446 1.1.1.1.8.2 tls optimized away. Since such instructions (use (reg REG_SP)), we can 2447 1.1.1.1.8.2 tls verify whether there's any such instruction live by testing that 2448 1.1.1.1.8.2 tls REG_SP is live. */ 2449 1.1.1.1.8.2 tls #define ix86_current_function_calls_tls_descriptor \ 2450 1.1.1.1.8.2 tls (ix86_tls_descriptor_calls_expanded_in_cfun && df_regs_ever_live_p (SP_REG)) 2451 1.1.1.1.8.2 tls #define ix86_cfa_state (&cfun->machine->cfa) 2452 1.1.1.1.8.2 tls #define ix86_static_chain_on_stack (cfun->machine->static_chain_on_stack) 2453 1.1.1.1.8.2 tls 2454 1.1.1.1.8.2 tls /* Control behavior of x86_file_start. */ 2455 1.1.1.1.8.2 tls #define X86_FILE_START_VERSION_DIRECTIVE false 2456 1.1.1.1.8.2 tls #define X86_FILE_START_FLTUSED false 2457 1.1.1.1.8.2 tls 2458 1.1.1.1.8.2 tls /* Flag to mark data that is in the large address area. */ 2459 1.1.1.1.8.2 tls #define SYMBOL_FLAG_FAR_ADDR (SYMBOL_FLAG_MACH_DEP << 0) 2460 1.1.1.1.8.2 tls #define SYMBOL_REF_FAR_ADDR_P(X) \ 2461 1.1.1.1.8.2 tls ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_FAR_ADDR) != 0) 2462 1.1.1.1.8.2 tls 2463 1.1.1.1.8.2 tls /* Flags to mark dllimport/dllexport. Used by PE ports, but handy to 2464 1.1.1.1.8.2 tls have defined always, to avoid ifdefing. */ 2465 1.1.1.1.8.2 tls #define SYMBOL_FLAG_DLLIMPORT (SYMBOL_FLAG_MACH_DEP << 1) 2466 1.1.1.1.8.2 tls #define SYMBOL_REF_DLLIMPORT_P(X) \ 2467 1.1.1.1.8.2 tls ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_DLLIMPORT) != 0) 2468 1.1.1.1.8.2 tls 2469 1.1.1.1.8.2 tls #define SYMBOL_FLAG_DLLEXPORT (SYMBOL_FLAG_MACH_DEP << 2) 2470 1.1.1.1.8.2 tls #define SYMBOL_REF_DLLEXPORT_P(X) \ 2471 1.1.1.1.8.2 tls ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_DLLEXPORT) != 0) 2472 1.1.1.1.8.2 tls 2473 1.1.1.1.8.2 tls /* Model costs for vectorizer. */ 2474 1.1.1.1.8.2 tls 2475 1.1.1.1.8.2 tls /* Cost of conditional branch. */ 2476 1.1.1.1.8.2 tls #undef TARG_COND_BRANCH_COST 2477 1.1.1.1.8.2 tls #define TARG_COND_BRANCH_COST ix86_cost->branch_cost 2478 1.1.1.1.8.2 tls 2479 1.1.1.1.8.2 tls /* Enum through the target specific extra va_list types. 2480 1.1.1.1.8.2 tls Please, do not iterate the base va_list type name. */ 2481 1.1.1.1.8.2 tls #define TARGET_ENUM_VA_LIST(IDX, PNAME, PTYPE) \ 2482 1.1.1.1.8.2 tls (TARGET_64BIT ? ix86_enum_va_list (IDX, PNAME, PTYPE) : 0) 2483 1.1.1.1.8.2 tls 2484 1.1.1.1.8.2 tls /* Cost of any scalar operation, excluding load and store. */ 2485 1.1.1.1.8.2 tls #undef TARG_SCALAR_STMT_COST 2486 1.1.1.1.8.2 tls #define TARG_SCALAR_STMT_COST ix86_cost->scalar_stmt_cost 2487 1.1.1.1.8.2 tls 2488 1.1.1.1.8.2 tls /* Cost of scalar load. */ 2489 1.1.1.1.8.2 tls #undef TARG_SCALAR_LOAD_COST 2490 1.1.1.1.8.2 tls #define TARG_SCALAR_LOAD_COST ix86_cost->scalar_load_cost 2491 1.1.1.1.8.2 tls 2492 1.1.1.1.8.2 tls /* Cost of scalar store. */ 2493 1.1.1.1.8.2 tls #undef TARG_SCALAR_STORE_COST 2494 1.1.1.1.8.2 tls #define TARG_SCALAR_STORE_COST ix86_cost->scalar_store_cost 2495 1.1.1.1.8.2 tls 2496 1.1.1.1.8.2 tls /* Cost of any vector operation, excluding load, store or vector to scalar 2497 1.1.1.1.8.2 tls operation. */ 2498 1.1.1.1.8.2 tls #undef TARG_VEC_STMT_COST 2499 1.1.1.1.8.2 tls #define TARG_VEC_STMT_COST ix86_cost->vec_stmt_cost 2500 1.1.1.1.8.2 tls 2501 1.1.1.1.8.2 tls /* Cost of vector to scalar operation. */ 2502 1.1.1.1.8.2 tls #undef TARG_VEC_TO_SCALAR_COST 2503 1.1.1.1.8.2 tls #define TARG_VEC_TO_SCALAR_COST ix86_cost->vec_to_scalar_cost 2504 1.1.1.1.8.2 tls 2505 1.1.1.1.8.2 tls /* Cost of scalar to vector operation. */ 2506 1.1.1.1.8.2 tls #undef TARG_SCALAR_TO_VEC_COST 2507 1.1.1.1.8.2 tls #define TARG_SCALAR_TO_VEC_COST ix86_cost->scalar_to_vec_cost 2508 1.1.1.1.8.2 tls 2509 1.1.1.1.8.2 tls /* Cost of aligned vector load. */ 2510 1.1.1.1.8.2 tls #undef TARG_VEC_LOAD_COST 2511 1.1.1.1.8.2 tls #define TARG_VEC_LOAD_COST ix86_cost->vec_align_load_cost 2512 1.1.1.1.8.2 tls 2513 1.1.1.1.8.2 tls /* Cost of misaligned vector load. */ 2514 1.1.1.1.8.2 tls #undef TARG_VEC_UNALIGNED_LOAD_COST 2515 1.1.1.1.8.2 tls #define TARG_VEC_UNALIGNED_LOAD_COST ix86_cost->vec_unalign_load_cost 2516 2517 /* Cost of vector store. */ 2518 #undef TARG_VEC_STORE_COST 2519 #define TARG_VEC_STORE_COST ix86_cost->vec_store_cost 2520 2521 /* Cost of conditional taken branch for vectorizer cost model. */ 2522 #undef TARG_COND_TAKEN_BRANCH_COST 2523 #define TARG_COND_TAKEN_BRANCH_COST ix86_cost->cond_taken_branch_cost 2524 2525 /* Cost of conditional not taken branch for vectorizer cost model. */ 2526 #undef TARG_COND_NOT_TAKEN_BRANCH_COST 2527 #define TARG_COND_NOT_TAKEN_BRANCH_COST ix86_cost->cond_not_taken_branch_cost 2528 2529 /* 2530 Local variables: 2531 version-control: t 2532 End: 2533 */ 2534
Indexes created Tue Jul 21 00:24:56 UTC 2026