1 1.1 mrg ;; Machine Descriptions for R8C/M16C/M32C 2 1.12 mrg ;; Copyright (C) 2005-2022 Free Software Foundation, Inc. 3 1.1 mrg ;; Contributed by Red Hat. 4 1.1 mrg ;; 5 1.1 mrg ;; This file is part of GCC. 6 1.1 mrg ;; 7 1.1 mrg ;; GCC is free software; you can redistribute it and/or modify it 8 1.1 mrg ;; under the terms of the GNU General Public License as published 9 1.1 mrg ;; by the Free Software Foundation; either version 3, or (at your 10 1.1 mrg ;; option) any later version. 11 1.1 mrg ;; 12 1.1 mrg ;; GCC is distributed in the hope that it will be useful, but WITHOUT 13 1.1 mrg ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 1.1 mrg ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 1.1 mrg ;; License for more details. 16 1.1 mrg ;; 17 1.1 mrg ;; You should have received a copy of the GNU General Public License 18 1.1 mrg ;; along with GCC; see the file COPYING3. If not see 19 1.1 mrg ;; <http://www.gnu.org/licenses/>. 20 1.1 mrg 21 1.1 mrg (define_constants 22 1.1 mrg [(R0_REGNO 0) 23 1.1 mrg (R2_REGNO 1) 24 1.1 mrg (R1_REGNO 2) 25 1.1 mrg (R3_REGNO 3) 26 1.1 mrg 27 1.1 mrg (A0_REGNO 4) 28 1.1 mrg (A1_REGNO 5) 29 1.1 mrg (SB_REGNO 6) 30 1.1 mrg (FB_REGNO 7) 31 1.1 mrg 32 1.1 mrg (SP_REGNO 8) 33 1.1 mrg (PC_REGNO 9) 34 1.1 mrg (FLG_REGNO 10) 35 1.1 mrg (MEM0_REGNO 12) 36 1.1 mrg (MEM7_REGNO 19) 37 1.1 mrg ]) 38 1.1 mrg 39 1.1 mrg (define_constants 40 1.1 mrg [(UNS_PROLOGUE_END 1) 41 1.1 mrg (UNS_EPILOGUE_START 2) 42 1.1 mrg (UNS_EH_EPILOGUE 3) 43 1.1 mrg (UNS_PUSHM 4) 44 1.1 mrg (UNS_POPM 5) 45 1.1 mrg (UNS_SMOVF 6) 46 1.1 mrg (UNS_SSTR 7) 47 1.1 mrg (UNS_SCMPU 8) 48 1.1 mrg (UNS_SMOVU 9) 49 1.1 mrg (UNS_FSETB 10) 50 1.1 mrg (UNS_FREIT 11) 51 1.1 mrg ]) 52 1.1 mrg 53 1.1 mrg ;; n = no change, x = clobbered. The first 16 values are chosen such 54 1.1 mrg ;; that the enum has one bit set for each flag. 55 1.1 mrg (define_attr "flags" "x,c,z,zc,s,sc,sz,szc,o,oc,oz,ozc,os,osc,osz,oszc,n" (const_string "n")) 56 1.1 mrg (define_asm_attributes [(set_attr "flags" "x")]) 57 1.1 mrg 58 1.1 mrg (define_mode_iterator QHI [QI HI]) 59 1.1 mrg (define_mode_iterator HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")]) 60 1.1 mrg (define_mode_iterator QHPSI [QI HI (PSI "TARGET_A24")]) 61 1.1 mrg (define_mode_iterator QHSI [QI HI (SI "TARGET_A24")]) 62 1.1 mrg (define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")]) 63 1.1 mrg 64 1.1 mrg (define_code_iterator eqne_cond [eq ne]) 65 1.1 mrg 66 1.1 mrg 67 1.1 mrg (define_insn "nop" 68 1.1 mrg [(const_int 0)] 69 1.1 mrg "" 70 1.1 mrg "nop" 71 1.1 mrg [(set_attr "flags" "n")] 72 1.1 mrg ) 73 1.1 mrg 74 1.1 mrg (define_insn "no_insn" 75 1.1 mrg [(const_int 1)] 76 1.1 mrg "" 77 1.1 mrg "" 78 1.1 mrg [(set_attr "flags" "n")] 79 1.1 mrg ) 80