1 1.1 mrg ; Options for the Motorola 68000 port of the compiler. 2 1.1 mrg 3 1.12 mrg ; Copyright (C) 2005-2022 Free Software Foundation, Inc. 4 1.1 mrg ; 5 1.1 mrg ; This file is part of GCC. 6 1.1 mrg ; 7 1.1 mrg ; GCC is free software; you can redistribute it and/or modify it under 8 1.1 mrg ; the terms of the GNU General Public License as published by the Free 9 1.1 mrg ; Software Foundation; either version 3, or (at your option) any later 10 1.1 mrg ; version. 11 1.1 mrg ; 12 1.1 mrg ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13 1.1 mrg ; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 1.1 mrg ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15 1.1 mrg ; for more details. 16 1.1 mrg ; 17 1.1 mrg ; You should have received a copy of the GNU General Public License 18 1.1 mrg ; along with GCC; see the file COPYING3. If not see 19 1.1 mrg ; <http://www.gnu.org/licenses/>. 20 1.1 mrg 21 1.3 mrg HeaderInclude 22 1.3 mrg config/m68k/m68k-opts.h 23 1.3 mrg 24 1.3 mrg ; Specify the identification number of the library being built. 25 1.3 mrg Variable 26 1.3 mrg const char *m68k_library_id_string = "_current_shared_library_a5_offset_" 27 1.3 mrg 28 1.1 mrg m5200 29 1.3 mrg Target RejectNegative Alias(mcpu=, 5206) 30 1.6 mrg Generate code for a 520X. 31 1.1 mrg 32 1.1 mrg m5206e 33 1.3 mrg Target RejectNegative Alias(mcpu=, 5206e) 34 1.6 mrg Generate code for a 5206e. 35 1.1 mrg 36 1.1 mrg m528x 37 1.3 mrg Target RejectNegative Alias(mcpu=, 528x) 38 1.6 mrg Generate code for a 528x. 39 1.1 mrg 40 1.1 mrg m5307 41 1.3 mrg Target RejectNegative Alias(mcpu=, 5307) 42 1.6 mrg Generate code for a 5307. 43 1.1 mrg 44 1.1 mrg m5407 45 1.3 mrg Target RejectNegative Alias(mcpu=, 5407) 46 1.6 mrg Generate code for a 5407. 47 1.1 mrg 48 1.1 mrg m68000 49 1.3 mrg Target RejectNegative Alias(mcpu=, 68000) 50 1.6 mrg Generate code for a 68000. 51 1.1 mrg 52 1.1 mrg m68010 53 1.3 mrg Target RejectNegative Alias(mcpu=, 68010) 54 1.6 mrg Generate code for a 68010. 55 1.1 mrg 56 1.1 mrg m68020 57 1.3 mrg Target RejectNegative Alias(mcpu=, 68020) 58 1.6 mrg Generate code for a 68020. 59 1.1 mrg 60 1.1 mrg m68020-40 61 1.1 mrg Target RejectNegative 62 1.6 mrg Generate code for a 68040, without any new instructions. 63 1.1 mrg 64 1.1 mrg m68020-60 65 1.1 mrg Target RejectNegative 66 1.6 mrg Generate code for a 68060, without any new instructions. 67 1.1 mrg 68 1.1 mrg m68030 69 1.3 mrg Target RejectNegative Alias(mcpu=, 68030) 70 1.6 mrg Generate code for a 68030. 71 1.1 mrg 72 1.1 mrg m68040 73 1.3 mrg Target RejectNegative Alias(mcpu=, 68040) 74 1.6 mrg Generate code for a 68040. 75 1.1 mrg 76 1.1 mrg m68060 77 1.3 mrg Target RejectNegative Alias(mcpu=, 68060) 78 1.6 mrg Generate code for a 68060. 79 1.1 mrg 80 1.1 mrg m68302 81 1.3 mrg Target RejectNegative Alias(mcpu=, 68302) 82 1.6 mrg Generate code for a 68302. 83 1.1 mrg 84 1.1 mrg m68332 85 1.3 mrg Target RejectNegative Alias(mcpu=, 68332) 86 1.6 mrg Generate code for a 68332. 87 1.1 mrg 88 1.1 mrg ; Has no effect on gcc 89 1.1 mrg m68851 90 1.1 mrg Target 91 1.6 mrg Generate code for a 68851. 92 1.1 mrg 93 1.1 mrg m68881 94 1.1 mrg Target RejectNegative Mask(HARD_FLOAT) 95 1.6 mrg Generate code that uses 68881 floating-point instructions. 96 1.1 mrg 97 1.1 mrg malign-int 98 1.12 mrg Target Mask(ALIGN_INT) 99 1.6 mrg Align variables on a 32-bit boundary. 100 1.1 mrg 101 1.1 mrg march= 102 1.3 mrg Target RejectNegative Joined Enum(m68k_isa) Var(m68k_arch_option) 103 1.6 mrg Specify the name of the target architecture. 104 1.1 mrg 105 1.1 mrg mbitfield 106 1.12 mrg Target Mask(BITFIELD) 107 1.6 mrg Use the bit-field instructions. 108 1.1 mrg 109 1.1 mrg mc68000 110 1.3 mrg Target RejectNegative Alias(mcpu=, 68000) 111 1.6 mrg Generate code for a 68000. 112 1.1 mrg 113 1.1 mrg mc68020 114 1.3 mrg Target RejectNegative Alias(mcpu=, 68020) 115 1.6 mrg Generate code for a 68020. 116 1.1 mrg 117 1.1 mrg mcfv4e 118 1.3 mrg Target RejectNegative Alias(mcpu=, 547x) 119 1.6 mrg Generate code for a ColdFire v4e. 120 1.1 mrg 121 1.1 mrg mcpu= 122 1.3 mrg Target RejectNegative Joined Enum(target_device) Var(m68k_cpu_option) Init(unk_device) 123 1.6 mrg Specify the target CPU. 124 1.1 mrg 125 1.1 mrg mcpu32 126 1.3 mrg Target RejectNegative Alias(mcpu=, 68332) 127 1.6 mrg Generate code for a cpu32. 128 1.1 mrg 129 1.1 mrg mdiv 130 1.12 mrg Target Mask(CF_HWDIV) 131 1.6 mrg Use hardware division instructions on ColdFire. 132 1.1 mrg 133 1.1 mrg mfidoa 134 1.1 mrg Target RejectNegative 135 1.6 mrg Generate code for a Fido A. 136 1.1 mrg 137 1.1 mrg mhard-float 138 1.3 mrg Target RejectNegative Mask(HARD_FLOAT) 139 1.6 mrg Generate code which uses hardware floating point instructions. 140 1.1 mrg 141 1.1 mrg mid-shared-library 142 1.12 mrg Target Mask(ID_SHARED_LIBRARY) 143 1.6 mrg Enable ID based shared library. 144 1.1 mrg 145 1.8 mrg mlong-jump-table-offsets 146 1.12 mrg Target RejectNegative Mask(LONG_JUMP_TABLE_OFFSETS) 147 1.8 mrg Use 32-bit offsets in jump tables rather than 16-bit offsets. 148 1.8 mrg 149 1.1 mrg mnobitfield 150 1.1 mrg Target RejectNegative InverseMask(BITFIELD) 151 1.6 mrg Do not use the bit-field instructions. 152 1.1 mrg 153 1.1 mrg mnortd 154 1.1 mrg Target RejectNegative InverseMask(RTD) 155 1.6 mrg Use normal calling convention. 156 1.1 mrg 157 1.1 mrg mnoshort 158 1.1 mrg Target RejectNegative InverseMask(SHORT) 159 1.6 mrg Consider type 'int' to be 32 bits wide. 160 1.1 mrg 161 1.1 mrg mpcrel 162 1.12 mrg Target Mask(PCREL) 163 1.6 mrg Generate pc-relative code. 164 1.1 mrg 165 1.1 mrg mrtd 166 1.12 mrg Target Mask(RTD) 167 1.6 mrg Use different calling convention using 'rtd'. 168 1.1 mrg 169 1.1 mrg msep-data 170 1.12 mrg Target Mask(SEP_DATA) 171 1.6 mrg Enable separate data segment. 172 1.1 mrg 173 1.1 mrg mshared-library-id= 174 1.1 mrg Target RejectNegative Joined UInteger 175 1.6 mrg ID of shared library to build. 176 1.1 mrg 177 1.1 mrg mshort 178 1.12 mrg Target Mask(SHORT) 179 1.6 mrg Consider type 'int' to be 16 bits wide. 180 1.1 mrg 181 1.1 mrg msoft-float 182 1.1 mrg Target RejectNegative InverseMask(HARD_FLOAT) 183 1.6 mrg Generate code with library calls for floating point. 184 1.1 mrg 185 1.1 mrg mstrict-align 186 1.12 mrg Target Mask(STRICT_ALIGNMENT) 187 1.6 mrg Do not use unaligned memory references. 188 1.1 mrg 189 1.1 mrg mtune= 190 1.3 mrg Target RejectNegative Joined Enum(uarch_type) Var(m68k_tune_option) Init(unk_arch) 191 1.6 mrg Tune for the specified target CPU or architecture. 192 1.1 mrg 193 1.1 mrg mxgot 194 1.12 mrg Target Mask(XGOT) 195 1.6 mrg Support more than 8192 GOT entries on ColdFire. 196 1.1 mrg 197 1.1 mrg mxtls 198 1.12 mrg Target Mask(XTLS) 199 1.6 mrg Support TLS segment larger than 64K. 200
Indexes created Sun Jun 28 00:24:58 UTC 2026