nds32-intrinsic.cc revision 1.1
1 1.1 mrg /* Intrinsic functions of Andes NDS32 cpu for GNU compiler 2 1.1 mrg Copyright (C) 2012-2022 Free Software Foundation, Inc. 3 1.1 mrg Contributed by Andes Technology Corporation. 4 1.1 mrg 5 1.1 mrg This file is part of GCC. 6 1.1 mrg 7 1.1 mrg GCC is free software; you can redistribute it and/or modify it 8 1.1 mrg under the terms of the GNU General Public License as published 9 1.1 mrg by the Free Software Foundation; either version 3, or (at your 10 1.1 mrg option) any later version. 11 1.1 mrg 12 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT 13 1.1 mrg ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 1.1 mrg or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 1.1 mrg License for more details. 16 1.1 mrg 17 1.1 mrg You should have received a copy of the GNU General Public License 18 1.1 mrg along with GCC; see the file COPYING3. If not see 19 1.1 mrg <http://www.gnu.org/licenses/>. */ 20 1.1 mrg 21 1.1 mrg /* ------------------------------------------------------------------------ */ 22 1.1 mrg 23 1.1 mrg #define IN_TARGET_CODE 1 24 1.1 mrg 25 1.1 mrg #include "config.h" 26 1.1 mrg #include "system.h" 27 1.1 mrg #include "coretypes.h" 28 1.1 mrg #include "backend.h" 29 1.1 mrg #include "target.h" 30 1.1 mrg #include "rtl.h" 31 1.1 mrg #include "memmodel.h" 32 1.1 mrg #include "emit-rtl.h" 33 1.1 mrg #include "tree.h" 34 1.1 mrg #include "memmodel.h" 35 1.1 mrg #include "optabs.h" /* For GEN_FCN. */ 36 1.1 mrg #include "diagnostic-core.h" 37 1.1 mrg #include "stor-layout.h" 38 1.1 mrg #include "expr.h" 39 1.1 mrg #include "langhooks.h" /* For add_builtin_function(). */ 40 1.1 mrg #include "recog.h" 41 1.1 mrg #include "explow.h" 42 1.1 mrg 43 1.1 mrg /* ------------------------------------------------------------------------ */ 44 1.1 mrg 45 1.1 mrg /* Read the requested argument from the EXP given by INDEX. 46 1.1 mrg Return the value as an rtx. */ 47 1.1 mrg static rtx 48 1.1 mrg nds32_read_argument (tree exp, unsigned int index) 49 1.1 mrg { 50 1.1 mrg return expand_normal (CALL_EXPR_ARG (exp, index)); 51 1.1 mrg } 52 1.1 mrg 53 1.1 mrg /* Return a legitimate rtx for instruction ICODE's return value. Use TARGET 54 1.1 mrg if it's not null, has the right mode, and satisfies operand 0's 55 1.1 mrg predicate. */ 56 1.1 mrg static rtx 57 1.1 mrg nds32_legitimize_target (enum insn_code icode, rtx target) 58 1.1 mrg { 59 1.1 mrg enum machine_mode mode = insn_data[icode].operand[0].mode; 60 1.1 mrg 61 1.1 mrg if (! target 62 1.1 mrg || GET_MODE (target) != mode 63 1.1 mrg || ! (*insn_data[icode].operand[0].predicate) (target, mode)) 64 1.1 mrg return gen_reg_rtx (mode); 65 1.1 mrg else 66 1.1 mrg return target; 67 1.1 mrg } 68 1.1 mrg 69 1.1 mrg /* Given that ARG is being passed as operand OPNUM to instruction ICODE, 70 1.1 mrg check whether ARG satisfies the operand's constraints. If it doesn't, 71 1.1 mrg copy ARG to a temporary register and return that. Otherwise return ARG 72 1.1 mrg itself. */ 73 1.1 mrg static rtx 74 1.1 mrg nds32_legitimize_argument (enum insn_code icode, int opnum, rtx arg) 75 1.1 mrg { 76 1.1 mrg enum machine_mode mode = insn_data[icode].operand[opnum].mode; 77 1.1 mrg 78 1.1 mrg if ((*insn_data[icode].operand[opnum].predicate) (arg, mode)) 79 1.1 mrg return arg; 80 1.1 mrg else if (VECTOR_MODE_P (mode) && CONST_INT_P (arg)) 81 1.1 mrg { 82 1.1 mrg /* Handle CONST_INT covert to CONST_VECTOR. */ 83 1.1 mrg int nunits = GET_MODE_NUNITS (mode); 84 1.1 mrg int i, shift = 0; 85 1.1 mrg rtvec v = rtvec_alloc (nunits); 86 1.1 mrg int val = INTVAL (arg); 87 1.1 mrg enum machine_mode val_mode = (mode == V4QImode) ? QImode : HImode; 88 1.1 mrg int shift_acc = (val_mode == QImode) ? 8 : 16; 89 1.1 mrg int mask = (val_mode == QImode) ? 0xff : 0xffff; 90 1.1 mrg int tmp_val = val; 91 1.1 mrg 92 1.1 mrg if (TARGET_BIG_ENDIAN) 93 1.1 mrg for (i = 0; i < nunits; i++) 94 1.1 mrg { 95 1.1 mrg tmp_val = (val >> shift) & mask; 96 1.1 mrg RTVEC_ELT (v, nunits - i - 1) = gen_int_mode (tmp_val, val_mode); 97 1.1 mrg shift += shift_acc; 98 1.1 mrg } 99 1.1 mrg else 100 1.1 mrg for (i = 0; i < nunits; i++) 101 1.1 mrg { 102 1.1 mrg tmp_val = (val >> shift) & mask; 103 1.1 mrg RTVEC_ELT (v, i) = gen_int_mode (tmp_val, val_mode); 104 1.1 mrg shift += shift_acc; 105 1.1 mrg } 106 1.1 mrg 107 1.1 mrg return copy_to_mode_reg (mode, gen_rtx_CONST_VECTOR (mode, v)); 108 1.1 mrg } 109 1.1 mrg else 110 1.1 mrg { 111 1.1 mrg rtx tmp_rtx = gen_reg_rtx (mode); 112 1.1 mrg convert_move (tmp_rtx, arg, false); 113 1.1 mrg return tmp_rtx; 114 1.1 mrg } 115 1.1 mrg } 116 1.1 mrg 117 1.1 mrg /* Return true if OPVAL can be used for operand OPNUM of instruction ICODE. 118 1.1 mrg The instruction should require a constant operand of some sort. The 119 1.1 mrg function prints an error if OPVAL is not valid. */ 120 1.1 mrg static int 121 1.1 mrg nds32_check_constant_argument (enum insn_code icode, int opnum, rtx opval, 122 1.1 mrg const char *name) 123 1.1 mrg { 124 1.1 mrg if (GET_CODE (opval) != CONST_INT) 125 1.1 mrg { 126 1.1 mrg error ("invalid argument to built-in function %s", name); 127 1.1 mrg return false; 128 1.1 mrg } 129 1.1 mrg if (! (*insn_data[icode].operand[opnum].predicate) (opval, VOIDmode)) 130 1.1 mrg { 131 1.1 mrg error ("constant argument out of range for %s", name); 132 1.1 mrg 133 1.1 mrg return false; 134 1.1 mrg } 135 1.1 mrg return true; 136 1.1 mrg } 137 1.1 mrg 138 1.1 mrg /* Expand builtins that return target. */ 139 1.1 mrg static rtx 140 1.1 mrg nds32_expand_noarg_builtin (enum insn_code icode, rtx target) 141 1.1 mrg { 142 1.1 mrg rtx pat; 143 1.1 mrg 144 1.1 mrg target = nds32_legitimize_target (icode, target); 145 1.1 mrg 146 1.1 mrg /* Emit and return the new instruction. */ 147 1.1 mrg pat = GEN_FCN (icode) (target); 148 1.1 mrg if (! pat) 149 1.1 mrg return NULL_RTX; 150 1.1 mrg 151 1.1 mrg emit_insn (pat); 152 1.1 mrg return target; 153 1.1 mrg } 154 1.1 mrg 155 1.1 mrg /* Expand builtins that take one operand. */ 156 1.1 mrg static rtx 157 1.1 mrg nds32_expand_unop_builtin (enum insn_code icode, tree exp, rtx target, 158 1.1 mrg bool return_p) 159 1.1 mrg { 160 1.1 mrg rtx pat; 161 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 162 1.1 mrg int op0_num = return_p ? 1 : 0; 163 1.1 mrg 164 1.1 mrg if (return_p) 165 1.1 mrg target = nds32_legitimize_target (icode, target); 166 1.1 mrg 167 1.1 mrg op0 = nds32_legitimize_argument (icode, op0_num, op0); 168 1.1 mrg 169 1.1 mrg /* Emit and return the new instruction. */ 170 1.1 mrg if (return_p) 171 1.1 mrg pat = GEN_FCN (icode) (target, op0); 172 1.1 mrg else 173 1.1 mrg pat = GEN_FCN (icode) (op0); 174 1.1 mrg 175 1.1 mrg if (! pat) 176 1.1 mrg return NULL_RTX; 177 1.1 mrg 178 1.1 mrg emit_insn (pat); 179 1.1 mrg return target; 180 1.1 mrg } 181 1.1 mrg 182 1.1 mrg /* Expand builtins that take one operands and the first is immediate. */ 183 1.1 mrg static rtx 184 1.1 mrg nds32_expand_unopimm_builtin (enum insn_code icode, tree exp, rtx target, 185 1.1 mrg bool return_p, const char *name) 186 1.1 mrg { 187 1.1 mrg rtx pat; 188 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 189 1.1 mrg int op0_num = return_p ? 1 : 0; 190 1.1 mrg 191 1.1 mrg if (return_p) 192 1.1 mrg target = nds32_legitimize_target (icode, target); 193 1.1 mrg 194 1.1 mrg if (!nds32_check_constant_argument (icode, op0_num, op0, name)) 195 1.1 mrg return NULL_RTX; 196 1.1 mrg 197 1.1 mrg op0 = nds32_legitimize_argument (icode, op0_num, op0); 198 1.1 mrg 199 1.1 mrg /* Emit and return the new instruction. */ 200 1.1 mrg if (return_p) 201 1.1 mrg pat = GEN_FCN (icode) (target, op0); 202 1.1 mrg else 203 1.1 mrg pat = GEN_FCN (icode) (op0); 204 1.1 mrg 205 1.1 mrg if (! pat) 206 1.1 mrg return NULL_RTX; 207 1.1 mrg 208 1.1 mrg emit_insn (pat); 209 1.1 mrg return target; 210 1.1 mrg } 211 1.1 mrg 212 1.1 mrg /* Expand builtins that take two operands. */ 213 1.1 mrg static rtx 214 1.1 mrg nds32_expand_binop_builtin (enum insn_code icode, tree exp, rtx target, 215 1.1 mrg bool return_p) 216 1.1 mrg { 217 1.1 mrg rtx pat; 218 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 219 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 220 1.1 mrg int op0_num = return_p ? 1 : 0; 221 1.1 mrg int op1_num = return_p ? 2 : 1; 222 1.1 mrg 223 1.1 mrg if (return_p) 224 1.1 mrg target = nds32_legitimize_target (icode, target); 225 1.1 mrg 226 1.1 mrg op0 = nds32_legitimize_argument (icode, op0_num, op0); 227 1.1 mrg op1 = nds32_legitimize_argument (icode, op1_num, op1); 228 1.1 mrg 229 1.1 mrg /* Emit and return the new instruction. */ 230 1.1 mrg if (return_p) 231 1.1 mrg pat = GEN_FCN (icode) (target, op0, op1); 232 1.1 mrg else 233 1.1 mrg pat = GEN_FCN (icode) (op0, op1); 234 1.1 mrg 235 1.1 mrg if (! pat) 236 1.1 mrg return NULL_RTX; 237 1.1 mrg 238 1.1 mrg emit_insn (pat); 239 1.1 mrg return target; 240 1.1 mrg } 241 1.1 mrg 242 1.1 mrg /* Expand builtins that take two operands and the second is immediate. */ 243 1.1 mrg static rtx 244 1.1 mrg nds32_expand_binopimm_builtin (enum insn_code icode, tree exp, rtx target, 245 1.1 mrg bool return_p, const char *name) 246 1.1 mrg { 247 1.1 mrg rtx pat; 248 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 249 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 250 1.1 mrg int op0_num = return_p ? 1 : 0; 251 1.1 mrg int op1_num = return_p ? 2 : 1; 252 1.1 mrg 253 1.1 mrg if (return_p) 254 1.1 mrg target = nds32_legitimize_target (icode, target); 255 1.1 mrg 256 1.1 mrg if (!nds32_check_constant_argument (icode, op1_num, op1, name)) 257 1.1 mrg return NULL_RTX; 258 1.1 mrg 259 1.1 mrg op0 = nds32_legitimize_argument (icode, op0_num, op0); 260 1.1 mrg op1 = nds32_legitimize_argument (icode, op1_num, op1); 261 1.1 mrg 262 1.1 mrg /* Emit and return the new instruction. */ 263 1.1 mrg if (return_p) 264 1.1 mrg pat = GEN_FCN (icode) (target, op0, op1); 265 1.1 mrg else 266 1.1 mrg pat = GEN_FCN (icode) (op0, op1); 267 1.1 mrg 268 1.1 mrg if (! pat) 269 1.1 mrg return NULL_RTX; 270 1.1 mrg 271 1.1 mrg emit_insn (pat); 272 1.1 mrg return target; 273 1.1 mrg } 274 1.1 mrg 275 1.1 mrg /* Expand builtins that take three operands. */ 276 1.1 mrg static rtx 277 1.1 mrg nds32_expand_triop_builtin (enum insn_code icode, tree exp, rtx target, 278 1.1 mrg bool return_p) 279 1.1 mrg { 280 1.1 mrg rtx pat; 281 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 282 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 283 1.1 mrg rtx op2 = nds32_read_argument (exp, 2); 284 1.1 mrg int op0_num = return_p ? 1 : 0; 285 1.1 mrg int op1_num = return_p ? 2 : 1; 286 1.1 mrg int op2_num = return_p ? 3 : 2; 287 1.1 mrg 288 1.1 mrg if (return_p) 289 1.1 mrg target = nds32_legitimize_target (icode, target); 290 1.1 mrg 291 1.1 mrg op0 = nds32_legitimize_argument (icode, op0_num, op0); 292 1.1 mrg op1 = nds32_legitimize_argument (icode, op1_num, op1); 293 1.1 mrg op2 = nds32_legitimize_argument (icode, op2_num, op2); 294 1.1 mrg 295 1.1 mrg /* Emit and return the new instruction. */ 296 1.1 mrg if (return_p) 297 1.1 mrg pat = GEN_FCN (icode) (target, op0, op1, op2); 298 1.1 mrg else 299 1.1 mrg pat = GEN_FCN (icode) (op0, op1, op2); 300 1.1 mrg 301 1.1 mrg if (! pat) 302 1.1 mrg return NULL_RTX; 303 1.1 mrg 304 1.1 mrg emit_insn (pat); 305 1.1 mrg return target; 306 1.1 mrg } 307 1.1 mrg 308 1.1 mrg /* Expand builtins that take three operands and the third is immediate. */ 309 1.1 mrg static rtx 310 1.1 mrg nds32_expand_triopimm_builtin (enum insn_code icode, tree exp, rtx target, 311 1.1 mrg bool return_p, const char *name) 312 1.1 mrg { 313 1.1 mrg rtx pat; 314 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 315 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 316 1.1 mrg rtx op2 = nds32_read_argument (exp, 2); 317 1.1 mrg int op0_num = return_p ? 1 : 0; 318 1.1 mrg int op1_num = return_p ? 2 : 1; 319 1.1 mrg int op2_num = return_p ? 3 : 2; 320 1.1 mrg 321 1.1 mrg if (return_p) 322 1.1 mrg target = nds32_legitimize_target (icode, target); 323 1.1 mrg 324 1.1 mrg if (!nds32_check_constant_argument (icode, op2_num, op2, name)) 325 1.1 mrg return NULL_RTX; 326 1.1 mrg 327 1.1 mrg op0 = nds32_legitimize_argument (icode, op0_num, op0); 328 1.1 mrg op1 = nds32_legitimize_argument (icode, op1_num, op1); 329 1.1 mrg op2 = nds32_legitimize_argument (icode, op2_num, op2); 330 1.1 mrg 331 1.1 mrg /* Emit and return the new instruction. */ 332 1.1 mrg if (return_p) 333 1.1 mrg pat = GEN_FCN (icode) (target, op0, op1, op2); 334 1.1 mrg else 335 1.1 mrg pat = GEN_FCN (icode) (op0, op1, op2); 336 1.1 mrg 337 1.1 mrg if (! pat) 338 1.1 mrg return NULL_RTX; 339 1.1 mrg 340 1.1 mrg emit_insn (pat); 341 1.1 mrg return target; 342 1.1 mrg } 343 1.1 mrg 344 1.1 mrg /* Expand builtins for load. */ 345 1.1 mrg static rtx 346 1.1 mrg nds32_expand_builtin_load (enum insn_code icode, tree exp, rtx target) 347 1.1 mrg { 348 1.1 mrg /* Load address format is [$ra + $rb], 349 1.1 mrg but input arguments not enough, 350 1.1 mrg so we need another temp register as $rb. 351 1.1 mrg Generating assembly code: 352 1.1 mrg movi $temp, 0 353 1.1 mrg llw $rt, [$ra + $temp] */ 354 1.1 mrg rtx pat; 355 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 356 1.1 mrg rtx addr_helper = gen_reg_rtx (insn_data[icode].operand[1].mode); 357 1.1 mrg 358 1.1 mrg target = nds32_legitimize_target (icode, target); 359 1.1 mrg op0 = nds32_legitimize_argument (icode, 1, op0); 360 1.1 mrg 361 1.1 mrg /* Emit and return the new instruction. */ 362 1.1 mrg pat = GEN_FCN (icode) (target, op0, addr_helper); 363 1.1 mrg if (!pat) 364 1.1 mrg return NULL_RTX; 365 1.1 mrg 366 1.1 mrg emit_move_insn (addr_helper, GEN_INT (0)); 367 1.1 mrg emit_insn (pat); 368 1.1 mrg return target; 369 1.1 mrg } 370 1.1 mrg 371 1.1 mrg /* Expand builtins for store. */ 372 1.1 mrg static rtx 373 1.1 mrg nds32_expand_builtin_store (enum insn_code icode, tree exp, rtx target) 374 1.1 mrg { 375 1.1 mrg /* Store address format is [$ra + $rb], 376 1.1 mrg but input arguments not enough, 377 1.1 mrg so we need another temp register as $rb. 378 1.1 mrg Generating assembly code: 379 1.1 mrg movi $temp, 0 380 1.1 mrg store $rt, [$ra + $temp] */ 381 1.1 mrg rtx pat; 382 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 383 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 384 1.1 mrg rtx addr_helper = gen_reg_rtx (insn_data[icode].operand[1].mode); 385 1.1 mrg 386 1.1 mrg op0 = nds32_legitimize_argument (icode, 0, op0); 387 1.1 mrg op1 = nds32_legitimize_argument (icode, 2, op1); 388 1.1 mrg 389 1.1 mrg /* Emit and return the new instruction. */ 390 1.1 mrg pat = GEN_FCN (icode) (op0, addr_helper, op1); 391 1.1 mrg if (! pat) 392 1.1 mrg return NULL_RTX; 393 1.1 mrg 394 1.1 mrg emit_move_insn (addr_helper, GEN_INT (0)); 395 1.1 mrg emit_insn (pat); 396 1.1 mrg return target; 397 1.1 mrg } 398 1.1 mrg 399 1.1 mrg /* Expand cctl builtins. */ 400 1.1 mrg static rtx 401 1.1 mrg nds32_expand_cctl_builtin (enum insn_code icode, tree exp, rtx target, 402 1.1 mrg bool return_p, const char *name) 403 1.1 mrg { 404 1.1 mrg rtx pat; 405 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 406 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 407 1.1 mrg int op0_num = return_p ? 1 : 0; 408 1.1 mrg int op1_num = return_p ? 2 : 1; 409 1.1 mrg 410 1.1 mrg if (return_p) 411 1.1 mrg target = nds32_legitimize_target (icode, target); 412 1.1 mrg 413 1.1 mrg if (!nds32_check_constant_argument (icode, op0_num, op0, name)) 414 1.1 mrg return NULL_RTX; 415 1.1 mrg 416 1.1 mrg op0 = nds32_legitimize_argument (icode, op0_num, op0); 417 1.1 mrg op1 = nds32_legitimize_argument (icode, op1_num, op1); 418 1.1 mrg 419 1.1 mrg /* Emit and return the new instruction. */ 420 1.1 mrg if (icode == CODE_FOR_cctl_idx_write) 421 1.1 mrg { 422 1.1 mrg /* cctl_idx_write is three argument, 423 1.1 mrg so create operand2 for cctl_idx_write pattern. */ 424 1.1 mrg rtx op2 = nds32_read_argument (exp, 2); 425 1.1 mrg op2 = nds32_legitimize_argument (icode, 2, op2); 426 1.1 mrg pat = GEN_FCN (icode) (op0, op1, op2); 427 1.1 mrg } 428 1.1 mrg else if (return_p) 429 1.1 mrg pat = GEN_FCN (icode) (target, op0, op1); 430 1.1 mrg else 431 1.1 mrg pat = GEN_FCN (icode) (op0, op1); 432 1.1 mrg 433 1.1 mrg if (! pat) 434 1.1 mrg return NULL_RTX; 435 1.1 mrg 436 1.1 mrg emit_insn (pat); 437 1.1 mrg return target; 438 1.1 mrg } 439 1.1 mrg 440 1.1 mrg /* Expand scw builtins. */ 441 1.1 mrg static rtx 442 1.1 mrg nds32_expand_scw_builtin (enum insn_code icode, tree exp, rtx target) 443 1.1 mrg { 444 1.1 mrg /* SCW address format is [$ra + $rb], but input arguments not enough, 445 1.1 mrg so we need another temp register as $rb. 446 1.1 mrg Generating assembly code: 447 1.1 mrg movi $temp, 0 448 1.1 mrg scw $rt, [$ra + $temp] */ 449 1.1 mrg rtx pat; 450 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 451 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 452 1.1 mrg rtx addr_helper = gen_reg_rtx (insn_data[icode].operand[1].mode); 453 1.1 mrg 454 1.1 mrg target = nds32_legitimize_target (icode, target); 455 1.1 mrg op0 = nds32_legitimize_argument (icode, 1, op0); 456 1.1 mrg op1 = nds32_legitimize_argument (icode, 2, op1); 457 1.1 mrg 458 1.1 mrg /* Emit and return the new instruction. */ 459 1.1 mrg pat = GEN_FCN (icode) (target, op0, addr_helper, target); 460 1.1 mrg 461 1.1 mrg if (!pat) 462 1.1 mrg return NULL_RTX; 463 1.1 mrg 464 1.1 mrg emit_move_insn (addr_helper, GEN_INT (0)); 465 1.1 mrg emit_move_insn (target, op1); 466 1.1 mrg emit_insn (pat); 467 1.1 mrg return target; 468 1.1 mrg } 469 1.1 mrg 470 1.1 mrg /* Expand set int priority builtins. */ 471 1.1 mrg static rtx 472 1.1 mrg nds32_expand_priority_builtin (enum insn_code icode, tree exp, rtx target, 473 1.1 mrg const char *name) 474 1.1 mrg { 475 1.1 mrg rtx pat; 476 1.1 mrg rtx op0 = nds32_read_argument (exp, 0); 477 1.1 mrg rtx op1 = nds32_read_argument (exp, 1); 478 1.1 mrg 479 1.1 mrg /* set_int_priority intrinsic function that two arguments are immediate, 480 1.1 mrg so check whether auguments are immedite. */ 481 1.1 mrg 482 1.1 mrg if (!nds32_check_constant_argument (icode, 0, op0, name)) 483 1.1 mrg return NULL_RTX; 484 1.1 mrg 485 1.1 mrg if (!nds32_check_constant_argument (icode, 1, op1, name)) 486 1.1 mrg return NULL_RTX; 487 1.1 mrg 488 1.1 mrg op0 = nds32_legitimize_argument (icode, 0, op0); 489 1.1 mrg op1 = nds32_legitimize_argument (icode, 1, op1); 490 1.1 mrg 491 1.1 mrg /* Emit and return the new instruction. */ 492 1.1 mrg pat = GEN_FCN (icode) (op0, op1); 493 1.1 mrg 494 1.1 mrg if (! pat) 495 1.1 mrg return NULL_RTX; 496 1.1 mrg 497 1.1 mrg emit_insn (pat); 498 1.1 mrg return target; 499 1.1 mrg } 500 1.1 mrg 501 1.1 mrg struct builtin_description 502 1.1 mrg { 503 1.1 mrg const enum insn_code icode; 504 1.1 mrg const char *name; 505 1.1 mrg enum nds32_builtins code; 506 1.1 mrg bool return_p; 507 1.1 mrg }; 508 1.1 mrg 509 1.1 mrg #define NDS32_BUILTIN(code, string, builtin) \ 510 1.1 mrg { CODE_FOR_##code, "__nds32__" string, \ 511 1.1 mrg NDS32_BUILTIN_##builtin, true }, 512 1.1 mrg 513 1.1 mrg #define NDS32_NO_TARGET_BUILTIN(code, string, builtin) \ 514 1.1 mrg { CODE_FOR_##code, "__nds32__" string, \ 515 1.1 mrg NDS32_BUILTIN_##builtin, false }, 516 1.1 mrg 517 1.1 mrg /* Intrinsics that no argument, and that return value. */ 518 1.1 mrg static struct builtin_description bdesc_noarg[] = 519 1.1 mrg { 520 1.1 mrg NDS32_BUILTIN(unspec_fmfcfg, "fmfcfg", FMFCFG) 521 1.1 mrg NDS32_BUILTIN(unspec_fmfcsr, "fmfcsr", FMFCSR) 522 1.1 mrg NDS32_BUILTIN(unspec_volatile_rdov, "rdov", RDOV) 523 1.1 mrg NDS32_BUILTIN(unspec_get_current_sp, "get_current_sp", GET_CURRENT_SP) 524 1.1 mrg NDS32_BUILTIN(unspec_return_address, "return_address", RETURN_ADDRESS) 525 1.1 mrg NDS32_BUILTIN(unspec_get_all_pending_int, "get_all_pending_int", 526 1.1 mrg GET_ALL_PENDING_INT) 527 1.1 mrg NDS32_BUILTIN(unspec_unaligned_feature, "unaligned_feature", 528 1.1 mrg UNALIGNED_FEATURE) 529 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_enable_unaligned, "enable_unaligned", 530 1.1 mrg ENABLE_UNALIGNED) 531 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_disable_unaligned, "disable_unaligned", 532 1.1 mrg DISABLE_UNALIGNED) 533 1.1 mrg }; 534 1.1 mrg 535 1.1 mrg /* Intrinsics that take just one argument. */ 536 1.1 mrg static struct builtin_description bdesc_1arg[] = 537 1.1 mrg { 538 1.1 mrg NDS32_BUILTIN(unspec_ssabssi2, "abs", ABS) 539 1.1 mrg NDS32_BUILTIN(clzsi2, "clz", CLZ) 540 1.1 mrg NDS32_BUILTIN(unspec_clo, "clo", CLO) 541 1.1 mrg NDS32_BUILTIN(unspec_wsbh, "wsbh", WSBH) 542 1.1 mrg NDS32_BUILTIN(unspec_tlbop_pb, "tlbop_pb",TLBOP_PB) 543 1.1 mrg NDS32_BUILTIN(unaligned_load_hw, "unaligned_load_hw", UALOAD_HW) 544 1.1 mrg NDS32_BUILTIN(unaligned_loadsi, "unaligned_load_w", UALOAD_W) 545 1.1 mrg NDS32_BUILTIN(unaligned_loaddi, "unaligned_load_dw", UALOAD_DW) 546 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_volatile_isync, "isync", ISYNC) 547 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_fmtcsr, "fmtcsr", FMTCSR) 548 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_jr_itoff, "jr_itoff", JR_ITOFF) 549 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_jr_toff, "jr_toff", JR_TOFF) 550 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_jral_ton, "jral_ton", JRAL_TON) 551 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_ret_toff, "ret_toff", RET_TOFF) 552 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_jral_iton, "jral_iton",JRAL_ITON) 553 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_tlbop_trd, "tlbop_trd", TLBOP_TRD) 554 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_tlbop_twr, "tlbop_twr", TLBOP_TWR) 555 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_tlbop_rwr, "tlbop_rwr", TLBOP_RWR) 556 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_tlbop_rwlk, "tlbop_rwlk", TLBOP_RWLK) 557 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_tlbop_unlk, "tlbop_unlk", TLBOP_UNLK) 558 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_tlbop_inv, "tlbop_inv", TLBOP_INV) 559 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_ret_itoff, "ret_itoff", RET_ITOFF) 560 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_set_current_sp, 561 1.1 mrg "set_current_sp", SET_CURRENT_SP) 562 1.1 mrg NDS32_BUILTIN(kabsv2hi2, "kabs16", KABS16) 563 1.1 mrg NDS32_BUILTIN(kabsv2hi2, "v_kabs16", V_KABS16) 564 1.1 mrg NDS32_BUILTIN(kabsv4qi2, "kabs8", KABS8) 565 1.1 mrg NDS32_BUILTIN(kabsv4qi2, "v_kabs8", V_KABS8) 566 1.1 mrg NDS32_BUILTIN(sunpkd810, "sunpkd810", SUNPKD810) 567 1.1 mrg NDS32_BUILTIN(sunpkd810, "v_sunpkd810", V_SUNPKD810) 568 1.1 mrg NDS32_BUILTIN(sunpkd820, "sunpkd820", SUNPKD820) 569 1.1 mrg NDS32_BUILTIN(sunpkd820, "v_sunpkd820", V_SUNPKD820) 570 1.1 mrg NDS32_BUILTIN(sunpkd830, "sunpkd830", SUNPKD830) 571 1.1 mrg NDS32_BUILTIN(sunpkd830, "v_sunpkd830", V_SUNPKD830) 572 1.1 mrg NDS32_BUILTIN(sunpkd831, "sunpkd831", SUNPKD831) 573 1.1 mrg NDS32_BUILTIN(sunpkd831, "v_sunpkd831", V_SUNPKD831) 574 1.1 mrg NDS32_BUILTIN(zunpkd810, "zunpkd810", ZUNPKD810) 575 1.1 mrg NDS32_BUILTIN(zunpkd810, "v_zunpkd810", V_ZUNPKD810) 576 1.1 mrg NDS32_BUILTIN(zunpkd820, "zunpkd820", ZUNPKD820) 577 1.1 mrg NDS32_BUILTIN(zunpkd820, "v_zunpkd820", V_ZUNPKD820) 578 1.1 mrg NDS32_BUILTIN(zunpkd830, "zunpkd830", ZUNPKD830) 579 1.1 mrg NDS32_BUILTIN(zunpkd830, "v_zunpkd830", V_ZUNPKD830) 580 1.1 mrg NDS32_BUILTIN(zunpkd831, "zunpkd831", ZUNPKD831) 581 1.1 mrg NDS32_BUILTIN(zunpkd831, "v_zunpkd831", V_ZUNPKD831) 582 1.1 mrg NDS32_BUILTIN(unspec_kabs, "kabs", KABS) 583 1.1 mrg NDS32_BUILTIN(unaligned_loadv2hi, "get_unaligned_u16x2", UALOAD_U16) 584 1.1 mrg NDS32_BUILTIN(unaligned_loadv2hi, "get_unaligned_s16x2", UALOAD_S16) 585 1.1 mrg NDS32_BUILTIN(unaligned_loadv4qi, "get_unaligned_u8x4", UALOAD_U8) 586 1.1 mrg NDS32_BUILTIN(unaligned_loadv4qi, "get_unaligned_s8x4", UALOAD_S8) 587 1.1 mrg }; 588 1.1 mrg 589 1.1 mrg /* Intrinsics that take just one argument. and the argument is immediate. */ 590 1.1 mrg static struct builtin_description bdesc_1argimm[] = 591 1.1 mrg { 592 1.1 mrg NDS32_BUILTIN(unspec_volatile_mfsr, "mfsr", MFSR) 593 1.1 mrg NDS32_BUILTIN(unspec_volatile_mfusr, "mfsr", MFUSR) 594 1.1 mrg NDS32_BUILTIN(unspec_get_pending_int, "get_pending_int", GET_PENDING_INT) 595 1.1 mrg NDS32_BUILTIN(unspec_get_int_priority, "get_int_priority", GET_INT_PRIORITY) 596 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_trap, "trap", TRAP) 597 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_break, "break", BREAK) 598 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_syscall, "syscall", SYSCALL) 599 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_enable_int, "enable_int", ENABLE_INT) 600 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_disable_int, "disable_int", DISABLE_INT) 601 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_clr_pending_hwint, "clr_pending_hwint", 602 1.1 mrg CLR_PENDING_HWINT) 603 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_set_trig_level, "set_trig_level", 604 1.1 mrg SET_TRIG_LEVEL) 605 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_set_trig_edge, "set_trig_edge", 606 1.1 mrg SET_TRIG_EDGE) 607 1.1 mrg NDS32_BUILTIN(unspec_get_trig_type, "get_trig_type", GET_TRIG_TYPE) 608 1.1 mrg }; 609 1.1 mrg 610 1.1 mrg /* Intrinsics that take two arguments. */ 611 1.1 mrg static struct builtin_description bdesc_2arg[] = 612 1.1 mrg { 613 1.1 mrg NDS32_BUILTIN(unspec_fcpynss, "fcpynss", FCPYNSS) 614 1.1 mrg NDS32_BUILTIN(unspec_fcpyss, "fcpyss", FCPYSS) 615 1.1 mrg NDS32_BUILTIN(unspec_fcpynsd, "fcpynsd", FCPYNSD) 616 1.1 mrg NDS32_BUILTIN(unspec_fcpysd, "fcpysd", FCPYSD) 617 1.1 mrg NDS32_BUILTIN(unspec_ave, "ave", AVE) 618 1.1 mrg NDS32_BUILTIN(unspec_pbsad, "pbsad", PBSAD) 619 1.1 mrg NDS32_BUILTIN(unspec_ffb, "ffb", FFB) 620 1.1 mrg NDS32_BUILTIN(unspec_ffmism, "ffmsim", FFMISM) 621 1.1 mrg NDS32_BUILTIN(unspec_flmism, "flmism", FLMISM) 622 1.1 mrg NDS32_BUILTIN(unspec_kaddw, "kaddw", KADDW) 623 1.1 mrg NDS32_BUILTIN(unspec_kaddh, "kaddh", KADDH) 624 1.1 mrg NDS32_BUILTIN(unspec_ksubw, "ksubw", KSUBW) 625 1.1 mrg NDS32_BUILTIN(unspec_ksubh, "ksubh", KSUBH) 626 1.1 mrg NDS32_BUILTIN(unspec_kdmbb, "kdmbb", KDMBB) 627 1.1 mrg NDS32_BUILTIN(unspec_kdmbb, "v_kdmbb", V_KDMBB) 628 1.1 mrg NDS32_BUILTIN(unspec_kdmbt, "kdmbt", KDMBT) 629 1.1 mrg NDS32_BUILTIN(unspec_kdmbt, "v_kdmbt", V_KDMBT) 630 1.1 mrg NDS32_BUILTIN(unspec_kdmtb, "kdmtb", KDMTB) 631 1.1 mrg NDS32_BUILTIN(unspec_kdmtb, "v_kdmtb", V_KDMTB) 632 1.1 mrg NDS32_BUILTIN(unspec_kdmtt, "kdmtt", KDMTT) 633 1.1 mrg NDS32_BUILTIN(unspec_kdmtt, "v_kdmtt", V_KDMTT) 634 1.1 mrg NDS32_BUILTIN(unspec_khmbb, "khmbb", KHMBB) 635 1.1 mrg NDS32_BUILTIN(unspec_khmbb, "v_khmbb", V_KHMBB) 636 1.1 mrg NDS32_BUILTIN(unspec_khmbt, "khmbt", KHMBT) 637 1.1 mrg NDS32_BUILTIN(unspec_khmbt, "v_khmbt", V_KHMBT) 638 1.1 mrg NDS32_BUILTIN(unspec_khmtb, "khmtb", KHMTB) 639 1.1 mrg NDS32_BUILTIN(unspec_khmtb, "v_khmtb", V_KHMTB) 640 1.1 mrg NDS32_BUILTIN(unspec_khmtt, "khmtt", KHMTT) 641 1.1 mrg NDS32_BUILTIN(unspec_khmtt, "v_khmtt", V_KHMTT) 642 1.1 mrg NDS32_BUILTIN(unspec_kslraw, "kslraw", KSLRAW) 643 1.1 mrg NDS32_BUILTIN(unspec_kslrawu, "kslraw_u", KSLRAW_U) 644 1.1 mrg NDS32_BUILTIN(rotrsi3, "rotr", ROTR) 645 1.1 mrg NDS32_BUILTIN(unspec_sva, "sva", SVA) 646 1.1 mrg NDS32_BUILTIN(unspec_svs, "svs", SVS) 647 1.1 mrg NDS32_NO_TARGET_BUILTIN(mtsr_isb, "mtsr_isb", MTSR_ISB) 648 1.1 mrg NDS32_NO_TARGET_BUILTIN(mtsr_dsb, "mtsr_dsb", MTSR_DSB) 649 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_volatile_mtsr, "mtsr", MTSR) 650 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_volatile_mtusr, "mtusr", MTUSR) 651 1.1 mrg NDS32_NO_TARGET_BUILTIN(unaligned_store_hw, "unaligned_store_hw", UASTORE_HW) 652 1.1 mrg NDS32_NO_TARGET_BUILTIN(unaligned_storesi, "unaligned_store_hw", UASTORE_W) 653 1.1 mrg NDS32_NO_TARGET_BUILTIN(unaligned_storedi, "unaligned_store_hw", UASTORE_DW) 654 1.1 mrg NDS32_BUILTIN(addv2hi3, "add16", ADD16) 655 1.1 mrg NDS32_BUILTIN(addv2hi3, "v_uadd16", V_UADD16) 656 1.1 mrg NDS32_BUILTIN(addv2hi3, "v_sadd16", V_SADD16) 657 1.1 mrg NDS32_BUILTIN(raddv2hi3, "radd16", RADD16) 658 1.1 mrg NDS32_BUILTIN(raddv2hi3, "v_radd16", V_RADD16) 659 1.1 mrg NDS32_BUILTIN(uraddv2hi3, "uradd16", URADD16) 660 1.1 mrg NDS32_BUILTIN(uraddv2hi3, "v_uradd16", V_URADD16) 661 1.1 mrg NDS32_BUILTIN(kaddv2hi3, "kadd16", KADD16) 662 1.1 mrg NDS32_BUILTIN(kaddv2hi3, "v_kadd16", V_KADD16) 663 1.1 mrg NDS32_BUILTIN(ukaddv2hi3, "ukadd16", UKADD16) 664 1.1 mrg NDS32_BUILTIN(ukaddv2hi3, "v_ukadd16", V_UKADD16) 665 1.1 mrg NDS32_BUILTIN(subv2hi3, "sub16", SUB16) 666 1.1 mrg NDS32_BUILTIN(subv2hi3, "v_usub16", V_USUB16) 667 1.1 mrg NDS32_BUILTIN(subv2hi3, "v_ssub16", V_SSUB16) 668 1.1 mrg NDS32_BUILTIN(rsubv2hi3, "rsub16", RSUB16) 669 1.1 mrg NDS32_BUILTIN(rsubv2hi3, "v_rsub16", V_RSUB16) 670 1.1 mrg NDS32_BUILTIN(ursubv2hi3, "ursub16", URSUB16) 671 1.1 mrg NDS32_BUILTIN(ursubv2hi3, "v_ursub16", V_URSUB16) 672 1.1 mrg NDS32_BUILTIN(ksubv2hi3, "ksub16", KSUB16) 673 1.1 mrg NDS32_BUILTIN(ksubv2hi3, "v_ksub16", V_KSUB16) 674 1.1 mrg NDS32_BUILTIN(uksubv2hi3, "uksub16", UKSUB16) 675 1.1 mrg NDS32_BUILTIN(uksubv2hi3, "v_uksub16", V_UKSUB16) 676 1.1 mrg NDS32_BUILTIN(cras16_1, "cras16", CRAS16) 677 1.1 mrg NDS32_BUILTIN(cras16_1, "v_ucras16", V_UCRAS16) 678 1.1 mrg NDS32_BUILTIN(cras16_1, "v_scras16", V_SCRAS16) 679 1.1 mrg NDS32_BUILTIN(rcras16_1, "rcras16", RCRAS16) 680 1.1 mrg NDS32_BUILTIN(rcras16_1, "v_rcras16", V_RCRAS16) 681 1.1 mrg NDS32_BUILTIN(urcras16_1, "urcras16", URCRAS16) 682 1.1 mrg NDS32_BUILTIN(urcras16_1, "v_urcras16", V_URCRAS16) 683 1.1 mrg NDS32_BUILTIN(kcras16_1, "kcras16", KCRAS16) 684 1.1 mrg NDS32_BUILTIN(kcras16_1, "v_kcras16", V_KCRAS16) 685 1.1 mrg NDS32_BUILTIN(ukcras16_1, "ukcras16", UKCRAS16) 686 1.1 mrg NDS32_BUILTIN(ukcras16_1, "v_ukcras16", V_UKCRAS16) 687 1.1 mrg NDS32_BUILTIN(crsa16_1, "crsa16", CRSA16) 688 1.1 mrg NDS32_BUILTIN(crsa16_1, "v_ucrsa16", V_UCRSA16) 689 1.1 mrg NDS32_BUILTIN(crsa16_1, "v_scrsa16", V_SCRSA16) 690 1.1 mrg NDS32_BUILTIN(rcrsa16_1, "rcrsa16", RCRSA16) 691 1.1 mrg NDS32_BUILTIN(rcrsa16_1, "v_rcrsa16", V_RCRSA16) 692 1.1 mrg NDS32_BUILTIN(urcrsa16_1, "urcrsa16", URCRSA16) 693 1.1 mrg NDS32_BUILTIN(urcrsa16_1, "v_urcrsa16", V_URCRSA16) 694 1.1 mrg NDS32_BUILTIN(kcrsa16_1, "kcrsa16", KCRSA16) 695 1.1 mrg NDS32_BUILTIN(kcrsa16_1, "v_kcrsa16", V_KCRSA16) 696 1.1 mrg NDS32_BUILTIN(ukcrsa16_1, "ukcrsa16", UKCRSA16) 697 1.1 mrg NDS32_BUILTIN(ukcrsa16_1, "v_ukcrsa16", V_UKCRSA16) 698 1.1 mrg NDS32_BUILTIN(addv4qi3, "add8", ADD8) 699 1.1 mrg NDS32_BUILTIN(addv4qi3, "v_uadd8", V_UADD8) 700 1.1 mrg NDS32_BUILTIN(addv4qi3, "v_sadd8", V_SADD8) 701 1.1 mrg NDS32_BUILTIN(raddv4qi3, "radd8", RADD8) 702 1.1 mrg NDS32_BUILTIN(raddv4qi3, "v_radd8", V_RADD8) 703 1.1 mrg NDS32_BUILTIN(uraddv4qi3, "uradd8", URADD8) 704 1.1 mrg NDS32_BUILTIN(uraddv4qi3, "v_uradd8", V_URADD8) 705 1.1 mrg NDS32_BUILTIN(kaddv4qi3, "kadd8", KADD8) 706 1.1 mrg NDS32_BUILTIN(kaddv4qi3, "v_kadd8", V_KADD8) 707 1.1 mrg NDS32_BUILTIN(ukaddv4qi3, "ukadd8", UKADD8) 708 1.1 mrg NDS32_BUILTIN(ukaddv4qi3, "v_ukadd8", V_UKADD8) 709 1.1 mrg NDS32_BUILTIN(subv4qi3, "sub8", SUB8) 710 1.1 mrg NDS32_BUILTIN(subv4qi3, "v_usub8", V_USUB8) 711 1.1 mrg NDS32_BUILTIN(subv4qi3, "v_ssub8", V_SSUB8) 712 1.1 mrg NDS32_BUILTIN(rsubv4qi3, "rsub8", RSUB8) 713 1.1 mrg NDS32_BUILTIN(rsubv4qi3, "v_rsub8", V_RSUB8) 714 1.1 mrg NDS32_BUILTIN(ursubv4qi3, "ursub8", URSUB8) 715 1.1 mrg NDS32_BUILTIN(ursubv4qi3, "v_ursub8", V_URSUB8) 716 1.1 mrg NDS32_BUILTIN(ksubv4qi3, "ksub8", KSUB8) 717 1.1 mrg NDS32_BUILTIN(ksubv4qi3, "v_ksub8", V_KSUB8) 718 1.1 mrg NDS32_BUILTIN(uksubv4qi3, "uksub8", UKSUB8) 719 1.1 mrg NDS32_BUILTIN(uksubv4qi3, "v_uksub8", V_UKSUB8) 720 1.1 mrg NDS32_BUILTIN(ashrv2hi3, "sra16", SRA16) 721 1.1 mrg NDS32_BUILTIN(ashrv2hi3, "v_sra16", V_SRA16) 722 1.1 mrg NDS32_BUILTIN(sra16_round, "sra16_u", SRA16_U) 723 1.1 mrg NDS32_BUILTIN(sra16_round, "v_sra16_u", V_SRA16_U) 724 1.1 mrg NDS32_BUILTIN(lshrv2hi3, "srl16", SRL16) 725 1.1 mrg NDS32_BUILTIN(lshrv2hi3, "v_srl16", V_SRL16) 726 1.1 mrg NDS32_BUILTIN(srl16_round, "srl16_u", SRL16_U) 727 1.1 mrg NDS32_BUILTIN(srl16_round, "v_srl16_u", V_SRL16_U) 728 1.1 mrg NDS32_BUILTIN(ashlv2hi3, "sll16", SLL16) 729 1.1 mrg NDS32_BUILTIN(ashlv2hi3, "v_sll16", V_SLL16) 730 1.1 mrg NDS32_BUILTIN(kslli16, "ksll16", KSLL16) 731 1.1 mrg NDS32_BUILTIN(kslli16, "v_ksll16", V_KSLL16) 732 1.1 mrg NDS32_BUILTIN(kslra16, "kslra16", KSLRA16) 733 1.1 mrg NDS32_BUILTIN(kslra16, "v_kslra16", V_KSLRA16) 734 1.1 mrg NDS32_BUILTIN(kslra16_round, "kslra16_u", KSLRA16_U) 735 1.1 mrg NDS32_BUILTIN(kslra16_round, "v_kslra16_u", V_KSLRA16_U) 736 1.1 mrg NDS32_BUILTIN(cmpeq16, "cmpeq16", CMPEQ16) 737 1.1 mrg NDS32_BUILTIN(cmpeq16, "v_scmpeq16", V_SCMPEQ16) 738 1.1 mrg NDS32_BUILTIN(cmpeq16, "v_ucmpeq16", V_UCMPEQ16) 739 1.1 mrg NDS32_BUILTIN(scmplt16, "scmplt16", SCMPLT16) 740 1.1 mrg NDS32_BUILTIN(scmplt16, "v_scmplt16", V_SCMPLT16) 741 1.1 mrg NDS32_BUILTIN(scmple16, "scmple16", SCMPLE16) 742 1.1 mrg NDS32_BUILTIN(scmple16, "v_scmple16", V_SCMPLE16) 743 1.1 mrg NDS32_BUILTIN(ucmplt16, "ucmplt16", UCMPLT16) 744 1.1 mrg NDS32_BUILTIN(ucmplt16, "v_ucmplt16", V_UCMPLT16) 745 1.1 mrg NDS32_BUILTIN(ucmplt16, "ucmple16", UCMPLE16) 746 1.1 mrg NDS32_BUILTIN(ucmplt16, "v_ucmple16", V_UCMPLE16) 747 1.1 mrg NDS32_BUILTIN(cmpeq8, "cmpeq8", CMPEQ8) 748 1.1 mrg NDS32_BUILTIN(cmpeq8, "v_scmpeq8", V_SCMPEQ8) 749 1.1 mrg NDS32_BUILTIN(cmpeq8, "v_ucmpeq8", V_UCMPEQ8) 750 1.1 mrg NDS32_BUILTIN(scmplt8, "scmplt8", SCMPLT8) 751 1.1 mrg NDS32_BUILTIN(scmplt8, "v_scmplt8", V_SCMPLT8) 752 1.1 mrg NDS32_BUILTIN(scmple8, "scmple8", SCMPLE8) 753 1.1 mrg NDS32_BUILTIN(scmple8, "v_scmple8", V_SCMPLE8) 754 1.1 mrg NDS32_BUILTIN(ucmplt8, "ucmplt8", UCMPLT8) 755 1.1 mrg NDS32_BUILTIN(ucmplt8, "v_ucmplt8", V_UCMPLT8) 756 1.1 mrg NDS32_BUILTIN(ucmplt8, "ucmple8", UCMPLE8) 757 1.1 mrg NDS32_BUILTIN(ucmplt8, "v_ucmple8", V_UCMPLE8) 758 1.1 mrg NDS32_BUILTIN(sminv2hi3, "smin16", SMIN16) 759 1.1 mrg NDS32_BUILTIN(sminv2hi3, "v_smin16", V_SMIN16) 760 1.1 mrg NDS32_BUILTIN(uminv2hi3, "umin16", UMIN16) 761 1.1 mrg NDS32_BUILTIN(uminv2hi3, "v_umin16", V_UMIN16) 762 1.1 mrg NDS32_BUILTIN(smaxv2hi3, "smax16", SMAX16) 763 1.1 mrg NDS32_BUILTIN(smaxv2hi3, "v_smax16", V_SMAX16) 764 1.1 mrg NDS32_BUILTIN(umaxv2hi3, "umax16", UMAX16) 765 1.1 mrg NDS32_BUILTIN(umaxv2hi3, "v_umax16", V_UMAX16) 766 1.1 mrg NDS32_BUILTIN(khm16, "khm16", KHM16) 767 1.1 mrg NDS32_BUILTIN(khm16, "v_khm16", V_KHM16) 768 1.1 mrg NDS32_BUILTIN(khmx16, "khmx16", KHMX16) 769 1.1 mrg NDS32_BUILTIN(khmx16, "v_khmx16", V_KHMX16) 770 1.1 mrg NDS32_BUILTIN(sminv4qi3, "smin8", SMIN8) 771 1.1 mrg NDS32_BUILTIN(sminv4qi3, "v_smin8", V_SMIN8) 772 1.1 mrg NDS32_BUILTIN(uminv4qi3, "umin8", UMIN8) 773 1.1 mrg NDS32_BUILTIN(uminv4qi3, "v_umin8", V_UMIN8) 774 1.1 mrg NDS32_BUILTIN(smaxv4qi3, "smax8", SMAX8) 775 1.1 mrg NDS32_BUILTIN(smaxv4qi3, "v_smax8", V_SMAX8) 776 1.1 mrg NDS32_BUILTIN(umaxv4qi3, "umax8", UMAX8) 777 1.1 mrg NDS32_BUILTIN(umaxv4qi3, "v_umax8", V_UMAX8) 778 1.1 mrg NDS32_BUILTIN(raddsi3, "raddw", RADDW) 779 1.1 mrg NDS32_BUILTIN(uraddsi3, "uraddw", URADDW) 780 1.1 mrg NDS32_BUILTIN(rsubsi3, "rsubw", RSUBW) 781 1.1 mrg NDS32_BUILTIN(ursubsi3, "ursubw", URSUBW) 782 1.1 mrg NDS32_BUILTIN(sraiu, "sra_u", SRA_U) 783 1.1 mrg NDS32_BUILTIN(kssl, "ksll", KSLL) 784 1.1 mrg NDS32_BUILTIN(pkbb, "pkbb16", PKBB16) 785 1.1 mrg NDS32_BUILTIN(pkbb, "v_pkbb16", V_PKBB16) 786 1.1 mrg NDS32_BUILTIN(pkbt, "pkbt16", PKBT16) 787 1.1 mrg NDS32_BUILTIN(pkbt, "v_pkbt16", V_PKBT16) 788 1.1 mrg NDS32_BUILTIN(pktb, "pktb16", PKTB16) 789 1.1 mrg NDS32_BUILTIN(pktb, "v_pktb16", V_PKTB16) 790 1.1 mrg NDS32_BUILTIN(pktt, "pktt16", PKTT16) 791 1.1 mrg NDS32_BUILTIN(pktt, "v_pktt16", V_PKTT16) 792 1.1 mrg NDS32_BUILTIN(smulsi3_highpart, "smmul", SMMUL) 793 1.1 mrg NDS32_BUILTIN(smmul_round, "smmul_u", SMMUL_U) 794 1.1 mrg NDS32_BUILTIN(smmwb, "smmwb", SMMWB) 795 1.1 mrg NDS32_BUILTIN(smmwb, "v_smmwb", V_SMMWB) 796 1.1 mrg NDS32_BUILTIN(smmwb_round, "smmwb_u", SMMWB_U) 797 1.1 mrg NDS32_BUILTIN(smmwb_round, "v_smmwb_u", V_SMMWB_U) 798 1.1 mrg NDS32_BUILTIN(smmwt, "smmwt", SMMWT) 799 1.1 mrg NDS32_BUILTIN(smmwt, "v_smmwt", V_SMMWT) 800 1.1 mrg NDS32_BUILTIN(smmwt_round, "smmwt_u", SMMWT_U) 801 1.1 mrg NDS32_BUILTIN(smmwt_round, "v_smmwt_u", V_SMMWT_U) 802 1.1 mrg NDS32_BUILTIN(smbb, "smbb", SMBB) 803 1.1 mrg NDS32_BUILTIN(smbb, "v_smbb", V_SMBB) 804 1.1 mrg NDS32_BUILTIN(smbt, "smbt", SMBT) 805 1.1 mrg NDS32_BUILTIN(smbt, "v_smbt", V_SMBT) 806 1.1 mrg NDS32_BUILTIN(smtt, "smtt", SMTT) 807 1.1 mrg NDS32_BUILTIN(smtt, "v_smtt", V_SMTT) 808 1.1 mrg NDS32_BUILTIN(kmda, "kmda", KMDA) 809 1.1 mrg NDS32_BUILTIN(kmda, "v_kmda", V_KMDA) 810 1.1 mrg NDS32_BUILTIN(kmxda, "kmxda", KMXDA) 811 1.1 mrg NDS32_BUILTIN(kmxda, "v_kmxda", V_KMXDA) 812 1.1 mrg NDS32_BUILTIN(smds, "smds", SMDS) 813 1.1 mrg NDS32_BUILTIN(smds, "v_smds", V_SMDS) 814 1.1 mrg NDS32_BUILTIN(smdrs, "smdrs", SMDRS) 815 1.1 mrg NDS32_BUILTIN(smdrs, "v_smdrs", V_SMDRS) 816 1.1 mrg NDS32_BUILTIN(smxdsv, "smxds", SMXDS) 817 1.1 mrg NDS32_BUILTIN(smxdsv, "v_smxds", V_SMXDS) 818 1.1 mrg NDS32_BUILTIN(smal1, "smal", SMAL) 819 1.1 mrg NDS32_BUILTIN(smal1, "v_smal", V_SMAL) 820 1.1 mrg NDS32_BUILTIN(bitrev, "bitrev", BITREV) 821 1.1 mrg NDS32_BUILTIN(wext, "wext", WEXT) 822 1.1 mrg NDS32_BUILTIN(adddi3, "sadd64", SADD64) 823 1.1 mrg NDS32_BUILTIN(adddi3, "uadd64", UADD64) 824 1.1 mrg NDS32_BUILTIN(radddi3, "radd64", RADD64) 825 1.1 mrg NDS32_BUILTIN(uradddi3, "uradd64", URADD64) 826 1.1 mrg NDS32_BUILTIN(kadddi3, "kadd64", KADD64) 827 1.1 mrg NDS32_BUILTIN(ukadddi3, "ukadd64", UKADD64) 828 1.1 mrg NDS32_BUILTIN(subdi3, "ssub64", SSUB64) 829 1.1 mrg NDS32_BUILTIN(subdi3, "usub64", USUB64) 830 1.1 mrg NDS32_BUILTIN(rsubdi3, "rsub64", RSUB64) 831 1.1 mrg NDS32_BUILTIN(ursubdi3, "ursub64", URSUB64) 832 1.1 mrg NDS32_BUILTIN(ksubdi3, "ksub64", KSUB64) 833 1.1 mrg NDS32_BUILTIN(uksubdi3, "uksub64", UKSUB64) 834 1.1 mrg NDS32_BUILTIN(smul16, "smul16", SMUL16) 835 1.1 mrg NDS32_BUILTIN(smul16, "v_smul16", V_SMUL16) 836 1.1 mrg NDS32_BUILTIN(smulx16, "smulx16", SMULX16) 837 1.1 mrg NDS32_BUILTIN(smulx16, "v_smulx16", V_SMULX16) 838 1.1 mrg NDS32_BUILTIN(umul16, "umul16", UMUL16) 839 1.1 mrg NDS32_BUILTIN(umul16, "v_umul16", V_UMUL16) 840 1.1 mrg NDS32_BUILTIN(umulx16, "umulx16", UMULX16) 841 1.1 mrg NDS32_BUILTIN(umulx16, "v_umulx16", V_UMULX16) 842 1.1 mrg NDS32_BUILTIN(kwmmul, "kwmmul", KWMMUL) 843 1.1 mrg NDS32_BUILTIN(kwmmul_round, "kwmmul_u", KWMMUL_U) 844 1.1 mrg NDS32_NO_TARGET_BUILTIN(unaligned_storev2hi, 845 1.1 mrg "put_unaligned_u16x2", UASTORE_U16) 846 1.1 mrg NDS32_NO_TARGET_BUILTIN(unaligned_storev2hi, 847 1.1 mrg "put_unaligned_s16x2", UASTORE_S16) 848 1.1 mrg NDS32_NO_TARGET_BUILTIN(unaligned_storev4qi, "put_unaligned_u8x4", UASTORE_U8) 849 1.1 mrg NDS32_NO_TARGET_BUILTIN(unaligned_storev4qi, "put_unaligned_s8x4", UASTORE_S8) 850 1.1 mrg }; 851 1.1 mrg 852 1.1 mrg /* Two-argument intrinsics with an immediate second argument. */ 853 1.1 mrg static struct builtin_description bdesc_2argimm[] = 854 1.1 mrg { 855 1.1 mrg NDS32_BUILTIN(unspec_bclr, "bclr", BCLR) 856 1.1 mrg NDS32_BUILTIN(unspec_bset, "bset", BSET) 857 1.1 mrg NDS32_BUILTIN(unspec_btgl, "btgl", BTGL) 858 1.1 mrg NDS32_BUILTIN(unspec_btst, "btst", BTST) 859 1.1 mrg NDS32_BUILTIN(unspec_clip, "clip", CLIP) 860 1.1 mrg NDS32_BUILTIN(unspec_clips, "clips", CLIPS) 861 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_teqz, "teqz", TEQZ) 862 1.1 mrg NDS32_NO_TARGET_BUILTIN(unspec_tnez, "tnez", TNEZ) 863 1.1 mrg NDS32_BUILTIN(ashrv2hi3, "srl16", SRL16) 864 1.1 mrg NDS32_BUILTIN(ashrv2hi3, "v_srl16", V_SRL16) 865 1.1 mrg NDS32_BUILTIN(srl16_round, "srl16_u", SRL16_U) 866 1.1 mrg NDS32_BUILTIN(srl16_round, "v_srl16_u", V_SRL16_U) 867 1.1 mrg NDS32_BUILTIN(kslli16, "ksll16", KSLL16) 868 1.1 mrg NDS32_BUILTIN(kslli16, "v_ksll16", V_KSLL16) 869 1.1 mrg NDS32_BUILTIN(sclip16, "sclip16", SCLIP16) 870 1.1 mrg NDS32_BUILTIN(sclip16, "v_sclip16", V_SCLIP16) 871 1.1 mrg NDS32_BUILTIN(uclip16, "uclip16", UCLIP16) 872 1.1 mrg NDS32_BUILTIN(uclip16, "v_uclip16", V_UCLIP16) 873 1.1 mrg NDS32_BUILTIN(sraiu, "sra_u", SRA_U) 874 1.1 mrg NDS32_BUILTIN(kssl, "ksll", KSLL) 875 1.1 mrg NDS32_BUILTIN(bitrev, "bitrev", BITREV) 876 1.1 mrg NDS32_BUILTIN(wext, "wext", WEXT) 877 1.1 mrg NDS32_BUILTIN(uclip32, "uclip32", UCLIP32) 878 1.1 mrg NDS32_BUILTIN(sclip32, "sclip32", SCLIP32) 879 1.1 mrg }; 880 1.1 mrg 881 1.1 mrg /* Intrinsics that take three arguments. */ 882 1.1 mrg static struct builtin_description bdesc_3arg[] = 883 1.1 mrg { 884 1.1 mrg NDS32_BUILTIN(unspec_pbsada, "pbsada", PBSADA) 885 1.1 mrg NDS32_NO_TARGET_BUILTIN(bse, "bse", BSE) 886 1.1 mrg NDS32_NO_TARGET_BUILTIN(bsp, "bsp", BSP) 887 1.1 mrg NDS32_BUILTIN(kmabb, "kmabb", KMABB) 888 1.1 mrg NDS32_BUILTIN(kmabb, "v_kmabb", V_KMABB) 889 1.1 mrg NDS32_BUILTIN(kmabt, "kmabt", KMABT) 890 1.1 mrg NDS32_BUILTIN(kmabt, "v_kmabt", V_KMABT) 891 1.1 mrg NDS32_BUILTIN(kmatt, "kmatt", KMATT) 892 1.1 mrg NDS32_BUILTIN(kmatt, "v_kmatt", V_KMATT) 893 1.1 mrg NDS32_BUILTIN(kmada, "kmada", KMADA) 894 1.1 mrg NDS32_BUILTIN(kmada, "v_kmada", V_KMADA) 895 1.1 mrg NDS32_BUILTIN(kmaxda, "kmaxda", KMAXDA) 896 1.1 mrg NDS32_BUILTIN(kmaxda, "v_kmaxda", V_KMAXDA) 897 1.1 mrg NDS32_BUILTIN(kmads, "kmads", KMADS) 898 1.1 mrg NDS32_BUILTIN(kmads, "v_kmads", V_KMADS) 899 1.1 mrg NDS32_BUILTIN(kmadrs, "kmadrs", KMADRS) 900 1.1 mrg NDS32_BUILTIN(kmadrs, "v_kmadrs", V_KMADRS) 901 1.1 mrg NDS32_BUILTIN(kmaxds, "kmaxds", KMAXDS) 902 1.1 mrg NDS32_BUILTIN(kmaxds, "v_kmaxds", V_KMAXDS) 903 1.1 mrg NDS32_BUILTIN(kmsda, "kmsda", KMSDA) 904 1.1 mrg NDS32_BUILTIN(kmsda, "v_kmsda", V_KMSDA) 905 1.1 mrg NDS32_BUILTIN(kmsxda, "kmsxda", KMSXDA) 906 1.1 mrg NDS32_BUILTIN(kmsxda, "v_kmsxda", V_KMSXDA) 907 1.1 mrg NDS32_BUILTIN(bpick1, "bpick", BPICK) 908 1.1 mrg NDS32_BUILTIN(smar64_1, "smar64", SMAR64) 909 1.1 mrg NDS32_BUILTIN(smsr64, "smsr64", SMSR64) 910 1.1 mrg NDS32_BUILTIN(umar64_1, "umar64", UMAR64) 911 1.1 mrg NDS32_BUILTIN(umsr64, "umsr64", UMSR64) 912 1.1 mrg NDS32_BUILTIN(kmar64_1, "kmar64", KMAR64) 913 1.1 mrg NDS32_BUILTIN(kmsr64, "kmsr64", KMSR64) 914 1.1 mrg NDS32_BUILTIN(ukmar64_1, "ukmar64", UKMAR64) 915 1.1 mrg NDS32_BUILTIN(ukmsr64, "ukmsr64", UKMSR64) 916 1.1 mrg NDS32_BUILTIN(smalbb, "smalbb", SMALBB) 917 1.1 mrg NDS32_BUILTIN(smalbb, "v_smalbb", V_SMALBB) 918 1.1 mrg NDS32_BUILTIN(smalbt, "smalbt", SMALBT) 919 1.1 mrg NDS32_BUILTIN(smalbt, "v_smalbt", V_SMALBT) 920 1.1 mrg NDS32_BUILTIN(smaltt, "smaltt", SMALTT) 921 1.1 mrg NDS32_BUILTIN(smaltt, "v_smaltt", V_SMALTT) 922 1.1 mrg NDS32_BUILTIN(smalda1, "smalda", SMALDA) 923 1.1 mrg NDS32_BUILTIN(smalda1, "v_smalda", V_SMALDA) 924 1.1 mrg NDS32_BUILTIN(smalxda1, "smalxda", SMALXDA) 925 1.1 mrg NDS32_BUILTIN(smalxda1, "v_smalxda", V_SMALXDA) 926 1.1 mrg NDS32_BUILTIN(smalds1, "smalds", SMALDS) 927 1.1 mrg NDS32_BUILTIN(smalds1, "v_smalds", V_SMALDS) 928 1.1 mrg NDS32_BUILTIN(smaldrs3, "smaldrs", SMALDRS) 929 1.1 mrg NDS32_BUILTIN(smaldrs3, "v_smaldrs", V_SMALDRS) 930 1.1 mrg NDS32_BUILTIN(smalxds1, "smalxds", SMALXDS) 931 1.1 mrg NDS32_BUILTIN(smalxds1, "v_smalxds", V_SMALXDS) 932 1.1 mrg NDS32_BUILTIN(smslda1, "smslda", SMSLDA) 933 1.1 mrg NDS32_BUILTIN(smslda1, "v_smslda", V_SMSLDA) 934 1.1 mrg NDS32_BUILTIN(smslxda1, "smslxda", SMSLXDA) 935 1.1 mrg NDS32_BUILTIN(smslxda1, "v_smslxda", V_SMSLXDA) 936 1.1 mrg NDS32_BUILTIN(kmmawb, "kmmawb", KMMAWB) 937 1.1 mrg NDS32_BUILTIN(kmmawb, "v_kmmawb", V_KMMAWB) 938 1.1 mrg NDS32_BUILTIN(kmmawb_round, "kmmawb_u", KMMAWB_U) 939 1.1 mrg NDS32_BUILTIN(kmmawb_round, "v_kmmawb_u", V_KMMAWB_U) 940 1.1 mrg NDS32_BUILTIN(kmmawt, "kmmawt", KMMAWT) 941 1.1 mrg NDS32_BUILTIN(kmmawt, "v_kmmawt", V_KMMAWT) 942 1.1 mrg NDS32_BUILTIN(kmmawt_round, "kmmawt_u", KMMAWT_U) 943 1.1 mrg NDS32_BUILTIN(kmmawt_round, "v_kmmawt_u", V_KMMAWT_U) 944 1.1 mrg NDS32_BUILTIN(kmmac, "kmmac", KMMAC) 945 1.1 mrg NDS32_BUILTIN(kmmac_round, "kmmac_u", KMMAC_U) 946 1.1 mrg NDS32_BUILTIN(kmmsb, "kmmsb", KMMSB) 947 1.1 mrg NDS32_BUILTIN(kmmsb_round, "kmmsb_u", KMMSB_U) 948 1.1 mrg }; 949 1.1 mrg 950 1.1 mrg /* Three-argument intrinsics with an immediate third argument. */ 951 1.1 mrg static struct builtin_description bdesc_3argimm[] = 952 1.1 mrg { 953 1.1 mrg NDS32_NO_TARGET_BUILTIN(prefetch_qw, "prefetch_qw", DPREF_QW) 954 1.1 mrg NDS32_NO_TARGET_BUILTIN(prefetch_hw, "prefetch_hw", DPREF_HW) 955 1.1 mrg NDS32_NO_TARGET_BUILTIN(prefetch_w, "prefetch_w", DPREF_W) 956 1.1 mrg NDS32_NO_TARGET_BUILTIN(prefetch_dw, "prefetch_dw", DPREF_DW) 957 1.1 mrg NDS32_BUILTIN(insb, "insb", INSB) 958 1.1 mrg }; 959 1.1 mrg 960 1.1 mrg /* Intrinsics that load a value. */ 961 1.1 mrg static struct builtin_description bdesc_load[] = 962 1.1 mrg { 963 1.1 mrg NDS32_BUILTIN(unspec_volatile_llw, "llw", LLW) 964 1.1 mrg NDS32_BUILTIN(unspec_lwup, "lwup", LWUP) 965 1.1 mrg NDS32_BUILTIN(unspec_lbup, "lbup", LBUP) 966 1.1 mrg }; 967 1.1 mrg 968 1.1 mrg /* Intrinsics that store a value. */ 969 1.1 mrg static struct builtin_description bdesc_store[] = 970 1.1 mrg { 971 1.1 mrg NDS32_BUILTIN(unspec_swup, "swup", SWUP) 972 1.1 mrg NDS32_BUILTIN(unspec_sbup, "sbup", SBUP) 973 1.1 mrg }; 974 1.1 mrg 975 1.1 mrg static struct builtin_description bdesc_cctl[] = 976 1.1 mrg { 977 1.1 mrg NDS32_BUILTIN(cctl_idx_read, "cctl_idx_read", CCTL_IDX_READ) 978 1.1 mrg NDS32_NO_TARGET_BUILTIN(cctl_idx_write, "cctl_idx_write", CCTL_IDX_WRITE) 979 1.1 mrg NDS32_NO_TARGET_BUILTIN(cctl_va_lck, "cctl_va_lck", CCTL_VA_LCK) 980 1.1 mrg NDS32_NO_TARGET_BUILTIN(cctl_idx_wbinval, 981 1.1 mrg "cctl_idx_wbinval", CCTL_IDX_WBINVAL) 982 1.1 mrg NDS32_NO_TARGET_BUILTIN(cctl_va_wbinval_l1, 983 1.1 mrg "cctl_va_wbinval_l1", CCTL_VA_WBINVAL_L1) 984 1.1 mrg NDS32_NO_TARGET_BUILTIN(cctl_va_wbinval_la, 985 1.1 mrg "cctl_va_wbinval_la", CCTL_VA_WBINVAL_LA) 986 1.1 mrg }; 987 1.1 mrg 988 1.1 mrg rtx 989 1.1 mrg nds32_expand_builtin_impl (tree exp, 990 1.1 mrg rtx target, 991 1.1 mrg rtx subtarget ATTRIBUTE_UNUSED, 992 1.1 mrg enum machine_mode mode ATTRIBUTE_UNUSED, 993 1.1 mrg int ignore ATTRIBUTE_UNUSED) 994 1.1 mrg { 995 1.1 mrg tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); 996 1.1 mrg unsigned int fcode = DECL_MD_FUNCTION_CODE (fndecl); 997 1.1 mrg unsigned i; 998 1.1 mrg struct builtin_description *d; 999 1.1 mrg 1000 1.1 mrg if (!NDS32_EXT_DSP_P () 1001 1.1 mrg && fcode > NDS32_BUILTIN_DSP_BEGIN 1002 1.1 mrg && fcode < NDS32_BUILTIN_DSP_END) 1003 1.1 mrg error ("don%'t support DSP extension instructions"); 1004 1.1 mrg 1005 1.1 mrg switch (fcode) 1006 1.1 mrg { 1007 1.1 mrg /* FPU Register Transfer. */ 1008 1.1 mrg case NDS32_BUILTIN_FMFCFG: 1009 1.1 mrg case NDS32_BUILTIN_FMFCSR: 1010 1.1 mrg case NDS32_BUILTIN_FMTCSR: 1011 1.1 mrg case NDS32_BUILTIN_FCPYNSS: 1012 1.1 mrg case NDS32_BUILTIN_FCPYSS: 1013 1.1 mrg /* Both v3s and v3f toolchains define TARGET_FPU_SINGLE. */ 1014 1.1 mrg if (!TARGET_FPU_SINGLE) 1015 1.1 mrg { 1016 1.1 mrg error ("this built-in function is only available " 1017 1.1 mrg "on the v3s or v3f toolchain"); 1018 1.1 mrg return NULL_RTX; 1019 1.1 mrg } 1020 1.1 mrg break; 1021 1.1 mrg 1022 1.1 mrg /* FPU Register Transfer. */ 1023 1.1 mrg case NDS32_BUILTIN_FCPYNSD: 1024 1.1 mrg case NDS32_BUILTIN_FCPYSD: 1025 1.1 mrg /* Only v3f toolchain defines TARGET_FPU_DOUBLE. */ 1026 1.1 mrg if (!TARGET_FPU_DOUBLE) 1027 1.1 mrg { 1028 1.1 mrg error ("this built-in function is only available " 1029 1.1 mrg "on the v3f toolchain"); 1030 1.1 mrg return NULL_RTX; 1031 1.1 mrg } 1032 1.1 mrg break; 1033 1.1 mrg 1034 1.1 mrg /* Load and Store */ 1035 1.1 mrg case NDS32_BUILTIN_LLW: 1036 1.1 mrg case NDS32_BUILTIN_LWUP: 1037 1.1 mrg case NDS32_BUILTIN_LBUP: 1038 1.1 mrg case NDS32_BUILTIN_SCW: 1039 1.1 mrg case NDS32_BUILTIN_SWUP: 1040 1.1 mrg case NDS32_BUILTIN_SBUP: 1041 1.1 mrg if (TARGET_ISA_V3M) 1042 1.1 mrg { 1043 1.1 mrg error ("this built-in function not support " 1044 1.1 mrg "on the v3m toolchain"); 1045 1.1 mrg return NULL_RTX; 1046 1.1 mrg } 1047 1.1 mrg break; 1048 1.1 mrg 1049 1.1 mrg /* Performance Extension */ 1050 1.1 mrg case NDS32_BUILTIN_ABS: 1051 1.1 mrg case NDS32_BUILTIN_AVE: 1052 1.1 mrg case NDS32_BUILTIN_BCLR: 1053 1.1 mrg case NDS32_BUILTIN_BSET: 1054 1.1 mrg case NDS32_BUILTIN_BTGL: 1055 1.1 mrg case NDS32_BUILTIN_BTST: 1056 1.1 mrg case NDS32_BUILTIN_CLIP: 1057 1.1 mrg case NDS32_BUILTIN_CLIPS: 1058 1.1 mrg case NDS32_BUILTIN_CLZ: 1059 1.1 mrg case NDS32_BUILTIN_CLO: 1060 1.1 mrg if (!TARGET_EXT_PERF) 1061 1.1 mrg { 1062 1.1 mrg error ("don%'t support performance extension instructions"); 1063 1.1 mrg return NULL_RTX; 1064 1.1 mrg } 1065 1.1 mrg break; 1066 1.1 mrg 1067 1.1 mrg /* Performance Extension 2 */ 1068 1.1 mrg case NDS32_BUILTIN_PBSAD: 1069 1.1 mrg case NDS32_BUILTIN_PBSADA: 1070 1.1 mrg case NDS32_BUILTIN_BSE: 1071 1.1 mrg case NDS32_BUILTIN_BSP: 1072 1.1 mrg if (!TARGET_EXT_PERF2) 1073 1.1 mrg { 1074 1.1 mrg error ("don%'t support performance extension " 1075 1.1 mrg "version 2 instructions"); 1076 1.1 mrg return NULL_RTX; 1077 1.1 mrg } 1078 1.1 mrg break; 1079 1.1 mrg 1080 1.1 mrg /* String Extension */ 1081 1.1 mrg case NDS32_BUILTIN_FFB: 1082 1.1 mrg case NDS32_BUILTIN_FFMISM: 1083 1.1 mrg case NDS32_BUILTIN_FLMISM: 1084 1.1 mrg if (!TARGET_EXT_STRING) 1085 1.1 mrg { 1086 1.1 mrg error ("don%'t support string extension instructions"); 1087 1.1 mrg return NULL_RTX; 1088 1.1 mrg } 1089 1.1 mrg break; 1090 1.1 mrg 1091 1.1 mrg default: 1092 1.1 mrg break; 1093 1.1 mrg } 1094 1.1 mrg 1095 1.1 mrg /* Since there are no result and operands, we can simply emit this rtx. */ 1096 1.1 mrg switch (fcode) 1097 1.1 mrg { 1098 1.1 mrg case NDS32_BUILTIN_ISB: 1099 1.1 mrg emit_insn (gen_unspec_volatile_isb ()); 1100 1.1 mrg return target; 1101 1.1 mrg case NDS32_BUILTIN_DSB: 1102 1.1 mrg emit_insn (gen_unspec_dsb ()); 1103 1.1 mrg return target; 1104 1.1 mrg case NDS32_BUILTIN_MSYNC_ALL: 1105 1.1 mrg emit_insn (gen_unspec_msync_all ()); 1106 1.1 mrg return target; 1107 1.1 mrg case NDS32_BUILTIN_MSYNC_STORE: 1108 1.1 mrg emit_insn (gen_unspec_msync_store ()); 1109 1.1 mrg return target; 1110 1.1 mrg case NDS32_BUILTIN_SETGIE_EN: 1111 1.1 mrg emit_insn (gen_unspec_volatile_setgie_en ()); 1112 1.1 mrg emit_insn (gen_unspec_dsb ()); 1113 1.1 mrg return target; 1114 1.1 mrg case NDS32_BUILTIN_SETGIE_DIS: 1115 1.1 mrg emit_insn (gen_unspec_volatile_setgie_dis ()); 1116 1.1 mrg emit_insn (gen_unspec_dsb ()); 1117 1.1 mrg return target; 1118 1.1 mrg case NDS32_BUILTIN_GIE_DIS: 1119 1.1 mrg emit_insn (gen_unspec_volatile_setgie_dis ()); 1120 1.1 mrg emit_insn (gen_unspec_dsb ()); 1121 1.1 mrg return target; 1122 1.1 mrg case NDS32_BUILTIN_GIE_EN: 1123 1.1 mrg emit_insn (gen_unspec_volatile_setgie_en ()); 1124 1.1 mrg emit_insn (gen_unspec_dsb ()); 1125 1.1 mrg return target; 1126 1.1 mrg case NDS32_BUILTIN_SET_PENDING_SWINT: 1127 1.1 mrg emit_insn (gen_unspec_set_pending_swint ()); 1128 1.1 mrg return target; 1129 1.1 mrg case NDS32_BUILTIN_CLR_PENDING_SWINT: 1130 1.1 mrg emit_insn (gen_unspec_clr_pending_swint ()); 1131 1.1 mrg return target; 1132 1.1 mrg case NDS32_BUILTIN_CCTL_L1D_INVALALL: 1133 1.1 mrg emit_insn (gen_cctl_l1d_invalall()); 1134 1.1 mrg return target; 1135 1.1 mrg case NDS32_BUILTIN_CCTL_L1D_WBALL_ALVL: 1136 1.1 mrg emit_insn (gen_cctl_l1d_wball_alvl()); 1137 1.1 mrg return target; 1138 1.1 mrg case NDS32_BUILTIN_CCTL_L1D_WBALL_ONE_LVL: 1139 1.1 mrg emit_insn (gen_cctl_l1d_wball_one_lvl()); 1140 1.1 mrg return target; 1141 1.1 mrg case NDS32_BUILTIN_CLROV: 1142 1.1 mrg emit_insn (gen_unspec_volatile_clrov ()); 1143 1.1 mrg return target; 1144 1.1 mrg case NDS32_BUILTIN_STANDBY_NO_WAKE_GRANT: 1145 1.1 mrg emit_insn (gen_unspec_standby_no_wake_grant ()); 1146 1.1 mrg return target; 1147 1.1 mrg case NDS32_BUILTIN_STANDBY_WAKE_GRANT: 1148 1.1 mrg emit_insn (gen_unspec_standby_wake_grant ()); 1149 1.1 mrg return target; 1150 1.1 mrg case NDS32_BUILTIN_STANDBY_WAKE_DONE: 1151 1.1 mrg emit_insn (gen_unspec_standby_wait_done ()); 1152 1.1 mrg return target; 1153 1.1 mrg case NDS32_BUILTIN_SETEND_BIG: 1154 1.1 mrg emit_insn (gen_unspec_setend_big ()); 1155 1.1 mrg return target; 1156 1.1 mrg case NDS32_BUILTIN_SETEND_LITTLE: 1157 1.1 mrg emit_insn (gen_unspec_setend_little ()); 1158 1.1 mrg return target; 1159 1.1 mrg case NDS32_BUILTIN_NOP: 1160 1.1 mrg emit_insn (gen_unspec_nop ()); 1161 1.1 mrg return target; 1162 1.1 mrg case NDS32_BUILTIN_SCHE_BARRIER: 1163 1.1 mrg emit_insn (gen_blockage ()); 1164 1.1 mrg return target; 1165 1.1 mrg case NDS32_BUILTIN_TLBOP_FLUA: 1166 1.1 mrg emit_insn (gen_unspec_tlbop_flua ()); 1167 1.1 mrg return target; 1168 1.1 mrg case NDS32_BUILTIN_SCW: 1169 1.1 mrg return nds32_expand_scw_builtin (CODE_FOR_unspec_volatile_scw, 1170 1.1 mrg exp, target); 1171 1.1 mrg case NDS32_BUILTIN_SET_INT_PRIORITY: 1172 1.1 mrg return nds32_expand_priority_builtin (CODE_FOR_unspec_set_int_priority, 1173 1.1 mrg exp, target, 1174 1.1 mrg "__nds32__set_int_priority"); 1175 1.1 mrg return target; 1176 1.1 mrg default: 1177 1.1 mrg break; 1178 1.1 mrg } 1179 1.1 mrg 1180 1.1 mrg /* Expand groups of builtins. */ 1181 1.1 mrg for (i = 0, d = bdesc_noarg; i < ARRAY_SIZE (bdesc_noarg); i++, d++) 1182 1.1 mrg if (d->code == fcode) 1183 1.1 mrg return nds32_expand_noarg_builtin (d->icode, target); 1184 1.1 mrg 1185 1.1 mrg for (i = 0, d = bdesc_1arg; i < ARRAY_SIZE (bdesc_1arg); i++, d++) 1186 1.1 mrg if (d->code == fcode) 1187 1.1 mrg return nds32_expand_unop_builtin (d->icode, exp, target, d->return_p); 1188 1.1 mrg 1189 1.1 mrg for (i = 0, d = bdesc_1argimm; i < ARRAY_SIZE (bdesc_1argimm); i++, d++) 1190 1.1 mrg if (d->code == fcode) 1191 1.1 mrg return nds32_expand_unopimm_builtin (d->icode, exp, target, 1192 1.1 mrg d->return_p, d->name); 1193 1.1 mrg 1194 1.1 mrg for (i = 0, d = bdesc_2arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++) 1195 1.1 mrg if (d->code == fcode) 1196 1.1 mrg return nds32_expand_binop_builtin (d->icode, exp, target, d->return_p); 1197 1.1 mrg 1198 1.1 mrg for (i = 0, d = bdesc_2argimm; i < ARRAY_SIZE (bdesc_2argimm); i++, d++) 1199 1.1 mrg if (d->code == fcode) 1200 1.1 mrg return nds32_expand_binopimm_builtin (d->icode, exp, target, 1201 1.1 mrg d->return_p, d->name); 1202 1.1 mrg 1203 1.1 mrg for (i = 0, d = bdesc_3arg; i < ARRAY_SIZE (bdesc_3arg); i++, d++) 1204 1.1 mrg if (d->code == fcode) 1205 1.1 mrg return nds32_expand_triop_builtin (d->icode, exp, target, d->return_p); 1206 1.1 mrg 1207 1.1 mrg for (i = 0, d = bdesc_3argimm; i < ARRAY_SIZE (bdesc_3argimm); i++, d++) 1208 1.1 mrg if (d->code == fcode) 1209 1.1 mrg return nds32_expand_triopimm_builtin (d->icode, exp, target, 1210 1.1 mrg d->return_p, d->name); 1211 1.1 mrg 1212 1.1 mrg for (i = 0, d = bdesc_load; i < ARRAY_SIZE (bdesc_load); i++, d++) 1213 1.1 mrg if (d->code == fcode) 1214 1.1 mrg return nds32_expand_builtin_load (d->icode, exp, target); 1215 1.1 mrg 1216 1.1 mrg for (i = 0, d = bdesc_store; i < ARRAY_SIZE (bdesc_store); i++, d++) 1217 1.1 mrg if (d->code == fcode) 1218 1.1 mrg return nds32_expand_builtin_store (d->icode, exp, target); 1219 1.1 mrg 1220 1.1 mrg for (i = 0, d = bdesc_cctl; i < ARRAY_SIZE (bdesc_cctl); i++, d++) 1221 1.1 mrg if (d->code == fcode) 1222 1.1 mrg return nds32_expand_cctl_builtin (d->icode, exp, target, 1223 1.1 mrg d->return_p, d->name); 1224 1.1 mrg 1225 1.1 mrg return NULL_RTX; 1226 1.1 mrg } 1227 1.1 mrg 1228 1.1 mrg static GTY(()) tree nds32_builtin_decls[NDS32_BUILTIN_COUNT]; 1229 1.1 mrg 1230 1.1 mrg /* Return the NDS32 builtin for CODE. */ 1231 1.1 mrg tree 1232 1.1 mrg nds32_builtin_decl_impl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) 1233 1.1 mrg { 1234 1.1 mrg if (code >= NDS32_BUILTIN_COUNT) 1235 1.1 mrg return error_mark_node; 1236 1.1 mrg 1237 1.1 mrg return nds32_builtin_decls[code]; 1238 1.1 mrg } 1239 1.1 mrg 1240 1.1 mrg void 1241 1.1 mrg nds32_init_builtins_impl (void) 1242 1.1 mrg { 1243 1.1 mrg #define ADD_NDS32_BUILTIN0(NAME, RET_TYPE, CODE) \ 1244 1.1 mrg nds32_builtin_decls[NDS32_BUILTIN_ ## CODE] = \ 1245 1.1 mrg add_builtin_function ("__builtin_nds32_" NAME, \ 1246 1.1 mrg build_function_type_list (RET_TYPE##_type_node, \ 1247 1.1 mrg NULL_TREE), \ 1248 1.1 mrg NDS32_BUILTIN_ ## CODE, BUILT_IN_MD, NULL, NULL_TREE) 1249 1.1 mrg 1250 1.1 mrg #define ADD_NDS32_BUILTIN1(NAME, RET_TYPE, ARG_TYPE, CODE) \ 1251 1.1 mrg nds32_builtin_decls[NDS32_BUILTIN_ ## CODE] = \ 1252 1.1 mrg add_builtin_function ("__builtin_nds32_" NAME, \ 1253 1.1 mrg build_function_type_list (RET_TYPE##_type_node, \ 1254 1.1 mrg ARG_TYPE##_type_node, \ 1255 1.1 mrg NULL_TREE), \ 1256 1.1 mrg NDS32_BUILTIN_ ## CODE, BUILT_IN_MD, NULL, NULL_TREE) 1257 1.1 mrg 1258 1.1 mrg #define ADD_NDS32_BUILTIN2(NAME, RET_TYPE, ARG_TYPE1, ARG_TYPE2, CODE) \ 1259 1.1 mrg nds32_builtin_decls[NDS32_BUILTIN_ ## CODE] = \ 1260 1.1 mrg add_builtin_function ("__builtin_nds32_" NAME, \ 1261 1.1 mrg build_function_type_list (RET_TYPE##_type_node, \ 1262 1.1 mrg ARG_TYPE1##_type_node,\ 1263 1.1 mrg ARG_TYPE2##_type_node,\ 1264 1.1 mrg NULL_TREE), \ 1265 1.1 mrg NDS32_BUILTIN_ ## CODE, BUILT_IN_MD, NULL, NULL_TREE) 1266 1.1 mrg 1267 1.1 mrg #define ADD_NDS32_BUILTIN3(NAME, RET_TYPE, \ 1268 1.1 mrg ARG_TYPE1, ARG_TYPE2, ARG_TYPE3, CODE) \ 1269 1.1 mrg nds32_builtin_decls[NDS32_BUILTIN_ ## CODE] = \ 1270 1.1 mrg add_builtin_function ("__builtin_nds32_" NAME, \ 1271 1.1 mrg build_function_type_list (RET_TYPE##_type_node, \ 1272 1.1 mrg ARG_TYPE1##_type_node,\ 1273 1.1 mrg ARG_TYPE2##_type_node,\ 1274 1.1 mrg ARG_TYPE3##_type_node,\ 1275 1.1 mrg NULL_TREE), \ 1276 1.1 mrg NDS32_BUILTIN_ ## CODE, BUILT_IN_MD, NULL, NULL_TREE) 1277 1.1 mrg 1278 1.1 mrg /* Looking for return type and argument can be found in tree.h file. */ 1279 1.1 mrg tree ptr_char_type_node = build_pointer_type (char_type_node); 1280 1.1 mrg tree ptr_uchar_type_node = build_pointer_type (unsigned_char_type_node); 1281 1.1 mrg tree ptr_ushort_type_node = build_pointer_type (short_unsigned_type_node); 1282 1.1 mrg tree ptr_short_type_node = build_pointer_type (short_integer_type_node); 1283 1.1 mrg tree ptr_uint_type_node = build_pointer_type (unsigned_type_node); 1284 1.1 mrg tree ptr_ulong_type_node = build_pointer_type (long_long_unsigned_type_node); 1285 1.1 mrg tree v4qi_type_node = build_vector_type (intQI_type_node, 4); 1286 1.1 mrg tree u_v4qi_type_node = build_vector_type (unsigned_intQI_type_node, 4); 1287 1.1 mrg tree v2hi_type_node = build_vector_type (intHI_type_node, 2); 1288 1.1 mrg tree u_v2hi_type_node = build_vector_type (unsigned_intHI_type_node, 2); 1289 1.1 mrg tree v2si_type_node = build_vector_type (intSI_type_node, 2); 1290 1.1 mrg tree u_v2si_type_node = build_vector_type (unsigned_intSI_type_node, 2); 1291 1.1 mrg 1292 1.1 mrg /* Cache. */ 1293 1.1 mrg ADD_NDS32_BUILTIN1 ("isync", void, ptr_uint, ISYNC); 1294 1.1 mrg ADD_NDS32_BUILTIN0 ("isb", void, ISB); 1295 1.1 mrg ADD_NDS32_BUILTIN0 ("dsb", void, DSB); 1296 1.1 mrg ADD_NDS32_BUILTIN0 ("msync_all", void, MSYNC_ALL); 1297 1.1 mrg ADD_NDS32_BUILTIN0 ("msync_store", void, MSYNC_STORE); 1298 1.1 mrg 1299 1.1 mrg /* Register Transfer. */ 1300 1.1 mrg ADD_NDS32_BUILTIN1 ("mfsr", unsigned, integer, MFSR); 1301 1.1 mrg ADD_NDS32_BUILTIN1 ("mfusr", unsigned, integer, MFUSR); 1302 1.1 mrg ADD_NDS32_BUILTIN2 ("mtsr", void, unsigned, integer, MTSR); 1303 1.1 mrg ADD_NDS32_BUILTIN2 ("mtsr_isb", void, unsigned, integer, MTSR_ISB); 1304 1.1 mrg ADD_NDS32_BUILTIN2 ("mtsr_dsb", void, unsigned, integer, MTSR_DSB); 1305 1.1 mrg ADD_NDS32_BUILTIN2 ("mtusr", void, unsigned, integer, MTUSR); 1306 1.1 mrg 1307 1.1 mrg /* FPU Register Transfer. */ 1308 1.1 mrg ADD_NDS32_BUILTIN0 ("fmfcsr", unsigned, FMFCSR); 1309 1.1 mrg ADD_NDS32_BUILTIN1 ("fmtcsr", void, unsigned, FMTCSR); 1310 1.1 mrg ADD_NDS32_BUILTIN0 ("fmfcfg", unsigned, FMFCFG); 1311 1.1 mrg ADD_NDS32_BUILTIN2 ("fcpyss", float, float, float, FCPYSS); 1312 1.1 mrg ADD_NDS32_BUILTIN2 ("fcpynss", float, float, float, FCPYNSS); 1313 1.1 mrg ADD_NDS32_BUILTIN2 ("fcpysd", double, double, double, FCPYSD); 1314 1.1 mrg ADD_NDS32_BUILTIN2 ("fcpynsd", double, double, double, FCPYNSD); 1315 1.1 mrg 1316 1.1 mrg /* Interrupt. */ 1317 1.1 mrg ADD_NDS32_BUILTIN0 ("setgie_en", void, SETGIE_EN); 1318 1.1 mrg ADD_NDS32_BUILTIN0 ("setgie_dis", void, SETGIE_DIS); 1319 1.1 mrg ADD_NDS32_BUILTIN0 ("gie_en", void, GIE_EN); 1320 1.1 mrg ADD_NDS32_BUILTIN0 ("gie_dis", void, GIE_DIS); 1321 1.1 mrg ADD_NDS32_BUILTIN1 ("enable_int", void, integer, ENABLE_INT); 1322 1.1 mrg ADD_NDS32_BUILTIN1 ("disable_int", void, integer, DISABLE_INT); 1323 1.1 mrg ADD_NDS32_BUILTIN0 ("set_pending_swint", void, SET_PENDING_SWINT); 1324 1.1 mrg ADD_NDS32_BUILTIN0 ("clr_pending_swint", void, CLR_PENDING_SWINT); 1325 1.1 mrg ADD_NDS32_BUILTIN0 ("get_all_pending_int", unsigned, GET_ALL_PENDING_INT); 1326 1.1 mrg ADD_NDS32_BUILTIN1 ("get_pending_int", unsigned, integer, GET_PENDING_INT); 1327 1.1 mrg ADD_NDS32_BUILTIN1 ("get_int_priority", unsigned, integer, GET_INT_PRIORITY); 1328 1.1 mrg ADD_NDS32_BUILTIN2 ("set_int_priority", void, integer, integer, 1329 1.1 mrg SET_INT_PRIORITY); 1330 1.1 mrg ADD_NDS32_BUILTIN1 ("clr_pending_hwint", void, integer, CLR_PENDING_HWINT); 1331 1.1 mrg ADD_NDS32_BUILTIN1 ("set_trig_level", void, integer, SET_TRIG_LEVEL); 1332 1.1 mrg ADD_NDS32_BUILTIN1 ("set_trig_edge", void, integer, SET_TRIG_EDGE); 1333 1.1 mrg ADD_NDS32_BUILTIN1 ("get_trig_type", unsigned, integer, GET_TRIG_TYPE); 1334 1.1 mrg 1335 1.1 mrg /* Load and Store */ 1336 1.1 mrg ADD_NDS32_BUILTIN1 ("llw", unsigned, ptr_uint, LLW); 1337 1.1 mrg ADD_NDS32_BUILTIN1 ("lwup", unsigned, ptr_uint, LWUP); 1338 1.1 mrg ADD_NDS32_BUILTIN1 ("lbup", char, ptr_uchar, LBUP); 1339 1.1 mrg ADD_NDS32_BUILTIN2 ("scw", unsigned, ptr_uint, unsigned, SCW); 1340 1.1 mrg ADD_NDS32_BUILTIN2 ("swup", void, ptr_uint, unsigned, SWUP); 1341 1.1 mrg ADD_NDS32_BUILTIN2 ("sbup", void, ptr_uchar, char, SBUP); 1342 1.1 mrg 1343 1.1 mrg /* CCTL */ 1344 1.1 mrg ADD_NDS32_BUILTIN0 ("cctl_l1d_invalall", void, CCTL_L1D_INVALALL); 1345 1.1 mrg ADD_NDS32_BUILTIN0 ("cctl_l1d_wball_alvl", void, CCTL_L1D_WBALL_ALVL); 1346 1.1 mrg ADD_NDS32_BUILTIN0 ("cctl_l1d_wball_one_lvl", void, CCTL_L1D_WBALL_ONE_LVL); 1347 1.1 mrg ADD_NDS32_BUILTIN2 ("cctl_va_lck", void, integer, ptr_uint, CCTL_VA_LCK); 1348 1.1 mrg ADD_NDS32_BUILTIN2 ("cctl_idx_wbinval", void, integer, unsigned, 1349 1.1 mrg CCTL_IDX_WBINVAL); 1350 1.1 mrg ADD_NDS32_BUILTIN2 ("cctl_va_wbinval_l1", void, integer, ptr_uint, 1351 1.1 mrg CCTL_VA_WBINVAL_L1); 1352 1.1 mrg ADD_NDS32_BUILTIN2 ("cctl_va_wbinval_la", void, integer, ptr_uint, 1353 1.1 mrg CCTL_VA_WBINVAL_LA); 1354 1.1 mrg ADD_NDS32_BUILTIN2 ("cctl_idx_read", unsigned, integer, unsigned, 1355 1.1 mrg CCTL_IDX_READ); 1356 1.1 mrg ADD_NDS32_BUILTIN3 ("cctl_idx_write", void, integer, unsigned, unsigned, 1357 1.1 mrg CCTL_IDX_WRITE); 1358 1.1 mrg 1359 1.1 mrg /* PREFETCH */ 1360 1.1 mrg ADD_NDS32_BUILTIN3 ("dpref_qw", void, ptr_uchar, unsigned, integer, DPREF_QW); 1361 1.1 mrg ADD_NDS32_BUILTIN3 ("dpref_hw", void, ptr_ushort, unsigned, integer, 1362 1.1 mrg DPREF_HW); 1363 1.1 mrg ADD_NDS32_BUILTIN3 ("dpref_w", void, ptr_uint, unsigned, integer, DPREF_W); 1364 1.1 mrg ADD_NDS32_BUILTIN3 ("dpref_dw", void, ptr_ulong, unsigned, integer, DPREF_DW); 1365 1.1 mrg 1366 1.1 mrg /* Performance Extension */ 1367 1.1 mrg ADD_NDS32_BUILTIN1 ("pe_abs", integer, integer, ABS); 1368 1.1 mrg ADD_NDS32_BUILTIN2 ("pe_ave", integer, integer, integer, AVE); 1369 1.1 mrg ADD_NDS32_BUILTIN2 ("pe_bclr", unsigned, unsigned, unsigned, BCLR); 1370 1.1 mrg ADD_NDS32_BUILTIN2 ("pe_bset", unsigned, unsigned, unsigned, BSET); 1371 1.1 mrg ADD_NDS32_BUILTIN2 ("pe_btgl", unsigned, unsigned, unsigned, BTGL); 1372 1.1 mrg ADD_NDS32_BUILTIN2 ("pe_btst", unsigned, unsigned, unsigned, BTST); 1373 1.1 mrg ADD_NDS32_BUILTIN2 ("pe_clip", unsigned, integer, unsigned, CLIP); 1374 1.1 mrg ADD_NDS32_BUILTIN2 ("pe_clips", integer, integer, unsigned, CLIPS); 1375 1.1 mrg ADD_NDS32_BUILTIN1 ("pe_clz", unsigned, unsigned, CLZ); 1376 1.1 mrg ADD_NDS32_BUILTIN1 ("pe_clo", unsigned, unsigned, CLO); 1377 1.1 mrg 1378 1.1 mrg /* Performance Extension 2 */ 1379 1.1 mrg ADD_NDS32_BUILTIN3 ("pe2_bse", void, ptr_uint, unsigned, ptr_uint, BSE); 1380 1.1 mrg ADD_NDS32_BUILTIN3 ("pe2_bsp", void, ptr_uint, unsigned, ptr_uint, BSP); 1381 1.1 mrg ADD_NDS32_BUILTIN2 ("pe2_pbsad", unsigned, unsigned, unsigned, PBSAD); 1382 1.1 mrg ADD_NDS32_BUILTIN3 ("pe2_pbsada", unsigned, unsigned, unsigned, unsigned, 1383 1.1 mrg PBSADA); 1384 1.1 mrg 1385 1.1 mrg /* String Extension */ 1386 1.1 mrg ADD_NDS32_BUILTIN2 ("se_ffb", integer, unsigned, unsigned, FFB); 1387 1.1 mrg ADD_NDS32_BUILTIN2 ("se_ffmism", integer, unsigned, unsigned, FFMISM); 1388 1.1 mrg ADD_NDS32_BUILTIN2 ("se_flmism", integer, unsigned, unsigned, FLMISM); 1389 1.1 mrg 1390 1.1 mrg /* SATURATION */ 1391 1.1 mrg ADD_NDS32_BUILTIN2 ("kaddw", integer, integer, integer, KADDW); 1392 1.1 mrg ADD_NDS32_BUILTIN2 ("ksubw", integer, integer, integer, KSUBW); 1393 1.1 mrg ADD_NDS32_BUILTIN2 ("kaddh", integer, integer, integer, KADDH); 1394 1.1 mrg ADD_NDS32_BUILTIN2 ("ksubh", integer, integer, integer, KSUBH); 1395 1.1 mrg ADD_NDS32_BUILTIN2 ("kdmbb", integer, unsigned, unsigned, KDMBB); 1396 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kdmbb", integer, v2hi, v2hi, V_KDMBB); 1397 1.1 mrg ADD_NDS32_BUILTIN2 ("kdmbt", integer, unsigned, unsigned, KDMBT); 1398 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kdmbt", integer, v2hi, v2hi, V_KDMBT); 1399 1.1 mrg ADD_NDS32_BUILTIN2 ("kdmtb", integer, unsigned, unsigned, KDMTB); 1400 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kdmtb", integer, v2hi, v2hi, V_KDMTB); 1401 1.1 mrg ADD_NDS32_BUILTIN2 ("kdmtt", integer, unsigned, unsigned, KDMTT); 1402 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kdmtt", integer, v2hi, v2hi, V_KDMTT); 1403 1.1 mrg ADD_NDS32_BUILTIN2 ("khmbb", integer, unsigned, unsigned, KHMBB); 1404 1.1 mrg ADD_NDS32_BUILTIN2 ("v_khmbb", integer, v2hi, v2hi, V_KHMBB); 1405 1.1 mrg ADD_NDS32_BUILTIN2 ("khmbt", integer, unsigned, unsigned, KHMBT); 1406 1.1 mrg ADD_NDS32_BUILTIN2 ("v_khmbt", integer, v2hi, v2hi, V_KHMBT); 1407 1.1 mrg ADD_NDS32_BUILTIN2 ("khmtb", integer, unsigned, unsigned, KHMTB); 1408 1.1 mrg ADD_NDS32_BUILTIN2 ("v_khmtb", integer, v2hi, v2hi, V_KHMTB); 1409 1.1 mrg ADD_NDS32_BUILTIN2 ("khmtt", integer, unsigned, unsigned, KHMTT); 1410 1.1 mrg ADD_NDS32_BUILTIN2 ("v_khmtt", integer, v2hi, v2hi, V_KHMTT); 1411 1.1 mrg ADD_NDS32_BUILTIN2 ("kslraw", integer, integer, integer, KSLRAW); 1412 1.1 mrg ADD_NDS32_BUILTIN2 ("kslraw_u", integer, integer, integer, KSLRAW_U); 1413 1.1 mrg ADD_NDS32_BUILTIN0 ("rdov", unsigned, RDOV); 1414 1.1 mrg ADD_NDS32_BUILTIN0 ("clrov", void, CLROV); 1415 1.1 mrg 1416 1.1 mrg /* ROTR */ 1417 1.1 mrg ADD_NDS32_BUILTIN2 ("rotr", unsigned, unsigned, unsigned, ROTR); 1418 1.1 mrg 1419 1.1 mrg /* Swap */ 1420 1.1 mrg ADD_NDS32_BUILTIN1 ("wsbh", unsigned, unsigned, WSBH); 1421 1.1 mrg 1422 1.1 mrg /* System */ 1423 1.1 mrg ADD_NDS32_BUILTIN2 ("svs", unsigned, integer, integer, SVS); 1424 1.1 mrg ADD_NDS32_BUILTIN2 ("sva", unsigned, integer, integer, SVA); 1425 1.1 mrg ADD_NDS32_BUILTIN1 ("jr_itoff", void, unsigned, JR_ITOFF); 1426 1.1 mrg ADD_NDS32_BUILTIN1 ("jr_toff", void, unsigned, JR_TOFF); 1427 1.1 mrg ADD_NDS32_BUILTIN1 ("jral_iton", void, unsigned, JRAL_ITON); 1428 1.1 mrg ADD_NDS32_BUILTIN1 ("jral_ton", void, unsigned, JRAL_TON); 1429 1.1 mrg ADD_NDS32_BUILTIN1 ("ret_itoff", void, unsigned, RET_ITOFF); 1430 1.1 mrg ADD_NDS32_BUILTIN1 ("ret_toff", void, unsigned, RET_TOFF); 1431 1.1 mrg ADD_NDS32_BUILTIN0 ("standby_no_wake_grant", void, STANDBY_NO_WAKE_GRANT); 1432 1.1 mrg ADD_NDS32_BUILTIN0 ("standby_wake_grant", void, STANDBY_WAKE_GRANT); 1433 1.1 mrg ADD_NDS32_BUILTIN0 ("standby_wait_done", void, STANDBY_WAKE_DONE); 1434 1.1 mrg ADD_NDS32_BUILTIN1 ("break", void, unsigned, BREAK); 1435 1.1 mrg ADD_NDS32_BUILTIN1 ("syscall", void, unsigned, SYSCALL); 1436 1.1 mrg ADD_NDS32_BUILTIN0 ("nop", void, NOP); 1437 1.1 mrg ADD_NDS32_BUILTIN0 ("get_current_sp", unsigned, GET_CURRENT_SP); 1438 1.1 mrg ADD_NDS32_BUILTIN1 ("set_current_sp", void, unsigned, SET_CURRENT_SP); 1439 1.1 mrg ADD_NDS32_BUILTIN2 ("teqz", void, unsigned, unsigned, TEQZ); 1440 1.1 mrg ADD_NDS32_BUILTIN2 ("tnez", void, unsigned, unsigned, TNEZ); 1441 1.1 mrg ADD_NDS32_BUILTIN1 ("trap", void, unsigned, TRAP); 1442 1.1 mrg ADD_NDS32_BUILTIN0 ("return_address", unsigned, RETURN_ADDRESS); 1443 1.1 mrg ADD_NDS32_BUILTIN0 ("setend_big", void, SETEND_BIG); 1444 1.1 mrg ADD_NDS32_BUILTIN0 ("setend_little", void, SETEND_LITTLE); 1445 1.1 mrg 1446 1.1 mrg /* Schedule Barrier */ 1447 1.1 mrg ADD_NDS32_BUILTIN0 ("schedule_barrier", void, SCHE_BARRIER); 1448 1.1 mrg 1449 1.1 mrg /* TLBOP */ 1450 1.1 mrg ADD_NDS32_BUILTIN1 ("tlbop_trd", void, unsigned, TLBOP_TRD); 1451 1.1 mrg ADD_NDS32_BUILTIN1 ("tlbop_twr", void, unsigned, TLBOP_TWR); 1452 1.1 mrg ADD_NDS32_BUILTIN1 ("tlbop_rwr", void, unsigned, TLBOP_RWR); 1453 1.1 mrg ADD_NDS32_BUILTIN1 ("tlbop_rwlk", void, unsigned, TLBOP_RWLK); 1454 1.1 mrg ADD_NDS32_BUILTIN1 ("tlbop_unlk", void, unsigned, TLBOP_UNLK); 1455 1.1 mrg ADD_NDS32_BUILTIN1 ("tlbop_pb", unsigned, unsigned, TLBOP_PB); 1456 1.1 mrg ADD_NDS32_BUILTIN1 ("tlbop_inv", void, unsigned, TLBOP_INV); 1457 1.1 mrg ADD_NDS32_BUILTIN0 ("tlbop_flua", void, TLBOP_FLUA); 1458 1.1 mrg 1459 1.1 mrg /* Unaligned Load/Store */ 1460 1.1 mrg ADD_NDS32_BUILTIN1 ("unaligned_load_hw", short_unsigned, ptr_ushort, 1461 1.1 mrg UALOAD_HW); 1462 1.1 mrg ADD_NDS32_BUILTIN1 ("unaligned_load_w", unsigned, ptr_uint, UALOAD_W); 1463 1.1 mrg ADD_NDS32_BUILTIN1 ("unaligned_load_dw", long_long_unsigned, ptr_ulong, 1464 1.1 mrg UALOAD_DW); 1465 1.1 mrg ADD_NDS32_BUILTIN2 ("unaligned_store_hw", void, ptr_ushort, short_unsigned, 1466 1.1 mrg UASTORE_HW); 1467 1.1 mrg ADD_NDS32_BUILTIN2 ("unaligned_store_w", void, ptr_uint, unsigned, UASTORE_W); 1468 1.1 mrg ADD_NDS32_BUILTIN2 ("unaligned_store_dw", void, ptr_ulong, long_long_unsigned, 1469 1.1 mrg UASTORE_DW); 1470 1.1 mrg ADD_NDS32_BUILTIN0 ("unaligned_feature", unsigned, UNALIGNED_FEATURE); 1471 1.1 mrg ADD_NDS32_BUILTIN0 ("enable_unaligned", void, ENABLE_UNALIGNED); 1472 1.1 mrg ADD_NDS32_BUILTIN0 ("disable_unaligned", void, DISABLE_UNALIGNED); 1473 1.1 mrg 1474 1.1 mrg /* DSP Extension: SIMD 16bit Add and Subtract. */ 1475 1.1 mrg ADD_NDS32_BUILTIN2 ("add16", unsigned, unsigned, unsigned, ADD16); 1476 1.1 mrg ADD_NDS32_BUILTIN2 ("v_uadd16", u_v2hi, u_v2hi, u_v2hi, V_UADD16); 1477 1.1 mrg ADD_NDS32_BUILTIN2 ("v_sadd16", v2hi, v2hi, v2hi, V_SADD16); 1478 1.1 mrg ADD_NDS32_BUILTIN2 ("radd16", unsigned, unsigned, unsigned, RADD16); 1479 1.1 mrg ADD_NDS32_BUILTIN2 ("v_radd16", v2hi, v2hi, v2hi, V_RADD16); 1480 1.1 mrg ADD_NDS32_BUILTIN2 ("uradd16", unsigned, unsigned, unsigned, URADD16); 1481 1.1 mrg ADD_NDS32_BUILTIN2 ("v_uradd16", u_v2hi, u_v2hi, u_v2hi, V_URADD16); 1482 1.1 mrg ADD_NDS32_BUILTIN2 ("kadd16", unsigned, unsigned, unsigned, KADD16); 1483 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kadd16", v2hi, v2hi, v2hi, V_KADD16); 1484 1.1 mrg ADD_NDS32_BUILTIN2 ("ukadd16", unsigned, unsigned, unsigned, UKADD16); 1485 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ukadd16", u_v2hi, u_v2hi, u_v2hi, V_UKADD16); 1486 1.1 mrg ADD_NDS32_BUILTIN2 ("sub16", unsigned, unsigned, unsigned, SUB16); 1487 1.1 mrg ADD_NDS32_BUILTIN2 ("v_usub16", u_v2hi, u_v2hi, u_v2hi, V_USUB16); 1488 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ssub16", v2hi, v2hi, v2hi, V_SSUB16); 1489 1.1 mrg ADD_NDS32_BUILTIN2 ("rsub16", unsigned, unsigned, unsigned, RSUB16); 1490 1.1 mrg ADD_NDS32_BUILTIN2 ("v_rsub16", v2hi, v2hi, v2hi, V_RSUB16); 1491 1.1 mrg ADD_NDS32_BUILTIN2 ("ursub16", unsigned, unsigned, unsigned, URSUB16); 1492 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ursub16", u_v2hi, u_v2hi, u_v2hi, V_URSUB16); 1493 1.1 mrg ADD_NDS32_BUILTIN2 ("ksub16", unsigned, unsigned, unsigned, KSUB16); 1494 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ksub16", v2hi, v2hi, v2hi, V_KSUB16); 1495 1.1 mrg ADD_NDS32_BUILTIN2 ("uksub16", unsigned, unsigned, unsigned, UKSUB16); 1496 1.1 mrg ADD_NDS32_BUILTIN2 ("v_uksub16", u_v2hi, u_v2hi, u_v2hi, V_UKSUB16); 1497 1.1 mrg ADD_NDS32_BUILTIN2 ("cras16", unsigned, unsigned, unsigned, CRAS16); 1498 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucras16", u_v2hi, u_v2hi, u_v2hi, V_UCRAS16); 1499 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scras16", v2hi, v2hi, v2hi, V_SCRAS16); 1500 1.1 mrg ADD_NDS32_BUILTIN2 ("rcras16", unsigned, unsigned, unsigned, RCRAS16); 1501 1.1 mrg ADD_NDS32_BUILTIN2 ("v_rcras16", v2hi, v2hi, v2hi, V_RCRAS16); 1502 1.1 mrg ADD_NDS32_BUILTIN2 ("urcras16", unsigned, unsigned, unsigned, URCRAS16); 1503 1.1 mrg ADD_NDS32_BUILTIN2 ("v_urcras16", u_v2hi, u_v2hi, u_v2hi, V_URCRAS16); 1504 1.1 mrg ADD_NDS32_BUILTIN2 ("kcras16", unsigned, unsigned, unsigned, KCRAS16); 1505 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kcras16", v2hi, v2hi, v2hi, V_KCRAS16); 1506 1.1 mrg ADD_NDS32_BUILTIN2 ("ukcras16", unsigned, unsigned, unsigned, UKCRAS16); 1507 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ukcras16", u_v2hi, u_v2hi, u_v2hi, V_UKCRAS16); 1508 1.1 mrg ADD_NDS32_BUILTIN2 ("crsa16", unsigned, unsigned, unsigned, CRSA16); 1509 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucrsa16", u_v2hi, u_v2hi, u_v2hi, V_UCRSA16); 1510 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scrsa16", v2hi, v2hi, v2hi, V_SCRSA16); 1511 1.1 mrg ADD_NDS32_BUILTIN2 ("rcrsa16", unsigned, unsigned, unsigned, RCRSA16); 1512 1.1 mrg ADD_NDS32_BUILTIN2 ("v_rcrsa16", v2hi, v2hi, v2hi, V_RCRSA16); 1513 1.1 mrg ADD_NDS32_BUILTIN2 ("urcrsa16", unsigned, unsigned, unsigned, URCRSA16); 1514 1.1 mrg ADD_NDS32_BUILTIN2 ("v_urcrsa16", u_v2hi, u_v2hi, u_v2hi, V_URCRSA16); 1515 1.1 mrg ADD_NDS32_BUILTIN2 ("kcrsa16", unsigned, unsigned, unsigned, KCRSA16); 1516 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kcrsa16", v2hi, v2hi, v2hi, V_KCRSA16); 1517 1.1 mrg ADD_NDS32_BUILTIN2 ("ukcrsa16", unsigned, unsigned, unsigned, UKCRSA16); 1518 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ukcrsa16", u_v2hi, u_v2hi, u_v2hi, V_UKCRSA16); 1519 1.1 mrg 1520 1.1 mrg /* DSP Extension: SIMD 8bit Add and Subtract. */ 1521 1.1 mrg ADD_NDS32_BUILTIN2 ("add8", integer, integer, integer, ADD8); 1522 1.1 mrg ADD_NDS32_BUILTIN2 ("v_uadd8", u_v4qi, u_v4qi, u_v4qi, V_UADD8); 1523 1.1 mrg ADD_NDS32_BUILTIN2 ("v_sadd8", v4qi, v4qi, v4qi, V_SADD8); 1524 1.1 mrg ADD_NDS32_BUILTIN2 ("radd8", unsigned, unsigned, unsigned, RADD8); 1525 1.1 mrg ADD_NDS32_BUILTIN2 ("v_radd8", v4qi, v4qi, v4qi, V_RADD8); 1526 1.1 mrg ADD_NDS32_BUILTIN2 ("uradd8", unsigned, unsigned, unsigned, URADD8); 1527 1.1 mrg ADD_NDS32_BUILTIN2 ("v_uradd8", u_v4qi, u_v4qi, u_v4qi, V_URADD8); 1528 1.1 mrg ADD_NDS32_BUILTIN2 ("kadd8", unsigned, unsigned, unsigned, KADD8); 1529 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kadd8", v4qi, v4qi, v4qi, V_KADD8); 1530 1.1 mrg ADD_NDS32_BUILTIN2 ("ukadd8", unsigned, unsigned, unsigned, UKADD8); 1531 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ukadd8", u_v4qi, u_v4qi, u_v4qi, V_UKADD8); 1532 1.1 mrg ADD_NDS32_BUILTIN2 ("sub8", integer, integer, integer, SUB8); 1533 1.1 mrg ADD_NDS32_BUILTIN2 ("v_usub8", u_v4qi, u_v4qi, u_v4qi, V_USUB8); 1534 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ssub8", v4qi, v4qi, v4qi, V_SSUB8); 1535 1.1 mrg ADD_NDS32_BUILTIN2 ("rsub8", unsigned, unsigned, unsigned, RSUB8); 1536 1.1 mrg ADD_NDS32_BUILTIN2 ("v_rsub8", v4qi, v4qi, v4qi, V_RSUB8); 1537 1.1 mrg ADD_NDS32_BUILTIN2 ("ursub8", unsigned, unsigned, unsigned, URSUB8); 1538 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ursub8", u_v4qi, u_v4qi, u_v4qi, V_URSUB8); 1539 1.1 mrg ADD_NDS32_BUILTIN2 ("ksub8", unsigned, unsigned, unsigned, KSUB8); 1540 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ksub8", v4qi, v4qi, v4qi, V_KSUB8); 1541 1.1 mrg ADD_NDS32_BUILTIN2 ("uksub8", unsigned, unsigned, unsigned, UKSUB8); 1542 1.1 mrg ADD_NDS32_BUILTIN2 ("v_uksub8", u_v4qi, u_v4qi, u_v4qi, V_UKSUB8); 1543 1.1 mrg 1544 1.1 mrg /* DSP Extension: SIMD 16bit Shift. */ 1545 1.1 mrg ADD_NDS32_BUILTIN2 ("sra16", unsigned, unsigned, unsigned, SRA16); 1546 1.1 mrg ADD_NDS32_BUILTIN2 ("v_sra16", v2hi, v2hi, unsigned, V_SRA16); 1547 1.1 mrg ADD_NDS32_BUILTIN2 ("sra16_u", unsigned, unsigned, unsigned, SRA16_U); 1548 1.1 mrg ADD_NDS32_BUILTIN2 ("v_sra16_u", v2hi, v2hi, unsigned, V_SRA16_U); 1549 1.1 mrg ADD_NDS32_BUILTIN2 ("srl16", unsigned, unsigned, unsigned, SRL16); 1550 1.1 mrg ADD_NDS32_BUILTIN2 ("v_srl16", u_v2hi, u_v2hi, unsigned, V_SRL16); 1551 1.1 mrg ADD_NDS32_BUILTIN2 ("srl16_u", unsigned, unsigned, unsigned, SRL16_U); 1552 1.1 mrg ADD_NDS32_BUILTIN2 ("v_srl16_u", u_v2hi, u_v2hi, unsigned, V_SRL16_U); 1553 1.1 mrg ADD_NDS32_BUILTIN2 ("sll16", unsigned, unsigned, unsigned, SLL16); 1554 1.1 mrg ADD_NDS32_BUILTIN2 ("v_sll16", u_v2hi, u_v2hi, unsigned, V_SLL16); 1555 1.1 mrg ADD_NDS32_BUILTIN2 ("ksll16", unsigned, unsigned, unsigned, KSLL16); 1556 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ksll16", v2hi, v2hi, unsigned, V_KSLL16); 1557 1.1 mrg ADD_NDS32_BUILTIN2 ("kslra16", unsigned, unsigned, unsigned, KSLRA16); 1558 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kslra16", v2hi, v2hi, unsigned, V_KSLRA16); 1559 1.1 mrg ADD_NDS32_BUILTIN2 ("kslra16_u", unsigned, unsigned, unsigned, KSLRA16_U); 1560 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kslra16_u", v2hi, v2hi, unsigned, V_KSLRA16_U); 1561 1.1 mrg 1562 1.1 mrg /* DSP Extension: 16bit Compare. */ 1563 1.1 mrg ADD_NDS32_BUILTIN2 ("cmpeq16", unsigned, unsigned, unsigned, CMPEQ16); 1564 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scmpeq16", u_v2hi, v2hi, v2hi, V_SCMPEQ16); 1565 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucmpeq16", u_v2hi, u_v2hi, u_v2hi, V_UCMPEQ16); 1566 1.1 mrg ADD_NDS32_BUILTIN2 ("scmplt16", unsigned, unsigned, unsigned, SCMPLT16); 1567 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scmplt16", u_v2hi, v2hi, v2hi, V_SCMPLT16); 1568 1.1 mrg ADD_NDS32_BUILTIN2 ("scmple16", unsigned, unsigned, unsigned, SCMPLE16); 1569 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scmple16", u_v2hi, v2hi, v2hi, V_SCMPLE16); 1570 1.1 mrg ADD_NDS32_BUILTIN2 ("ucmplt16", unsigned, unsigned, unsigned, UCMPLT16); 1571 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucmplt16", u_v2hi, u_v2hi, u_v2hi, V_UCMPLT16); 1572 1.1 mrg ADD_NDS32_BUILTIN2 ("ucmple16", unsigned, unsigned, unsigned, UCMPLE16); 1573 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucmple16", u_v2hi, u_v2hi, u_v2hi, V_UCMPLE16); 1574 1.1 mrg 1575 1.1 mrg /* DSP Extension: 8bit Compare. */ 1576 1.1 mrg ADD_NDS32_BUILTIN2 ("cmpeq8", unsigned, unsigned, unsigned, CMPEQ8); 1577 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scmpeq8", u_v4qi, v4qi, v4qi, V_SCMPEQ8); 1578 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucmpeq8", u_v4qi, u_v4qi, u_v4qi, V_UCMPEQ8); 1579 1.1 mrg ADD_NDS32_BUILTIN2 ("scmplt8", unsigned, unsigned, unsigned, SCMPLT8); 1580 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scmplt8", u_v4qi, v4qi, v4qi, V_SCMPLT8); 1581 1.1 mrg ADD_NDS32_BUILTIN2 ("scmple8", unsigned, unsigned, unsigned, SCMPLE8); 1582 1.1 mrg ADD_NDS32_BUILTIN2 ("v_scmple8", u_v4qi, v4qi, v4qi, V_SCMPLE8); 1583 1.1 mrg ADD_NDS32_BUILTIN2 ("ucmplt8", unsigned, unsigned, unsigned, UCMPLT8); 1584 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucmplt8", u_v4qi, u_v4qi, u_v4qi, V_UCMPLT8); 1585 1.1 mrg ADD_NDS32_BUILTIN2 ("ucmple8", unsigned, unsigned, unsigned, UCMPLE8); 1586 1.1 mrg ADD_NDS32_BUILTIN2 ("v_ucmple8", u_v4qi, u_v4qi, u_v4qi, V_UCMPLE8); 1587 1.1 mrg 1588 1.1 mrg /* DSP Extension: SIMD 16bit MISC. */ 1589 1.1 mrg ADD_NDS32_BUILTIN2 ("smin16", unsigned, unsigned, unsigned, SMIN16); 1590 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smin16", v2hi, v2hi, v2hi, V_SMIN16); 1591 1.1 mrg ADD_NDS32_BUILTIN2 ("umin16", unsigned, unsigned, unsigned, UMIN16); 1592 1.1 mrg ADD_NDS32_BUILTIN2 ("v_umin16", u_v2hi, u_v2hi, u_v2hi, V_UMIN16); 1593 1.1 mrg ADD_NDS32_BUILTIN2 ("smax16", unsigned, unsigned, unsigned, SMAX16); 1594 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smax16", v2hi, v2hi, v2hi, V_SMAX16); 1595 1.1 mrg ADD_NDS32_BUILTIN2 ("umax16", unsigned, unsigned, unsigned, UMAX16); 1596 1.1 mrg ADD_NDS32_BUILTIN2 ("v_umax16", u_v2hi, u_v2hi, u_v2hi, V_UMAX16); 1597 1.1 mrg ADD_NDS32_BUILTIN2 ("sclip16", unsigned, unsigned, unsigned, SCLIP16); 1598 1.1 mrg ADD_NDS32_BUILTIN2 ("v_sclip16", v2hi, v2hi, unsigned, V_SCLIP16); 1599 1.1 mrg ADD_NDS32_BUILTIN2 ("uclip16", unsigned, unsigned, unsigned, UCLIP16); 1600 1.1 mrg ADD_NDS32_BUILTIN2 ("v_uclip16", v2hi, v2hi, unsigned, V_UCLIP16); 1601 1.1 mrg ADD_NDS32_BUILTIN2 ("khm16", unsigned, unsigned, unsigned, KHM16); 1602 1.1 mrg ADD_NDS32_BUILTIN2 ("v_khm16", v2hi, v2hi, v2hi, V_KHM16); 1603 1.1 mrg ADD_NDS32_BUILTIN2 ("khmx16", unsigned, unsigned, unsigned, KHMX16); 1604 1.1 mrg ADD_NDS32_BUILTIN2 ("v_khmx16", v2hi, v2hi, v2hi, V_KHMX16); 1605 1.1 mrg ADD_NDS32_BUILTIN1 ("kabs16", unsigned, unsigned, KABS16); 1606 1.1 mrg ADD_NDS32_BUILTIN1 ("v_kabs16", v2hi, v2hi, V_KABS16); 1607 1.1 mrg ADD_NDS32_BUILTIN2 ("smul16", long_long_unsigned, unsigned, unsigned, SMUL16); 1608 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smul16", v2si, v2hi, v2hi, V_SMUL16); 1609 1.1 mrg ADD_NDS32_BUILTIN2 ("smulx16", 1610 1.1 mrg long_long_unsigned, unsigned, unsigned, SMULX16); 1611 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smulx16", v2si, v2hi, v2hi, V_SMULX16); 1612 1.1 mrg ADD_NDS32_BUILTIN2 ("umul16", long_long_unsigned, unsigned, unsigned, UMUL16); 1613 1.1 mrg ADD_NDS32_BUILTIN2 ("v_umul16", u_v2si, u_v2hi, u_v2hi, V_UMUL16); 1614 1.1 mrg ADD_NDS32_BUILTIN2 ("umulx16", 1615 1.1 mrg long_long_unsigned, unsigned, unsigned, UMULX16); 1616 1.1 mrg ADD_NDS32_BUILTIN2 ("v_umulx16", u_v2si, u_v2hi, u_v2hi, V_UMULX16); 1617 1.1 mrg 1618 1.1 mrg /* DSP Extension: SIMD 8bit MISC. */ 1619 1.1 mrg ADD_NDS32_BUILTIN2 ("smin8", unsigned, unsigned, unsigned, SMIN8); 1620 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smin8", v4qi, v4qi, v4qi, V_SMIN8); 1621 1.1 mrg ADD_NDS32_BUILTIN2 ("umin8", unsigned, unsigned, unsigned, UMIN8); 1622 1.1 mrg ADD_NDS32_BUILTIN2 ("v_umin8", u_v4qi, u_v4qi, u_v4qi, V_UMIN8); 1623 1.1 mrg ADD_NDS32_BUILTIN2 ("smax8", unsigned, unsigned, unsigned, SMAX8); 1624 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smax8", v4qi, v4qi, v4qi, V_SMAX8); 1625 1.1 mrg ADD_NDS32_BUILTIN2 ("umax8", unsigned, unsigned, unsigned, UMAX8); 1626 1.1 mrg ADD_NDS32_BUILTIN2 ("v_umax8", u_v4qi, u_v4qi, u_v4qi, V_UMAX8); 1627 1.1 mrg ADD_NDS32_BUILTIN1 ("kabs8", unsigned, unsigned, KABS8); 1628 1.1 mrg ADD_NDS32_BUILTIN1 ("v_kabs8", v4qi, v4qi, V_KABS8); 1629 1.1 mrg 1630 1.1 mrg /* DSP Extension: 8bit Unpacking. */ 1631 1.1 mrg ADD_NDS32_BUILTIN1 ("sunpkd810", unsigned, unsigned, SUNPKD810); 1632 1.1 mrg ADD_NDS32_BUILTIN1 ("v_sunpkd810", v2hi, v4qi, V_SUNPKD810); 1633 1.1 mrg ADD_NDS32_BUILTIN1 ("sunpkd820", unsigned, unsigned, SUNPKD820); 1634 1.1 mrg ADD_NDS32_BUILTIN1 ("v_sunpkd820", v2hi, v4qi, V_SUNPKD820); 1635 1.1 mrg ADD_NDS32_BUILTIN1 ("sunpkd830", unsigned, unsigned, SUNPKD830); 1636 1.1 mrg ADD_NDS32_BUILTIN1 ("v_sunpkd830", v2hi, v4qi, V_SUNPKD830); 1637 1.1 mrg ADD_NDS32_BUILTIN1 ("sunpkd831", unsigned, unsigned, SUNPKD831); 1638 1.1 mrg ADD_NDS32_BUILTIN1 ("v_sunpkd831", v2hi, v4qi, V_SUNPKD831); 1639 1.1 mrg ADD_NDS32_BUILTIN1 ("zunpkd810", unsigned, unsigned, ZUNPKD810); 1640 1.1 mrg ADD_NDS32_BUILTIN1 ("v_zunpkd810", u_v2hi, u_v4qi, V_ZUNPKD810); 1641 1.1 mrg ADD_NDS32_BUILTIN1 ("zunpkd820", unsigned, unsigned, ZUNPKD820); 1642 1.1 mrg ADD_NDS32_BUILTIN1 ("v_zunpkd820", u_v2hi, u_v4qi, V_ZUNPKD820); 1643 1.1 mrg ADD_NDS32_BUILTIN1 ("zunpkd830", unsigned, unsigned, ZUNPKD830); 1644 1.1 mrg ADD_NDS32_BUILTIN1 ("v_zunpkd830", u_v2hi, u_v4qi, V_ZUNPKD830); 1645 1.1 mrg ADD_NDS32_BUILTIN1 ("zunpkd831", unsigned, unsigned, ZUNPKD831); 1646 1.1 mrg ADD_NDS32_BUILTIN1 ("v_zunpkd831", u_v2hi, u_v4qi, V_ZUNPKD831); 1647 1.1 mrg 1648 1.1 mrg /* DSP Extension: 32bit Add and Subtract. */ 1649 1.1 mrg ADD_NDS32_BUILTIN2 ("raddw", integer, integer, integer, RADDW); 1650 1.1 mrg ADD_NDS32_BUILTIN2 ("uraddw", unsigned, unsigned, unsigned, URADDW); 1651 1.1 mrg ADD_NDS32_BUILTIN2 ("rsubw", integer, integer, integer, RSUBW); 1652 1.1 mrg ADD_NDS32_BUILTIN2 ("ursubw", unsigned, unsigned, unsigned, URSUBW); 1653 1.1 mrg 1654 1.1 mrg /* DSP Extension: 32bit Shift. */ 1655 1.1 mrg ADD_NDS32_BUILTIN2 ("sra_u", integer, integer, unsigned, SRA_U); 1656 1.1 mrg ADD_NDS32_BUILTIN2 ("ksll", integer, integer, unsigned, KSLL); 1657 1.1 mrg 1658 1.1 mrg /* DSP Extension: 16bit Packing. */ 1659 1.1 mrg ADD_NDS32_BUILTIN2 ("pkbb16", unsigned, unsigned, unsigned, PKBB16); 1660 1.1 mrg ADD_NDS32_BUILTIN2 ("v_pkbb16", u_v2hi, u_v2hi, u_v2hi, V_PKBB16); 1661 1.1 mrg ADD_NDS32_BUILTIN2 ("pkbt16", unsigned, unsigned, unsigned, PKBT16); 1662 1.1 mrg ADD_NDS32_BUILTIN2 ("v_pkbt16", u_v2hi, u_v2hi, u_v2hi, V_PKBT16); 1663 1.1 mrg ADD_NDS32_BUILTIN2 ("pktb16", unsigned, unsigned, unsigned, PKTB16); 1664 1.1 mrg ADD_NDS32_BUILTIN2 ("v_pktb16", u_v2hi, u_v2hi, u_v2hi, V_PKTB16); 1665 1.1 mrg ADD_NDS32_BUILTIN2 ("pktt16", unsigned, unsigned, unsigned, PKTT16); 1666 1.1 mrg ADD_NDS32_BUILTIN2 ("v_pktt16", u_v2hi, u_v2hi, u_v2hi, V_PKTT16); 1667 1.1 mrg 1668 1.1 mrg /* DSP Extension: Signed MSW 32x32 Multiply and ADD. */ 1669 1.1 mrg ADD_NDS32_BUILTIN2 ("smmul", integer, integer, integer, SMMUL); 1670 1.1 mrg ADD_NDS32_BUILTIN2 ("smmul_u", integer, integer, integer, SMMUL_U); 1671 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmac", integer, integer, integer, integer, KMMAC); 1672 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmac_u", integer, integer, integer, integer, KMMAC_U); 1673 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmsb", integer, integer, integer, integer, KMMSB); 1674 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmsb_u", integer, integer, integer, integer, KMMSB_U); 1675 1.1 mrg ADD_NDS32_BUILTIN2 ("kwmmul", integer, integer, integer, KWMMUL); 1676 1.1 mrg ADD_NDS32_BUILTIN2 ("kwmmul_u", integer, integer, integer, KWMMUL_U); 1677 1.1 mrg 1678 1.1 mrg /* DSP Extension: Most Significant Word 32x16 Multiply and ADD. */ 1679 1.1 mrg ADD_NDS32_BUILTIN2 ("smmwb", integer, integer, unsigned, SMMWB); 1680 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smmwb", integer, integer, v2hi, V_SMMWB); 1681 1.1 mrg ADD_NDS32_BUILTIN2 ("smmwb_u", integer, integer, unsigned, SMMWB_U); 1682 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smmwb_u", integer, integer, v2hi, V_SMMWB_U); 1683 1.1 mrg ADD_NDS32_BUILTIN2 ("smmwt", integer, integer, unsigned, SMMWT); 1684 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smmwt", integer, integer, v2hi, V_SMMWT); 1685 1.1 mrg ADD_NDS32_BUILTIN2 ("smmwt_u", integer, integer, unsigned, SMMWT_U); 1686 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smmwt_u", integer, integer, v2hi, V_SMMWT_U); 1687 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmawb", integer, integer, integer, unsigned, KMMAWB); 1688 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmmawb", integer, integer, integer, v2hi, V_KMMAWB); 1689 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmawb_u", 1690 1.1 mrg integer, integer, integer, unsigned, KMMAWB_U); 1691 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmmawb_u", 1692 1.1 mrg integer, integer, integer, v2hi, V_KMMAWB_U); 1693 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmawt", integer, integer, integer, unsigned, KMMAWT); 1694 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmmawt", integer, integer, integer, v2hi, V_KMMAWT); 1695 1.1 mrg ADD_NDS32_BUILTIN3 ("kmmawt_u", 1696 1.1 mrg integer, integer, integer, unsigned, KMMAWT_U); 1697 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmmawt_u", 1698 1.1 mrg integer, integer, integer, v2hi, V_KMMAWT_U); 1699 1.1 mrg 1700 1.1 mrg /* DSP Extension: Signed 16bit Multiply with ADD/Subtract. */ 1701 1.1 mrg ADD_NDS32_BUILTIN2 ("smbb", integer, unsigned, unsigned, SMBB); 1702 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smbb", integer, v2hi, v2hi, V_SMBB); 1703 1.1 mrg ADD_NDS32_BUILTIN2 ("smbt", integer, unsigned, unsigned, SMBT); 1704 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smbt", integer, v2hi, v2hi, V_SMBT); 1705 1.1 mrg ADD_NDS32_BUILTIN2 ("smtt", integer, unsigned, unsigned, SMTT); 1706 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smtt", integer, v2hi, v2hi, V_SMTT); 1707 1.1 mrg ADD_NDS32_BUILTIN2 ("kmda", integer, unsigned, unsigned, KMDA); 1708 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kmda", integer, v2hi, v2hi, V_KMDA); 1709 1.1 mrg ADD_NDS32_BUILTIN2 ("kmxda", integer, unsigned, unsigned, KMXDA); 1710 1.1 mrg ADD_NDS32_BUILTIN2 ("v_kmxda", integer, v2hi, v2hi, V_KMXDA); 1711 1.1 mrg ADD_NDS32_BUILTIN2 ("smds", integer, unsigned, unsigned, SMDS); 1712 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smds", integer, v2hi, v2hi, V_SMDS); 1713 1.1 mrg ADD_NDS32_BUILTIN2 ("smdrs", integer, unsigned, unsigned, SMDRS); 1714 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smdrs", integer, v2hi, v2hi, V_SMDRS); 1715 1.1 mrg ADD_NDS32_BUILTIN2 ("smxds", integer, unsigned, unsigned, SMXDS); 1716 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smxds", integer, v2hi, v2hi, V_SMXDS); 1717 1.1 mrg ADD_NDS32_BUILTIN3 ("kmabb", integer, integer, unsigned, unsigned, KMABB); 1718 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmabb", integer, integer, v2hi, v2hi, V_KMABB); 1719 1.1 mrg ADD_NDS32_BUILTIN3 ("kmabt", integer, integer, unsigned, unsigned, KMABT); 1720 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmabt", integer, integer, v2hi, v2hi, V_KMABT); 1721 1.1 mrg ADD_NDS32_BUILTIN3 ("kmatt", integer, integer, unsigned, unsigned, KMATT); 1722 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmatt", integer, integer, v2hi, v2hi, V_KMATT); 1723 1.1 mrg ADD_NDS32_BUILTIN3 ("kmada", integer, integer, unsigned, unsigned, KMADA); 1724 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmada", integer, integer, v2hi, v2hi, V_KMADA); 1725 1.1 mrg ADD_NDS32_BUILTIN3 ("kmaxda", integer, integer, unsigned, unsigned, KMAXDA); 1726 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmaxda", integer, integer, v2hi, v2hi, V_KMAXDA); 1727 1.1 mrg ADD_NDS32_BUILTIN3 ("kmads", integer, integer, unsigned, unsigned, KMADS); 1728 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmads", integer, integer, v2hi, v2hi, V_KMADS); 1729 1.1 mrg ADD_NDS32_BUILTIN3 ("kmadrs", integer, integer, unsigned, unsigned, KMADRS); 1730 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmadrs", integer, integer, v2hi, v2hi, V_KMADRS); 1731 1.1 mrg ADD_NDS32_BUILTIN3 ("kmaxds", integer, integer, unsigned, unsigned, KMAXDS); 1732 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmaxds", integer, integer, v2hi, v2hi, V_KMAXDS); 1733 1.1 mrg ADD_NDS32_BUILTIN3 ("kmsda", integer, integer, unsigned, unsigned, KMSDA); 1734 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmsda", integer, integer, v2hi, v2hi, V_KMSDA); 1735 1.1 mrg ADD_NDS32_BUILTIN3 ("kmsxda", integer, integer, unsigned, unsigned, KMSXDA); 1736 1.1 mrg ADD_NDS32_BUILTIN3 ("v_kmsxda", integer, integer, v2hi, v2hi, V_KMSXDA); 1737 1.1 mrg 1738 1.1 mrg /* DSP Extension: Signed 16bit Multiply with 64bit ADD/Subtract. */ 1739 1.1 mrg ADD_NDS32_BUILTIN2 ("smal", long_long_integer, 1740 1.1 mrg long_long_integer, unsigned, SMAL); 1741 1.1 mrg ADD_NDS32_BUILTIN2 ("v_smal", long_long_integer, 1742 1.1 mrg long_long_integer, v2hi, V_SMAL); 1743 1.1 mrg 1744 1.1 mrg /* DSP Extension: 32bit MISC. */ 1745 1.1 mrg ADD_NDS32_BUILTIN2 ("bitrev", unsigned, unsigned, unsigned, BITREV); 1746 1.1 mrg ADD_NDS32_BUILTIN2 ("wext", unsigned, long_long_integer, unsigned, WEXT); 1747 1.1 mrg ADD_NDS32_BUILTIN3 ("bpick", unsigned, unsigned, unsigned, unsigned, BPICK); 1748 1.1 mrg ADD_NDS32_BUILTIN3 ("insb", unsigned, unsigned, unsigned, unsigned, INSB); 1749 1.1 mrg 1750 1.1 mrg /* DSP Extension: 64bit Add and Subtract. */ 1751 1.1 mrg ADD_NDS32_BUILTIN2 ("sadd64", long_long_integer, 1752 1.1 mrg long_long_integer, long_long_integer, SADD64); 1753 1.1 mrg ADD_NDS32_BUILTIN2 ("uadd64", long_long_unsigned, 1754 1.1 mrg long_long_unsigned, long_long_unsigned, UADD64); 1755 1.1 mrg ADD_NDS32_BUILTIN2 ("radd64", long_long_integer, 1756 1.1 mrg long_long_integer, long_long_integer, RADD64); 1757 1.1 mrg ADD_NDS32_BUILTIN2 ("uradd64", long_long_unsigned, 1758 1.1 mrg long_long_unsigned, long_long_unsigned, URADD64); 1759 1.1 mrg ADD_NDS32_BUILTIN2 ("kadd64", long_long_integer, 1760 1.1 mrg long_long_integer, long_long_integer, KADD64); 1761 1.1 mrg ADD_NDS32_BUILTIN2 ("ukadd64", long_long_unsigned, 1762 1.1 mrg long_long_unsigned, long_long_unsigned, UKADD64); 1763 1.1 mrg ADD_NDS32_BUILTIN2 ("ssub64", long_long_integer, 1764 1.1 mrg long_long_integer, long_long_integer, SSUB64); 1765 1.1 mrg ADD_NDS32_BUILTIN2 ("usub64", long_long_unsigned, 1766 1.1 mrg long_long_unsigned, long_long_unsigned, USUB64); 1767 1.1 mrg ADD_NDS32_BUILTIN2 ("rsub64", long_long_integer, 1768 1.1 mrg long_long_integer, long_long_integer, RSUB64); 1769 1.1 mrg ADD_NDS32_BUILTIN2 ("ursub64", long_long_unsigned, 1770 1.1 mrg long_long_unsigned, long_long_unsigned, URSUB64); 1771 1.1 mrg ADD_NDS32_BUILTIN2 ("ksub64", long_long_integer, 1772 1.1 mrg long_long_integer, long_long_integer, KSUB64); 1773 1.1 mrg ADD_NDS32_BUILTIN2 ("uksub64", long_long_unsigned, 1774 1.1 mrg long_long_unsigned, long_long_unsigned, UKSUB64); 1775 1.1 mrg 1776 1.1 mrg /* DSP Extension: 32bit Multiply with 64bit Add/Subtract. */ 1777 1.1 mrg ADD_NDS32_BUILTIN3 ("smar64", long_long_integer, 1778 1.1 mrg long_long_integer, integer, integer, SMAR64); 1779 1.1 mrg ADD_NDS32_BUILTIN3 ("smsr64", long_long_integer, 1780 1.1 mrg long_long_integer, integer, integer, SMSR64); 1781 1.1 mrg ADD_NDS32_BUILTIN3 ("umar64", long_long_unsigned, 1782 1.1 mrg long_long_unsigned, unsigned, unsigned, UMAR64); 1783 1.1 mrg ADD_NDS32_BUILTIN3 ("umsr64", long_long_unsigned, 1784 1.1 mrg long_long_unsigned, unsigned, unsigned, UMSR64); 1785 1.1 mrg ADD_NDS32_BUILTIN3 ("kmar64", long_long_integer, 1786 1.1 mrg long_long_integer, integer, integer, KMAR64); 1787 1.1 mrg ADD_NDS32_BUILTIN3 ("kmsr64", long_long_integer, 1788 1.1 mrg long_long_integer, integer, integer, KMSR64); 1789 1.1 mrg ADD_NDS32_BUILTIN3 ("ukmar64", long_long_unsigned, 1790 1.1 mrg long_long_unsigned, unsigned, unsigned, UKMAR64); 1791 1.1 mrg ADD_NDS32_BUILTIN3 ("ukmsr64", long_long_unsigned, 1792 1.1 mrg long_long_unsigned, unsigned, unsigned, UKMSR64); 1793 1.1 mrg 1794 1.1 mrg /* DSP Extension: Signed 16bit Multiply with 64bit Add/Subtract. */ 1795 1.1 mrg ADD_NDS32_BUILTIN3 ("smalbb", long_long_integer, 1796 1.1 mrg long_long_integer, unsigned, unsigned, SMALBB); 1797 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smalbb", long_long_integer, 1798 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALBB); 1799 1.1 mrg ADD_NDS32_BUILTIN3 ("smalbt", long_long_integer, 1800 1.1 mrg long_long_integer, unsigned, unsigned, SMALBT); 1801 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smalbt", long_long_integer, 1802 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALBT); 1803 1.1 mrg ADD_NDS32_BUILTIN3 ("smaltt", long_long_integer, 1804 1.1 mrg long_long_integer, unsigned, unsigned, SMALTT); 1805 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smaltt", long_long_integer, 1806 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALTT); 1807 1.1 mrg ADD_NDS32_BUILTIN3 ("smalda", long_long_integer, 1808 1.1 mrg long_long_integer, unsigned, unsigned, SMALDA); 1809 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smalda", long_long_integer, 1810 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALDA); 1811 1.1 mrg ADD_NDS32_BUILTIN3 ("smalxda", long_long_integer, 1812 1.1 mrg long_long_integer, unsigned, unsigned, SMALXDA); 1813 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smalxda", long_long_integer, 1814 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALXDA); 1815 1.1 mrg ADD_NDS32_BUILTIN3 ("smalds", long_long_integer, 1816 1.1 mrg long_long_integer, unsigned, unsigned, SMALDS); 1817 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smalds", long_long_integer, 1818 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALDS); 1819 1.1 mrg ADD_NDS32_BUILTIN3 ("smaldrs", long_long_integer, 1820 1.1 mrg long_long_integer, unsigned, unsigned, SMALDRS); 1821 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smaldrs", long_long_integer, 1822 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALDRS); 1823 1.1 mrg ADD_NDS32_BUILTIN3 ("smalxds", long_long_integer, 1824 1.1 mrg long_long_integer, unsigned, unsigned, SMALXDS); 1825 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smalxds", long_long_integer, 1826 1.1 mrg long_long_integer, v2hi, v2hi, V_SMALXDS); 1827 1.1 mrg ADD_NDS32_BUILTIN3 ("smslda", long_long_integer, 1828 1.1 mrg long_long_integer, unsigned, unsigned, SMSLDA); 1829 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smslda", long_long_integer, 1830 1.1 mrg long_long_integer, v2hi, v2hi, V_SMSLDA); 1831 1.1 mrg ADD_NDS32_BUILTIN3 ("smslxda", long_long_integer, 1832 1.1 mrg long_long_integer, unsigned, unsigned, SMSLXDA); 1833 1.1 mrg ADD_NDS32_BUILTIN3 ("v_smslxda", long_long_integer, 1834 1.1 mrg long_long_integer, v2hi, v2hi, V_SMSLXDA); 1835 1.1 mrg 1836 1.1 mrg /* DSP Extension: augmented baseline. */ 1837 1.1 mrg ADD_NDS32_BUILTIN2 ("uclip32", unsigned, integer, unsigned, UCLIP32); 1838 1.1 mrg ADD_NDS32_BUILTIN2 ("sclip32", integer, integer, unsigned, SCLIP32); 1839 1.1 mrg ADD_NDS32_BUILTIN1 ("kabs", integer, integer, KABS); 1840 1.1 mrg 1841 1.1 mrg /* DSP Extension: vector type unaligned Load/Store */ 1842 1.1 mrg ADD_NDS32_BUILTIN1 ("get_unaligned_u16x2", u_v2hi, ptr_ushort, UALOAD_U16); 1843 1.1 mrg ADD_NDS32_BUILTIN1 ("get_unaligned_s16x2", v2hi, ptr_short, UALOAD_S16); 1844 1.1 mrg ADD_NDS32_BUILTIN1 ("get_unaligned_u8x4", u_v4qi, ptr_uchar, UALOAD_U8); 1845 1.1 mrg ADD_NDS32_BUILTIN1 ("get_unaligned_s8x4", v4qi, ptr_char, UALOAD_S8); 1846 1.1 mrg ADD_NDS32_BUILTIN2 ("put_unaligned_u16x2", void, ptr_ushort, 1847 1.1 mrg u_v2hi, UASTORE_U16); 1848 1.1 mrg ADD_NDS32_BUILTIN2 ("put_unaligned_s16x2", void, ptr_short, 1849 1.1 mrg v2hi, UASTORE_S16); 1850 1.1 mrg ADD_NDS32_BUILTIN2 ("put_unaligned_u8x4", void, ptr_uchar, 1851 1.1 mrg u_v4qi, UASTORE_U8); 1852 1.1 mrg ADD_NDS32_BUILTIN2 ("put_unaligned_s8x4", void, ptr_char, 1853 1.1 mrg v4qi, UASTORE_S8); 1854 1.1 mrg } 1855
Indexes created Mon Mar 30 00:23:01 UTC 2026