1 1.1 mrg /* Nios II R2 CDX ldwm/stwm/push.h/pop.n instruction patterns. 2 1.1 mrg This file was automatically generated using nios2-ldstwm.sml. 3 1.1 mrg Please do not edit manually. 4 1.1 mrg 5 1.7 mrg Copyright (C) 2014-2022 Free Software Foundation, Inc. 6 1.1 mrg Contributed by Mentor Graphics. 7 1.1 mrg 8 1.1 mrg This file is part of GCC. 9 1.1 mrg 10 1.1 mrg GCC is free software; you can redistribute it and/or modify it 11 1.1 mrg under the terms of the GNU General Public License as published 12 1.1 mrg by the Free Software Foundation; either version 3, or (at your 13 1.1 mrg option) any later version. 14 1.1 mrg 15 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT 16 1.1 mrg ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 1.1 mrg or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 1.1 mrg License for more details. 19 1.1 mrg 20 1.1 mrg You should have received a copy of the GNU General Public License and 21 1.1 mrg a copy of the GCC Runtime Library Exception along with this program; 22 1.1 mrg see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 23 1.1 mrg <http://www.gnu.org/licenses/>. */ 24 1.1 mrg 25 1.1 mrg (define_insn "*cdx_push_ra_fp" 26 1.1 mrg [(match_parallel 0 "" 27 1.1 mrg [(set (reg:SI SP_REGNO) 28 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 29 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 30 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO))])] 31 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3 32 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 33 1.1 mrg && (-INTVAL (operands[1]) - 8) <= 60" 34 1.1 mrg { 35 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 8); 36 1.1 mrg return "push.n\\t{ra, fp}, %2"; 37 1.1 mrg } 38 1.1 mrg [(set_attr "type" "push")]) 39 1.1 mrg 40 1.1 mrg (define_insn "*cdx_push_ra" 41 1.1 mrg [(match_parallel 0 "" 42 1.1 mrg [(set (reg:SI SP_REGNO) 43 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 44 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO))])] 45 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2 46 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 47 1.1 mrg && (-INTVAL (operands[1]) - 4) <= 60" 48 1.1 mrg { 49 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 4); 50 1.1 mrg return "push.n\\t{ra}, %2"; 51 1.1 mrg } 52 1.1 mrg [(set_attr "type" "push")]) 53 1.1 mrg 54 1.1 mrg (define_insn "*cdx_pop_fp_ra" 55 1.1 mrg [(match_parallel 0 "pop_operation" 56 1.1 mrg [(return) 57 1.1 mrg (set (reg:SI SP_REGNO) 58 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 59 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 60 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" ""))])] 61 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 62 1.1 mrg { 63 1.1 mrg rtx x = XEXP (operands[3], 0); 64 1.1 mrg operands[3] = REG_P (x) ? const0_rtx : XEXP (x, 1); 65 1.1 mrg return "pop.n\\t{fp, ra}, %3"; 66 1.1 mrg } 67 1.1 mrg [(set_attr "type" "pop")]) 68 1.1 mrg 69 1.1 mrg (define_insn "*cdx_pop_ra" 70 1.1 mrg [(match_parallel 0 "pop_operation" 71 1.1 mrg [(return) 72 1.1 mrg (set (reg:SI SP_REGNO) 73 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 74 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" ""))])] 75 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 76 1.1 mrg { 77 1.1 mrg rtx x = XEXP (operands[2], 0); 78 1.1 mrg operands[2] = REG_P (x) ? const0_rtx : XEXP (x, 1); 79 1.1 mrg return "pop.n\\t{ra}, %2"; 80 1.1 mrg } 81 1.1 mrg [(set_attr "type" "pop")]) 82 1.1 mrg 83 1.1 mrg (define_insn "*cdx_push_ra_fp_r16" 84 1.1 mrg [(match_parallel 0 "" 85 1.1 mrg [(set (reg:SI SP_REGNO) 86 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 87 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 88 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 89 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 16))])] 90 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4 91 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 92 1.1 mrg && (-INTVAL (operands[1]) - 12) <= 60" 93 1.1 mrg { 94 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 12); 95 1.1 mrg return "push.n\\t{ra, fp, r16}, %2"; 96 1.1 mrg } 97 1.1 mrg [(set_attr "type" "push")]) 98 1.1 mrg 99 1.1 mrg (define_insn "*cdx_push_ra_r16" 100 1.1 mrg [(match_parallel 0 "" 101 1.1 mrg [(set (reg:SI SP_REGNO) 102 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 103 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 104 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 16))])] 105 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3 106 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 107 1.1 mrg && (-INTVAL (operands[1]) - 8) <= 60" 108 1.1 mrg { 109 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 8); 110 1.1 mrg return "push.n\\t{ra, r16}, %2"; 111 1.1 mrg } 112 1.1 mrg [(set_attr "type" "push")]) 113 1.1 mrg 114 1.1 mrg (define_insn "*cdx_pop_r16_fp_ra" 115 1.1 mrg [(match_parallel 0 "pop_operation" 116 1.1 mrg [(return) 117 1.1 mrg (set (reg:SI SP_REGNO) 118 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 119 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 120 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 121 1.1 mrg (set (reg:SI 16) (match_operand:SI 4 "stack_memory_operand" ""))])] 122 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 123 1.1 mrg { 124 1.1 mrg rtx x = XEXP (operands[4], 0); 125 1.1 mrg operands[4] = REG_P (x) ? const0_rtx : XEXP (x, 1); 126 1.1 mrg return "pop.n\\t{r16, fp, ra}, %4"; 127 1.1 mrg } 128 1.1 mrg [(set_attr "type" "pop")]) 129 1.1 mrg 130 1.1 mrg (define_insn "*cdx_pop_r16_ra" 131 1.1 mrg [(match_parallel 0 "pop_operation" 132 1.1 mrg [(return) 133 1.1 mrg (set (reg:SI SP_REGNO) 134 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 135 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 136 1.1 mrg (set (reg:SI 16) (match_operand:SI 3 "stack_memory_operand" ""))])] 137 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 138 1.1 mrg { 139 1.1 mrg rtx x = XEXP (operands[3], 0); 140 1.1 mrg operands[3] = REG_P (x) ? const0_rtx : XEXP (x, 1); 141 1.1 mrg return "pop.n\\t{r16, ra}, %3"; 142 1.1 mrg } 143 1.1 mrg [(set_attr "type" "pop")]) 144 1.1 mrg 145 1.1 mrg (define_insn "*cdx_push_ra_fp_r17_r16" 146 1.1 mrg [(match_parallel 0 "" 147 1.1 mrg [(set (reg:SI SP_REGNO) 148 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 149 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 150 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 151 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 17)) 152 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 16))])] 153 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5 154 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 155 1.1 mrg && (-INTVAL (operands[1]) - 16) <= 60" 156 1.1 mrg { 157 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 16); 158 1.1 mrg return "push.n\\t{ra, fp, r17, r16}, %2"; 159 1.1 mrg } 160 1.1 mrg [(set_attr "type" "push")]) 161 1.1 mrg 162 1.1 mrg (define_insn "*cdx_push_ra_r17_r16" 163 1.1 mrg [(match_parallel 0 "" 164 1.1 mrg [(set (reg:SI SP_REGNO) 165 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 166 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 167 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 17)) 168 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 16))])] 169 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4 170 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 171 1.1 mrg && (-INTVAL (operands[1]) - 12) <= 60" 172 1.1 mrg { 173 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 12); 174 1.1 mrg return "push.n\\t{ra, r17, r16}, %2"; 175 1.1 mrg } 176 1.1 mrg [(set_attr "type" "push")]) 177 1.1 mrg 178 1.1 mrg (define_insn "*cdx_pop_r16_r17_fp_ra" 179 1.1 mrg [(match_parallel 0 "pop_operation" 180 1.1 mrg [(return) 181 1.1 mrg (set (reg:SI SP_REGNO) 182 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 183 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 184 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 185 1.1 mrg (set (reg:SI 17) (match_operand:SI 4 "stack_memory_operand" "")) 186 1.1 mrg (set (reg:SI 16) (match_operand:SI 5 "stack_memory_operand" ""))])] 187 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 188 1.1 mrg { 189 1.1 mrg rtx x = XEXP (operands[5], 0); 190 1.1 mrg operands[5] = REG_P (x) ? const0_rtx : XEXP (x, 1); 191 1.1 mrg return "pop.n\\t{r16, r17, fp, ra}, %5"; 192 1.1 mrg } 193 1.1 mrg [(set_attr "type" "pop")]) 194 1.1 mrg 195 1.1 mrg (define_insn "*cdx_pop_r16_r17_ra" 196 1.1 mrg [(match_parallel 0 "pop_operation" 197 1.1 mrg [(return) 198 1.1 mrg (set (reg:SI SP_REGNO) 199 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 200 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 201 1.1 mrg (set (reg:SI 17) (match_operand:SI 3 "stack_memory_operand" "")) 202 1.1 mrg (set (reg:SI 16) (match_operand:SI 4 "stack_memory_operand" ""))])] 203 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 204 1.1 mrg { 205 1.1 mrg rtx x = XEXP (operands[4], 0); 206 1.1 mrg operands[4] = REG_P (x) ? const0_rtx : XEXP (x, 1); 207 1.1 mrg return "pop.n\\t{r16, r17, ra}, %4"; 208 1.1 mrg } 209 1.1 mrg [(set_attr "type" "pop")]) 210 1.1 mrg 211 1.1 mrg (define_insn "*cdx_push_ra_fp_r18_r17_r16" 212 1.1 mrg [(match_parallel 0 "" 213 1.1 mrg [(set (reg:SI SP_REGNO) 214 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 215 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 216 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 217 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 18)) 218 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 17)) 219 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 16))])] 220 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6 221 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 222 1.1 mrg && (-INTVAL (operands[1]) - 20) <= 60" 223 1.1 mrg { 224 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 20); 225 1.1 mrg return "push.n\\t{ra, fp, r18, r17, r16}, %2"; 226 1.1 mrg } 227 1.1 mrg [(set_attr "type" "push")]) 228 1.1 mrg 229 1.1 mrg (define_insn "*cdx_push_ra_r18_r17_r16" 230 1.1 mrg [(match_parallel 0 "" 231 1.1 mrg [(set (reg:SI SP_REGNO) 232 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 233 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 234 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 18)) 235 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 17)) 236 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 16))])] 237 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5 238 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 239 1.1 mrg && (-INTVAL (operands[1]) - 16) <= 60" 240 1.1 mrg { 241 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 16); 242 1.1 mrg return "push.n\\t{ra, r18, r17, r16}, %2"; 243 1.1 mrg } 244 1.1 mrg [(set_attr "type" "push")]) 245 1.1 mrg 246 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_fp_ra" 247 1.1 mrg [(match_parallel 0 "pop_operation" 248 1.1 mrg [(return) 249 1.1 mrg (set (reg:SI SP_REGNO) 250 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 251 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 252 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 253 1.1 mrg (set (reg:SI 18) (match_operand:SI 4 "stack_memory_operand" "")) 254 1.1 mrg (set (reg:SI 17) (match_operand:SI 5 "stack_memory_operand" "")) 255 1.1 mrg (set (reg:SI 16) (match_operand:SI 6 "stack_memory_operand" ""))])] 256 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 257 1.1 mrg { 258 1.1 mrg rtx x = XEXP (operands[6], 0); 259 1.1 mrg operands[6] = REG_P (x) ? const0_rtx : XEXP (x, 1); 260 1.1 mrg return "pop.n\\t{r16, r17, r18, fp, ra}, %6"; 261 1.1 mrg } 262 1.1 mrg [(set_attr "type" "pop")]) 263 1.1 mrg 264 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_ra" 265 1.1 mrg [(match_parallel 0 "pop_operation" 266 1.1 mrg [(return) 267 1.1 mrg (set (reg:SI SP_REGNO) 268 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 269 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 270 1.1 mrg (set (reg:SI 18) (match_operand:SI 3 "stack_memory_operand" "")) 271 1.1 mrg (set (reg:SI 17) (match_operand:SI 4 "stack_memory_operand" "")) 272 1.1 mrg (set (reg:SI 16) (match_operand:SI 5 "stack_memory_operand" ""))])] 273 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 274 1.1 mrg { 275 1.1 mrg rtx x = XEXP (operands[5], 0); 276 1.1 mrg operands[5] = REG_P (x) ? const0_rtx : XEXP (x, 1); 277 1.1 mrg return "pop.n\\t{r16, r17, r18, ra}, %5"; 278 1.1 mrg } 279 1.1 mrg [(set_attr "type" "pop")]) 280 1.1 mrg 281 1.1 mrg (define_insn "*cdx_push_ra_fp_r19_r18_r17_r16" 282 1.1 mrg [(match_parallel 0 "" 283 1.1 mrg [(set (reg:SI SP_REGNO) 284 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 285 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 286 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 287 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 19)) 288 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 18)) 289 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 17)) 290 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 16))])] 291 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7 292 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 293 1.1 mrg && (-INTVAL (operands[1]) - 24) <= 60" 294 1.1 mrg { 295 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 24); 296 1.1 mrg return "push.n\\t{ra, fp, r19, r18, r17, r16}, %2"; 297 1.1 mrg } 298 1.1 mrg [(set_attr "type" "push")]) 299 1.1 mrg 300 1.1 mrg (define_insn "*cdx_push_ra_r19_r18_r17_r16" 301 1.1 mrg [(match_parallel 0 "" 302 1.1 mrg [(set (reg:SI SP_REGNO) 303 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 304 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 305 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 19)) 306 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 18)) 307 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 17)) 308 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 16))])] 309 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6 310 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 311 1.1 mrg && (-INTVAL (operands[1]) - 20) <= 60" 312 1.1 mrg { 313 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 20); 314 1.1 mrg return "push.n\\t{ra, r19, r18, r17, r16}, %2"; 315 1.1 mrg } 316 1.1 mrg [(set_attr "type" "push")]) 317 1.1 mrg 318 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_fp_ra" 319 1.1 mrg [(match_parallel 0 "pop_operation" 320 1.1 mrg [(return) 321 1.1 mrg (set (reg:SI SP_REGNO) 322 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 323 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 324 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 325 1.1 mrg (set (reg:SI 19) (match_operand:SI 4 "stack_memory_operand" "")) 326 1.1 mrg (set (reg:SI 18) (match_operand:SI 5 "stack_memory_operand" "")) 327 1.1 mrg (set (reg:SI 17) (match_operand:SI 6 "stack_memory_operand" "")) 328 1.1 mrg (set (reg:SI 16) (match_operand:SI 7 "stack_memory_operand" ""))])] 329 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 330 1.1 mrg { 331 1.1 mrg rtx x = XEXP (operands[7], 0); 332 1.1 mrg operands[7] = REG_P (x) ? const0_rtx : XEXP (x, 1); 333 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, fp, ra}, %7"; 334 1.1 mrg } 335 1.1 mrg [(set_attr "type" "pop")]) 336 1.1 mrg 337 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_ra" 338 1.1 mrg [(match_parallel 0 "pop_operation" 339 1.1 mrg [(return) 340 1.1 mrg (set (reg:SI SP_REGNO) 341 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 342 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 343 1.1 mrg (set (reg:SI 19) (match_operand:SI 3 "stack_memory_operand" "")) 344 1.1 mrg (set (reg:SI 18) (match_operand:SI 4 "stack_memory_operand" "")) 345 1.1 mrg (set (reg:SI 17) (match_operand:SI 5 "stack_memory_operand" "")) 346 1.1 mrg (set (reg:SI 16) (match_operand:SI 6 "stack_memory_operand" ""))])] 347 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 348 1.1 mrg { 349 1.1 mrg rtx x = XEXP (operands[6], 0); 350 1.1 mrg operands[6] = REG_P (x) ? const0_rtx : XEXP (x, 1); 351 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, ra}, %6"; 352 1.1 mrg } 353 1.1 mrg [(set_attr "type" "pop")]) 354 1.1 mrg 355 1.1 mrg (define_insn "*cdx_push_ra_fp_r20_r19_r18_r17_r16" 356 1.1 mrg [(match_parallel 0 "" 357 1.1 mrg [(set (reg:SI SP_REGNO) 358 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 359 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 360 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 361 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 20)) 362 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 19)) 363 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 18)) 364 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 17)) 365 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 16))])] 366 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8 367 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 368 1.1 mrg && (-INTVAL (operands[1]) - 28) <= 60" 369 1.1 mrg { 370 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 28); 371 1.1 mrg return "push.n\\t{ra, fp, r20, r19, r18, r17, r16}, %2"; 372 1.1 mrg } 373 1.1 mrg [(set_attr "type" "push")]) 374 1.1 mrg 375 1.1 mrg (define_insn "*cdx_push_ra_r20_r19_r18_r17_r16" 376 1.1 mrg [(match_parallel 0 "" 377 1.1 mrg [(set (reg:SI SP_REGNO) 378 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 379 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 380 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 20)) 381 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 19)) 382 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 18)) 383 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 17)) 384 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 16))])] 385 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7 386 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 387 1.1 mrg && (-INTVAL (operands[1]) - 24) <= 60" 388 1.1 mrg { 389 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 24); 390 1.1 mrg return "push.n\\t{ra, r20, r19, r18, r17, r16}, %2"; 391 1.1 mrg } 392 1.1 mrg [(set_attr "type" "push")]) 393 1.1 mrg 394 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_fp_ra" 395 1.1 mrg [(match_parallel 0 "pop_operation" 396 1.1 mrg [(return) 397 1.1 mrg (set (reg:SI SP_REGNO) 398 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 399 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 400 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 401 1.1 mrg (set (reg:SI 20) (match_operand:SI 4 "stack_memory_operand" "")) 402 1.1 mrg (set (reg:SI 19) (match_operand:SI 5 "stack_memory_operand" "")) 403 1.1 mrg (set (reg:SI 18) (match_operand:SI 6 "stack_memory_operand" "")) 404 1.1 mrg (set (reg:SI 17) (match_operand:SI 7 "stack_memory_operand" "")) 405 1.1 mrg (set (reg:SI 16) (match_operand:SI 8 "stack_memory_operand" ""))])] 406 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 407 1.1 mrg { 408 1.1 mrg rtx x = XEXP (operands[8], 0); 409 1.1 mrg operands[8] = REG_P (x) ? const0_rtx : XEXP (x, 1); 410 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, fp, ra}, %8"; 411 1.1 mrg } 412 1.1 mrg [(set_attr "type" "pop")]) 413 1.1 mrg 414 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_ra" 415 1.1 mrg [(match_parallel 0 "pop_operation" 416 1.1 mrg [(return) 417 1.1 mrg (set (reg:SI SP_REGNO) 418 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 419 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 420 1.1 mrg (set (reg:SI 20) (match_operand:SI 3 "stack_memory_operand" "")) 421 1.1 mrg (set (reg:SI 19) (match_operand:SI 4 "stack_memory_operand" "")) 422 1.1 mrg (set (reg:SI 18) (match_operand:SI 5 "stack_memory_operand" "")) 423 1.1 mrg (set (reg:SI 17) (match_operand:SI 6 "stack_memory_operand" "")) 424 1.1 mrg (set (reg:SI 16) (match_operand:SI 7 "stack_memory_operand" ""))])] 425 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 426 1.1 mrg { 427 1.1 mrg rtx x = XEXP (operands[7], 0); 428 1.1 mrg operands[7] = REG_P (x) ? const0_rtx : XEXP (x, 1); 429 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, ra}, %7"; 430 1.1 mrg } 431 1.1 mrg [(set_attr "type" "pop")]) 432 1.1 mrg 433 1.1 mrg (define_insn "*cdx_push_ra_fp_r21_r20_r19_r18_r17_r16" 434 1.1 mrg [(match_parallel 0 "" 435 1.1 mrg [(set (reg:SI SP_REGNO) 436 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 437 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 438 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 439 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 21)) 440 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 20)) 441 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 19)) 442 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 18)) 443 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 17)) 444 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 16))])] 445 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9 446 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 447 1.1 mrg && (-INTVAL (operands[1]) - 32) <= 60" 448 1.1 mrg { 449 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 32); 450 1.1 mrg return "push.n\\t{ra, fp, r21, r20, r19, r18, r17, r16}, %2"; 451 1.1 mrg } 452 1.1 mrg [(set_attr "type" "push")]) 453 1.1 mrg 454 1.1 mrg (define_insn "*cdx_push_ra_r21_r20_r19_r18_r17_r16" 455 1.1 mrg [(match_parallel 0 "" 456 1.1 mrg [(set (reg:SI SP_REGNO) 457 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 458 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 459 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 21)) 460 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 20)) 461 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 19)) 462 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 18)) 463 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 17)) 464 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 16))])] 465 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8 466 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 467 1.1 mrg && (-INTVAL (operands[1]) - 28) <= 60" 468 1.1 mrg { 469 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 28); 470 1.1 mrg return "push.n\\t{ra, r21, r20, r19, r18, r17, r16}, %2"; 471 1.1 mrg } 472 1.1 mrg [(set_attr "type" "push")]) 473 1.1 mrg 474 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_fp_ra" 475 1.1 mrg [(match_parallel 0 "pop_operation" 476 1.1 mrg [(return) 477 1.1 mrg (set (reg:SI SP_REGNO) 478 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 479 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 480 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 481 1.1 mrg (set (reg:SI 21) (match_operand:SI 4 "stack_memory_operand" "")) 482 1.1 mrg (set (reg:SI 20) (match_operand:SI 5 "stack_memory_operand" "")) 483 1.1 mrg (set (reg:SI 19) (match_operand:SI 6 "stack_memory_operand" "")) 484 1.1 mrg (set (reg:SI 18) (match_operand:SI 7 "stack_memory_operand" "")) 485 1.1 mrg (set (reg:SI 17) (match_operand:SI 8 "stack_memory_operand" "")) 486 1.1 mrg (set (reg:SI 16) (match_operand:SI 9 "stack_memory_operand" ""))])] 487 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 488 1.1 mrg { 489 1.1 mrg rtx x = XEXP (operands[9], 0); 490 1.1 mrg operands[9] = REG_P (x) ? const0_rtx : XEXP (x, 1); 491 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, r21, fp, ra}, %9"; 492 1.1 mrg } 493 1.1 mrg [(set_attr "type" "pop")]) 494 1.1 mrg 495 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_ra" 496 1.1 mrg [(match_parallel 0 "pop_operation" 497 1.1 mrg [(return) 498 1.1 mrg (set (reg:SI SP_REGNO) 499 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 500 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 501 1.1 mrg (set (reg:SI 21) (match_operand:SI 3 "stack_memory_operand" "")) 502 1.1 mrg (set (reg:SI 20) (match_operand:SI 4 "stack_memory_operand" "")) 503 1.1 mrg (set (reg:SI 19) (match_operand:SI 5 "stack_memory_operand" "")) 504 1.1 mrg (set (reg:SI 18) (match_operand:SI 6 "stack_memory_operand" "")) 505 1.1 mrg (set (reg:SI 17) (match_operand:SI 7 "stack_memory_operand" "")) 506 1.1 mrg (set (reg:SI 16) (match_operand:SI 8 "stack_memory_operand" ""))])] 507 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 508 1.1 mrg { 509 1.1 mrg rtx x = XEXP (operands[8], 0); 510 1.1 mrg operands[8] = REG_P (x) ? const0_rtx : XEXP (x, 1); 511 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, r21, ra}, %8"; 512 1.1 mrg } 513 1.1 mrg [(set_attr "type" "pop")]) 514 1.1 mrg 515 1.1 mrg (define_insn "*cdx_push_ra_fp_r22_r21_r20_r19_r18_r17_r16" 516 1.1 mrg [(match_parallel 0 "" 517 1.1 mrg [(set (reg:SI SP_REGNO) 518 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 519 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 520 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 521 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 22)) 522 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 21)) 523 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 20)) 524 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 19)) 525 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 18)) 526 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 17)) 527 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -36))) (reg:SI 16))])] 528 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10 529 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 530 1.1 mrg && (-INTVAL (operands[1]) - 36) <= 60" 531 1.1 mrg { 532 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 36); 533 1.1 mrg return "push.n\\t{ra, fp, r22, r21, r20, r19, r18, r17, r16}, %2"; 534 1.1 mrg } 535 1.1 mrg [(set_attr "type" "push")]) 536 1.1 mrg 537 1.1 mrg (define_insn "*cdx_push_ra_r22_r21_r20_r19_r18_r17_r16" 538 1.1 mrg [(match_parallel 0 "" 539 1.1 mrg [(set (reg:SI SP_REGNO) 540 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 541 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 542 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 22)) 543 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 21)) 544 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 20)) 545 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 19)) 546 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 18)) 547 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 17)) 548 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 16))])] 549 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9 550 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 551 1.1 mrg && (-INTVAL (operands[1]) - 32) <= 60" 552 1.1 mrg { 553 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 32); 554 1.1 mrg return "push.n\\t{ra, r22, r21, r20, r19, r18, r17, r16}, %2"; 555 1.1 mrg } 556 1.1 mrg [(set_attr "type" "push")]) 557 1.1 mrg 558 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_fp_ra" 559 1.1 mrg [(match_parallel 0 "pop_operation" 560 1.1 mrg [(return) 561 1.1 mrg (set (reg:SI SP_REGNO) 562 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 563 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 564 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 565 1.1 mrg (set (reg:SI 22) (match_operand:SI 4 "stack_memory_operand" "")) 566 1.1 mrg (set (reg:SI 21) (match_operand:SI 5 "stack_memory_operand" "")) 567 1.1 mrg (set (reg:SI 20) (match_operand:SI 6 "stack_memory_operand" "")) 568 1.1 mrg (set (reg:SI 19) (match_operand:SI 7 "stack_memory_operand" "")) 569 1.1 mrg (set (reg:SI 18) (match_operand:SI 8 "stack_memory_operand" "")) 570 1.1 mrg (set (reg:SI 17) (match_operand:SI 9 "stack_memory_operand" "")) 571 1.1 mrg (set (reg:SI 16) (match_operand:SI 10 "stack_memory_operand" ""))])] 572 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 573 1.1 mrg { 574 1.1 mrg rtx x = XEXP (operands[10], 0); 575 1.1 mrg operands[10] = REG_P (x) ? const0_rtx : XEXP (x, 1); 576 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, fp, ra}, %10"; 577 1.1 mrg } 578 1.1 mrg [(set_attr "type" "pop")]) 579 1.1 mrg 580 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_ra" 581 1.1 mrg [(match_parallel 0 "pop_operation" 582 1.1 mrg [(return) 583 1.1 mrg (set (reg:SI SP_REGNO) 584 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 585 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 586 1.1 mrg (set (reg:SI 22) (match_operand:SI 3 "stack_memory_operand" "")) 587 1.1 mrg (set (reg:SI 21) (match_operand:SI 4 "stack_memory_operand" "")) 588 1.1 mrg (set (reg:SI 20) (match_operand:SI 5 "stack_memory_operand" "")) 589 1.1 mrg (set (reg:SI 19) (match_operand:SI 6 "stack_memory_operand" "")) 590 1.1 mrg (set (reg:SI 18) (match_operand:SI 7 "stack_memory_operand" "")) 591 1.1 mrg (set (reg:SI 17) (match_operand:SI 8 "stack_memory_operand" "")) 592 1.1 mrg (set (reg:SI 16) (match_operand:SI 9 "stack_memory_operand" ""))])] 593 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 594 1.1 mrg { 595 1.1 mrg rtx x = XEXP (operands[9], 0); 596 1.1 mrg operands[9] = REG_P (x) ? const0_rtx : XEXP (x, 1); 597 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, ra}, %9"; 598 1.1 mrg } 599 1.1 mrg [(set_attr "type" "pop")]) 600 1.1 mrg 601 1.1 mrg (define_insn "*cdx_push_ra_fp_r23_r22_r21_r20_r19_r18_r17_r16" 602 1.1 mrg [(match_parallel 0 "" 603 1.1 mrg [(set (reg:SI SP_REGNO) 604 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 605 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 606 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI FP_REGNO)) 607 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 23)) 608 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 22)) 609 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 21)) 610 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 20)) 611 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 19)) 612 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 18)) 613 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -36))) (reg:SI 17)) 614 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -40))) (reg:SI 16))])] 615 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11 616 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 617 1.1 mrg && (-INTVAL (operands[1]) - 40) <= 60" 618 1.1 mrg { 619 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 40); 620 1.1 mrg return "push.n\\t{ra, fp, r23, r22, r21, r20, r19, r18, r17, r16}, %2"; 621 1.1 mrg } 622 1.1 mrg [(set_attr "type" "push")]) 623 1.1 mrg 624 1.1 mrg (define_insn "*cdx_push_ra_r23_r22_r21_r20_r19_r18_r17_r16" 625 1.1 mrg [(match_parallel 0 "" 626 1.1 mrg [(set (reg:SI SP_REGNO) 627 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 628 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -4))) (reg:SI RA_REGNO)) 629 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -8))) (reg:SI 23)) 630 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -12))) (reg:SI 22)) 631 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -16))) (reg:SI 21)) 632 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -20))) (reg:SI 20)) 633 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -24))) (reg:SI 19)) 634 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -28))) (reg:SI 18)) 635 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -32))) (reg:SI 17)) 636 1.1 mrg (set (mem:SI (plus:SI (reg:SI SP_REGNO) (const_int -36))) (reg:SI 16))])] 637 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10 638 1.1 mrg && (-INTVAL (operands[1]) & 3) == 0 639 1.1 mrg && (-INTVAL (operands[1]) - 36) <= 60" 640 1.1 mrg { 641 1.1 mrg operands[2] = GEN_INT (-INTVAL (operands[1]) - 36); 642 1.1 mrg return "push.n\\t{ra, r23, r22, r21, r20, r19, r18, r17, r16}, %2"; 643 1.1 mrg } 644 1.1 mrg [(set_attr "type" "push")]) 645 1.1 mrg 646 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_r23_fp_ra" 647 1.1 mrg [(match_parallel 0 "pop_operation" 648 1.1 mrg [(return) 649 1.1 mrg (set (reg:SI SP_REGNO) 650 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 651 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 652 1.1 mrg (set (reg:SI FP_REGNO) (match_operand:SI 3 "stack_memory_operand" "")) 653 1.1 mrg (set (reg:SI 23) (match_operand:SI 4 "stack_memory_operand" "")) 654 1.1 mrg (set (reg:SI 22) (match_operand:SI 5 "stack_memory_operand" "")) 655 1.1 mrg (set (reg:SI 21) (match_operand:SI 6 "stack_memory_operand" "")) 656 1.1 mrg (set (reg:SI 20) (match_operand:SI 7 "stack_memory_operand" "")) 657 1.1 mrg (set (reg:SI 19) (match_operand:SI 8 "stack_memory_operand" "")) 658 1.1 mrg (set (reg:SI 18) (match_operand:SI 9 "stack_memory_operand" "")) 659 1.1 mrg (set (reg:SI 17) (match_operand:SI 10 "stack_memory_operand" "")) 660 1.1 mrg (set (reg:SI 16) (match_operand:SI 11 "stack_memory_operand" ""))])] 661 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 662 1.1 mrg { 663 1.1 mrg rtx x = XEXP (operands[11], 0); 664 1.1 mrg operands[11] = REG_P (x) ? const0_rtx : XEXP (x, 1); 665 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, r23, fp, ra}, %11"; 666 1.1 mrg } 667 1.1 mrg [(set_attr "type" "pop")]) 668 1.1 mrg 669 1.1 mrg (define_insn "*cdx_pop_r16_r17_r18_r19_r20_r21_r22_r23_ra" 670 1.1 mrg [(match_parallel 0 "pop_operation" 671 1.1 mrg [(return) 672 1.1 mrg (set (reg:SI SP_REGNO) 673 1.1 mrg (plus:SI (reg:SI SP_REGNO) (match_operand 1 "const_int_operand" ""))) 674 1.1 mrg (set (reg:SI RA_REGNO) (match_operand:SI 2 "stack_memory_operand" "")) 675 1.1 mrg (set (reg:SI 23) (match_operand:SI 3 "stack_memory_operand" "")) 676 1.1 mrg (set (reg:SI 22) (match_operand:SI 4 "stack_memory_operand" "")) 677 1.1 mrg (set (reg:SI 21) (match_operand:SI 5 "stack_memory_operand" "")) 678 1.1 mrg (set (reg:SI 20) (match_operand:SI 6 "stack_memory_operand" "")) 679 1.1 mrg (set (reg:SI 19) (match_operand:SI 7 "stack_memory_operand" "")) 680 1.1 mrg (set (reg:SI 18) (match_operand:SI 8 "stack_memory_operand" "")) 681 1.1 mrg (set (reg:SI 17) (match_operand:SI 9 "stack_memory_operand" "")) 682 1.1 mrg (set (reg:SI 16) (match_operand:SI 10 "stack_memory_operand" ""))])] 683 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 684 1.1 mrg { 685 1.1 mrg rtx x = XEXP (operands[10], 0); 686 1.1 mrg operands[10] = REG_P (x) ? const0_rtx : XEXP (x, 1); 687 1.1 mrg return "pop.n\\t{r16, r17, r18, r19, r20, r21, r22, r23, ra}, %10"; 688 1.1 mrg } 689 1.1 mrg [(set_attr "type" "pop")]) 690 1.1 mrg 691 1.1 mrg (define_insn "*cdx_ldwm1_inc_wb_ret" 692 1.1 mrg [(match_parallel 0 "ldwm_operation" 693 1.1 mrg [(return) 694 1.1 mrg (set (match_operand:SI 2 "register_operand" "+&r") 695 1.1 mrg (plus:SI (match_dup 2) (const_int 4))) 696 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 697 1.1 mrg (mem:SI (match_dup 2)))])] 698 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 699 1.1 mrg "ldwm\\t{%1}, (%2)++, writeback, ret" 700 1.1 mrg [(set_attr "type" "ldwm")]) 701 1.1 mrg 702 1.1 mrg (define_insn "*cdx_ldwm1_inc_wb" 703 1.1 mrg [(match_parallel 0 "ldwm_operation" 704 1.1 mrg [(set (match_operand:SI 2 "register_operand" "+&r") 705 1.1 mrg (plus:SI (match_dup 2) (const_int 4))) 706 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 707 1.1 mrg (mem:SI (match_dup 2)))])] 708 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 709 1.1 mrg "ldwm\\t{%1}, (%2)++, writeback" 710 1.1 mrg [(set_attr "type" "ldwm")]) 711 1.1 mrg 712 1.1 mrg (define_insn "*cdx_ldwm1_inc_ret" 713 1.1 mrg [(match_parallel 0 "ldwm_operation" 714 1.1 mrg [(return) 715 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 716 1.1 mrg (mem:SI (match_operand:SI 2 "register_operand" "r")))])] 717 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 718 1.1 mrg "ldwm\\t{%1}, (%2)++, ret" 719 1.1 mrg [(set_attr "type" "ldwm")]) 720 1.1 mrg 721 1.1 mrg (define_insn "*cdx_ldwm1_inc" 722 1.1 mrg [(match_parallel 0 "ldwm_operation" 723 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 724 1.1 mrg (mem:SI (match_operand:SI 2 "register_operand" "r")))])] 725 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" 726 1.1 mrg "ldwm\\t{%1}, (%2)++" 727 1.1 mrg [(set_attr "type" "ldwm")]) 728 1.1 mrg 729 1.1 mrg (define_insn "*cdx_ldwm1_dec_wb_ret" 730 1.1 mrg [(match_parallel 0 "ldwm_operation" 731 1.1 mrg [(return) 732 1.1 mrg (set (match_operand:SI 2 "register_operand" "+&r") 733 1.1 mrg (plus:SI (match_dup 2) (const_int -4))) 734 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 735 1.1 mrg (mem:SI (plus:SI (match_dup 2) (const_int -4))))])] 736 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 737 1.1 mrg "ldwm\\t{%1}, --(%2), writeback, ret" 738 1.1 mrg [(set_attr "type" "ldwm")]) 739 1.1 mrg 740 1.1 mrg (define_insn "*cdx_ldwm1_dec_wb" 741 1.1 mrg [(match_parallel 0 "ldwm_operation" 742 1.1 mrg [(set (match_operand:SI 2 "register_operand" "+&r") 743 1.1 mrg (plus:SI (match_dup 2) (const_int -4))) 744 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 745 1.1 mrg (mem:SI (plus:SI (match_dup 2) (const_int -4))))])] 746 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 747 1.1 mrg "ldwm\\t{%1}, --(%2), writeback" 748 1.1 mrg [(set_attr "type" "ldwm")]) 749 1.1 mrg 750 1.1 mrg (define_insn "*cdx_ldwm1_dec_ret" 751 1.1 mrg [(match_parallel 0 "ldwm_operation" 752 1.1 mrg [(return) 753 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 754 1.1 mrg (mem:SI (plus:SI (match_operand:SI 2 "register_operand" "r") (const_int -4))))])] 755 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 756 1.1 mrg "ldwm\\t{%1}, --(%2), ret" 757 1.1 mrg [(set_attr "type" "ldwm")]) 758 1.1 mrg 759 1.1 mrg (define_insn "*cdx_ldwm1_dec" 760 1.1 mrg [(match_parallel 0 "ldwm_operation" 761 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 762 1.1 mrg (mem:SI (plus:SI (match_operand:SI 2 "register_operand" "r") (const_int -4))))])] 763 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" 764 1.1 mrg "ldwm\\t{%1}, --(%2)" 765 1.1 mrg [(set_attr "type" "ldwm")]) 766 1.1 mrg 767 1.1 mrg (define_insn "*cdx_ldwm2_inc_wb_ret" 768 1.1 mrg [(match_parallel 0 "ldwm_operation" 769 1.1 mrg [(return) 770 1.1 mrg (set (match_operand:SI 3 "register_operand" "+&r") 771 1.1 mrg (plus:SI (match_dup 3) (const_int 8))) 772 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 773 1.1 mrg (mem:SI (match_dup 3))) 774 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 775 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] 776 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 777 1.1 mrg "ldwm\\t{%1, %2}, (%3)++, writeback, ret" 778 1.1 mrg [(set_attr "type" "ldwm")]) 779 1.1 mrg 780 1.1 mrg (define_insn "*cdx_ldwm2_inc_wb" 781 1.1 mrg [(match_parallel 0 "ldwm_operation" 782 1.1 mrg [(set (match_operand:SI 3 "register_operand" "+&r") 783 1.1 mrg (plus:SI (match_dup 3) (const_int 8))) 784 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 785 1.1 mrg (mem:SI (match_dup 3))) 786 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 787 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] 788 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 789 1.1 mrg "ldwm\\t{%1, %2}, (%3)++, writeback" 790 1.1 mrg [(set_attr "type" "ldwm")]) 791 1.1 mrg 792 1.1 mrg (define_insn "*cdx_ldwm2_inc_ret" 793 1.1 mrg [(match_parallel 0 "ldwm_operation" 794 1.1 mrg [(return) 795 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 796 1.1 mrg (mem:SI (match_operand:SI 3 "register_operand" "r"))) 797 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 798 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] 799 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 800 1.1 mrg "ldwm\\t{%1, %2}, (%3)++, ret" 801 1.1 mrg [(set_attr "type" "ldwm")]) 802 1.1 mrg 803 1.1 mrg (define_insn "*cdx_ldwm2_inc" 804 1.1 mrg [(match_parallel 0 "ldwm_operation" 805 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 806 1.1 mrg (mem:SI (match_operand:SI 3 "register_operand" "r"))) 807 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 808 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int 4))))])] 809 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 810 1.1 mrg "ldwm\\t{%1, %2}, (%3)++" 811 1.1 mrg [(set_attr "type" "ldwm")]) 812 1.1 mrg 813 1.1 mrg (define_insn "*cdx_ldwm2_dec_wb_ret" 814 1.1 mrg [(match_parallel 0 "ldwm_operation" 815 1.1 mrg [(return) 816 1.1 mrg (set (match_operand:SI 3 "register_operand" "+&r") 817 1.1 mrg (plus:SI (match_dup 3) (const_int -8))) 818 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 819 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int -4)))) 820 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 821 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] 822 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 823 1.1 mrg "ldwm\\t{%1, %2}, --(%3), writeback, ret" 824 1.1 mrg [(set_attr "type" "ldwm")]) 825 1.1 mrg 826 1.1 mrg (define_insn "*cdx_ldwm2_dec_wb" 827 1.1 mrg [(match_parallel 0 "ldwm_operation" 828 1.1 mrg [(set (match_operand:SI 3 "register_operand" "+&r") 829 1.1 mrg (plus:SI (match_dup 3) (const_int -8))) 830 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 831 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int -4)))) 832 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 833 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] 834 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 835 1.1 mrg "ldwm\\t{%1, %2}, --(%3), writeback" 836 1.1 mrg [(set_attr "type" "ldwm")]) 837 1.1 mrg 838 1.1 mrg (define_insn "*cdx_ldwm2_dec_ret" 839 1.1 mrg [(match_parallel 0 "ldwm_operation" 840 1.1 mrg [(return) 841 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 842 1.1 mrg (mem:SI (plus:SI (match_operand:SI 3 "register_operand" "r") (const_int -4)))) 843 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 844 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] 845 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 846 1.1 mrg "ldwm\\t{%1, %2}, --(%3), ret" 847 1.1 mrg [(set_attr "type" "ldwm")]) 848 1.1 mrg 849 1.1 mrg (define_insn "*cdx_ldwm2_dec" 850 1.1 mrg [(match_parallel 0 "ldwm_operation" 851 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 852 1.1 mrg (mem:SI (plus:SI (match_operand:SI 3 "register_operand" "r") (const_int -4)))) 853 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 854 1.1 mrg (mem:SI (plus:SI (match_dup 3) (const_int -8))))])] 855 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 856 1.1 mrg "ldwm\\t{%1, %2}, --(%3)" 857 1.1 mrg [(set_attr "type" "ldwm")]) 858 1.1 mrg 859 1.1 mrg (define_insn "*cdx_ldwm3_inc_wb_ret" 860 1.1 mrg [(match_parallel 0 "ldwm_operation" 861 1.1 mrg [(return) 862 1.1 mrg (set (match_operand:SI 4 "register_operand" "+&r") 863 1.1 mrg (plus:SI (match_dup 4) (const_int 12))) 864 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 865 1.1 mrg (mem:SI (match_dup 4))) 866 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 867 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 4)))) 868 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 869 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] 870 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 871 1.1 mrg "ldwm\\t{%1, %2, %3}, (%4)++, writeback, ret" 872 1.1 mrg [(set_attr "type" "ldwm")]) 873 1.1 mrg 874 1.1 mrg (define_insn "*cdx_ldwm3_inc_wb" 875 1.1 mrg [(match_parallel 0 "ldwm_operation" 876 1.1 mrg [(set (match_operand:SI 4 "register_operand" "+&r") 877 1.1 mrg (plus:SI (match_dup 4) (const_int 12))) 878 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 879 1.1 mrg (mem:SI (match_dup 4))) 880 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 881 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 4)))) 882 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 883 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] 884 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 885 1.1 mrg "ldwm\\t{%1, %2, %3}, (%4)++, writeback" 886 1.1 mrg [(set_attr "type" "ldwm")]) 887 1.1 mrg 888 1.1 mrg (define_insn "*cdx_ldwm3_inc_ret" 889 1.1 mrg [(match_parallel 0 "ldwm_operation" 890 1.1 mrg [(return) 891 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 892 1.1 mrg (mem:SI (match_operand:SI 4 "register_operand" "r"))) 893 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 894 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 4)))) 895 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 896 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] 897 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 898 1.1 mrg "ldwm\\t{%1, %2, %3}, (%4)++, ret" 899 1.1 mrg [(set_attr "type" "ldwm")]) 900 1.1 mrg 901 1.1 mrg (define_insn "*cdx_ldwm3_inc" 902 1.1 mrg [(match_parallel 0 "ldwm_operation" 903 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 904 1.1 mrg (mem:SI (match_operand:SI 4 "register_operand" "r"))) 905 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 906 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 4)))) 907 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 908 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int 8))))])] 909 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 910 1.1 mrg "ldwm\\t{%1, %2, %3}, (%4)++" 911 1.1 mrg [(set_attr "type" "ldwm")]) 912 1.1 mrg 913 1.1 mrg (define_insn "*cdx_ldwm3_dec_wb_ret" 914 1.1 mrg [(match_parallel 0 "ldwm_operation" 915 1.1 mrg [(return) 916 1.1 mrg (set (match_operand:SI 4 "register_operand" "+&r") 917 1.1 mrg (plus:SI (match_dup 4) (const_int -12))) 918 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 919 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -4)))) 920 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 921 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -8)))) 922 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 923 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] 924 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 925 1.1 mrg "ldwm\\t{%1, %2, %3}, --(%4), writeback, ret" 926 1.1 mrg [(set_attr "type" "ldwm")]) 927 1.1 mrg 928 1.1 mrg (define_insn "*cdx_ldwm3_dec_wb" 929 1.1 mrg [(match_parallel 0 "ldwm_operation" 930 1.1 mrg [(set (match_operand:SI 4 "register_operand" "+&r") 931 1.1 mrg (plus:SI (match_dup 4) (const_int -12))) 932 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 933 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -4)))) 934 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 935 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -8)))) 936 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 937 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] 938 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 939 1.1 mrg "ldwm\\t{%1, %2, %3}, --(%4), writeback" 940 1.1 mrg [(set_attr "type" "ldwm")]) 941 1.1 mrg 942 1.1 mrg (define_insn "*cdx_ldwm3_dec_ret" 943 1.1 mrg [(match_parallel 0 "ldwm_operation" 944 1.1 mrg [(return) 945 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 946 1.1 mrg (mem:SI (plus:SI (match_operand:SI 4 "register_operand" "r") (const_int -4)))) 947 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 948 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -8)))) 949 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 950 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] 951 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 952 1.1 mrg "ldwm\\t{%1, %2, %3}, --(%4), ret" 953 1.1 mrg [(set_attr "type" "ldwm")]) 954 1.1 mrg 955 1.1 mrg (define_insn "*cdx_ldwm3_dec" 956 1.1 mrg [(match_parallel 0 "ldwm_operation" 957 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 958 1.1 mrg (mem:SI (plus:SI (match_operand:SI 4 "register_operand" "r") (const_int -4)))) 959 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 960 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -8)))) 961 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 962 1.1 mrg (mem:SI (plus:SI (match_dup 4) (const_int -12))))])] 963 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 964 1.1 mrg "ldwm\\t{%1, %2, %3}, --(%4)" 965 1.1 mrg [(set_attr "type" "ldwm")]) 966 1.1 mrg 967 1.1 mrg (define_insn "*cdx_ldwm4_inc_wb_ret" 968 1.1 mrg [(match_parallel 0 "ldwm_operation" 969 1.1 mrg [(return) 970 1.1 mrg (set (match_operand:SI 5 "register_operand" "+&r") 971 1.1 mrg (plus:SI (match_dup 5) (const_int 16))) 972 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 973 1.1 mrg (mem:SI (match_dup 5))) 974 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 975 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 4)))) 976 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 977 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 8)))) 978 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 979 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] 980 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 981 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, (%5)++, writeback, ret" 982 1.1 mrg [(set_attr "type" "ldwm")]) 983 1.1 mrg 984 1.1 mrg (define_insn "*cdx_ldwm4_inc_wb" 985 1.1 mrg [(match_parallel 0 "ldwm_operation" 986 1.1 mrg [(set (match_operand:SI 5 "register_operand" "+&r") 987 1.1 mrg (plus:SI (match_dup 5) (const_int 16))) 988 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 989 1.1 mrg (mem:SI (match_dup 5))) 990 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 991 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 4)))) 992 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 993 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 8)))) 994 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 995 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] 996 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 997 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, (%5)++, writeback" 998 1.1 mrg [(set_attr "type" "ldwm")]) 999 1.1 mrg 1000 1.1 mrg (define_insn "*cdx_ldwm4_inc_ret" 1001 1.1 mrg [(match_parallel 0 "ldwm_operation" 1002 1.1 mrg [(return) 1003 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1004 1.1 mrg (mem:SI (match_operand:SI 5 "register_operand" "r"))) 1005 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1006 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 4)))) 1007 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1008 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 8)))) 1009 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1010 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] 1011 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 1012 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, (%5)++, ret" 1013 1.1 mrg [(set_attr "type" "ldwm")]) 1014 1.1 mrg 1015 1.1 mrg (define_insn "*cdx_ldwm4_inc" 1016 1.1 mrg [(match_parallel 0 "ldwm_operation" 1017 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1018 1.1 mrg (mem:SI (match_operand:SI 5 "register_operand" "r"))) 1019 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1020 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 4)))) 1021 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1022 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 8)))) 1023 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1024 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int 12))))])] 1025 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 1026 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, (%5)++" 1027 1.1 mrg [(set_attr "type" "ldwm")]) 1028 1.1 mrg 1029 1.1 mrg (define_insn "*cdx_ldwm4_dec_wb_ret" 1030 1.1 mrg [(match_parallel 0 "ldwm_operation" 1031 1.1 mrg [(return) 1032 1.1 mrg (set (match_operand:SI 5 "register_operand" "+&r") 1033 1.1 mrg (plus:SI (match_dup 5) (const_int -16))) 1034 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1035 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -4)))) 1036 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1037 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -8)))) 1038 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1039 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -12)))) 1040 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1041 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] 1042 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 1043 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, --(%5), writeback, ret" 1044 1.1 mrg [(set_attr "type" "ldwm")]) 1045 1.1 mrg 1046 1.1 mrg (define_insn "*cdx_ldwm4_dec_wb" 1047 1.1 mrg [(match_parallel 0 "ldwm_operation" 1048 1.1 mrg [(set (match_operand:SI 5 "register_operand" "+&r") 1049 1.1 mrg (plus:SI (match_dup 5) (const_int -16))) 1050 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1051 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -4)))) 1052 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1053 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -8)))) 1054 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1055 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -12)))) 1056 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1057 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] 1058 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 1059 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, --(%5), writeback" 1060 1.1 mrg [(set_attr "type" "ldwm")]) 1061 1.1 mrg 1062 1.1 mrg (define_insn "*cdx_ldwm4_dec_ret" 1063 1.1 mrg [(match_parallel 0 "ldwm_operation" 1064 1.1 mrg [(return) 1065 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1066 1.1 mrg (mem:SI (plus:SI (match_operand:SI 5 "register_operand" "r") (const_int -4)))) 1067 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1068 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -8)))) 1069 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1070 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -12)))) 1071 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1072 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] 1073 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 1074 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, --(%5), ret" 1075 1.1 mrg [(set_attr "type" "ldwm")]) 1076 1.1 mrg 1077 1.1 mrg (define_insn "*cdx_ldwm4_dec" 1078 1.1 mrg [(match_parallel 0 "ldwm_operation" 1079 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1080 1.1 mrg (mem:SI (plus:SI (match_operand:SI 5 "register_operand" "r") (const_int -4)))) 1081 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1082 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -8)))) 1083 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1084 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -12)))) 1085 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1086 1.1 mrg (mem:SI (plus:SI (match_dup 5) (const_int -16))))])] 1087 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 1088 1.1 mrg "ldwm\\t{%1, %2, %3, %4}, --(%5)" 1089 1.1 mrg [(set_attr "type" "ldwm")]) 1090 1.1 mrg 1091 1.1 mrg (define_insn "*cdx_ldwm5_inc_wb_ret" 1092 1.1 mrg [(match_parallel 0 "ldwm_operation" 1093 1.1 mrg [(return) 1094 1.1 mrg (set (match_operand:SI 6 "register_operand" "+&r") 1095 1.1 mrg (plus:SI (match_dup 6) (const_int 20))) 1096 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1097 1.1 mrg (mem:SI (match_dup 6))) 1098 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1099 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 4)))) 1100 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1101 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 8)))) 1102 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1103 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 12)))) 1104 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1105 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] 1106 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1107 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++, writeback, ret" 1108 1.1 mrg [(set_attr "type" "ldwm")]) 1109 1.1 mrg 1110 1.1 mrg (define_insn "*cdx_ldwm5_inc_wb" 1111 1.1 mrg [(match_parallel 0 "ldwm_operation" 1112 1.1 mrg [(set (match_operand:SI 6 "register_operand" "+&r") 1113 1.1 mrg (plus:SI (match_dup 6) (const_int 20))) 1114 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1115 1.1 mrg (mem:SI (match_dup 6))) 1116 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1117 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 4)))) 1118 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1119 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 8)))) 1120 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1121 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 12)))) 1122 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1123 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] 1124 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 1125 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++, writeback" 1126 1.1 mrg [(set_attr "type" "ldwm")]) 1127 1.1 mrg 1128 1.1 mrg (define_insn "*cdx_ldwm5_inc_ret" 1129 1.1 mrg [(match_parallel 0 "ldwm_operation" 1130 1.1 mrg [(return) 1131 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1132 1.1 mrg (mem:SI (match_operand:SI 6 "register_operand" "r"))) 1133 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1134 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 4)))) 1135 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1136 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 8)))) 1137 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1138 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 12)))) 1139 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1140 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] 1141 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 1142 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++, ret" 1143 1.1 mrg [(set_attr "type" "ldwm")]) 1144 1.1 mrg 1145 1.1 mrg (define_insn "*cdx_ldwm5_inc" 1146 1.1 mrg [(match_parallel 0 "ldwm_operation" 1147 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1148 1.1 mrg (mem:SI (match_operand:SI 6 "register_operand" "r"))) 1149 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1150 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 4)))) 1151 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1152 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 8)))) 1153 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1154 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 12)))) 1155 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1156 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int 16))))])] 1157 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 1158 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, (%6)++" 1159 1.1 mrg [(set_attr "type" "ldwm")]) 1160 1.1 mrg 1161 1.1 mrg (define_insn "*cdx_ldwm5_dec_wb_ret" 1162 1.1 mrg [(match_parallel 0 "ldwm_operation" 1163 1.1 mrg [(return) 1164 1.1 mrg (set (match_operand:SI 6 "register_operand" "+&r") 1165 1.1 mrg (plus:SI (match_dup 6) (const_int -20))) 1166 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1167 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -4)))) 1168 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1169 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -8)))) 1170 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1171 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -12)))) 1172 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1173 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -16)))) 1174 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1175 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] 1176 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1177 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, --(%6), writeback, ret" 1178 1.1 mrg [(set_attr "type" "ldwm")]) 1179 1.1 mrg 1180 1.1 mrg (define_insn "*cdx_ldwm5_dec_wb" 1181 1.1 mrg [(match_parallel 0 "ldwm_operation" 1182 1.1 mrg [(set (match_operand:SI 6 "register_operand" "+&r") 1183 1.1 mrg (plus:SI (match_dup 6) (const_int -20))) 1184 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1185 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -4)))) 1186 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1187 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -8)))) 1188 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1189 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -12)))) 1190 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1191 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -16)))) 1192 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1193 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] 1194 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 1195 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, --(%6), writeback" 1196 1.1 mrg [(set_attr "type" "ldwm")]) 1197 1.1 mrg 1198 1.1 mrg (define_insn "*cdx_ldwm5_dec_ret" 1199 1.1 mrg [(match_parallel 0 "ldwm_operation" 1200 1.1 mrg [(return) 1201 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1202 1.1 mrg (mem:SI (plus:SI (match_operand:SI 6 "register_operand" "r") (const_int -4)))) 1203 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1204 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -8)))) 1205 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1206 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -12)))) 1207 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1208 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -16)))) 1209 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1210 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] 1211 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 1212 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, --(%6), ret" 1213 1.1 mrg [(set_attr "type" "ldwm")]) 1214 1.1 mrg 1215 1.1 mrg (define_insn "*cdx_ldwm5_dec" 1216 1.1 mrg [(match_parallel 0 "ldwm_operation" 1217 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1218 1.1 mrg (mem:SI (plus:SI (match_operand:SI 6 "register_operand" "r") (const_int -4)))) 1219 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1220 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -8)))) 1221 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1222 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -12)))) 1223 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1224 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -16)))) 1225 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1226 1.1 mrg (mem:SI (plus:SI (match_dup 6) (const_int -20))))])] 1227 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 1228 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5}, --(%6)" 1229 1.1 mrg [(set_attr "type" "ldwm")]) 1230 1.1 mrg 1231 1.1 mrg (define_insn "*cdx_ldwm6_inc_wb_ret" 1232 1.1 mrg [(match_parallel 0 "ldwm_operation" 1233 1.1 mrg [(return) 1234 1.1 mrg (set (match_operand:SI 7 "register_operand" "+&r") 1235 1.1 mrg (plus:SI (match_dup 7) (const_int 24))) 1236 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1237 1.1 mrg (mem:SI (match_dup 7))) 1238 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1239 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 4)))) 1240 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1241 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 8)))) 1242 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1243 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 12)))) 1244 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1245 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 16)))) 1246 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1247 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] 1248 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1249 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, writeback, ret" 1250 1.1 mrg [(set_attr "type" "ldwm")]) 1251 1.1 mrg 1252 1.1 mrg (define_insn "*cdx_ldwm6_inc_wb" 1253 1.1 mrg [(match_parallel 0 "ldwm_operation" 1254 1.1 mrg [(set (match_operand:SI 7 "register_operand" "+&r") 1255 1.1 mrg (plus:SI (match_dup 7) (const_int 24))) 1256 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1257 1.1 mrg (mem:SI (match_dup 7))) 1258 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1259 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 4)))) 1260 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1261 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 8)))) 1262 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1263 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 12)))) 1264 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1265 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 16)))) 1266 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1267 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] 1268 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1269 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, writeback" 1270 1.1 mrg [(set_attr "type" "ldwm")]) 1271 1.1 mrg 1272 1.1 mrg (define_insn "*cdx_ldwm6_inc_ret" 1273 1.1 mrg [(match_parallel 0 "ldwm_operation" 1274 1.1 mrg [(return) 1275 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1276 1.1 mrg (mem:SI (match_operand:SI 7 "register_operand" "r"))) 1277 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1278 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 4)))) 1279 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1280 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 8)))) 1281 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1282 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 12)))) 1283 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1284 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 16)))) 1285 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1286 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] 1287 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1288 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, ret" 1289 1.1 mrg [(set_attr "type" "ldwm")]) 1290 1.1 mrg 1291 1.1 mrg (define_insn "*cdx_ldwm6_inc" 1292 1.1 mrg [(match_parallel 0 "ldwm_operation" 1293 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1294 1.1 mrg (mem:SI (match_operand:SI 7 "register_operand" "r"))) 1295 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1296 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 4)))) 1297 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1298 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 8)))) 1299 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1300 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 12)))) 1301 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1302 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 16)))) 1303 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1304 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int 20))))])] 1305 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 1306 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++" 1307 1.1 mrg [(set_attr "type" "ldwm")]) 1308 1.1 mrg 1309 1.1 mrg (define_insn "*cdx_ldwm6_dec_wb_ret" 1310 1.1 mrg [(match_parallel 0 "ldwm_operation" 1311 1.1 mrg [(return) 1312 1.1 mrg (set (match_operand:SI 7 "register_operand" "+&r") 1313 1.1 mrg (plus:SI (match_dup 7) (const_int -24))) 1314 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1315 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -4)))) 1316 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1317 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -8)))) 1318 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1319 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -12)))) 1320 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1321 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -16)))) 1322 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1323 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -20)))) 1324 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1325 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] 1326 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1327 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), writeback, ret" 1328 1.1 mrg [(set_attr "type" "ldwm")]) 1329 1.1 mrg 1330 1.1 mrg (define_insn "*cdx_ldwm6_dec_wb" 1331 1.1 mrg [(match_parallel 0 "ldwm_operation" 1332 1.1 mrg [(set (match_operand:SI 7 "register_operand" "+&r") 1333 1.1 mrg (plus:SI (match_dup 7) (const_int -24))) 1334 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1335 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -4)))) 1336 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1337 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -8)))) 1338 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1339 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -12)))) 1340 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1341 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -16)))) 1342 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1343 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -20)))) 1344 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1345 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] 1346 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1347 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), writeback" 1348 1.1 mrg [(set_attr "type" "ldwm")]) 1349 1.1 mrg 1350 1.1 mrg (define_insn "*cdx_ldwm6_dec_ret" 1351 1.1 mrg [(match_parallel 0 "ldwm_operation" 1352 1.1 mrg [(return) 1353 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1354 1.1 mrg (mem:SI (plus:SI (match_operand:SI 7 "register_operand" "r") (const_int -4)))) 1355 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1356 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -8)))) 1357 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1358 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -12)))) 1359 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1360 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -16)))) 1361 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1362 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -20)))) 1363 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1364 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] 1365 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1366 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), ret" 1367 1.1 mrg [(set_attr "type" "ldwm")]) 1368 1.1 mrg 1369 1.1 mrg (define_insn "*cdx_ldwm6_dec" 1370 1.1 mrg [(match_parallel 0 "ldwm_operation" 1371 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1372 1.1 mrg (mem:SI (plus:SI (match_operand:SI 7 "register_operand" "r") (const_int -4)))) 1373 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1374 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -8)))) 1375 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1376 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -12)))) 1377 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1378 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -16)))) 1379 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1380 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -20)))) 1381 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1382 1.1 mrg (mem:SI (plus:SI (match_dup 7) (const_int -24))))])] 1383 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 1384 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6}, --(%7)" 1385 1.1 mrg [(set_attr "type" "ldwm")]) 1386 1.1 mrg 1387 1.1 mrg (define_insn "*cdx_ldwm7_inc_wb_ret" 1388 1.1 mrg [(match_parallel 0 "ldwm_operation" 1389 1.1 mrg [(return) 1390 1.1 mrg (set (match_operand:SI 8 "register_operand" "+&r") 1391 1.1 mrg (plus:SI (match_dup 8) (const_int 28))) 1392 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1393 1.1 mrg (mem:SI (match_dup 8))) 1394 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1395 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 4)))) 1396 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1397 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 8)))) 1398 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1399 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 12)))) 1400 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1401 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 16)))) 1402 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1403 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 20)))) 1404 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1405 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] 1406 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1407 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, writeback, ret" 1408 1.1 mrg [(set_attr "type" "ldwm")]) 1409 1.1 mrg 1410 1.1 mrg (define_insn "*cdx_ldwm7_inc_wb" 1411 1.1 mrg [(match_parallel 0 "ldwm_operation" 1412 1.1 mrg [(set (match_operand:SI 8 "register_operand" "+&r") 1413 1.1 mrg (plus:SI (match_dup 8) (const_int 28))) 1414 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1415 1.1 mrg (mem:SI (match_dup 8))) 1416 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1417 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 4)))) 1418 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1419 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 8)))) 1420 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1421 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 12)))) 1422 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1423 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 16)))) 1424 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1425 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 20)))) 1426 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1427 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] 1428 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1429 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, writeback" 1430 1.1 mrg [(set_attr "type" "ldwm")]) 1431 1.1 mrg 1432 1.1 mrg (define_insn "*cdx_ldwm7_inc_ret" 1433 1.1 mrg [(match_parallel 0 "ldwm_operation" 1434 1.1 mrg [(return) 1435 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1436 1.1 mrg (mem:SI (match_operand:SI 8 "register_operand" "r"))) 1437 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1438 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 4)))) 1439 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1440 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 8)))) 1441 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1442 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 12)))) 1443 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1444 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 16)))) 1445 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1446 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 20)))) 1447 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1448 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] 1449 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1450 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, ret" 1451 1.1 mrg [(set_attr "type" "ldwm")]) 1452 1.1 mrg 1453 1.1 mrg (define_insn "*cdx_ldwm7_inc" 1454 1.1 mrg [(match_parallel 0 "ldwm_operation" 1455 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1456 1.1 mrg (mem:SI (match_operand:SI 8 "register_operand" "r"))) 1457 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1458 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 4)))) 1459 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1460 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 8)))) 1461 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1462 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 12)))) 1463 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1464 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 16)))) 1465 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1466 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 20)))) 1467 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1468 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int 24))))])] 1469 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1470 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++" 1471 1.1 mrg [(set_attr "type" "ldwm")]) 1472 1.1 mrg 1473 1.1 mrg (define_insn "*cdx_ldwm7_dec_wb_ret" 1474 1.1 mrg [(match_parallel 0 "ldwm_operation" 1475 1.1 mrg [(return) 1476 1.1 mrg (set (match_operand:SI 8 "register_operand" "+&r") 1477 1.1 mrg (plus:SI (match_dup 8) (const_int -28))) 1478 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1479 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -4)))) 1480 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1481 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -8)))) 1482 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1483 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -12)))) 1484 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1485 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -16)))) 1486 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1487 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -20)))) 1488 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1489 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -24)))) 1490 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1491 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] 1492 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1493 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), writeback, ret" 1494 1.1 mrg [(set_attr "type" "ldwm")]) 1495 1.1 mrg 1496 1.1 mrg (define_insn "*cdx_ldwm7_dec_wb" 1497 1.1 mrg [(match_parallel 0 "ldwm_operation" 1498 1.1 mrg [(set (match_operand:SI 8 "register_operand" "+&r") 1499 1.1 mrg (plus:SI (match_dup 8) (const_int -28))) 1500 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1501 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -4)))) 1502 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1503 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -8)))) 1504 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1505 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -12)))) 1506 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1507 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -16)))) 1508 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1509 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -20)))) 1510 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1511 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -24)))) 1512 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1513 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] 1514 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1515 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), writeback" 1516 1.1 mrg [(set_attr "type" "ldwm")]) 1517 1.1 mrg 1518 1.1 mrg (define_insn "*cdx_ldwm7_dec_ret" 1519 1.1 mrg [(match_parallel 0 "ldwm_operation" 1520 1.1 mrg [(return) 1521 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1522 1.1 mrg (mem:SI (plus:SI (match_operand:SI 8 "register_operand" "r") (const_int -4)))) 1523 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1524 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -8)))) 1525 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1526 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -12)))) 1527 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1528 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -16)))) 1529 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1530 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -20)))) 1531 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1532 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -24)))) 1533 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1534 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] 1535 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1536 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), ret" 1537 1.1 mrg [(set_attr "type" "ldwm")]) 1538 1.1 mrg 1539 1.1 mrg (define_insn "*cdx_ldwm7_dec" 1540 1.1 mrg [(match_parallel 0 "ldwm_operation" 1541 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1542 1.1 mrg (mem:SI (plus:SI (match_operand:SI 8 "register_operand" "r") (const_int -4)))) 1543 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1544 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -8)))) 1545 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1546 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -12)))) 1547 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1548 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -16)))) 1549 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1550 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -20)))) 1551 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1552 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -24)))) 1553 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1554 1.1 mrg (mem:SI (plus:SI (match_dup 8) (const_int -28))))])] 1555 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 1556 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8)" 1557 1.1 mrg [(set_attr "type" "ldwm")]) 1558 1.1 mrg 1559 1.1 mrg (define_insn "*cdx_ldwm8_inc_wb_ret" 1560 1.1 mrg [(match_parallel 0 "ldwm_operation" 1561 1.1 mrg [(return) 1562 1.1 mrg (set (match_operand:SI 9 "register_operand" "+&r") 1563 1.1 mrg (plus:SI (match_dup 9) (const_int 32))) 1564 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1565 1.1 mrg (mem:SI (match_dup 9))) 1566 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1567 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 4)))) 1568 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1569 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 8)))) 1570 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1571 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 12)))) 1572 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1573 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 16)))) 1574 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1575 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 20)))) 1576 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1577 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 24)))) 1578 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1579 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] 1580 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 1581 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, writeback, ret" 1582 1.1 mrg [(set_attr "type" "ldwm")]) 1583 1.1 mrg 1584 1.1 mrg (define_insn "*cdx_ldwm8_inc_wb" 1585 1.1 mrg [(match_parallel 0 "ldwm_operation" 1586 1.1 mrg [(set (match_operand:SI 9 "register_operand" "+&r") 1587 1.1 mrg (plus:SI (match_dup 9) (const_int 32))) 1588 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1589 1.1 mrg (mem:SI (match_dup 9))) 1590 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1591 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 4)))) 1592 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1593 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 8)))) 1594 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1595 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 12)))) 1596 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1597 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 16)))) 1598 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1599 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 20)))) 1600 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1601 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 24)))) 1602 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1603 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] 1604 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1605 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, writeback" 1606 1.1 mrg [(set_attr "type" "ldwm")]) 1607 1.1 mrg 1608 1.1 mrg (define_insn "*cdx_ldwm8_inc_ret" 1609 1.1 mrg [(match_parallel 0 "ldwm_operation" 1610 1.1 mrg [(return) 1611 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1612 1.1 mrg (mem:SI (match_operand:SI 9 "register_operand" "r"))) 1613 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1614 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 4)))) 1615 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1616 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 8)))) 1617 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1618 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 12)))) 1619 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1620 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 16)))) 1621 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1622 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 20)))) 1623 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1624 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 24)))) 1625 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1626 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] 1627 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1628 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, ret" 1629 1.1 mrg [(set_attr "type" "ldwm")]) 1630 1.1 mrg 1631 1.1 mrg (define_insn "*cdx_ldwm8_inc" 1632 1.1 mrg [(match_parallel 0 "ldwm_operation" 1633 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1634 1.1 mrg (mem:SI (match_operand:SI 9 "register_operand" "r"))) 1635 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1636 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 4)))) 1637 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1638 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 8)))) 1639 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1640 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 12)))) 1641 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1642 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 16)))) 1643 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1644 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 20)))) 1645 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1646 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 24)))) 1647 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1648 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int 28))))])] 1649 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1650 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++" 1651 1.1 mrg [(set_attr "type" "ldwm")]) 1652 1.1 mrg 1653 1.1 mrg (define_insn "*cdx_ldwm8_dec_wb_ret" 1654 1.1 mrg [(match_parallel 0 "ldwm_operation" 1655 1.1 mrg [(return) 1656 1.1 mrg (set (match_operand:SI 9 "register_operand" "+&r") 1657 1.1 mrg (plus:SI (match_dup 9) (const_int -32))) 1658 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1659 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -4)))) 1660 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1661 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -8)))) 1662 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1663 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -12)))) 1664 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1665 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -16)))) 1666 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1667 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -20)))) 1668 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1669 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -24)))) 1670 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1671 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -28)))) 1672 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1673 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] 1674 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 1675 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), writeback, ret" 1676 1.1 mrg [(set_attr "type" "ldwm")]) 1677 1.1 mrg 1678 1.1 mrg (define_insn "*cdx_ldwm8_dec_wb" 1679 1.1 mrg [(match_parallel 0 "ldwm_operation" 1680 1.1 mrg [(set (match_operand:SI 9 "register_operand" "+&r") 1681 1.1 mrg (plus:SI (match_dup 9) (const_int -32))) 1682 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1683 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -4)))) 1684 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1685 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -8)))) 1686 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1687 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -12)))) 1688 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1689 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -16)))) 1690 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1691 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -20)))) 1692 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1693 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -24)))) 1694 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1695 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -28)))) 1696 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1697 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] 1698 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1699 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), writeback" 1700 1.1 mrg [(set_attr "type" "ldwm")]) 1701 1.1 mrg 1702 1.1 mrg (define_insn "*cdx_ldwm8_dec_ret" 1703 1.1 mrg [(match_parallel 0 "ldwm_operation" 1704 1.1 mrg [(return) 1705 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1706 1.1 mrg (mem:SI (plus:SI (match_operand:SI 9 "register_operand" "r") (const_int -4)))) 1707 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1708 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -8)))) 1709 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1710 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -12)))) 1711 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1712 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -16)))) 1713 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1714 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -20)))) 1715 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1716 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -24)))) 1717 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1718 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -28)))) 1719 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1720 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] 1721 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1722 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), ret" 1723 1.1 mrg [(set_attr "type" "ldwm")]) 1724 1.1 mrg 1725 1.1 mrg (define_insn "*cdx_ldwm8_dec" 1726 1.1 mrg [(match_parallel 0 "ldwm_operation" 1727 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1728 1.1 mrg (mem:SI (plus:SI (match_operand:SI 9 "register_operand" "r") (const_int -4)))) 1729 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1730 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -8)))) 1731 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1732 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -12)))) 1733 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1734 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -16)))) 1735 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1736 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -20)))) 1737 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1738 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -24)))) 1739 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1740 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -28)))) 1741 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1742 1.1 mrg (mem:SI (plus:SI (match_dup 9) (const_int -32))))])] 1743 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 1744 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9)" 1745 1.1 mrg [(set_attr "type" "ldwm")]) 1746 1.1 mrg 1747 1.1 mrg (define_insn "*cdx_ldwm9_inc_wb_ret" 1748 1.1 mrg [(match_parallel 0 "ldwm_operation" 1749 1.1 mrg [(return) 1750 1.1 mrg (set (match_operand:SI 10 "register_operand" "+&r") 1751 1.1 mrg (plus:SI (match_dup 10) (const_int 36))) 1752 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1753 1.1 mrg (mem:SI (match_dup 10))) 1754 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1755 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 4)))) 1756 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1757 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 8)))) 1758 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1759 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 12)))) 1760 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1761 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 16)))) 1762 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1763 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 20)))) 1764 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1765 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 24)))) 1766 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1767 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 28)))) 1768 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1769 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] 1770 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 1771 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, writeback, ret" 1772 1.1 mrg [(set_attr "type" "ldwm")]) 1773 1.1 mrg 1774 1.1 mrg (define_insn "*cdx_ldwm9_inc_wb" 1775 1.1 mrg [(match_parallel 0 "ldwm_operation" 1776 1.1 mrg [(set (match_operand:SI 10 "register_operand" "+&r") 1777 1.1 mrg (plus:SI (match_dup 10) (const_int 36))) 1778 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1779 1.1 mrg (mem:SI (match_dup 10))) 1780 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1781 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 4)))) 1782 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1783 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 8)))) 1784 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1785 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 12)))) 1786 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1787 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 16)))) 1788 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1789 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 20)))) 1790 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1791 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 24)))) 1792 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1793 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 28)))) 1794 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1795 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] 1796 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 1797 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, writeback" 1798 1.1 mrg [(set_attr "type" "ldwm")]) 1799 1.1 mrg 1800 1.1 mrg (define_insn "*cdx_ldwm9_inc_ret" 1801 1.1 mrg [(match_parallel 0 "ldwm_operation" 1802 1.1 mrg [(return) 1803 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1804 1.1 mrg (mem:SI (match_operand:SI 10 "register_operand" "r"))) 1805 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1806 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 4)))) 1807 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1808 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 8)))) 1809 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1810 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 12)))) 1811 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1812 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 16)))) 1813 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1814 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 20)))) 1815 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1816 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 24)))) 1817 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1818 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 28)))) 1819 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1820 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] 1821 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 1822 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, ret" 1823 1.1 mrg [(set_attr "type" "ldwm")]) 1824 1.1 mrg 1825 1.1 mrg (define_insn "*cdx_ldwm9_inc" 1826 1.1 mrg [(match_parallel 0 "ldwm_operation" 1827 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1828 1.1 mrg (mem:SI (match_operand:SI 10 "register_operand" "r"))) 1829 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1830 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 4)))) 1831 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1832 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 8)))) 1833 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1834 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 12)))) 1835 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1836 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 16)))) 1837 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1838 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 20)))) 1839 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1840 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 24)))) 1841 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1842 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 28)))) 1843 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1844 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int 32))))])] 1845 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1846 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++" 1847 1.1 mrg [(set_attr "type" "ldwm")]) 1848 1.1 mrg 1849 1.1 mrg (define_insn "*cdx_ldwm9_dec_wb_ret" 1850 1.1 mrg [(match_parallel 0 "ldwm_operation" 1851 1.1 mrg [(return) 1852 1.1 mrg (set (match_operand:SI 10 "register_operand" "+&r") 1853 1.1 mrg (plus:SI (match_dup 10) (const_int -36))) 1854 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1855 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -4)))) 1856 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1857 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -8)))) 1858 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1859 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -12)))) 1860 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1861 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -16)))) 1862 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1863 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -20)))) 1864 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1865 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -24)))) 1866 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1867 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -28)))) 1868 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1869 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -32)))) 1870 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1871 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] 1872 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 1873 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), writeback, ret" 1874 1.1 mrg [(set_attr "type" "ldwm")]) 1875 1.1 mrg 1876 1.1 mrg (define_insn "*cdx_ldwm9_dec_wb" 1877 1.1 mrg [(match_parallel 0 "ldwm_operation" 1878 1.1 mrg [(set (match_operand:SI 10 "register_operand" "+&r") 1879 1.1 mrg (plus:SI (match_dup 10) (const_int -36))) 1880 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1881 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -4)))) 1882 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1883 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -8)))) 1884 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1885 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -12)))) 1886 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1887 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -16)))) 1888 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1889 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -20)))) 1890 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1891 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -24)))) 1892 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1893 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -28)))) 1894 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1895 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -32)))) 1896 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1897 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] 1898 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 1899 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), writeback" 1900 1.1 mrg [(set_attr "type" "ldwm")]) 1901 1.1 mrg 1902 1.1 mrg (define_insn "*cdx_ldwm9_dec_ret" 1903 1.1 mrg [(match_parallel 0 "ldwm_operation" 1904 1.1 mrg [(return) 1905 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1906 1.1 mrg (mem:SI (plus:SI (match_operand:SI 10 "register_operand" "r") (const_int -4)))) 1907 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1908 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -8)))) 1909 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1910 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -12)))) 1911 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1912 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -16)))) 1913 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1914 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -20)))) 1915 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1916 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -24)))) 1917 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1918 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -28)))) 1919 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1920 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -32)))) 1921 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1922 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] 1923 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 1924 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), ret" 1925 1.1 mrg [(set_attr "type" "ldwm")]) 1926 1.1 mrg 1927 1.1 mrg (define_insn "*cdx_ldwm9_dec" 1928 1.1 mrg [(match_parallel 0 "ldwm_operation" 1929 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 1930 1.1 mrg (mem:SI (plus:SI (match_operand:SI 10 "register_operand" "r") (const_int -4)))) 1931 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1932 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -8)))) 1933 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1934 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -12)))) 1935 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1936 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -16)))) 1937 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1938 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -20)))) 1939 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1940 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -24)))) 1941 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1942 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -28)))) 1943 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1944 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -32)))) 1945 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1946 1.1 mrg (mem:SI (plus:SI (match_dup 10) (const_int -36))))])] 1947 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 1948 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10)" 1949 1.1 mrg [(set_attr "type" "ldwm")]) 1950 1.1 mrg 1951 1.1 mrg (define_insn "*cdx_ldwm10_inc_wb_ret" 1952 1.1 mrg [(match_parallel 0 "ldwm_operation" 1953 1.1 mrg [(return) 1954 1.1 mrg (set (match_operand:SI 11 "register_operand" "+&r") 1955 1.1 mrg (plus:SI (match_dup 11) (const_int 40))) 1956 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1957 1.1 mrg (mem:SI (match_dup 11))) 1958 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1959 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 4)))) 1960 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1961 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 8)))) 1962 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1963 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 12)))) 1964 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1965 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 16)))) 1966 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1967 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 20)))) 1968 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1969 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 24)))) 1970 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1971 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 28)))) 1972 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 1973 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 32)))) 1974 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 1975 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] 1976 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 1977 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, writeback, ret" 1978 1.1 mrg [(set_attr "type" "ldwm")]) 1979 1.1 mrg 1980 1.1 mrg (define_insn "*cdx_ldwm10_inc_wb" 1981 1.1 mrg [(match_parallel 0 "ldwm_operation" 1982 1.1 mrg [(set (match_operand:SI 11 "register_operand" "+&r") 1983 1.1 mrg (plus:SI (match_dup 11) (const_int 40))) 1984 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 1985 1.1 mrg (mem:SI (match_dup 11))) 1986 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 1987 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 4)))) 1988 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 1989 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 8)))) 1990 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 1991 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 12)))) 1992 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 1993 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 16)))) 1994 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 1995 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 20)))) 1996 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 1997 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 24)))) 1998 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 1999 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 28)))) 2000 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2001 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 32)))) 2002 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2003 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] 2004 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 2005 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, writeback" 2006 1.1 mrg [(set_attr "type" "ldwm")]) 2007 1.1 mrg 2008 1.1 mrg (define_insn "*cdx_ldwm10_inc_ret" 2009 1.1 mrg [(match_parallel 0 "ldwm_operation" 2010 1.1 mrg [(return) 2011 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2012 1.1 mrg (mem:SI (match_operand:SI 11 "register_operand" "r"))) 2013 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2014 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 4)))) 2015 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2016 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 8)))) 2017 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2018 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 12)))) 2019 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2020 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 16)))) 2021 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2022 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 20)))) 2023 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2024 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 24)))) 2025 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2026 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 28)))) 2027 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2028 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 32)))) 2029 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2030 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] 2031 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 2032 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, ret" 2033 1.1 mrg [(set_attr "type" "ldwm")]) 2034 1.1 mrg 2035 1.1 mrg (define_insn "*cdx_ldwm10_inc" 2036 1.1 mrg [(match_parallel 0 "ldwm_operation" 2037 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 2038 1.1 mrg (mem:SI (match_operand:SI 11 "register_operand" "r"))) 2039 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2040 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 4)))) 2041 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2042 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 8)))) 2043 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2044 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 12)))) 2045 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2046 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 16)))) 2047 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2048 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 20)))) 2049 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2050 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 24)))) 2051 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2052 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 28)))) 2053 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2054 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 32)))) 2055 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2056 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int 36))))])] 2057 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 2058 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++" 2059 1.1 mrg [(set_attr "type" "ldwm")]) 2060 1.1 mrg 2061 1.1 mrg (define_insn "*cdx_ldwm10_dec_wb_ret" 2062 1.1 mrg [(match_parallel 0 "ldwm_operation" 2063 1.1 mrg [(return) 2064 1.1 mrg (set (match_operand:SI 11 "register_operand" "+&r") 2065 1.1 mrg (plus:SI (match_dup 11) (const_int -40))) 2066 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2067 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -4)))) 2068 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2069 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -8)))) 2070 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2071 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -12)))) 2072 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2073 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -16)))) 2074 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2075 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -20)))) 2076 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2077 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -24)))) 2078 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2079 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -28)))) 2080 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2081 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -32)))) 2082 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2083 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -36)))) 2084 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2085 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] 2086 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 2087 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), writeback, ret" 2088 1.1 mrg [(set_attr "type" "ldwm")]) 2089 1.1 mrg 2090 1.1 mrg (define_insn "*cdx_ldwm10_dec_wb" 2091 1.1 mrg [(match_parallel 0 "ldwm_operation" 2092 1.1 mrg [(set (match_operand:SI 11 "register_operand" "+&r") 2093 1.1 mrg (plus:SI (match_dup 11) (const_int -40))) 2094 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2095 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -4)))) 2096 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2097 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -8)))) 2098 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2099 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -12)))) 2100 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2101 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -16)))) 2102 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2103 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -20)))) 2104 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2105 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -24)))) 2106 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2107 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -28)))) 2108 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2109 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -32)))) 2110 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2111 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -36)))) 2112 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2113 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] 2114 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 2115 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), writeback" 2116 1.1 mrg [(set_attr "type" "ldwm")]) 2117 1.1 mrg 2118 1.1 mrg (define_insn "*cdx_ldwm10_dec_ret" 2119 1.1 mrg [(match_parallel 0 "ldwm_operation" 2120 1.1 mrg [(return) 2121 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2122 1.1 mrg (mem:SI (plus:SI (match_operand:SI 11 "register_operand" "r") (const_int -4)))) 2123 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2124 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -8)))) 2125 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2126 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -12)))) 2127 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2128 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -16)))) 2129 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2130 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -20)))) 2131 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2132 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -24)))) 2133 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2134 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -28)))) 2135 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2136 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -32)))) 2137 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2138 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -36)))) 2139 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2140 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] 2141 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 2142 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), ret" 2143 1.1 mrg [(set_attr "type" "ldwm")]) 2144 1.1 mrg 2145 1.1 mrg (define_insn "*cdx_ldwm10_dec" 2146 1.1 mrg [(match_parallel 0 "ldwm_operation" 2147 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 2148 1.1 mrg (mem:SI (plus:SI (match_operand:SI 11 "register_operand" "r") (const_int -4)))) 2149 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2150 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -8)))) 2151 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2152 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -12)))) 2153 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2154 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -16)))) 2155 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2156 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -20)))) 2157 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2158 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -24)))) 2159 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2160 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -28)))) 2161 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2162 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -32)))) 2163 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2164 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -36)))) 2165 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2166 1.1 mrg (mem:SI (plus:SI (match_dup 11) (const_int -40))))])] 2167 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 2168 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11)" 2169 1.1 mrg [(set_attr "type" "ldwm")]) 2170 1.1 mrg 2171 1.1 mrg (define_insn "*cdx_ldwm11_inc_wb_ret" 2172 1.1 mrg [(match_parallel 0 "ldwm_operation" 2173 1.1 mrg [(return) 2174 1.1 mrg (set (match_operand:SI 12 "register_operand" "+&r") 2175 1.1 mrg (plus:SI (match_dup 12) (const_int 44))) 2176 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2177 1.1 mrg (mem:SI (match_dup 12))) 2178 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2179 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 4)))) 2180 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2181 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 8)))) 2182 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2183 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 12)))) 2184 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2185 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 16)))) 2186 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2187 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 20)))) 2188 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2189 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 24)))) 2190 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2191 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 28)))) 2192 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2193 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 32)))) 2194 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2195 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 36)))) 2196 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2197 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] 2198 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 2199 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, writeback, ret" 2200 1.1 mrg [(set_attr "type" "ldwm")]) 2201 1.1 mrg 2202 1.1 mrg (define_insn "*cdx_ldwm11_inc_wb" 2203 1.1 mrg [(match_parallel 0 "ldwm_operation" 2204 1.1 mrg [(set (match_operand:SI 12 "register_operand" "+&r") 2205 1.1 mrg (plus:SI (match_dup 12) (const_int 44))) 2206 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2207 1.1 mrg (mem:SI (match_dup 12))) 2208 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2209 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 4)))) 2210 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2211 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 8)))) 2212 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2213 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 12)))) 2214 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2215 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 16)))) 2216 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2217 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 20)))) 2218 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2219 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 24)))) 2220 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2221 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 28)))) 2222 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2223 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 32)))) 2224 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2225 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 36)))) 2226 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2227 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] 2228 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 2229 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, writeback" 2230 1.1 mrg [(set_attr "type" "ldwm")]) 2231 1.1 mrg 2232 1.1 mrg (define_insn "*cdx_ldwm11_inc_ret" 2233 1.1 mrg [(match_parallel 0 "ldwm_operation" 2234 1.1 mrg [(return) 2235 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2236 1.1 mrg (mem:SI (match_operand:SI 12 "register_operand" "r"))) 2237 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2238 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 4)))) 2239 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2240 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 8)))) 2241 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2242 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 12)))) 2243 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2244 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 16)))) 2245 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2246 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 20)))) 2247 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2248 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 24)))) 2249 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2250 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 28)))) 2251 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2252 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 32)))) 2253 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2254 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 36)))) 2255 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2256 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] 2257 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 2258 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, ret" 2259 1.1 mrg [(set_attr "type" "ldwm")]) 2260 1.1 mrg 2261 1.1 mrg (define_insn "*cdx_ldwm11_inc" 2262 1.1 mrg [(match_parallel 0 "ldwm_operation" 2263 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 2264 1.1 mrg (mem:SI (match_operand:SI 12 "register_operand" "r"))) 2265 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2266 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 4)))) 2267 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2268 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 8)))) 2269 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2270 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 12)))) 2271 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2272 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 16)))) 2273 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2274 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 20)))) 2275 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2276 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 24)))) 2277 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2278 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 28)))) 2279 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2280 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 32)))) 2281 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2282 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 36)))) 2283 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2284 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int 40))))])] 2285 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 2286 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++" 2287 1.1 mrg [(set_attr "type" "ldwm")]) 2288 1.1 mrg 2289 1.1 mrg (define_insn "*cdx_ldwm11_dec_wb_ret" 2290 1.1 mrg [(match_parallel 0 "ldwm_operation" 2291 1.1 mrg [(return) 2292 1.1 mrg (set (match_operand:SI 12 "register_operand" "+&r") 2293 1.1 mrg (plus:SI (match_dup 12) (const_int -44))) 2294 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2295 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -4)))) 2296 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2297 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -8)))) 2298 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2299 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -12)))) 2300 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2301 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -16)))) 2302 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2303 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -20)))) 2304 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2305 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -24)))) 2306 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2307 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -28)))) 2308 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2309 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -32)))) 2310 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2311 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -36)))) 2312 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2313 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -40)))) 2314 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2315 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] 2316 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 2317 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), writeback, ret" 2318 1.1 mrg [(set_attr "type" "ldwm")]) 2319 1.1 mrg 2320 1.1 mrg (define_insn "*cdx_ldwm11_dec_wb" 2321 1.1 mrg [(match_parallel 0 "ldwm_operation" 2322 1.1 mrg [(set (match_operand:SI 12 "register_operand" "+&r") 2323 1.1 mrg (plus:SI (match_dup 12) (const_int -44))) 2324 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2325 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -4)))) 2326 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2327 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -8)))) 2328 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2329 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -12)))) 2330 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2331 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -16)))) 2332 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2333 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -20)))) 2334 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2335 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -24)))) 2336 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2337 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -28)))) 2338 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2339 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -32)))) 2340 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2341 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -36)))) 2342 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2343 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -40)))) 2344 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2345 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] 2346 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 2347 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), writeback" 2348 1.1 mrg [(set_attr "type" "ldwm")]) 2349 1.1 mrg 2350 1.1 mrg (define_insn "*cdx_ldwm11_dec_ret" 2351 1.1 mrg [(match_parallel 0 "ldwm_operation" 2352 1.1 mrg [(return) 2353 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2354 1.1 mrg (mem:SI (plus:SI (match_operand:SI 12 "register_operand" "r") (const_int -4)))) 2355 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2356 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -8)))) 2357 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2358 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -12)))) 2359 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2360 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -16)))) 2361 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2362 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -20)))) 2363 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2364 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -24)))) 2365 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2366 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -28)))) 2367 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2368 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -32)))) 2369 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2370 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -36)))) 2371 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2372 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -40)))) 2373 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2374 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] 2375 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 2376 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), ret" 2377 1.1 mrg [(set_attr "type" "ldwm")]) 2378 1.1 mrg 2379 1.1 mrg (define_insn "*cdx_ldwm11_dec" 2380 1.1 mrg [(match_parallel 0 "ldwm_operation" 2381 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 2382 1.1 mrg (mem:SI (plus:SI (match_operand:SI 12 "register_operand" "r") (const_int -4)))) 2383 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2384 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -8)))) 2385 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2386 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -12)))) 2387 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2388 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -16)))) 2389 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2390 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -20)))) 2391 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2392 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -24)))) 2393 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2394 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -28)))) 2395 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2396 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -32)))) 2397 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2398 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -36)))) 2399 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2400 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -40)))) 2401 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2402 1.1 mrg (mem:SI (plus:SI (match_dup 12) (const_int -44))))])] 2403 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 2404 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12)" 2405 1.1 mrg [(set_attr "type" "ldwm")]) 2406 1.1 mrg 2407 1.1 mrg (define_insn "*cdx_ldwm12_inc_wb_ret" 2408 1.1 mrg [(match_parallel 0 "ldwm_operation" 2409 1.1 mrg [(return) 2410 1.1 mrg (set (match_operand:SI 13 "register_operand" "+&r") 2411 1.1 mrg (plus:SI (match_dup 13) (const_int 48))) 2412 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2413 1.1 mrg (mem:SI (match_dup 13))) 2414 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2415 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 4)))) 2416 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2417 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 8)))) 2418 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2419 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 12)))) 2420 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2421 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 16)))) 2422 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2423 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 20)))) 2424 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2425 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 24)))) 2426 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2427 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 28)))) 2428 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2429 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 32)))) 2430 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2431 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 36)))) 2432 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2433 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 40)))) 2434 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2435 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] 2436 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 14" 2437 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, writeback, ret" 2438 1.1 mrg [(set_attr "type" "ldwm")]) 2439 1.1 mrg 2440 1.1 mrg (define_insn "*cdx_ldwm12_inc_wb" 2441 1.1 mrg [(match_parallel 0 "ldwm_operation" 2442 1.1 mrg [(set (match_operand:SI 13 "register_operand" "+&r") 2443 1.1 mrg (plus:SI (match_dup 13) (const_int 48))) 2444 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2445 1.1 mrg (mem:SI (match_dup 13))) 2446 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2447 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 4)))) 2448 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2449 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 8)))) 2450 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2451 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 12)))) 2452 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2453 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 16)))) 2454 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2455 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 20)))) 2456 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2457 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 24)))) 2458 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2459 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 28)))) 2460 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2461 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 32)))) 2462 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2463 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 36)))) 2464 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2465 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 40)))) 2466 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2467 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] 2468 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 2469 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, writeback" 2470 1.1 mrg [(set_attr "type" "ldwm")]) 2471 1.1 mrg 2472 1.1 mrg (define_insn "*cdx_ldwm12_inc_ret" 2473 1.1 mrg [(match_parallel 0 "ldwm_operation" 2474 1.1 mrg [(return) 2475 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2476 1.1 mrg (mem:SI (match_operand:SI 13 "register_operand" "r"))) 2477 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2478 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 4)))) 2479 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2480 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 8)))) 2481 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2482 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 12)))) 2483 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2484 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 16)))) 2485 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2486 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 20)))) 2487 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2488 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 24)))) 2489 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2490 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 28)))) 2491 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2492 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 32)))) 2493 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2494 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 36)))) 2495 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2496 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 40)))) 2497 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2498 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] 2499 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 2500 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, ret" 2501 1.1 mrg [(set_attr "type" "ldwm")]) 2502 1.1 mrg 2503 1.1 mrg (define_insn "*cdx_ldwm12_inc" 2504 1.1 mrg [(match_parallel 0 "ldwm_operation" 2505 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 2506 1.1 mrg (mem:SI (match_operand:SI 13 "register_operand" "r"))) 2507 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2508 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 4)))) 2509 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2510 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 8)))) 2511 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2512 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 12)))) 2513 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2514 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 16)))) 2515 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2516 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 20)))) 2517 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2518 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 24)))) 2519 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2520 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 28)))) 2521 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2522 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 32)))) 2523 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2524 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 36)))) 2525 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2526 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 40)))) 2527 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2528 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int 44))))])] 2529 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 2530 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++" 2531 1.1 mrg [(set_attr "type" "ldwm")]) 2532 1.1 mrg 2533 1.1 mrg (define_insn "*cdx_ldwm12_dec_wb_ret" 2534 1.1 mrg [(match_parallel 0 "ldwm_operation" 2535 1.1 mrg [(return) 2536 1.1 mrg (set (match_operand:SI 13 "register_operand" "+&r") 2537 1.1 mrg (plus:SI (match_dup 13) (const_int -48))) 2538 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2539 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -4)))) 2540 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2541 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -8)))) 2542 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2543 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -12)))) 2544 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2545 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -16)))) 2546 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2547 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -20)))) 2548 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2549 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -24)))) 2550 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2551 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -28)))) 2552 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2553 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -32)))) 2554 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2555 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -36)))) 2556 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2557 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -40)))) 2558 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2559 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -44)))) 2560 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2561 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] 2562 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 14" 2563 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), writeback, ret" 2564 1.1 mrg [(set_attr "type" "ldwm")]) 2565 1.1 mrg 2566 1.1 mrg (define_insn "*cdx_ldwm12_dec_wb" 2567 1.1 mrg [(match_parallel 0 "ldwm_operation" 2568 1.1 mrg [(set (match_operand:SI 13 "register_operand" "+&r") 2569 1.1 mrg (plus:SI (match_dup 13) (const_int -48))) 2570 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2571 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -4)))) 2572 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2573 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -8)))) 2574 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2575 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -12)))) 2576 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2577 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -16)))) 2578 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2579 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -20)))) 2580 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2581 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -24)))) 2582 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2583 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -28)))) 2584 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2585 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -32)))) 2586 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2587 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -36)))) 2588 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2589 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -40)))) 2590 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2591 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -44)))) 2592 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2593 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] 2594 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 2595 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), writeback" 2596 1.1 mrg [(set_attr "type" "ldwm")]) 2597 1.1 mrg 2598 1.1 mrg (define_insn "*cdx_ldwm12_dec_ret" 2599 1.1 mrg [(match_parallel 0 "ldwm_operation" 2600 1.1 mrg [(return) 2601 1.1 mrg (set (match_operand:SI 1 "nios2_hard_register_operand" "") 2602 1.1 mrg (mem:SI (plus:SI (match_operand:SI 13 "register_operand" "r") (const_int -4)))) 2603 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2604 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -8)))) 2605 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2606 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -12)))) 2607 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2608 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -16)))) 2609 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2610 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -20)))) 2611 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2612 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -24)))) 2613 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2614 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -28)))) 2615 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2616 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -32)))) 2617 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2618 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -36)))) 2619 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2620 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -40)))) 2621 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2622 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -44)))) 2623 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2624 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] 2625 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 2626 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), ret" 2627 1.1 mrg [(set_attr "type" "ldwm")]) 2628 1.1 mrg 2629 1.1 mrg (define_insn "*cdx_ldwm12_dec" 2630 1.1 mrg [(match_parallel 0 "ldwm_operation" 2631 1.1 mrg [(set (match_operand:SI 1 "nios2_hard_register_operand" "") 2632 1.1 mrg (mem:SI (plus:SI (match_operand:SI 13 "register_operand" "r") (const_int -4)))) 2633 1.1 mrg (set (match_operand:SI 2 "nios2_hard_register_operand" "") 2634 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -8)))) 2635 1.1 mrg (set (match_operand:SI 3 "nios2_hard_register_operand" "") 2636 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -12)))) 2637 1.1 mrg (set (match_operand:SI 4 "nios2_hard_register_operand" "") 2638 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -16)))) 2639 1.1 mrg (set (match_operand:SI 5 "nios2_hard_register_operand" "") 2640 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -20)))) 2641 1.1 mrg (set (match_operand:SI 6 "nios2_hard_register_operand" "") 2642 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -24)))) 2643 1.1 mrg (set (match_operand:SI 7 "nios2_hard_register_operand" "") 2644 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -28)))) 2645 1.1 mrg (set (match_operand:SI 8 "nios2_hard_register_operand" "") 2646 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -32)))) 2647 1.1 mrg (set (match_operand:SI 9 "nios2_hard_register_operand" "") 2648 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -36)))) 2649 1.1 mrg (set (match_operand:SI 10 "nios2_hard_register_operand" "") 2650 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -40)))) 2651 1.1 mrg (set (match_operand:SI 11 "nios2_hard_register_operand" "") 2652 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -44)))) 2653 1.1 mrg (set (match_operand:SI 12 "nios2_hard_register_operand" "") 2654 1.1 mrg (mem:SI (plus:SI (match_dup 13) (const_int -48))))])] 2655 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 2656 1.1 mrg "ldwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13)" 2657 1.1 mrg [(set_attr "type" "ldwm")]) 2658 1.1 mrg 2659 1.1 mrg (define_insn "*cdx_stwm1_inc_wb" 2660 1.1 mrg [(match_parallel 0 "stwm_operation" 2661 1.1 mrg [(set (match_operand:SI 2 "register_operand" "+&r") 2662 1.1 mrg (plus:SI (match_dup 2) (const_int 4))) 2663 1.1 mrg (set (mem:SI (match_dup 2)) 2664 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" ""))])] 2665 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 2666 1.1 mrg "stwm\\t{%1}, (%2)++, writeback" 2667 1.1 mrg [(set_attr "type" "stwm")]) 2668 1.1 mrg 2669 1.1 mrg (define_insn "*cdx_stwm1_inc" 2670 1.1 mrg [(match_parallel 0 "stwm_operation" 2671 1.1 mrg [(set (mem:SI (match_operand:SI 2 "register_operand" "r")) 2672 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" ""))])] 2673 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" 2674 1.1 mrg "stwm\\t{%1}, (%2)++" 2675 1.1 mrg [(set_attr "type" "stwm")]) 2676 1.1 mrg 2677 1.1 mrg (define_insn "*cdx_stwm1_dec_wb" 2678 1.1 mrg [(match_parallel 0 "stwm_operation" 2679 1.1 mrg [(set (match_operand:SI 2 "register_operand" "+&r") 2680 1.1 mrg (plus:SI (match_dup 2) (const_int -4))) 2681 1.1 mrg (set (mem:SI (plus:SI (match_dup 2) (const_int -4))) 2682 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" ""))])] 2683 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 2684 1.1 mrg "stwm\\t{%1}, --(%2), writeback" 2685 1.1 mrg [(set_attr "type" "stwm")]) 2686 1.1 mrg 2687 1.1 mrg (define_insn "*cdx_stwm1_dec" 2688 1.1 mrg [(match_parallel 0 "stwm_operation" 2689 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 2 "register_operand" "r") (const_int -4))) 2690 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" ""))])] 2691 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 1" 2692 1.1 mrg "stwm\\t{%1}, --(%2)" 2693 1.1 mrg [(set_attr "type" "stwm")]) 2694 1.1 mrg 2695 1.1 mrg (define_insn "*cdx_stwm2_inc_wb" 2696 1.1 mrg [(match_parallel 0 "stwm_operation" 2697 1.1 mrg [(set (match_operand:SI 3 "register_operand" "+&r") 2698 1.1 mrg (plus:SI (match_dup 3) (const_int 8))) 2699 1.1 mrg (set (mem:SI (match_dup 3)) 2700 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2701 1.1 mrg (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) 2702 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" ""))])] 2703 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 2704 1.1 mrg "stwm\\t{%1, %2}, (%3)++, writeback" 2705 1.1 mrg [(set_attr "type" "stwm")]) 2706 1.1 mrg 2707 1.1 mrg (define_insn "*cdx_stwm2_inc" 2708 1.1 mrg [(match_parallel 0 "stwm_operation" 2709 1.1 mrg [(set (mem:SI (match_operand:SI 3 "register_operand" "r")) 2710 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2711 1.1 mrg (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) 2712 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" ""))])] 2713 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 2714 1.1 mrg "stwm\\t{%1, %2}, (%3)++" 2715 1.1 mrg [(set_attr "type" "stwm")]) 2716 1.1 mrg 2717 1.1 mrg (define_insn "*cdx_stwm2_dec_wb" 2718 1.1 mrg [(match_parallel 0 "stwm_operation" 2719 1.1 mrg [(set (match_operand:SI 3 "register_operand" "+&r") 2720 1.1 mrg (plus:SI (match_dup 3) (const_int -8))) 2721 1.1 mrg (set (mem:SI (plus:SI (match_dup 3) (const_int -4))) 2722 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2723 1.1 mrg (set (mem:SI (plus:SI (match_dup 3) (const_int -8))) 2724 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" ""))])] 2725 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 2726 1.1 mrg "stwm\\t{%1, %2}, --(%3), writeback" 2727 1.1 mrg [(set_attr "type" "stwm")]) 2728 1.1 mrg 2729 1.1 mrg (define_insn "*cdx_stwm2_dec" 2730 1.1 mrg [(match_parallel 0 "stwm_operation" 2731 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 3 "register_operand" "r") (const_int -4))) 2732 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2733 1.1 mrg (set (mem:SI (plus:SI (match_dup 3) (const_int -8))) 2734 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" ""))])] 2735 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 2" 2736 1.1 mrg "stwm\\t{%1, %2}, --(%3)" 2737 1.1 mrg [(set_attr "type" "stwm")]) 2738 1.1 mrg 2739 1.1 mrg (define_insn "*cdx_stwm3_inc_wb" 2740 1.1 mrg [(match_parallel 0 "stwm_operation" 2741 1.1 mrg [(set (match_operand:SI 4 "register_operand" "+&r") 2742 1.1 mrg (plus:SI (match_dup 4) (const_int 12))) 2743 1.1 mrg (set (mem:SI (match_dup 4)) 2744 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2745 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) 2746 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2747 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) 2748 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" ""))])] 2749 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 2750 1.1 mrg "stwm\\t{%1, %2, %3}, (%4)++, writeback" 2751 1.1 mrg [(set_attr "type" "stwm")]) 2752 1.1 mrg 2753 1.1 mrg (define_insn "*cdx_stwm3_inc" 2754 1.1 mrg [(match_parallel 0 "stwm_operation" 2755 1.1 mrg [(set (mem:SI (match_operand:SI 4 "register_operand" "r")) 2756 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2757 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) 2758 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2759 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) 2760 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" ""))])] 2761 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 2762 1.1 mrg "stwm\\t{%1, %2, %3}, (%4)++" 2763 1.1 mrg [(set_attr "type" "stwm")]) 2764 1.1 mrg 2765 1.1 mrg (define_insn "*cdx_stwm3_dec_wb" 2766 1.1 mrg [(match_parallel 0 "stwm_operation" 2767 1.1 mrg [(set (match_operand:SI 4 "register_operand" "+&r") 2768 1.1 mrg (plus:SI (match_dup 4) (const_int -12))) 2769 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int -4))) 2770 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2771 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int -8))) 2772 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2773 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int -12))) 2774 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" ""))])] 2775 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 2776 1.1 mrg "stwm\\t{%1, %2, %3}, --(%4), writeback" 2777 1.1 mrg [(set_attr "type" "stwm")]) 2778 1.1 mrg 2779 1.1 mrg (define_insn "*cdx_stwm3_dec" 2780 1.1 mrg [(match_parallel 0 "stwm_operation" 2781 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 4 "register_operand" "r") (const_int -4))) 2782 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2783 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int -8))) 2784 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2785 1.1 mrg (set (mem:SI (plus:SI (match_dup 4) (const_int -12))) 2786 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" ""))])] 2787 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 3" 2788 1.1 mrg "stwm\\t{%1, %2, %3}, --(%4)" 2789 1.1 mrg [(set_attr "type" "stwm")]) 2790 1.1 mrg 2791 1.1 mrg (define_insn "*cdx_stwm4_inc_wb" 2792 1.1 mrg [(match_parallel 0 "stwm_operation" 2793 1.1 mrg [(set (match_operand:SI 5 "register_operand" "+&r") 2794 1.1 mrg (plus:SI (match_dup 5) (const_int 16))) 2795 1.1 mrg (set (mem:SI (match_dup 5)) 2796 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2797 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) 2798 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2799 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) 2800 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2801 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) 2802 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" ""))])] 2803 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 2804 1.1 mrg "stwm\\t{%1, %2, %3, %4}, (%5)++, writeback" 2805 1.1 mrg [(set_attr "type" "stwm")]) 2806 1.1 mrg 2807 1.1 mrg (define_insn "*cdx_stwm4_inc" 2808 1.1 mrg [(match_parallel 0 "stwm_operation" 2809 1.1 mrg [(set (mem:SI (match_operand:SI 5 "register_operand" "r")) 2810 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2811 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) 2812 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2813 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) 2814 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2815 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) 2816 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" ""))])] 2817 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 2818 1.1 mrg "stwm\\t{%1, %2, %3, %4}, (%5)++" 2819 1.1 mrg [(set_attr "type" "stwm")]) 2820 1.1 mrg 2821 1.1 mrg (define_insn "*cdx_stwm4_dec_wb" 2822 1.1 mrg [(match_parallel 0 "stwm_operation" 2823 1.1 mrg [(set (match_operand:SI 5 "register_operand" "+&r") 2824 1.1 mrg (plus:SI (match_dup 5) (const_int -16))) 2825 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int -4))) 2826 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2827 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) 2828 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2829 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int -12))) 2830 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2831 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int -16))) 2832 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" ""))])] 2833 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 2834 1.1 mrg "stwm\\t{%1, %2, %3, %4}, --(%5), writeback" 2835 1.1 mrg [(set_attr "type" "stwm")]) 2836 1.1 mrg 2837 1.1 mrg (define_insn "*cdx_stwm4_dec" 2838 1.1 mrg [(match_parallel 0 "stwm_operation" 2839 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 5 "register_operand" "r") (const_int -4))) 2840 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2841 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) 2842 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2843 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int -12))) 2844 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2845 1.1 mrg (set (mem:SI (plus:SI (match_dup 5) (const_int -16))) 2846 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" ""))])] 2847 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 4" 2848 1.1 mrg "stwm\\t{%1, %2, %3, %4}, --(%5)" 2849 1.1 mrg [(set_attr "type" "stwm")]) 2850 1.1 mrg 2851 1.1 mrg (define_insn "*cdx_stwm5_inc_wb" 2852 1.1 mrg [(match_parallel 0 "stwm_operation" 2853 1.1 mrg [(set (match_operand:SI 6 "register_operand" "+&r") 2854 1.1 mrg (plus:SI (match_dup 6) (const_int 20))) 2855 1.1 mrg (set (mem:SI (match_dup 6)) 2856 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2857 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 4))) 2858 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2859 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 8))) 2860 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2861 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 12))) 2862 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2863 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 16))) 2864 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" ""))])] 2865 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 2866 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5}, (%6)++, writeback" 2867 1.1 mrg [(set_attr "type" "stwm")]) 2868 1.1 mrg 2869 1.1 mrg (define_insn "*cdx_stwm5_inc" 2870 1.1 mrg [(match_parallel 0 "stwm_operation" 2871 1.1 mrg [(set (mem:SI (match_operand:SI 6 "register_operand" "r")) 2872 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2873 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 4))) 2874 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2875 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 8))) 2876 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2877 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 12))) 2878 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2879 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int 16))) 2880 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" ""))])] 2881 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 2882 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5}, (%6)++" 2883 1.1 mrg [(set_attr "type" "stwm")]) 2884 1.1 mrg 2885 1.1 mrg (define_insn "*cdx_stwm5_dec_wb" 2886 1.1 mrg [(match_parallel 0 "stwm_operation" 2887 1.1 mrg [(set (match_operand:SI 6 "register_operand" "+&r") 2888 1.1 mrg (plus:SI (match_dup 6) (const_int -20))) 2889 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -4))) 2890 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2891 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -8))) 2892 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2893 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -12))) 2894 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2895 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -16))) 2896 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2897 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -20))) 2898 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" ""))])] 2899 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 2900 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5}, --(%6), writeback" 2901 1.1 mrg [(set_attr "type" "stwm")]) 2902 1.1 mrg 2903 1.1 mrg (define_insn "*cdx_stwm5_dec" 2904 1.1 mrg [(match_parallel 0 "stwm_operation" 2905 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 6 "register_operand" "r") (const_int -4))) 2906 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2907 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -8))) 2908 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2909 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -12))) 2910 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2911 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -16))) 2912 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2913 1.1 mrg (set (mem:SI (plus:SI (match_dup 6) (const_int -20))) 2914 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" ""))])] 2915 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 5" 2916 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5}, --(%6)" 2917 1.1 mrg [(set_attr "type" "stwm")]) 2918 1.1 mrg 2919 1.1 mrg (define_insn "*cdx_stwm6_inc_wb" 2920 1.1 mrg [(match_parallel 0 "stwm_operation" 2921 1.1 mrg [(set (match_operand:SI 7 "register_operand" "+&r") 2922 1.1 mrg (plus:SI (match_dup 7) (const_int 24))) 2923 1.1 mrg (set (mem:SI (match_dup 7)) 2924 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2925 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 4))) 2926 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2927 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 8))) 2928 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2929 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 12))) 2930 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2931 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 16))) 2932 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 2933 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 20))) 2934 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" ""))])] 2935 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 2936 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++, writeback" 2937 1.1 mrg [(set_attr "type" "stwm")]) 2938 1.1 mrg 2939 1.1 mrg (define_insn "*cdx_stwm6_inc" 2940 1.1 mrg [(match_parallel 0 "stwm_operation" 2941 1.1 mrg [(set (mem:SI (match_operand:SI 7 "register_operand" "r")) 2942 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2943 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 4))) 2944 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2945 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 8))) 2946 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2947 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 12))) 2948 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2949 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 16))) 2950 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 2951 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int 20))) 2952 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" ""))])] 2953 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 2954 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6}, (%7)++" 2955 1.1 mrg [(set_attr "type" "stwm")]) 2956 1.1 mrg 2957 1.1 mrg (define_insn "*cdx_stwm6_dec_wb" 2958 1.1 mrg [(match_parallel 0 "stwm_operation" 2959 1.1 mrg [(set (match_operand:SI 7 "register_operand" "+&r") 2960 1.1 mrg (plus:SI (match_dup 7) (const_int -24))) 2961 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -4))) 2962 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2963 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -8))) 2964 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2965 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -12))) 2966 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2967 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -16))) 2968 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2969 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -20))) 2970 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 2971 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -24))) 2972 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" ""))])] 2973 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 2974 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6}, --(%7), writeback" 2975 1.1 mrg [(set_attr "type" "stwm")]) 2976 1.1 mrg 2977 1.1 mrg (define_insn "*cdx_stwm6_dec" 2978 1.1 mrg [(match_parallel 0 "stwm_operation" 2979 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 7 "register_operand" "r") (const_int -4))) 2980 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 2981 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -8))) 2982 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 2983 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -12))) 2984 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 2985 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -16))) 2986 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 2987 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -20))) 2988 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 2989 1.1 mrg (set (mem:SI (plus:SI (match_dup 7) (const_int -24))) 2990 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" ""))])] 2991 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 6" 2992 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6}, --(%7)" 2993 1.1 mrg [(set_attr "type" "stwm")]) 2994 1.1 mrg 2995 1.1 mrg (define_insn "*cdx_stwm7_inc_wb" 2996 1.1 mrg [(match_parallel 0 "stwm_operation" 2997 1.1 mrg [(set (match_operand:SI 8 "register_operand" "+&r") 2998 1.1 mrg (plus:SI (match_dup 8) (const_int 28))) 2999 1.1 mrg (set (mem:SI (match_dup 8)) 3000 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3001 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 4))) 3002 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3003 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 8))) 3004 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3005 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 12))) 3006 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3007 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 16))) 3008 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3009 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 20))) 3010 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3011 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 24))) 3012 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" ""))])] 3013 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 3014 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++, writeback" 3015 1.1 mrg [(set_attr "type" "stwm")]) 3016 1.1 mrg 3017 1.1 mrg (define_insn "*cdx_stwm7_inc" 3018 1.1 mrg [(match_parallel 0 "stwm_operation" 3019 1.1 mrg [(set (mem:SI (match_operand:SI 8 "register_operand" "r")) 3020 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3021 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 4))) 3022 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3023 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 8))) 3024 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3025 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 12))) 3026 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3027 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 16))) 3028 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3029 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 20))) 3030 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3031 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int 24))) 3032 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" ""))])] 3033 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 3034 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, (%8)++" 3035 1.1 mrg [(set_attr "type" "stwm")]) 3036 1.1 mrg 3037 1.1 mrg (define_insn "*cdx_stwm7_dec_wb" 3038 1.1 mrg [(match_parallel 0 "stwm_operation" 3039 1.1 mrg [(set (match_operand:SI 8 "register_operand" "+&r") 3040 1.1 mrg (plus:SI (match_dup 8) (const_int -28))) 3041 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -4))) 3042 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3043 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -8))) 3044 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3045 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -12))) 3046 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3047 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -16))) 3048 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3049 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -20))) 3050 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3051 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -24))) 3052 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3053 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -28))) 3054 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" ""))])] 3055 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 3056 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8), writeback" 3057 1.1 mrg [(set_attr "type" "stwm")]) 3058 1.1 mrg 3059 1.1 mrg (define_insn "*cdx_stwm7_dec" 3060 1.1 mrg [(match_parallel 0 "stwm_operation" 3061 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 8 "register_operand" "r") (const_int -4))) 3062 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3063 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -8))) 3064 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3065 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -12))) 3066 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3067 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -16))) 3068 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3069 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -20))) 3070 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3071 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -24))) 3072 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3073 1.1 mrg (set (mem:SI (plus:SI (match_dup 8) (const_int -28))) 3074 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" ""))])] 3075 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 7" 3076 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7}, --(%8)" 3077 1.1 mrg [(set_attr "type" "stwm")]) 3078 1.1 mrg 3079 1.1 mrg (define_insn "*cdx_stwm8_inc_wb" 3080 1.1 mrg [(match_parallel 0 "stwm_operation" 3081 1.1 mrg [(set (match_operand:SI 9 "register_operand" "+&r") 3082 1.1 mrg (plus:SI (match_dup 9) (const_int 32))) 3083 1.1 mrg (set (mem:SI (match_dup 9)) 3084 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3085 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 4))) 3086 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3087 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 8))) 3088 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3089 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 12))) 3090 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3091 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 16))) 3092 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3093 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 20))) 3094 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3095 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 24))) 3096 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3097 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 28))) 3098 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" ""))])] 3099 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 3100 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++, writeback" 3101 1.1 mrg [(set_attr "type" "stwm")]) 3102 1.1 mrg 3103 1.1 mrg (define_insn "*cdx_stwm8_inc" 3104 1.1 mrg [(match_parallel 0 "stwm_operation" 3105 1.1 mrg [(set (mem:SI (match_operand:SI 9 "register_operand" "r")) 3106 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3107 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 4))) 3108 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3109 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 8))) 3110 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3111 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 12))) 3112 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3113 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 16))) 3114 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3115 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 20))) 3116 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3117 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 24))) 3118 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3119 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int 28))) 3120 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" ""))])] 3121 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 3122 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, (%9)++" 3123 1.1 mrg [(set_attr "type" "stwm")]) 3124 1.1 mrg 3125 1.1 mrg (define_insn "*cdx_stwm8_dec_wb" 3126 1.1 mrg [(match_parallel 0 "stwm_operation" 3127 1.1 mrg [(set (match_operand:SI 9 "register_operand" "+&r") 3128 1.1 mrg (plus:SI (match_dup 9) (const_int -32))) 3129 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -4))) 3130 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3131 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -8))) 3132 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3133 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -12))) 3134 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3135 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -16))) 3136 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3137 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -20))) 3138 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3139 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -24))) 3140 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3141 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -28))) 3142 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3143 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -32))) 3144 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" ""))])] 3145 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 3146 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9), writeback" 3147 1.1 mrg [(set_attr "type" "stwm")]) 3148 1.1 mrg 3149 1.1 mrg (define_insn "*cdx_stwm8_dec" 3150 1.1 mrg [(match_parallel 0 "stwm_operation" 3151 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 9 "register_operand" "r") (const_int -4))) 3152 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3153 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -8))) 3154 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3155 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -12))) 3156 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3157 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -16))) 3158 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3159 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -20))) 3160 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3161 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -24))) 3162 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3163 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -28))) 3164 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3165 1.1 mrg (set (mem:SI (plus:SI (match_dup 9) (const_int -32))) 3166 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" ""))])] 3167 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 8" 3168 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8}, --(%9)" 3169 1.1 mrg [(set_attr "type" "stwm")]) 3170 1.1 mrg 3171 1.1 mrg (define_insn "*cdx_stwm9_inc_wb" 3172 1.1 mrg [(match_parallel 0 "stwm_operation" 3173 1.1 mrg [(set (match_operand:SI 10 "register_operand" "+&r") 3174 1.1 mrg (plus:SI (match_dup 10) (const_int 36))) 3175 1.1 mrg (set (mem:SI (match_dup 10)) 3176 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3177 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 4))) 3178 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3179 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 8))) 3180 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3181 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 12))) 3182 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3183 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 16))) 3184 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3185 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 20))) 3186 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3187 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 24))) 3188 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3189 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 28))) 3190 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3191 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 32))) 3192 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" ""))])] 3193 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 3194 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++, writeback" 3195 1.1 mrg [(set_attr "type" "stwm")]) 3196 1.1 mrg 3197 1.1 mrg (define_insn "*cdx_stwm9_inc" 3198 1.1 mrg [(match_parallel 0 "stwm_operation" 3199 1.1 mrg [(set (mem:SI (match_operand:SI 10 "register_operand" "r")) 3200 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3201 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 4))) 3202 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3203 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 8))) 3204 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3205 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 12))) 3206 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3207 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 16))) 3208 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3209 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 20))) 3210 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3211 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 24))) 3212 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3213 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 28))) 3214 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3215 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int 32))) 3216 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" ""))])] 3217 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 3218 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, (%10)++" 3219 1.1 mrg [(set_attr "type" "stwm")]) 3220 1.1 mrg 3221 1.1 mrg (define_insn "*cdx_stwm9_dec_wb" 3222 1.1 mrg [(match_parallel 0 "stwm_operation" 3223 1.1 mrg [(set (match_operand:SI 10 "register_operand" "+&r") 3224 1.1 mrg (plus:SI (match_dup 10) (const_int -36))) 3225 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -4))) 3226 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3227 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -8))) 3228 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3229 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -12))) 3230 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3231 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -16))) 3232 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3233 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -20))) 3234 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3235 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -24))) 3236 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3237 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -28))) 3238 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3239 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -32))) 3240 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3241 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -36))) 3242 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" ""))])] 3243 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 3244 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10), writeback" 3245 1.1 mrg [(set_attr "type" "stwm")]) 3246 1.1 mrg 3247 1.1 mrg (define_insn "*cdx_stwm9_dec" 3248 1.1 mrg [(match_parallel 0 "stwm_operation" 3249 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 10 "register_operand" "r") (const_int -4))) 3250 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3251 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -8))) 3252 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3253 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -12))) 3254 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3255 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -16))) 3256 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3257 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -20))) 3258 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3259 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -24))) 3260 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3261 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -28))) 3262 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3263 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -32))) 3264 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3265 1.1 mrg (set (mem:SI (plus:SI (match_dup 10) (const_int -36))) 3266 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" ""))])] 3267 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 9" 3268 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9}, --(%10)" 3269 1.1 mrg [(set_attr "type" "stwm")]) 3270 1.1 mrg 3271 1.1 mrg (define_insn "*cdx_stwm10_inc_wb" 3272 1.1 mrg [(match_parallel 0 "stwm_operation" 3273 1.1 mrg [(set (match_operand:SI 11 "register_operand" "+&r") 3274 1.1 mrg (plus:SI (match_dup 11) (const_int 40))) 3275 1.1 mrg (set (mem:SI (match_dup 11)) 3276 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3277 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 4))) 3278 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3279 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 8))) 3280 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3281 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 12))) 3282 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3283 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 16))) 3284 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3285 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 20))) 3286 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3287 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 24))) 3288 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3289 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 28))) 3290 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3291 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 32))) 3292 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3293 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 36))) 3294 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" ""))])] 3295 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 3296 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++, writeback" 3297 1.1 mrg [(set_attr "type" "stwm")]) 3298 1.1 mrg 3299 1.1 mrg (define_insn "*cdx_stwm10_inc" 3300 1.1 mrg [(match_parallel 0 "stwm_operation" 3301 1.1 mrg [(set (mem:SI (match_operand:SI 11 "register_operand" "r")) 3302 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3303 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 4))) 3304 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3305 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 8))) 3306 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3307 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 12))) 3308 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3309 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 16))) 3310 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3311 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 20))) 3312 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3313 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 24))) 3314 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3315 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 28))) 3316 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3317 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 32))) 3318 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3319 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int 36))) 3320 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" ""))])] 3321 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 3322 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, (%11)++" 3323 1.1 mrg [(set_attr "type" "stwm")]) 3324 1.1 mrg 3325 1.1 mrg (define_insn "*cdx_stwm10_dec_wb" 3326 1.1 mrg [(match_parallel 0 "stwm_operation" 3327 1.1 mrg [(set (match_operand:SI 11 "register_operand" "+&r") 3328 1.1 mrg (plus:SI (match_dup 11) (const_int -40))) 3329 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -4))) 3330 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3331 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -8))) 3332 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3333 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -12))) 3334 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3335 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -16))) 3336 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3337 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -20))) 3338 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3339 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -24))) 3340 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3341 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -28))) 3342 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3343 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -32))) 3344 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3345 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -36))) 3346 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3347 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -40))) 3348 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" ""))])] 3349 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 3350 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11), writeback" 3351 1.1 mrg [(set_attr "type" "stwm")]) 3352 1.1 mrg 3353 1.1 mrg (define_insn "*cdx_stwm10_dec" 3354 1.1 mrg [(match_parallel 0 "stwm_operation" 3355 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 11 "register_operand" "r") (const_int -4))) 3356 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3357 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -8))) 3358 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3359 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -12))) 3360 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3361 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -16))) 3362 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3363 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -20))) 3364 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3365 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -24))) 3366 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3367 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -28))) 3368 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3369 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -32))) 3370 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3371 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -36))) 3372 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3373 1.1 mrg (set (mem:SI (plus:SI (match_dup 11) (const_int -40))) 3374 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" ""))])] 3375 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 10" 3376 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10}, --(%11)" 3377 1.1 mrg [(set_attr "type" "stwm")]) 3378 1.1 mrg 3379 1.1 mrg (define_insn "*cdx_stwm11_inc_wb" 3380 1.1 mrg [(match_parallel 0 "stwm_operation" 3381 1.1 mrg [(set (match_operand:SI 12 "register_operand" "+&r") 3382 1.1 mrg (plus:SI (match_dup 12) (const_int 44))) 3383 1.1 mrg (set (mem:SI (match_dup 12)) 3384 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3385 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 4))) 3386 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3387 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 8))) 3388 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3389 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 12))) 3390 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3391 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 16))) 3392 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3393 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 20))) 3394 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3395 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 24))) 3396 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3397 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 28))) 3398 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3399 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 32))) 3400 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3401 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 36))) 3402 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3403 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 40))) 3404 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" ""))])] 3405 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 3406 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++, writeback" 3407 1.1 mrg [(set_attr "type" "stwm")]) 3408 1.1 mrg 3409 1.1 mrg (define_insn "*cdx_stwm11_inc" 3410 1.1 mrg [(match_parallel 0 "stwm_operation" 3411 1.1 mrg [(set (mem:SI (match_operand:SI 12 "register_operand" "r")) 3412 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3413 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 4))) 3414 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3415 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 8))) 3416 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3417 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 12))) 3418 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3419 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 16))) 3420 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3421 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 20))) 3422 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3423 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 24))) 3424 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3425 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 28))) 3426 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3427 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 32))) 3428 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3429 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 36))) 3430 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3431 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int 40))) 3432 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" ""))])] 3433 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 3434 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, (%12)++" 3435 1.1 mrg [(set_attr "type" "stwm")]) 3436 1.1 mrg 3437 1.1 mrg (define_insn "*cdx_stwm11_dec_wb" 3438 1.1 mrg [(match_parallel 0 "stwm_operation" 3439 1.1 mrg [(set (match_operand:SI 12 "register_operand" "+&r") 3440 1.1 mrg (plus:SI (match_dup 12) (const_int -44))) 3441 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -4))) 3442 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3443 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -8))) 3444 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3445 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -12))) 3446 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3447 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -16))) 3448 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3449 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -20))) 3450 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3451 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -24))) 3452 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3453 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -28))) 3454 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3455 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -32))) 3456 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3457 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -36))) 3458 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3459 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -40))) 3460 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3461 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -44))) 3462 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" ""))])] 3463 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 3464 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12), writeback" 3465 1.1 mrg [(set_attr "type" "stwm")]) 3466 1.1 mrg 3467 1.1 mrg (define_insn "*cdx_stwm11_dec" 3468 1.1 mrg [(match_parallel 0 "stwm_operation" 3469 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 12 "register_operand" "r") (const_int -4))) 3470 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3471 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -8))) 3472 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3473 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -12))) 3474 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3475 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -16))) 3476 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3477 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -20))) 3478 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3479 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -24))) 3480 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3481 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -28))) 3482 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3483 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -32))) 3484 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3485 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -36))) 3486 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3487 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -40))) 3488 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3489 1.1 mrg (set (mem:SI (plus:SI (match_dup 12) (const_int -44))) 3490 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" ""))])] 3491 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 11" 3492 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11}, --(%12)" 3493 1.1 mrg [(set_attr "type" "stwm")]) 3494 1.1 mrg 3495 1.1 mrg (define_insn "*cdx_stwm12_inc_wb" 3496 1.1 mrg [(match_parallel 0 "stwm_operation" 3497 1.1 mrg [(set (match_operand:SI 13 "register_operand" "+&r") 3498 1.1 mrg (plus:SI (match_dup 13) (const_int 48))) 3499 1.1 mrg (set (mem:SI (match_dup 13)) 3500 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3501 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 4))) 3502 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3503 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 8))) 3504 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3505 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 12))) 3506 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3507 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 16))) 3508 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3509 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 20))) 3510 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3511 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 24))) 3512 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3513 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 28))) 3514 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3515 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 32))) 3516 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3517 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 36))) 3518 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3519 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 40))) 3520 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" "")) 3521 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 44))) 3522 1.1 mrg (match_operand:SI 12 "nios2_hard_register_operand" ""))])] 3523 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 3524 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++, writeback" 3525 1.1 mrg [(set_attr "type" "stwm")]) 3526 1.1 mrg 3527 1.1 mrg (define_insn "*cdx_stwm12_inc" 3528 1.1 mrg [(match_parallel 0 "stwm_operation" 3529 1.1 mrg [(set (mem:SI (match_operand:SI 13 "register_operand" "r")) 3530 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3531 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 4))) 3532 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3533 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 8))) 3534 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3535 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 12))) 3536 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3537 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 16))) 3538 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3539 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 20))) 3540 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3541 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 24))) 3542 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3543 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 28))) 3544 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3545 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 32))) 3546 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3547 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 36))) 3548 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3549 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 40))) 3550 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" "")) 3551 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int 44))) 3552 1.1 mrg (match_operand:SI 12 "nios2_hard_register_operand" ""))])] 3553 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 3554 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, (%13)++" 3555 1.1 mrg [(set_attr "type" "stwm")]) 3556 1.1 mrg 3557 1.1 mrg (define_insn "*cdx_stwm12_dec_wb" 3558 1.1 mrg [(match_parallel 0 "stwm_operation" 3559 1.1 mrg [(set (match_operand:SI 13 "register_operand" "+&r") 3560 1.1 mrg (plus:SI (match_dup 13) (const_int -48))) 3561 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -4))) 3562 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3563 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -8))) 3564 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3565 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -12))) 3566 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3567 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -16))) 3568 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3569 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -20))) 3570 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3571 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -24))) 3572 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3573 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -28))) 3574 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3575 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -32))) 3576 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3577 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -36))) 3578 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3579 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -40))) 3580 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3581 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -44))) 3582 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" "")) 3583 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -48))) 3584 1.1 mrg (match_operand:SI 12 "nios2_hard_register_operand" ""))])] 3585 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 13" 3586 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13), writeback" 3587 1.1 mrg [(set_attr "type" "stwm")]) 3588 1.1 mrg 3589 1.1 mrg (define_insn "*cdx_stwm12_dec" 3590 1.1 mrg [(match_parallel 0 "stwm_operation" 3591 1.1 mrg [(set (mem:SI (plus:SI (match_operand:SI 13 "register_operand" "r") (const_int -4))) 3592 1.1 mrg (match_operand:SI 1 "nios2_hard_register_operand" "")) 3593 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -8))) 3594 1.1 mrg (match_operand:SI 2 "nios2_hard_register_operand" "")) 3595 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -12))) 3596 1.1 mrg (match_operand:SI 3 "nios2_hard_register_operand" "")) 3597 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -16))) 3598 1.1 mrg (match_operand:SI 4 "nios2_hard_register_operand" "")) 3599 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -20))) 3600 1.1 mrg (match_operand:SI 5 "nios2_hard_register_operand" "")) 3601 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -24))) 3602 1.1 mrg (match_operand:SI 6 "nios2_hard_register_operand" "")) 3603 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -28))) 3604 1.1 mrg (match_operand:SI 7 "nios2_hard_register_operand" "")) 3605 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -32))) 3606 1.1 mrg (match_operand:SI 8 "nios2_hard_register_operand" "")) 3607 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -36))) 3608 1.1 mrg (match_operand:SI 9 "nios2_hard_register_operand" "")) 3609 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -40))) 3610 1.1 mrg (match_operand:SI 10 "nios2_hard_register_operand" "")) 3611 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -44))) 3612 1.1 mrg (match_operand:SI 11 "nios2_hard_register_operand" "")) 3613 1.1 mrg (set (mem:SI (plus:SI (match_dup 13) (const_int -48))) 3614 1.1 mrg (match_operand:SI 12 "nios2_hard_register_operand" ""))])] 3615 1.1 mrg "TARGET_HAS_CDX && XVECLEN (operands[0], 0) == 12" 3616 1.1 mrg "stwm\\t{%1, %2, %3, %4, %5, %6, %7, %8, %9, %10, %11, %12}, --(%13)" 3617 1.1 mrg [(set_attr "type" "stwm")]) 3618 1.1 mrg 3619 1.1 mrg (define_peephole2 3620 1.1 mrg [(match_scratch:SI 24 "r") 3621 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3622 1.1 mrg (match_operand:SI 12 "memory_operand" "")) 3623 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3624 1.1 mrg (match_operand:SI 13 "memory_operand" "")) 3625 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3626 1.1 mrg (match_operand:SI 14 "memory_operand" "")) 3627 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3628 1.1 mrg (match_operand:SI 15 "memory_operand" "")) 3629 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3630 1.1 mrg (match_operand:SI 16 "memory_operand" "")) 3631 1.1 mrg (set (match_operand:SI 5 "register_operand" "") 3632 1.1 mrg (match_operand:SI 17 "memory_operand" "")) 3633 1.1 mrg (set (match_operand:SI 6 "register_operand" "") 3634 1.1 mrg (match_operand:SI 18 "memory_operand" "")) 3635 1.1 mrg (set (match_operand:SI 7 "register_operand" "") 3636 1.1 mrg (match_operand:SI 19 "memory_operand" "")) 3637 1.1 mrg (set (match_operand:SI 8 "register_operand" "") 3638 1.1 mrg (match_operand:SI 20 "memory_operand" "")) 3639 1.1 mrg (set (match_operand:SI 9 "register_operand" "") 3640 1.1 mrg (match_operand:SI 21 "memory_operand" "")) 3641 1.1 mrg (set (match_operand:SI 10 "register_operand" "") 3642 1.1 mrg (match_operand:SI 22 "memory_operand" "")) 3643 1.1 mrg (set (match_operand:SI 11 "register_operand" "") 3644 1.1 mrg (match_operand:SI 23 "memory_operand" "")) 3645 1.1 mrg (match_dup 24)] 3646 1.1 mrg "TARGET_HAS_CDX" 3647 1.1 mrg [(const_int 0)] 3648 1.1 mrg { 3649 1.1 mrg if (gen_ldstwm_peep (true, 12, operands[24], operands)) 3650 1.1 mrg DONE; 3651 1.1 mrg else 3652 1.1 mrg FAIL; 3653 1.1 mrg }) 3654 1.1 mrg 3655 1.1 mrg (define_peephole2 3656 1.1 mrg [(match_scratch:SI 22 "r") 3657 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3658 1.1 mrg (match_operand:SI 11 "memory_operand" "")) 3659 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3660 1.1 mrg (match_operand:SI 12 "memory_operand" "")) 3661 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3662 1.1 mrg (match_operand:SI 13 "memory_operand" "")) 3663 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3664 1.1 mrg (match_operand:SI 14 "memory_operand" "")) 3665 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3666 1.1 mrg (match_operand:SI 15 "memory_operand" "")) 3667 1.1 mrg (set (match_operand:SI 5 "register_operand" "") 3668 1.1 mrg (match_operand:SI 16 "memory_operand" "")) 3669 1.1 mrg (set (match_operand:SI 6 "register_operand" "") 3670 1.1 mrg (match_operand:SI 17 "memory_operand" "")) 3671 1.1 mrg (set (match_operand:SI 7 "register_operand" "") 3672 1.1 mrg (match_operand:SI 18 "memory_operand" "")) 3673 1.1 mrg (set (match_operand:SI 8 "register_operand" "") 3674 1.1 mrg (match_operand:SI 19 "memory_operand" "")) 3675 1.1 mrg (set (match_operand:SI 9 "register_operand" "") 3676 1.1 mrg (match_operand:SI 20 "memory_operand" "")) 3677 1.1 mrg (set (match_operand:SI 10 "register_operand" "") 3678 1.1 mrg (match_operand:SI 21 "memory_operand" "")) 3679 1.1 mrg (match_dup 22)] 3680 1.1 mrg "TARGET_HAS_CDX" 3681 1.1 mrg [(const_int 0)] 3682 1.1 mrg { 3683 1.1 mrg if (gen_ldstwm_peep (true, 11, operands[22], operands)) 3684 1.1 mrg DONE; 3685 1.1 mrg else 3686 1.1 mrg FAIL; 3687 1.1 mrg }) 3688 1.1 mrg 3689 1.1 mrg (define_peephole2 3690 1.1 mrg [(match_scratch:SI 20 "r") 3691 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3692 1.1 mrg (match_operand:SI 10 "memory_operand" "")) 3693 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3694 1.1 mrg (match_operand:SI 11 "memory_operand" "")) 3695 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3696 1.1 mrg (match_operand:SI 12 "memory_operand" "")) 3697 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3698 1.1 mrg (match_operand:SI 13 "memory_operand" "")) 3699 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3700 1.1 mrg (match_operand:SI 14 "memory_operand" "")) 3701 1.1 mrg (set (match_operand:SI 5 "register_operand" "") 3702 1.1 mrg (match_operand:SI 15 "memory_operand" "")) 3703 1.1 mrg (set (match_operand:SI 6 "register_operand" "") 3704 1.1 mrg (match_operand:SI 16 "memory_operand" "")) 3705 1.1 mrg (set (match_operand:SI 7 "register_operand" "") 3706 1.1 mrg (match_operand:SI 17 "memory_operand" "")) 3707 1.1 mrg (set (match_operand:SI 8 "register_operand" "") 3708 1.1 mrg (match_operand:SI 18 "memory_operand" "")) 3709 1.1 mrg (set (match_operand:SI 9 "register_operand" "") 3710 1.1 mrg (match_operand:SI 19 "memory_operand" "")) 3711 1.1 mrg (match_dup 20)] 3712 1.1 mrg "TARGET_HAS_CDX" 3713 1.1 mrg [(const_int 0)] 3714 1.1 mrg { 3715 1.1 mrg if (gen_ldstwm_peep (true, 10, operands[20], operands)) 3716 1.1 mrg DONE; 3717 1.1 mrg else 3718 1.1 mrg FAIL; 3719 1.1 mrg }) 3720 1.1 mrg 3721 1.1 mrg (define_peephole2 3722 1.1 mrg [(match_scratch:SI 18 "r") 3723 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3724 1.1 mrg (match_operand:SI 9 "memory_operand" "")) 3725 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3726 1.1 mrg (match_operand:SI 10 "memory_operand" "")) 3727 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3728 1.1 mrg (match_operand:SI 11 "memory_operand" "")) 3729 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3730 1.1 mrg (match_operand:SI 12 "memory_operand" "")) 3731 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3732 1.1 mrg (match_operand:SI 13 "memory_operand" "")) 3733 1.1 mrg (set (match_operand:SI 5 "register_operand" "") 3734 1.1 mrg (match_operand:SI 14 "memory_operand" "")) 3735 1.1 mrg (set (match_operand:SI 6 "register_operand" "") 3736 1.1 mrg (match_operand:SI 15 "memory_operand" "")) 3737 1.1 mrg (set (match_operand:SI 7 "register_operand" "") 3738 1.1 mrg (match_operand:SI 16 "memory_operand" "")) 3739 1.1 mrg (set (match_operand:SI 8 "register_operand" "") 3740 1.1 mrg (match_operand:SI 17 "memory_operand" "")) 3741 1.1 mrg (match_dup 18)] 3742 1.1 mrg "TARGET_HAS_CDX" 3743 1.1 mrg [(const_int 0)] 3744 1.1 mrg { 3745 1.1 mrg if (gen_ldstwm_peep (true, 9, operands[18], operands)) 3746 1.1 mrg DONE; 3747 1.1 mrg else 3748 1.1 mrg FAIL; 3749 1.1 mrg }) 3750 1.1 mrg 3751 1.1 mrg (define_peephole2 3752 1.1 mrg [(match_scratch:SI 16 "r") 3753 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3754 1.1 mrg (match_operand:SI 8 "memory_operand" "")) 3755 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3756 1.1 mrg (match_operand:SI 9 "memory_operand" "")) 3757 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3758 1.1 mrg (match_operand:SI 10 "memory_operand" "")) 3759 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3760 1.1 mrg (match_operand:SI 11 "memory_operand" "")) 3761 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3762 1.1 mrg (match_operand:SI 12 "memory_operand" "")) 3763 1.1 mrg (set (match_operand:SI 5 "register_operand" "") 3764 1.1 mrg (match_operand:SI 13 "memory_operand" "")) 3765 1.1 mrg (set (match_operand:SI 6 "register_operand" "") 3766 1.1 mrg (match_operand:SI 14 "memory_operand" "")) 3767 1.1 mrg (set (match_operand:SI 7 "register_operand" "") 3768 1.1 mrg (match_operand:SI 15 "memory_operand" "")) 3769 1.1 mrg (match_dup 16)] 3770 1.1 mrg "TARGET_HAS_CDX" 3771 1.1 mrg [(const_int 0)] 3772 1.1 mrg { 3773 1.1 mrg if (gen_ldstwm_peep (true, 8, operands[16], operands)) 3774 1.1 mrg DONE; 3775 1.1 mrg else 3776 1.1 mrg FAIL; 3777 1.1 mrg }) 3778 1.1 mrg 3779 1.1 mrg (define_peephole2 3780 1.1 mrg [(match_scratch:SI 14 "r") 3781 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3782 1.1 mrg (match_operand:SI 7 "memory_operand" "")) 3783 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3784 1.1 mrg (match_operand:SI 8 "memory_operand" "")) 3785 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3786 1.1 mrg (match_operand:SI 9 "memory_operand" "")) 3787 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3788 1.1 mrg (match_operand:SI 10 "memory_operand" "")) 3789 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3790 1.1 mrg (match_operand:SI 11 "memory_operand" "")) 3791 1.1 mrg (set (match_operand:SI 5 "register_operand" "") 3792 1.1 mrg (match_operand:SI 12 "memory_operand" "")) 3793 1.1 mrg (set (match_operand:SI 6 "register_operand" "") 3794 1.1 mrg (match_operand:SI 13 "memory_operand" "")) 3795 1.1 mrg (match_dup 14)] 3796 1.1 mrg "TARGET_HAS_CDX" 3797 1.1 mrg [(const_int 0)] 3798 1.1 mrg { 3799 1.1 mrg if (gen_ldstwm_peep (true, 7, operands[14], operands)) 3800 1.1 mrg DONE; 3801 1.1 mrg else 3802 1.1 mrg FAIL; 3803 1.1 mrg }) 3804 1.1 mrg 3805 1.1 mrg (define_peephole2 3806 1.1 mrg [(match_scratch:SI 12 "r") 3807 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3808 1.1 mrg (match_operand:SI 6 "memory_operand" "")) 3809 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3810 1.1 mrg (match_operand:SI 7 "memory_operand" "")) 3811 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3812 1.1 mrg (match_operand:SI 8 "memory_operand" "")) 3813 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3814 1.1 mrg (match_operand:SI 9 "memory_operand" "")) 3815 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3816 1.1 mrg (match_operand:SI 10 "memory_operand" "")) 3817 1.1 mrg (set (match_operand:SI 5 "register_operand" "") 3818 1.1 mrg (match_operand:SI 11 "memory_operand" "")) 3819 1.1 mrg (match_dup 12)] 3820 1.1 mrg "TARGET_HAS_CDX" 3821 1.1 mrg [(const_int 0)] 3822 1.1 mrg { 3823 1.1 mrg if (gen_ldstwm_peep (true, 6, operands[12], operands)) 3824 1.1 mrg DONE; 3825 1.1 mrg else 3826 1.1 mrg FAIL; 3827 1.1 mrg }) 3828 1.1 mrg 3829 1.1 mrg (define_peephole2 3830 1.1 mrg [(match_scratch:SI 10 "r") 3831 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3832 1.1 mrg (match_operand:SI 5 "memory_operand" "")) 3833 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3834 1.1 mrg (match_operand:SI 6 "memory_operand" "")) 3835 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3836 1.1 mrg (match_operand:SI 7 "memory_operand" "")) 3837 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3838 1.1 mrg (match_operand:SI 8 "memory_operand" "")) 3839 1.1 mrg (set (match_operand:SI 4 "register_operand" "") 3840 1.1 mrg (match_operand:SI 9 "memory_operand" "")) 3841 1.1 mrg (match_dup 10)] 3842 1.1 mrg "TARGET_HAS_CDX" 3843 1.1 mrg [(const_int 0)] 3844 1.1 mrg { 3845 1.1 mrg if (gen_ldstwm_peep (true, 5, operands[10], operands)) 3846 1.1 mrg DONE; 3847 1.1 mrg else 3848 1.1 mrg FAIL; 3849 1.1 mrg }) 3850 1.1 mrg 3851 1.1 mrg (define_peephole2 3852 1.1 mrg [(match_scratch:SI 8 "r") 3853 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3854 1.1 mrg (match_operand:SI 4 "memory_operand" "")) 3855 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3856 1.1 mrg (match_operand:SI 5 "memory_operand" "")) 3857 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3858 1.1 mrg (match_operand:SI 6 "memory_operand" "")) 3859 1.1 mrg (set (match_operand:SI 3 "register_operand" "") 3860 1.1 mrg (match_operand:SI 7 "memory_operand" "")) 3861 1.1 mrg (match_dup 8)] 3862 1.1 mrg "TARGET_HAS_CDX" 3863 1.1 mrg [(const_int 0)] 3864 1.1 mrg { 3865 1.1 mrg if (gen_ldstwm_peep (true, 4, operands[8], operands)) 3866 1.1 mrg DONE; 3867 1.1 mrg else 3868 1.1 mrg FAIL; 3869 1.1 mrg }) 3870 1.1 mrg 3871 1.1 mrg (define_peephole2 3872 1.1 mrg [(match_scratch:SI 6 "r") 3873 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3874 1.1 mrg (match_operand:SI 3 "memory_operand" "")) 3875 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3876 1.1 mrg (match_operand:SI 4 "memory_operand" "")) 3877 1.1 mrg (set (match_operand:SI 2 "register_operand" "") 3878 1.1 mrg (match_operand:SI 5 "memory_operand" "")) 3879 1.1 mrg (match_dup 6)] 3880 1.1 mrg "TARGET_HAS_CDX" 3881 1.1 mrg [(const_int 0)] 3882 1.1 mrg { 3883 1.1 mrg if (gen_ldstwm_peep (true, 3, operands[6], operands)) 3884 1.1 mrg DONE; 3885 1.1 mrg else 3886 1.1 mrg FAIL; 3887 1.1 mrg }) 3888 1.1 mrg 3889 1.1 mrg (define_peephole2 3890 1.1 mrg [(match_scratch:SI 4 "r") 3891 1.1 mrg (set (match_operand:SI 0 "register_operand" "") 3892 1.1 mrg (match_operand:SI 2 "memory_operand" "")) 3893 1.1 mrg (set (match_operand:SI 1 "register_operand" "") 3894 1.1 mrg (match_operand:SI 3 "memory_operand" "")) 3895 1.1 mrg (match_dup 4)] 3896 1.1 mrg "TARGET_HAS_CDX" 3897 1.1 mrg [(const_int 0)] 3898 1.1 mrg { 3899 1.1 mrg if (gen_ldstwm_peep (true, 2, operands[4], operands)) 3900 1.1 mrg DONE; 3901 1.1 mrg else 3902 1.1 mrg FAIL; 3903 1.1 mrg }) 3904 1.1 mrg 3905 1.1 mrg (define_peephole2 3906 1.1 mrg [(match_scratch:SI 24 "r") 3907 1.1 mrg (set (match_operand:SI 12 "memory_operand" "") 3908 1.1 mrg (match_operand:SI 0 "register_operand" "")) 3909 1.1 mrg (set (match_operand:SI 13 "memory_operand" "") 3910 1.1 mrg (match_operand:SI 1 "register_operand" "")) 3911 1.1 mrg (set (match_operand:SI 14 "memory_operand" "") 3912 1.1 mrg (match_operand:SI 2 "register_operand" "")) 3913 1.1 mrg (set (match_operand:SI 15 "memory_operand" "") 3914 1.1 mrg (match_operand:SI 3 "register_operand" "")) 3915 1.1 mrg (set (match_operand:SI 16 "memory_operand" "") 3916 1.1 mrg (match_operand:SI 4 "register_operand" "")) 3917 1.1 mrg (set (match_operand:SI 17 "memory_operand" "") 3918 1.1 mrg (match_operand:SI 5 "register_operand" "")) 3919 1.1 mrg (set (match_operand:SI 18 "memory_operand" "") 3920 1.1 mrg (match_operand:SI 6 "register_operand" "")) 3921 1.1 mrg (set (match_operand:SI 19 "memory_operand" "") 3922 1.1 mrg (match_operand:SI 7 "register_operand" "")) 3923 1.1 mrg (set (match_operand:SI 20 "memory_operand" "") 3924 1.1 mrg (match_operand:SI 8 "register_operand" "")) 3925 1.1 mrg (set (match_operand:SI 21 "memory_operand" "") 3926 1.1 mrg (match_operand:SI 9 "register_operand" "")) 3927 1.1 mrg (set (match_operand:SI 22 "memory_operand" "") 3928 1.1 mrg (match_operand:SI 10 "register_operand" "")) 3929 1.1 mrg (set (match_operand:SI 23 "memory_operand" "") 3930 1.1 mrg (match_operand:SI 11 "register_operand" "")) 3931 1.1 mrg (match_dup 24)] 3932 1.1 mrg "TARGET_HAS_CDX" 3933 1.1 mrg [(const_int 0)] 3934 1.1 mrg { 3935 1.1 mrg if (gen_ldstwm_peep (false, 12, operands[24], operands)) 3936 1.1 mrg DONE; 3937 1.1 mrg else 3938 1.1 mrg FAIL; 3939 1.1 mrg }) 3940 1.1 mrg 3941 1.1 mrg (define_peephole2 3942 1.1 mrg [(match_scratch:SI 22 "r") 3943 1.1 mrg (set (match_operand:SI 11 "memory_operand" "") 3944 1.1 mrg (match_operand:SI 0 "register_operand" "")) 3945 1.1 mrg (set (match_operand:SI 12 "memory_operand" "") 3946 1.1 mrg (match_operand:SI 1 "register_operand" "")) 3947 1.1 mrg (set (match_operand:SI 13 "memory_operand" "") 3948 1.1 mrg (match_operand:SI 2 "register_operand" "")) 3949 1.1 mrg (set (match_operand:SI 14 "memory_operand" "") 3950 1.1 mrg (match_operand:SI 3 "register_operand" "")) 3951 1.1 mrg (set (match_operand:SI 15 "memory_operand" "") 3952 1.1 mrg (match_operand:SI 4 "register_operand" "")) 3953 1.1 mrg (set (match_operand:SI 16 "memory_operand" "") 3954 1.1 mrg (match_operand:SI 5 "register_operand" "")) 3955 1.1 mrg (set (match_operand:SI 17 "memory_operand" "") 3956 1.1 mrg (match_operand:SI 6 "register_operand" "")) 3957 1.1 mrg (set (match_operand:SI 18 "memory_operand" "") 3958 1.1 mrg (match_operand:SI 7 "register_operand" "")) 3959 1.1 mrg (set (match_operand:SI 19 "memory_operand" "") 3960 1.1 mrg (match_operand:SI 8 "register_operand" "")) 3961 1.1 mrg (set (match_operand:SI 20 "memory_operand" "") 3962 1.1 mrg (match_operand:SI 9 "register_operand" "")) 3963 1.1 mrg (set (match_operand:SI 21 "memory_operand" "") 3964 1.1 mrg (match_operand:SI 10 "register_operand" "")) 3965 1.1 mrg (match_dup 22)] 3966 1.1 mrg "TARGET_HAS_CDX" 3967 1.1 mrg [(const_int 0)] 3968 1.1 mrg { 3969 1.1 mrg if (gen_ldstwm_peep (false, 11, operands[22], operands)) 3970 1.1 mrg DONE; 3971 1.1 mrg else 3972 1.1 mrg FAIL; 3973 1.1 mrg }) 3974 1.1 mrg 3975 1.1 mrg (define_peephole2 3976 1.1 mrg [(match_scratch:SI 20 "r") 3977 1.1 mrg (set (match_operand:SI 10 "memory_operand" "") 3978 1.1 mrg (match_operand:SI 0 "register_operand" "")) 3979 1.1 mrg (set (match_operand:SI 11 "memory_operand" "") 3980 1.1 mrg (match_operand:SI 1 "register_operand" "")) 3981 1.1 mrg (set (match_operand:SI 12 "memory_operand" "") 3982 1.1 mrg (match_operand:SI 2 "register_operand" "")) 3983 1.1 mrg (set (match_operand:SI 13 "memory_operand" "") 3984 1.1 mrg (match_operand:SI 3 "register_operand" "")) 3985 1.1 mrg (set (match_operand:SI 14 "memory_operand" "") 3986 1.1 mrg (match_operand:SI 4 "register_operand" "")) 3987 1.1 mrg (set (match_operand:SI 15 "memory_operand" "") 3988 1.1 mrg (match_operand:SI 5 "register_operand" "")) 3989 1.1 mrg (set (match_operand:SI 16 "memory_operand" "") 3990 1.1 mrg (match_operand:SI 6 "register_operand" "")) 3991 1.1 mrg (set (match_operand:SI 17 "memory_operand" "") 3992 1.1 mrg (match_operand:SI 7 "register_operand" "")) 3993 1.1 mrg (set (match_operand:SI 18 "memory_operand" "") 3994 1.1 mrg (match_operand:SI 8 "register_operand" "")) 3995 1.1 mrg (set (match_operand:SI 19 "memory_operand" "") 3996 1.1 mrg (match_operand:SI 9 "register_operand" "")) 3997 1.1 mrg (match_dup 20)] 3998 1.1 mrg "TARGET_HAS_CDX" 3999 1.1 mrg [(const_int 0)] 4000 1.1 mrg { 4001 1.1 mrg if (gen_ldstwm_peep (false, 10, operands[20], operands)) 4002 1.1 mrg DONE; 4003 1.1 mrg else 4004 1.1 mrg FAIL; 4005 1.1 mrg }) 4006 1.1 mrg 4007 1.1 mrg (define_peephole2 4008 1.1 mrg [(match_scratch:SI 18 "r") 4009 1.1 mrg (set (match_operand:SI 9 "memory_operand" "") 4010 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4011 1.1 mrg (set (match_operand:SI 10 "memory_operand" "") 4012 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4013 1.1 mrg (set (match_operand:SI 11 "memory_operand" "") 4014 1.1 mrg (match_operand:SI 2 "register_operand" "")) 4015 1.1 mrg (set (match_operand:SI 12 "memory_operand" "") 4016 1.1 mrg (match_operand:SI 3 "register_operand" "")) 4017 1.1 mrg (set (match_operand:SI 13 "memory_operand" "") 4018 1.1 mrg (match_operand:SI 4 "register_operand" "")) 4019 1.1 mrg (set (match_operand:SI 14 "memory_operand" "") 4020 1.1 mrg (match_operand:SI 5 "register_operand" "")) 4021 1.1 mrg (set (match_operand:SI 15 "memory_operand" "") 4022 1.1 mrg (match_operand:SI 6 "register_operand" "")) 4023 1.1 mrg (set (match_operand:SI 16 "memory_operand" "") 4024 1.1 mrg (match_operand:SI 7 "register_operand" "")) 4025 1.1 mrg (set (match_operand:SI 17 "memory_operand" "") 4026 1.1 mrg (match_operand:SI 8 "register_operand" "")) 4027 1.1 mrg (match_dup 18)] 4028 1.1 mrg "TARGET_HAS_CDX" 4029 1.1 mrg [(const_int 0)] 4030 1.1 mrg { 4031 1.1 mrg if (gen_ldstwm_peep (false, 9, operands[18], operands)) 4032 1.1 mrg DONE; 4033 1.1 mrg else 4034 1.1 mrg FAIL; 4035 1.1 mrg }) 4036 1.1 mrg 4037 1.1 mrg (define_peephole2 4038 1.1 mrg [(match_scratch:SI 16 "r") 4039 1.1 mrg (set (match_operand:SI 8 "memory_operand" "") 4040 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4041 1.1 mrg (set (match_operand:SI 9 "memory_operand" "") 4042 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4043 1.1 mrg (set (match_operand:SI 10 "memory_operand" "") 4044 1.1 mrg (match_operand:SI 2 "register_operand" "")) 4045 1.1 mrg (set (match_operand:SI 11 "memory_operand" "") 4046 1.1 mrg (match_operand:SI 3 "register_operand" "")) 4047 1.1 mrg (set (match_operand:SI 12 "memory_operand" "") 4048 1.1 mrg (match_operand:SI 4 "register_operand" "")) 4049 1.1 mrg (set (match_operand:SI 13 "memory_operand" "") 4050 1.1 mrg (match_operand:SI 5 "register_operand" "")) 4051 1.1 mrg (set (match_operand:SI 14 "memory_operand" "") 4052 1.1 mrg (match_operand:SI 6 "register_operand" "")) 4053 1.1 mrg (set (match_operand:SI 15 "memory_operand" "") 4054 1.1 mrg (match_operand:SI 7 "register_operand" "")) 4055 1.1 mrg (match_dup 16)] 4056 1.1 mrg "TARGET_HAS_CDX" 4057 1.1 mrg [(const_int 0)] 4058 1.1 mrg { 4059 1.1 mrg if (gen_ldstwm_peep (false, 8, operands[16], operands)) 4060 1.1 mrg DONE; 4061 1.1 mrg else 4062 1.1 mrg FAIL; 4063 1.1 mrg }) 4064 1.1 mrg 4065 1.1 mrg (define_peephole2 4066 1.1 mrg [(match_scratch:SI 14 "r") 4067 1.1 mrg (set (match_operand:SI 7 "memory_operand" "") 4068 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4069 1.1 mrg (set (match_operand:SI 8 "memory_operand" "") 4070 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4071 1.1 mrg (set (match_operand:SI 9 "memory_operand" "") 4072 1.1 mrg (match_operand:SI 2 "register_operand" "")) 4073 1.1 mrg (set (match_operand:SI 10 "memory_operand" "") 4074 1.1 mrg (match_operand:SI 3 "register_operand" "")) 4075 1.1 mrg (set (match_operand:SI 11 "memory_operand" "") 4076 1.1 mrg (match_operand:SI 4 "register_operand" "")) 4077 1.1 mrg (set (match_operand:SI 12 "memory_operand" "") 4078 1.1 mrg (match_operand:SI 5 "register_operand" "")) 4079 1.1 mrg (set (match_operand:SI 13 "memory_operand" "") 4080 1.1 mrg (match_operand:SI 6 "register_operand" "")) 4081 1.1 mrg (match_dup 14)] 4082 1.1 mrg "TARGET_HAS_CDX" 4083 1.1 mrg [(const_int 0)] 4084 1.1 mrg { 4085 1.1 mrg if (gen_ldstwm_peep (false, 7, operands[14], operands)) 4086 1.1 mrg DONE; 4087 1.1 mrg else 4088 1.1 mrg FAIL; 4089 1.1 mrg }) 4090 1.1 mrg 4091 1.1 mrg (define_peephole2 4092 1.1 mrg [(match_scratch:SI 12 "r") 4093 1.1 mrg (set (match_operand:SI 6 "memory_operand" "") 4094 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4095 1.1 mrg (set (match_operand:SI 7 "memory_operand" "") 4096 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4097 1.1 mrg (set (match_operand:SI 8 "memory_operand" "") 4098 1.1 mrg (match_operand:SI 2 "register_operand" "")) 4099 1.1 mrg (set (match_operand:SI 9 "memory_operand" "") 4100 1.1 mrg (match_operand:SI 3 "register_operand" "")) 4101 1.1 mrg (set (match_operand:SI 10 "memory_operand" "") 4102 1.1 mrg (match_operand:SI 4 "register_operand" "")) 4103 1.1 mrg (set (match_operand:SI 11 "memory_operand" "") 4104 1.1 mrg (match_operand:SI 5 "register_operand" "")) 4105 1.1 mrg (match_dup 12)] 4106 1.1 mrg "TARGET_HAS_CDX" 4107 1.1 mrg [(const_int 0)] 4108 1.1 mrg { 4109 1.1 mrg if (gen_ldstwm_peep (false, 6, operands[12], operands)) 4110 1.1 mrg DONE; 4111 1.1 mrg else 4112 1.1 mrg FAIL; 4113 1.1 mrg }) 4114 1.1 mrg 4115 1.1 mrg (define_peephole2 4116 1.1 mrg [(match_scratch:SI 10 "r") 4117 1.1 mrg (set (match_operand:SI 5 "memory_operand" "") 4118 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4119 1.1 mrg (set (match_operand:SI 6 "memory_operand" "") 4120 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4121 1.1 mrg (set (match_operand:SI 7 "memory_operand" "") 4122 1.1 mrg (match_operand:SI 2 "register_operand" "")) 4123 1.1 mrg (set (match_operand:SI 8 "memory_operand" "") 4124 1.1 mrg (match_operand:SI 3 "register_operand" "")) 4125 1.1 mrg (set (match_operand:SI 9 "memory_operand" "") 4126 1.1 mrg (match_operand:SI 4 "register_operand" "")) 4127 1.1 mrg (match_dup 10)] 4128 1.1 mrg "TARGET_HAS_CDX" 4129 1.1 mrg [(const_int 0)] 4130 1.1 mrg { 4131 1.1 mrg if (gen_ldstwm_peep (false, 5, operands[10], operands)) 4132 1.1 mrg DONE; 4133 1.1 mrg else 4134 1.1 mrg FAIL; 4135 1.1 mrg }) 4136 1.1 mrg 4137 1.1 mrg (define_peephole2 4138 1.1 mrg [(match_scratch:SI 8 "r") 4139 1.1 mrg (set (match_operand:SI 4 "memory_operand" "") 4140 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4141 1.1 mrg (set (match_operand:SI 5 "memory_operand" "") 4142 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4143 1.1 mrg (set (match_operand:SI 6 "memory_operand" "") 4144 1.1 mrg (match_operand:SI 2 "register_operand" "")) 4145 1.1 mrg (set (match_operand:SI 7 "memory_operand" "") 4146 1.1 mrg (match_operand:SI 3 "register_operand" "")) 4147 1.1 mrg (match_dup 8)] 4148 1.1 mrg "TARGET_HAS_CDX" 4149 1.1 mrg [(const_int 0)] 4150 1.1 mrg { 4151 1.1 mrg if (gen_ldstwm_peep (false, 4, operands[8], operands)) 4152 1.1 mrg DONE; 4153 1.1 mrg else 4154 1.1 mrg FAIL; 4155 1.1 mrg }) 4156 1.1 mrg 4157 1.1 mrg (define_peephole2 4158 1.1 mrg [(match_scratch:SI 6 "r") 4159 1.1 mrg (set (match_operand:SI 3 "memory_operand" "") 4160 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4161 1.1 mrg (set (match_operand:SI 4 "memory_operand" "") 4162 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4163 1.1 mrg (set (match_operand:SI 5 "memory_operand" "") 4164 1.1 mrg (match_operand:SI 2 "register_operand" "")) 4165 1.1 mrg (match_dup 6)] 4166 1.1 mrg "TARGET_HAS_CDX" 4167 1.1 mrg [(const_int 0)] 4168 1.1 mrg { 4169 1.1 mrg if (gen_ldstwm_peep (false, 3, operands[6], operands)) 4170 1.1 mrg DONE; 4171 1.1 mrg else 4172 1.1 mrg FAIL; 4173 1.1 mrg }) 4174 1.1 mrg 4175 1.1 mrg (define_peephole2 4176 1.1 mrg [(match_scratch:SI 4 "r") 4177 1.1 mrg (set (match_operand:SI 2 "memory_operand" "") 4178 1.1 mrg (match_operand:SI 0 "register_operand" "")) 4179 1.1 mrg (set (match_operand:SI 3 "memory_operand" "") 4180 1.1 mrg (match_operand:SI 1 "register_operand" "")) 4181 1.1 mrg (match_dup 4)] 4182 1.1 mrg "TARGET_HAS_CDX" 4183 1.1 mrg [(const_int 0)] 4184 1.1 mrg { 4185 1.1 mrg if (gen_ldstwm_peep (false, 2, operands[4], operands)) 4186 1.1 mrg DONE; 4187 1.1 mrg else 4188 1.1 mrg FAIL; 4189 1.1 mrg }) 4190 1.1 mrg 4191
Indexes created Tue Apr 21 00:23:25 UTC 2026