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rl78-expand.md revision 1.1
      1 ;;  Machine Description for Renesas RL78 processors
      2 ;;  Copyright (C) 2011-2013 Free Software Foundation, Inc.
      3 ;;  Contributed by Red Hat.
      4 
      5 ;; This file is part of GCC.
      6 
      7 ;; GCC is free software; you can redistribute it and/or modify
      8 ;; it under the terms of the GNU General Public License as published by
      9 ;; the Free Software Foundation; either version 3, or (at your option)
     10 ;; any later version.
     11 
     12 ;; GCC is distributed in the hope that it will be useful,
     13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
     14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 ;; GNU General Public License for more details.
     16 
     17 ;; You should have received a copy of the GNU General Public License
     18 ;; along with GCC; see the file COPYING3.  If not see
     19 ;; <http://www.gnu.org/licenses/>.
     20 
     22 ;;---------- Moving ------------------------
     23 
     24 (define_expand "movqi"
     25   [(set (match_operand:QI 0 "nonimmediate_operand")
     26 	(match_operand:QI 1 "general_operand"))]
     27   ""
     28   {
     29     if (MEM_P (operand0) && MEM_P (operand1))
     30       operands[1] = copy_to_mode_reg (QImode, operand1);
     31     if (rl78_far_p (operand0) && rl78_far_p (operand1))
     32       operands[1] = copy_to_mode_reg (QImode, operand1);
     33 
     34     /* FIXME: Not sure how GCC can generate (SUBREG (SYMBOL_REF)),
     35        but it does.  Since this makes no sense, reject it here.  */
     36     if (GET_CODE (operand1) == SUBREG
     37         && GET_CODE (XEXP (operand1, 0)) == SYMBOL_REF)
     38       FAIL;
     39 
     40     if (CONST_INT_P (operand1) && ! IN_RANGE (INTVAL (operand1), (-1 << 8) + 1, (1 << 8) - 1))
     41       gcc_unreachable();
     42   }
     43 )
     44 
     45 (define_expand "movhi"
     46   [(set (match_operand:HI 0 "nonimmediate_operand")
     47 	(match_operand:HI 1 "general_operand"))]
     48   ""
     49   {
     50     if (MEM_P (operand0) && MEM_P (operand1))
     51       operands[1] = copy_to_mode_reg (HImode, operand1);
     52     if (rl78_far_p (operand0) && rl78_far_p (operand1))
     53       operands[1] = copy_to_mode_reg (HImode, operand1);
     54 
     55     /* FIXME: Not sure how GCC can generate (SUBREG (SYMBOL_REF)),
     56        but it does.  Since this makes no sense, reject it here.  */
     57     if (GET_CODE (operand1) == SUBREG
     58         && GET_CODE (XEXP (operand1, 0)) == SYMBOL_REF)
     59       FAIL;
     60   }
     61 )
     62 
     63 (define_expand "movsi"
     64   [(set (match_operand:SI 0 "nonimmediate_operand")
     65 	(match_operand:SI 1 "general_operand"))]
     66   ""
     67   {
     68     rl78_expand_movsi (operands);
     69     DONE;
     70   }
     71 )
     72 
     73 ;;---------- Conversions ------------------------
     74 
     75 (define_expand "zero_extendqihi2"
     76   [(set (match_operand:HI                 0 "nonimmediate_operand")
     77 	(zero_extend:HI (match_operand:QI 1 "general_operand")))]
     78   ""
     79   "if (rl78_force_nonfar_2 (operands, gen_zero_extendqihi2))
     80      DONE;"
     81   )
     82 
     83 (define_expand "extendqihi2"
     84   [(set (match_operand:HI                 0 "nonimmediate_operand")
     85 	(sign_extend:HI (match_operand:QI 1 "general_operand")))]
     86   ""
     87   "if (rl78_force_nonfar_2 (operands, gen_extendqihi2))
     88      DONE;"
     89   )
     90 
     91 ;;---------- Arithmetic ------------------------
     92 
     93 (define_expand "add<mode>3"
     94   [(set (match_operand:QHI           0 "nonimmediate_operand")
     95 	(plus:QHI (match_operand:QHI 1 "general_operand")
     96 		  (match_operand:QHI 2 "general_operand")))
     97    ]
     98   ""
     99   "if (rl78_force_nonfar_3 (operands, gen_add<mode>3))
    100      DONE;"
    101 )
    102 
    103 (define_expand "sub<mode>3"
    104   [(set (match_operand:QHI            0 "nonimmediate_operand")
    105 	(minus:QHI (match_operand:QHI 1 "general_operand")
    106 		   (match_operand:QHI 2 "general_operand")))
    107    ]
    108   ""
    109   "if (rl78_force_nonfar_3 (operands, gen_sub<mode>3))
    110      DONE;"
    111 )
    112 
    113 (define_expand "neg<mode>2"
    114   [(set (match_operand:QHI            0 "nonimmediate_operand")
    115 	(minus:QHI (const_int 0)
    116 		   (match_operand:QHI 1 "general_operand")))
    117    ]
    118   ""
    119   "if (rl78_force_nonfar_2 (operands, gen_neg<mode>2))
    120      DONE;"
    121 )
    122 
    123 (define_expand "umulqihi3"
    124   [(set (match_operand:HI 0 "register_operand")
    125         (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand"))
    126                  (zero_extend:HI (match_operand:QI 2 "register_operand"))))]
    127   ""
    128   ""
    129 )
    130 
    131 (define_expand "andqi3"
    132   [(set (match_operand:QI         0 "nonimmediate_operand")
    133 	(and:QI (match_operand:QI 1 "general_operand")
    134 		(match_operand:QI 2 "general_operand")))
    135    ]
    136   ""
    137   "if (rl78_force_nonfar_3 (operands, gen_andqi3))
    138      DONE;"
    139 )
    140 
    141 (define_expand "iorqi3"
    142   [(set (match_operand:QI         0 "nonimmediate_operand")
    143 	(ior:QI (match_operand:QI 1 "general_operand")
    144 		(match_operand:QI 2 "general_operand")))
    145    ]
    146   ""
    147   "if (rl78_force_nonfar_3 (operands, gen_iorqi3))
    148      DONE;"
    149 )
    150 
    151 (define_expand "xorqi3"
    152   [(set (match_operand:QI         0 "nonimmediate_operand")
    153 	(xor:QI (match_operand:QI 1 "general_operand")
    154 		(match_operand:QI 2 "general_operand")))
    155    ]
    156   ""
    157   "if (rl78_force_nonfar_3 (operands, gen_xorqi3))
    158      DONE;"
    159 )
    160 
    161 (define_expand "one_cmplqi2"
    162   [(set (match_operand:QI         0 "nonimmediate_operand")
    163 	(xor:QI (match_operand:QI 1 "general_operand")
    164 		(const_int 255)))
    165    ]
    166   ""
    167   "if (rl78_force_nonfar_2 (operands, gen_one_cmplqi2))
    168      DONE;"
    169 )
    170 
    171 ;;---------- Shifts ------------------------
    172 
    173 (define_expand "ashl<mode>3"
    174   [(set (match_operand:QHI             0 "nonimmediate_operand")
    175 	(ashift:QHI (match_operand:QHI 1 "general_operand")
    176 		    (match_operand:QI  2 "general_operand")))
    177    ]
    178   ""
    179   "if (rl78_force_nonfar_3 (operands, gen_ashl<mode>3))
    180      DONE;"
    181 )
    182 
    183 (define_expand "ashr<mode>3"
    184   [(set (match_operand:QHI               0 "nonimmediate_operand")
    185 	(ashiftrt:QHI (match_operand:QHI 1 "general_operand")
    186 		      (match_operand:QI  2 "general_operand")))
    187    ]
    188   ""
    189   "if (rl78_force_nonfar_3 (operands, gen_ashr<mode>3))
    190      DONE;"
    191 )
    192 
    193 (define_expand "lshr<mode>3"
    194   [(set (match_operand:QHI               0 "nonimmediate_operand")
    195 	(lshiftrt:QHI (match_operand:QHI 1 "general_operand")
    196 		      (match_operand:QI  2 "general_operand")))
    197    ]
    198   ""
    199   "if (rl78_force_nonfar_3 (operands, gen_lshr<mode>3))
    200      DONE;"
    201 )
    202 
    203 (define_expand "ashrsi3"
    204   [(set (match_operand:SI               0 "register_operand")
    205 	(ashiftrt:SI (match_operand:SI  1 "register_operand")
    206 		      (match_operand:SI 2 "immediate_operand")))
    207    ]
    208   ""
    209   "if (GET_CODE (operands[2]) != CONST_INT)
    210      FAIL;"
    211 )
    212 
    213 ;;---------- Branching ------------------------
    214 
    215 (define_expand "indirect_jump"
    216   [(set (pc)
    217 	(match_operand:HI 0 "nonimmediate_operand"))]
    218   ""
    219   ""
    220 )
    221 
    222 (define_expand "call"
    223   [(call (match_operand:HI 0 "memory_operand")
    224 	 (match_operand 1 ""))]
    225   ""
    226   ""
    227 )
    228 
    229 (define_expand "call_value"
    230   [(set (match_operand          0 "register_operand")
    231 	(call (match_operand:HI 1 "memory_operand")
    232 	      (match_operand    2 "")))]
    233   ""
    234   ""
    235 )
    236 
    237 (define_expand "cbranchqi4"
    238   [(set (pc) (if_then_else
    239 	      (match_operator                    0 "rl78_cmp_operator"
    240 			      [(match_operand:QI 1 "general_operand")
    241 			       (match_operand:QI 2 "general_operand")])
    242               (label_ref (match_operand 3 "" ""))
    243 	      (pc)))]
    244   ""
    245   "rl78_expand_compare (operands);"
    246 )
    247 
    248 (define_expand "cbranchhi4"
    249   [(set (pc) (if_then_else
    250 	      (match_operator                    0 "rl78_cmp_operator"
    251 			      [(match_operand:HI 1 "general_operand")
    252 			       (match_operand:HI 2 "general_operand")])
    253               (label_ref (match_operand 3 "" ""))
    254 	      (pc)))]
    255   ""
    256   "rl78_expand_compare (operands);"
    257 )
    258