htm.md revision 1.1.1.5 1 1.1 mrg ;; Hardware Transactional Memory (HTM) patterns.
2 1.1.1.5 mrg ;; Copyright (C) 2013-2018 Free Software Foundation, Inc.
3 1.1 mrg ;; Contributed by Peter Bergner <bergner (a] vnet.ibm.com>.
4 1.1 mrg
5 1.1 mrg ;; This file is part of GCC.
6 1.1 mrg
7 1.1 mrg ;; GCC is free software; you can redistribute it and/or modify it
8 1.1 mrg ;; under the terms of the GNU General Public License as published
9 1.1 mrg ;; by the Free Software Foundation; either version 3, or (at your
10 1.1 mrg ;; option) any later version.
11 1.1 mrg
12 1.1 mrg ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 1.1 mrg ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 1.1 mrg ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 1.1 mrg ;; License for more details.
16 1.1 mrg
17 1.1 mrg ;; You should have received a copy of the GNU General Public License
18 1.1 mrg ;; along with GCC; see the file COPYING3. If not see
19 1.1 mrg ;; <http://www.gnu.org/licenses/>.
20 1.1 mrg
21 1.1 mrg (define_constants
22 1.1 mrg [(TFHAR_SPR 128)
23 1.1 mrg (TFIAR_SPR 129)
24 1.1 mrg (TEXASR_SPR 130)
25 1.1 mrg (TEXASRU_SPR 131)
26 1.1 mrg (MAX_HTM_OPERANDS 4)
27 1.1 mrg ])
28 1.1 mrg
29 1.1 mrg ;;
30 1.1.1.2 mrg ;; UNSPEC usage
31 1.1.1.2 mrg ;;
32 1.1.1.2 mrg
33 1.1.1.2 mrg (define_c_enum "unspec"
34 1.1.1.2 mrg [UNSPEC_HTM_FENCE
35 1.1.1.2 mrg ])
36 1.1.1.2 mrg
37 1.1.1.2 mrg ;;
38 1.1 mrg ;; UNSPEC_VOLATILE usage
39 1.1 mrg ;;
40 1.1 mrg
41 1.1 mrg (define_c_enum "unspecv"
42 1.1 mrg [UNSPECV_HTM_TABORT
43 1.1 mrg UNSPECV_HTM_TABORTXC
44 1.1 mrg UNSPECV_HTM_TABORTXCI
45 1.1 mrg UNSPECV_HTM_TBEGIN
46 1.1 mrg UNSPECV_HTM_TCHECK
47 1.1 mrg UNSPECV_HTM_TEND
48 1.1 mrg UNSPECV_HTM_TRECHKPT
49 1.1 mrg UNSPECV_HTM_TRECLAIM
50 1.1 mrg UNSPECV_HTM_TSR
51 1.1 mrg UNSPECV_HTM_TTEST
52 1.1 mrg UNSPECV_HTM_MFSPR
53 1.1 mrg UNSPECV_HTM_MTSPR
54 1.1 mrg ])
55 1.1 mrg
56 1.1.1.2 mrg (define_expand "tabort"
57 1.1.1.2 mrg [(parallel
58 1.1.1.2 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
59 1.1.1.2 mrg (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
60 1.1.1.2 mrg UNSPECV_HTM_TABORT))
61 1.1.1.2 mrg (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
62 1.1.1.2 mrg "TARGET_HTM"
63 1.1.1.2 mrg {
64 1.1.1.2 mrg operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
65 1.1.1.2 mrg MEM_VOLATILE_P (operands[2]) = 1;
66 1.1.1.2 mrg })
67 1.1 mrg
68 1.1.1.2 mrg (define_insn "*tabort"
69 1.1 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
70 1.1.1.2 mrg (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
71 1.1.1.2 mrg UNSPECV_HTM_TABORT))
72 1.1.1.2 mrg (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
73 1.1 mrg "TARGET_HTM"
74 1.1 mrg "tabort. %0"
75 1.1.1.3 mrg [(set_attr "type" "htmsimple")
76 1.1 mrg (set_attr "length" "4")])
77 1.1 mrg
78 1.1.1.2 mrg (define_expand "tabort<wd>c"
79 1.1.1.2 mrg [(parallel
80 1.1.1.2 mrg [(set (match_operand:CC 3 "cc_reg_operand" "=x")
81 1.1.1.2 mrg (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
82 1.1.1.2 mrg (match_operand:GPR 1 "gpc_reg_operand" "r")
83 1.1.1.2 mrg (match_operand:GPR 2 "gpc_reg_operand" "r")]
84 1.1.1.2 mrg UNSPECV_HTM_TABORTXC))
85 1.1.1.2 mrg (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
86 1.1.1.2 mrg "TARGET_HTM"
87 1.1.1.2 mrg {
88 1.1.1.2 mrg operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
89 1.1.1.2 mrg MEM_VOLATILE_P (operands[4]) = 1;
90 1.1.1.2 mrg })
91 1.1.1.2 mrg
92 1.1.1.2 mrg (define_insn "*tabort<wd>c"
93 1.1 mrg [(set (match_operand:CC 3 "cc_reg_operand" "=x")
94 1.1 mrg (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
95 1.1 mrg (match_operand:GPR 1 "gpc_reg_operand" "r")
96 1.1 mrg (match_operand:GPR 2 "gpc_reg_operand" "r")]
97 1.1.1.2 mrg UNSPECV_HTM_TABORTXC))
98 1.1.1.2 mrg (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
99 1.1 mrg "TARGET_HTM"
100 1.1 mrg "tabort<wd>c. %0,%1,%2"
101 1.1.1.3 mrg [(set_attr "type" "htmsimple")
102 1.1 mrg (set_attr "length" "4")])
103 1.1 mrg
104 1.1.1.2 mrg (define_expand "tabort<wd>ci"
105 1.1.1.2 mrg [(parallel
106 1.1.1.2 mrg [(set (match_operand:CC 3 "cc_reg_operand" "=x")
107 1.1.1.2 mrg (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
108 1.1.1.2 mrg (match_operand:GPR 1 "gpc_reg_operand" "r")
109 1.1.1.2 mrg (match_operand 2 "s5bit_cint_operand" "n")]
110 1.1.1.2 mrg UNSPECV_HTM_TABORTXCI))
111 1.1.1.2 mrg (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
112 1.1.1.2 mrg "TARGET_HTM"
113 1.1.1.2 mrg {
114 1.1.1.2 mrg operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
115 1.1.1.2 mrg MEM_VOLATILE_P (operands[4]) = 1;
116 1.1.1.2 mrg })
117 1.1.1.2 mrg
118 1.1.1.2 mrg (define_insn "*tabort<wd>ci"
119 1.1 mrg [(set (match_operand:CC 3 "cc_reg_operand" "=x")
120 1.1 mrg (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
121 1.1 mrg (match_operand:GPR 1 "gpc_reg_operand" "r")
122 1.1 mrg (match_operand 2 "s5bit_cint_operand" "n")]
123 1.1.1.2 mrg UNSPECV_HTM_TABORTXCI))
124 1.1.1.2 mrg (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
125 1.1 mrg "TARGET_HTM"
126 1.1 mrg "tabort<wd>ci. %0,%1,%2"
127 1.1.1.3 mrg [(set_attr "type" "htmsimple")
128 1.1 mrg (set_attr "length" "4")])
129 1.1 mrg
130 1.1.1.2 mrg (define_expand "tbegin"
131 1.1.1.2 mrg [(parallel
132 1.1.1.2 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
133 1.1.1.2 mrg (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
134 1.1.1.2 mrg UNSPECV_HTM_TBEGIN))
135 1.1.1.2 mrg (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
136 1.1.1.2 mrg "TARGET_HTM"
137 1.1.1.2 mrg {
138 1.1.1.2 mrg operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
139 1.1.1.2 mrg MEM_VOLATILE_P (operands[2]) = 1;
140 1.1.1.2 mrg })
141 1.1.1.2 mrg
142 1.1.1.2 mrg (define_insn "*tbegin"
143 1.1 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
144 1.1 mrg (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
145 1.1.1.2 mrg UNSPECV_HTM_TBEGIN))
146 1.1.1.2 mrg (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
147 1.1 mrg "TARGET_HTM"
148 1.1 mrg "tbegin. %0"
149 1.1 mrg [(set_attr "type" "htm")
150 1.1 mrg (set_attr "length" "4")])
151 1.1 mrg
152 1.1.1.2 mrg (define_expand "tcheck"
153 1.1.1.2 mrg [(parallel
154 1.1.1.2 mrg [(set (match_operand:CC 0 "cc_reg_operand" "=y")
155 1.1.1.2 mrg (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
156 1.1.1.2 mrg (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
157 1.1.1.2 mrg "TARGET_HTM"
158 1.1.1.2 mrg {
159 1.1.1.2 mrg operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
160 1.1.1.2 mrg MEM_VOLATILE_P (operands[1]) = 1;
161 1.1.1.2 mrg })
162 1.1.1.2 mrg
163 1.1.1.2 mrg (define_insn "*tcheck"
164 1.1 mrg [(set (match_operand:CC 0 "cc_reg_operand" "=y")
165 1.1.1.2 mrg (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
166 1.1.1.2 mrg (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
167 1.1 mrg "TARGET_HTM"
168 1.1 mrg "tcheck %0"
169 1.1 mrg [(set_attr "type" "htm")
170 1.1 mrg (set_attr "length" "4")])
171 1.1 mrg
172 1.1.1.2 mrg (define_expand "tend"
173 1.1.1.2 mrg [(parallel
174 1.1.1.2 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
175 1.1.1.2 mrg (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
176 1.1.1.2 mrg UNSPECV_HTM_TEND))
177 1.1.1.2 mrg (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
178 1.1.1.2 mrg "TARGET_HTM"
179 1.1.1.2 mrg {
180 1.1.1.2 mrg operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
181 1.1.1.2 mrg MEM_VOLATILE_P (operands[2]) = 1;
182 1.1.1.2 mrg })
183 1.1.1.2 mrg
184 1.1.1.2 mrg (define_insn "*tend"
185 1.1 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
186 1.1 mrg (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
187 1.1.1.2 mrg UNSPECV_HTM_TEND))
188 1.1.1.2 mrg (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
189 1.1 mrg "TARGET_HTM"
190 1.1 mrg "tend. %0"
191 1.1 mrg [(set_attr "type" "htm")
192 1.1 mrg (set_attr "length" "4")])
193 1.1 mrg
194 1.1.1.2 mrg (define_expand "trechkpt"
195 1.1.1.2 mrg [(parallel
196 1.1.1.2 mrg [(set (match_operand:CC 0 "cc_reg_operand" "=x")
197 1.1.1.2 mrg (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
198 1.1.1.2 mrg (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
199 1.1.1.2 mrg "TARGET_HTM"
200 1.1.1.2 mrg {
201 1.1.1.2 mrg operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
202 1.1.1.2 mrg MEM_VOLATILE_P (operands[1]) = 1;
203 1.1.1.2 mrg })
204 1.1.1.2 mrg
205 1.1.1.2 mrg (define_insn "*trechkpt"
206 1.1 mrg [(set (match_operand:CC 0 "cc_reg_operand" "=x")
207 1.1.1.2 mrg (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
208 1.1.1.2 mrg (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
209 1.1 mrg "TARGET_HTM"
210 1.1 mrg "trechkpt."
211 1.1.1.3 mrg [(set_attr "type" "htmsimple")
212 1.1 mrg (set_attr "length" "4")])
213 1.1 mrg
214 1.1.1.2 mrg (define_expand "treclaim"
215 1.1.1.2 mrg [(parallel
216 1.1.1.2 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
217 1.1.1.2 mrg (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
218 1.1.1.2 mrg UNSPECV_HTM_TRECLAIM))
219 1.1.1.2 mrg (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
220 1.1.1.2 mrg "TARGET_HTM"
221 1.1.1.2 mrg {
222 1.1.1.2 mrg operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
223 1.1.1.2 mrg MEM_VOLATILE_P (operands[2]) = 1;
224 1.1.1.2 mrg })
225 1.1.1.2 mrg
226 1.1.1.2 mrg (define_insn "*treclaim"
227 1.1 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
228 1.1 mrg (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
229 1.1.1.2 mrg UNSPECV_HTM_TRECLAIM))
230 1.1.1.2 mrg (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
231 1.1 mrg "TARGET_HTM"
232 1.1 mrg "treclaim. %0"
233 1.1.1.3 mrg [(set_attr "type" "htmsimple")
234 1.1 mrg (set_attr "length" "4")])
235 1.1 mrg
236 1.1.1.2 mrg (define_expand "tsr"
237 1.1.1.2 mrg [(parallel
238 1.1.1.2 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
239 1.1.1.2 mrg (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
240 1.1.1.2 mrg UNSPECV_HTM_TSR))
241 1.1.1.2 mrg (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
242 1.1.1.2 mrg "TARGET_HTM"
243 1.1.1.2 mrg {
244 1.1.1.2 mrg operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
245 1.1.1.2 mrg MEM_VOLATILE_P (operands[2]) = 1;
246 1.1.1.2 mrg })
247 1.1.1.2 mrg
248 1.1.1.2 mrg (define_insn "*tsr"
249 1.1 mrg [(set (match_operand:CC 1 "cc_reg_operand" "=x")
250 1.1 mrg (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
251 1.1.1.2 mrg UNSPECV_HTM_TSR))
252 1.1.1.2 mrg (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
253 1.1 mrg "TARGET_HTM"
254 1.1 mrg "tsr. %0"
255 1.1.1.3 mrg [(set_attr "type" "htmsimple")
256 1.1 mrg (set_attr "length" "4")])
257 1.1 mrg
258 1.1.1.2 mrg (define_expand "ttest"
259 1.1.1.2 mrg [(parallel
260 1.1.1.2 mrg [(set (match_operand:CC 0 "cc_reg_operand" "=x")
261 1.1.1.2 mrg (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
262 1.1.1.2 mrg (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
263 1.1.1.2 mrg "TARGET_HTM"
264 1.1.1.2 mrg {
265 1.1.1.2 mrg operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
266 1.1.1.2 mrg MEM_VOLATILE_P (operands[1]) = 1;
267 1.1.1.2 mrg })
268 1.1.1.2 mrg
269 1.1.1.2 mrg (define_insn "*ttest"
270 1.1 mrg [(set (match_operand:CC 0 "cc_reg_operand" "=x")
271 1.1.1.2 mrg (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
272 1.1.1.2 mrg (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
273 1.1 mrg "TARGET_HTM"
274 1.1 mrg "tabortwci. 0,1,0"
275 1.1.1.3 mrg [(set_attr "type" "htmsimple")
276 1.1 mrg (set_attr "length" "4")])
277 1.1 mrg
278 1.1 mrg (define_insn "htm_mfspr_<mode>"
279 1.1 mrg [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
280 1.1 mrg (unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n")
281 1.1 mrg (match_operand:GPR 2 "htm_spr_reg_operand" "")]
282 1.1 mrg UNSPECV_HTM_MFSPR))]
283 1.1 mrg "TARGET_HTM"
284 1.1 mrg "mfspr %0,%1";
285 1.1 mrg [(set_attr "type" "htm")
286 1.1 mrg (set_attr "length" "4")])
287 1.1 mrg
288 1.1 mrg (define_insn "htm_mtspr_<mode>"
289 1.1 mrg [(set (match_operand:GPR 2 "htm_spr_reg_operand" "")
290 1.1 mrg (unspec_volatile:GPR [(match_operand:GPR 0 "gpc_reg_operand" "r")
291 1.1 mrg (match_operand 1 "u10bit_cint_operand" "n")]
292 1.1 mrg UNSPECV_HTM_MTSPR))]
293 1.1 mrg "TARGET_HTM"
294 1.1 mrg "mtspr %1,%0";
295 1.1 mrg [(set_attr "type" "htm")
296 1.1 mrg (set_attr "length" "4")])
297