Home | History | Annotate | Line # | Download | only in rs6000
htm.md revision 1.1.1.8
      1      1.1  mrg ;; Hardware Transactional Memory (HTM) patterns.
      2  1.1.1.8  mrg ;; Copyright (C) 2013-2022 Free Software Foundation, Inc.
      3      1.1  mrg ;; Contributed by Peter Bergner <bergner (a] vnet.ibm.com>.
      4      1.1  mrg 
      5      1.1  mrg ;; This file is part of GCC.
      6      1.1  mrg 
      7      1.1  mrg ;; GCC is free software; you can redistribute it and/or modify it
      8      1.1  mrg ;; under the terms of the GNU General Public License as published
      9      1.1  mrg ;; by the Free Software Foundation; either version 3, or (at your
     10      1.1  mrg ;; option) any later version.
     11      1.1  mrg 
     12      1.1  mrg ;; GCC is distributed in the hope that it will be useful, but WITHOUT
     13      1.1  mrg ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14      1.1  mrg ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
     15      1.1  mrg ;; License for more details.
     16      1.1  mrg 
     17      1.1  mrg ;; You should have received a copy of the GNU General Public License
     18      1.1  mrg ;; along with GCC; see the file COPYING3.  If not see
     19      1.1  mrg ;; <http://www.gnu.org/licenses/>.
     20      1.1  mrg 
     21      1.1  mrg (define_constants
     22      1.1  mrg   [(TFHAR_SPR		128)
     23      1.1  mrg    (TFIAR_SPR		129)
     24      1.1  mrg    (TEXASR_SPR		130)
     25      1.1  mrg    (TEXASRU_SPR		131)
     26      1.1  mrg    (MAX_HTM_OPERANDS	4)
     27      1.1  mrg   ])
     28      1.1  mrg 
     29      1.1  mrg ;;
     30  1.1.1.2  mrg ;; UNSPEC usage
     31  1.1.1.2  mrg ;;
     32  1.1.1.2  mrg 
     33  1.1.1.2  mrg (define_c_enum "unspec"
     34  1.1.1.2  mrg   [UNSPEC_HTM_FENCE
     35  1.1.1.2  mrg   ])
     36  1.1.1.2  mrg 
     37  1.1.1.2  mrg ;;
     38      1.1  mrg ;; UNSPEC_VOLATILE usage
     39      1.1  mrg ;;
     40      1.1  mrg 
     41      1.1  mrg (define_c_enum "unspecv"
     42      1.1  mrg   [UNSPECV_HTM_TABORT
     43      1.1  mrg    UNSPECV_HTM_TABORTXC
     44      1.1  mrg    UNSPECV_HTM_TABORTXCI
     45      1.1  mrg    UNSPECV_HTM_TBEGIN
     46      1.1  mrg    UNSPECV_HTM_TCHECK
     47      1.1  mrg    UNSPECV_HTM_TEND
     48      1.1  mrg    UNSPECV_HTM_TRECHKPT
     49      1.1  mrg    UNSPECV_HTM_TRECLAIM
     50      1.1  mrg    UNSPECV_HTM_TSR
     51      1.1  mrg    UNSPECV_HTM_TTEST
     52      1.1  mrg    UNSPECV_HTM_MFSPR
     53      1.1  mrg    UNSPECV_HTM_MTSPR
     54      1.1  mrg   ])
     55      1.1  mrg 
     56  1.1.1.2  mrg (define_expand "tabort"
     57  1.1.1.2  mrg   [(parallel
     58  1.1.1.2  mrg      [(set (match_operand:CC 1 "cc_reg_operand" "=x")
     59  1.1.1.2  mrg 	   (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
     60  1.1.1.2  mrg 			       UNSPECV_HTM_TABORT))
     61  1.1.1.2  mrg       (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
     62  1.1.1.2  mrg   "TARGET_HTM"
     63  1.1.1.2  mrg {
     64  1.1.1.2  mrg   operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
     65  1.1.1.2  mrg   MEM_VOLATILE_P (operands[2]) = 1;
     66  1.1.1.2  mrg })
     67      1.1  mrg 
     68  1.1.1.2  mrg (define_insn "*tabort"
     69      1.1  mrg   [(set (match_operand:CC 1 "cc_reg_operand" "=x")
     70  1.1.1.2  mrg 	(unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
     71  1.1.1.2  mrg 			    UNSPECV_HTM_TABORT))
     72  1.1.1.2  mrg    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
     73      1.1  mrg   "TARGET_HTM"
     74      1.1  mrg   "tabort. %0"
     75  1.1.1.6  mrg   [(set_attr "type" "htmsimple")])
     76      1.1  mrg 
     77  1.1.1.2  mrg (define_expand "tabort<wd>c"
     78  1.1.1.2  mrg   [(parallel
     79  1.1.1.2  mrg      [(set (match_operand:CC 3 "cc_reg_operand" "=x")
     80  1.1.1.2  mrg 	   (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
     81  1.1.1.2  mrg 				(match_operand:GPR 1 "gpc_reg_operand" "r")
     82  1.1.1.2  mrg 				(match_operand:GPR 2 "gpc_reg_operand" "r")]
     83  1.1.1.2  mrg 			       UNSPECV_HTM_TABORTXC))
     84  1.1.1.2  mrg       (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
     85  1.1.1.2  mrg   "TARGET_HTM"
     86  1.1.1.2  mrg {
     87  1.1.1.2  mrg   operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
     88  1.1.1.2  mrg   MEM_VOLATILE_P (operands[4]) = 1;
     89  1.1.1.2  mrg })
     90  1.1.1.2  mrg 
     91  1.1.1.2  mrg (define_insn "*tabort<wd>c"
     92      1.1  mrg   [(set (match_operand:CC 3 "cc_reg_operand" "=x")
     93      1.1  mrg 	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
     94      1.1  mrg 			     (match_operand:GPR 1 "gpc_reg_operand" "r")
     95      1.1  mrg 			     (match_operand:GPR 2 "gpc_reg_operand" "r")]
     96  1.1.1.2  mrg 			    UNSPECV_HTM_TABORTXC))
     97  1.1.1.2  mrg    (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
     98      1.1  mrg   "TARGET_HTM"
     99      1.1  mrg   "tabort<wd>c. %0,%1,%2"
    100  1.1.1.6  mrg   [(set_attr "type" "htmsimple")])
    101      1.1  mrg 
    102  1.1.1.2  mrg (define_expand "tabort<wd>ci"
    103  1.1.1.2  mrg   [(parallel
    104  1.1.1.2  mrg      [(set (match_operand:CC 3 "cc_reg_operand" "=x")
    105  1.1.1.2  mrg 	   (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
    106  1.1.1.2  mrg 				(match_operand:GPR 1 "gpc_reg_operand" "r")
    107  1.1.1.2  mrg 				(match_operand 2 "s5bit_cint_operand" "n")]
    108  1.1.1.2  mrg 			       UNSPECV_HTM_TABORTXCI))
    109  1.1.1.2  mrg       (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
    110  1.1.1.2  mrg   "TARGET_HTM"
    111  1.1.1.2  mrg {
    112  1.1.1.2  mrg   operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    113  1.1.1.2  mrg   MEM_VOLATILE_P (operands[4]) = 1;
    114  1.1.1.2  mrg })
    115  1.1.1.2  mrg 
    116  1.1.1.2  mrg (define_insn "*tabort<wd>ci"
    117      1.1  mrg   [(set (match_operand:CC 3 "cc_reg_operand" "=x")
    118      1.1  mrg 	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
    119      1.1  mrg 			     (match_operand:GPR 1 "gpc_reg_operand" "r")
    120      1.1  mrg 			     (match_operand 2 "s5bit_cint_operand" "n")]
    121  1.1.1.2  mrg 			    UNSPECV_HTM_TABORTXCI))
    122  1.1.1.2  mrg    (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
    123      1.1  mrg   "TARGET_HTM"
    124      1.1  mrg   "tabort<wd>ci. %0,%1,%2"
    125  1.1.1.6  mrg   [(set_attr "type" "htmsimple")])
    126      1.1  mrg 
    127  1.1.1.2  mrg (define_expand "tbegin"
    128  1.1.1.2  mrg   [(parallel
    129  1.1.1.2  mrg      [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    130  1.1.1.2  mrg 	   (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
    131  1.1.1.2  mrg 			       UNSPECV_HTM_TBEGIN))
    132  1.1.1.2  mrg       (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
    133  1.1.1.2  mrg   "TARGET_HTM"
    134  1.1.1.2  mrg {
    135  1.1.1.2  mrg   operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    136  1.1.1.2  mrg   MEM_VOLATILE_P (operands[2]) = 1;
    137  1.1.1.2  mrg })
    138  1.1.1.2  mrg 
    139  1.1.1.2  mrg (define_insn "*tbegin"
    140      1.1  mrg   [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    141      1.1  mrg 	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
    142  1.1.1.2  mrg 			    UNSPECV_HTM_TBEGIN))
    143  1.1.1.2  mrg    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
    144      1.1  mrg   "TARGET_HTM"
    145      1.1  mrg   "tbegin. %0"
    146  1.1.1.6  mrg   [(set_attr "type" "htm")])
    147      1.1  mrg 
    148  1.1.1.2  mrg (define_expand "tcheck"
    149  1.1.1.2  mrg   [(parallel
    150  1.1.1.2  mrg      [(set (match_operand:CC 0 "cc_reg_operand" "=y")
    151  1.1.1.2  mrg 	   (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
    152  1.1.1.2  mrg       (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
    153  1.1.1.2  mrg   "TARGET_HTM"
    154  1.1.1.2  mrg {
    155  1.1.1.2  mrg   operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    156  1.1.1.2  mrg   MEM_VOLATILE_P (operands[1]) = 1;
    157  1.1.1.2  mrg })
    158  1.1.1.2  mrg 
    159  1.1.1.2  mrg (define_insn "*tcheck"
    160      1.1  mrg   [(set (match_operand:CC 0 "cc_reg_operand" "=y")
    161  1.1.1.2  mrg 	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
    162  1.1.1.2  mrg    (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
    163      1.1  mrg   "TARGET_HTM"
    164      1.1  mrg   "tcheck %0"
    165  1.1.1.6  mrg   [(set_attr "type" "htm")])
    166      1.1  mrg 
    167  1.1.1.2  mrg (define_expand "tend"
    168  1.1.1.2  mrg   [(parallel
    169  1.1.1.2  mrg      [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    170  1.1.1.2  mrg 	   (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
    171  1.1.1.2  mrg 			       UNSPECV_HTM_TEND))
    172  1.1.1.2  mrg       (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
    173  1.1.1.2  mrg   "TARGET_HTM"
    174  1.1.1.2  mrg {
    175  1.1.1.2  mrg   operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    176  1.1.1.2  mrg   MEM_VOLATILE_P (operands[2]) = 1;
    177  1.1.1.2  mrg })
    178  1.1.1.2  mrg 
    179  1.1.1.2  mrg (define_insn "*tend"
    180      1.1  mrg   [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    181      1.1  mrg 	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
    182  1.1.1.2  mrg 			    UNSPECV_HTM_TEND))
    183  1.1.1.2  mrg    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
    184      1.1  mrg   "TARGET_HTM"
    185      1.1  mrg   "tend. %0"
    186  1.1.1.6  mrg   [(set_attr "type" "htm")])
    187      1.1  mrg 
    188  1.1.1.2  mrg (define_expand "trechkpt"
    189  1.1.1.2  mrg   [(parallel
    190  1.1.1.2  mrg      [(set (match_operand:CC 0 "cc_reg_operand" "=x")
    191  1.1.1.2  mrg 	   (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
    192  1.1.1.2  mrg       (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
    193  1.1.1.2  mrg   "TARGET_HTM"
    194  1.1.1.2  mrg {
    195  1.1.1.2  mrg   operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    196  1.1.1.2  mrg   MEM_VOLATILE_P (operands[1]) = 1;
    197  1.1.1.2  mrg })
    198  1.1.1.2  mrg 
    199  1.1.1.2  mrg (define_insn "*trechkpt"
    200      1.1  mrg   [(set (match_operand:CC 0 "cc_reg_operand" "=x")
    201  1.1.1.2  mrg 	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
    202  1.1.1.2  mrg    (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
    203      1.1  mrg   "TARGET_HTM"
    204      1.1  mrg   "trechkpt."
    205  1.1.1.6  mrg   [(set_attr "type" "htmsimple")])
    206      1.1  mrg 
    207  1.1.1.2  mrg (define_expand "treclaim"
    208  1.1.1.2  mrg   [(parallel
    209  1.1.1.2  mrg      [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    210  1.1.1.2  mrg 	   (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
    211  1.1.1.2  mrg 			       UNSPECV_HTM_TRECLAIM))
    212  1.1.1.2  mrg       (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
    213  1.1.1.2  mrg   "TARGET_HTM"
    214  1.1.1.2  mrg {
    215  1.1.1.2  mrg   operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    216  1.1.1.2  mrg   MEM_VOLATILE_P (operands[2]) = 1;
    217  1.1.1.2  mrg })
    218  1.1.1.2  mrg 
    219  1.1.1.2  mrg (define_insn "*treclaim"
    220      1.1  mrg   [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    221      1.1  mrg 	(unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
    222  1.1.1.2  mrg 			    UNSPECV_HTM_TRECLAIM))
    223  1.1.1.2  mrg    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
    224      1.1  mrg   "TARGET_HTM"
    225      1.1  mrg   "treclaim. %0"
    226  1.1.1.6  mrg   [(set_attr "type" "htmsimple")])
    227      1.1  mrg 
    228  1.1.1.2  mrg (define_expand "tsr"
    229  1.1.1.2  mrg   [(parallel
    230  1.1.1.2  mrg      [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    231  1.1.1.2  mrg 	   (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
    232  1.1.1.2  mrg 			       UNSPECV_HTM_TSR))
    233  1.1.1.2  mrg       (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
    234  1.1.1.2  mrg   "TARGET_HTM"
    235  1.1.1.2  mrg {
    236  1.1.1.2  mrg   operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    237  1.1.1.2  mrg   MEM_VOLATILE_P (operands[2]) = 1;
    238  1.1.1.2  mrg })
    239  1.1.1.2  mrg 
    240  1.1.1.2  mrg (define_insn "*tsr"
    241      1.1  mrg   [(set (match_operand:CC 1 "cc_reg_operand" "=x")
    242      1.1  mrg 	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
    243  1.1.1.2  mrg 			    UNSPECV_HTM_TSR))
    244  1.1.1.2  mrg    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
    245      1.1  mrg   "TARGET_HTM"
    246      1.1  mrg   "tsr. %0"
    247  1.1.1.6  mrg   [(set_attr "type" "htmsimple")])
    248      1.1  mrg 
    249  1.1.1.2  mrg (define_expand "ttest"
    250  1.1.1.2  mrg   [(parallel
    251  1.1.1.2  mrg      [(set (match_operand:CC 0 "cc_reg_operand" "=x")
    252  1.1.1.2  mrg 	   (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
    253  1.1.1.2  mrg       (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
    254  1.1.1.2  mrg   "TARGET_HTM"
    255  1.1.1.2  mrg {
    256  1.1.1.2  mrg   operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    257  1.1.1.2  mrg   MEM_VOLATILE_P (operands[1]) = 1;
    258  1.1.1.2  mrg })
    259  1.1.1.2  mrg 
    260  1.1.1.2  mrg (define_insn "*ttest"
    261      1.1  mrg   [(set (match_operand:CC 0 "cc_reg_operand" "=x")
    262  1.1.1.2  mrg 	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
    263  1.1.1.2  mrg    (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
    264      1.1  mrg   "TARGET_HTM"
    265      1.1  mrg   "tabortwci. 0,1,0"
    266  1.1.1.6  mrg   [(set_attr "type" "htmsimple")])
    267      1.1  mrg 
    268      1.1  mrg (define_insn "htm_mfspr_<mode>"
    269      1.1  mrg   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
    270  1.1.1.7  mrg         (unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n")]
    271      1.1  mrg 			     UNSPECV_HTM_MFSPR))]
    272      1.1  mrg   "TARGET_HTM"
    273      1.1  mrg   "mfspr %0,%1";
    274  1.1.1.6  mrg   [(set_attr "type" "htm")])
    275      1.1  mrg 
    276      1.1  mrg (define_insn "htm_mtspr_<mode>"
    277  1.1.1.7  mrg   [(unspec_volatile [(match_operand:GPR 0 "gpc_reg_operand" "r")
    278  1.1.1.7  mrg 		     (match_operand 1 "u10bit_cint_operand" "n")]
    279  1.1.1.7  mrg 		    UNSPECV_HTM_MTSPR)]
    280      1.1  mrg   "TARGET_HTM"
    281      1.1  mrg   "mtspr %1,%0";
    282  1.1.1.6  mrg   [(set_attr "type" "htm")])
    283