config/sparc/sparc-protos.h

1.1  mrg /* Prototypes of target machine for SPARC.
1.1  mrg    Copyright (C) 1999, 2000, 2003, 2004, 2005, 2007, 2008, 2009, 2010
1.1  mrg    Free Software Foundation, Inc.
1.1  mrg    Contributed by Michael Tiemann (tiemann (at) cygnus.com).
1.1  mrg    64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
1.1  mrg    at Cygnus Support.
1.1  mrg
1.1  mrg This file is part of GCC.
1.1  mrg
1.1  mrg GCC is free software; you can redistribute it and/or modify
1.1  mrg it under the terms of the GNU General Public License as published by
1.1  mrg the Free Software Foundation; either version 3, or (at your option)
1.1  mrg any later version.
1.1  mrg
1.1  mrg GCC is distributed in the hope that it will be useful,
1.1  mrg but WITHOUT ANY WARRANTY; without even the implied warranty of
1.1  mrg MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1.1  mrg GNU General Public License for more details.
1.1  mrg
1.1  mrg You should have received a copy of the GNU General Public License
1.1  mrg along with GCC; see the file COPYING3.  If not see
1.1  mrg <http://www.gnu.org/licenses/>.  */
1.1  mrg
1.1  mrg #ifndef __SPARC_PROTOS_H__
1.1  mrg #define __SPARC_PROTOS_H__
1.1  mrg
1.1  mrg #ifdef TREE_CODE
1.1  mrg extern struct rtx_def *function_value (const_tree, enum machine_mode, int);
1.1  mrg extern void function_arg_advance (CUMULATIVE_ARGS *,
1.1  mrg 				  enum machine_mode, tree, int);
1.1  mrg extern struct rtx_def *function_arg (const CUMULATIVE_ARGS *,
1.1  mrg 				     enum machine_mode, tree, int, int);
1.1  mrg #ifdef RTX_CODE
1.1  mrg extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
1.1  mrg #endif
1.1  mrg extern unsigned long sparc_type_code (tree);
1.1  mrg #ifdef ARGS_SIZE_RTX
1.1  mrg /* expr.h defines ARGS_SIZE_RTX and `enum direction' */
1.1  mrg extern enum direction function_arg_padding (enum machine_mode, const_tree);
1.1  mrg #endif /* ARGS_SIZE_RTX */
1.1  mrg #endif /* TREE_CODE */
1.1  mrg
1.1  mrg extern void order_regs_for_local_alloc (void);
1.1  mrg extern HOST_WIDE_INT sparc_compute_frame_size (HOST_WIDE_INT, int);
1.1  mrg extern void sparc_expand_prologue (void);
1.1  mrg extern void sparc_expand_epilogue (void);
1.1  mrg extern bool sparc_can_use_return_insn_p (void);
1.1  mrg extern int check_pic (int);
1.1  mrg extern int short_branch (int, int);
1.1  mrg extern void sparc_profile_hook (int);
1.1  mrg extern void sparc_optimization_options (int, int);
1.1  mrg extern void sparc_override_options (void);
1.1  mrg extern void sparc_output_scratch_registers (FILE *);
1.1  mrg
1.1  mrg #ifdef RTX_CODE
1.1  mrg extern enum machine_mode select_cc_mode (enum rtx_code, rtx, rtx);
1.1  mrg /* Define the function that build the compare insn for scc and bcc.  */
1.1  mrg extern rtx gen_compare_reg (rtx cmp);
1.1  mrg extern rtx sparc_emit_float_lib_cmp (rtx, rtx, enum rtx_code);
1.1  mrg extern void sparc_emit_floatunsdi (rtx [2], enum machine_mode);
1.1  mrg extern void sparc_emit_fixunsdi (rtx [2], enum machine_mode);
1.1  mrg extern void emit_tfmode_binop (enum rtx_code, rtx *);
1.1  mrg extern void emit_tfmode_unop (enum rtx_code, rtx *);
1.1  mrg extern void emit_tfmode_cvt (enum rtx_code, rtx *);
1.1  mrg extern bool legitimate_constant_p (rtx);
1.1  mrg extern bool constant_address_p (rtx);
1.1  mrg extern bool legitimate_pic_operand_p (rtx);
1.1  mrg extern void sparc_emit_call_insn (rtx, rtx);
1.1  mrg extern void sparc_defer_case_vector (rtx, rtx, int);
1.1  mrg extern bool sparc_expand_move (enum machine_mode, rtx *);
1.1  mrg extern void sparc_emit_set_const32 (rtx, rtx);
1.1  mrg extern void sparc_emit_set_const64 (rtx, rtx);
1.1  mrg extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx);
1.1  mrg extern int sparc_splitdi_legitimate (rtx, rtx);
1.1  mrg extern int sparc_absnegfloat_split_legitimate (rtx, rtx);
1.1  mrg extern const char *output_ubranch (rtx, int, rtx);
1.1  mrg extern const char *output_cbranch (rtx, rtx, int, int, int, rtx);
1.1  mrg extern const char *output_return (rtx);
1.1  mrg extern const char *output_sibcall (rtx, rtx);
1.1  mrg extern const char *output_v8plus_shift (rtx *, rtx, const char *);
1.1  mrg extern const char *output_v9branch (rtx, rtx, int, int, int, int, rtx);
1.1  mrg extern bool emit_scc_insn (rtx []);
1.1  mrg extern void emit_conditional_branch_insn (rtx []);
1.1  mrg extern void print_operand (FILE *, rtx, int);
1.1  mrg extern int mems_ok_for_ldd_peep (rtx, rtx, rtx);
1.1  mrg extern int arith_double_4096_operand (rtx, enum machine_mode);
1.1  mrg extern int arith_4096_operand (rtx, enum machine_mode);
1.1  mrg extern int zero_operand (rtx, enum machine_mode);
1.1  mrg extern int fp_zero_operand (rtx, enum machine_mode);
1.1  mrg extern int reg_or_0_operand (rtx, enum machine_mode);
1.1  mrg extern int empty_delay_slot (rtx);
1.1  mrg extern int eligible_for_return_delay (rtx);
1.1  mrg extern int eligible_for_sibcall_delay (rtx);
1.1  mrg extern int tls_call_delay (rtx);
1.1  mrg extern int emit_move_sequence (rtx, enum machine_mode);
1.1  mrg extern int fp_sethi_p (rtx);
1.1  mrg extern int fp_mov_p (rtx);
1.1  mrg extern int fp_high_losum_p (rtx);
1.1  mrg extern int mem_min_alignment (rtx, int);
1.1  mrg extern int pic_address_needs_scratch (rtx);
1.1  mrg extern int reg_unused_after (rtx, rtx);
1.1  mrg extern int register_ok_for_ldd (rtx);
1.1  mrg extern int memory_ok_for_ldd (rtx);
1.1  mrg extern int registers_ok_for_ldd_peep (rtx, rtx);
1.1  mrg extern int v9_regcmp_p (enum rtx_code);
1.1  mrg /* Function used for V8+ code generation.  Returns 1 if the high
1.1  mrg    32 bits of REG are 0 before INSN.  */
1.1  mrg extern int sparc_check_64 (rtx, rtx);
1.1  mrg extern rtx gen_df_reg (rtx, int);
1.1  mrg extern void sparc_expand_compare_and_swap_12 (rtx, rtx, rtx, rtx);
1.1  mrg #endif /* RTX_CODE */
1.1  mrg
1.1  mrg #endif /* __SPARC_PROTOS_H__ */