1 1.1 mrg /* Enum for builtin intrinsics for TILE-Gx. 2 1.10 mrg Copyright (C) 2011-2022 Free Software Foundation, Inc. 3 1.1 mrg Contributed by Walter Lee (walt (at) tilera.com) 4 1.1 mrg 5 1.1 mrg This file is part of GCC. 6 1.1 mrg 7 1.1 mrg GCC is free software; you can redistribute it and/or modify it 8 1.1 mrg under the terms of the GNU General Public License as published 9 1.1 mrg by the Free Software Foundation; either version 3, or (at your 10 1.1 mrg option) any later version. 11 1.1 mrg 12 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT 13 1.1 mrg ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 1.1 mrg or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 1.1 mrg License for more details. 16 1.1 mrg 17 1.1 mrg You should have received a copy of the GNU General Public License 18 1.1 mrg along with GCC; see the file COPYING3. If not see 19 1.1 mrg <http://www.gnu.org/licenses/>. */ 20 1.1 mrg 21 1.1 mrg #ifndef GCC_TILEGX_BUILTINS_H 22 1.1 mrg #define GCC_TILEGX_BUILTINS_H 23 1.1 mrg 24 1.1 mrg enum tilegx_builtin 25 1.1 mrg { 26 1.1 mrg TILEGX_INSN_ADD, 27 1.1 mrg TILEGX_INSN_ADDX, 28 1.1 mrg TILEGX_INSN_ADDXSC, 29 1.1 mrg TILEGX_INSN_AND, 30 1.1 mrg TILEGX_INSN_BFEXTS, 31 1.1 mrg TILEGX_INSN_BFEXTU, 32 1.1 mrg TILEGX_INSN_BFINS, 33 1.1 mrg TILEGX_INSN_CLZ, 34 1.1 mrg TILEGX_INSN_CMOVEQZ, 35 1.1 mrg TILEGX_INSN_CMOVNEZ, 36 1.1 mrg TILEGX_INSN_CMPEQ, 37 1.1 mrg TILEGX_INSN_CMPEXCH, 38 1.1 mrg TILEGX_INSN_CMPEXCH4, 39 1.1 mrg TILEGX_INSN_CMPLES, 40 1.1 mrg TILEGX_INSN_CMPLEU, 41 1.1 mrg TILEGX_INSN_CMPLTS, 42 1.1 mrg TILEGX_INSN_CMPLTU, 43 1.1 mrg TILEGX_INSN_CMPNE, 44 1.1 mrg TILEGX_INSN_CMUL, 45 1.1 mrg TILEGX_INSN_CMULA, 46 1.1 mrg TILEGX_INSN_CMULAF, 47 1.1 mrg TILEGX_INSN_CMULF, 48 1.1 mrg TILEGX_INSN_CMULFR, 49 1.1 mrg TILEGX_INSN_CMULH, 50 1.1 mrg TILEGX_INSN_CMULHR, 51 1.1 mrg TILEGX_INSN_CRC32_32, 52 1.1 mrg TILEGX_INSN_CRC32_8, 53 1.1 mrg TILEGX_INSN_CTZ, 54 1.1 mrg TILEGX_INSN_DBLALIGN, 55 1.1 mrg TILEGX_INSN_DBLALIGN2, 56 1.1 mrg TILEGX_INSN_DBLALIGN4, 57 1.1 mrg TILEGX_INSN_DBLALIGN6, 58 1.1 mrg TILEGX_INSN_DRAIN, 59 1.1 mrg TILEGX_INSN_DTLBPR, 60 1.1 mrg TILEGX_INSN_EXCH, 61 1.1 mrg TILEGX_INSN_EXCH4, 62 1.1 mrg TILEGX_INSN_FDOUBLE_ADD_FLAGS, 63 1.1 mrg TILEGX_INSN_FDOUBLE_ADDSUB, 64 1.1 mrg TILEGX_INSN_FDOUBLE_MUL_FLAGS, 65 1.1 mrg TILEGX_INSN_FDOUBLE_PACK1, 66 1.1 mrg TILEGX_INSN_FDOUBLE_PACK2, 67 1.1 mrg TILEGX_INSN_FDOUBLE_SUB_FLAGS, 68 1.1 mrg TILEGX_INSN_FDOUBLE_UNPACK_MAX, 69 1.1 mrg TILEGX_INSN_FDOUBLE_UNPACK_MIN, 70 1.1 mrg TILEGX_INSN_FETCHADD, 71 1.1 mrg TILEGX_INSN_FETCHADD4, 72 1.1 mrg TILEGX_INSN_FETCHADDGEZ, 73 1.1 mrg TILEGX_INSN_FETCHADDGEZ4, 74 1.1 mrg TILEGX_INSN_FETCHAND, 75 1.1 mrg TILEGX_INSN_FETCHAND4, 76 1.1 mrg TILEGX_INSN_FETCHOR, 77 1.1 mrg TILEGX_INSN_FETCHOR4, 78 1.1 mrg TILEGX_INSN_FINV, 79 1.1 mrg TILEGX_INSN_FLUSH, 80 1.1 mrg TILEGX_INSN_FLUSHWB, 81 1.1 mrg TILEGX_INSN_FNOP, 82 1.1 mrg TILEGX_INSN_FSINGLE_ADD1, 83 1.1 mrg TILEGX_INSN_FSINGLE_ADDSUB2, 84 1.1 mrg TILEGX_INSN_FSINGLE_MUL1, 85 1.1 mrg TILEGX_INSN_FSINGLE_MUL2, 86 1.1 mrg TILEGX_INSN_FSINGLE_PACK1, 87 1.1 mrg TILEGX_INSN_FSINGLE_PACK2, 88 1.1 mrg TILEGX_INSN_FSINGLE_SUB1, 89 1.1 mrg TILEGX_INSN_ICOH, 90 1.1 mrg TILEGX_INSN_ILL, 91 1.1 mrg TILEGX_INSN_INFO, 92 1.1 mrg TILEGX_INSN_INFOL, 93 1.1 mrg TILEGX_INSN_INV, 94 1.1 mrg TILEGX_INSN_LD, 95 1.1 mrg TILEGX_INSN_LD1S, 96 1.1 mrg TILEGX_INSN_LD1U, 97 1.1 mrg TILEGX_INSN_LD2S, 98 1.1 mrg TILEGX_INSN_LD2U, 99 1.1 mrg TILEGX_INSN_LD4S, 100 1.1 mrg TILEGX_INSN_LD4U, 101 1.1 mrg TILEGX_INSN_LDNA, 102 1.1 mrg TILEGX_INSN_LDNT, 103 1.1 mrg TILEGX_INSN_LDNT1S, 104 1.1 mrg TILEGX_INSN_LDNT1U, 105 1.1 mrg TILEGX_INSN_LDNT2S, 106 1.1 mrg TILEGX_INSN_LDNT2U, 107 1.1 mrg TILEGX_INSN_LDNT4S, 108 1.1 mrg TILEGX_INSN_LDNT4U, 109 1.1 mrg TILEGX_INSN_LD_L2, 110 1.1 mrg TILEGX_INSN_LD1S_L2, 111 1.1 mrg TILEGX_INSN_LD1U_L2, 112 1.1 mrg TILEGX_INSN_LD2S_L2, 113 1.1 mrg TILEGX_INSN_LD2U_L2, 114 1.1 mrg TILEGX_INSN_LD4S_L2, 115 1.1 mrg TILEGX_INSN_LD4U_L2, 116 1.1 mrg TILEGX_INSN_LDNA_L2, 117 1.1 mrg TILEGX_INSN_LDNT_L2, 118 1.1 mrg TILEGX_INSN_LDNT1S_L2, 119 1.1 mrg TILEGX_INSN_LDNT1U_L2, 120 1.1 mrg TILEGX_INSN_LDNT2S_L2, 121 1.1 mrg TILEGX_INSN_LDNT2U_L2, 122 1.1 mrg TILEGX_INSN_LDNT4S_L2, 123 1.1 mrg TILEGX_INSN_LDNT4U_L2, 124 1.1 mrg TILEGX_INSN_LD_MISS, 125 1.1 mrg TILEGX_INSN_LD1S_MISS, 126 1.1 mrg TILEGX_INSN_LD1U_MISS, 127 1.1 mrg TILEGX_INSN_LD2S_MISS, 128 1.1 mrg TILEGX_INSN_LD2U_MISS, 129 1.1 mrg TILEGX_INSN_LD4S_MISS, 130 1.1 mrg TILEGX_INSN_LD4U_MISS, 131 1.1 mrg TILEGX_INSN_LDNA_MISS, 132 1.1 mrg TILEGX_INSN_LDNT_MISS, 133 1.1 mrg TILEGX_INSN_LDNT1S_MISS, 134 1.1 mrg TILEGX_INSN_LDNT1U_MISS, 135 1.1 mrg TILEGX_INSN_LDNT2S_MISS, 136 1.1 mrg TILEGX_INSN_LDNT2U_MISS, 137 1.1 mrg TILEGX_INSN_LDNT4S_MISS, 138 1.1 mrg TILEGX_INSN_LDNT4U_MISS, 139 1.1 mrg TILEGX_INSN_LNK, 140 1.1 mrg TILEGX_INSN_MF, 141 1.1 mrg TILEGX_INSN_MFSPR, 142 1.1 mrg TILEGX_INSN_MM, 143 1.1 mrg TILEGX_INSN_MNZ, 144 1.1 mrg TILEGX_INSN_MOVE, 145 1.1 mrg TILEGX_INSN_MTSPR, 146 1.1 mrg TILEGX_INSN_MUL_HS_HS, 147 1.1 mrg TILEGX_INSN_MUL_HS_HU, 148 1.1 mrg TILEGX_INSN_MUL_HS_LS, 149 1.1 mrg TILEGX_INSN_MUL_HS_LU, 150 1.1 mrg TILEGX_INSN_MUL_HU_HU, 151 1.1 mrg TILEGX_INSN_MUL_HU_LS, 152 1.1 mrg TILEGX_INSN_MUL_HU_LU, 153 1.1 mrg TILEGX_INSN_MUL_LS_LS, 154 1.1 mrg TILEGX_INSN_MUL_LS_LU, 155 1.1 mrg TILEGX_INSN_MUL_LU_LU, 156 1.1 mrg TILEGX_INSN_MULA_HS_HS, 157 1.1 mrg TILEGX_INSN_MULA_HS_HU, 158 1.1 mrg TILEGX_INSN_MULA_HS_LS, 159 1.1 mrg TILEGX_INSN_MULA_HS_LU, 160 1.1 mrg TILEGX_INSN_MULA_HU_HU, 161 1.1 mrg TILEGX_INSN_MULA_HU_LS, 162 1.1 mrg TILEGX_INSN_MULA_HU_LU, 163 1.1 mrg TILEGX_INSN_MULA_LS_LS, 164 1.1 mrg TILEGX_INSN_MULA_LS_LU, 165 1.1 mrg TILEGX_INSN_MULA_LU_LU, 166 1.1 mrg TILEGX_INSN_MULAX, 167 1.1 mrg TILEGX_INSN_MULX, 168 1.1 mrg TILEGX_INSN_MZ, 169 1.1 mrg TILEGX_INSN_NAP, 170 1.1 mrg TILEGX_INSN_NOP, 171 1.1 mrg TILEGX_INSN_NOR, 172 1.1 mrg TILEGX_INSN_OR, 173 1.1 mrg TILEGX_INSN_PCNT, 174 1.1 mrg TILEGX_INSN_PREFETCH_L1, 175 1.1 mrg TILEGX_INSN_PREFETCH_L1_FAULT, 176 1.1 mrg TILEGX_INSN_PREFETCH_L2, 177 1.1 mrg TILEGX_INSN_PREFETCH_L2_FAULT, 178 1.1 mrg TILEGX_INSN_PREFETCH_L3, 179 1.1 mrg TILEGX_INSN_PREFETCH_L3_FAULT, 180 1.1 mrg TILEGX_INSN_REVBITS, 181 1.1 mrg TILEGX_INSN_REVBYTES, 182 1.1 mrg TILEGX_INSN_ROTL, 183 1.1 mrg TILEGX_INSN_SHL, 184 1.1 mrg TILEGX_INSN_SHL16INSLI, 185 1.1 mrg TILEGX_INSN_SHL1ADD, 186 1.1 mrg TILEGX_INSN_SHL1ADDX, 187 1.1 mrg TILEGX_INSN_SHL2ADD, 188 1.1 mrg TILEGX_INSN_SHL2ADDX, 189 1.1 mrg TILEGX_INSN_SHL3ADD, 190 1.1 mrg TILEGX_INSN_SHL3ADDX, 191 1.1 mrg TILEGX_INSN_SHLX, 192 1.1 mrg TILEGX_INSN_SHRS, 193 1.1 mrg TILEGX_INSN_SHRU, 194 1.1 mrg TILEGX_INSN_SHRUX, 195 1.1 mrg TILEGX_INSN_SHUFFLEBYTES, 196 1.1 mrg TILEGX_INSN_SHUFFLEBYTES1, 197 1.1 mrg TILEGX_INSN_ST, 198 1.1 mrg TILEGX_INSN_ST1, 199 1.1 mrg TILEGX_INSN_ST2, 200 1.1 mrg TILEGX_INSN_ST4, 201 1.1 mrg TILEGX_INSN_STNT, 202 1.1 mrg TILEGX_INSN_STNT1, 203 1.1 mrg TILEGX_INSN_STNT2, 204 1.1 mrg TILEGX_INSN_STNT4, 205 1.1 mrg TILEGX_INSN_SUB, 206 1.1 mrg TILEGX_INSN_SUBX, 207 1.1 mrg TILEGX_INSN_SUBXSC, 208 1.1 mrg TILEGX_INSN_TBLIDXB0, 209 1.1 mrg TILEGX_INSN_TBLIDXB1, 210 1.1 mrg TILEGX_INSN_TBLIDXB2, 211 1.1 mrg TILEGX_INSN_TBLIDXB3, 212 1.1 mrg TILEGX_INSN_V1ADD, 213 1.1 mrg TILEGX_INSN_V1ADDI, 214 1.1 mrg TILEGX_INSN_V1ADDUC, 215 1.1 mrg TILEGX_INSN_V1ADIFFU, 216 1.1 mrg TILEGX_INSN_V1AVGU, 217 1.1 mrg TILEGX_INSN_V1CMPEQ, 218 1.1 mrg TILEGX_INSN_V1CMPEQI, 219 1.1 mrg TILEGX_INSN_V1CMPLES, 220 1.1 mrg TILEGX_INSN_V1CMPLEU, 221 1.1 mrg TILEGX_INSN_V1CMPLTS, 222 1.1 mrg TILEGX_INSN_V1CMPLTSI, 223 1.1 mrg TILEGX_INSN_V1CMPLTU, 224 1.1 mrg TILEGX_INSN_V1CMPLTUI, 225 1.1 mrg TILEGX_INSN_V1CMPNE, 226 1.1 mrg TILEGX_INSN_V1DDOTPU, 227 1.1 mrg TILEGX_INSN_V1DDOTPUA, 228 1.1 mrg TILEGX_INSN_V1DDOTPUS, 229 1.1 mrg TILEGX_INSN_V1DDOTPUSA, 230 1.1 mrg TILEGX_INSN_V1DOTP, 231 1.1 mrg TILEGX_INSN_V1DOTPA, 232 1.1 mrg TILEGX_INSN_V1DOTPU, 233 1.1 mrg TILEGX_INSN_V1DOTPUA, 234 1.1 mrg TILEGX_INSN_V1DOTPUS, 235 1.1 mrg TILEGX_INSN_V1DOTPUSA, 236 1.1 mrg TILEGX_INSN_V1INT_H, 237 1.1 mrg TILEGX_INSN_V1INT_L, 238 1.1 mrg TILEGX_INSN_V1MAXU, 239 1.1 mrg TILEGX_INSN_V1MAXUI, 240 1.1 mrg TILEGX_INSN_V1MINU, 241 1.1 mrg TILEGX_INSN_V1MINUI, 242 1.1 mrg TILEGX_INSN_V1MNZ, 243 1.1 mrg TILEGX_INSN_V1MULTU, 244 1.1 mrg TILEGX_INSN_V1MULU, 245 1.1 mrg TILEGX_INSN_V1MULUS, 246 1.1 mrg TILEGX_INSN_V1MZ, 247 1.1 mrg TILEGX_INSN_V1SADAU, 248 1.1 mrg TILEGX_INSN_V1SADU, 249 1.1 mrg TILEGX_INSN_V1SHL, 250 1.1 mrg TILEGX_INSN_V1SHLI, 251 1.1 mrg TILEGX_INSN_V1SHRS, 252 1.1 mrg TILEGX_INSN_V1SHRSI, 253 1.1 mrg TILEGX_INSN_V1SHRU, 254 1.1 mrg TILEGX_INSN_V1SHRUI, 255 1.1 mrg TILEGX_INSN_V1SUB, 256 1.1 mrg TILEGX_INSN_V1SUBUC, 257 1.1 mrg TILEGX_INSN_V2ADD, 258 1.1 mrg TILEGX_INSN_V2ADDI, 259 1.1 mrg TILEGX_INSN_V2ADDSC, 260 1.1 mrg TILEGX_INSN_V2ADIFFS, 261 1.1 mrg TILEGX_INSN_V2AVGS, 262 1.1 mrg TILEGX_INSN_V2CMPEQ, 263 1.1 mrg TILEGX_INSN_V2CMPEQI, 264 1.1 mrg TILEGX_INSN_V2CMPLES, 265 1.1 mrg TILEGX_INSN_V2CMPLEU, 266 1.1 mrg TILEGX_INSN_V2CMPLTS, 267 1.1 mrg TILEGX_INSN_V2CMPLTSI, 268 1.1 mrg TILEGX_INSN_V2CMPLTU, 269 1.1 mrg TILEGX_INSN_V2CMPLTUI, 270 1.1 mrg TILEGX_INSN_V2CMPNE, 271 1.1 mrg TILEGX_INSN_V2DOTP, 272 1.1 mrg TILEGX_INSN_V2DOTPA, 273 1.1 mrg TILEGX_INSN_V2INT_H, 274 1.1 mrg TILEGX_INSN_V2INT_L, 275 1.1 mrg TILEGX_INSN_V2MAXS, 276 1.1 mrg TILEGX_INSN_V2MAXSI, 277 1.1 mrg TILEGX_INSN_V2MINS, 278 1.1 mrg TILEGX_INSN_V2MINSI, 279 1.1 mrg TILEGX_INSN_V2MNZ, 280 1.1 mrg TILEGX_INSN_V2MULFSC, 281 1.1 mrg TILEGX_INSN_V2MULS, 282 1.1 mrg TILEGX_INSN_V2MULTS, 283 1.1 mrg TILEGX_INSN_V2MZ, 284 1.1 mrg TILEGX_INSN_V2PACKH, 285 1.1 mrg TILEGX_INSN_V2PACKL, 286 1.1 mrg TILEGX_INSN_V2PACKUC, 287 1.1 mrg TILEGX_INSN_V2SADAS, 288 1.1 mrg TILEGX_INSN_V2SADAU, 289 1.1 mrg TILEGX_INSN_V2SADS, 290 1.1 mrg TILEGX_INSN_V2SADU, 291 1.1 mrg TILEGX_INSN_V2SHL, 292 1.1 mrg TILEGX_INSN_V2SHLI, 293 1.1 mrg TILEGX_INSN_V2SHLSC, 294 1.1 mrg TILEGX_INSN_V2SHRS, 295 1.1 mrg TILEGX_INSN_V2SHRSI, 296 1.1 mrg TILEGX_INSN_V2SHRU, 297 1.1 mrg TILEGX_INSN_V2SHRUI, 298 1.1 mrg TILEGX_INSN_V2SUB, 299 1.1 mrg TILEGX_INSN_V2SUBSC, 300 1.1 mrg TILEGX_INSN_V4ADD, 301 1.1 mrg TILEGX_INSN_V4ADDSC, 302 1.1 mrg TILEGX_INSN_V4INT_H, 303 1.1 mrg TILEGX_INSN_V4INT_L, 304 1.1 mrg TILEGX_INSN_V4PACKSC, 305 1.1 mrg TILEGX_INSN_V4SHL, 306 1.1 mrg TILEGX_INSN_V4SHLSC, 307 1.1 mrg TILEGX_INSN_V4SHRS, 308 1.1 mrg TILEGX_INSN_V4SHRU, 309 1.1 mrg TILEGX_INSN_V4SUB, 310 1.1 mrg TILEGX_INSN_V4SUBSC, 311 1.1 mrg TILEGX_INSN_WH64, 312 1.1 mrg TILEGX_INSN_XOR, 313 1.1 mrg TILEGX_NETWORK_BARRIER, 314 1.1 mrg TILEGX_IDN0_RECEIVE, 315 1.1 mrg TILEGX_IDN1_RECEIVE, 316 1.1 mrg TILEGX_IDN_SEND, 317 1.1 mrg TILEGX_UDN0_RECEIVE, 318 1.1 mrg TILEGX_UDN1_RECEIVE, 319 1.1 mrg TILEGX_UDN2_RECEIVE, 320 1.1 mrg TILEGX_UDN3_RECEIVE, 321 1.1 mrg TILEGX_UDN_SEND, 322 1.1 mrg TILEGX_BUILTIN_max 323 1.1 mrg }; 324 1.1 mrg 325 1.1 mrg #endif /* !GCC_TILEGX_BUILTINS_H */ 326
Indexes created Thu May 14 00:25:00 UTC 2026