vax.md revision 1.1.1.1.8.2
1 1.1.1.1.8.2 tls ;; Machine description for GNU compiler, VAX Version 2 1.1.1.1.8.2 tls ;; Copyright (C) 1987, 1988, 1991, 1994, 1995, 1996, 1998, 1999, 2000, 2001, 3 1.1.1.1.8.2 tls ;; 2002, 2004, 2005, 2007, 2009 Free Software Foundation, Inc. 4 1.1.1.1.8.2 tls 5 1.1.1.1.8.2 tls ;; This file is part of GCC. 6 1.1.1.1.8.2 tls 7 1.1.1.1.8.2 tls ;; GCC is free software; you can redistribute it and/or modify 8 1.1.1.1.8.2 tls ;; it under the terms of the GNU General Public License as published by 9 1.1.1.1.8.2 tls ;; the Free Software Foundation; either version 3, or (at your option) 10 1.1.1.1.8.2 tls ;; any later version. 11 1.1.1.1.8.2 tls 12 1.1.1.1.8.2 tls ;; GCC is distributed in the hope that it will be useful, 13 1.1.1.1.8.2 tls ;; but WITHOUT ANY WARRANTY; without even the implied warranty of 14 1.1.1.1.8.2 tls ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 1.1.1.1.8.2 tls ;; GNU General Public License for more details. 16 1.1.1.1.8.2 tls 17 1.1.1.1.8.2 tls ;; You should have received a copy of the GNU General Public License 18 1.1.1.1.8.2 tls ;; along with GCC; see the file COPYING3. If not see 19 1.1.1.1.8.2 tls ;; <http://www.gnu.org/licenses/>. 20 1.1.1.1.8.2 tls 21 1.1.1.1.8.2 tls 22 1.1.1.1.8.2 tls ;;- Instruction patterns. When multiple patterns apply, 23 1.1.1.1.8.2 tls ;;- the first one in the file is chosen. 24 1.1.1.1.8.2 tls ;;- 25 1.1.1.1.8.2 tls ;;- See file "rtl.def" for documentation on define_insn, match_*, et al. 26 1.1.1.1.8.2 tls ;;- 27 1.1.1.1.8.2 tls ;;- cpp macro #define NOTICE_UPDATE_CC in file tm.h handles condition code 28 1.1.1.1.8.2 tls ;;- updates for most instructions. 29 1.1.1.1.8.2 tls 30 1.1.1.1.8.2 tls ;; UNSPEC_VOLATILE usage: 31 1.1.1.1.8.2 tls 32 1.1.1.1.8.2 tls (define_constants 33 1.1.1.1.8.2 tls [(VUNSPEC_BLOCKAGE 0) ; `blockage' insn to prevent scheduling across an 34 1.1.1.1.8.2 tls ; insn in the code. 35 1.1.1.1.8.2 tls (VUNSPEC_SYNC_ISTREAM 1) ; sequence of insns to sync the I-stream 36 1.1.1.1.8.2 tls (VAX_AP_REGNUM 12) ; Register 12 contains the argument pointer 37 1.1.1.1.8.2 tls (VAX_FP_REGNUM 13) ; Register 13 contains the frame pointer 38 1.1.1.1.8.2 tls (VAX_SP_REGNUM 14) ; Register 14 contains the stack pointer 39 1.1.1.1.8.2 tls (VAX_PC_REGNUM 15) ; Register 15 contains the program counter 40 1.1.1.1.8.2 tls ] 41 1.1.1.1.8.2 tls ) 42 1.1.1.1.8.2 tls 43 1.1.1.1.8.2 tls ;; Integer modes supported on VAX, with a mapping from machine mode 44 1.1.1.1.8.2 tls ;; to mnemonic suffix. DImode is always a special case. 45 1.1.1.1.8.2 tls (define_mode_iterator VAXint [QI HI SI]) 46 1.1.1.1.8.2 tls (define_mode_iterator VAXintQH [QI HI]) 47 1.1.1.1.8.2 tls (define_mode_iterator VAXintQHSD [QI HI SI DI]) 48 1.1.1.1.8.2 tls (define_mode_attr isfx [(QI "b") (HI "w") (SI "l") (DI "q")]) 49 1.1.1.1.8.2 tls 50 1.1.1.1.8.2 tls ;; Similar for float modes supported on VAX. 51 1.1.1.1.8.2 tls (define_mode_iterator VAXfp [SF DF]) 52 1.1.1.1.8.2 tls (define_mode_attr fsfx [(SF "f") (DF "%#")]) 53 1.1.1.1.8.2 tls 54 1.1.1.1.8.2 tls ;; Some output patterns want integer immediates with a prefix... 55 1.1.1.1.8.2 tls (define_mode_attr iprefx [(QI "B") (HI "H") (SI "N")]) 56 1.1.1.1.8.2 tls 57 1.1.1.1.8.2 tls ;; 58 1.1.1.1.8.2 tls (include "constraints.md") 59 1.1.1.1.8.2 tls (include "predicates.md") 60 1.1.1.1.8.2 tls 61 1.1.1.1.8.2 tls (define_insn "*cmp<mode>" 62 1.1.1.1.8.2 tls [(set (cc0) 63 1.1.1.1.8.2 tls (compare (match_operand:VAXint 0 "nonimmediate_operand" "nrmT,nrmT") 64 1.1.1.1.8.2 tls (match_operand:VAXint 1 "general_operand" "I,nrmT")))] 65 1.1.1.1.8.2 tls "" 66 1.1.1.1.8.2 tls "@ 67 1.1.1.1.8.2 tls tst<VAXint:isfx> %0 68 1.1.1.1.8.2 tls cmp<VAXint:isfx> %0,%1") 69 1.1.1.1.8.2 tls 70 1.1.1.1.8.2 tls (define_insn "*cmp<mode>" 71 1.1.1.1.8.2 tls [(set (cc0) 72 1.1.1.1.8.2 tls (compare (match_operand:VAXfp 0 "general_operand" "gF,gF") 73 1.1.1.1.8.2 tls (match_operand:VAXfp 1 "general_operand" "G,gF")))] 74 1.1.1.1.8.2 tls "" 75 1.1.1.1.8.2 tls "@ 76 1.1.1.1.8.2 tls tst<VAXfp:fsfx> %0 77 1.1.1.1.8.2 tls cmp<VAXfp:fsfx> %0,%1") 78 1.1.1.1.8.2 tls 79 1.1.1.1.8.2 tls (define_insn "*bit<mode>" 80 1.1.1.1.8.2 tls [(set (cc0) 81 1.1.1.1.8.2 tls (compare (and:VAXint (match_operand:VAXint 0 "general_operand" "nrmT") 82 1.1.1.1.8.2 tls (match_operand:VAXint 1 "general_operand" "nrmT")) 83 1.1.1.1.8.2 tls (const_int 0)))] 84 1.1.1.1.8.2 tls "" 85 1.1.1.1.8.2 tls "bit<VAXint:isfx> %0,%1") 86 1.1.1.1.8.2 tls 87 1.1.1.1.8.2 tls ;; The VAX has no sCOND insns. It does have add/subtract with carry 88 1.1.1.1.8.2 tls ;; which could be used to implement the sltu and sgeu patterns. However, 89 1.1.1.1.8.2 tls ;; to do this properly requires a complete rewrite of the compare insns 90 1.1.1.1.8.2 tls ;; to keep them together with the sltu/sgeu insns until after the 91 1.1.1.1.8.2 tls ;; reload pass is complete. The previous implementation didn't do this 92 1.1.1.1.8.2 tls ;; and has been deleted. 93 1.1.1.1.8.2 tls 94 1.1.1.1.8.2 tls 96 1.1.1.1.8.2 tls (define_insn "mov<mode>" 97 1.1.1.1.8.2 tls [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") 98 1.1.1.1.8.2 tls (match_operand:VAXfp 1 "general_operand" "G,gF"))] 99 1.1.1.1.8.2 tls "" 100 1.1.1.1.8.2 tls "@ 101 1.1.1.1.8.2 tls clr<VAXfp:fsfx> %0 102 1.1.1.1.8.2 tls mov<VAXfp:fsfx> %1,%0") 103 1.1.1.1.8.2 tls 104 1.1.1.1.8.2 tls ;; Some VAXen don't support this instruction. 105 1.1.1.1.8.2 tls ;;(define_insn "movti" 106 1.1.1.1.8.2 tls ;; [(set (match_operand:TI 0 "general_operand" "=g") 107 1.1.1.1.8.2 tls ;; (match_operand:TI 1 "general_operand" "g"))] 108 1.1.1.1.8.2 tls ;; "" 109 1.1.1.1.8.2 tls ;; "movh %1,%0") 110 1.1.1.1.8.2 tls 111 1.1.1.1.8.2 tls (define_insn "movdi" 112 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 113 1.1.1.1.8.2 tls (match_operand:DI 1 "general_operand" "g"))] 114 1.1.1.1.8.2 tls "" 115 1.1.1.1.8.2 tls "* return vax_output_int_move (insn, operands, DImode);") 116 1.1.1.1.8.2 tls 117 1.1.1.1.8.2 tls ;; The VAX move instructions have space-time tradeoffs. On a MicroVAX 118 1.1.1.1.8.2 tls ;; register-register mov instructions take 3 bytes and 2 CPU cycles. clrl 119 1.1.1.1.8.2 tls ;; takes 2 bytes and 3 cycles. mov from constant to register takes 2 cycles 120 1.1.1.1.8.2 tls ;; if the constant is smaller than 4 bytes, 3 cycles for a longword 121 1.1.1.1.8.2 tls ;; constant. movz, mneg, and mcom are as fast as mov, so movzwl is faster 122 1.1.1.1.8.2 tls ;; than movl for positive constants that fit in 16 bits but not 6 bits. cvt 123 1.1.1.1.8.2 tls ;; instructions take 4 cycles. inc takes 3 cycles. The machine description 124 1.1.1.1.8.2 tls ;; is willing to trade 1 byte for 1 cycle (clrl instead of movl $0; cvtwl 125 1.1.1.1.8.2 tls ;; instead of movl). 126 1.1.1.1.8.2 tls 127 1.1.1.1.8.2 tls ;; Cycle counts for other models may vary (on a VAX 750 they are similar, 128 1.1.1.1.8.2 tls ;; but on a VAX 9000 most move and add instructions with one constant 129 1.1.1.1.8.2 tls ;; operand take 1 cycle). 130 1.1.1.1.8.2 tls 131 1.1.1.1.8.2 tls ;; Loads of constants between 64 and 128 used to be done with 132 1.1.1.1.8.2 tls ;; "addl3 $63,#,dst" but this is slower than movzbl and takes as much space. 133 1.1.1.1.8.2 tls 134 1.1.1.1.8.2 tls (define_expand "movsi" 135 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "") 136 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" ""))] 137 1.1.1.1.8.2 tls "" 138 1.1.1.1.8.2 tls " 139 1.1.1.1.8.2 tls { 140 1.1.1.1.8.2 tls #ifdef NO_EXTERNAL_INDIRECT_ADDRESS 141 1.1.1.1.8.2 tls if (flag_pic 142 1.1.1.1.8.2 tls && GET_CODE (operands[1]) == CONST 143 1.1.1.1.8.2 tls && GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == SYMBOL_REF 144 1.1.1.1.8.2 tls && !SYMBOL_REF_LOCAL_P (XEXP (XEXP (operands[1], 0), 0))) 145 1.1.1.1.8.2 tls { 146 1.1.1.1.8.2 tls rtx symbol_ref = XEXP (XEXP (operands[1], 0), 0); 147 1.1.1.1.8.2 tls rtx const_int = XEXP (XEXP (operands[1], 0), 1); 148 1.1.1.1.8.2 tls rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode); 149 1.1.1.1.8.2 tls emit_move_insn (temp, symbol_ref); 150 1.1.1.1.8.2 tls emit_move_insn (operands[0], gen_rtx_PLUS (SImode, temp, const_int)); 151 1.1.1.1.8.2 tls DONE; 152 1.1.1.1.8.2 tls } 153 1.1.1.1.8.2 tls #endif 154 1.1.1.1.8.2 tls }") 155 1.1.1.1.8.2 tls 156 1.1.1.1.8.2 tls (define_insn "movsi_2" 157 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 158 1.1.1.1.8.2 tls (match_operand:SI 1 "nonsymbolic_operand" "nrmT"))] 159 1.1.1.1.8.2 tls "" 160 1.1.1.1.8.2 tls "* return vax_output_int_move (insn, operands, SImode);") 161 1.1.1.1.8.2 tls 162 1.1.1.1.8.2 tls (define_insn "mov<mode>" 163 1.1.1.1.8.2 tls [(set (match_operand:VAXintQH 0 "nonimmediate_operand" "=g") 164 1.1.1.1.8.2 tls (match_operand:VAXintQH 1 "general_operand" "g"))] 165 1.1.1.1.8.2 tls "" 166 1.1.1.1.8.2 tls "* return vax_output_int_move (insn, operands, <MODE>mode);") 167 1.1.1.1.8.2 tls 168 1.1.1.1.8.2 tls (define_insn "movstricthi" 169 1.1.1.1.8.2 tls [(set (strict_low_part (match_operand:HI 0 "register_operand" "+g")) 170 1.1.1.1.8.2 tls (match_operand:HI 1 "general_operand" "g"))] 171 1.1.1.1.8.2 tls "" 172 1.1.1.1.8.2 tls "* 173 1.1.1.1.8.2 tls { 174 1.1.1.1.8.2 tls if (CONST_INT_P (operands[1])) 175 1.1.1.1.8.2 tls { 176 1.1.1.1.8.2 tls int i = INTVAL (operands[1]); 177 1.1.1.1.8.2 tls if (i == 0) 178 1.1.1.1.8.2 tls return \"clrw %0\"; 179 1.1.1.1.8.2 tls else if ((unsigned int)i < 64) 180 1.1.1.1.8.2 tls return \"movw %1,%0\"; 181 1.1.1.1.8.2 tls else if ((unsigned int)~i < 64) 182 1.1.1.1.8.2 tls return \"mcomw %H1,%0\"; 183 1.1.1.1.8.2 tls else if ((unsigned int)i < 256) 184 1.1.1.1.8.2 tls return \"movzbw %1,%0\"; 185 1.1.1.1.8.2 tls } 186 1.1.1.1.8.2 tls return \"movw %1,%0\"; 187 1.1.1.1.8.2 tls }") 188 1.1.1.1.8.2 tls 189 1.1.1.1.8.2 tls (define_insn "movstrictqi" 190 1.1.1.1.8.2 tls [(set (strict_low_part (match_operand:QI 0 "register_operand" "+g")) 191 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "g"))] 192 1.1.1.1.8.2 tls "" 193 1.1.1.1.8.2 tls "* 194 1.1.1.1.8.2 tls { 195 1.1.1.1.8.2 tls if (CONST_INT_P (operands[1])) 196 1.1.1.1.8.2 tls { 197 1.1.1.1.8.2 tls int i = INTVAL (operands[1]); 198 1.1.1.1.8.2 tls if (i == 0) 199 1.1.1.1.8.2 tls return \"clrb %0\"; 200 1.1.1.1.8.2 tls else if ((unsigned int)~i < 64) 201 1.1.1.1.8.2 tls return \"mcomb %B1,%0\"; 202 1.1.1.1.8.2 tls } 203 1.1.1.1.8.2 tls return \"movb %1,%0\"; 204 1.1.1.1.8.2 tls }") 205 1.1.1.1.8.2 tls 206 1.1.1.1.8.2 tls ;; This is here to accept 4 arguments and pass the first 3 along 207 1.1.1.1.8.2 tls ;; to the movmemhi1 pattern that really does the work. 208 1.1.1.1.8.2 tls (define_expand "movmemhi" 209 1.1.1.1.8.2 tls [(set (match_operand:BLK 0 "general_operand" "=g") 210 1.1.1.1.8.2 tls (match_operand:BLK 1 "general_operand" "g")) 211 1.1.1.1.8.2 tls (use (match_operand:HI 2 "general_operand" "g")) 212 1.1.1.1.8.2 tls (match_operand 3 "" "")] 213 1.1.1.1.8.2 tls "" 214 1.1.1.1.8.2 tls " 215 1.1.1.1.8.2 tls { 216 1.1.1.1.8.2 tls if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) <= 48) 217 1.1.1.1.8.2 tls { 218 1.1.1.1.8.2 tls emit_insn (gen_movmemsi1_2 (operands[0], operands[1], operands[2])); 219 1.1.1.1.8.2 tls DONE; 220 1.1.1.1.8.2 tls } 221 1.1.1.1.8.2 tls emit_insn (gen_movmemhi1 (operands[0], operands[1], operands[2])); 222 1.1.1.1.8.2 tls DONE; 223 1.1.1.1.8.2 tls }") 224 1.1.1.1.8.2 tls 225 1.1.1.1.8.2 tls ;; The definition of this insn does not really explain what it does, 226 1.1.1.1.8.2 tls ;; but it should suffice 227 1.1.1.1.8.2 tls ;; that anything generated as this insn will be recognized as one 228 1.1.1.1.8.2 tls ;; and that it won't successfully combine with anything. 229 1.1.1.1.8.2 tls 230 1.1.1.1.8.2 tls (define_insn "movmemsi1_2" 231 1.1.1.1.8.2 tls [(set (match_operand:BLK 0 "memory_operand" "=B") 232 1.1.1.1.8.2 tls (match_operand:BLK 1 "memory_operand" "B")) 233 1.1.1.1.8.2 tls (use (match_operand:SI 2 "const_int_operand" "g"))] 234 1.1.1.1.8.2 tls "INTVAL (operands[2]) <= 48" 235 1.1.1.1.8.2 tls "* return vax_output_movmemsi (insn, operands);") 236 1.1.1.1.8.2 tls 237 1.1.1.1.8.2 tls (define_insn "movmemhi1" 238 1.1.1.1.8.2 tls [(set (match_operand:BLK 0 "memory_operand" "=o") 239 1.1.1.1.8.2 tls (match_operand:BLK 1 "memory_operand" "o")) 240 1.1.1.1.8.2 tls (use (match_operand:HI 2 "general_operand" "g")) 241 1.1.1.1.8.2 tls (clobber (reg:SI 0)) 242 1.1.1.1.8.2 tls (clobber (reg:SI 1)) 243 1.1.1.1.8.2 tls (clobber (reg:SI 2)) 244 1.1.1.1.8.2 tls (clobber (reg:SI 3)) 245 1.1.1.1.8.2 tls (clobber (reg:SI 4)) 246 1.1.1.1.8.2 tls (clobber (reg:SI 5))] 247 1.1.1.1.8.2 tls "" 248 1.1.1.1.8.2 tls "movc3 %2,%1,%0") 249 1.1.1.1.8.2 tls 251 1.1.1.1.8.2 tls ;; Extension and truncation insns. 252 1.1.1.1.8.2 tls 253 1.1.1.1.8.2 tls (define_insn "truncsiqi2" 254 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "nonimmediate_operand" "=g") 255 1.1.1.1.8.2 tls (truncate:QI (match_operand:SI 1 "nonimmediate_operand" "nrmT")))] 256 1.1.1.1.8.2 tls "" 257 1.1.1.1.8.2 tls "cvtlb %1,%0") 258 1.1.1.1.8.2 tls 259 1.1.1.1.8.2 tls (define_insn "truncsihi2" 260 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "nonimmediate_operand" "=g") 261 1.1.1.1.8.2 tls (truncate:HI (match_operand:SI 1 "nonimmediate_operand" "nrmT")))] 262 1.1.1.1.8.2 tls "" 263 1.1.1.1.8.2 tls "cvtlw %1,%0") 264 1.1.1.1.8.2 tls 265 1.1.1.1.8.2 tls (define_insn "trunchiqi2" 266 1.1.1.1.8.2 tls [(set (match_operand:QI 0 "nonimmediate_operand" "=g") 267 1.1.1.1.8.2 tls (truncate:QI (match_operand:HI 1 "nonimmediate_operand" "g")))] 268 1.1.1.1.8.2 tls "" 269 1.1.1.1.8.2 tls "cvtwb %1,%0") 270 1.1.1.1.8.2 tls 271 1.1.1.1.8.2 tls (define_insn "extendhisi2" 272 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 273 1.1.1.1.8.2 tls (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "g")))] 274 1.1.1.1.8.2 tls "" 275 1.1.1.1.8.2 tls "cvtwl %1,%0") 276 1.1.1.1.8.2 tls 277 1.1.1.1.8.2 tls (define_insn "extendqihi2" 278 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "nonimmediate_operand" "=g") 279 1.1.1.1.8.2 tls (sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "g")))] 280 1.1.1.1.8.2 tls "" 281 1.1.1.1.8.2 tls "cvtbw %1,%0") 282 1.1.1.1.8.2 tls 283 1.1.1.1.8.2 tls (define_insn "extendqisi2" 284 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 285 1.1.1.1.8.2 tls (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "g")))] 286 1.1.1.1.8.2 tls "" 287 1.1.1.1.8.2 tls "cvtbl %1,%0") 288 1.1.1.1.8.2 tls 289 1.1.1.1.8.2 tls (define_insn "extendsfdf2" 290 1.1.1.1.8.2 tls [(set (match_operand:DF 0 "nonimmediate_operand" "=g") 291 1.1.1.1.8.2 tls (float_extend:DF (match_operand:SF 1 "general_operand" "gF")))] 292 1.1.1.1.8.2 tls "" 293 1.1.1.1.8.2 tls "cvtf%# %1,%0") 294 1.1.1.1.8.2 tls 295 1.1.1.1.8.2 tls (define_insn "truncdfsf2" 296 1.1.1.1.8.2 tls [(set (match_operand:SF 0 "nonimmediate_operand" "=g") 297 1.1.1.1.8.2 tls (float_truncate:SF (match_operand:DF 1 "general_operand" "gF")))] 298 1.1.1.1.8.2 tls "" 299 1.1.1.1.8.2 tls "cvt%#f %1,%0") 300 1.1.1.1.8.2 tls 301 1.1.1.1.8.2 tls (define_insn "zero_extendhisi2" 302 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 303 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "g")))] 304 1.1.1.1.8.2 tls "" 305 1.1.1.1.8.2 tls "movzwl %1,%0") 306 1.1.1.1.8.2 tls 307 1.1.1.1.8.2 tls (define_insn "zero_extendqihi2" 308 1.1.1.1.8.2 tls [(set (match_operand:HI 0 "nonimmediate_operand" "=g") 309 1.1.1.1.8.2 tls (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "g")))] 310 1.1.1.1.8.2 tls "" 311 1.1.1.1.8.2 tls "movzbw %1,%0") 312 1.1.1.1.8.2 tls 313 1.1.1.1.8.2 tls (define_insn "zero_extendqisi2" 314 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 315 1.1.1.1.8.2 tls (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "g")))] 316 1.1.1.1.8.2 tls "" 317 1.1.1.1.8.2 tls "movzbl %1,%0") 318 1.1.1.1.8.2 tls 320 1.1.1.1.8.2 tls ;; Fix-to-float conversion insns. 321 1.1.1.1.8.2 tls 322 1.1.1.1.8.2 tls (define_insn "float<VAXint:mode><VAXfp:mode>2" 323 1.1.1.1.8.2 tls [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g") 324 1.1.1.1.8.2 tls (float:VAXfp (match_operand:VAXint 1 "nonimmediate_operand" "g")))] 325 1.1.1.1.8.2 tls "" 326 1.1.1.1.8.2 tls "cvt<VAXint:isfx><VAXfp:fsfx> %1,%0") 327 1.1.1.1.8.2 tls 328 1.1.1.1.8.2 tls ;; Float-to-fix conversion insns. 329 1.1.1.1.8.2 tls 330 1.1.1.1.8.2 tls (define_insn "fix_trunc<VAXfp:mode><VAXint:mode>2" 331 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") 332 1.1.1.1.8.2 tls (fix:VAXint (fix:VAXfp (match_operand:VAXfp 1 "general_operand" "gF"))))] 333 1.1.1.1.8.2 tls "" 334 1.1.1.1.8.2 tls "cvt<VAXfp:fsfx><VAXint:isfx> %1,%0") 335 1.1.1.1.8.2 tls 337 1.1.1.1.8.2 tls ;;- All kinds of add instructions. 338 1.1.1.1.8.2 tls 339 1.1.1.1.8.2 tls (define_insn "add<mode>3" 340 1.1.1.1.8.2 tls [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g,g") 341 1.1.1.1.8.2 tls (plus:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF,gF") 342 1.1.1.1.8.2 tls (match_operand:VAXfp 2 "general_operand" "gF,0,gF")))] 343 1.1.1.1.8.2 tls "" 344 1.1.1.1.8.2 tls "@ 345 1.1.1.1.8.2 tls add<VAXfp:fsfx>2 %2,%0 346 1.1.1.1.8.2 tls add<VAXfp:fsfx>2 %1,%0 347 1.1.1.1.8.2 tls add<VAXfp:fsfx>3 %1,%2,%0") 348 1.1.1.1.8.2 tls 349 1.1.1.1.8.2 tls (define_insn "pushlclsymreg" 350 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "push_operand" "=g") 351 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "register_operand" "%r") 352 1.1.1.1.8.2 tls (match_operand:SI 2 "local_symbolic_operand" "i")))] 353 1.1.1.1.8.2 tls "flag_pic" 354 1.1.1.1.8.2 tls "pushab %a2[%1]") 355 1.1.1.1.8.2 tls 356 1.1.1.1.8.2 tls (define_insn "pushextsymreg" 357 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "push_operand" "=g") 358 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "register_operand" "%r") 359 1.1.1.1.8.2 tls (match_operand:SI 2 "external_symbolic_operand" "i")))] 360 1.1.1.1.8.2 tls "flag_pic" 361 1.1.1.1.8.2 tls "pushab %a2[%1]") 362 1.1.1.1.8.2 tls 363 1.1.1.1.8.2 tls (define_insn "movlclsymreg" 364 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 365 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "register_operand" "%r") 366 1.1.1.1.8.2 tls (match_operand:SI 2 "local_symbolic_operand" "i")))] 367 1.1.1.1.8.2 tls "flag_pic" 368 1.1.1.1.8.2 tls "movab %a2[%1],%0") 369 1.1.1.1.8.2 tls 370 1.1.1.1.8.2 tls (define_insn "movextsymreg" 371 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 372 1.1.1.1.8.2 tls (plus:SI (match_operand:SI 1 "register_operand" "%r") 373 1.1.1.1.8.2 tls (match_operand:SI 2 "external_symbolic_operand" "i")))] 374 1.1.1.1.8.2 tls "flag_pic" 375 1.1.1.1.8.2 tls "movab %a2[%1],%0") 376 1.1.1.1.8.2 tls 377 1.1.1.1.8.2 tls (define_insn "add<mode>3" 378 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") 379 1.1.1.1.8.2 tls (plus:VAXint (match_operand:VAXint 1 "general_operand" "nrmT") 380 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "nrmT")))] 381 1.1.1.1.8.2 tls "" 382 1.1.1.1.8.2 tls "* return vax_output_int_add (insn, operands, <MODE>mode);") 383 1.1.1.1.8.2 tls 384 1.1.1.1.8.2 tls (define_expand "adddi3" 385 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 386 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "general_operand" "g") 387 1.1.1.1.8.2 tls (match_operand:DI 2 "general_operand" "g")))] 388 1.1.1.1.8.2 tls "!reload_in_progress" 389 1.1.1.1.8.2 tls "vax_expand_addsub_di_operands (operands, PLUS); DONE;") 390 1.1.1.1.8.2 tls 391 1.1.1.1.8.2 tls (define_insn "adcdi3" 392 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_addsub_di_operand" "=Rr") 393 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "general_addsub_di_operand" "%0") 394 1.1.1.1.8.2 tls (match_operand:DI 2 "general_addsub_di_operand" "nRr")))] 395 1.1.1.1.8.2 tls "TARGET_QMATH" 396 1.1.1.1.8.2 tls "* return vax_output_int_add (insn, operands, DImode);") 397 1.1.1.1.8.2 tls 398 1.1.1.1.8.2 tls ;; The add-with-carry (adwc) instruction only accepts two operands. 399 1.1.1.1.8.2 tls (define_insn "adddi3_old" 400 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=ro>,ro>") 401 1.1.1.1.8.2 tls (plus:DI (match_operand:DI 1 "general_operand" "%0,ro>") 402 1.1.1.1.8.2 tls (match_operand:DI 2 "general_operand" "Fsro,Fs")))] 403 1.1.1.1.8.2 tls "!TARGET_QMATH" 404 1.1.1.1.8.2 tls "* return vax_output_int_add (insn, operands, DImode);") 405 1.1.1.1.8.2 tls 407 1.1.1.1.8.2 tls ;;- All kinds of subtract instructions. 408 1.1.1.1.8.2 tls 409 1.1.1.1.8.2 tls (define_insn "sub<mode>3" 410 1.1.1.1.8.2 tls [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") 411 1.1.1.1.8.2 tls (minus:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF") 412 1.1.1.1.8.2 tls (match_operand:VAXfp 2 "general_operand" "gF,gF")))] 413 1.1.1.1.8.2 tls "" 414 1.1.1.1.8.2 tls "@ 415 1.1.1.1.8.2 tls sub<VAXfp:fsfx>2 %2,%0 416 1.1.1.1.8.2 tls sub<VAXfp:fsfx>3 %2,%1,%0") 417 1.1.1.1.8.2 tls 418 1.1.1.1.8.2 tls (define_insn "sub<mode>3" 419 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") 420 1.1.1.1.8.2 tls (minus:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") 421 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "nrmT,nrmT")))] 422 1.1.1.1.8.2 tls "" 423 1.1.1.1.8.2 tls "@ 424 1.1.1.1.8.2 tls sub<VAXint:isfx>2 %2,%0 425 1.1.1.1.8.2 tls sub<VAXint:isfx>3 %2,%1,%0") 426 1.1.1.1.8.2 tls 427 1.1.1.1.8.2 tls (define_expand "subdi3" 428 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 429 1.1.1.1.8.2 tls (minus:DI (match_operand:DI 1 "general_operand" "g") 430 1.1.1.1.8.2 tls (match_operand:DI 2 "general_operand" "g")))] 431 1.1.1.1.8.2 tls "!reload_in_progress" 432 1.1.1.1.8.2 tls "vax_expand_addsub_di_operands (operands, MINUS); DONE;") 433 1.1.1.1.8.2 tls 434 1.1.1.1.8.2 tls (define_insn "sbcdi3" 435 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_addsub_di_operand" "=Rr,=Rr") 436 1.1.1.1.8.2 tls (minus:DI (match_operand:DI 1 "general_addsub_di_operand" "0,I") 437 1.1.1.1.8.2 tls (match_operand:DI 2 "general_addsub_di_operand" "nRr,Rr")))] 438 1.1.1.1.8.2 tls "TARGET_QMATH" 439 1.1.1.1.8.2 tls "* return vax_output_int_subtract (insn, operands, DImode);") 440 1.1.1.1.8.2 tls 441 1.1.1.1.8.2 tls ;; The subtract-with-carry (sbwc) instruction only takes two operands. 442 1.1.1.1.8.2 tls (define_insn "subdi3_old" 443 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=or>,or>") 444 1.1.1.1.8.2 tls (minus:DI (match_operand:DI 1 "general_operand" "0,or>") 445 1.1.1.1.8.2 tls (match_operand:DI 2 "general_operand" "Fsor,Fs")))] 446 1.1.1.1.8.2 tls "!TARGET_QMATH" 447 1.1.1.1.8.2 tls "* return vax_output_int_subtract (insn, operands, DImode);") 448 1.1.1.1.8.2 tls 450 1.1.1.1.8.2 tls ;;- Multiply instructions. 451 1.1.1.1.8.2 tls 452 1.1.1.1.8.2 tls (define_insn "mul<mode>3" 453 1.1.1.1.8.2 tls [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g,g") 454 1.1.1.1.8.2 tls (mult:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF,gF") 455 1.1.1.1.8.2 tls (match_operand:VAXfp 2 "general_operand" "gF,0,gF")))] 456 1.1.1.1.8.2 tls "" 457 1.1.1.1.8.2 tls "@ 458 1.1.1.1.8.2 tls mul<VAXfp:fsfx>2 %2,%0 459 1.1.1.1.8.2 tls mul<VAXfp:fsfx>2 %1,%0 460 1.1.1.1.8.2 tls mul<VAXfp:fsfx>3 %1,%2,%0") 461 1.1.1.1.8.2 tls 462 1.1.1.1.8.2 tls (define_insn "mul<mode>3" 463 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") 464 1.1.1.1.8.2 tls (mult:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") 465 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT")))] 466 1.1.1.1.8.2 tls "" 467 1.1.1.1.8.2 tls "@ 468 1.1.1.1.8.2 tls mul<VAXint:isfx>2 %2,%0 469 1.1.1.1.8.2 tls mul<VAXint:isfx>2 %1,%0 470 1.1.1.1.8.2 tls mul<VAXint:isfx>3 %1,%2,%0") 471 1.1.1.1.8.2 tls 472 1.1.1.1.8.2 tls (define_insn "mulsidi3" 473 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 474 1.1.1.1.8.2 tls (mult:DI (sign_extend:DI 475 1.1.1.1.8.2 tls (match_operand:SI 1 "nonimmediate_operand" "nrmT")) 476 1.1.1.1.8.2 tls (sign_extend:DI 477 1.1.1.1.8.2 tls (match_operand:SI 2 "nonimmediate_operand" "nrmT"))))] 478 1.1.1.1.8.2 tls "" 479 1.1.1.1.8.2 tls "emul %1,%2,$0,%0") 480 1.1.1.1.8.2 tls 481 1.1.1.1.8.2 tls (define_insn "" 482 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 483 1.1.1.1.8.2 tls (plus:DI 484 1.1.1.1.8.2 tls (mult:DI (sign_extend:DI 485 1.1.1.1.8.2 tls (match_operand:SI 1 "nonimmediate_operand" "nrmT")) 486 1.1.1.1.8.2 tls (sign_extend:DI 487 1.1.1.1.8.2 tls (match_operand:SI 2 "nonimmediate_operand" "nrmT"))) 488 1.1.1.1.8.2 tls (sign_extend:DI (match_operand:SI 3 "nonimmediate_operand" "g"))))] 489 1.1.1.1.8.2 tls "" 490 1.1.1.1.8.2 tls "emul %1,%2,%3,%0") 491 1.1.1.1.8.2 tls 492 1.1.1.1.8.2 tls ;; 'F' constraint means type CONST_DOUBLE 493 1.1.1.1.8.2 tls (define_insn "" 494 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 495 1.1.1.1.8.2 tls (plus:DI 496 1.1.1.1.8.2 tls (mult:DI (sign_extend:DI 497 1.1.1.1.8.2 tls (match_operand:SI 1 "nonimmediate_operand" "nrmT")) 498 1.1.1.1.8.2 tls (sign_extend:DI 499 1.1.1.1.8.2 tls (match_operand:SI 2 "nonimmediate_operand" "nrmT"))) 500 1.1.1.1.8.2 tls (match_operand:DI 3 "immediate_operand" "F")))] 501 1.1.1.1.8.2 tls "GET_CODE (operands[3]) == CONST_DOUBLE 502 1.1.1.1.8.2 tls && CONST_DOUBLE_HIGH (operands[3]) == (CONST_DOUBLE_LOW (operands[3]) >> 31)" 503 1.1.1.1.8.2 tls "* 504 1.1.1.1.8.2 tls { 505 1.1.1.1.8.2 tls if (CONST_DOUBLE_HIGH (operands[3])) 506 1.1.1.1.8.2 tls operands[3] = GEN_INT (CONST_DOUBLE_LOW (operands[3])); 507 1.1.1.1.8.2 tls return \"emul %1,%2,%3,%0\"; 508 1.1.1.1.8.2 tls }") 509 1.1.1.1.8.2 tls 511 1.1.1.1.8.2 tls ;;- Divide instructions. 512 1.1.1.1.8.2 tls 513 1.1.1.1.8.2 tls (define_insn "div<mode>3" 514 1.1.1.1.8.2 tls [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g,g") 515 1.1.1.1.8.2 tls (div:VAXfp (match_operand:VAXfp 1 "general_operand" "0,gF") 516 1.1.1.1.8.2 tls (match_operand:VAXfp 2 "general_operand" "gF,gF")))] 517 1.1.1.1.8.2 tls "" 518 1.1.1.1.8.2 tls "@ 519 1.1.1.1.8.2 tls div<VAXfp:fsfx>2 %2,%0 520 1.1.1.1.8.2 tls div<VAXfp:fsfx>3 %2,%1,%0") 521 1.1.1.1.8.2 tls 522 1.1.1.1.8.2 tls (define_insn "div<mode>3" 523 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") 524 1.1.1.1.8.2 tls (div:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") 525 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "nrmT,nrmT")))] 526 1.1.1.1.8.2 tls "" 527 1.1.1.1.8.2 tls "@ 528 1.1.1.1.8.2 tls div<VAXint:isfx>2 %2,%0 529 1.1.1.1.8.2 tls div<VAXint:isfx>3 %2,%1,%0") 530 1.1.1.1.8.2 tls 531 1.1.1.1.8.2 tls ;This is left out because it is very slow; 532 1.1.1.1.8.2 tls ;we are better off programming around the "lack" of this insn. 533 1.1.1.1.8.2 tls ;(define_insn "divmoddisi4" 534 1.1.1.1.8.2 tls ; [(set (match_operand:SI 0 "general_operand" "=g") 535 1.1.1.1.8.2 tls ; (div:SI (match_operand:DI 1 "general_operand" "g") 536 1.1.1.1.8.2 tls ; (match_operand:SI 2 "general_operand" "g"))) 537 1.1.1.1.8.2 tls ; (set (match_operand:SI 3 "general_operand" "=g") 538 1.1.1.1.8.2 tls ; (mod:SI (match_operand:DI 1 "general_operand" "g") 539 1.1.1.1.8.2 tls ; (match_operand:SI 2 "general_operand" "g")))] 540 1.1.1.1.8.2 tls ; "" 541 1.1.1.1.8.2 tls ; "ediv %2,%1,%0,%3") 542 1.1.1.1.8.2 tls 544 1.1.1.1.8.2 tls ;; Bit-and on the VAX is done with a clear-bits insn. 545 1.1.1.1.8.2 tls (define_expand "and<mode>3" 546 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "") 547 1.1.1.1.8.2 tls (and:VAXint (not:VAXint (match_operand:VAXint 1 "general_operand" "")) 548 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "")))] 549 1.1.1.1.8.2 tls "" 550 1.1.1.1.8.2 tls " 551 1.1.1.1.8.2 tls { 552 1.1.1.1.8.2 tls rtx op1 = operands[1]; 553 1.1.1.1.8.2 tls 554 1.1.1.1.8.2 tls /* If there is a constant argument, complement that one. */ 555 1.1.1.1.8.2 tls if (CONST_INT_P (operands[2]) && ! CONST_INT_P (op1)) 556 1.1.1.1.8.2 tls { 557 1.1.1.1.8.2 tls operands[1] = operands[2]; 558 1.1.1.1.8.2 tls operands[2] = op1; 559 1.1.1.1.8.2 tls op1 = operands[1]; 560 1.1.1.1.8.2 tls } 561 1.1.1.1.8.2 tls 562 1.1.1.1.8.2 tls if (CONST_INT_P (op1)) 563 1.1.1.1.8.2 tls operands[1] = GEN_INT (~INTVAL (op1)); 564 1.1.1.1.8.2 tls else 565 1.1.1.1.8.2 tls operands[1] = expand_unop (<MODE>mode, one_cmpl_optab, op1, 0, 1); 566 1.1.1.1.8.2 tls }") 567 1.1.1.1.8.2 tls 568 1.1.1.1.8.2 tls (define_insn "*and<mode>" 569 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") 570 1.1.1.1.8.2 tls (and:VAXint (not:VAXint (match_operand:VAXint 1 "general_operand" "nrmT,nrmT")) 571 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "0,nrmT")))] 572 1.1.1.1.8.2 tls "" 573 1.1.1.1.8.2 tls "@ 574 1.1.1.1.8.2 tls bic<VAXint:isfx>2 %1,%0 575 1.1.1.1.8.2 tls bic<VAXint:isfx>3 %1,%2,%0") 576 1.1.1.1.8.2 tls 577 1.1.1.1.8.2 tls ;; The following used to be needed because constant propagation can 578 1.1.1.1.8.2 tls ;; create them starting from the bic insn patterns above. This is no 579 1.1.1.1.8.2 tls ;; longer a problem. However, having these patterns allows optimization 580 1.1.1.1.8.2 tls ;; opportunities in combine.c. 581 1.1.1.1.8.2 tls 582 1.1.1.1.8.2 tls (define_insn "*and<mode>_const_int" 583 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g") 584 1.1.1.1.8.2 tls (and:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT") 585 1.1.1.1.8.2 tls (match_operand:VAXint 2 "const_int_operand" "n,n")))] 586 1.1.1.1.8.2 tls "" 587 1.1.1.1.8.2 tls "@ 588 1.1.1.1.8.2 tls bic<VAXint:isfx>2 %<VAXint:iprefx>2,%0 589 1.1.1.1.8.2 tls bic<VAXint:isfx>3 %<VAXint:iprefx>2,%1,%0") 590 1.1.1.1.8.2 tls 591 1.1.1.1.8.2 tls 593 1.1.1.1.8.2 tls ;;- Bit set instructions. 594 1.1.1.1.8.2 tls 595 1.1.1.1.8.2 tls (define_insn "ior<mode>3" 596 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") 597 1.1.1.1.8.2 tls (ior:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") 598 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT")))] 599 1.1.1.1.8.2 tls "" 600 1.1.1.1.8.2 tls "@ 601 1.1.1.1.8.2 tls bis<VAXint:isfx>2 %2,%0 602 1.1.1.1.8.2 tls bis<VAXint:isfx>2 %1,%0 603 1.1.1.1.8.2 tls bis<VAXint:isfx>3 %2,%1,%0") 604 1.1.1.1.8.2 tls 605 1.1.1.1.8.2 tls ;;- xor instructions. 606 1.1.1.1.8.2 tls 607 1.1.1.1.8.2 tls (define_insn "xor<mode>3" 608 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g,g,g") 609 1.1.1.1.8.2 tls (xor:VAXint (match_operand:VAXint 1 "general_operand" "0,nrmT,nrmT") 610 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" "nrmT,0,nrmT")))] 611 1.1.1.1.8.2 tls "" 612 1.1.1.1.8.2 tls "@ 613 1.1.1.1.8.2 tls xor<VAXint:isfx>2 %2,%0 614 1.1.1.1.8.2 tls xor<VAXint:isfx>2 %1,%0 615 1.1.1.1.8.2 tls xor<VAXint:isfx>3 %2,%1,%0") 616 1.1.1.1.8.2 tls 617 1.1.1.1.8.2 tls 619 1.1.1.1.8.2 tls (define_insn "neg<mode>2" 620 1.1.1.1.8.2 tls [(set (match_operand:VAXfp 0 "nonimmediate_operand" "=g") 621 1.1.1.1.8.2 tls (neg:VAXfp (match_operand:VAXfp 1 "general_operand" "gF")))] 622 1.1.1.1.8.2 tls "" 623 1.1.1.1.8.2 tls "mneg<VAXfp:fsfx> %1,%0") 624 1.1.1.1.8.2 tls 625 1.1.1.1.8.2 tls (define_insn "neg<mode>2" 626 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") 627 1.1.1.1.8.2 tls (neg:VAXint (match_operand:VAXint 1 "general_operand" "nrmT")))] 628 1.1.1.1.8.2 tls "" 629 1.1.1.1.8.2 tls "mneg<VAXint:isfx> %1,%0") 630 1.1.1.1.8.2 tls 631 1.1.1.1.8.2 tls (define_insn "one_cmpl<mode>2" 632 1.1.1.1.8.2 tls [(set (match_operand:VAXint 0 "nonimmediate_operand" "=g") 633 1.1.1.1.8.2 tls (not:VAXint (match_operand:VAXint 1 "general_operand" "nrmT")))] 634 1.1.1.1.8.2 tls "" 635 1.1.1.1.8.2 tls "mcom<VAXint:isfx> %1,%0") 636 1.1.1.1.8.2 tls 637 1.1.1.1.8.2 tls 639 1.1.1.1.8.2 tls ;; Arithmetic right shift on the VAX works by negating the shift count, 640 1.1.1.1.8.2 tls ;; then emitting a right shift with the shift count negated. This means 641 1.1.1.1.8.2 tls ;; that all actual shift counts in the RTL will be positive. This 642 1.1.1.1.8.2 tls ;; prevents converting shifts to ZERO_EXTRACTs with negative positions, 643 1.1.1.1.8.2 tls ;; which isn't valid. 644 1.1.1.1.8.2 tls (define_expand "ashrsi3" 645 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "general_operand" "=g") 646 1.1.1.1.8.2 tls (ashiftrt:SI (match_operand:SI 1 "general_operand" "g") 647 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g")))] 648 1.1.1.1.8.2 tls "" 649 1.1.1.1.8.2 tls " 650 1.1.1.1.8.2 tls { 651 1.1.1.1.8.2 tls if (! CONST_INT_P (operands[2])) 652 1.1.1.1.8.2 tls operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); 653 1.1.1.1.8.2 tls }") 654 1.1.1.1.8.2 tls 655 1.1.1.1.8.2 tls (define_insn "" 656 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 657 1.1.1.1.8.2 tls (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") 658 1.1.1.1.8.2 tls (match_operand:QI 2 "const_int_operand" "n")))] 659 1.1.1.1.8.2 tls "" 660 1.1.1.1.8.2 tls "ashl $%n2,%1,%0") 661 1.1.1.1.8.2 tls 662 1.1.1.1.8.2 tls (define_insn "" 663 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 664 1.1.1.1.8.2 tls (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") 665 1.1.1.1.8.2 tls (neg:QI (match_operand:QI 2 "general_operand" "g"))))] 666 1.1.1.1.8.2 tls "" 667 1.1.1.1.8.2 tls "ashl %2,%1,%0") 668 1.1.1.1.8.2 tls 669 1.1.1.1.8.2 tls (define_insn "ashlsi3" 670 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 671 1.1.1.1.8.2 tls (ashift:SI (match_operand:SI 1 "general_operand" "nrmT") 672 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g")))] 673 1.1.1.1.8.2 tls "" 674 1.1.1.1.8.2 tls "* 675 1.1.1.1.8.2 tls { 676 1.1.1.1.8.2 tls if (operands[2] == const1_rtx && rtx_equal_p (operands[0], operands[1])) 677 1.1.1.1.8.2 tls return \"addl2 %0,%0\"; 678 1.1.1.1.8.2 tls if (REG_P (operands[1]) && CONST_INT_P (operands[2])) 679 1.1.1.1.8.2 tls { 680 1.1.1.1.8.2 tls int i = INTVAL (operands[2]); 681 1.1.1.1.8.2 tls if (i == 1) 682 1.1.1.1.8.2 tls return \"addl3 %1,%1,%0\"; 683 1.1.1.1.8.2 tls if (i == 2 && !optimize_size) 684 1.1.1.1.8.2 tls { 685 1.1.1.1.8.2 tls if (push_operand (operands[0], SImode)) 686 1.1.1.1.8.2 tls return \"pushal 0[%1]\"; 687 1.1.1.1.8.2 tls return \"moval 0[%1],%0\"; 688 1.1.1.1.8.2 tls } 689 1.1.1.1.8.2 tls if (i == 3 && !optimize_size) 690 1.1.1.1.8.2 tls { 691 1.1.1.1.8.2 tls if (push_operand (operands[0], SImode)) 692 1.1.1.1.8.2 tls return \"pushaq 0[%1]\"; 693 1.1.1.1.8.2 tls return \"movaq 0[%1],%0\"; 694 1.1.1.1.8.2 tls } 695 1.1.1.1.8.2 tls } 696 1.1.1.1.8.2 tls return \"ashl %2,%1,%0\"; 697 1.1.1.1.8.2 tls }") 698 1.1.1.1.8.2 tls 699 1.1.1.1.8.2 tls ;; Arithmetic right shift on the VAX works by negating the shift count. 700 1.1.1.1.8.2 tls (define_expand "ashrdi3" 701 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "general_operand" "=g") 702 1.1.1.1.8.2 tls (ashiftrt:DI (match_operand:DI 1 "general_operand" "g") 703 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g")))] 704 1.1.1.1.8.2 tls "" 705 1.1.1.1.8.2 tls " 706 1.1.1.1.8.2 tls { 707 1.1.1.1.8.2 tls operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); 708 1.1.1.1.8.2 tls }") 709 1.1.1.1.8.2 tls 710 1.1.1.1.8.2 tls (define_insn "ashldi3" 711 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 712 1.1.1.1.8.2 tls (ashift:DI (match_operand:DI 1 "general_operand" "g") 713 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g")))] 714 1.1.1.1.8.2 tls "" 715 1.1.1.1.8.2 tls "ashq %2,%D1,%0") 716 1.1.1.1.8.2 tls 717 1.1.1.1.8.2 tls (define_insn "" 718 1.1.1.1.8.2 tls [(set (match_operand:DI 0 "nonimmediate_operand" "=g") 719 1.1.1.1.8.2 tls (ashiftrt:DI (match_operand:DI 1 "general_operand" "g") 720 1.1.1.1.8.2 tls (neg:QI (match_operand:QI 2 "general_operand" "g"))))] 721 1.1.1.1.8.2 tls "" 722 1.1.1.1.8.2 tls "ashq %2,%D1,%0") 723 1.1.1.1.8.2 tls 724 1.1.1.1.8.2 tls ;; We used to have expand_shift handle logical right shifts by using extzv, 725 1.1.1.1.8.2 tls ;; but this make it very difficult to do lshrdi3. Since the VAX is the 726 1.1.1.1.8.2 tls ;; only machine with this kludge, it's better to just do this with a 727 1.1.1.1.8.2 tls ;; define_expand and remove that case from expand_shift. 728 1.1.1.1.8.2 tls 729 1.1.1.1.8.2 tls (define_expand "lshrsi3" 730 1.1.1.1.8.2 tls [(set (match_dup 3) 731 1.1.1.1.8.2 tls (minus:QI (const_int 32) 732 1.1.1.1.8.2 tls (match_dup 4))) 733 1.1.1.1.8.2 tls (set (match_operand:SI 0 "nonimmediate_operand" "=g") 734 1.1.1.1.8.2 tls (zero_extract:SI (match_operand:SI 1 "register_operand" "r") 735 1.1.1.1.8.2 tls (match_dup 3) 736 1.1.1.1.8.2 tls (match_operand:SI 2 "register_operand" "g")))] 737 1.1.1.1.8.2 tls "" 738 1.1.1.1.8.2 tls " 739 1.1.1.1.8.2 tls { 740 1.1.1.1.8.2 tls operands[3] = gen_reg_rtx (QImode); 741 1.1.1.1.8.2 tls operands[4] = gen_lowpart (QImode, operands[2]); 742 1.1.1.1.8.2 tls }") 743 1.1.1.1.8.2 tls 744 1.1.1.1.8.2 tls ;; Rotate right on the VAX works by negating the shift count. 745 1.1.1.1.8.2 tls (define_expand "rotrsi3" 746 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "general_operand" "=g") 747 1.1.1.1.8.2 tls (rotatert:SI (match_operand:SI 1 "general_operand" "g") 748 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g")))] 749 1.1.1.1.8.2 tls "" 750 1.1.1.1.8.2 tls " 751 1.1.1.1.8.2 tls { 752 1.1.1.1.8.2 tls if (! CONST_INT_P (operands[2])) 753 1.1.1.1.8.2 tls operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); 754 1.1.1.1.8.2 tls }") 755 1.1.1.1.8.2 tls 756 1.1.1.1.8.2 tls (define_insn "rotlsi3" 757 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 758 1.1.1.1.8.2 tls (rotate:SI (match_operand:SI 1 "general_operand" "nrmT") 759 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g")))] 760 1.1.1.1.8.2 tls "" 761 1.1.1.1.8.2 tls "rotl %2,%1,%0") 762 1.1.1.1.8.2 tls 763 1.1.1.1.8.2 tls (define_insn "" 764 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 765 1.1.1.1.8.2 tls (rotatert:SI (match_operand:SI 1 "general_operand" "nrmT") 766 1.1.1.1.8.2 tls (match_operand:QI 2 "const_int_operand" "n")))] 767 1.1.1.1.8.2 tls "" 768 1.1.1.1.8.2 tls "rotl %R2,%1,%0") 769 1.1.1.1.8.2 tls 770 1.1.1.1.8.2 tls (define_insn "" 771 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 772 1.1.1.1.8.2 tls (rotatert:SI (match_operand:SI 1 "general_operand" "nrmT") 773 1.1.1.1.8.2 tls (neg:QI (match_operand:QI 2 "general_operand" "g"))))] 774 1.1.1.1.8.2 tls "" 775 1.1.1.1.8.2 tls "rotl %2,%1,%0") 776 1.1.1.1.8.2 tls 777 1.1.1.1.8.2 tls ;This insn is probably slower than a multiply and an add. 778 1.1.1.1.8.2 tls ;(define_insn "" 779 1.1.1.1.8.2 tls ; [(set (match_operand:SI 0 "general_operand" "=g") 780 1.1.1.1.8.2 tls ; (mult:SI (plus:SI (match_operand:SI 1 "general_operand" "g") 781 1.1.1.1.8.2 tls ; (match_operand:SI 2 "general_operand" "g")) 782 1.1.1.1.8.2 tls ; (match_operand:SI 3 "general_operand" "g")))] 783 1.1.1.1.8.2 tls ; "" 784 1.1.1.1.8.2 tls ; "index %1,$0x80000000,$0x7fffffff,%3,%2,%0") 785 1.1.1.1.8.2 tls 787 1.1.1.1.8.2 tls ;; Special cases of bit-field insns which we should 788 1.1.1.1.8.2 tls ;; recognize in preference to the general case. 789 1.1.1.1.8.2 tls ;; These handle aligned 8-bit and 16-bit fields, 790 1.1.1.1.8.2 tls ;; which can usually be done with move instructions. 791 1.1.1.1.8.2 tls 792 1.1.1.1.8.2 tls (define_insn "" 793 1.1.1.1.8.2 tls [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+ro") 794 1.1.1.1.8.2 tls (match_operand:QI 1 "const_int_operand" "n") 795 1.1.1.1.8.2 tls (match_operand:SI 2 "const_int_operand" "n")) 796 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "g"))] 797 1.1.1.1.8.2 tls "(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16) 798 1.1.1.1.8.2 tls && INTVAL (operands[2]) % INTVAL (operands[1]) == 0 799 1.1.1.1.8.2 tls && (REG_P (operands[0]) 800 1.1.1.1.8.2 tls || ! mode_dependent_address_p (XEXP (operands[0], 0)))" 801 1.1.1.1.8.2 tls "* 802 1.1.1.1.8.2 tls { 803 1.1.1.1.8.2 tls if (REG_P (operands[0])) 804 1.1.1.1.8.2 tls { 805 1.1.1.1.8.2 tls if (INTVAL (operands[2]) != 0) 806 1.1.1.1.8.2 tls return \"insv %3,%2,%1,%0\"; 807 1.1.1.1.8.2 tls } 808 1.1.1.1.8.2 tls else 809 1.1.1.1.8.2 tls operands[0] 810 1.1.1.1.8.2 tls = adjust_address (operands[0], 811 1.1.1.1.8.2 tls INTVAL (operands[1]) == 8 ? QImode : HImode, 812 1.1.1.1.8.2 tls INTVAL (operands[2]) / 8); 813 1.1.1.1.8.2 tls 814 1.1.1.1.8.2 tls CC_STATUS_INIT; 815 1.1.1.1.8.2 tls if (INTVAL (operands[1]) == 8) 816 1.1.1.1.8.2 tls return \"movb %3,%0\"; 817 1.1.1.1.8.2 tls return \"movw %3,%0\"; 818 1.1.1.1.8.2 tls }") 819 1.1.1.1.8.2 tls 820 1.1.1.1.8.2 tls (define_insn "" 821 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=&g") 822 1.1.1.1.8.2 tls (zero_extract:SI (match_operand:SI 1 "register_operand" "ro") 823 1.1.1.1.8.2 tls (match_operand:QI 2 "const_int_operand" "n") 824 1.1.1.1.8.2 tls (match_operand:SI 3 "const_int_operand" "n")))] 825 1.1.1.1.8.2 tls "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) 826 1.1.1.1.8.2 tls && INTVAL (operands[3]) % INTVAL (operands[2]) == 0 827 1.1.1.1.8.2 tls && (REG_P (operands[1]) 828 1.1.1.1.8.2 tls || ! mode_dependent_address_p (XEXP (operands[1], 0)))" 829 1.1.1.1.8.2 tls "* 830 1.1.1.1.8.2 tls { 831 1.1.1.1.8.2 tls if (REG_P (operands[1])) 832 1.1.1.1.8.2 tls { 833 1.1.1.1.8.2 tls if (INTVAL (operands[3]) != 0) 834 1.1.1.1.8.2 tls return \"extzv %3,%2,%1,%0\"; 835 1.1.1.1.8.2 tls } 836 1.1.1.1.8.2 tls else 837 1.1.1.1.8.2 tls operands[1] 838 1.1.1.1.8.2 tls = adjust_address (operands[1], 839 1.1.1.1.8.2 tls INTVAL (operands[2]) == 8 ? QImode : HImode, 840 1.1.1.1.8.2 tls INTVAL (operands[3]) / 8); 841 1.1.1.1.8.2 tls 842 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 8) 843 1.1.1.1.8.2 tls return \"movzbl %1,%0\"; 844 1.1.1.1.8.2 tls return \"movzwl %1,%0\"; 845 1.1.1.1.8.2 tls }") 846 1.1.1.1.8.2 tls 847 1.1.1.1.8.2 tls (define_insn "" 848 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 849 1.1.1.1.8.2 tls (sign_extract:SI (match_operand:SI 1 "register_operand" "ro") 850 1.1.1.1.8.2 tls (match_operand:QI 2 "const_int_operand" "n") 851 1.1.1.1.8.2 tls (match_operand:SI 3 "const_int_operand" "n")))] 852 1.1.1.1.8.2 tls "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16) 853 1.1.1.1.8.2 tls && INTVAL (operands[3]) % INTVAL (operands[2]) == 0 854 1.1.1.1.8.2 tls && (REG_P (operands[1]) 855 1.1.1.1.8.2 tls || ! mode_dependent_address_p (XEXP (operands[1], 0)))" 856 1.1.1.1.8.2 tls "* 857 1.1.1.1.8.2 tls { 858 1.1.1.1.8.2 tls if (REG_P (operands[1])) 859 1.1.1.1.8.2 tls { 860 1.1.1.1.8.2 tls if (INTVAL (operands[3]) != 0) 861 1.1.1.1.8.2 tls return \"extv %3,%2,%1,%0\"; 862 1.1.1.1.8.2 tls } 863 1.1.1.1.8.2 tls else 864 1.1.1.1.8.2 tls operands[1] 865 1.1.1.1.8.2 tls = adjust_address (operands[1], 866 1.1.1.1.8.2 tls INTVAL (operands[2]) == 8 ? QImode : HImode, 867 1.1.1.1.8.2 tls INTVAL (operands[3]) / 8); 868 1.1.1.1.8.2 tls 869 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 8) 870 1.1.1.1.8.2 tls return \"cvtbl %1,%0\"; 871 1.1.1.1.8.2 tls return \"cvtwl %1,%0\"; 872 1.1.1.1.8.2 tls }") 873 1.1.1.1.8.2 tls 875 1.1.1.1.8.2 tls ;; Register-only SImode cases of bit-field insns. 876 1.1.1.1.8.2 tls 877 1.1.1.1.8.2 tls (define_insn "" 878 1.1.1.1.8.2 tls [(set (cc0) 879 1.1.1.1.8.2 tls (compare 880 1.1.1.1.8.2 tls (sign_extract:SI (match_operand:SI 0 "register_operand" "r") 881 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "g") 882 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "nrmT")) 883 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 884 1.1.1.1.8.2 tls "" 885 1.1.1.1.8.2 tls "cmpv %2,%1,%0,%3") 886 1.1.1.1.8.2 tls 887 1.1.1.1.8.2 tls (define_insn "" 888 1.1.1.1.8.2 tls [(set (cc0) 889 1.1.1.1.8.2 tls (compare 890 1.1.1.1.8.2 tls (zero_extract:SI (match_operand:SI 0 "register_operand" "r") 891 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "g") 892 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "nrmT")) 893 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 894 1.1.1.1.8.2 tls "" 895 1.1.1.1.8.2 tls "cmpzv %2,%1,%0,%3") 896 1.1.1.1.8.2 tls 897 1.1.1.1.8.2 tls ;; When the field position and size are constant and the destination 898 1.1.1.1.8.2 tls ;; is a register, extv and extzv are much slower than a rotate followed 899 1.1.1.1.8.2 tls ;; by a bicl or sign extension. Because we might end up choosing ext[z]v 900 1.1.1.1.8.2 tls ;; anyway, we can't allow immediate values for the primary source operand. 901 1.1.1.1.8.2 tls 902 1.1.1.1.8.2 tls (define_insn "" 903 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 904 1.1.1.1.8.2 tls (sign_extract:SI (match_operand:SI 1 "register_operand" "ro") 905 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g") 906 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 907 1.1.1.1.8.2 tls "" 908 1.1.1.1.8.2 tls "* 909 1.1.1.1.8.2 tls { 910 1.1.1.1.8.2 tls if (! CONST_INT_P (operands[3]) || ! CONST_INT_P (operands[2]) 911 1.1.1.1.8.2 tls || ! REG_P (operands[0]) 912 1.1.1.1.8.2 tls || (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16)) 913 1.1.1.1.8.2 tls return \"extv %3,%2,%1,%0\"; 914 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 8) 915 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;cvtbl %0,%0\"; 916 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;cvtwl %0,%0\"; 917 1.1.1.1.8.2 tls }") 918 1.1.1.1.8.2 tls 919 1.1.1.1.8.2 tls (define_insn "" 920 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 921 1.1.1.1.8.2 tls (zero_extract:SI (match_operand:SI 1 "register_operand" "ro") 922 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g") 923 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 924 1.1.1.1.8.2 tls "" 925 1.1.1.1.8.2 tls "* 926 1.1.1.1.8.2 tls { 927 1.1.1.1.8.2 tls if (! CONST_INT_P (operands[3]) || ! CONST_INT_P (operands[2]) 928 1.1.1.1.8.2 tls || ! REG_P (operands[0])) 929 1.1.1.1.8.2 tls return \"extzv %3,%2,%1,%0\"; 930 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 8) 931 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;movzbl %0,%0\"; 932 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 16) 933 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;movzwl %0,%0\"; 934 1.1.1.1.8.2 tls if (INTVAL (operands[3]) & 31) 935 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;bicl2 %M2,%0\"; 936 1.1.1.1.8.2 tls if (rtx_equal_p (operands[0], operands[1])) 937 1.1.1.1.8.2 tls return \"bicl2 %M2,%0\"; 938 1.1.1.1.8.2 tls return \"bicl3 %M2,%1,%0\"; 939 1.1.1.1.8.2 tls }") 940 1.1.1.1.8.2 tls 941 1.1.1.1.8.2 tls ;; Non-register cases. 942 1.1.1.1.8.2 tls ;; nonimmediate_operand is used to make sure that mode-ambiguous cases 943 1.1.1.1.8.2 tls ;; don't match these (and therefore match the cases above instead). 944 1.1.1.1.8.2 tls 945 1.1.1.1.8.2 tls (define_insn "" 946 1.1.1.1.8.2 tls [(set (cc0) 947 1.1.1.1.8.2 tls (compare 948 1.1.1.1.8.2 tls (sign_extract:SI (match_operand:QI 0 "memory_operand" "m") 949 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "g") 950 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "nrmT")) 951 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 952 1.1.1.1.8.2 tls "" 953 1.1.1.1.8.2 tls "cmpv %2,%1,%0,%3") 954 1.1.1.1.8.2 tls 955 1.1.1.1.8.2 tls (define_insn "" 956 1.1.1.1.8.2 tls [(set (cc0) 957 1.1.1.1.8.2 tls (compare 958 1.1.1.1.8.2 tls (zero_extract:SI (match_operand:QI 0 "nonimmediate_operand" "rm") 959 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "g") 960 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "nrmT")) 961 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 962 1.1.1.1.8.2 tls "" 963 1.1.1.1.8.2 tls "cmpzv %2,%1,%0,%3") 964 1.1.1.1.8.2 tls 965 1.1.1.1.8.2 tls (define_insn "extv" 966 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 967 1.1.1.1.8.2 tls (sign_extract:SI (match_operand:QI 1 "memory_operand" "m") 968 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g") 969 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 970 1.1.1.1.8.2 tls "" 971 1.1.1.1.8.2 tls "* 972 1.1.1.1.8.2 tls { 973 1.1.1.1.8.2 tls if (! REG_P (operands[0]) || ! CONST_INT_P (operands[2]) 974 1.1.1.1.8.2 tls || ! CONST_INT_P (operands[3]) 975 1.1.1.1.8.2 tls || (INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16) 976 1.1.1.1.8.2 tls || INTVAL (operands[2]) + INTVAL (operands[3]) > 32 977 1.1.1.1.8.2 tls || side_effects_p (operands[1]) 978 1.1.1.1.8.2 tls || (MEM_P (operands[1]) 979 1.1.1.1.8.2 tls && mode_dependent_address_p (XEXP (operands[1], 0)))) 980 1.1.1.1.8.2 tls return \"extv %3,%2,%1,%0\"; 981 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 8) 982 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;cvtbl %0,%0\"; 983 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;cvtwl %0,%0\"; 984 1.1.1.1.8.2 tls }") 985 1.1.1.1.8.2 tls 986 1.1.1.1.8.2 tls (define_expand "extzv" 987 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "general_operand" "") 988 1.1.1.1.8.2 tls (zero_extract:SI (match_operand:SI 1 "general_operand" "") 989 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "") 990 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "")))] 991 1.1.1.1.8.2 tls "" 992 1.1.1.1.8.2 tls "") 993 1.1.1.1.8.2 tls 994 1.1.1.1.8.2 tls (define_insn "" 995 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 996 1.1.1.1.8.2 tls (zero_extract:SI (match_operand:QI 1 "memory_operand" "m") 997 1.1.1.1.8.2 tls (match_operand:QI 2 "general_operand" "g") 998 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT")))] 999 1.1.1.1.8.2 tls "" 1000 1.1.1.1.8.2 tls "* 1001 1.1.1.1.8.2 tls { 1002 1.1.1.1.8.2 tls if (! REG_P (operands[0]) || ! CONST_INT_P (operands[2]) 1003 1.1.1.1.8.2 tls || ! CONST_INT_P (operands[3]) 1004 1.1.1.1.8.2 tls || INTVAL (operands[2]) + INTVAL (operands[3]) > 32 1005 1.1.1.1.8.2 tls || side_effects_p (operands[1]) 1006 1.1.1.1.8.2 tls || (MEM_P (operands[1]) 1007 1.1.1.1.8.2 tls && mode_dependent_address_p (XEXP (operands[1], 0)))) 1008 1.1.1.1.8.2 tls return \"extzv %3,%2,%1,%0\"; 1009 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 8) 1010 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;movzbl %0,%0\"; 1011 1.1.1.1.8.2 tls if (INTVAL (operands[2]) == 16) 1012 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;movzwl %0,%0\"; 1013 1.1.1.1.8.2 tls if (MEM_P (operands[1]) 1014 1.1.1.1.8.2 tls && GET_CODE (XEXP (operands[1], 0)) == PLUS 1015 1.1.1.1.8.2 tls && REG_P (XEXP (XEXP (operands[1], 0), 0)) 1016 1.1.1.1.8.2 tls && CONST_INT_P (XEXP (XEXP (operands[1], 0), 1)) 1017 1.1.1.1.8.2 tls && CONST_INT_P (operands[2]) 1018 1.1.1.1.8.2 tls && CONST_INT_P (operands[3])) 1019 1.1.1.1.8.2 tls { 1020 1.1.1.1.8.2 tls HOST_WIDE_INT o = INTVAL (XEXP (XEXP (operands[1], 0), 1)); 1021 1.1.1.1.8.2 tls HOST_WIDE_INT l = INTVAL (operands[2]); 1022 1.1.1.1.8.2 tls HOST_WIDE_INT v = INTVAL (operands[3]); 1023 1.1.1.1.8.2 tls if ((o & 3) && (o & 3) * 8 + v + l <= 32) 1024 1.1.1.1.8.2 tls { 1025 1.1.1.1.8.2 tls rtx tmp; 1026 1.1.1.1.8.2 tls tmp = XEXP (XEXP (operands[1], 0), 0); 1027 1.1.1.1.8.2 tls if (o & ~3) 1028 1.1.1.1.8.2 tls tmp = gen_rtx_PLUS (SImode, tmp, GEN_INT (o & ~3)); 1029 1.1.1.1.8.2 tls operands[1] = gen_rtx_MEM (QImode, tmp); 1030 1.1.1.1.8.2 tls operands[3] = GEN_INT (v + (o & 3) * 8); 1031 1.1.1.1.8.2 tls } 1032 1.1.1.1.8.2 tls if (optimize_size) 1033 1.1.1.1.8.2 tls return \"extzv %3,%2,%1,%0\"; 1034 1.1.1.1.8.2 tls } 1035 1.1.1.1.8.2 tls return \"rotl %R3,%1,%0\;bicl2 %M2,%0\"; 1036 1.1.1.1.8.2 tls }") 1037 1.1.1.1.8.2 tls 1038 1.1.1.1.8.2 tls (define_expand "insv" 1039 1.1.1.1.8.2 tls [(set (zero_extract:SI (match_operand:SI 0 "general_operand" "") 1040 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "") 1041 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "")) 1042 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" ""))] 1043 1.1.1.1.8.2 tls "" 1044 1.1.1.1.8.2 tls "") 1045 1.1.1.1.8.2 tls 1046 1.1.1.1.8.2 tls (define_insn "" 1047 1.1.1.1.8.2 tls [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+g") 1048 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "g") 1049 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "nrmT")) 1050 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT"))] 1051 1.1.1.1.8.2 tls "" 1052 1.1.1.1.8.2 tls "* 1053 1.1.1.1.8.2 tls { 1054 1.1.1.1.8.2 tls if (MEM_P (operands[0]) 1055 1.1.1.1.8.2 tls && GET_CODE (XEXP (operands[0], 0)) == PLUS 1056 1.1.1.1.8.2 tls && REG_P (XEXP (XEXP (operands[0], 0), 0)) 1057 1.1.1.1.8.2 tls && CONST_INT_P (XEXP (XEXP (operands[0], 0), 1)) 1058 1.1.1.1.8.2 tls && CONST_INT_P (operands[1]) 1059 1.1.1.1.8.2 tls && CONST_INT_P (operands[2])) 1060 1.1.1.1.8.2 tls { 1061 1.1.1.1.8.2 tls HOST_WIDE_INT o = INTVAL (XEXP (XEXP (operands[0], 0), 1)); 1062 1.1.1.1.8.2 tls HOST_WIDE_INT v = INTVAL (operands[2]); 1063 1.1.1.1.8.2 tls HOST_WIDE_INT l = INTVAL (operands[1]); 1064 1.1.1.1.8.2 tls if ((o & 3) && (o & 3) * 8 + v + l <= 32) 1065 1.1.1.1.8.2 tls { 1066 1.1.1.1.8.2 tls rtx tmp; 1067 1.1.1.1.8.2 tls tmp = XEXP (XEXP (operands[0], 0), 0); 1068 1.1.1.1.8.2 tls if (o & ~3) 1069 1.1.1.1.8.2 tls tmp = gen_rtx_PLUS (SImode, tmp, GEN_INT (o & ~3)); 1070 1.1.1.1.8.2 tls operands[0] = gen_rtx_MEM (QImode, tmp); 1071 1.1.1.1.8.2 tls operands[2] = GEN_INT (v + (o & 3) * 8); 1072 1.1.1.1.8.2 tls } 1073 1.1.1.1.8.2 tls } 1074 1.1.1.1.8.2 tls return \"insv %3,%2,%1,%0\"; 1075 1.1.1.1.8.2 tls }") 1076 1.1.1.1.8.2 tls 1077 1.1.1.1.8.2 tls (define_insn "" 1078 1.1.1.1.8.2 tls [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") 1079 1.1.1.1.8.2 tls (match_operand:QI 1 "general_operand" "g") 1080 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "nrmT")) 1081 1.1.1.1.8.2 tls (match_operand:SI 3 "general_operand" "nrmT"))] 1082 1.1.1.1.8.2 tls "" 1083 1.1.1.1.8.2 tls "insv %3,%2,%1,%0") 1084 1.1.1.1.8.2 tls 1086 1.1.1.1.8.2 tls ;; Unconditional jump 1087 1.1.1.1.8.2 tls (define_insn "jump" 1088 1.1.1.1.8.2 tls [(set (pc) 1089 1.1.1.1.8.2 tls (label_ref (match_operand 0 "" "")))] 1090 1.1.1.1.8.2 tls "" 1091 1.1.1.1.8.2 tls "jbr %l0") 1092 1.1.1.1.8.2 tls 1093 1.1.1.1.8.2 tls ;; Conditional jumps 1094 1.1.1.1.8.2 tls 1095 1.1.1.1.8.2 tls (define_expand "cbranch<mode>4" 1096 1.1.1.1.8.2 tls [(set (cc0) 1097 1.1.1.1.8.2 tls (compare (match_operand:VAXint 1 "nonimmediate_operand" "") 1098 1.1.1.1.8.2 tls (match_operand:VAXint 2 "general_operand" ""))) 1099 1.1.1.1.8.2 tls (set (pc) 1100 1.1.1.1.8.2 tls (if_then_else 1101 1.1.1.1.8.2 tls (match_operator 0 "ordered_comparison_operator" [(cc0) 1102 1.1.1.1.8.2 tls (const_int 0)]) 1103 1.1.1.1.8.2 tls (label_ref (match_operand 3 "" "")) 1104 1.1.1.1.8.2 tls (pc)))] 1105 1.1.1.1.8.2 tls "") 1106 1.1.1.1.8.2 tls 1107 1.1.1.1.8.2 tls (define_expand "cbranch<mode>4" 1108 1.1.1.1.8.2 tls [(set (cc0) 1109 1.1.1.1.8.2 tls (compare (match_operand:VAXfp 1 "general_operand" "") 1110 1.1.1.1.8.2 tls (match_operand:VAXfp 2 "general_operand" ""))) 1111 1.1.1.1.8.2 tls (set (pc) 1112 1.1.1.1.8.2 tls (if_then_else 1113 1.1.1.1.8.2 tls (match_operator 0 "ordered_comparison_operator" [(cc0) 1114 1.1.1.1.8.2 tls (const_int 0)]) 1115 1.1.1.1.8.2 tls (label_ref (match_operand 3 "" "")) 1116 1.1.1.1.8.2 tls (pc)))] 1117 1.1.1.1.8.2 tls "") 1118 1.1.1.1.8.2 tls 1119 1.1.1.1.8.2 tls (define_insn "*branch" 1120 1.1.1.1.8.2 tls [(set (pc) 1121 1.1.1.1.8.2 tls (if_then_else (match_operator 0 "ordered_comparison_operator" 1122 1.1.1.1.8.2 tls [(cc0) 1123 1.1.1.1.8.2 tls (const_int 0)]) 1124 1.1.1.1.8.2 tls (label_ref (match_operand 1 "" "")) 1125 1.1.1.1.8.2 tls (pc)))] 1126 1.1.1.1.8.2 tls "" 1127 1.1.1.1.8.2 tls "j%c0 %l1") 1128 1.1.1.1.8.2 tls 1129 1.1.1.1.8.2 tls ;; Recognize reversed jumps. 1130 1.1.1.1.8.2 tls (define_insn "*branch_reversed" 1131 1.1.1.1.8.2 tls [(set (pc) 1132 1.1.1.1.8.2 tls (if_then_else (match_operator 0 "ordered_comparison_operator" 1133 1.1.1.1.8.2 tls [(cc0) 1134 1.1.1.1.8.2 tls (const_int 0)]) 1135 1.1.1.1.8.2 tls (pc) 1136 1.1.1.1.8.2 tls (label_ref (match_operand 1 "" ""))))] 1137 1.1.1.1.8.2 tls "" 1138 1.1.1.1.8.2 tls "j%C0 %l1") ; %C0 negates condition 1139 1.1.1.1.8.2 tls 1141 1.1.1.1.8.2 tls ;; Recognize jbs, jlbs, jbc and jlbc instructions. Note that the operand 1142 1.1.1.1.8.2 tls ;; of jlbs and jlbc insns are SImode in the hardware. However, if it is 1143 1.1.1.1.8.2 tls ;; memory, we use QImode in the insn. So we can't use those instructions 1144 1.1.1.1.8.2 tls ;; for mode-dependent addresses. 1145 1.1.1.1.8.2 tls 1146 1.1.1.1.8.2 tls (define_insn "" 1147 1.1.1.1.8.2 tls [(set (pc) 1148 1.1.1.1.8.2 tls (if_then_else 1149 1.1.1.1.8.2 tls (ne (zero_extract:SI (match_operand:QI 0 "memory_operand" "Q,g") 1150 1.1.1.1.8.2 tls (const_int 1) 1151 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "I,nrmT")) 1152 1.1.1.1.8.2 tls (const_int 0)) 1153 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1154 1.1.1.1.8.2 tls (pc)))] 1155 1.1.1.1.8.2 tls "" 1156 1.1.1.1.8.2 tls "@ 1157 1.1.1.1.8.2 tls jlbs %0,%l2 1158 1.1.1.1.8.2 tls jbs %1,%0,%l2") 1159 1.1.1.1.8.2 tls 1160 1.1.1.1.8.2 tls (define_insn "" 1161 1.1.1.1.8.2 tls [(set (pc) 1162 1.1.1.1.8.2 tls (if_then_else 1163 1.1.1.1.8.2 tls (eq (zero_extract:SI (match_operand:QI 0 "memory_operand" "Q,g") 1164 1.1.1.1.8.2 tls (const_int 1) 1165 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "I,nrmT")) 1166 1.1.1.1.8.2 tls (const_int 0)) 1167 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1168 1.1.1.1.8.2 tls (pc)))] 1169 1.1.1.1.8.2 tls "" 1170 1.1.1.1.8.2 tls "@ 1171 1.1.1.1.8.2 tls jlbc %0,%l2 1172 1.1.1.1.8.2 tls jbc %1,%0,%l2") 1173 1.1.1.1.8.2 tls 1174 1.1.1.1.8.2 tls (define_insn "" 1175 1.1.1.1.8.2 tls [(set (pc) 1176 1.1.1.1.8.2 tls (if_then_else 1177 1.1.1.1.8.2 tls (ne (zero_extract:SI (match_operand:SI 0 "register_operand" "r,r") 1178 1.1.1.1.8.2 tls (const_int 1) 1179 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "I,nrmT")) 1180 1.1.1.1.8.2 tls (const_int 0)) 1181 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1182 1.1.1.1.8.2 tls (pc)))] 1183 1.1.1.1.8.2 tls "" 1184 1.1.1.1.8.2 tls "@ 1185 1.1.1.1.8.2 tls jlbs %0,%l2 1186 1.1.1.1.8.2 tls jbs %1,%0,%l2") 1187 1.1.1.1.8.2 tls 1188 1.1.1.1.8.2 tls (define_insn "" 1189 1.1.1.1.8.2 tls [(set (pc) 1190 1.1.1.1.8.2 tls (if_then_else 1191 1.1.1.1.8.2 tls (eq (zero_extract:SI (match_operand:SI 0 "register_operand" "r,r") 1192 1.1.1.1.8.2 tls (const_int 1) 1193 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "I,nrmT")) 1194 1.1.1.1.8.2 tls (const_int 0)) 1195 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1196 1.1.1.1.8.2 tls (pc)))] 1197 1.1.1.1.8.2 tls "" 1198 1.1.1.1.8.2 tls "@ 1199 1.1.1.1.8.2 tls jlbc %0,%l2 1200 1.1.1.1.8.2 tls jbc %1,%0,%l2") 1201 1.1.1.1.8.2 tls 1203 1.1.1.1.8.2 tls ;; Subtract-and-jump and Add-and-jump insns. 1204 1.1.1.1.8.2 tls ;; These are not used when output is for the Unix assembler 1205 1.1.1.1.8.2 tls ;; because it does not know how to modify them to reach far. 1206 1.1.1.1.8.2 tls 1207 1.1.1.1.8.2 tls ;; Normal sob insns. 1208 1.1.1.1.8.2 tls 1209 1.1.1.1.8.2 tls (define_insn "" 1210 1.1.1.1.8.2 tls [(set (pc) 1211 1.1.1.1.8.2 tls (if_then_else 1212 1.1.1.1.8.2 tls (gt (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") 1213 1.1.1.1.8.2 tls (const_int -1)) 1214 1.1.1.1.8.2 tls (const_int 0)) 1215 1.1.1.1.8.2 tls (label_ref (match_operand 1 "" "")) 1216 1.1.1.1.8.2 tls (pc))) 1217 1.1.1.1.8.2 tls (set (match_dup 0) 1218 1.1.1.1.8.2 tls (plus:SI (match_dup 0) 1219 1.1.1.1.8.2 tls (const_int -1)))] 1220 1.1.1.1.8.2 tls "!TARGET_UNIX_ASM" 1221 1.1.1.1.8.2 tls "jsobgtr %0,%l1") 1222 1.1.1.1.8.2 tls 1223 1.1.1.1.8.2 tls (define_insn "" 1224 1.1.1.1.8.2 tls [(set (pc) 1225 1.1.1.1.8.2 tls (if_then_else 1226 1.1.1.1.8.2 tls (ge (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") 1227 1.1.1.1.8.2 tls (const_int -1)) 1228 1.1.1.1.8.2 tls (const_int 0)) 1229 1.1.1.1.8.2 tls (label_ref (match_operand 1 "" "")) 1230 1.1.1.1.8.2 tls (pc))) 1231 1.1.1.1.8.2 tls (set (match_dup 0) 1232 1.1.1.1.8.2 tls (plus:SI (match_dup 0) 1233 1.1.1.1.8.2 tls (const_int -1)))] 1234 1.1.1.1.8.2 tls "!TARGET_UNIX_ASM" 1235 1.1.1.1.8.2 tls "jsobgeq %0,%l1") 1236 1.1.1.1.8.2 tls 1237 1.1.1.1.8.2 tls ;; Normal aob insns. Define a version for when operands[1] is a constant. 1238 1.1.1.1.8.2 tls (define_insn "" 1239 1.1.1.1.8.2 tls [(set (pc) 1240 1.1.1.1.8.2 tls (if_then_else 1241 1.1.1.1.8.2 tls (lt (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") 1242 1.1.1.1.8.2 tls (const_int 1)) 1243 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "nrmT")) 1244 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1245 1.1.1.1.8.2 tls (pc))) 1246 1.1.1.1.8.2 tls (set (match_dup 0) 1247 1.1.1.1.8.2 tls (plus:SI (match_dup 0) 1248 1.1.1.1.8.2 tls (const_int 1)))] 1249 1.1.1.1.8.2 tls "!TARGET_UNIX_ASM" 1250 1.1.1.1.8.2 tls "jaoblss %1,%0,%l2") 1251 1.1.1.1.8.2 tls 1252 1.1.1.1.8.2 tls (define_insn "" 1253 1.1.1.1.8.2 tls [(set (pc) 1254 1.1.1.1.8.2 tls (if_then_else 1255 1.1.1.1.8.2 tls (lt (match_operand:SI 0 "nonimmediate_operand" "+g") 1256 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "nrmT")) 1257 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1258 1.1.1.1.8.2 tls (pc))) 1259 1.1.1.1.8.2 tls (set (match_dup 0) 1260 1.1.1.1.8.2 tls (plus:SI (match_dup 0) 1261 1.1.1.1.8.2 tls (const_int 1)))] 1262 1.1.1.1.8.2 tls "!TARGET_UNIX_ASM && CONST_INT_P (operands[1])" 1263 1.1.1.1.8.2 tls "jaoblss %P1,%0,%l2") 1264 1.1.1.1.8.2 tls 1265 1.1.1.1.8.2 tls (define_insn "" 1266 1.1.1.1.8.2 tls [(set (pc) 1267 1.1.1.1.8.2 tls (if_then_else 1268 1.1.1.1.8.2 tls (le (plus:SI (match_operand:SI 0 "nonimmediate_operand" "+g") 1269 1.1.1.1.8.2 tls (const_int 1)) 1270 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "nrmT")) 1271 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1272 1.1.1.1.8.2 tls (pc))) 1273 1.1.1.1.8.2 tls (set (match_dup 0) 1274 1.1.1.1.8.2 tls (plus:SI (match_dup 0) 1275 1.1.1.1.8.2 tls (const_int 1)))] 1276 1.1.1.1.8.2 tls "!TARGET_UNIX_ASM" 1277 1.1.1.1.8.2 tls "jaobleq %1,%0,%l2") 1278 1.1.1.1.8.2 tls 1279 1.1.1.1.8.2 tls (define_insn "" 1280 1.1.1.1.8.2 tls [(set (pc) 1281 1.1.1.1.8.2 tls (if_then_else 1282 1.1.1.1.8.2 tls (le (match_operand:SI 0 "nonimmediate_operand" "+g") 1283 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "nrmT")) 1284 1.1.1.1.8.2 tls (label_ref (match_operand 2 "" "")) 1285 1.1.1.1.8.2 tls (pc))) 1286 1.1.1.1.8.2 tls (set (match_dup 0) 1287 1.1.1.1.8.2 tls (plus:SI (match_dup 0) 1288 1.1.1.1.8.2 tls (const_int 1)))] 1289 1.1.1.1.8.2 tls "!TARGET_UNIX_ASM && CONST_INT_P (operands[1])" 1290 1.1.1.1.8.2 tls "jaobleq %P1,%0,%l2") 1291 1.1.1.1.8.2 tls 1292 1.1.1.1.8.2 tls ;; Something like a sob insn, but compares against -1. 1293 1.1.1.1.8.2 tls ;; This finds `while (foo--)' which was changed to `while (--foo != -1)'. 1294 1.1.1.1.8.2 tls 1295 1.1.1.1.8.2 tls (define_insn "" 1296 1.1.1.1.8.2 tls [(set (pc) 1297 1.1.1.1.8.2 tls (if_then_else 1298 1.1.1.1.8.2 tls (ne (match_operand:SI 0 "nonimmediate_operand" "+g") 1299 1.1.1.1.8.2 tls (const_int 0)) 1300 1.1.1.1.8.2 tls (label_ref (match_operand 1 "" "")) 1301 1.1.1.1.8.2 tls (pc))) 1302 1.1.1.1.8.2 tls (set (match_dup 0) 1303 1.1.1.1.8.2 tls (plus:SI (match_dup 0) 1304 1.1.1.1.8.2 tls (const_int -1)))] 1305 1.1.1.1.8.2 tls "" 1306 1.1.1.1.8.2 tls "decl %0\;jgequ %l1") 1307 1.1.1.1.8.2 tls 1309 1.1.1.1.8.2 tls (define_expand "call_pop" 1310 1.1.1.1.8.2 tls [(parallel [(call (match_operand:QI 0 "memory_operand" "") 1311 1.1.1.1.8.2 tls (match_operand:SI 1 "const_int_operand" "")) 1312 1.1.1.1.8.2 tls (set (reg:SI VAX_SP_REGNUM) 1313 1.1.1.1.8.2 tls (plus:SI (reg:SI VAX_SP_REGNUM) 1314 1.1.1.1.8.2 tls (match_operand:SI 3 "immediate_operand" "")))])] 1315 1.1.1.1.8.2 tls "" 1316 1.1.1.1.8.2 tls { 1317 1.1.1.1.8.2 tls gcc_assert (INTVAL (operands[3]) <= 255 * 4 && INTVAL (operands[3]) % 4 == 0); 1318 1.1.1.1.8.2 tls 1319 1.1.1.1.8.2 tls /* Operand 1 is the number of bytes to be popped by DW_CFA_GNU_args_size 1320 1.1.1.1.8.2 tls during EH unwinding. We must include the argument count pushed by 1321 1.1.1.1.8.2 tls the calls instruction. */ 1322 1.1.1.1.8.2 tls operands[1] = GEN_INT (INTVAL (operands[3]) + 4); 1323 1.1.1.1.8.2 tls }) 1324 1.1.1.1.8.2 tls 1325 1.1.1.1.8.2 tls (define_insn "*call_pop" 1326 1.1.1.1.8.2 tls [(call (match_operand:QI 0 "memory_operand" "m") 1327 1.1.1.1.8.2 tls (match_operand:SI 1 "const_int_operand" "n")) 1328 1.1.1.1.8.2 tls (set (reg:SI VAX_SP_REGNUM) (plus:SI (reg:SI VAX_SP_REGNUM) 1329 1.1.1.1.8.2 tls (match_operand:SI 2 "immediate_operand" "i")))] 1330 1.1.1.1.8.2 tls "" 1331 1.1.1.1.8.2 tls { 1332 1.1.1.1.8.2 tls operands[1] = GEN_INT ((INTVAL (operands[1]) - 4) / 4); 1333 1.1.1.1.8.2 tls return "calls %1,%0"; 1334 1.1.1.1.8.2 tls }) 1335 1.1.1.1.8.2 tls 1336 1.1.1.1.8.2 tls (define_expand "call_value_pop" 1337 1.1.1.1.8.2 tls [(parallel [(set (match_operand 0 "" "") 1338 1.1.1.1.8.2 tls (call (match_operand:QI 1 "memory_operand" "") 1339 1.1.1.1.8.2 tls (match_operand:SI 2 "const_int_operand" ""))) 1340 1.1.1.1.8.2 tls (set (reg:SI VAX_SP_REGNUM) 1341 1.1.1.1.8.2 tls (plus:SI (reg:SI VAX_SP_REGNUM) 1342 1.1.1.1.8.2 tls (match_operand:SI 4 "immediate_operand" "")))])] 1343 1.1.1.1.8.2 tls "" 1344 1.1.1.1.8.2 tls { 1345 1.1.1.1.8.2 tls gcc_assert (INTVAL (operands[4]) <= 255 * 4 && INTVAL (operands[4]) % 4 == 0); 1346 1.1.1.1.8.2 tls 1347 1.1.1.1.8.2 tls /* Operand 2 is the number of bytes to be popped by DW_CFA_GNU_args_size 1348 1.1.1.1.8.2 tls during EH unwinding. We must include the argument count pushed by 1349 1.1.1.1.8.2 tls the calls instruction. */ 1350 1.1.1.1.8.2 tls operands[2] = GEN_INT (INTVAL (operands[4]) + 4); 1351 1.1.1.1.8.2 tls }) 1352 1.1.1.1.8.2 tls 1353 1.1.1.1.8.2 tls (define_insn "*call_value_pop" 1354 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 1355 1.1.1.1.8.2 tls (call (match_operand:QI 1 "memory_operand" "m") 1356 1.1.1.1.8.2 tls (match_operand:SI 2 "const_int_operand" "n"))) 1357 1.1.1.1.8.2 tls (set (reg:SI VAX_SP_REGNUM) (plus:SI (reg:SI VAX_SP_REGNUM) 1358 1.1.1.1.8.2 tls (match_operand:SI 3 "immediate_operand" "i")))] 1359 1.1.1.1.8.2 tls "" 1360 1.1.1.1.8.2 tls "* 1361 1.1.1.1.8.2 tls { 1362 1.1.1.1.8.2 tls operands[2] = GEN_INT ((INTVAL (operands[2]) - 4) / 4); 1363 1.1.1.1.8.2 tls return \"calls %2,%1\"; 1364 1.1.1.1.8.2 tls }") 1365 1.1.1.1.8.2 tls 1366 1.1.1.1.8.2 tls (define_expand "call" 1367 1.1.1.1.8.2 tls [(call (match_operand:QI 0 "memory_operand" "") 1368 1.1.1.1.8.2 tls (match_operand:SI 1 "const_int_operand" ""))] 1369 1.1.1.1.8.2 tls "" 1370 1.1.1.1.8.2 tls " 1371 1.1.1.1.8.2 tls { 1372 1.1.1.1.8.2 tls /* Operand 1 is the number of bytes to be popped by DW_CFA_GNU_args_size 1373 1.1.1.1.8.2 tls during EH unwinding. We must include the argument count pushed by 1374 1.1.1.1.8.2 tls the calls instruction. */ 1375 1.1.1.1.8.2 tls operands[1] = GEN_INT (INTVAL (operands[1]) + 4); 1376 1.1.1.1.8.2 tls }") 1377 1.1.1.1.8.2 tls 1378 1.1.1.1.8.2 tls (define_insn "*call" 1379 1.1.1.1.8.2 tls [(call (match_operand:QI 0 "memory_operand" "m") 1380 1.1.1.1.8.2 tls (match_operand:SI 1 "const_int_operand" ""))] 1381 1.1.1.1.8.2 tls "" 1382 1.1.1.1.8.2 tls "calls $0,%0") 1383 1.1.1.1.8.2 tls 1384 1.1.1.1.8.2 tls (define_expand "call_value" 1385 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 1386 1.1.1.1.8.2 tls (call (match_operand:QI 1 "memory_operand" "") 1387 1.1.1.1.8.2 tls (match_operand:SI 2 "const_int_operand" "")))] 1388 1.1.1.1.8.2 tls "" 1389 1.1.1.1.8.2 tls " 1390 1.1.1.1.8.2 tls { 1391 1.1.1.1.8.2 tls /* Operand 2 is the number of bytes to be popped by DW_CFA_GNU_args_size 1392 1.1.1.1.8.2 tls during EH unwinding. We must include the argument count pushed by 1393 1.1.1.1.8.2 tls the calls instruction. */ 1394 1.1.1.1.8.2 tls operands[2] = GEN_INT (INTVAL (operands[2]) + 4); 1395 1.1.1.1.8.2 tls }") 1396 1.1.1.1.8.2 tls 1397 1.1.1.1.8.2 tls (define_insn "*call_value" 1398 1.1.1.1.8.2 tls [(set (match_operand 0 "" "") 1399 1.1.1.1.8.2 tls (call (match_operand:QI 1 "memory_operand" "m") 1400 1.1.1.1.8.2 tls (match_operand:SI 2 "const_int_operand" "")))] 1401 1.1.1.1.8.2 tls "" 1402 1.1.1.1.8.2 tls "calls $0,%1") 1403 1.1.1.1.8.2 tls 1404 1.1.1.1.8.2 tls ;; Call subroutine returning any type. 1405 1.1.1.1.8.2 tls 1406 1.1.1.1.8.2 tls (define_expand "untyped_call" 1407 1.1.1.1.8.2 tls [(parallel [(call (match_operand 0 "" "") 1408 1.1.1.1.8.2 tls (const_int 0)) 1409 1.1.1.1.8.2 tls (match_operand 1 "" "") 1410 1.1.1.1.8.2 tls (match_operand 2 "" "")])] 1411 1.1.1.1.8.2 tls "" 1412 1.1.1.1.8.2 tls " 1413 1.1.1.1.8.2 tls { 1414 1.1.1.1.8.2 tls int i; 1415 1.1.1.1.8.2 tls 1416 1.1.1.1.8.2 tls emit_call_insn (gen_call_pop (operands[0], const0_rtx, NULL, const0_rtx)); 1417 1.1.1.1.8.2 tls 1418 1.1.1.1.8.2 tls for (i = 0; i < XVECLEN (operands[2], 0); i++) 1419 1.1.1.1.8.2 tls { 1420 1.1.1.1.8.2 tls rtx set = XVECEXP (operands[2], 0, i); 1421 1.1.1.1.8.2 tls emit_move_insn (SET_DEST (set), SET_SRC (set)); 1422 1.1.1.1.8.2 tls } 1423 1.1.1.1.8.2 tls 1424 1.1.1.1.8.2 tls /* The optimizer does not know that the call sets the function value 1425 1.1.1.1.8.2 tls registers we stored in the result block. We avoid problems by 1426 1.1.1.1.8.2 tls claiming that all hard registers are used and clobbered at this 1427 1.1.1.1.8.2 tls point. */ 1428 1.1.1.1.8.2 tls emit_insn (gen_blockage ()); 1429 1.1.1.1.8.2 tls 1430 1.1.1.1.8.2 tls DONE; 1431 1.1.1.1.8.2 tls }") 1432 1.1.1.1.8.2 tls 1433 1.1.1.1.8.2 tls ;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and 1434 1.1.1.1.8.2 tls ;; all of memory. This blocks insns from being moved across this point. 1435 1.1.1.1.8.2 tls 1436 1.1.1.1.8.2 tls (define_insn "blockage" 1437 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] VUNSPEC_BLOCKAGE)] 1438 1.1.1.1.8.2 tls "" 1439 1.1.1.1.8.2 tls "") 1440 1.1.1.1.8.2 tls 1441 1.1.1.1.8.2 tls (define_insn "return" 1442 1.1.1.1.8.2 tls [(return)] 1443 1.1.1.1.8.2 tls "" 1444 1.1.1.1.8.2 tls "ret") 1445 1.1.1.1.8.2 tls 1446 1.1.1.1.8.2 tls (define_expand "epilogue" 1447 1.1.1.1.8.2 tls [(return)] 1448 1.1.1.1.8.2 tls "" 1449 1.1.1.1.8.2 tls " 1450 1.1.1.1.8.2 tls { 1451 1.1.1.1.8.2 tls emit_jump_insn (gen_return ()); 1452 1.1.1.1.8.2 tls DONE; 1453 1.1.1.1.8.2 tls }") 1454 1.1.1.1.8.2 tls 1455 1.1.1.1.8.2 tls (define_insn "nop" 1456 1.1.1.1.8.2 tls [(const_int 0)] 1457 1.1.1.1.8.2 tls "" 1458 1.1.1.1.8.2 tls "nop") 1459 1.1.1.1.8.2 tls 1460 1.1.1.1.8.2 tls ;; This had a wider constraint once, and it had trouble. 1461 1.1.1.1.8.2 tls ;; If you are tempted to try `g', please don't--it's not worth 1462 1.1.1.1.8.2 tls ;; the risk we will reopen the same bug. 1463 1.1.1.1.8.2 tls (define_insn "indirect_jump" 1464 1.1.1.1.8.2 tls [(set (pc) (match_operand:SI 0 "register_operand" "r"))] 1465 1.1.1.1.8.2 tls "" 1466 1.1.1.1.8.2 tls "jmp (%0)") 1467 1.1.1.1.8.2 tls 1468 1.1.1.1.8.2 tls ;; This is here to accept 5 arguments (as passed by expand_end_case) 1469 1.1.1.1.8.2 tls ;; and pass the first 4 along to the casesi1 pattern that really does 1470 1.1.1.1.8.2 tls ;; the actual casesi work. We emit a jump here to the default label 1471 1.1.1.1.8.2 tls ;; _before_ the casesi so that we can be sure that the casesi never 1472 1.1.1.1.8.2 tls ;; drops through. 1473 1.1.1.1.8.2 tls ;; This is suboptimal perhaps, but so is much of the rest of this 1474 1.1.1.1.8.2 tls ;; machine description. For what it's worth, HPPA uses the same trick. 1475 1.1.1.1.8.2 tls ;; 1476 1.1.1.1.8.2 tls ;; operand 0 is index 1477 1.1.1.1.8.2 tls ;; operand 1 is the minimum bound (a const_int) 1478 1.1.1.1.8.2 tls ;; operand 2 is the maximum bound - minimum bound + 1 (also a const_int) 1479 1.1.1.1.8.2 tls ;; operand 3 is CODE_LABEL for the table; 1480 1.1.1.1.8.2 tls ;; operand 4 is the CODE_LABEL to go to if index out of range (ie. default). 1481 1.1.1.1.8.2 tls ;; 1482 1.1.1.1.8.2 tls ;; We emit: 1483 1.1.1.1.8.2 tls ;; i = index - minimum_bound 1484 1.1.1.1.8.2 tls ;; if (i > (maximum_bound - minimum_bound + 1) goto default; 1485 1.1.1.1.8.2 tls ;; casesi (i, 0, table); 1486 1.1.1.1.8.2 tls ;; 1487 1.1.1.1.8.2 tls (define_expand "casesi" 1488 1.1.1.1.8.2 tls [(match_operand:SI 0 "general_operand" "") 1489 1.1.1.1.8.2 tls (match_operand:SI 1 "general_operand" "") 1490 1.1.1.1.8.2 tls (match_operand:SI 2 "general_operand" "") 1491 1.1.1.1.8.2 tls (match_operand 3 "" "") 1492 1.1.1.1.8.2 tls (match_operand 4 "" "")] 1493 1.1.1.1.8.2 tls "" 1494 1.1.1.1.8.2 tls { 1495 1.1.1.1.8.2 tls rtx test; 1496 1.1.1.1.8.2 tls 1497 1.1.1.1.8.2 tls /* i = index - minimum_bound; 1498 1.1.1.1.8.2 tls But only if the lower bound is not already zero. */ 1499 1.1.1.1.8.2 tls if (operands[1] != const0_rtx) 1500 1.1.1.1.8.2 tls { 1501 1.1.1.1.8.2 tls rtx index = gen_reg_rtx (SImode); 1502 1.1.1.1.8.2 tls emit_insn (gen_addsi3 (index, 1503 1.1.1.1.8.2 tls operands[0], 1504 1.1.1.1.8.2 tls GEN_INT (-INTVAL (operands[1])))); 1505 1.1.1.1.8.2 tls operands[0] = index; 1506 1.1.1.1.8.2 tls } 1507 1.1.1.1.8.2 tls 1508 1.1.1.1.8.2 tls /* if (i > (maximum_bound - minimum_bound + 1)) goto default; */ 1509 1.1.1.1.8.2 tls test = gen_rtx_fmt_ee (GTU, VOIDmode, operands[0], operands[2]); 1510 1.1.1.1.8.2 tls emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2], operands[4])); 1511 1.1.1.1.8.2 tls 1512 1.1.1.1.8.2 tls /* casesi (i, 0, table); */ 1513 1.1.1.1.8.2 tls emit_jump_insn (gen_casesi1 (operands[0], operands[2], operands[3])); 1514 1.1.1.1.8.2 tls DONE; 1515 1.1.1.1.8.2 tls }) 1516 1.1.1.1.8.2 tls 1517 1.1.1.1.8.2 tls ;; This insn is a bit of a lier. It actually falls through if no case 1518 1.1.1.1.8.2 tls ;; matches. But, we prevent that from ever happening by emitting a jump 1519 1.1.1.1.8.2 tls ;; before this, see the define_expand above. 1520 1.1.1.1.8.2 tls (define_insn "casesi1" 1521 1.1.1.1.8.2 tls [(match_operand:SI 1 "const_int_operand" "n") 1522 1.1.1.1.8.2 tls (set (pc) 1523 1.1.1.1.8.2 tls (plus:SI (sign_extend:SI 1524 1.1.1.1.8.2 tls (mem:HI (plus:SI (mult:SI (match_operand:SI 0 "general_operand" "nrmT") 1525 1.1.1.1.8.2 tls (const_int 2)) 1526 1.1.1.1.8.2 tls (pc)))) 1527 1.1.1.1.8.2 tls (label_ref:SI (match_operand 2 "" ""))))] 1528 1.1.1.1.8.2 tls "" 1529 1.1.1.1.8.2 tls "casel %0,$0,%1") 1530 1.1.1.1.8.2 tls 1532 1.1.1.1.8.2 tls (define_insn "pushextsym" 1533 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "push_operand" "=g") 1534 1.1.1.1.8.2 tls (match_operand:SI 1 "external_symbolic_operand" "i"))] 1535 1.1.1.1.8.2 tls "" 1536 1.1.1.1.8.2 tls "pushab %a1") 1537 1.1.1.1.8.2 tls 1538 1.1.1.1.8.2 tls (define_insn "movextsym" 1539 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 1540 1.1.1.1.8.2 tls (match_operand:SI 1 "external_symbolic_operand" "i"))] 1541 1.1.1.1.8.2 tls "" 1542 1.1.1.1.8.2 tls "movab %a1,%0") 1543 1.1.1.1.8.2 tls 1544 1.1.1.1.8.2 tls (define_insn "pushlclsym" 1545 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "push_operand" "=g") 1546 1.1.1.1.8.2 tls (match_operand:SI 1 "local_symbolic_operand" "i"))] 1547 1.1.1.1.8.2 tls "" 1548 1.1.1.1.8.2 tls "pushab %a1") 1549 1.1.1.1.8.2 tls 1550 1.1.1.1.8.2 tls (define_insn "movlclsym" 1551 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 1552 1.1.1.1.8.2 tls (match_operand:SI 1 "local_symbolic_operand" "i"))] 1553 1.1.1.1.8.2 tls "" 1554 1.1.1.1.8.2 tls "movab %a1,%0") 1555 1.1.1.1.8.2 tls 1557 1.1.1.1.8.2 tls ;;- load or push effective address 1558 1.1.1.1.8.2 tls ;; These come after the move and add/sub patterns 1559 1.1.1.1.8.2 tls ;; because we don't want pushl $1 turned into pushad 1. 1560 1.1.1.1.8.2 tls ;; or addl3 r1,r2,r3 turned into movab 0(r1)[r2],r3. 1561 1.1.1.1.8.2 tls 1562 1.1.1.1.8.2 tls ;; It does not work to use constraints to distinguish pushes from moves, 1563 1.1.1.1.8.2 tls ;; because < matches any autodecrement, not just a push. 1564 1.1.1.1.8.2 tls 1565 1.1.1.1.8.2 tls (define_insn "pushaddr<mode>" 1566 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "push_operand" "=g") 1567 1.1.1.1.8.2 tls (match_operand:VAXintQHSD 1 "address_operand" "p"))] 1568 1.1.1.1.8.2 tls "" 1569 1.1.1.1.8.2 tls "pusha<VAXintQHSD:isfx> %a1") 1570 1.1.1.1.8.2 tls 1571 1.1.1.1.8.2 tls (define_insn "movaddr<mode>" 1572 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 1573 1.1.1.1.8.2 tls (match_operand:VAXintQHSD 1 "address_operand" "p"))] 1574 1.1.1.1.8.2 tls "" 1575 1.1.1.1.8.2 tls "mova<VAXintQHSD:isfx> %a1,%0") 1576 1.1.1.1.8.2 tls 1577 1.1.1.1.8.2 tls (define_insn "pushaddr<mode>" 1578 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "push_operand" "=g") 1579 1.1.1.1.8.2 tls (match_operand:VAXfp 1 "address_operand" "p"))] 1580 1.1.1.1.8.2 tls "" 1581 1.1.1.1.8.2 tls "pusha<VAXfp:fsfx> %a1") 1582 1.1.1.1.8.2 tls 1583 1.1.1.1.8.2 tls (define_insn "movaddr<mode>" 1584 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=g") 1585 1.1.1.1.8.2 tls (match_operand:VAXfp 1 "address_operand" "p"))] 1586 1.1.1.1.8.2 tls "" 1587 1.1.1.1.8.2 tls "mova<VAXfp:fsfx> %a1,%0") 1588 1.1.1.1.8.2 tls 1590 1.1.1.1.8.2 tls ;; These used to be peepholes, but it is more straightforward to do them 1591 1.1.1.1.8.2 tls ;; as single insns. However, we must force the output to be a register 1592 1.1.1.1.8.2 tls ;; if it is not an offsettable address so that we know that we can assign 1593 1.1.1.1.8.2 tls ;; to it twice. 1594 1.1.1.1.8.2 tls 1595 1.1.1.1.8.2 tls ;; If we had a good way of evaluating the relative costs, these could be 1596 1.1.1.1.8.2 tls ;; machine-independent. 1597 1.1.1.1.8.2 tls 1598 1.1.1.1.8.2 tls ;; Optimize extzv ...,z; andl2 ...,z 1599 1.1.1.1.8.2 tls ;; or ashl ...,z; andl2 ...,z 1600 1.1.1.1.8.2 tls ;; with other operands constant. This is what the combiner converts the 1601 1.1.1.1.8.2 tls ;; above sequences to before attempting to recognize the new insn. 1602 1.1.1.1.8.2 tls 1603 1.1.1.1.8.2 tls (define_insn "" 1604 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=ro") 1605 1.1.1.1.8.2 tls (and:SI (ashiftrt:SI (match_operand:SI 1 "general_operand" "nrmT") 1606 1.1.1.1.8.2 tls (match_operand:QI 2 "const_int_operand" "n")) 1607 1.1.1.1.8.2 tls (match_operand:SI 3 "const_int_operand" "n")))] 1608 1.1.1.1.8.2 tls "(INTVAL (operands[3]) & ~((1 << (32 - INTVAL (operands[2]))) - 1)) == 0" 1609 1.1.1.1.8.2 tls "* 1610 1.1.1.1.8.2 tls { 1611 1.1.1.1.8.2 tls unsigned long mask1 = INTVAL (operands[3]); 1612 1.1.1.1.8.2 tls unsigned long mask2 = (1 << (32 - INTVAL (operands[2]))) - 1; 1613 1.1.1.1.8.2 tls 1614 1.1.1.1.8.2 tls if ((mask1 & mask2) != mask1) 1615 1.1.1.1.8.2 tls operands[3] = GEN_INT (mask1 & mask2); 1616 1.1.1.1.8.2 tls 1617 1.1.1.1.8.2 tls return \"rotl %R2,%1,%0\;bicl2 %N3,%0\"; 1618 1.1.1.1.8.2 tls }") 1619 1.1.1.1.8.2 tls 1620 1.1.1.1.8.2 tls ;; left-shift and mask 1621 1.1.1.1.8.2 tls ;; The only case where `ashl' is better is if the mask only turns off 1622 1.1.1.1.8.2 tls ;; bits that the ashl would anyways, in which case it should have been 1623 1.1.1.1.8.2 tls ;; optimized away. 1624 1.1.1.1.8.2 tls 1625 1.1.1.1.8.2 tls (define_insn "" 1626 1.1.1.1.8.2 tls [(set (match_operand:SI 0 "nonimmediate_operand" "=ro") 1627 1.1.1.1.8.2 tls (and:SI (ashift:SI (match_operand:SI 1 "general_operand" "nrmT") 1628 1.1.1.1.8.2 tls (match_operand:QI 2 "const_int_operand" "n")) 1629 1.1.1.1.8.2 tls (match_operand:SI 3 "const_int_operand" "n")))] 1630 1.1.1.1.8.2 tls "" 1631 1.1.1.1.8.2 tls "* 1632 1.1.1.1.8.2 tls { 1633 1.1.1.1.8.2 tls operands[3] 1634 1.1.1.1.8.2 tls = GEN_INT (INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); 1635 1.1.1.1.8.2 tls return \"rotl %2,%1,%0\;bicl2 %N3,%0\"; 1636 1.1.1.1.8.2 tls }") 1637 1.1.1.1.8.2 tls 1638 1.1.1.1.8.2 tls ;; Instruction sequence to sync the VAX instruction stream. 1639 1.1.1.1.8.2 tls (define_insn "sync_istream" 1640 1.1.1.1.8.2 tls [(unspec_volatile [(const_int 0)] VUNSPEC_SYNC_ISTREAM)] 1641 1.1.1.1.8.2 tls "" 1642 1.1.1.1.8.2 tls "movpsl -(%|sp)\;pushal 1(%|pc)\;rei") 1643 1.1.1.1.8.2 tls 1644 1.1.1.1.8.2 tls (define_expand "nonlocal_goto" 1645 1.1.1.1.8.2 tls [(use (match_operand 0 "general_operand" "")) 1646 1.1.1.1.8.2 tls (use (match_operand 1 "general_operand" "")) 1647 1.1.1.1.8.2 tls (use (match_operand 2 "general_operand" "")) 1648 1.1.1.1.8.2 tls (use (match_operand 3 "general_operand" ""))] 1649 1.1.1.1.8.2 tls "" 1650 1.1.1.1.8.2 tls { 1651 rtx lab = operands[1]; 1652 rtx stack = operands[2]; 1653 rtx fp = operands[3]; 1654 1655 emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode))); 1656 emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx)); 1657 1658 emit_move_insn (hard_frame_pointer_rtx, fp); 1659 emit_stack_restore (SAVE_NONLOCAL, stack, NULL_RTX); 1660 1661 emit_use (hard_frame_pointer_rtx); 1662 emit_use (stack_pointer_rtx); 1663 1664 /* We'll convert this to direct jump via a peephole optimization. */ 1665 emit_indirect_jump (copy_to_reg (lab)); 1666 emit_barrier (); 1667 DONE; 1668 }) 1669 1670 (include "builtins.md") 1671
Indexes created Thu Sep 10 00:26:39 UTC 2026