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visium.h revision 1.5
      1  1.1  mrg /* Definitions of target machine for Visium.
      2  1.5  mrg    Copyright (C) 2002-2019 Free Software Foundation, Inc.
      3  1.1  mrg    Contributed by C.Nettleton, J.P.Parkes and P.Garbett.
      4  1.1  mrg 
      5  1.1  mrg    This file is part of GCC.
      6  1.1  mrg 
      7  1.1  mrg    GCC is free software; you can redistribute it and/or modify it
      8  1.1  mrg    under the terms of the GNU General Public License as published
      9  1.1  mrg    by the Free Software Foundation; either version 3, or (at your
     10  1.1  mrg    option) any later version.
     11  1.1  mrg 
     12  1.1  mrg    GCC is distributed in the hope that it will be useful, but WITHOUT
     13  1.1  mrg    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
     14  1.1  mrg    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
     15  1.1  mrg    License for more details.
     16  1.1  mrg 
     17  1.1  mrg    You should have received a copy of the GNU General Public License
     18  1.1  mrg    along with GCC; see the file COPYING3.  If not see
     19  1.1  mrg    <http://www.gnu.org/licenses/>.  */
     20  1.1  mrg 
     21  1.1  mrg 
     22  1.1  mrg /* Controlling the Compilation Driver, `gcc'  */
     23  1.1  mrg 
     24  1.1  mrg /* Pass -mtune=* options to the assembler */
     25  1.1  mrg #undef ASM_SPEC
     26  1.1  mrg #define ASM_SPEC "%{mcpu=gr6:-mtune=gr6; :-mtune=mcm}"
     27  1.1  mrg 
     28  1.1  mrg /* Define symbols for the preprocessor.  */
     29  1.1  mrg #define CPP_SPEC "%{mcpu=gr6:-D__gr6__; :-D__gr5__}"
     30  1.1  mrg 
     31  1.1  mrg /* Targets of a link */
     32  1.1  mrg #define LIB_SPEC \
     33  1.1  mrg   "--start-group -lc %{msim:-lsim; mdebug:-ldebug; :-lserial} --end-group"
     34  1.1  mrg 
     35  1.1  mrg #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
     36  1.1  mrg #define STARTFILE_SPEC "crti.o%s crtbegin.o%s crt0.o%s"
     37  1.1  mrg 
     38  1.1  mrg /* Run-time Target Specification */
     39  1.1  mrg 
     40  1.1  mrg /* TARGET_CPU_CPP_BUILTINS() This function-like macro expands to a
     41  1.1  mrg    block of code that defines built-in preprocessor macros and
     42  1.1  mrg    assertions for the target cpu, using the functions builtin_define,
     43  1.1  mrg    builtin_define_std and builtin_assert. When the front end calls
     44  1.1  mrg    this macro it provides a trailing semicolon, and since it has
     45  1.1  mrg    finished command line option processing your code can use those
     46  1.1  mrg    results freely.  builtin_assert takes a string in the form you pass
     47  1.1  mrg    to the command-line option -A, such as cpu=mips, and creates the
     48  1.1  mrg    assertion. builtin_define takes a string in the form accepted by
     49  1.1  mrg    option -D and unconditionally defines the macro.
     50  1.1  mrg 
     51  1.1  mrg    builtin_define_std takes a string representing the name of an
     52  1.1  mrg    object-like macro. If it doesn't lie in the user's namespace,
     53  1.1  mrg    builtin_define_std defines it unconditionally. Otherwise, it
     54  1.1  mrg    defines a version with two leading underscores, and another version
     55  1.1  mrg    with two leading and trailing underscores, and defines the original
     56  1.1  mrg    only if an ISO standard was not requested on the command line. For
     57  1.1  mrg    example, passing unix defines __unix, __unix__ and possibly unix;
     58  1.1  mrg    passing _mips defines __mips, __mips__ and possibly _mips, and
     59  1.1  mrg    passing _ABI64 defines only _ABI64.
     60  1.1  mrg 
     61  1.1  mrg    You can also test for the C dialect being compiled. The variable
     62  1.1  mrg    c_language is set to one of clk_c, clk_cplusplus or
     63  1.1  mrg    clk_objective_c. Note that if we are preprocessing assembler, this
     64  1.1  mrg    variable will be clk_c but the function-like macro
     65  1.1  mrg    preprocessing_asm_p() will return true, so you might want to check
     66  1.1  mrg    for that first.  If you need to check for strict ANSI, the variable
     67  1.1  mrg    flag_iso can be used. The function-like macro
     68  1.1  mrg    preprocessing_trad_p() can be used to check for traditional
     69  1.1  mrg    preprocessing.  */
     70  1.1  mrg #define TARGET_CPU_CPP_BUILTINS()			\
     71  1.1  mrg   do							\
     72  1.1  mrg     {							\
     73  1.1  mrg       builtin_define ("__VISIUM__");			\
     74  1.1  mrg       if (TARGET_MCM)					\
     75  1.1  mrg 	builtin_define ("__VISIUM_ARCH_MCM__");		\
     76  1.1  mrg       if (TARGET_BMI)					\
     77  1.1  mrg 	builtin_define ("__VISIUM_ARCH_BMI__");		\
     78  1.1  mrg       if (TARGET_FPU_IEEE)				\
     79  1.1  mrg 	builtin_define ("__VISIUM_ARCH_FPU_IEEE__");	\
     80  1.1  mrg     }							\
     81  1.1  mrg   while (0)
     82  1.1  mrg 
     83  1.1  mrg /* Recast the cpu class to be the cpu attribute.
     84  1.1  mrg    Every file includes us, but not every file includes insn-attr.h.  */
     85  1.1  mrg #define visium_cpu_attr ((enum attr_cpu) visium_cpu)
     86  1.1  mrg 
     87  1.1  mrg /* Defining data structures for per-function information.
     88  1.1  mrg 
     89  1.1  mrg    If the target needs to store information on a per-function basis,
     90  1.1  mrg    GCC provides a macro and a couple of variables to allow this. Note,
     91  1.1  mrg    just using statics to store the information is a bad idea, since
     92  1.1  mrg    GCC supports nested functions, so you can be halfway through
     93  1.1  mrg    encoding one function when another one comes along.
     94  1.1  mrg 
     95  1.1  mrg    GCC defines a data structure called struct function which contains
     96  1.1  mrg    all of the data specific to an individual function. This structure
     97  1.1  mrg    contains a field called machine whose type is struct
     98  1.1  mrg    machine_function *, which can be used by targets to point to their
     99  1.1  mrg    own specific data.
    100  1.1  mrg 
    101  1.1  mrg    If a target needs per-function specific data it should define the
    102  1.1  mrg    type struct machine_function and also the macro
    103  1.1  mrg    INIT_EXPANDERS. This macro should be used to initialize the
    104  1.1  mrg    function pointer init_machine_status.  This pointer is explained
    105  1.1  mrg    below.
    106  1.1  mrg 
    107  1.1  mrg    One typical use of per-function, target specific data is to create
    108  1.1  mrg    an RTX to hold the register containing the function's return
    109  1.1  mrg    address.  This RTX can then be used to implement the
    110  1.1  mrg    __builtin_return_address function, for level 0.
    111  1.1  mrg 
    112  1.1  mrg    Note--earlier implementations of GCC used a single data area to
    113  1.1  mrg    hold all of the per-function information. Thus when processing of a
    114  1.1  mrg    nested function began the old per-function data had to be pushed
    115  1.1  mrg    onto a stack, and when the processing was finished, it had to be
    116  1.1  mrg    popped off the stack.  GCC used to provide function pointers called
    117  1.1  mrg    save_machine_status and restore_machine_status to handle the saving
    118  1.1  mrg    and restoring of the target specific information. Since the single
    119  1.1  mrg    data area approach is no longer used, these pointers are no longer
    120  1.1  mrg    supported.
    121  1.1  mrg 
    122  1.1  mrg    The macro and function pointers are described below.
    123  1.1  mrg 
    124  1.1  mrg    INIT_EXPANDERS:
    125  1.1  mrg 
    126  1.1  mrg    Macro called to initialize any target specific information. This
    127  1.1  mrg    macro is called once per function, before generation of any RTL has
    128  1.1  mrg    begun.  The intention of this macro is to allow the initialization
    129  1.1  mrg    of the function pointers below.
    130  1.1  mrg 
    131  1.1  mrg    init_machine_status:
    132  1.1  mrg    This is a void (*)(struct function *) function pointer. If this
    133  1.1  mrg    pointer is non-NULL it will be called once per function, before
    134  1.1  mrg    function compilation starts, in order to allow the target to
    135  1.1  mrg    perform any target specific initialization of the struct function
    136  1.1  mrg    structure. It is intended that this would be used to initialize the
    137  1.1  mrg    machine of that structure.  struct machine_function structures are
    138  1.1  mrg    expected to be freed by GC.  Generally, any memory that they
    139  1.1  mrg    reference must be allocated by using ggc_alloc, including the
    140  1.1  mrg    structure itself. */
    141  1.1  mrg 
    142  1.1  mrg #define INIT_EXPANDERS visium_init_expanders ()
    143  1.1  mrg 
    144  1.1  mrg /* Storage Layout
    145  1.1  mrg 
    146  1.1  mrg    Note that the definitions of the macros in this table which are
    147  1.1  mrg    sizes or alignments measured in bits do not need to be constant.
    148  1.1  mrg    They can be C expressions that refer to static variables, such as
    149  1.1  mrg    the `target_flags'.
    150  1.1  mrg 
    151  1.1  mrg    `BITS_BIG_ENDIAN'
    152  1.1  mrg 
    153  1.1  mrg    Define this macro to have the value 1 if the most significant bit
    154  1.1  mrg    in a byte has the lowest number; otherwise define it to have the
    155  1.1  mrg    value zero.  This means that bit-field instructions count from the
    156  1.1  mrg    most significant bit.  If the machine has no bit-field
    157  1.1  mrg    instructions, then this must still be defined, but it doesn't
    158  1.1  mrg    matter which value it is defined to.  This macro need not be a
    159  1.1  mrg    constant.
    160  1.1  mrg 
    161  1.1  mrg    This macro does not affect the way structure fields are packed into
    162  1.1  mrg    bytes or words; that is controlled by `BYTES_BIG_ENDIAN'. */
    163  1.1  mrg #define BITS_BIG_ENDIAN 1
    164  1.1  mrg 
    165  1.1  mrg /* `BYTES_BIG_ENDIAN'
    166  1.1  mrg 
    167  1.1  mrg    Define this macro to have the value 1 if the most significant byte
    168  1.1  mrg    in a word has the lowest number.  This macro need not be a
    169  1.1  mrg    constant.*/
    170  1.1  mrg #define BYTES_BIG_ENDIAN 1
    171  1.1  mrg 
    172  1.1  mrg /* `WORDS_BIG_ENDIAN'
    173  1.1  mrg 
    174  1.1  mrg    Define this macro to have the value 1 if, in a multiword object,
    175  1.1  mrg    the most significant word has the lowest number.  This applies to
    176  1.1  mrg    both memory locations and registers; GNU CC fundamentally assumes
    177  1.1  mrg    that the order of words in memory is the same as the order in
    178  1.1  mrg    registers.  This macro need not be a constant.  */
    179  1.1  mrg #define WORDS_BIG_ENDIAN 1
    180  1.1  mrg 
    181  1.1  mrg /* `BITS_PER_WORD'
    182  1.1  mrg 
    183  1.1  mrg    Number of bits in a word; normally 32. */
    184  1.1  mrg #define BITS_PER_WORD 32
    185  1.1  mrg 
    186  1.1  mrg /* `UNITS_PER_WORD'
    187  1.1  mrg 
    188  1.1  mrg    Number of storage units in a word; normally 4. */
    189  1.1  mrg #define UNITS_PER_WORD 4
    190  1.1  mrg 
    191  1.1  mrg /* `POINTER_SIZE'
    192  1.1  mrg 
    193  1.1  mrg    Width of a pointer, in bits.  You must specify a value no wider
    194  1.1  mrg    than the width of `Pmode'.  If it is not equal to the width of
    195  1.1  mrg    `Pmode', you must define `POINTERS_EXTEND_UNSIGNED'.  */
    196  1.1  mrg #define POINTER_SIZE 32
    197  1.1  mrg 
    198  1.1  mrg /* `PARM_BOUNDARY'
    199  1.1  mrg 
    200  1.1  mrg    Normal alignment required for function parameters on the stack, in
    201  1.1  mrg    bits.  All stack parameters receive at least this much alignment
    202  1.1  mrg    regardless of data type.  On most machines, this is the same as the
    203  1.1  mrg    size of an integer. */
    204  1.1  mrg #define PARM_BOUNDARY 32
    205  1.1  mrg 
    206  1.1  mrg /* `STACK_BOUNDARY'
    207  1.1  mrg 
    208  1.1  mrg    Define this macro if you wish to preserve a certain alignment for
    209  1.1  mrg    the stack pointer.  The definition is a C expression for the
    210  1.1  mrg    desired alignment (measured in bits).
    211  1.1  mrg 
    212  1.1  mrg    If `PUSH_ROUNDING' is not defined, the stack will always be aligned
    213  1.1  mrg    to the specified boundary.  If `PUSH_ROUNDING' is defined and
    214  1.1  mrg    specifies a less strict alignment than `STACK_BOUNDARY', the stack
    215  1.1  mrg    may be momentarily unaligned while pushing arguments. */
    216  1.1  mrg #define STACK_BOUNDARY 32
    217  1.1  mrg 
    218  1.1  mrg #define VISIUM_STACK_ALIGN(LOC) (((LOC) + 3) & ~3)
    219  1.1  mrg 
    220  1.1  mrg /* `FUNCTION_BOUNDARY'
    221  1.1  mrg 
    222  1.1  mrg    Alignment required for a function entry point, in bits. */
    223  1.1  mrg #define FUNCTION_BOUNDARY 32
    224  1.1  mrg 
    225  1.1  mrg /* `BIGGEST_ALIGNMENT'
    226  1.1  mrg 
    227  1.1  mrg    Biggest alignment that any data type can require on this machine,
    228  1.1  mrg    in bits. */
    229  1.1  mrg #define BIGGEST_ALIGNMENT 32
    230  1.1  mrg 
    231  1.1  mrg /* `DATA_ALIGNMENT (TYPE, BASIC-ALIGN)`
    232  1.1  mrg 
    233  1.1  mrg    If defined, a C expression to compute the alignment for a variable
    234  1.1  mrg    in the static store.  TYPE is the data type, and BASIC-ALIGN is
    235  1.1  mrg    the alignment that the object would ordinarily have.  The value of
    236  1.1  mrg    this macro is used instead of that alignment to align the object. */
    237  1.1  mrg #define DATA_ALIGNMENT(TYPE,ALIGN) visium_data_alignment (TYPE, ALIGN)
    238  1.1  mrg 
    239  1.1  mrg /* `LOCAL_ALIGNMENT (TYPE, BASIC-ALIGN)`
    240  1.1  mrg 
    241  1.1  mrg    If defined, a C expression to compute the alignment for a variable
    242  1.1  mrg    in the local store.  TYPE is the data type, and BASIC-ALIGN is the
    243  1.1  mrg    alignment that the object would ordinarily have.  The value of this
    244  1.1  mrg    macro is used instead of that alignment to align the object. */
    245  1.1  mrg #define LOCAL_ALIGNMENT(TYPE,ALIGN) visium_data_alignment (TYPE, ALIGN)
    246  1.1  mrg 
    247  1.1  mrg /* `EMPTY_FIELD_BOUNDARY'
    248  1.1  mrg 
    249  1.1  mrg    Alignment in bits to be given to a structure bit field that follows
    250  1.1  mrg    an empty field such as `int : 0;'.
    251  1.1  mrg 
    252  1.1  mrg    Note that `PCC_BITFIELD_TYPE_MATTERS' also affects the alignment
    253  1.1  mrg    that results from an empty field. */
    254  1.1  mrg #define EMPTY_FIELD_BOUNDARY 32
    255  1.1  mrg 
    256  1.1  mrg /* `STRICT_ALIGNMENT'
    257  1.1  mrg 
    258  1.1  mrg    Define this macro to be the value 1 if instructions will fail to
    259  1.1  mrg    work if given data not on the nominal alignment.  If instructions
    260  1.1  mrg    will merely go slower in that case, define this macro as 0. */
    261  1.1  mrg #define STRICT_ALIGNMENT 1
    262  1.1  mrg 
    263  1.1  mrg /* `TARGET_FLOAT_FORMAT'
    264  1.1  mrg 
    265  1.1  mrg    A code distinguishing the floating point format of the target
    266  1.1  mrg    machine.  There are three defined values:
    267  1.1  mrg 
    268  1.1  mrg    `IEEE_FLOAT_FORMAT'
    269  1.1  mrg           This code indicates IEEE floating point.  It is the default;
    270  1.1  mrg           there is no need to define this macro when the format is IEEE.
    271  1.1  mrg 
    272  1.1  mrg     `VAX_FLOAT_FORMAT'
    273  1.1  mrg           This code indicates the peculiar format used on the Vax.
    274  1.1  mrg 
    275  1.1  mrg     `UNKNOWN_FLOAT_FORMAT'
    276  1.1  mrg           This code indicates any other format.
    277  1.1  mrg 
    278  1.1  mrg     The value of this macro is compared with `HOST_FLOAT_FORMAT' to
    279  1.1  mrg     determine whether the target machine has the same format as the
    280  1.1  mrg     host machine.  If any other formats are actually in use on
    281  1.1  mrg     supported machines, new codes should be defined for them.
    282  1.1  mrg 
    283  1.1  mrg     The ordering of the component words of floating point values
    284  1.1  mrg     stored in memory is controlled by `FLOAT_WORDS_BIG_ENDIAN' for the
    285  1.1  mrg     target machine and `HOST_FLOAT_WORDS_BIG_ENDIAN' for the host. */
    286  1.1  mrg #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
    287  1.1  mrg #define UNITS_PER_HWFPVALUE 4
    288  1.1  mrg 
    289  1.1  mrg /* Layout of Source Language Data Types
    290  1.1  mrg 
    291  1.1  mrg    These macros define the sizes and other characteristics of the
    292  1.1  mrg    standard basic data types used in programs being compiled.  Unlike
    293  1.1  mrg    the macros in the previous section, these apply to specific
    294  1.1  mrg    features of C and related languages, rather than to fundamental
    295  1.1  mrg    aspects of storage layout. */
    296  1.1  mrg 
    297  1.1  mrg /* `INT_TYPE_SIZE'
    298  1.1  mrg 
    299  1.1  mrg    A C expression for the size in bits of the type `int' on the target
    300  1.1  mrg    machine.  If you don't define this, the default is one word. */
    301  1.1  mrg #define INT_TYPE_SIZE  32
    302  1.1  mrg 
    303  1.1  mrg /* `SHORT_TYPE_SIZE'
    304  1.1  mrg 
    305  1.1  mrg    A C expression for the size in bits of the type `short' on the
    306  1.1  mrg    target machine.  If you don't define this, the default is half a
    307  1.1  mrg    word.  (If this would be less than one storage unit, it is rounded
    308  1.1  mrg    up to one unit.) */
    309  1.1  mrg #define SHORT_TYPE_SIZE 16
    310  1.1  mrg 
    311  1.1  mrg /* `LONG_TYPE_SIZE'
    312  1.1  mrg 
    313  1.1  mrg    A C expression for the size in bits of the type `long' on the
    314  1.1  mrg    target machine.  If you don't define this, the default is one word. */
    315  1.1  mrg #define LONG_TYPE_SIZE  32
    316  1.1  mrg 
    317  1.1  mrg /* `LONG_LONG_TYPE_SIZE'
    318  1.1  mrg 
    319  1.1  mrg    A C expression for the size in bits of the type `long long' on the
    320  1.1  mrg    target machine.  If you don't define this, the default is two
    321  1.1  mrg    words.  If you want to support GNU Ada on your machine, the value
    322  1.1  mrg    of macro must be at least 64. */
    323  1.1  mrg #define LONG_LONG_TYPE_SIZE  64
    324  1.1  mrg 
    325  1.1  mrg /* `CHAR_TYPE_SIZE'
    326  1.1  mrg 
    327  1.1  mrg    A C expression for the size in bits of the type `char' on the
    328  1.1  mrg    target machine.  If you don't define this, the default is one
    329  1.1  mrg    quarter of a word.  (If this would be less than one storage unit,
    330  1.1  mrg    it is rounded up to one unit.) */
    331  1.1  mrg #define CHAR_TYPE_SIZE  8
    332  1.1  mrg 
    333  1.1  mrg /* `FLOAT_TYPE_SIZE'
    334  1.1  mrg 
    335  1.1  mrg    A C expression for the size in bits of the type `float' on the
    336  1.1  mrg    target machine.  If you don't define this, the default is one word. */
    337  1.1  mrg #define FLOAT_TYPE_SIZE  32
    338  1.1  mrg 
    339  1.1  mrg /* `DOUBLE_TYPE_SIZE'
    340  1.1  mrg 
    341  1.1  mrg    A C expression for the size in bits of the type `double' on the
    342  1.1  mrg    target machine.  If you don't define this, the default is two
    343  1.1  mrg    words. */
    344  1.1  mrg #define DOUBLE_TYPE_SIZE  64
    345  1.1  mrg 
    346  1.1  mrg /* `LONG_DOUBLE_TYPE_SIZE'
    347  1.1  mrg 
    348  1.1  mrg    A C expression for the size in bits of the type `long double' on
    349  1.1  mrg    the target machine.  If you don't define this, the default is two
    350  1.1  mrg    words. */
    351  1.1  mrg #define LONG_DOUBLE_TYPE_SIZE   DOUBLE_TYPE_SIZE
    352  1.1  mrg 
    353  1.1  mrg /* `WIDEST_HARDWARE_FP_SIZE'
    354  1.1  mrg 
    355  1.1  mrg    A C expression for the size in bits of the widest floating-point
    356  1.1  mrg    format supported by the hardware.  If you define this macro, you
    357  1.1  mrg    must specify a value less than or equal to the value of
    358  1.1  mrg    `LONG_DOUBLE_TYPE_SIZE'.  If you do not define this macro, the
    359  1.1  mrg    value of `LONG_DOUBLE_TYPE_SIZE' is the default. */
    360  1.1  mrg 
    361  1.1  mrg /* `DEFAULT_SIGNED_CHAR'
    362  1.1  mrg 
    363  1.1  mrg    An expression whose value is 1 or 0, according to whether the type
    364  1.1  mrg    `char' should be signed or unsigned by default.  The user can
    365  1.1  mrg    always override this default with the options `-fsigned-char' and
    366  1.1  mrg    `-funsigned-char'. */
    367  1.1  mrg #define DEFAULT_SIGNED_CHAR 0
    368  1.1  mrg 
    369  1.1  mrg /* `SIZE_TYPE'
    370  1.1  mrg 
    371  1.1  mrg    A C expression for a string describing the name of the data type to
    372  1.1  mrg    use for size values.  The typedef name `size_t' is defined using
    373  1.1  mrg    the contents of the string.
    374  1.1  mrg 
    375  1.1  mrg    The string can contain more than one keyword.  If so, separate them
    376  1.1  mrg    with spaces, and write first any length keyword, then `unsigned' if
    377  1.1  mrg    appropriate, and finally `int'.  The string must exactly match one
    378  1.1  mrg    of the data type names defined in the function
    379  1.1  mrg    `init_decl_processing' in the file `c-decl.c'.  You may not omit
    380  1.1  mrg    `int' or change the order--that would cause the compiler to crash
    381  1.1  mrg    on startup.
    382  1.1  mrg 
    383  1.1  mrg    If you don't define this macro, the default is `"long unsigned
    384  1.1  mrg    int"'. */
    385  1.1  mrg #define SIZE_TYPE "unsigned int"
    386  1.1  mrg 
    387  1.1  mrg /* `PTRDIFF_TYPE'
    388  1.1  mrg 
    389  1.1  mrg    A C expression for a string describing the name of the data type to
    390  1.1  mrg    use for the result of subtracting two pointers.  The typedef name
    391  1.1  mrg    `ptrdiff_t' is defined using the contents of the string.  See
    392  1.1  mrg    `SIZE_TYPE' above for more information.
    393  1.1  mrg 
    394  1.1  mrg    If you don't define this macro, the default is `"long int"'. */
    395  1.1  mrg #define PTRDIFF_TYPE "long int"
    396  1.1  mrg 
    397  1.1  mrg /* Newlib uses the unsigned type corresponding to ptrdiff_t for
    398  1.1  mrg    uintptr_t; this is the same as size_t for most newlib-using
    399  1.1  mrg    targets, but not for us.  */
    400  1.1  mrg #define UINTPTR_TYPE "long unsigned int"
    401  1.1  mrg 
    402  1.1  mrg /* `WCHAR_TYPE'
    403  1.1  mrg 
    404  1.1  mrg    A C expression for a string describing the name of the data type to
    405  1.1  mrg    use for wide characters.  The typedef name `wchar_t' is defined
    406  1.1  mrg    using the contents of the string.  See `SIZE_TYPE' above for more
    407  1.1  mrg    information.
    408  1.1  mrg 
    409  1.1  mrg    If you don't define this macro, the default is `"int"'. */
    410  1.1  mrg #define WCHAR_TYPE "short int"
    411  1.1  mrg 
    412  1.1  mrg /* `WCHAR_TYPE_SIZE'
    413  1.1  mrg 
    414  1.1  mrg    A C expression for the size in bits of the data type for wide
    415  1.1  mrg    characters.  This is used in `cpp', which cannot make use of
    416  1.1  mrg    `WCHAR_TYPE'. */
    417  1.1  mrg #define WCHAR_TYPE_SIZE 16
    418  1.1  mrg 
    419  1.1  mrg /* Register Usage
    420  1.1  mrg 
    421  1.1  mrg    This section explains how to describe what registers the target
    422  1.1  mrg    machine has, and how (in general) they can be used.  */
    423  1.1  mrg 
    424  1.1  mrg /* `FIRST_PSEUDO_REGISTER'
    425  1.1  mrg 
    426  1.1  mrg    Number of actual hardware registers.
    427  1.1  mrg    The hardware registers are assigned numbers for the compiler
    428  1.1  mrg    from 0 to just below FIRST_PSEUDO_REGISTER.
    429  1.1  mrg    All registers that the compiler knows about must be given numbers,
    430  1.1  mrg    even those that are not normally considered general registers.
    431  1.1  mrg 
    432  1.1  mrg    Register 51 is used as the argument pointer register.
    433  1.1  mrg    Register 52 is used as the soft frame pointer register.  */
    434  1.1  mrg #define FIRST_PSEUDO_REGISTER 53
    435  1.1  mrg 
    436  1.1  mrg #define RETURN_REGNUM        1
    437  1.1  mrg #define PROLOGUE_TMP_REGNUM  9
    438  1.1  mrg #define LINK_REGNUM         21
    439  1.1  mrg #define GP_LAST_REGNUM      31
    440  1.1  mrg #define GP_REGISTER_P(REGNO) \
    441  1.1  mrg   (((unsigned) (REGNO)) <= GP_LAST_REGNUM)
    442  1.1  mrg 
    443  1.1  mrg #define MDB_REGNUM          32
    444  1.1  mrg #define MDC_REGNUM          33
    445  1.1  mrg 
    446  1.1  mrg #define FP_FIRST_REGNUM     34
    447  1.1  mrg #define FP_LAST_REGNUM      49
    448  1.1  mrg #define FP_RETURN_REGNUM    (FP_FIRST_REGNUM + 1)
    449  1.1  mrg #define FP_REGISTER_P(REGNO) \
    450  1.1  mrg   (FP_FIRST_REGNUM <= (REGNO) && (REGNO) <= FP_LAST_REGNUM)
    451  1.1  mrg 
    452  1.1  mrg #define FLAGS_REGNUM        50
    453  1.1  mrg 
    454  1.1  mrg /* `FIXED_REGISTERS'
    455  1.1  mrg 
    456  1.1  mrg    An initializer that says which registers are used for fixed
    457  1.1  mrg    purposes all throughout the compiled code and are therefore not
    458  1.1  mrg    available for general allocation.  These would include the stack
    459  1.1  mrg    pointer, the frame pointer (except on machines where that can be
    460  1.1  mrg    used as a general register when no frame pointer is needed), the
    461  1.1  mrg    program counter on machines where that is considered one of the
    462  1.1  mrg    addressable registers, and any other numbered register with a
    463  1.1  mrg    standard use.
    464  1.1  mrg 
    465  1.1  mrg    This information is expressed as a sequence of numbers, separated
    466  1.1  mrg    by commas and surrounded by braces.  The Nth number is 1 if
    467  1.1  mrg    register N is fixed, 0 otherwise.
    468  1.1  mrg 
    469  1.1  mrg    The table initialized from this macro, and the table initialized by
    470  1.1  mrg    the following one, may be overridden at run time either
    471  1.1  mrg    automatically, by the actions of the macro
    472  1.1  mrg    `CONDITIONAL_REGISTER_USAGE', or by the user with the command
    473  1.1  mrg    options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'.
    474  1.1  mrg 
    475  1.1  mrg    r0 and f0 are immutable registers hardwired to 0.
    476  1.1  mrg    r21 is the link register used for procedure linkage.
    477  1.1  mrg    r23 is the stack pointer register.
    478  1.1  mrg    r29 and r30 hold the interrupt context.
    479  1.1  mrg    mdc is a read-only register because the writemdc instruction
    480  1.1  mrg    terminates all the operations of the EAM on the GR6.  */
    481  1.1  mrg #define FIXED_REGISTERS  \
    482  1.1  mrg  { 1, 0, 0, 0, 0, 0, 0, 0, /* r0 .. r7 */      \
    483  1.1  mrg    0, 0, 0, 0, 0, 0, 0, 0, /* r8 .. r15 */     \
    484  1.1  mrg    0, 0, 0, 0, 0, 1, 0, 1, /* r16 .. r23 */    \
    485  1.1  mrg    0, 0, 0, 0, 0, 1, 1, 0, /* r24 .. r31 */    \
    486  1.1  mrg    0, 1,                   /* mdb, mdc */      \
    487  1.1  mrg    1, 0, 0, 0, 0, 0, 0, 0, /* f0 .. f7 */      \
    488  1.1  mrg    0, 0, 0, 0, 0, 0, 0, 0, /* f8 .. f15 */     \
    489  1.1  mrg    1, 1, 1 }               /* flags, arg, frame */
    490  1.1  mrg 
    491  1.1  mrg /* `CALL_USED_REGISTERS'
    492  1.1  mrg 
    493  1.1  mrg    Like `FIXED_REGISTERS' but has 1 for each register that is
    494  1.1  mrg    clobbered (in general) by function calls as well as for fixed
    495  1.1  mrg    registers.  This macro therefore identifies the registers that are
    496  1.1  mrg    not available for general allocation of values that must live
    497  1.1  mrg    across function calls.
    498  1.1  mrg 
    499  1.1  mrg    If a register has 0 in `CALL_USED_REGISTERS', the compiler
    500  1.1  mrg    automatically saves it on function entry and restores it on
    501  1.1  mrg    function exit, if the register is used within the function.  */
    502  1.1  mrg #define CALL_USED_REGISTERS \
    503  1.1  mrg  { 1, 1, 1, 1, 1, 1, 1, 1, /* r0 .. r7 */      \
    504  1.1  mrg    1, 1, 1, 0, 0, 0, 0, 0, /* r8 .. r15 */     \
    505  1.1  mrg    0, 0, 0, 0, 1, 1, 0, 1, /* r16 .. r23 */    \
    506  1.1  mrg    1, 1, 1, 1, 1, 1, 1, 1, /* r24 .. r31 */    \
    507  1.1  mrg    1, 1,                   /* mdb, mdc */      \
    508  1.1  mrg    1, 1, 1, 1, 1, 1, 1, 1, /* f0 .. f7 */      \
    509  1.1  mrg    1, 0, 0, 0, 0, 0, 0, 0, /* f8 .. f15 */     \
    510  1.1  mrg    1, 1, 1 }               /* flags, arg, frame */
    511  1.1  mrg 
    512  1.1  mrg /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
    513  1.1  mrg    the entire set of `FIXED_REGISTERS' be included.
    514  1.1  mrg    (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS').
    515  1.1  mrg    This macro is optional.  If not specified, it defaults to the value
    516  1.1  mrg    of `CALL_USED_REGISTERS'.  */
    517  1.1  mrg #define CALL_REALLY_USED_REGISTERS  \
    518  1.1  mrg  { 0, 1, 1, 1, 1, 1, 1, 1, /* r0 .. r7 */      \
    519  1.1  mrg    1, 1, 1, 0, 0, 0, 0, 0, /* r8 .. r15 */     \
    520  1.1  mrg    0, 0, 0, 0, 1, 0, 0, 0, /* r16 .. r23 */    \
    521  1.1  mrg    1, 1, 1, 1, 1, 0, 0, 1, /* r24 .. r31 */    \
    522  1.1  mrg    1, 1,                   /* mdb, mdc */      \
    523  1.1  mrg    1, 1, 1, 1, 1, 1, 1, 1, /* f0 .. f7 */      \
    524  1.1  mrg    1, 0, 0, 0, 0, 0, 0, 0, /* f8 .. f15 */     \
    525  1.1  mrg    1, 0, 0 }               /* flags, arg, frame */
    526  1.1  mrg 
    527  1.1  mrg /* `REG_ALLOC_ORDER'
    528  1.1  mrg 
    529  1.1  mrg    If defined, an initializer for a vector of integers, containing the
    530  1.1  mrg    numbers of hard registers in the order in which GCC should prefer
    531  1.1  mrg    to use them (from most preferred to least).
    532  1.1  mrg 
    533  1.1  mrg    If this macro is not defined, registers are used lowest numbered
    534  1.1  mrg    first (all else being equal).  */
    535  1.1  mrg #define REG_ALLOC_ORDER \
    536  1.1  mrg  { 10, 9, 8, 7, 6, 5, 4, 3, 2, 1,          /* r10 .. r1 */   \
    537  1.1  mrg    11, 12, 13, 14, 15, 16, 17, 18, 19, 20, /* r11 .. r20 */  \
    538  1.1  mrg    22,                                     /* fp */          \
    539  1.1  mrg    24, 25, 26, 27, 28,                     /* r24 .. r28 */  \
    540  1.1  mrg    31,                                     /* r31 */         \
    541  1.1  mrg    32, 33,                                 /* mdb, mdc */    \
    542  1.1  mrg    42, 41, 40, 39, 38, 37, 36, 35,         /* f8 .. f1 */    \
    543  1.1  mrg    43, 44, 45, 46, 47, 48, 49,             /* f9 .. f15 */   \
    544  1.1  mrg    21, 23,                                 /* lr, sp */      \
    545  1.1  mrg    29, 30,                                 /* r29, r30 */    \
    546  1.1  mrg    50, 51, 52,                             /* flags, arg, frame */ \
    547  1.1  mrg    0, 34 }                                 /* r0, f0 */
    548  1.1  mrg 
    549  1.1  mrg /* `HARD_REGNO_RENAME_OK (OLD_REG, NEW_REG)'
    550  1.1  mrg 
    551  1.1  mrg    A C expression which is nonzero if hard register NEW_REG can be
    552  1.1  mrg    considered for use as a rename register for hard register OLD_REG. */
    553  1.1  mrg #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
    554  1.1  mrg   visium_hard_regno_rename_ok (OLD_REG, NEW_REG)
    555  1.1  mrg 
    556  1.1  mrg /* Register Classes
    557  1.1  mrg 
    558  1.1  mrg    On many machines, the numbered registers are not all equivalent.
    559  1.1  mrg    For example, certain registers may not be allowed for indexed
    560  1.1  mrg    addressing; certain registers may not be allowed in some
    561  1.1  mrg    instructions.  These machine restrictions are described to the
    562  1.1  mrg    compiler using "register classes".
    563  1.1  mrg 
    564  1.1  mrg    `enum reg_class'
    565  1.1  mrg 
    566  1.1  mrg    An enumeral type that must be defined with all the register class
    567  1.1  mrg    names as enumeral values.  `NO_REGS' must be first.  `ALL_REGS'
    568  1.1  mrg    must be the last register class, followed by one more enumeral
    569  1.1  mrg    value, `LIM_REG_CLASSES', which is not a register class but rather
    570  1.1  mrg    tells how many classes there are.
    571  1.1  mrg 
    572  1.1  mrg    Each register class has a number, which is the value of casting the
    573  1.1  mrg    class name to type `int'.  The number serves as an index in many of
    574  1.1  mrg    the tables described below. */
    575  1.1  mrg 
    576  1.1  mrg enum reg_class
    577  1.1  mrg {
    578  1.1  mrg   NO_REGS,
    579  1.1  mrg   MDB,
    580  1.1  mrg   MDC,
    581  1.1  mrg   FP_REGS,
    582  1.1  mrg   FLAGS,
    583  1.1  mrg   R1,
    584  1.1  mrg   R2,
    585  1.1  mrg   R3,
    586  1.1  mrg   SIBCALL_REGS,
    587  1.1  mrg   LOW_REGS,
    588  1.1  mrg   GENERAL_REGS,
    589  1.1  mrg   ALL_REGS,
    590  1.1  mrg   LIM_REG_CLASSES
    591  1.1  mrg };
    592  1.1  mrg 
    593  1.1  mrg /* `N_REG_CLASSES'
    594  1.1  mrg 
    595  1.1  mrg    The number of distinct register classes, defined as follows.  */
    596  1.1  mrg #define N_REG_CLASSES (int) LIM_REG_CLASSES
    597  1.1  mrg 
    598  1.1  mrg /* `REG_CLASS_NAMES'
    599  1.1  mrg 
    600  1.1  mrg    An initializer containing the names of the register classes as C
    601  1.1  mrg    string constants.  These names are used in writing some of the
    602  1.1  mrg    debugging dumps. */
    603  1.1  mrg #define REG_CLASS_NAMES \
    604  1.1  mrg  {"NO_REGS", "MDB", "MDC", "FP_REGS", "FLAGS", "R1", "R2", "R3", \
    605  1.1  mrg   "SIBCALL_REGS", "LOW_REGS", "GENERAL_REGS", "ALL_REGS"}
    606  1.1  mrg 
    607  1.1  mrg /* `REG_CLASS_CONTENTS'
    608  1.1  mrg 
    609  1.1  mrg    An initializer containing the contents of the register classes, as
    610  1.1  mrg    integers which are bit masks.  The Nth integer specifies the
    611  1.1  mrg    contents of class N.  The way the integer MASK is interpreted is
    612  1.1  mrg    that register R is in the class if `MASK & (1 << R)' is 1.
    613  1.1  mrg 
    614  1.1  mrg    When the machine has more than 32 registers, an integer does not
    615  1.1  mrg    suffice.  Then the integers are replaced by sub-initializers,
    616  1.1  mrg    braced groupings containing several integers.  Each sub-initializer
    617  1.1  mrg    must be suitable as an initializer for the type `HARD_REG_SET'
    618  1.1  mrg    which is defined in `hard-reg-set.h'. */
    619  1.1  mrg #define REG_CLASS_CONTENTS {                     \
    620  1.1  mrg     {0x00000000, 0x00000000}, /* NO_REGS */      \
    621  1.1  mrg     {0x00000000, 0x00000001}, /* MDB */          \
    622  1.1  mrg     {0x00000000, 0x00000002}, /* MDC */          \
    623  1.1  mrg     {0x00000000, 0x0003fffc}, /* FP_REGS */      \
    624  1.1  mrg     {0x00000000, 0x00040000}, /* FLAGS */        \
    625  1.1  mrg     {0x00000002, 0x00000000}, /* R1 */           \
    626  1.1  mrg     {0x00000004, 0x00000000}, /* R2 */           \
    627  1.1  mrg     {0x00000008, 0x00000000}, /* R3 */           \
    628  1.1  mrg     {0x000005ff, 0x00000000}, /* SIBCALL_REGS */ \
    629  1.1  mrg     {0x1fffffff, 0x00000000}, /* LOW_REGS */     \
    630  1.1  mrg     {0xffffffff, 0x00180000}, /* GENERAL_REGS */ \
    631  1.1  mrg     {0xffffffff, 0x001fffff}} /* ALL_REGS */
    632  1.1  mrg 
    633  1.1  mrg /* `REGNO_REG_CLASS (REGNO)'
    634  1.1  mrg 
    635  1.1  mrg    A C expression whose value is a register class containing hard
    636  1.1  mrg    register REGNO.  In general there is more than one such class;
    637  1.1  mrg    choose a class which is "minimal", meaning that no smaller class
    638  1.1  mrg    also contains the register. */
    639  1.1  mrg #define REGNO_REG_CLASS(REGNO)                    \
    640  1.1  mrg   ((REGNO) == MDB_REGNUM ? MDB :                  \
    641  1.1  mrg    (REGNO) == MDC_REGNUM ? MDC :                  \
    642  1.1  mrg    FP_REGISTER_P (REGNO) ? FP_REGS :              \
    643  1.1  mrg    (REGNO) == FLAGS_REGNUM ? FLAGS :              \
    644  1.1  mrg    (REGNO) == 1 ? R1 :                            \
    645  1.1  mrg    (REGNO) == 2 ? R2 :                            \
    646  1.1  mrg    (REGNO) == 3 ? R3 :                            \
    647  1.1  mrg    (REGNO) <= 8 || (REGNO) == 10 ? SIBCALL_REGS : \
    648  1.1  mrg    (REGNO) <= 28 ? LOW_REGS :                     \
    649  1.1  mrg    GENERAL_REGS)
    650  1.1  mrg 
    651  1.1  mrg /* `BASE_REG_CLASS'
    652  1.1  mrg 
    653  1.1  mrg    A macro whose definition is the name of the class to which a valid
    654  1.1  mrg    base register must belong.  A base register is one used in an
    655  1.1  mrg    address which is the register value plus a displacement. */
    656  1.1  mrg #define BASE_REG_CLASS GENERAL_REGS
    657  1.1  mrg 
    658  1.1  mrg #define BASE_REGISTER_P(REGNO)        \
    659  1.1  mrg   (GP_REGISTER_P (REGNO)              \
    660  1.1  mrg    || (REGNO) == ARG_POINTER_REGNUM   \
    661  1.1  mrg    || (REGNO) == FRAME_POINTER_REGNUM)
    662  1.1  mrg 
    663  1.1  mrg /* `INDEX_REG_CLASS'
    664  1.1  mrg 
    665  1.1  mrg    A macro whose definition is the name of the class to which a valid
    666  1.1  mrg    index register must belong.  An index register is one used in an
    667  1.1  mrg    address where its value is either multiplied by a scale factor or
    668  1.1  mrg    added to another register (as well as added to a displacement). */
    669  1.1  mrg #define INDEX_REG_CLASS NO_REGS
    670  1.1  mrg 
    671  1.1  mrg /* `REGNO_OK_FOR_BASE_P (NUM)'
    672  1.1  mrg 
    673  1.1  mrg    A C expression which is nonzero if register number NUM is suitable
    674  1.1  mrg    for use as a base register in operand addresses.  It may be either
    675  1.1  mrg    a suitable hard register or a pseudo register that has been
    676  1.1  mrg    allocated such a hard register. */
    677  1.1  mrg #define REGNO_OK_FOR_BASE_P(REGNO) \
    678  1.1  mrg   (BASE_REGISTER_P (REGNO) || BASE_REGISTER_P ((unsigned)reg_renumber[REGNO]))
    679  1.1  mrg 
    680  1.1  mrg /* `REGNO_OK_FOR_INDEX_P (NUM)'
    681  1.1  mrg 
    682  1.1  mrg    A C expression which is nonzero if register number NUM is suitable
    683  1.1  mrg    for use as an index register in operand addresses.  It may be
    684  1.1  mrg    either a suitable hard register or a pseudo register that has been
    685  1.1  mrg    allocated such a hard register.
    686  1.1  mrg 
    687  1.1  mrg    The difference between an index register and a base register is
    688  1.1  mrg    that the index register may be scaled.  If an address involves the
    689  1.1  mrg    sum of two registers, neither one of them scaled, then either one
    690  1.1  mrg    may be labeled the "base" and the other the "index"; but whichever
    691  1.1  mrg    labeling is used must fit the machine's constraints of which
    692  1.1  mrg    registers may serve in each capacity.  The compiler will try both
    693  1.1  mrg    labelings, looking for one that is valid, and will reload one or
    694  1.1  mrg    both registers only if neither labeling works. */
    695  1.1  mrg #define REGNO_OK_FOR_INDEX_P(REGNO) 0
    696  1.1  mrg 
    697  1.1  mrg /* `PREFERRED_RELOAD_CLASS (X, CLASS)'
    698  1.1  mrg 
    699  1.1  mrg    A C expression that places additional restrictions on the register
    700  1.1  mrg    class to use when it is necessary to copy value X into a register
    701  1.1  mrg    in class CLASS.  The value is a register class; perhaps CLASS, or
    702  1.1  mrg    perhaps another, smaller class.
    703  1.1  mrg 
    704  1.1  mrg    Sometimes returning a more restrictive class makes better code.
    705  1.1  mrg    For example, on the 68000, when X is an integer constant that is in
    706  1.1  mrg    range for a `moveq' instruction, the value of this macro is always
    707  1.1  mrg    `DATA_REGS' as long as CLASS includes the data registers.
    708  1.1  mrg    Requiring a data register guarantees that a `moveq' will be used.
    709  1.1  mrg 
    710  1.1  mrg    If X is a `const_double', by returning `NO_REGS' you can force X
    711  1.1  mrg    into a memory constant.  This is useful on certain machines where
    712  1.1  mrg    immediate floating values cannot be loaded into certain kinds of
    713  1.1  mrg    registers. */
    714  1.1  mrg #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
    715  1.1  mrg 
    716  1.1  mrg #define CLASS_MAX_NREGS(CLASS, MODE)    \
    717  1.1  mrg   ((CLASS) == MDB ?                     \
    718  1.1  mrg   ((GET_MODE_SIZE (MODE) + 2 * UNITS_PER_WORD - 1) / (2 * UNITS_PER_WORD)) \
    719  1.1  mrg   : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
    720  1.1  mrg 
    721  1.1  mrg /* Stack Layout and Calling Conventions
    722  1.1  mrg 
    723  1.1  mrg    Basic Stack Layout
    724  1.1  mrg 
    725  1.1  mrg    `STACK_GROWS_DOWNWARD'
    726  1.1  mrg    Define this macro if pushing a word onto the stack moves the stack
    727  1.1  mrg    pointer to a smaller address.  */
    728  1.1  mrg #define STACK_GROWS_DOWNWARD 1
    729  1.1  mrg 
    730  1.1  mrg /* `FIRST_PARM_OFFSET (FUNDECL)'
    731  1.1  mrg 
    732  1.1  mrg    Offset from the argument pointer register to the first argument's
    733  1.1  mrg    address.  On some machines it may depend on the data type of the
    734  1.1  mrg    function.
    735  1.1  mrg 
    736  1.1  mrg    If `ARGS_GROW_DOWNWARD', this is the offset to the location above
    737  1.1  mrg    the first argument's address. */
    738  1.1  mrg #define FIRST_PARM_OFFSET(FNDECL) 0
    739  1.1  mrg 
    740  1.1  mrg /* `DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)'
    741  1.1  mrg 
    742  1.1  mrg    A C expression whose value is RTL representing the address in a
    743  1.1  mrg    stack frame where the pointer to the caller's frame is stored.
    744  1.1  mrg    Assume that FRAMEADDR is an RTL expression for the address of the
    745  1.1  mrg    stack frame itself.
    746  1.1  mrg 
    747  1.1  mrg    If you don't define this macro, the default is to return the value
    748  1.1  mrg    of FRAMEADDR--that is, the stack frame address is also the address
    749  1.1  mrg    of the stack word that points to the previous frame. */
    750  1.1  mrg #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) \
    751  1.1  mrg   visium_dynamic_chain_address (FRAMEADDR)
    752  1.1  mrg 
    753  1.1  mrg /* `RETURN_ADDR_RTX (COUNT, FRAMEADDR)'
    754  1.1  mrg 
    755  1.1  mrg    A C expression whose value is RTL representing the value of the
    756  1.1  mrg    return address for the frame COUNT steps up from the current frame,
    757  1.1  mrg    after the prologue.  FRAMEADDR is the frame pointer of the COUNT
    758  1.1  mrg    frame, or the frame pointer of the COUNT - 1 frame if
    759  1.1  mrg    `RETURN_ADDR_IN_PREVIOUS_FRAME' is defined.
    760  1.1  mrg 
    761  1.1  mrg    The value of the expression must always be the correct address when
    762  1.1  mrg    COUNT is zero, but may be `NULL_RTX' if there is not way to
    763  1.1  mrg    determine the return address of other frames.  */
    764  1.1  mrg #define RETURN_ADDR_RTX(COUNT,FRAMEADDR) \
    765  1.1  mrg   visium_return_addr_rtx (COUNT, FRAMEADDR)
    766  1.1  mrg 
    767  1.1  mrg /* Exception Handling
    768  1.1  mrg 
    769  1.1  mrg    `EH_RETURN_DATA_REGNO'
    770  1.1  mrg 
    771  1.1  mrg    A C expression whose value is the Nth register number used for data
    772  1.1  mrg    by exception handlers or INVALID_REGNUM if fewer than N registers
    773  1.1  mrg    are available.
    774  1.1  mrg 
    775  1.1  mrg    The exception handling library routines communicate with the
    776  1.1  mrg    exception handlers via a set of agreed upon registers. */
    777  1.1  mrg #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 11 : INVALID_REGNUM)
    778  1.1  mrg #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, 8)
    779  1.1  mrg #define EH_RETURN_HANDLER_RTX visium_eh_return_handler_rtx ()
    780  1.1  mrg 
    781  1.1  mrg /* Registers That Address the Stack Frame
    782  1.1  mrg 
    783  1.1  mrg    This discusses registers that address the stack frame.
    784  1.1  mrg 
    785  1.1  mrg    `STACK_POINTER_REGNUM'
    786  1.1  mrg 
    787  1.1  mrg    The register number of the stack pointer register, which must also
    788  1.1  mrg    be a fixed register according to `FIXED_REGISTERS'.  On most
    789  1.1  mrg    machines, the hardware determines which register this is. */
    790  1.1  mrg #define STACK_POINTER_REGNUM 23
    791  1.1  mrg 
    792  1.1  mrg /* `FRAME_POINTER_REGNUM'
    793  1.1  mrg 
    794  1.1  mrg    The register number of the frame pointer register, which is used to
    795  1.1  mrg    access automatic variables in the stack frame.  On some machines,
    796  1.1  mrg    the hardware determines which register this is.  On other machines,
    797  1.1  mrg    you can choose any register you wish for this purpose. */
    798  1.1  mrg #define FRAME_POINTER_REGNUM 52
    799  1.1  mrg 
    800  1.1  mrg /* `HARD_FRAME_POINTER_REGNUM'
    801  1.1  mrg 
    802  1.1  mrg    On some machines the offset between the frame pointer and starting
    803  1.1  mrg    offset of the automatic variables is not known until after register
    804  1.1  mrg    allocation has been done (for example, because the saved registers
    805  1.1  mrg    are between these two locations).  On those machines, define
    806  1.1  mrg    `FRAME_POINTER_REGNUM' the number of a special, fixed register to
    807  1.1  mrg    be used internally until the offset is known, and define
    808  1.1  mrg    `HARD_FRAME_POINTER_REGNUM' to be the actual hard register number
    809  1.1  mrg    used for the frame pointer.  */
    810  1.1  mrg #define HARD_FRAME_POINTER_REGNUM 22
    811  1.1  mrg 
    812  1.1  mrg /* `ARG_POINTER_REGNUM'
    813  1.1  mrg 
    814  1.1  mrg    The register number of the arg pointer register, which is used to
    815  1.1  mrg    access the function's argument list.  On some machines, this is the
    816  1.1  mrg    same as the frame pointer register.  On some machines, the hardware
    817  1.1  mrg    determines which register this is.  On other machines, you can
    818  1.1  mrg    choose any register you wish for this purpose.  If this is not the
    819  1.1  mrg    same register as the frame pointer register, then you must mark it
    820  1.1  mrg    as a fixed register according to `FIXED_REGISTERS', or arrange to
    821  1.1  mrg    be able to eliminate it (*note Elimination::.).  */
    822  1.1  mrg #define ARG_POINTER_REGNUM 51
    823  1.1  mrg 
    824  1.1  mrg /* `STATIC_CHAIN_REGNUM'
    825  1.1  mrg    `STATIC_CHAIN_INCOMING_REGNUM'
    826  1.1  mrg 
    827  1.1  mrg    Register numbers used for passing a function's static chain
    828  1.1  mrg    pointer.  If register windows are used, the register number as seen
    829  1.1  mrg    by the called function is `STATIC_CHAIN_INCOMING_REGNUM', while the
    830  1.1  mrg    register number as seen by the calling function is
    831  1.1  mrg    `STATIC_CHAIN_REGNUM'.  If these registers are the same,
    832  1.1  mrg    `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
    833  1.1  mrg 
    834  1.1  mrg    The static chain register need not be a fixed register.
    835  1.1  mrg 
    836  1.1  mrg    If the static chain is passed in memory, these macros should not be
    837  1.1  mrg    defined; instead, the next two macros should be defined. */
    838  1.1  mrg #define STATIC_CHAIN_REGNUM 20
    839  1.1  mrg 
    840  1.1  mrg /* `ELIMINABLE_REGS'
    841  1.1  mrg 
    842  1.1  mrg    If defined, this macro specifies a table of register pairs used to
    843  1.1  mrg    eliminate unneeded registers that point into the stack frame.  If
    844  1.1  mrg    it is not defined, the only elimination attempted by the compiler
    845  1.1  mrg    is to replace references to the frame pointer with references to
    846  1.1  mrg    the stack pointer.
    847  1.1  mrg 
    848  1.1  mrg    The definition of this macro is a list of structure
    849  1.1  mrg    initializations, each of which specifies an original and
    850  1.1  mrg    replacement register.
    851  1.1  mrg 
    852  1.1  mrg    On some machines, the position of the argument pointer is not known
    853  1.1  mrg    until the compilation is completed.  In such a case, a separate
    854  1.1  mrg    hard register must be used for the argument pointer.  This register
    855  1.1  mrg    can be eliminated by replacing it with either the frame pointer or
    856  1.1  mrg    the argument pointer, depending on whether or not the frame pointer
    857  1.1  mrg    has been eliminated.
    858  1.1  mrg 
    859  1.1  mrg    Note that the elimination of the argument pointer with the stack
    860  1.1  mrg    pointer is specified first since that is the preferred elimination.  */
    861  1.1  mrg #define ELIMINABLE_REGS				     \
    862  1.1  mrg {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},	     \
    863  1.1  mrg  { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},   \
    864  1.1  mrg  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},	     \
    865  1.1  mrg  { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
    866  1.1  mrg 
    867  1.1  mrg /* `INITIAL_ELIMINATION_OFFSET (FROM-REG, TO-REG, OFFSET-VAR)'
    868  1.1  mrg 
    869  1.3  mrg    This macro returns the initial difference between the specified pair
    870  1.3  mrg    of registers.  */
    871  1.1  mrg #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
    872  1.1  mrg   (OFFSET = visium_initial_elimination_offset (FROM, TO))
    873  1.1  mrg 
    874  1.1  mrg /* Passing Function Arguments on the Stack
    875  1.1  mrg 
    876  1.1  mrg    The macros in this section control how arguments are passed on the
    877  1.1  mrg    stack.  See the following section for other macros that control
    878  1.1  mrg    passing certain arguments in registers.
    879  1.1  mrg 
    880  1.1  mrg    Passing Arguments in Registers
    881  1.1  mrg 
    882  1.1  mrg    This section describes the macros which let you control how various
    883  1.1  mrg    types of arguments are passed in registers or how they are arranged
    884  1.1  mrg    in the stack.
    885  1.1  mrg 
    886  1.1  mrg    Define the general purpose, and floating point registers used for
    887  1.1  mrg    passing arguments */
    888  1.1  mrg #define MAX_ARGS_IN_GP_REGISTERS 8
    889  1.1  mrg #define GP_ARG_FIRST 1
    890  1.1  mrg #define GP_ARG_LAST (GP_ARG_FIRST + MAX_ARGS_IN_GP_REGISTERS - 1)
    891  1.1  mrg #define MAX_ARGS_IN_FP_REGISTERS 8
    892  1.1  mrg #define FP_ARG_FIRST (FP_FIRST_REGNUM + 1)
    893  1.1  mrg #define FP_ARG_LAST (FP_ARG_FIRST + MAX_ARGS_IN_FP_REGISTERS - 1)
    894  1.1  mrg 
    895  1.1  mrg /* Define a data type for recording info about an argument list during the
    896  1.1  mrg processing of that argument list. */
    897  1.1  mrg 
    898  1.1  mrg struct visium_args
    899  1.1  mrg {
    900  1.1  mrg   /* The count of general registers used */
    901  1.1  mrg   int grcount;
    902  1.1  mrg   /* The count of floating registers used */
    903  1.1  mrg   int frcount;
    904  1.1  mrg   /* The number of stack words used by named arguments */
    905  1.1  mrg   int stack_words;
    906  1.1  mrg };
    907  1.1  mrg 
    908  1.1  mrg /* `CUMULATIVE_ARGS'
    909  1.1  mrg 
    910  1.1  mrg    A C type for declaring a variable that is used as the first
    911  1.1  mrg    argument of `FUNCTION_ARG' and other related values.  For some
    912  1.1  mrg    target machines, the type `int' suffices and can hold the number of
    913  1.1  mrg    bytes of argument so far.
    914  1.1  mrg 
    915  1.1  mrg    There is no need to record in `CUMULATIVE_ARGS' anything about the
    916  1.1  mrg    arguments that have been passed on the stack.  The compiler has
    917  1.1  mrg    other variables to keep track of that.  For target machines on
    918  1.1  mrg    which all arguments are passed on the stack, there is no need to
    919  1.1  mrg    store anything in `CUMULATIVE_ARGS'; however, the data structure
    920  1.1  mrg    must exist and should not be empty, so use `int'. */
    921  1.1  mrg #define CUMULATIVE_ARGS struct visium_args
    922  1.1  mrg 
    923  1.1  mrg #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
    924  1.1  mrg   do {                        \
    925  1.1  mrg        (CUM).grcount = 0;     \
    926  1.1  mrg        (CUM).frcount = 0;     \
    927  1.1  mrg        (CUM).stack_words = 0; \
    928  1.1  mrg      } while (0)
    929  1.1  mrg 
    930  1.1  mrg /* `FUNCTION_ARG_REGNO_P (REGNO)'
    931  1.1  mrg 
    932  1.1  mrg    A C expression that is nonzero if REGNO is the number of a hard
    933  1.1  mrg    register in which function arguments are sometimes passed.  This
    934  1.1  mrg    does *not* include implicit arguments such as the static chain and
    935  1.1  mrg    the structure-value address.  On many machines, no registers can be
    936  1.1  mrg    used for this purpose since all function arguments are pushed on
    937  1.1  mrg    the stack. */
    938  1.1  mrg #define FUNCTION_ARG_REGNO_P(N)               	\
    939  1.1  mrg   ((GP_ARG_FIRST <= (N) && (N) <= GP_ARG_LAST)	\
    940  1.1  mrg    || (TARGET_FPU && FP_ARG_FIRST <= (N) && (N) <= FP_ARG_LAST))
    941  1.1  mrg 
    942  1.1  mrg /* `FUNCTION_VALUE_REGNO_P (REGNO)'
    943  1.1  mrg 
    944  1.1  mrg    A C expression that is nonzero if REGNO is the number of a hard
    945  1.1  mrg    register in which the values of called function may come back.
    946  1.1  mrg 
    947  1.1  mrg    A register whose use for returning values is limited to serving as
    948  1.1  mrg    the second of a pair (for a value of type `double', say) need not
    949  1.1  mrg    be recognized by this macro. If the machine has register windows,
    950  1.1  mrg    so that the caller and the called function use different registers
    951  1.1  mrg    for the return value, this macro should recognize only the caller's
    952  1.1  mrg    register numbers. */
    953  1.1  mrg #define FUNCTION_VALUE_REGNO_P(N) \
    954  1.1  mrg   ((N) == RETURN_REGNUM || (TARGET_FPU && (N) == FP_RETURN_REGNUM))
    955  1.1  mrg 
    956  1.1  mrg /* How Large Values Are Returned
    957  1.1  mrg 
    958  1.1  mrg    When a function value's mode is `BLKmode' (and in some other
    959  1.1  mrg    cases), the value is not returned according to `FUNCTION_VALUE'.
    960  1.1  mrg    Instead, the caller passes the address of a block of memory in
    961  1.1  mrg    which the value should be stored.  This address is called the
    962  1.1  mrg    "structure value address".
    963  1.1  mrg 
    964  1.1  mrg    This section describes how to control returning structure values in
    965  1.1  mrg    memory.
    966  1.1  mrg 
    967  1.1  mrg    `DEFAULT_PCC_STRUCT_RETURN'
    968  1.1  mrg 
    969  1.1  mrg    Define this macro to be 1 if all structure and union return values
    970  1.1  mrg    must be in memory.  Since this results in slower code, this should
    971  1.1  mrg    be defined only if needed for compatibility with other compilers or
    972  1.1  mrg    with an ABI.  If you define this macro to be 0, then the
    973  1.1  mrg    conventions used for structure and union return values are decided
    974  1.1  mrg    by the `RETURN_IN_MEMORY' macro.
    975  1.1  mrg 
    976  1.1  mrg    If not defined, this defaults to the value 1. */
    977  1.1  mrg #define DEFAULT_PCC_STRUCT_RETURN 0
    978  1.1  mrg 
    979  1.1  mrg /* Caller-Saves Register Allocation
    980  1.1  mrg 
    981  1.1  mrg    If you enable it, GNU CC can save registers around function calls.
    982  1.1  mrg    This makes it possible to use call-clobbered registers to hold
    983  1.1  mrg    variables that must live across calls.
    984  1.1  mrg 
    985  1.1  mrg    Function Entry and Exit
    986  1.1  mrg 
    987  1.1  mrg    This section describes the macros that output function entry
    988  1.1  mrg    ("prologue") and exit ("epilogue") code.
    989  1.1  mrg 
    990  1.1  mrg    `EXIT_IGNORE_STACK'
    991  1.1  mrg 
    992  1.1  mrg    Define this macro as a C expression that is nonzero if the return
    993  1.1  mrg    instruction or the function epilogue ignores the value of the stack
    994  1.1  mrg    pointer; in other words, if it is safe to delete an instruction to
    995  1.1  mrg    adjust the stack pointer before a return from the function.
    996  1.1  mrg 
    997  1.1  mrg    Note that this macro's value is relevant only for functions for
    998  1.1  mrg    which frame pointers are maintained.  It is never safe to delete a
    999  1.1  mrg    final stack adjustment in a function that has no frame pointer, and
   1000  1.1  mrg    the compiler knows this regardless of `EXIT_IGNORE_STACK'. */
   1001  1.1  mrg #define EXIT_IGNORE_STACK 1
   1002  1.1  mrg 
   1003  1.1  mrg /* `EPILOGUE_USES (REGNO)'
   1004  1.1  mrg 
   1005  1.1  mrg    Define this macro as a C expression that is nonzero for registers
   1006  1.1  mrg    are used by the epilogue or the `return' pattern.  The stack and
   1007  1.1  mrg    frame pointer registers are already be assumed to be used as
   1008  1.1  mrg    needed. */
   1009  1.1  mrg #define EPILOGUE_USES(REGNO) visium_epilogue_uses (REGNO)
   1010  1.1  mrg 
   1011  1.1  mrg /* Generating Code for Profiling
   1012  1.1  mrg 
   1013  1.1  mrg    These macros will help you generate code for profiling. */
   1014  1.1  mrg 
   1015  1.1  mrg #define PROFILE_HOOK(LABEL) visium_profile_hook ()
   1016  1.1  mrg #define FUNCTION_PROFILER(FILE, LABELNO) do {} while (0)
   1017  1.1  mrg #define NO_PROFILE_COUNTERS 1
   1018  1.1  mrg 
   1019  1.1  mrg /* Trampolines for Nested Functions
   1020  1.1  mrg 
   1021  1.1  mrg    A trampoline is a small piece of code that is created at run time
   1022  1.1  mrg    when the address of a nested function is taken. It normally resides
   1023  1.1  mrg    on the stack, in the stack frame of the containing function. These
   1024  1.1  mrg    macros tell GCC how to generate code to allocate and initialize a
   1025  1.1  mrg    trampoline.
   1026  1.1  mrg 
   1027  1.1  mrg    The instructions in the trampoline must do two things: load a
   1028  1.1  mrg    constant address into the static chain register, and jump to the
   1029  1.1  mrg    real address of the nested function. On CISC machines such as the
   1030  1.1  mrg    m68k, this requires two instructions, a move immediate and a
   1031  1.1  mrg    jump. Then the two addresses exist in the trampoline as word-long
   1032  1.1  mrg    immediate operands. On RISC machines, it is often necessary to load
   1033  1.1  mrg    each address into a register in two parts. Then pieces of each
   1034  1.1  mrg    address form separate immediate operands.
   1035  1.1  mrg 
   1036  1.1  mrg    The code generated to initialize the trampoline must store the
   1037  1.1  mrg    variable parts--the static chain value and the function
   1038  1.1  mrg    address--into the immediate operands of the instructions. On a CISC
   1039  1.1  mrg    machine, this is simply a matter of copying each address to a
   1040  1.1  mrg    memory reference at the proper offset from the start of the
   1041  1.1  mrg    trampoline. On a RISC machine, it may be necessary to take out
   1042  1.1  mrg    pieces of the address and store them separately.
   1043  1.1  mrg 
   1044  1.1  mrg    On the Visium, the trampoline is
   1045  1.1  mrg 
   1046  1.1  mrg 	moviu	r9,%u FUNCTION
   1047  1.1  mrg 	movil	r9,%l FUNCTION
   1048  1.5  mrg 	[nop]
   1049  1.1  mrg 	moviu	r20,%u STATIC
   1050  1.1  mrg 	bra	tr,r9,r0
   1051  1.5  mrg 	 movil	r20,%l STATIC
   1052  1.1  mrg 
   1053  1.1  mrg     A difficulty is setting the correct instruction parity at run time.
   1054  1.1  mrg 
   1055  1.1  mrg 
   1056  1.1  mrg     TRAMPOLINE_SIZE
   1057  1.1  mrg     A C expression for the size in bytes of the trampoline, as an integer. */
   1058  1.5  mrg #define TRAMPOLINE_SIZE (visium_cpu == PROCESSOR_GR6 ? 24 : 20)
   1059  1.5  mrg 
   1060  1.5  mrg /* Alignment required for trampolines, in bits.  */
   1061  1.5  mrg #define TRAMPOLINE_ALIGNMENT (visium_cpu == PROCESSOR_GR6 ? 64 : 32)
   1062  1.1  mrg 
   1063  1.1  mrg /* Implicit calls to library routines
   1064  1.1  mrg 
   1065  1.1  mrg    Avoid calling library routines (sqrtf) just to set `errno' to EDOM */
   1066  1.1  mrg #define TARGET_EDOM 33
   1067  1.1  mrg 
   1068  1.1  mrg /* Addressing Modes
   1069  1.1  mrg 
   1070  1.1  mrg    `MAX_REGS_PER_ADDRESS'
   1071  1.1  mrg 
   1072  1.1  mrg    A number, the maximum number of registers that can appear in a
   1073  1.1  mrg    valid memory address.  Note that it is up to you to specify a value
   1074  1.1  mrg    equal to the maximum number that `TARGET_LEGITIMATE_ADDRESS_P' would
   1075  1.1  mrg    ever accept.  */
   1076  1.1  mrg #define MAX_REGS_PER_ADDRESS 1
   1077  1.1  mrg 
   1078  1.1  mrg /* `LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)'
   1079  1.1  mrg 
   1080  1.1  mrg    A C compound statement that attempts to replace X, which is an
   1081  1.1  mrg    address that needs reloading, with a valid memory address for an
   1082  1.1  mrg    operand of mode MODE.  WIN will be a C statement label elsewhere
   1083  1.1  mrg    in the code.  It is not necessary to define this macro, but it
   1084  1.1  mrg    might be useful for performance reasons.  */
   1085  1.1  mrg #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) 	\
   1086  1.1  mrg do									\
   1087  1.1  mrg {									\
   1088  1.1  mrg   rtx new_x = visium_legitimize_reload_address ((AD), (MODE), (OPNUM),	\
   1089  1.1  mrg 					(int) (TYPE), (IND));		\
   1090  1.1  mrg   if (new_x)								\
   1091  1.1  mrg     {									\
   1092  1.1  mrg       (AD) = new_x;							\
   1093  1.1  mrg       goto WIN;								\
   1094  1.1  mrg     }									\
   1095  1.1  mrg } while (0)
   1096  1.1  mrg 
   1097  1.1  mrg /* Given a comparison code (EQ, NE, etc.) and the operands of a COMPARE,
   1098  1.1  mrg    return the mode to be used for the comparison.  */
   1099  1.1  mrg #define SELECT_CC_MODE(OP,X,Y) visium_select_cc_mode ((OP), (X), (Y))
   1100  1.1  mrg 
   1101  1.1  mrg /* Return nonzero if MODE implies a floating point inequality can be
   1102  1.1  mrg    reversed.  For Visium this is always true because we have a full
   1103  1.1  mrg    compliment of ordered and unordered comparisons, but until generic
   1104  1.1  mrg    code knows how to reverse it correctly we keep the old definition.  */
   1105  1.1  mrg #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode && (MODE) != CCFPmode)
   1106  1.1  mrg 
   1107  1.1  mrg /* `BRANCH_COST'
   1108  1.1  mrg 
   1109  1.1  mrg    A C expression for the cost of a branch instruction.  A value of 1
   1110  1.1  mrg    is the default; other values are interpreted relative to that.  */
   1111  1.1  mrg #define BRANCH_COST(A,B)  10
   1112  1.1  mrg 
   1113  1.1  mrg /* Override BRANCH_COST heuristics for complex logical ops.  */
   1114  1.1  mrg #define LOGICAL_OP_NON_SHORT_CIRCUIT 0
   1115  1.1  mrg 
   1116  1.1  mrg /* `SLOW_BYTE_ACCESS'
   1117  1.1  mrg 
   1118  1.1  mrg    Define this macro as a C expression which is nonzero if accessing
   1119  1.1  mrg    less than a word of memory (i.e. a `char' or a `short') is no
   1120  1.1  mrg    faster than accessing a word of memory, i.e., if such access
   1121  1.1  mrg    require more than one instruction or if there is no difference in
   1122  1.1  mrg    cost between byte and (aligned) word loads.
   1123  1.1  mrg 
   1124  1.1  mrg    When this macro is not defined, the compiler will access a field by
   1125  1.1  mrg    finding the smallest containing object; when it is defined, a
   1126  1.1  mrg    fullword load will be used if alignment permits.  Unless bytes
   1127  1.1  mrg    accesses are faster than word accesses, using word accesses is
   1128  1.1  mrg    preferable since it may eliminate subsequent memory access if
   1129  1.1  mrg    subsequent accesses occur to other fields in the same word of the
   1130  1.1  mrg    structure, but to different bytes. */
   1131  1.1  mrg #define SLOW_BYTE_ACCESS 0
   1132  1.1  mrg 
   1133  1.1  mrg /* `MOVE_RATIO (SPEED)`
   1134  1.1  mrg 
   1135  1.1  mrg    The threshold of number of scalar memory-to-memory move insns,
   1136  1.1  mrg    _below_ which a sequence of insns should be generated instead of a
   1137  1.1  mrg    string move insn or a library call.  Increasing the value will
   1138  1.1  mrg    always make code faster, but eventually incurs high cost in
   1139  1.1  mrg    increased code size.
   1140  1.1  mrg 
   1141  1.1  mrg    Since we have a movmemsi pattern, the default MOVE_RATIO is 2, which
   1142  1.1  mrg    is too low given that movmemsi will invoke a libcall.  */
   1143  1.1  mrg #define MOVE_RATIO(speed) ((speed) ? 9 : 3)
   1144  1.1  mrg 
   1145  1.1  mrg /* `CLEAR_RATIO (SPEED)`
   1146  1.1  mrg 
   1147  1.1  mrg    The threshold of number of scalar move insns, _below_ which a
   1148  1.1  mrg    sequence of insns should be generated to clear memory instead of a
   1149  1.1  mrg    string clear insn or a library call.  Increasing the value will
   1150  1.1  mrg    always make code faster, but eventually incurs high cost in
   1151  1.1  mrg    increased code size.
   1152  1.1  mrg 
   1153  1.1  mrg    Since we have a setmemsi pattern, the default CLEAR_RATIO is 2, which
   1154  1.1  mrg    is too low given that setmemsi will invoke a libcall.  */
   1155  1.1  mrg #define CLEAR_RATIO(speed) ((speed) ? 13 : 5)
   1156  1.1  mrg 
   1157  1.1  mrg /* `MOVE_MAX'
   1158  1.1  mrg 
   1159  1.1  mrg    The maximum number of bytes that a single instruction can move
   1160  1.1  mrg    quickly between memory and registers or between two memory
   1161  1.1  mrg    locations. */
   1162  1.1  mrg #define MOVE_MAX 4
   1163  1.1  mrg 
   1164  1.1  mrg /* `MAX_MOVE_MAX'
   1165  1.1  mrg 
   1166  1.1  mrg    The maximum number of bytes that a single instruction can move
   1167  1.1  mrg    quickly between memory and registers or between two memory
   1168  1.1  mrg    locations.  If this is undefined, the default is `MOVE_MAX'.
   1169  1.1  mrg    Otherwise, it is the constant value that is the largest value that
   1170  1.1  mrg    `MOVE_MAX' can have at run-time. */
   1171  1.1  mrg #define MAX_MOVE_MAX 4
   1172  1.1  mrg 
   1173  1.1  mrg /* `SHIFT_COUNT_TRUNCATED'
   1174  1.1  mrg 
   1175  1.1  mrg    A C expression that is nonzero if on this machine the number of
   1176  1.1  mrg    bits actually used for the count of a shift operation is equal to
   1177  1.1  mrg    the number of bits needed to represent the size of the object being
   1178  1.1  mrg    shifted.  When this macro is non-zero, the compiler will assume
   1179  1.1  mrg    that it is safe to omit a sign-extend, zero-extend, and certain
   1180  1.1  mrg    bitwise `and' instructions that truncates the count of a shift
   1181  1.1  mrg    operation.  On machines that have instructions that act on
   1182  1.1  mrg    bitfields at variable positions, which may include `bit test'
   1183  1.1  mrg    instructions, a nonzero `SHIFT_COUNT_TRUNCATED' also enables
   1184  1.1  mrg    deletion of truncations of the values that serve as arguments to
   1185  1.1  mrg    bitfield instructions. */
   1186  1.1  mrg #define SHIFT_COUNT_TRUNCATED 0
   1187  1.1  mrg 
   1188  1.1  mrg /* `STORE_FLAG_VALUE'
   1189  1.1  mrg 
   1190  1.1  mrg    A C expression describing the value returned by a comparison
   1191  1.1  mrg    operator with an integral mode and stored by a store-flag
   1192  1.1  mrg    instruction (`sCOND') when the condition is true.  This description
   1193  1.1  mrg    must apply to *all* the `sCOND' patterns and all the comparison
   1194  1.1  mrg    operators whose results have a `MODE_INT' mode. */
   1195  1.1  mrg #define STORE_FLAG_VALUE 1
   1196  1.1  mrg 
   1197  1.1  mrg /* `Pmode'
   1198  1.1  mrg 
   1199  1.1  mrg    An alias for the machine mode for pointers.  On most machines,
   1200  1.1  mrg    define this to be the integer mode corresponding to the width of a
   1201  1.1  mrg    hardware pointer; `SImode' on 32-bit machine or `DImode' on 64-bit
   1202  1.1  mrg    machines.  On some machines you must define this to be one of the
   1203  1.1  mrg    partial integer modes, such as `PSImode'.
   1204  1.1  mrg 
   1205  1.1  mrg    The width of `Pmode' must be at least as large as the value of
   1206  1.1  mrg    `POINTER_SIZE'.  If it is not equal, you must define the macro
   1207  1.1  mrg    `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to
   1208  1.1  mrg    `Pmode'. */
   1209  1.1  mrg #define Pmode SImode
   1210  1.1  mrg 
   1211  1.1  mrg /* `FUNCTION_MODE'
   1212  1.1  mrg 
   1213  1.1  mrg    An alias for the machine mode used for memory references to
   1214  1.1  mrg    functions being called, in `call' RTL expressions.  On most
   1215  1.1  mrg    machines this should be `QImode'. */
   1216  1.1  mrg #define FUNCTION_MODE SImode
   1217  1.1  mrg 
   1218  1.1  mrg /* Dividing the Output into Sections (Texts, Data, ...)
   1219  1.1  mrg 
   1220  1.1  mrg    An object file is divided into sections containing different types
   1221  1.1  mrg    of data.  In the most common case, there are three sections: the
   1222  1.1  mrg    "text section", which holds instructions and read-only data; the
   1223  1.1  mrg    "data section", which holds initialized writable data; and the "bss
   1224  1.1  mrg    section", which holds uninitialized data.  Some systems have other
   1225  1.1  mrg    kinds of sections.
   1226  1.1  mrg 
   1227  1.1  mrg    `TEXT_SECTION_ASM_OP'
   1228  1.1  mrg 
   1229  1.1  mrg    A C expression whose value is a string containing the assembler
   1230  1.1  mrg    operation that should precede instructions and read-only data.
   1231  1.1  mrg    Normally `".text"' is right. */
   1232  1.1  mrg #define TEXT_SECTION_ASM_OP "\t.text"
   1233  1.1  mrg 
   1234  1.1  mrg /* `DATA_SECTION_ASM_OP'
   1235  1.1  mrg 
   1236  1.1  mrg    A C expression whose value is a string containing the assembler
   1237  1.1  mrg    operation to identify the following data as writable initialized
   1238  1.1  mrg    data.  Normally `".data"' is right. */
   1239  1.1  mrg #define DATA_SECTION_ASM_OP "\t.data"
   1240  1.1  mrg 
   1241  1.1  mrg /* `BSS_SECTION_ASM_OP'
   1242  1.1  mrg 
   1243  1.1  mrg    If defined, a C expression whose value is a string containing the
   1244  1.1  mrg    assembler operation to identify the following data as uninitialized
   1245  1.1  mrg    global data.  If not defined, and neither `ASM_OUTPUT_BSS' nor
   1246  1.1  mrg    `ASM_OUTPUT_ALIGNED_BSS' are defined, uninitialized global data
   1247  1.1  mrg    will be output in the data section if `-fno-common' is passed,
   1248  1.1  mrg    otherwise `ASM_OUTPUT_COMMON' will be used.
   1249  1.1  mrg 
   1250  1.1  mrg    `EXTRA_SECTIONS'
   1251  1.1  mrg 
   1252  1.1  mrg    A list of names for sections other than the standard two, which are
   1253  1.1  mrg    `in_text' and `in_data'.  You need not define this macro on a
   1254  1.1  mrg    system with no other sections (that GCC needs to use).
   1255  1.1  mrg 
   1256  1.1  mrg    `EXTRA_SECTION_FUNCTIONS'
   1257  1.1  mrg 
   1258  1.1  mrg    One or more functions to be defined in `varasm.c'.  These functions
   1259  1.1  mrg    should do jobs analogous to those of `text_section' and
   1260  1.1  mrg    `data_section', for your additional sections.  Do not define this
   1261  1.1  mrg    macro if you do not define `EXTRA_SECTIONS'.
   1262  1.1  mrg 
   1263  1.1  mrg    `JUMP_TABLES_IN_TEXT_SECTION' Define this macro if jump tables (for
   1264  1.1  mrg    `tablejump' insns) should be output in the text section, along with
   1265  1.1  mrg    the assembler instructions.  Otherwise, the readonly data section
   1266  1.1  mrg    is used.
   1267  1.1  mrg 
   1268  1.1  mrg    This macro is irrelevant if there is no separate readonly data
   1269  1.1  mrg    section. */
   1270  1.1  mrg #undef JUMP_TABLES_IN_TEXT_SECTION
   1271  1.1  mrg 
   1272  1.1  mrg 
   1273  1.1  mrg /* The Overall Framework of an Assembler File
   1274  1.1  mrg 
   1275  1.1  mrg    This describes the overall framework of an assembler file.
   1276  1.1  mrg 
   1277  1.1  mrg    `ASM_COMMENT_START'
   1278  1.1  mrg 
   1279  1.1  mrg    A C string constant describing how to begin a comment in the target
   1280  1.1  mrg    assembler language.  The compiler assumes that the comment will end
   1281  1.1  mrg    at the end of the line. */
   1282  1.1  mrg #define ASM_COMMENT_START ";"
   1283  1.1  mrg 
   1284  1.1  mrg /* `ASM_APP_ON'
   1285  1.1  mrg 
   1286  1.1  mrg    A C string constant for text to be output before each `asm'
   1287  1.1  mrg    statement or group of consecutive ones.  Normally this is `"#APP"',
   1288  1.1  mrg    which is a comment that has no effect on most assemblers but tells
   1289  1.1  mrg    the GNU assembler that it must check the lines that follow for all
   1290  1.1  mrg    valid assembler constructs. */
   1291  1.1  mrg #define ASM_APP_ON "#APP\n"
   1292  1.1  mrg 
   1293  1.1  mrg /* `ASM_APP_OFF'
   1294  1.1  mrg 
   1295  1.1  mrg    A C string constant for text to be output after each `asm'
   1296  1.1  mrg    statement or group of consecutive ones.  Normally this is
   1297  1.1  mrg    `"#NO_APP"', which tells the GNU assembler to resume making the
   1298  1.1  mrg    time-saving assumptions that are valid for ordinary compiler
   1299  1.1  mrg    output. */
   1300  1.1  mrg #define ASM_APP_OFF "#NO_APP\n"
   1301  1.1  mrg 
   1302  1.1  mrg /* Output of Data
   1303  1.1  mrg 
   1304  1.1  mrg    This describes data output.
   1305  1.1  mrg 
   1306  1.1  mrg    Output and Generation of Labels
   1307  1.1  mrg 
   1308  1.1  mrg    This is about outputting labels.
   1309  1.1  mrg 
   1310  1.1  mrg    `ASM_OUTPUT_LABEL (STREAM, NAME)'
   1311  1.1  mrg 
   1312  1.1  mrg    A C statement (sans semicolon) to output to the stdio stream STREAM
   1313  1.1  mrg    the assembler definition of a label named NAME.  Use the expression
   1314  1.1  mrg    `assemble_name (STREAM, NAME)' to output the name itself; before
   1315  1.1  mrg    and after that, output the additional assembler syntax for defining
   1316  1.1  mrg    the name, and a newline. */
   1317  1.1  mrg #define ASM_OUTPUT_LABEL(STREAM,NAME)     \
   1318  1.1  mrg   do { assemble_name (STREAM, NAME); fputs (":\n", STREAM); } while (0)
   1319  1.1  mrg 
   1320  1.1  mrg /* Globalizing directive for a label */
   1321  1.1  mrg #define GLOBAL_ASM_OP "\t.global "
   1322  1.1  mrg 
   1323  1.1  mrg /* `ASM_OUTPUT_LABELREF (STREAM, NAME)'
   1324  1.1  mrg 
   1325  1.1  mrg    A C statement (sans semicolon) to output to the stdio stream STREAM
   1326  1.1  mrg    a reference in assembler syntax to a label named NAME.  This should
   1327  1.1  mrg    add `_' to the front of the name, if that is customary on your
   1328  1.1  mrg    operating system, as it is in most Berkeley Unix systems.  This
   1329  1.1  mrg    macro is used in `assemble_name'. */
   1330  1.1  mrg #define ASM_OUTPUT_LABELREF(STREAM,NAME)  \
   1331  1.1  mrg   asm_fprintf (STREAM, "%U%s", NAME)
   1332  1.1  mrg 
   1333  1.1  mrg /* Output of Assembler Instructions
   1334  1.1  mrg 
   1335  1.1  mrg    This describes assembler instruction output.
   1336  1.1  mrg 
   1337  1.1  mrg    `REGISTER_NAMES'
   1338  1.1  mrg 
   1339  1.1  mrg    A C initializer containing the assembler's names for the machine
   1340  1.1  mrg    registers, each one as a C string constant.  This is what
   1341  1.1  mrg    translates register numbers in the compiler into assembler
   1342  1.1  mrg    language. */
   1343  1.1  mrg #define REGISTER_NAMES \
   1344  1.1  mrg  {"r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",  \
   1345  1.1  mrg   "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15", \
   1346  1.1  mrg   "r16", "r17", "r18", "r19", "r20", "r21", "fp",  "sp",  \
   1347  1.1  mrg   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
   1348  1.1  mrg   "mdb", "mdc",                                           \
   1349  1.1  mrg   "f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",  \
   1350  1.1  mrg   "f8",  "f9",  "f10", "f11", "f12", "f13", "f14", "f15", \
   1351  1.1  mrg   "flags","argp","sfp" }
   1352  1.1  mrg 
   1353  1.1  mrg /* `ADDITIONAL_REGISTER_NAMES`
   1354  1.1  mrg 
   1355  1.1  mrg    If defined, a C initializer for an array of structures containing
   1356  1.1  mrg    a name and a register number.  This macro defines additional names
   1357  1.1  mrg    for hard registers, thus allowing the `asm' option in declarations
   1358  1.1  mrg    to refer to registers using alternate names.  */
   1359  1.1  mrg #define ADDITIONAL_REGISTER_NAMES \
   1360  1.1  mrg   {{"r22", HARD_FRAME_POINTER_REGNUM}, {"r23", STACK_POINTER_REGNUM}}
   1361  1.1  mrg 
   1362  1.1  mrg /* `REGISTER_PREFIX'
   1363  1.1  mrg    `LOCAL_LABEL_PREFIX'
   1364  1.1  mrg    `USER_LABEL_PREFIX'
   1365  1.1  mrg    `IMMEDIATE_PREFIX'
   1366  1.1  mrg 
   1367  1.1  mrg    If defined, C string expressions to be used for the `%R', `%L',
   1368  1.1  mrg    `%U', and `%I' options of `asm_fprintf' (see `final.c').  These are
   1369  1.1  mrg    useful when a single `md' file must support multiple assembler
   1370  1.1  mrg    formats.  In that case, the various `tm.h' files can define these
   1371  1.1  mrg    macros differently. */
   1372  1.1  mrg #define REGISTER_PREFIX ""
   1373  1.1  mrg #define LOCAL_LABEL_PREFIX "."
   1374  1.1  mrg #define IMMEDIATE_PREFIX "#"
   1375  1.1  mrg 
   1376  1.1  mrg /* `ASM_OUTPUT_REG_PUSH (STREAM, REGNO)'
   1377  1.1  mrg 
   1378  1.1  mrg    A C expression to output to STREAM some assembler code which will
   1379  1.1  mrg    push hard register number REGNO onto the stack.  The code need not
   1380  1.1  mrg    be optimal, since this macro is used only when profiling. */
   1381  1.1  mrg #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO)  \
   1382  1.1  mrg   asm_fprintf (STREAM, "\tsubi    sp,4\n\twrite.l (sp),%s\n", \
   1383  1.1  mrg                reg_names[REGNO])
   1384  1.1  mrg 
   1385  1.1  mrg /* `ASM_OUTPUT_REG_POP (STREAM, REGNO)'
   1386  1.1  mrg 
   1387  1.1  mrg    A C expression to output to STREAM some assembler code which will
   1388  1.1  mrg    pop hard register number REGNO off of the stack.  The code need not
   1389  1.1  mrg    be optimal, since this macro is used only when profiling. */
   1390  1.1  mrg #define ASM_OUTPUT_REG_POP(STREAM,REGNO)  \
   1391  1.1  mrg   asm_fprintf (STREAM, "\tread.l  %s,(sp)\n\taddi    sp,4\n", \
   1392  1.1  mrg                reg_names[REGNO])
   1393  1.1  mrg 
   1394  1.1  mrg 
   1395  1.1  mrg /* Output of Dispatch Tables
   1396  1.1  mrg 
   1397  1.1  mrg    This concerns dispatch tables.
   1398  1.1  mrg 
   1399  1.1  mrg    `ASM_OUTPUT_ADDR_DIFF_ELT (STREAM, VALUE, REL)'
   1400  1.1  mrg 
   1401  1.1  mrg    A C statement to output to the stdio stream STREAM an assembler
   1402  1.1  mrg    pseudo-instruction to generate a difference between two labels.
   1403  1.1  mrg    VALUE and REL are the numbers of two internal labels.  The
   1404  1.1  mrg    definitions of these labels are output using
   1405  1.1  mrg    `ASM_OUTPUT_INTERNAL_LABEL', and they must be printed in the same
   1406  1.1  mrg    way here.
   1407  1.1  mrg 
   1408  1.1  mrg    You must provide this macro on machines where the addresses in a
   1409  1.1  mrg    dispatch table are relative to the table's own address.  If
   1410  1.1  mrg    defined, GNU CC will also use this macro on all machines when
   1411  1.1  mrg    producing PIC. */
   1412  1.1  mrg #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL)  		\
   1413  1.1  mrg   switch (GET_MODE (BODY))						\
   1414  1.1  mrg     {									\
   1415  1.4  mrg     case E_SImode:							\
   1416  1.1  mrg       asm_fprintf ((STREAM), "\t.long\t%LL%d-%LL%d\n", (VALUE),(REL));	\
   1417  1.1  mrg       break;								\
   1418  1.4  mrg     case E_HImode:							\
   1419  1.1  mrg       asm_fprintf ((STREAM), "\t.word\t%LL%d-%LL%d\n", (VALUE),(REL));	\
   1420  1.1  mrg       break;								\
   1421  1.4  mrg     case E_QImode:							\
   1422  1.1  mrg       asm_fprintf ((STREAM), "\t.byte\t%LL%d-%LL%d\n", (VALUE),(REL));	\
   1423  1.1  mrg       break;								\
   1424  1.1  mrg     default:								\
   1425  1.1  mrg       break;								\
   1426  1.1  mrg     }
   1427  1.1  mrg 
   1428  1.1  mrg /* `ASM_OUTPUT_ADDR_VEC_ELT (STREAM, VALUE)'
   1429  1.1  mrg 
   1430  1.1  mrg    This macro should be provided on machines where the addresses in a
   1431  1.1  mrg    dispatch table are absolute.
   1432  1.1  mrg 
   1433  1.1  mrg    The definition should be a C statement to output to the stdio
   1434  1.1  mrg    stream STREAM an assembler pseudo-instruction to generate a
   1435  1.1  mrg    reference to a label.  VALUE is the number of an internal label
   1436  1.1  mrg    whose definition is output using `ASM_OUTPUT_INTERNAL_LABEL'. */
   1437  1.1  mrg #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)  \
   1438  1.1  mrg   asm_fprintf (STREAM, "\t.long   %LL%d\n", VALUE)
   1439  1.1  mrg 
   1440  1.1  mrg /* `ASM_OUTPUT_CASE_END (STREAM, NUM, TABLE)'
   1441  1.1  mrg 
   1442  1.1  mrg    Define this if something special must be output at the end of a
   1443  1.1  mrg    jump-table. The definition should be a C statement to be executed
   1444  1.1  mrg    after the assembler code for the table is written. It should write
   1445  1.1  mrg    the appropriate code to stdio stream STREAM. The argument TABLE is
   1446  1.1  mrg    the jump-table insn, and NUM is the label-number of the preceding
   1447  1.1  mrg    label.
   1448  1.1  mrg 
   1449  1.1  mrg    If this macro is not defined, nothing special is output at the end
   1450  1.1  mrg    of a jump table.
   1451  1.1  mrg 
   1452  1.1  mrg    Here we output a word of zero so that jump-tables can be seperated
   1453  1.1  mrg    in reverse assembly. */
   1454  1.1  mrg #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) \
   1455  1.4  mrg   asm_fprintf (STREAM, "\t.long   0\n")
   1456  1.1  mrg 
   1457  1.5  mrg /* Support subalignment values.  */
   1458  1.5  mrg 
   1459  1.5  mrg #define SUBALIGN_LOG 3
   1460  1.5  mrg 
   1461  1.1  mrg /* Assembler Commands for Alignment
   1462  1.1  mrg 
   1463  1.1  mrg    This describes commands for alignment.
   1464  1.1  mrg 
   1465  1.1  mrg    `ASM_OUTPUT_ALIGN_CODE (STREAM)'
   1466  1.1  mrg 
   1467  1.1  mrg    A C expression to output text to align the location counter in the
   1468  1.1  mrg    way that is desirable at a point in the code that is reached only
   1469  1.1  mrg    by jumping.
   1470  1.1  mrg 
   1471  1.1  mrg    This macro need not be defined if you don't want any special
   1472  1.1  mrg    alignment to be done at such a time.  Most machine descriptions do
   1473  1.1  mrg    not currently define the macro. */
   1474  1.1  mrg #undef ASM_OUTPUT_ALIGN_CODE
   1475  1.1  mrg 
   1476  1.1  mrg /* `ASM_OUTPUT_LOOP_ALIGN (STREAM)'
   1477  1.1  mrg 
   1478  1.1  mrg    A C expression to output text to align the location counter in the
   1479  1.1  mrg    way that is desirable at the beginning of a loop.
   1480  1.1  mrg 
   1481  1.1  mrg    This macro need not be defined if you don't want any special
   1482  1.1  mrg    alignment to be done at such a time.  Most machine descriptions do
   1483  1.1  mrg    not currently define the macro. */
   1484  1.1  mrg #undef ASM_OUTPUT_LOOP_ALIGN
   1485  1.1  mrg 
   1486  1.1  mrg /* `ASM_OUTPUT_ALIGN (STREAM, POWER)'
   1487  1.1  mrg 
   1488  1.1  mrg    A C statement to output to the stdio stream STREAM an assembler
   1489  1.1  mrg    command to advance the location counter to a multiple of 2 to the
   1490  1.1  mrg    POWER bytes.  POWER will be a C expression of type `int'. */
   1491  1.1  mrg #define ASM_OUTPUT_ALIGN(STREAM,LOG)      \
   1492  1.1  mrg   if ((LOG) != 0)                       \
   1493  1.5  mrg     fprintf (STREAM, "\t.align  %d\n", (1 << (LOG)))
   1494  1.1  mrg 
   1495  1.1  mrg /* `ASM_OUTPUT_MAX_SKIP_ALIGN (STREAM, POWER, MAX_SKIP)`
   1496  1.1  mrg 
   1497  1.1  mrg    A C statement to output to the stdio stream STREAM an assembler
   1498  1.1  mrg    command to advance the location counter to a multiple of 2 to the
   1499  1.1  mrg    POWER bytes, but only if MAX_SKIP or fewer bytes are needed to
   1500  1.1  mrg    satisfy the alignment request.  POWER and MAX_SKIP will be a C
   1501  1.1  mrg    expression of type `int'. */
   1502  1.1  mrg #define ASM_OUTPUT_MAX_SKIP_ALIGN(STREAM,LOG,MAX_SKIP)			\
   1503  1.1  mrg   if ((LOG) != 0) {							\
   1504  1.5  mrg     if ((MAX_SKIP) == 0 || (MAX_SKIP) >= (1 << (LOG)) - 1)		\
   1505  1.5  mrg       fprintf ((STREAM), "\t.p2align %d\n", (LOG));			\
   1506  1.5  mrg     else								\
   1507  1.1  mrg       fprintf ((STREAM), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP));	\
   1508  1.1  mrg   }
   1509  1.1  mrg 
   1510  1.1  mrg /* Controlling Debugging Information Format
   1511  1.1  mrg 
   1512  1.1  mrg    This describes how to specify debugging information.
   1513  1.1  mrg 
   1514  1.1  mrg     mda is known to GDB, but not to GCC. */
   1515  1.1  mrg #define DBX_REGISTER_NUMBER(REGNO) \
   1516  1.1  mrg   ((REGNO) > MDB_REGNUM ? (REGNO) + 1 : (REGNO))
   1517  1.1  mrg 
   1518  1.1  mrg /* `DEBUGGER_AUTO_OFFSET (X)'
   1519  1.1  mrg 
   1520  1.1  mrg    A C expression that returns the integer offset value for an
   1521  1.1  mrg    automatic variable having address X (an RTL expression).  The
   1522  1.1  mrg    default computation assumes that X is based on the frame-pointer
   1523  1.1  mrg    and gives the offset from the frame-pointer.  This is required for
   1524  1.4  mrg    targets that produce debugging output for DBX and allow the frame-pointer
   1525  1.4  mrg    to be eliminated when the `-g' options is used. */
   1526  1.1  mrg #define DEBUGGER_AUTO_OFFSET(X) \
   1527  1.1  mrg   (GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0)
   1528  1.1  mrg 
   1529  1.1  mrg /* Miscellaneous Parameters
   1530  1.1  mrg 
   1531  1.1  mrg    `CASE_VECTOR_MODE'
   1532  1.1  mrg 
   1533  1.1  mrg    An alias for a machine mode name.  This is the machine mode that
   1534  1.1  mrg    elements of a jump-table should have. */
   1535  1.1  mrg #define CASE_VECTOR_MODE SImode
   1536  1.1  mrg 
   1537  1.1  mrg /* `CASE_VECTOR_PC_RELATIVE'
   1538  1.1  mrg    Define this macro if jump-tables should contain relative addresses. */
   1539  1.1  mrg #undef CASE_VECTOR_PC_RELATIVE
   1540  1.1  mrg 
   1541  1.1  mrg /* This says how to output assembler code to declare an
   1542  1.1  mrg    unitialised external linkage data object. */
   1543  1.1  mrg #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)      \
   1544  1.1  mrg ( fputs ("\n\t.comm  ", (STREAM)),                        \
   1545  1.1  mrg   assemble_name ((STREAM), (NAME)),                         \
   1546  1.3  mrg   fprintf ((STREAM), "," HOST_WIDE_INT_PRINT_UNSIGNED"\n", ROUNDED))
   1547  1.1  mrg 
   1548  1.1  mrg /* This says how to output assembler code to declare an
   1549  1.1  mrg    unitialised internal linkage data object. */
   1550  1.1  mrg #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)     \
   1551  1.1  mrg ( fputs ("\n\t.lcomm ", (STREAM)),                      \
   1552  1.1  mrg   assemble_name ((STREAM), (NAME)),                     \
   1553  1.3  mrg   fprintf ((STREAM), "," HOST_WIDE_INT_PRINT_UNSIGNED"\n", ROUNDED))
   1554  1.1  mrg 
   1555  1.1  mrg /* Prettify the assembly.  */
   1556  1.1  mrg extern int visium_indent_opcode;
   1557  1.1  mrg 
   1558  1.1  mrg #define ASM_OUTPUT_OPCODE(FILE, PTR)	\
   1559  1.1  mrg   do {					\
   1560  1.1  mrg     if (visium_indent_opcode)		\
   1561  1.1  mrg       {					\
   1562  1.1  mrg 	putc (' ', FILE);		\
   1563  1.1  mrg 	visium_indent_opcode = 0;	\
   1564  1.1  mrg       }					\
   1565  1.1  mrg   } while (0)
   1566  1.3  mrg 
   1567  1.3  mrg /* Configure-time default values for common options.  */
   1568  1.3  mrg #define OPTION_DEFAULT_SPECS { "cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }
   1569  1.3  mrg 
   1570  1.3  mrg /* Values of TARGET_CPU_DEFAULT specified via --with-cpu.  */
   1571  1.3  mrg #define TARGET_CPU_gr5	0
   1572  1.3  mrg #define TARGET_CPU_gr6	1
   1573  1.3  mrg 
   1574  1.3  mrg /* Default -mcpu multilib for above values.  */
   1575  1.3  mrg #if TARGET_CPU_DEFAULT == TARGET_CPU_gr5
   1576  1.3  mrg #define MULTILIB_DEFAULTS { "mcpu=gr5" }
   1577  1.3  mrg #elif TARGET_CPU_DEFAULT == TARGET_CPU_gr6
   1578  1.3  mrg #define MULTILIB_DEFAULTS { "mcpu=gr6" }
   1579  1.3  mrg #else
   1580  1.3  mrg #error Unrecognized value in TARGET_CPU_DEFAULT
   1581  1.3  mrg #endif
   1582