lra-remat.cc revision 1.1 1 1.1 mrg /* Rematerialize pseudos values.
2 1.1 mrg Copyright (C) 2014-2022 Free Software Foundation, Inc.
3 1.1 mrg Contributed by Vladimir Makarov <vmakarov (at) redhat.com>.
4 1.1 mrg
5 1.1 mrg This file is part of GCC.
6 1.1 mrg
7 1.1 mrg GCC is free software; you can redistribute it and/or modify it under
8 1.1 mrg the terms of the GNU General Public License as published by the Free
9 1.1 mrg Software Foundation; either version 3, or (at your option) any later
10 1.1 mrg version.
11 1.1 mrg
12 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 1.1 mrg WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 1.1 mrg FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 1.1 mrg for more details.
16 1.1 mrg
17 1.1 mrg You should have received a copy of the GNU General Public License
18 1.1 mrg along with GCC; see the file COPYING3. If not see
19 1.1 mrg <http://www.gnu.org/licenses/>. */
20 1.1 mrg
21 1.1 mrg /* This code objective is to rematerialize spilled pseudo values. To
22 1.1 mrg do this we calculate available insn candidates. The candidate is
23 1.1 mrg available at some point if there is dominated set of insns with the
24 1.1 mrg same pattern, the insn inputs are not dying or modified on any path
25 1.1 mrg from the set, the outputs are not modified.
26 1.1 mrg
27 1.1 mrg The insns containing memory or spilled pseudos (except for the
28 1.1 mrg rematerialized pseudo) are not considered as such insns are not
29 1.1 mrg profitable in comparison with regular loads of spilled pseudo
30 1.1 mrg values. That simplifies the implementation as we don't need to
31 1.1 mrg deal with memory aliasing.
32 1.1 mrg
33 1.1 mrg To speed up available candidate calculation, we calculate partially
34 1.1 mrg available candidates first and use them for initialization of the
35 1.1 mrg availability. That is because (partial) availability sets are
36 1.1 mrg sparse.
37 1.1 mrg
38 1.1 mrg The rematerialization sub-pass could be improved further in the
39 1.1 mrg following ways:
40 1.1 mrg
41 1.1 mrg o We could make longer live ranges of inputs in the
42 1.1 mrg rematerialization candidates if their hard registers are not used
43 1.1 mrg for other purposes. This could be complicated if we need to
44 1.1 mrg update BB live info information as LRA does not use
45 1.1 mrg DF-infrastructure for compile-time reasons. This problem could
46 1.1 mrg be overcome if constrain making live ranges longer only in BB/EBB
47 1.1 mrg scope.
48 1.1 mrg o We could use cost-based decision to choose rematerialization insn
49 1.1 mrg (currently all insns without memory is can be used).
50 1.1 mrg o We could use other free hard regs for unused output pseudos in
51 1.1 mrg rematerialization candidates although such cases probably will
52 1.1 mrg be very rare. */
53 1.1 mrg
54 1.1 mrg
55 1.1 mrg #include "config.h"
56 1.1 mrg #include "system.h"
57 1.1 mrg #include "coretypes.h"
58 1.1 mrg #include "backend.h"
59 1.1 mrg #include "rtl.h"
60 1.1 mrg #include "df.h"
61 1.1 mrg #include "insn-config.h"
62 1.1 mrg #include "regs.h"
63 1.1 mrg #include "memmodel.h"
64 1.1 mrg #include "ira.h"
65 1.1 mrg #include "recog.h"
66 1.1 mrg #include "lra.h"
67 1.1 mrg #include "lra-int.h"
68 1.1 mrg #include "function-abi.h"
69 1.1 mrg
70 1.1 mrg /* Number of candidates for rematerialization. */
71 1.1 mrg static unsigned int cands_num;
72 1.1 mrg
73 1.1 mrg /* Bitmap used for different calculations. */
74 1.1 mrg static bitmap_head temp_bitmap;
75 1.1 mrg
76 1.1 mrg /* Registers accessed via subreg_p. */
77 1.1 mrg static bitmap_head subreg_regs;
78 1.1 mrg
79 1.1 mrg typedef struct cand *cand_t;
80 1.1 mrg typedef const struct cand *const_cand_t;
81 1.1 mrg
82 1.1 mrg /* Insn candidates for rematerialization. The candidate insn should
83 1.1 mrg have the following properies:
84 1.1 mrg o no any memory (as access to memory is non-profitable)
85 1.1 mrg o no INOUT regs (it means no non-paradoxical subreg of output reg)
86 1.1 mrg o one output spilled pseudo (or reload pseudo of a spilled pseudo)
87 1.1 mrg o all other pseudos are with assigned hard regs. */
88 1.1 mrg struct cand
89 1.1 mrg {
90 1.1 mrg /* Index of the candidates in all_cands. */
91 1.1 mrg int index;
92 1.1 mrg /* Insn pseudo regno for rematerialization. */
93 1.1 mrg int regno;
94 1.1 mrg /* The candidate insn. */
95 1.1 mrg rtx_insn *insn;
96 1.1 mrg /* Non-negative if a reload pseudo is in the insn instead of the
97 1.1 mrg pseudo for rematerialization. */
98 1.1 mrg int reload_regno;
99 1.1 mrg /* Number of the operand containing the regno or its reload
100 1.1 mrg regno. */
101 1.1 mrg int nop;
102 1.1 mrg /* Next candidate for the same regno. */
103 1.1 mrg cand_t next_regno_cand;
104 1.1 mrg };
105 1.1 mrg
106 1.1 mrg /* Vector containing all candidates. */
107 1.1 mrg static vec<cand_t> all_cands;
108 1.1 mrg /* Map: insn -> candidate representing it. It is null if the insn cannot
109 1.1 mrg be used for rematerialization. */
110 1.1 mrg static cand_t *insn_to_cand;
111 1.1 mrg /* A secondary map, for candidates that involve two insns, where the
112 1.1 mrg second one makes the equivalence. The candidate must not be used
113 1.1 mrg before seeing this activation insn. */
114 1.1 mrg static cand_t *insn_to_cand_activation;
115 1.1 mrg
116 1.1 mrg /* Map regno -> candidates can be used for the regno
117 1.1 mrg rematerialization. */
118 1.1 mrg static cand_t *regno_cands;
119 1.1 mrg
120 1.1 mrg /* Data about basic blocks used for the rematerialization
121 1.1 mrg sub-pass. */
122 1.1 mrg class remat_bb_data
123 1.1 mrg {
124 1.1 mrg public:
125 1.1 mrg /* Basic block about which the below data are. */
126 1.1 mrg basic_block bb;
127 1.1 mrg /* Registers changed in the basic block: */
128 1.1 mrg bitmap_head changed_regs;
129 1.1 mrg /* Registers becoming dead in the BB. */
130 1.1 mrg bitmap_head dead_regs;
131 1.1 mrg /* Cands present in the BB whose in/out regs are not changed after
132 1.1 mrg the cands occurence and are not dead (except the reload
133 1.1 mrg regno). */
134 1.1 mrg bitmap_head gen_cands;
135 1.1 mrg bitmap_head livein_cands; /* cands whose inputs live at the BB start. */
136 1.1 mrg bitmap_head pavin_cands; /* cands partially available at BB entry. */
137 1.1 mrg bitmap_head pavout_cands; /* cands partially available at BB exit. */
138 1.1 mrg bitmap_head avin_cands; /* cands available at the entry of the BB. */
139 1.1 mrg bitmap_head avout_cands; /* cands available at the exit of the BB. */
140 1.1 mrg };
141 1.1 mrg
142 1.1 mrg /* Array for all BB data. Indexed by the corresponding BB index. */
143 1.1 mrg typedef class remat_bb_data *remat_bb_data_t;
144 1.1 mrg
145 1.1 mrg /* Basic blocks for data flow problems -- all bocks except the special
146 1.1 mrg ones. */
147 1.1 mrg static bitmap_head all_blocks;
148 1.1 mrg
149 1.1 mrg /* All basic block data are referred through the following array. */
150 1.1 mrg static remat_bb_data_t remat_bb_data;
151 1.1 mrg
152 1.1 mrg /* Two small functions for access to the bb data. */
153 1.1 mrg static inline remat_bb_data_t
154 1.1 mrg get_remat_bb_data (basic_block bb)
155 1.1 mrg {
156 1.1 mrg return &remat_bb_data[(bb)->index];
157 1.1 mrg }
158 1.1 mrg
159 1.1 mrg static inline remat_bb_data_t
160 1.1 mrg get_remat_bb_data_by_index (int index)
161 1.1 mrg {
162 1.1 mrg return &remat_bb_data[index];
163 1.1 mrg }
164 1.1 mrg
165 1.1 mrg
166 1.1 mrg
168 1.1 mrg /* Hash table for the candidates. Different insns (e.g. structurally
169 1.1 mrg the same insns or even insns with different unused output regs) can
170 1.1 mrg be represented by the same candidate in the table. */
171 1.1 mrg static htab_t cand_table;
172 1.1 mrg
173 1.1 mrg /* Hash function for candidate CAND. */
174 1.1 mrg static hashval_t
175 1.1 mrg cand_hash (const void *cand)
176 1.1 mrg {
177 1.1 mrg const_cand_t c = (const_cand_t) cand;
178 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (c->insn);
179 1.1 mrg struct lra_static_insn_data *static_id = id->insn_static_data;
180 1.1 mrg int nops = static_id->n_operands;
181 1.1 mrg hashval_t hash = 0;
182 1.1 mrg
183 1.1 mrg for (int i = 0; i < nops; i++)
184 1.1 mrg if (i == c->nop)
185 1.1 mrg hash = iterative_hash_object (c->regno, hash);
186 1.1 mrg else if (static_id->operand[i].type == OP_IN)
187 1.1 mrg hash = iterative_hash_object (*id->operand_loc[i], hash);
188 1.1 mrg return hash;
189 1.1 mrg }
190 1.1 mrg
191 1.1 mrg /* Equal function for candidates CAND1 and CAND2. They are equal if
192 1.1 mrg the corresponding candidate insns have the same code, the same
193 1.1 mrg regno for rematerialization, the same input operands. */
194 1.1 mrg static int
195 1.1 mrg cand_eq_p (const void *cand1, const void *cand2)
196 1.1 mrg {
197 1.1 mrg const_cand_t c1 = (const_cand_t) cand1;
198 1.1 mrg const_cand_t c2 = (const_cand_t) cand2;
199 1.1 mrg lra_insn_recog_data_t id1 = lra_get_insn_recog_data (c1->insn);
200 1.1 mrg lra_insn_recog_data_t id2 = lra_get_insn_recog_data (c2->insn);
201 1.1 mrg struct lra_static_insn_data *static_id1 = id1->insn_static_data;
202 1.1 mrg int nops = static_id1->n_operands;
203 1.1 mrg
204 1.1 mrg if (c1->regno != c2->regno
205 1.1 mrg || INSN_CODE (c1->insn) < 0
206 1.1 mrg || INSN_CODE (c1->insn) != INSN_CODE (c2->insn))
207 1.1 mrg return false;
208 1.1 mrg gcc_assert (c1->nop == c2->nop);
209 1.1 mrg for (int i = 0; i < nops; i++)
210 1.1 mrg if (i != c1->nop && static_id1->operand[i].type == OP_IN
211 1.1 mrg && *id1->operand_loc[i] != *id2->operand_loc[i])
212 1.1 mrg return false;
213 1.1 mrg return true;
214 1.1 mrg }
215 1.1 mrg
216 1.1 mrg /* Insert candidate CAND into the table if it is not there yet.
217 1.1 mrg Return candidate which is in the table. */
218 1.1 mrg static cand_t
219 1.1 mrg insert_cand (cand_t cand)
220 1.1 mrg {
221 1.1 mrg void **entry_ptr;
222 1.1 mrg
223 1.1 mrg entry_ptr = htab_find_slot (cand_table, cand, INSERT);
224 1.1 mrg if (*entry_ptr == NULL)
225 1.1 mrg *entry_ptr = (void *) cand;
226 1.1 mrg return (cand_t) *entry_ptr;
227 1.1 mrg }
228 1.1 mrg
229 1.1 mrg /* Free candidate CAND memory. */
230 1.1 mrg static void
231 1.1 mrg free_cand (void *cand)
232 1.1 mrg {
233 1.1 mrg free (cand);
234 1.1 mrg }
235 1.1 mrg
236 1.1 mrg /* Initiate the candidate table. */
237 1.1 mrg static void
238 1.1 mrg initiate_cand_table (void)
239 1.1 mrg {
240 1.1 mrg cand_table = htab_create (8000, cand_hash, cand_eq_p,
241 1.1 mrg (htab_del) free_cand);
242 1.1 mrg }
243 1.1 mrg
244 1.1 mrg /* Finish the candidate table. */
245 1.1 mrg static void
246 1.1 mrg finish_cand_table (void)
247 1.1 mrg {
248 1.1 mrg htab_delete (cand_table);
249 1.1 mrg }
250 1.1 mrg
251 1.1 mrg
252 1.1 mrg
254 1.1 mrg /* Return true if X contains memory or some UNSPEC. We cannot just
255 1.1 mrg check insn operands as memory or unspec might be not an operand
256 1.1 mrg itself but contain an operand. Insn with memory access is not
257 1.1 mrg profitable for rematerialization. Rematerialization of UNSPEC
258 1.1 mrg might result in wrong code generation as the UNPEC effect is
259 1.1 mrg unknown (e.g. generating a label). */
260 1.1 mrg static bool
261 1.1 mrg bad_for_rematerialization_p (rtx x)
262 1.1 mrg {
263 1.1 mrg int i, j;
264 1.1 mrg const char *fmt;
265 1.1 mrg enum rtx_code code;
266 1.1 mrg
267 1.1 mrg if (MEM_P (x) || GET_CODE (x) == UNSPEC || GET_CODE (x) == UNSPEC_VOLATILE)
268 1.1 mrg return true;
269 1.1 mrg code = GET_CODE (x);
270 1.1 mrg fmt = GET_RTX_FORMAT (code);
271 1.1 mrg for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
272 1.1 mrg {
273 1.1 mrg if (fmt[i] == 'e')
274 1.1 mrg {
275 1.1 mrg if (bad_for_rematerialization_p (XEXP (x, i)))
276 1.1 mrg return true;
277 1.1 mrg }
278 1.1 mrg else if (fmt[i] == 'E')
279 1.1 mrg {
280 1.1 mrg for (j = XVECLEN (x, i) - 1; j >= 0; j--)
281 1.1 mrg if (bad_for_rematerialization_p (XVECEXP (x, i, j)))
282 1.1 mrg return true;
283 1.1 mrg }
284 1.1 mrg }
285 1.1 mrg return false;
286 1.1 mrg }
287 1.1 mrg
288 1.1 mrg /* If INSN cannot be used for rematerialization, return negative
289 1.1 mrg value. If INSN can be considered as a candidate for
290 1.1 mrg rematerialization, return value which is the operand number of the
291 1.1 mrg pseudo for which the insn can be used for rematerialization. Here
292 1.1 mrg we consider the insns without any memory, spilled pseudo (except
293 1.1 mrg for the rematerialization pseudo), or dying or unused regs. */
294 1.1 mrg static int
295 1.1 mrg operand_to_remat (rtx_insn *insn)
296 1.1 mrg {
297 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
298 1.1 mrg struct lra_static_insn_data *static_id = id->insn_static_data;
299 1.1 mrg struct lra_insn_reg *reg, *found_reg = NULL;
300 1.1 mrg
301 1.1 mrg /* Don't rematerialize insns which can change PC. */
302 1.1 mrg if (JUMP_P (insn) || CALL_P (insn))
303 1.1 mrg return -1;
304 1.1 mrg /* First find a pseudo which can be rematerialized. */
305 1.1 mrg for (reg = id->regs; reg != NULL; reg = reg->next)
306 1.1 mrg {
307 1.1 mrg /* True FRAME_POINTER_NEEDED might be because we cannot follow
308 1.1 mrg changing sp offsets, e.g. alloca is used. If the insn contains
309 1.1 mrg stack pointer in such case, we cannot rematerialize it as we
310 1.1 mrg cannot know sp offset at a rematerialization place. */
311 1.1 mrg if (reg->regno == STACK_POINTER_REGNUM && frame_pointer_needed)
312 1.1 mrg return -1;
313 1.1 mrg else if (reg->type == OP_OUT && ! reg->subreg_p
314 1.1 mrg && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL)
315 1.1 mrg {
316 1.1 mrg /* We permits only one spilled reg. */
317 1.1 mrg if (found_reg != NULL)
318 1.1 mrg return -1;
319 1.1 mrg found_reg = reg;
320 1.1 mrg }
321 1.1 mrg /* IRA calculates conflicts separately for subregs of two words
322 1.1 mrg pseudo. Even if the pseudo lives, e.g. one its subreg can be
323 1.1 mrg used lately, another subreg hard register can be already used
324 1.1 mrg for something else. In such case, it is not safe to
325 1.1 mrg rematerialize the insn. */
326 1.1 mrg if (reg->regno >= FIRST_PSEUDO_REGISTER
327 1.1 mrg && bitmap_bit_p (&subreg_regs, reg->regno))
328 1.1 mrg return -1;
329 1.1 mrg
330 1.1 mrg /* Don't allow hard registers to be rematerialized. */
331 1.1 mrg if (reg->regno < FIRST_PSEUDO_REGISTER)
332 1.1 mrg return -1;
333 1.1 mrg }
334 1.1 mrg if (found_reg == NULL)
335 1.1 mrg return -1;
336 1.1 mrg if (found_reg->regno < FIRST_PSEUDO_REGISTER)
337 1.1 mrg return -1;
338 1.1 mrg if (bad_for_rematerialization_p (PATTERN (insn)))
339 1.1 mrg return -1;
340 1.1 mrg /* Check the other regs are not spilled. */
341 1.1 mrg for (reg = id->regs; reg != NULL; reg = reg->next)
342 1.1 mrg if (found_reg == reg)
343 1.1 mrg continue;
344 1.1 mrg else if (reg->type == OP_INOUT)
345 1.1 mrg return -1;
346 1.1 mrg else if (reg->regno >= FIRST_PSEUDO_REGISTER
347 1.1 mrg && reg_renumber[reg->regno] < 0)
348 1.1 mrg /* Another spilled reg. */
349 1.1 mrg return -1;
350 1.1 mrg else if (reg->type == OP_IN)
351 1.1 mrg {
352 1.1 mrg if (find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
353 1.1 mrg /* We don't want to make live ranges longer. */
354 1.1 mrg return -1;
355 1.1 mrg /* Check that there is no output reg as the input one. */
356 1.1 mrg for (struct lra_insn_reg *reg2 = id->regs;
357 1.1 mrg reg2 != NULL;
358 1.1 mrg reg2 = reg2->next)
359 1.1 mrg if (reg2->type == OP_OUT && reg->regno == reg2->regno)
360 1.1 mrg return -1;
361 1.1 mrg if (reg->regno < FIRST_PSEUDO_REGISTER)
362 1.1 mrg for (struct lra_insn_reg *reg2 = static_id->hard_regs;
363 1.1 mrg reg2 != NULL;
364 1.1 mrg reg2 = reg2->next)
365 1.1 mrg if (reg2->type == OP_OUT
366 1.1 mrg && reg->regno <= reg2->regno
367 1.1 mrg && (reg2->regno
368 1.1 mrg < (int) end_hard_regno (reg->biggest_mode, reg->regno)))
369 1.1 mrg return -1;
370 1.1 mrg }
371 1.1 mrg /* Check hard coded insn registers. */
372 1.1 mrg for (struct lra_insn_reg *reg = static_id->hard_regs;
373 1.1 mrg reg != NULL;
374 1.1 mrg reg = reg->next)
375 1.1 mrg if (reg->type == OP_INOUT)
376 1.1 mrg return -1;
377 1.1 mrg else if (reg->type == OP_IN)
378 1.1 mrg {
379 1.1 mrg /* Check that there is no output hard reg as the input
380 1.1 mrg one. */
381 1.1 mrg for (struct lra_insn_reg *reg2 = static_id->hard_regs;
382 1.1 mrg reg2 != NULL;
383 1.1 mrg reg2 = reg2->next)
384 1.1 mrg if (reg2->type == OP_OUT && reg->regno == reg2->regno)
385 1.1 mrg return -1;
386 1.1 mrg }
387 1.1 mrg /* Find the rematerialization operand. */
388 1.1 mrg int nop = static_id->n_operands;
389 1.1 mrg for (int i = 0; i < nop; i++)
390 1.1 mrg if (REG_P (*id->operand_loc[i])
391 1.1 mrg && (int) REGNO (*id->operand_loc[i]) == found_reg->regno)
392 1.1 mrg return i;
393 1.1 mrg return -1;
394 1.1 mrg }
395 1.1 mrg
396 1.1 mrg /* Create candidate for INSN with rematerialization operand NOP and
397 1.1 mrg REGNO. Insert the candidate into the table and set up the
398 1.1 mrg corresponding INSN_TO_CAND element. */
399 1.1 mrg static void
400 1.1 mrg create_cand (rtx_insn *insn, int nop, int regno, rtx_insn *activation = NULL)
401 1.1 mrg {
402 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
403 1.1 mrg rtx reg = *id->operand_loc[nop];
404 1.1 mrg gcc_assert (REG_P (reg));
405 1.1 mrg int op_regno = REGNO (reg);
406 1.1 mrg gcc_assert (op_regno >= FIRST_PSEUDO_REGISTER);
407 1.1 mrg cand_t cand = XNEW (struct cand);
408 1.1 mrg cand->insn = insn;
409 1.1 mrg cand->nop = nop;
410 1.1 mrg cand->regno = regno;
411 1.1 mrg cand->reload_regno = op_regno == regno ? -1 : op_regno;
412 1.1 mrg gcc_assert (cand->regno >= 0);
413 1.1 mrg cand_t cand_in_table = insert_cand (cand);
414 1.1 mrg insn_to_cand[INSN_UID (insn)] = cand_in_table;
415 1.1 mrg if (cand != cand_in_table)
416 1.1 mrg free (cand);
417 1.1 mrg else
418 1.1 mrg {
419 1.1 mrg /* A new cand. */
420 1.1 mrg cand->index = all_cands.length ();
421 1.1 mrg all_cands.safe_push (cand);
422 1.1 mrg cand->next_regno_cand = regno_cands[cand->regno];
423 1.1 mrg regno_cands[cand->regno] = cand;
424 1.1 mrg }
425 1.1 mrg if (activation)
426 1.1 mrg insn_to_cand_activation[INSN_UID (activation)] = cand_in_table;
427 1.1 mrg }
428 1.1 mrg
429 1.1 mrg /* Create rematerialization candidates (inserting them into the
430 1.1 mrg table). */
431 1.1 mrg static void
432 1.1 mrg create_cands (void)
433 1.1 mrg {
434 1.1 mrg rtx_insn *insn;
435 1.1 mrg struct potential_cand
436 1.1 mrg {
437 1.1 mrg rtx_insn *insn;
438 1.1 mrg int nop;
439 1.1 mrg };
440 1.1 mrg struct potential_cand *regno_potential_cand;
441 1.1 mrg
442 1.1 mrg /* Create candidates. */
443 1.1 mrg regno_potential_cand = XCNEWVEC (struct potential_cand, max_reg_num ());
444 1.1 mrg for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
445 1.1 mrg if (NONDEBUG_INSN_P (insn))
446 1.1 mrg {
447 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
448 1.1 mrg int keep_regno = -1;
449 1.1 mrg rtx set = single_set (insn);
450 1.1 mrg int nop;
451 1.1 mrg
452 1.1 mrg /* See if this is an output reload for a previous insn. */
453 1.1 mrg if (set != NULL
454 1.1 mrg && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set)))
455 1.1 mrg {
456 1.1 mrg rtx dstreg = SET_DEST (set);
457 1.1 mrg int src_regno = REGNO (SET_SRC (set));
458 1.1 mrg int dst_regno = REGNO (dstreg);
459 1.1 mrg rtx_insn *insn2 = regno_potential_cand[src_regno].insn;
460 1.1 mrg
461 1.1 mrg if (insn2 != NULL
462 1.1 mrg && dst_regno >= FIRST_PSEUDO_REGISTER
463 1.1 mrg && reg_renumber[dst_regno] < 0
464 1.1 mrg && BLOCK_FOR_INSN (insn2) == BLOCK_FOR_INSN (insn)
465 1.1 mrg && insn2 == prev_nonnote_nondebug_insn (insn))
466 1.1 mrg {
467 1.1 mrg create_cand (insn2, regno_potential_cand[src_regno].nop,
468 1.1 mrg dst_regno, insn);
469 1.1 mrg goto done;
470 1.1 mrg }
471 1.1 mrg }
472 1.1 mrg
473 1.1 mrg nop = operand_to_remat (insn);
474 1.1 mrg if (nop >= 0)
475 1.1 mrg {
476 1.1 mrg gcc_assert (REG_P (*id->operand_loc[nop]));
477 1.1 mrg int regno = REGNO (*id->operand_loc[nop]);
478 1.1 mrg gcc_assert (regno >= FIRST_PSEUDO_REGISTER);
479 1.1 mrg /* If we're setting an unrenumbered pseudo, make a candidate
480 1.1 mrg immediately. If it's a potential output reload register, save
481 1.1 mrg it for later; the code above looks for output reload insns later
482 1.1 mrg on. */
483 1.1 mrg if (reg_renumber[regno] < 0)
484 1.1 mrg create_cand (insn, nop, regno);
485 1.1 mrg else if (regno >= lra_constraint_new_regno_start)
486 1.1 mrg {
487 1.1 mrg regno_potential_cand[regno].insn = insn;
488 1.1 mrg regno_potential_cand[regno].nop = nop;
489 1.1 mrg keep_regno = regno;
490 1.1 mrg }
491 1.1 mrg }
492 1.1 mrg
493 1.1 mrg done:
494 1.1 mrg for (struct lra_insn_reg *reg = id->regs; reg != NULL; reg = reg->next)
495 1.1 mrg if (reg->type != OP_IN && reg->regno != keep_regno
496 1.1 mrg && reg->regno >= FIRST_PSEUDO_REGISTER)
497 1.1 mrg regno_potential_cand[reg->regno].insn = NULL;
498 1.1 mrg }
499 1.1 mrg cands_num = all_cands.length ();
500 1.1 mrg free (regno_potential_cand);
501 1.1 mrg }
502 1.1 mrg
503 1.1 mrg
504 1.1 mrg
506 1.1 mrg /* Create and initialize BB data. */
507 1.1 mrg static void
508 1.1 mrg create_remat_bb_data (void)
509 1.1 mrg {
510 1.1 mrg basic_block bb;
511 1.1 mrg remat_bb_data_t bb_info;
512 1.1 mrg
513 1.1 mrg remat_bb_data = XNEWVEC (class remat_bb_data,
514 1.1 mrg last_basic_block_for_fn (cfun));
515 1.1 mrg FOR_ALL_BB_FN (bb, cfun)
516 1.1 mrg {
517 1.1 mrg gcc_checking_assert (bb->index >= 0
518 1.1 mrg && bb->index < last_basic_block_for_fn (cfun));
519 1.1 mrg bb_info = get_remat_bb_data (bb);
520 1.1 mrg bb_info->bb = bb;
521 1.1 mrg bitmap_initialize (&bb_info->changed_regs, ®_obstack);
522 1.1 mrg bitmap_initialize (&bb_info->dead_regs, ®_obstack);
523 1.1 mrg bitmap_initialize (&bb_info->gen_cands, ®_obstack);
524 1.1 mrg bitmap_initialize (&bb_info->livein_cands, ®_obstack);
525 1.1 mrg bitmap_initialize (&bb_info->pavin_cands, ®_obstack);
526 1.1 mrg bitmap_initialize (&bb_info->pavout_cands, ®_obstack);
527 1.1 mrg bitmap_initialize (&bb_info->avin_cands, ®_obstack);
528 1.1 mrg bitmap_initialize (&bb_info->avout_cands, ®_obstack);
529 1.1 mrg }
530 1.1 mrg }
531 1.1 mrg
532 1.1 mrg /* Dump all candidates to DUMP_FILE. */
533 1.1 mrg static void
534 1.1 mrg dump_cands (FILE *dump_file)
535 1.1 mrg {
536 1.1 mrg int i;
537 1.1 mrg cand_t cand;
538 1.1 mrg
539 1.1 mrg fprintf (dump_file, "\nCands:\n");
540 1.1 mrg for (i = 0; i < (int) cands_num; i++)
541 1.1 mrg {
542 1.1 mrg cand = all_cands[i];
543 1.1 mrg fprintf (dump_file, "%d (nop=%d, remat_regno=%d, reload_regno=%d):\n",
544 1.1 mrg i, cand->nop, cand->regno, cand->reload_regno);
545 1.1 mrg print_inline_rtx (dump_file, cand->insn, 6);
546 1.1 mrg fprintf (dump_file, "\n");
547 1.1 mrg }
548 1.1 mrg }
549 1.1 mrg
550 1.1 mrg /* Dump all candidates and BB data. */
551 1.1 mrg static void
552 1.1 mrg dump_candidates_and_remat_bb_data (void)
553 1.1 mrg {
554 1.1 mrg basic_block bb;
555 1.1 mrg
556 1.1 mrg if (lra_dump_file == NULL)
557 1.1 mrg return;
558 1.1 mrg dump_cands (lra_dump_file);
559 1.1 mrg FOR_EACH_BB_FN (bb, cfun)
560 1.1 mrg {
561 1.1 mrg fprintf (lra_dump_file, "\nBB %d:\n", bb->index);
562 1.1 mrg /* Livein */
563 1.1 mrg fprintf (lra_dump_file, " register live in:");
564 1.1 mrg dump_regset (df_get_live_in (bb), lra_dump_file);
565 1.1 mrg putc ('\n', lra_dump_file);
566 1.1 mrg /* Liveout */
567 1.1 mrg fprintf (lra_dump_file, " register live out:");
568 1.1 mrg dump_regset (df_get_live_out (bb), lra_dump_file);
569 1.1 mrg putc ('\n', lra_dump_file);
570 1.1 mrg /* Changed/dead regs: */
571 1.1 mrg fprintf (lra_dump_file, " changed regs:");
572 1.1 mrg dump_regset (&get_remat_bb_data (bb)->changed_regs, lra_dump_file);
573 1.1 mrg putc ('\n', lra_dump_file);
574 1.1 mrg fprintf (lra_dump_file, " dead regs:");
575 1.1 mrg dump_regset (&get_remat_bb_data (bb)->dead_regs, lra_dump_file);
576 1.1 mrg putc ('\n', lra_dump_file);
577 1.1 mrg lra_dump_bitmap_with_title ("cands generated in BB",
578 1.1 mrg &get_remat_bb_data (bb)->gen_cands, bb->index);
579 1.1 mrg lra_dump_bitmap_with_title ("livein cands in BB",
580 1.1 mrg &get_remat_bb_data (bb)->livein_cands, bb->index);
581 1.1 mrg lra_dump_bitmap_with_title ("pavin cands in BB",
582 1.1 mrg &get_remat_bb_data (bb)->pavin_cands, bb->index);
583 1.1 mrg lra_dump_bitmap_with_title ("pavout cands in BB",
584 1.1 mrg &get_remat_bb_data (bb)->pavout_cands, bb->index);
585 1.1 mrg lra_dump_bitmap_with_title ("avin cands in BB",
586 1.1 mrg &get_remat_bb_data (bb)->avin_cands, bb->index);
587 1.1 mrg lra_dump_bitmap_with_title ("avout cands in BB",
588 1.1 mrg &get_remat_bb_data (bb)->avout_cands, bb->index);
589 1.1 mrg }
590 1.1 mrg fprintf (lra_dump_file, "subreg regs:");
591 1.1 mrg dump_regset (&subreg_regs, lra_dump_file);
592 1.1 mrg putc ('\n', lra_dump_file);
593 1.1 mrg }
594 1.1 mrg
595 1.1 mrg /* Free all BB data. */
596 1.1 mrg static void
597 1.1 mrg finish_remat_bb_data (void)
598 1.1 mrg {
599 1.1 mrg basic_block bb;
600 1.1 mrg
601 1.1 mrg FOR_EACH_BB_FN (bb, cfun)
602 1.1 mrg {
603 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->avout_cands);
604 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->avin_cands);
605 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->pavout_cands);
606 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->pavin_cands);
607 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->livein_cands);
608 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->gen_cands);
609 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->dead_regs);
610 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->changed_regs);
611 1.1 mrg }
612 1.1 mrg free (remat_bb_data);
613 1.1 mrg }
614 1.1 mrg
615 1.1 mrg
616 1.1 mrg
618 1.1 mrg /* Update changed_regs, dead_regs, subreg_regs of BB from INSN. */
619 1.1 mrg static void
620 1.1 mrg set_bb_regs (basic_block bb, rtx_insn *insn)
621 1.1 mrg {
622 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
623 1.1 mrg remat_bb_data_t bb_info = get_remat_bb_data (bb);
624 1.1 mrg struct lra_insn_reg *reg;
625 1.1 mrg
626 1.1 mrg for (reg = id->regs; reg != NULL; reg = reg->next)
627 1.1 mrg {
628 1.1 mrg unsigned regno = reg->regno;
629 1.1 mrg if (reg->type != OP_IN)
630 1.1 mrg bitmap_set_bit (&bb_info->changed_regs, regno);
631 1.1 mrg else if (find_regno_note (insn, REG_DEAD, regno) != NULL)
632 1.1 mrg bitmap_set_bit (&bb_info->dead_regs, regno);
633 1.1 mrg if (regno >= FIRST_PSEUDO_REGISTER && reg->subreg_p)
634 1.1 mrg bitmap_set_bit (&subreg_regs, regno);
635 1.1 mrg }
636 1.1 mrg if (CALL_P (insn))
637 1.1 mrg {
638 1.1 mrg /* Partially-clobbered registers might still be live. */
639 1.1 mrg HARD_REG_SET clobbers = insn_callee_abi (insn).full_reg_clobbers ();
640 1.1 mrg bitmap_ior_into (&get_remat_bb_data (bb)->dead_regs,
641 1.1 mrg bitmap_view<HARD_REG_SET> (clobbers));
642 1.1 mrg }
643 1.1 mrg }
644 1.1 mrg
645 1.1 mrg /* Calculate changed_regs and dead_regs for each BB. */
646 1.1 mrg static void
647 1.1 mrg calculate_local_reg_remat_bb_data (void)
648 1.1 mrg {
649 1.1 mrg basic_block bb;
650 1.1 mrg rtx_insn *insn;
651 1.1 mrg
652 1.1 mrg FOR_EACH_BB_FN (bb, cfun)
653 1.1 mrg FOR_BB_INSNS (bb, insn)
654 1.1 mrg if (NONDEBUG_INSN_P (insn))
655 1.1 mrg set_bb_regs (bb, insn);
656 1.1 mrg }
657 1.1 mrg
658 1.1 mrg
659 1.1 mrg
661 1.1 mrg /* Return true if REG overlaps an input operand or non-input hard register of
662 1.1 mrg INSN. Basically the function returns false if we can move rematerialization
663 1.1 mrg candidate INSN through another insn with output REG or dead input REG (we
664 1.1 mrg consider it to avoid extending reg live range) with possible output pseudo
665 1.1 mrg renaming in INSN. */
666 1.1 mrg static bool
667 1.1 mrg reg_overlap_for_remat_p (lra_insn_reg *reg, rtx_insn *insn)
668 1.1 mrg {
669 1.1 mrg int iter;
670 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
671 1.1 mrg struct lra_static_insn_data *static_id = id->insn_static_data;
672 1.1 mrg unsigned regno = reg->regno;
673 1.1 mrg int nregs;
674 1.1 mrg
675 1.1 mrg if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0)
676 1.1 mrg regno = reg_renumber[regno];
677 1.1 mrg if (regno >= FIRST_PSEUDO_REGISTER)
678 1.1 mrg nregs = 1;
679 1.1 mrg else
680 1.1 mrg nregs = hard_regno_nregs (regno, reg->biggest_mode);
681 1.1 mrg
682 1.1 mrg struct lra_insn_reg *reg2;
683 1.1 mrg
684 1.1 mrg for (iter = 0; iter < 2; iter++)
685 1.1 mrg for (reg2 = (iter == 0 ? id->regs : static_id->hard_regs);
686 1.1 mrg reg2 != NULL;
687 1.1 mrg reg2 = reg2->next)
688 1.1 mrg {
689 1.1 mrg int nregs2;
690 1.1 mrg unsigned regno2 = reg2->regno;
691 1.1 mrg
692 1.1 mrg if (reg2->type != OP_IN && regno2 >= FIRST_PSEUDO_REGISTER)
693 1.1 mrg continue;
694 1.1 mrg
695 1.1 mrg if (regno2 >= FIRST_PSEUDO_REGISTER && reg_renumber[regno2] >= 0)
696 1.1 mrg regno2 = reg_renumber[regno2];
697 1.1 mrg if (regno2 >= FIRST_PSEUDO_REGISTER)
698 1.1 mrg nregs2 = 1;
699 1.1 mrg else
700 1.1 mrg nregs2 = hard_regno_nregs (regno2, reg->biggest_mode);
701 1.1 mrg
702 1.1 mrg if ((regno2 + nregs2 - 1 >= regno && regno2 < regno + nregs)
703 1.1 mrg || (regno + nregs - 1 >= regno2 && regno < regno2 + nregs2))
704 1.1 mrg return true;
705 1.1 mrg }
706 1.1 mrg return false;
707 1.1 mrg }
708 1.1 mrg
709 1.1 mrg /* Return true if a call used register is an input operand of INSN. */
710 1.1 mrg static bool
711 1.1 mrg call_used_input_regno_present_p (const function_abi &abi, rtx_insn *insn)
712 1.1 mrg {
713 1.1 mrg int iter;
714 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
715 1.1 mrg struct lra_static_insn_data *static_id = id->insn_static_data;
716 1.1 mrg struct lra_insn_reg *reg;
717 1.1 mrg
718 1.1 mrg for (iter = 0; iter < 2; iter++)
719 1.1 mrg for (reg = (iter == 0 ? id->regs : static_id->hard_regs);
720 1.1 mrg reg != NULL;
721 1.1 mrg reg = reg->next)
722 1.1 mrg if (reg->type == OP_IN
723 1.1 mrg && reg->regno < FIRST_PSEUDO_REGISTER
724 1.1 mrg && abi.clobbers_reg_p (reg->biggest_mode, reg->regno))
725 1.1 mrg return true;
726 1.1 mrg return false;
727 1.1 mrg }
728 1.1 mrg
729 1.1 mrg /* Calculate livein_cands for each BB. */
730 1.1 mrg static void
731 1.1 mrg calculate_livein_cands (void)
732 1.1 mrg {
733 1.1 mrg basic_block bb;
734 1.1 mrg
735 1.1 mrg FOR_EACH_BB_FN (bb, cfun)
736 1.1 mrg {
737 1.1 mrg bitmap livein_regs = df_get_live_in (bb);
738 1.1 mrg bitmap livein_cands = &get_remat_bb_data (bb)->livein_cands;
739 1.1 mrg for (unsigned int i = 0; i < cands_num; i++)
740 1.1 mrg {
741 1.1 mrg cand_t cand = all_cands[i];
742 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (cand->insn);
743 1.1 mrg struct lra_insn_reg *reg;
744 1.1 mrg
745 1.1 mrg for (reg = id->regs; reg != NULL; reg = reg->next)
746 1.1 mrg if (reg->type == OP_IN && ! bitmap_bit_p (livein_regs, reg->regno))
747 1.1 mrg break;
748 1.1 mrg if (reg == NULL)
749 1.1 mrg bitmap_set_bit (livein_cands, i);
750 1.1 mrg }
751 1.1 mrg }
752 1.1 mrg }
753 1.1 mrg
754 1.1 mrg /* Calculate gen_cands for each BB. */
755 1.1 mrg static void
756 1.1 mrg calculate_gen_cands (void)
757 1.1 mrg {
758 1.1 mrg basic_block bb;
759 1.1 mrg bitmap gen_cands;
760 1.1 mrg rtx_insn *insn;
761 1.1 mrg
762 1.1 mrg FOR_EACH_BB_FN (bb, cfun)
763 1.1 mrg {
764 1.1 mrg gen_cands = &get_remat_bb_data (bb)->gen_cands;
765 1.1 mrg auto_bitmap gen_insns (®_obstack);
766 1.1 mrg FOR_BB_INSNS (bb, insn)
767 1.1 mrg if (INSN_P (insn))
768 1.1 mrg {
769 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
770 1.1 mrg struct lra_static_insn_data *static_id = id->insn_static_data;
771 1.1 mrg struct lra_insn_reg *reg;
772 1.1 mrg unsigned int uid;
773 1.1 mrg bitmap_iterator bi;
774 1.1 mrg cand_t cand;
775 1.1 mrg rtx set;
776 1.1 mrg int iter;
777 1.1 mrg int src_regno = -1, dst_regno = -1;
778 1.1 mrg
779 1.1 mrg if ((set = single_set (insn)) != NULL
780 1.1 mrg && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set)))
781 1.1 mrg {
782 1.1 mrg src_regno = REGNO (SET_SRC (set));
783 1.1 mrg dst_regno = REGNO (SET_DEST (set));
784 1.1 mrg }
785 1.1 mrg
786 1.1 mrg /* Update gen_cands: */
787 1.1 mrg bitmap_clear (&temp_bitmap);
788 1.1 mrg for (iter = 0; iter < 2; iter++)
789 1.1 mrg for (reg = (iter == 0 ? id->regs : static_id->hard_regs);
790 1.1 mrg reg != NULL;
791 1.1 mrg reg = reg->next)
792 1.1 mrg if (reg->type != OP_IN
793 1.1 mrg || find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
794 1.1 mrg EXECUTE_IF_SET_IN_BITMAP (gen_insns, 0, uid, bi)
795 1.1 mrg {
796 1.1 mrg rtx_insn *insn2 = lra_insn_recog_data[uid]->insn;
797 1.1 mrg
798 1.1 mrg cand = insn_to_cand[INSN_UID (insn2)];
799 1.1 mrg gcc_assert (cand != NULL);
800 1.1 mrg /* Ignore the reload insn. */
801 1.1 mrg if (src_regno == cand->reload_regno
802 1.1 mrg && dst_regno == cand->regno)
803 1.1 mrg continue;
804 1.1 mrg if (cand->regno == reg->regno
805 1.1 mrg || reg_overlap_for_remat_p (reg, insn2))
806 1.1 mrg {
807 1.1 mrg bitmap_clear_bit (gen_cands, cand->index);
808 1.1 mrg bitmap_set_bit (&temp_bitmap, uid);
809 1.1 mrg }
810 1.1 mrg }
811 1.1 mrg
812 1.1 mrg if (CALL_P (insn))
813 1.1 mrg {
814 1.1 mrg function_abi callee_abi = insn_callee_abi (insn);
815 1.1 mrg EXECUTE_IF_SET_IN_BITMAP (gen_insns, 0, uid, bi)
816 1.1 mrg {
817 1.1 mrg rtx_insn *insn2 = lra_insn_recog_data[uid]->insn;
818 1.1 mrg
819 1.1 mrg cand = insn_to_cand[INSN_UID (insn2)];
820 1.1 mrg gcc_assert (cand != NULL);
821 1.1 mrg if (call_used_input_regno_present_p (callee_abi, insn2))
822 1.1 mrg {
823 1.1 mrg bitmap_clear_bit (gen_cands, cand->index);
824 1.1 mrg bitmap_set_bit (&temp_bitmap, uid);
825 1.1 mrg }
826 1.1 mrg }
827 1.1 mrg }
828 1.1 mrg bitmap_and_compl_into (gen_insns, &temp_bitmap);
829 1.1 mrg
830 1.1 mrg cand = insn_to_cand[INSN_UID (insn)];
831 1.1 mrg if (cand != NULL)
832 1.1 mrg {
833 1.1 mrg bitmap_set_bit (gen_cands, cand->index);
834 1.1 mrg bitmap_set_bit (gen_insns, INSN_UID (insn));
835 1.1 mrg }
836 1.1 mrg }
837 1.1 mrg }
838 1.1 mrg }
839 1.1 mrg
840 1.1 mrg
841 1.1 mrg
843 1.1 mrg /* The common transfer function used by the DF equation solver to
844 1.1 mrg propagate (partial) availability info BB_IN to BB_OUT through block
845 1.1 mrg with BB_INDEX according to the following equation:
846 1.1 mrg
847 1.1 mrg bb.out = ((bb.in & bb.livein) - bb.killed) OR bb.gen
848 1.1 mrg */
849 1.1 mrg static bool
850 1.1 mrg cand_trans_fun (int bb_index, bitmap bb_in, bitmap bb_out)
851 1.1 mrg {
852 1.1 mrg remat_bb_data_t bb_info;
853 1.1 mrg bitmap bb_livein, bb_changed_regs, bb_dead_regs;
854 1.1 mrg unsigned int cid;
855 1.1 mrg bitmap_iterator bi;
856 1.1 mrg
857 1.1 mrg bb_info = get_remat_bb_data_by_index (bb_index);
858 1.1 mrg bb_livein = &bb_info->livein_cands;
859 1.1 mrg bb_changed_regs = &bb_info->changed_regs;
860 1.1 mrg bb_dead_regs = &bb_info->dead_regs;
861 1.1 mrg /* Calculate killed avin cands -- cands whose regs are changed or
862 1.1 mrg becoming dead in the BB. We calculate it here as we hope that
863 1.1 mrg repeated calculations are compensated by smaller size of BB_IN in
864 1.1 mrg comparison with all candidates number. */
865 1.1 mrg bitmap_clear (&temp_bitmap);
866 1.1 mrg EXECUTE_IF_SET_IN_BITMAP (bb_in, 0, cid, bi)
867 1.1 mrg {
868 1.1 mrg cand_t cand = all_cands[cid];
869 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (cand->insn);
870 1.1 mrg struct lra_insn_reg *reg;
871 1.1 mrg
872 1.1 mrg if (! bitmap_bit_p (bb_livein, cid))
873 1.1 mrg {
874 1.1 mrg bitmap_set_bit (&temp_bitmap, cid);
875 1.1 mrg continue;
876 1.1 mrg }
877 1.1 mrg for (reg = id->regs; reg != NULL; reg = reg->next)
878 1.1 mrg /* Ignore all outputs which are not the regno for
879 1.1 mrg rematerialization. */
880 1.1 mrg if (reg->type == OP_OUT && reg->regno != cand->regno)
881 1.1 mrg continue;
882 1.1 mrg else if (bitmap_bit_p (bb_changed_regs, reg->regno)
883 1.1 mrg || bitmap_bit_p (bb_dead_regs, reg->regno))
884 1.1 mrg {
885 1.1 mrg bitmap_set_bit (&temp_bitmap, cid);
886 1.1 mrg break;
887 1.1 mrg }
888 1.1 mrg /* Check regno for rematerialization. */
889 1.1 mrg if (bitmap_bit_p (bb_changed_regs, cand->regno)
890 1.1 mrg || bitmap_bit_p (bb_dead_regs, cand->regno))
891 1.1 mrg bitmap_set_bit (&temp_bitmap, cid);
892 1.1 mrg }
893 1.1 mrg return bitmap_ior_and_compl (bb_out,
894 1.1 mrg &bb_info->gen_cands, bb_in, &temp_bitmap);
895 1.1 mrg }
896 1.1 mrg
897 1.1 mrg
898 1.1 mrg
900 1.1 mrg /* The transfer function used by the DF equation solver to propagate
901 1.1 mrg partial candidate availability info through block with BB_INDEX
902 1.1 mrg according to the following equation:
903 1.1 mrg
904 1.1 mrg bb.pavout = ((bb.pavin & bb.livein) - bb.killed) OR bb.gen
905 1.1 mrg */
906 1.1 mrg static bool
907 1.1 mrg cand_pav_trans_fun (int bb_index)
908 1.1 mrg {
909 1.1 mrg remat_bb_data_t bb_info;
910 1.1 mrg
911 1.1 mrg bb_info = get_remat_bb_data_by_index (bb_index);
912 1.1 mrg return cand_trans_fun (bb_index, &bb_info->pavin_cands,
913 1.1 mrg &bb_info->pavout_cands);
914 1.1 mrg }
915 1.1 mrg
916 1.1 mrg /* The confluence function used by the DF equation solver to set up
917 1.1 mrg cand_pav info for a block BB without predecessor. */
918 1.1 mrg static void
919 1.1 mrg cand_pav_con_fun_0 (basic_block bb)
920 1.1 mrg {
921 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->pavin_cands);
922 1.1 mrg }
923 1.1 mrg
924 1.1 mrg /* The confluence function used by the DF equation solver to propagate
925 1.1 mrg partial candidate availability info from predecessor to successor
926 1.1 mrg on edge E (pred->bb) according to the following equation:
927 1.1 mrg
928 1.1 mrg bb.pavin_cands = 0 for entry block | OR (pavout_cands of predecessors)
929 1.1 mrg */
930 1.1 mrg static bool
931 1.1 mrg cand_pav_con_fun_n (edge e)
932 1.1 mrg {
933 1.1 mrg basic_block pred = e->src;
934 1.1 mrg basic_block bb = e->dest;
935 1.1 mrg remat_bb_data_t bb_info;
936 1.1 mrg bitmap bb_pavin, pred_pavout;
937 1.1 mrg
938 1.1 mrg bb_info = get_remat_bb_data (bb);
939 1.1 mrg bb_pavin = &bb_info->pavin_cands;
940 1.1 mrg pred_pavout = &get_remat_bb_data (pred)->pavout_cands;
941 1.1 mrg return bitmap_ior_into (bb_pavin, pred_pavout);
942 1.1 mrg }
943 1.1 mrg
944 1.1 mrg
945 1.1 mrg
947 1.1 mrg /* The transfer function used by the DF equation solver to propagate
948 1.1 mrg candidate availability info through block with BB_INDEX according
949 1.1 mrg to the following equation:
950 1.1 mrg
951 1.1 mrg bb.avout = ((bb.avin & bb.livein) - bb.killed) OR bb.gen
952 1.1 mrg */
953 1.1 mrg static bool
954 1.1 mrg cand_av_trans_fun (int bb_index)
955 1.1 mrg {
956 1.1 mrg remat_bb_data_t bb_info;
957 1.1 mrg
958 1.1 mrg bb_info = get_remat_bb_data_by_index (bb_index);
959 1.1 mrg return cand_trans_fun (bb_index, &bb_info->avin_cands,
960 1.1 mrg &bb_info->avout_cands);
961 1.1 mrg }
962 1.1 mrg
963 1.1 mrg /* The confluence function used by the DF equation solver to set up
964 1.1 mrg cand_av info for a block BB without predecessor. */
965 1.1 mrg static void
966 1.1 mrg cand_av_con_fun_0 (basic_block bb)
967 1.1 mrg {
968 1.1 mrg bitmap_clear (&get_remat_bb_data (bb)->avin_cands);
969 1.1 mrg }
970 1.1 mrg
971 1.1 mrg /* The confluence function used by the DF equation solver to propagate
972 1.1 mrg cand_av info from predecessor to successor on edge E (pred->bb)
973 1.1 mrg according to the following equation:
974 1.1 mrg
975 1.1 mrg bb.avin_cands = 0 for entry block | AND (avout_cands of predecessors)
976 1.1 mrg */
977 1.1 mrg static bool
978 1.1 mrg cand_av_con_fun_n (edge e)
979 1.1 mrg {
980 1.1 mrg basic_block pred = e->src;
981 1.1 mrg basic_block bb = e->dest;
982 1.1 mrg remat_bb_data_t bb_info;
983 1.1 mrg bitmap bb_avin, pred_avout;
984 1.1 mrg
985 1.1 mrg bb_info = get_remat_bb_data (bb);
986 1.1 mrg bb_avin = &bb_info->avin_cands;
987 1.1 mrg pred_avout = &get_remat_bb_data (pred)->avout_cands;
988 1.1 mrg return bitmap_and_into (bb_avin, pred_avout);
989 1.1 mrg }
990 1.1 mrg
991 1.1 mrg /* Calculate available candidates for each BB. */
992 1.1 mrg static void
993 1.1 mrg calculate_global_remat_bb_data (void)
994 1.1 mrg {
995 1.1 mrg basic_block bb;
996 1.1 mrg
997 1.1 mrg df_simple_dataflow
998 1.1 mrg (DF_FORWARD, NULL, cand_pav_con_fun_0, cand_pav_con_fun_n,
999 1.1 mrg cand_pav_trans_fun, &all_blocks,
1000 1.1 mrg df_get_postorder (DF_FORWARD), df_get_n_blocks (DF_FORWARD));
1001 1.1 mrg /* Initialize avin by pavin. */
1002 1.1 mrg FOR_EACH_BB_FN (bb, cfun)
1003 1.1 mrg bitmap_copy (&get_remat_bb_data (bb)->avin_cands,
1004 1.1 mrg &get_remat_bb_data (bb)->pavin_cands);
1005 1.1 mrg df_simple_dataflow
1006 1.1 mrg (DF_FORWARD, NULL, cand_av_con_fun_0, cand_av_con_fun_n,
1007 1.1 mrg cand_av_trans_fun, &all_blocks,
1008 1.1 mrg df_get_postorder (DF_FORWARD), df_get_n_blocks (DF_FORWARD));
1009 1.1 mrg }
1010 1.1 mrg
1011 1.1 mrg
1012 1.1 mrg
1014 1.1 mrg /* Setup sp offset attribute to SP_OFFSET for all INSNS. */
1015 1.1 mrg static void
1016 1.1 mrg change_sp_offset (rtx_insn *insns, poly_int64 sp_offset)
1017 1.1 mrg {
1018 1.1 mrg for (rtx_insn *insn = insns; insn != NULL; insn = NEXT_INSN (insn))
1019 1.1 mrg eliminate_regs_in_insn (insn, false, false, sp_offset);
1020 1.1 mrg }
1021 1.1 mrg
1022 1.1 mrg /* Return start hard register of REG (can be a hard or a pseudo reg)
1023 1.1 mrg or -1 (if it is a spilled pseudo). Return number of hard registers
1024 1.1 mrg occupied by REG through parameter NREGS if the start hard reg is
1025 1.1 mrg not negative. */
1026 1.1 mrg static int
1027 1.1 mrg get_hard_regs (struct lra_insn_reg *reg, int &nregs)
1028 1.1 mrg {
1029 1.1 mrg int regno = reg->regno;
1030 1.1 mrg int hard_regno = regno < FIRST_PSEUDO_REGISTER ? regno : reg_renumber[regno];
1031 1.1 mrg
1032 1.1 mrg if (hard_regno >= 0)
1033 1.1 mrg nregs = hard_regno_nregs (hard_regno, reg->biggest_mode);
1034 1.1 mrg return hard_regno;
1035 1.1 mrg }
1036 1.1 mrg
1037 1.1 mrg /* Make copy of and register scratch pseudos in rematerialized insn
1038 1.1 mrg REMAT_INSN. */
1039 1.1 mrg static void
1040 1.1 mrg update_scratch_ops (rtx_insn *remat_insn)
1041 1.1 mrg {
1042 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (remat_insn);
1043 1.1 mrg struct lra_static_insn_data *static_id = id->insn_static_data;
1044 1.1 mrg for (int i = 0; i < static_id->n_operands; i++)
1045 1.1 mrg {
1046 1.1 mrg rtx *loc = id->operand_loc[i];
1047 1.1 mrg if (! REG_P (*loc))
1048 1.1 mrg continue;
1049 1.1 mrg int regno = REGNO (*loc);
1050 1.1 mrg if (! ira_former_scratch_p (regno))
1051 1.1 mrg continue;
1052 1.1 mrg *loc = lra_create_new_reg (GET_MODE (*loc), *loc,
1053 1.1 mrg lra_get_allocno_class (regno), NULL,
1054 1.1 mrg "scratch pseudo copy");
1055 1.1 mrg ira_register_new_scratch_op (remat_insn, i, id->icode);
1056 1.1 mrg }
1057 1.1 mrg
1058 1.1 mrg }
1059 1.1 mrg
1060 1.1 mrg /* Insert rematerialization insns using the data-flow data calculated
1061 1.1 mrg earlier. */
1062 1.1 mrg static bool
1063 1.1 mrg do_remat (void)
1064 1.1 mrg {
1065 1.1 mrg unsigned regno;
1066 1.1 mrg rtx_insn *insn;
1067 1.1 mrg basic_block bb;
1068 1.1 mrg bool changed_p = false;
1069 1.1 mrg /* Living hard regs and hard registers of living pseudos. */
1070 1.1 mrg HARD_REG_SET live_hard_regs;
1071 1.1 mrg bitmap_iterator bi;
1072 1.1 mrg
1073 1.1 mrg auto_bitmap avail_cands (®_obstack);
1074 1.1 mrg auto_bitmap active_cands (®_obstack);
1075 1.1 mrg FOR_EACH_BB_FN (bb, cfun)
1076 1.1 mrg {
1077 1.1 mrg CLEAR_HARD_REG_SET (live_hard_regs);
1078 1.1 mrg EXECUTE_IF_SET_IN_BITMAP (df_get_live_in (bb), 0, regno, bi)
1079 1.1 mrg {
1080 1.1 mrg int hard_regno = regno < FIRST_PSEUDO_REGISTER
1081 1.1 mrg ? regno
1082 1.1 mrg : reg_renumber[regno];
1083 1.1 mrg if (hard_regno >= 0)
1084 1.1 mrg SET_HARD_REG_BIT (live_hard_regs, hard_regno);
1085 1.1 mrg }
1086 1.1 mrg bitmap_and (avail_cands, &get_remat_bb_data (bb)->avin_cands,
1087 1.1 mrg &get_remat_bb_data (bb)->livein_cands);
1088 1.1 mrg /* Activating insns are always in the same block as their corresponding
1089 1.1 mrg remat insn, so at the start of a block the two bitsets are equal. */
1090 1.1 mrg bitmap_copy (active_cands, avail_cands);
1091 1.1 mrg FOR_BB_INSNS (bb, insn)
1092 1.1 mrg {
1093 1.1 mrg if (!NONDEBUG_INSN_P (insn))
1094 1.1 mrg continue;
1095 1.1 mrg
1096 1.1 mrg lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
1097 1.1 mrg struct lra_static_insn_data *static_id = id->insn_static_data;
1098 1.1 mrg struct lra_insn_reg *reg;
1099 1.1 mrg cand_t cand;
1100 1.1 mrg unsigned int cid;
1101 1.1 mrg bitmap_iterator bi;
1102 1.1 mrg rtx set;
1103 1.1 mrg int iter;
1104 1.1 mrg int src_regno = -1, dst_regno = -1;
1105 1.1 mrg
1106 1.1 mrg if ((set = single_set (insn)) != NULL
1107 1.1 mrg && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set)))
1108 1.1 mrg {
1109 1.1 mrg src_regno = REGNO (SET_SRC (set));
1110 1.1 mrg dst_regno = REGNO (SET_DEST (set));
1111 1.1 mrg }
1112 1.1 mrg
1113 1.1 mrg cand = NULL;
1114 1.1 mrg /* Check possibility of rematerialization (hard reg or
1115 1.1 mrg unpsilled pseudo <- spilled pseudo): */
1116 1.1 mrg if (dst_regno >= 0 && src_regno >= FIRST_PSEUDO_REGISTER
1117 1.1 mrg && reg_renumber[src_regno] < 0
1118 1.1 mrg && (dst_regno < FIRST_PSEUDO_REGISTER
1119 1.1 mrg || reg_renumber[dst_regno] >= 0))
1120 1.1 mrg {
1121 1.1 mrg for (cand = regno_cands[src_regno];
1122 1.1 mrg cand != NULL;
1123 1.1 mrg cand = cand->next_regno_cand)
1124 1.1 mrg if (bitmap_bit_p (avail_cands, cand->index)
1125 1.1 mrg && bitmap_bit_p (active_cands, cand->index))
1126 1.1 mrg break;
1127 1.1 mrg }
1128 1.1 mrg int i, hard_regno, nregs;
1129 1.1 mrg int dst_hard_regno, dst_nregs;
1130 1.1 mrg rtx_insn *remat_insn = NULL;
1131 1.1 mrg poly_int64 cand_sp_offset = 0;
1132 1.1 mrg if (cand != NULL)
1133 1.1 mrg {
1134 1.1 mrg lra_insn_recog_data_t cand_id
1135 1.1 mrg = lra_get_insn_recog_data (cand->insn);
1136 1.1 mrg struct lra_static_insn_data *static_cand_id
1137 1.1 mrg = cand_id->insn_static_data;
1138 1.1 mrg rtx saved_op = *cand_id->operand_loc[cand->nop];
1139 1.1 mrg
1140 1.1 mrg /* Check clobbers do not kill something living. */
1141 1.1 mrg gcc_assert (REG_P (saved_op));
1142 1.1 mrg int ignore_regno = REGNO (saved_op);
1143 1.1 mrg
1144 1.1 mrg dst_hard_regno = dst_regno < FIRST_PSEUDO_REGISTER
1145 1.1 mrg ? dst_regno : reg_renumber[dst_regno];
1146 1.1 mrg gcc_assert (dst_hard_regno >= 0);
1147 1.1 mrg machine_mode mode = GET_MODE (SET_DEST (set));
1148 1.1 mrg dst_nregs = hard_regno_nregs (dst_hard_regno, mode);
1149 1.1 mrg
1150 1.1 mrg for (reg = cand_id->regs; reg != NULL; reg = reg->next)
1151 1.1 mrg if (reg->type != OP_IN && reg->regno != ignore_regno)
1152 1.1 mrg {
1153 1.1 mrg hard_regno = get_hard_regs (reg, nregs);
1154 1.1 mrg gcc_assert (hard_regno >= 0);
1155 1.1 mrg for (i = 0; i < nregs; i++)
1156 1.1 mrg if (TEST_HARD_REG_BIT (live_hard_regs, hard_regno + i))
1157 1.1 mrg break;
1158 1.1 mrg if (i < nregs)
1159 1.1 mrg break;
1160 1.1 mrg /* Ensure the clobber also doesn't overlap dst_regno. */
1161 1.1 mrg if (hard_regno + nregs > dst_hard_regno
1162 1.1 mrg && hard_regno < dst_hard_regno + dst_nregs)
1163 1.1 mrg break;
1164 1.1 mrg }
1165 1.1 mrg
1166 1.1 mrg if (reg == NULL)
1167 1.1 mrg {
1168 1.1 mrg for (reg = static_cand_id->hard_regs;
1169 1.1 mrg reg != NULL;
1170 1.1 mrg reg = reg->next)
1171 1.1 mrg if (reg->type != OP_IN)
1172 1.1 mrg {
1173 1.1 mrg if (TEST_HARD_REG_BIT (live_hard_regs, reg->regno))
1174 1.1 mrg break;
1175 1.1 mrg if (reg->regno >= dst_hard_regno
1176 1.1 mrg && reg->regno < dst_hard_regno + dst_nregs)
1177 1.1 mrg break;
1178 1.1 mrg }
1179 1.1 mrg }
1180 1.1 mrg
1181 1.1 mrg if (reg == NULL)
1182 1.1 mrg {
1183 1.1 mrg *cand_id->operand_loc[cand->nop] = SET_DEST (set);
1184 1.1 mrg lra_update_insn_regno_info (cand->insn);
1185 1.1 mrg bool ok_p = lra_constrain_insn (cand->insn);
1186 1.1 mrg if (ok_p)
1187 1.1 mrg {
1188 1.1 mrg rtx remat_pat = copy_insn (PATTERN (cand->insn));
1189 1.1 mrg
1190 1.1 mrg start_sequence ();
1191 1.1 mrg emit_insn (remat_pat);
1192 1.1 mrg remat_insn = get_insns ();
1193 1.1 mrg end_sequence ();
1194 1.1 mrg if (recog_memoized (remat_insn) < 0)
1195 1.1 mrg remat_insn = NULL;
1196 1.1 mrg cand_sp_offset = cand_id->sp_offset;
1197 1.1 mrg }
1198 1.1 mrg *cand_id->operand_loc[cand->nop] = saved_op;
1199 1.1 mrg lra_update_insn_regno_info (cand->insn);
1200 1.1 mrg }
1201 1.1 mrg }
1202 1.1 mrg
1203 1.1 mrg bitmap_clear (&temp_bitmap);
1204 1.1 mrg /* Update avail_cands (see analogous code for
1205 1.1 mrg calculate_gen_cands). */
1206 1.1 mrg for (iter = 0; iter < 2; iter++)
1207 1.1 mrg for (reg = (iter == 0 ? id->regs : static_id->hard_regs);
1208 1.1 mrg reg != NULL;
1209 1.1 mrg reg = reg->next)
1210 1.1 mrg if (reg->type != OP_IN
1211 1.1 mrg || find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
1212 1.1 mrg EXECUTE_IF_SET_IN_BITMAP (avail_cands, 0, cid, bi)
1213 1.1 mrg {
1214 1.1 mrg cand = all_cands[cid];
1215 1.1 mrg
1216 1.1 mrg /* Ignore the reload insn. */
1217 1.1 mrg if (src_regno == cand->reload_regno
1218 1.1 mrg && dst_regno == cand->regno)
1219 1.1 mrg continue;
1220 1.1 mrg if (cand->regno == reg->regno
1221 1.1 mrg || reg_overlap_for_remat_p (reg, cand->insn))
1222 1.1 mrg bitmap_set_bit (&temp_bitmap, cand->index);
1223 1.1 mrg }
1224 1.1 mrg
1225 1.1 mrg if (CALL_P (insn))
1226 1.1 mrg {
1227 1.1 mrg function_abi callee_abi = insn_callee_abi (insn);
1228 1.1 mrg EXECUTE_IF_SET_IN_BITMAP (avail_cands, 0, cid, bi)
1229 1.1 mrg {
1230 1.1 mrg cand = all_cands[cid];
1231 1.1 mrg
1232 1.1 mrg if (call_used_input_regno_present_p (callee_abi, cand->insn))
1233 1.1 mrg bitmap_set_bit (&temp_bitmap, cand->index);
1234 1.1 mrg }
1235 1.1 mrg }
1236 1.1 mrg
1237 1.1 mrg bitmap_and_compl_into (avail_cands, &temp_bitmap);
1238 1.1 mrg
1239 1.1 mrg /* Now see whether a candidate is made active or available
1240 1.1 mrg by this insn. */
1241 1.1 mrg cand = insn_to_cand_activation[INSN_UID (insn)];
1242 1.1 mrg if (cand)
1243 1.1 mrg bitmap_set_bit (active_cands, cand->index);
1244 1.1 mrg
1245 1.1 mrg cand = insn_to_cand[INSN_UID (insn)];
1246 1.1 mrg if (cand != NULL)
1247 1.1 mrg {
1248 1.1 mrg bitmap_set_bit (avail_cands, cand->index);
1249 1.1 mrg if (cand->reload_regno == -1)
1250 1.1 mrg bitmap_set_bit (active_cands, cand->index);
1251 1.1 mrg else
1252 1.1 mrg bitmap_clear_bit (active_cands, cand->index);
1253 1.1 mrg }
1254 1.1 mrg
1255 1.1 mrg if (remat_insn != NULL)
1256 1.1 mrg {
1257 1.1 mrg poly_int64 sp_offset_change = cand_sp_offset - id->sp_offset;
1258 1.1 mrg if (maybe_ne (sp_offset_change, 0))
1259 1.1 mrg change_sp_offset (remat_insn, sp_offset_change);
1260 1.1 mrg update_scratch_ops (remat_insn);
1261 1.1 mrg lra_process_new_insns (insn, remat_insn, NULL,
1262 1.1 mrg "Inserting rematerialization insn");
1263 1.1 mrg lra_set_insn_deleted (insn);
1264 1.1 mrg changed_p = true;
1265 1.1 mrg continue;
1266 1.1 mrg }
1267 1.1 mrg
1268 1.1 mrg /* Update live hard regs: */
1269 1.1 mrg for (reg = id->regs; reg != NULL; reg = reg->next)
1270 1.1 mrg if (reg->type == OP_IN
1271 1.1 mrg && find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
1272 1.1 mrg {
1273 1.1 mrg if ((hard_regno = get_hard_regs (reg, nregs)) < 0)
1274 1.1 mrg continue;
1275 1.1 mrg for (i = 0; i < nregs; i++)
1276 1.1 mrg CLEAR_HARD_REG_BIT (live_hard_regs, hard_regno + i);
1277 1.1 mrg }
1278 1.1 mrg /* Process also hard regs (e.g. CC register) which are part
1279 1.1 mrg of insn definition. */
1280 1.1 mrg for (reg = static_id->hard_regs; reg != NULL; reg = reg->next)
1281 1.1 mrg if (reg->type == OP_IN
1282 1.1 mrg && find_regno_note (insn, REG_DEAD, reg->regno) != NULL)
1283 1.1 mrg CLEAR_HARD_REG_BIT (live_hard_regs, reg->regno);
1284 1.1 mrg /* Inputs have been processed, now process outputs. */
1285 1.1 mrg for (reg = id->regs; reg != NULL; reg = reg->next)
1286 1.1 mrg if (reg->type != OP_IN
1287 1.1 mrg && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL)
1288 1.1 mrg {
1289 1.1 mrg if ((hard_regno = get_hard_regs (reg, nregs)) < 0)
1290 1.1 mrg continue;
1291 1.1 mrg for (i = 0; i < nregs; i++)
1292 1.1 mrg SET_HARD_REG_BIT (live_hard_regs, hard_regno + i);
1293 1.1 mrg }
1294 1.1 mrg for (reg = static_id->hard_regs; reg != NULL; reg = reg->next)
1295 1.1 mrg if (reg->type != OP_IN
1296 1.1 mrg && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL)
1297 1.1 mrg SET_HARD_REG_BIT (live_hard_regs, reg->regno);
1298 1.1 mrg }
1299 1.1 mrg }
1300 1.1 mrg return changed_p;
1301 1.1 mrg }
1302 1.1 mrg
1303 1.1 mrg
1304 1.1 mrg
1306 1.1 mrg /* Current number of rematerialization iteration. */
1307 1.1 mrg int lra_rematerialization_iter;
1308 1.1 mrg
1309 1.1 mrg /* Entry point of the rematerialization sub-pass. Return true if we
1310 1.1 mrg did any rematerialization. */
1311 1.1 mrg bool
1312 1.1 mrg lra_remat (void)
1313 1.1 mrg {
1314 1.1 mrg basic_block bb;
1315 1.1 mrg bool result;
1316 1.1 mrg int max_regno = max_reg_num ();
1317 1.1 mrg
1318 1.1 mrg if (! flag_lra_remat)
1319 1.1 mrg return false;
1320 1.1 mrg lra_rematerialization_iter++;
1321 1.1 mrg if (lra_rematerialization_iter > LRA_MAX_REMATERIALIZATION_PASSES)
1322 1.1 mrg return false;
1323 1.1 mrg if (lra_dump_file != NULL)
1324 1.1 mrg fprintf (lra_dump_file,
1325 1.1 mrg "\n******** Rematerialization #%d: ********\n\n",
1326 1.1 mrg lra_rematerialization_iter);
1327 1.1 mrg timevar_push (TV_LRA_REMAT);
1328 1.1 mrg insn_to_cand = XCNEWVEC (cand_t, get_max_uid ());
1329 1.1 mrg insn_to_cand_activation = XCNEWVEC (cand_t, get_max_uid ());
1330 1.1 mrg regno_cands = XCNEWVEC (cand_t, max_regno);
1331 1.1 mrg all_cands.create (8000);
1332 1.1 mrg initiate_cand_table ();
1333 1.1 mrg create_remat_bb_data ();
1334 1.1 mrg bitmap_initialize (&temp_bitmap, ®_obstack);
1335 1.1 mrg bitmap_initialize (&subreg_regs, ®_obstack);
1336 1.1 mrg calculate_local_reg_remat_bb_data ();
1337 1.1 mrg create_cands ();
1338 1.1 mrg calculate_livein_cands ();
1339 1.1 mrg calculate_gen_cands ();
1340 1.1 mrg bitmap_initialize (&all_blocks, ®_obstack);
1341 1.1 mrg FOR_ALL_BB_FN (bb, cfun)
1342 1.1 mrg bitmap_set_bit (&all_blocks, bb->index);
1343 1.1 mrg calculate_global_remat_bb_data ();
1344 1.1 mrg dump_candidates_and_remat_bb_data ();
1345 1.1 mrg result = do_remat ();
1346 1.1 mrg all_cands.release ();
1347 1.1 mrg bitmap_clear (&temp_bitmap);
1348 bitmap_clear (&subreg_regs);
1349 finish_remat_bb_data ();
1350 finish_cand_table ();
1351 bitmap_clear (&all_blocks);
1352 free (regno_cands);
1353 free (insn_to_cand);
1354 free (insn_to_cand_activation);
1355 timevar_pop (TV_LRA_REMAT);
1356 return result;
1357 }
1358