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optabs.h revision 1.5
      1  1.1  mrg /* Definitions for code generation pass of GNU compiler.
      2  1.5  mrg    Copyright (C) 2001-2015 Free Software Foundation, Inc.
      3  1.1  mrg 
      4  1.1  mrg This file is part of GCC.
      5  1.1  mrg 
      6  1.1  mrg GCC is free software; you can redistribute it and/or modify
      7  1.1  mrg it under the terms of the GNU General Public License as published by
      8  1.1  mrg the Free Software Foundation; either version 3, or (at your option)
      9  1.1  mrg any later version.
     10  1.1  mrg 
     11  1.1  mrg GCC is distributed in the hope that it will be useful,
     12  1.1  mrg but WITHOUT ANY WARRANTY; without even the implied warranty of
     13  1.1  mrg MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14  1.1  mrg GNU General Public License for more details.
     15  1.1  mrg 
     16  1.1  mrg You should have received a copy of the GNU General Public License
     17  1.1  mrg along with GCC; see the file COPYING3.  If not see
     18  1.1  mrg <http://www.gnu.org/licenses/>.  */
     19  1.1  mrg 
     20  1.1  mrg #ifndef GCC_OPTABS_H
     21  1.1  mrg #define GCC_OPTABS_H
     22  1.1  mrg 
     23  1.3  mrg #include "insn-opinit.h"
     24  1.1  mrg 
     25  1.3  mrg /* Generate code for a widening multiply.  */
     26  1.5  mrg extern rtx expand_widening_mult (machine_mode, rtx, rtx, rtx, int, optab);
     27  1.3  mrg 
     28  1.3  mrg /* Return the insn used to implement mode MODE of OP, or CODE_FOR_nothing
     29  1.3  mrg    if the target does not have such an insn.  */
     30  1.3  mrg 
     31  1.3  mrg static inline enum insn_code
     32  1.5  mrg optab_handler (optab op, machine_mode mode)
     33  1.3  mrg {
     34  1.3  mrg   unsigned scode = (op << 16) | mode;
     35  1.3  mrg   gcc_assert (op > LAST_CONV_OPTAB);
     36  1.3  mrg   return raw_optab_handler (scode);
     37  1.3  mrg }
     38  1.3  mrg 
     39  1.3  mrg /* Return the insn used to perform conversion OP from mode FROM_MODE
     40  1.3  mrg    to mode TO_MODE; return CODE_FOR_nothing if the target does not have
     41  1.3  mrg    such an insn.  */
     42  1.3  mrg 
     43  1.3  mrg static inline enum insn_code
     44  1.5  mrg convert_optab_handler (convert_optab op, machine_mode to_mode,
     45  1.5  mrg 		       machine_mode from_mode)
     46  1.3  mrg {
     47  1.3  mrg   unsigned scode = (op << 16) | (from_mode << 8) | to_mode;
     48  1.3  mrg   gcc_assert (op > unknown_optab && op <= LAST_CONV_OPTAB);
     49  1.3  mrg   return raw_optab_handler (scode);
     50  1.3  mrg }
     51  1.3  mrg 
     52  1.3  mrg /* Return the insn used to implement mode MODE of OP, or CODE_FOR_nothing
     53  1.3  mrg    if the target does not have such an insn.  */
     54  1.3  mrg 
     55  1.3  mrg static inline enum insn_code
     56  1.5  mrg direct_optab_handler (direct_optab op, machine_mode mode)
     57  1.3  mrg {
     58  1.3  mrg   return optab_handler (op, mode);
     59  1.3  mrg }
     60  1.3  mrg 
     61  1.3  mrg /* Return true if UNOPTAB is for a trapping-on-overflow operation.  */
     62  1.3  mrg 
     63  1.3  mrg static inline bool
     64  1.3  mrg trapv_unoptab_p (optab unoptab)
     65  1.3  mrg {
     66  1.3  mrg   return (unoptab == negv_optab
     67  1.3  mrg 	  || unoptab == absv_optab);
     68  1.3  mrg }
     69  1.3  mrg 
     70  1.3  mrg /* Return true if BINOPTAB is for a trapping-on-overflow operation.  */
     71  1.3  mrg 
     72  1.3  mrg static inline bool
     73  1.3  mrg trapv_binoptab_p (optab binoptab)
     74  1.3  mrg {
     75  1.3  mrg   return (binoptab == addv_optab
     76  1.3  mrg 	  || binoptab == subv_optab
     77  1.3  mrg 	  || binoptab == smulv_optab);
     78  1.3  mrg }
     79  1.1  mrg 
     80  1.5  mrg 
     81  1.3  mrg 
     82  1.3  mrg /* Describes an instruction that inserts or extracts a bitfield.  */
     83  1.3  mrg struct extraction_insn
     84  1.3  mrg {
     85  1.3  mrg   /* The code of the instruction.  */
     86  1.3  mrg   enum insn_code icode;
     87  1.3  mrg 
     88  1.3  mrg   /* The mode that the structure operand should have.  This is byte_mode
     89  1.3  mrg      when using the legacy insv, extv and extzv patterns to access memory.  */
     90  1.5  mrg   machine_mode struct_mode;
     91  1.3  mrg 
     92  1.3  mrg   /* The mode of the field to be inserted or extracted, and by extension
     93  1.3  mrg      the mode of the insertion or extraction itself.  */
     94  1.5  mrg   machine_mode field_mode;
     95  1.3  mrg 
     96  1.3  mrg   /* The mode of the field's bit position.  This is only important
     97  1.3  mrg      when the position is variable rather than constant.  */
     98  1.5  mrg   machine_mode pos_mode;
     99  1.3  mrg };
    100  1.3  mrg 
    101  1.3  mrg 
    102  1.3  mrg 
    103  1.3  mrg 
    104  1.3  mrg /* Describes the type of an expand_operand.  Each value is associated
    105  1.3  mrg    with a create_*_operand function; see the comments above those
    106  1.3  mrg    functions for details.  */
    107  1.3  mrg enum expand_operand_type {
    108  1.3  mrg   EXPAND_FIXED,
    109  1.3  mrg   EXPAND_OUTPUT,
    110  1.3  mrg   EXPAND_INPUT,
    111  1.3  mrg   EXPAND_CONVERT_TO,
    112  1.3  mrg   EXPAND_CONVERT_FROM,
    113  1.3  mrg   EXPAND_ADDRESS,
    114  1.3  mrg   EXPAND_INTEGER
    115  1.3  mrg };
    116  1.3  mrg 
    117  1.3  mrg /* Information about an operand for instruction expansion.  */
    118  1.3  mrg struct expand_operand {
    119  1.3  mrg   /* The type of operand.  */
    120  1.3  mrg   ENUM_BITFIELD (expand_operand_type) type : 8;
    121  1.3  mrg 
    122  1.3  mrg   /* True if any conversion should treat VALUE as being unsigned
    123  1.3  mrg      rather than signed.  Only meaningful for certain types.  */
    124  1.3  mrg   unsigned int unsigned_p : 1;
    125  1.3  mrg 
    126  1.3  mrg   /* Unused; available for future use.  */
    127  1.3  mrg   unsigned int unused : 7;
    128  1.3  mrg 
    129  1.3  mrg   /* The mode passed to the convert_*_operand function.  It has a
    130  1.3  mrg      type-dependent meaning.  */
    131  1.3  mrg   ENUM_BITFIELD (machine_mode) mode : 16;
    132  1.3  mrg 
    133  1.3  mrg   /* The value of the operand.  */
    134  1.3  mrg   rtx value;
    135  1.3  mrg };
    136  1.3  mrg 
    137  1.3  mrg /* Initialize OP with the given fields.  Initialise the other fields
    138  1.3  mrg    to their default values.  */
    139  1.3  mrg 
    140  1.3  mrg static inline void
    141  1.3  mrg create_expand_operand (struct expand_operand *op,
    142  1.3  mrg 		       enum expand_operand_type type,
    143  1.5  mrg 		       rtx value, machine_mode mode,
    144  1.3  mrg 		       bool unsigned_p)
    145  1.3  mrg {
    146  1.3  mrg   op->type = type;
    147  1.3  mrg   op->unsigned_p = unsigned_p;
    148  1.3  mrg   op->unused = 0;
    149  1.3  mrg   op->mode = mode;
    150  1.3  mrg   op->value = value;
    151  1.3  mrg }
    152  1.3  mrg 
    153  1.3  mrg /* Make OP describe an operand that must use rtx X, even if X is volatile.  */
    154  1.3  mrg 
    155  1.3  mrg static inline void
    156  1.3  mrg create_fixed_operand (struct expand_operand *op, rtx x)
    157  1.3  mrg {
    158  1.3  mrg   create_expand_operand (op, EXPAND_FIXED, x, VOIDmode, false);
    159  1.3  mrg }
    160  1.3  mrg 
    161  1.3  mrg /* Make OP describe an output operand that must have mode MODE.
    162  1.3  mrg    X, if nonnull, is a suggestion for where the output should be stored.
    163  1.3  mrg    It is OK for VALUE to be inconsistent with MODE, although it will just
    164  1.3  mrg    be ignored in that case.  */
    165  1.3  mrg 
    166  1.3  mrg static inline void
    167  1.3  mrg create_output_operand (struct expand_operand *op, rtx x,
    168  1.5  mrg 		       machine_mode mode)
    169  1.3  mrg {
    170  1.3  mrg   create_expand_operand (op, EXPAND_OUTPUT, x, mode, false);
    171  1.3  mrg }
    172  1.3  mrg 
    173  1.3  mrg /* Make OP describe an input operand that must have mode MODE and
    174  1.3  mrg    value VALUE; MODE cannot be VOIDmode.  The backend may request that
    175  1.3  mrg    VALUE be copied into a different kind of rtx before being passed
    176  1.3  mrg    as an operand.  */
    177  1.3  mrg 
    178  1.3  mrg static inline void
    179  1.3  mrg create_input_operand (struct expand_operand *op, rtx value,
    180  1.5  mrg 		      machine_mode mode)
    181  1.3  mrg {
    182  1.3  mrg   create_expand_operand (op, EXPAND_INPUT, value, mode, false);
    183  1.3  mrg }
    184  1.3  mrg 
    185  1.3  mrg /* Like create_input_operand, except that VALUE must first be converted
    186  1.3  mrg    to mode MODE.  UNSIGNED_P says whether VALUE is unsigned.  */
    187  1.3  mrg 
    188  1.3  mrg static inline void
    189  1.3  mrg create_convert_operand_to (struct expand_operand *op, rtx value,
    190  1.5  mrg 			   machine_mode mode, bool unsigned_p)
    191  1.3  mrg {
    192  1.3  mrg   create_expand_operand (op, EXPAND_CONVERT_TO, value, mode, unsigned_p);
    193  1.3  mrg }
    194  1.3  mrg 
    195  1.3  mrg /* Make OP describe an input operand that should have the same value
    196  1.3  mrg    as VALUE, after any mode conversion that the backend might request.
    197  1.3  mrg    If VALUE is a CONST_INT, it should be treated as having mode MODE.
    198  1.3  mrg    UNSIGNED_P says whether VALUE is unsigned.  */
    199  1.3  mrg 
    200  1.3  mrg static inline void
    201  1.3  mrg create_convert_operand_from (struct expand_operand *op, rtx value,
    202  1.5  mrg 			     machine_mode mode, bool unsigned_p)
    203  1.3  mrg {
    204  1.3  mrg   create_expand_operand (op, EXPAND_CONVERT_FROM, value, mode, unsigned_p);
    205  1.3  mrg }
    206  1.3  mrg 
    207  1.3  mrg 
    208  1.3  mrg /* Make OP describe an input Pmode address operand.  VALUE is the value
    209  1.3  mrg    of the address, but it may need to be converted to Pmode first.  */
    210  1.3  mrg 
    211  1.3  mrg static inline void
    212  1.3  mrg create_address_operand (struct expand_operand *op, rtx value)
    213  1.3  mrg {
    214  1.3  mrg   create_expand_operand (op, EXPAND_ADDRESS, value, Pmode, false);
    215  1.3  mrg }
    216  1.3  mrg 
    217  1.3  mrg /* Make OP describe an input operand that has value INTVAL and that has
    218  1.3  mrg    no inherent mode.  This function should only be used for operands that
    219  1.3  mrg    are always expand-time constants.  The backend may request that INTVAL
    220  1.3  mrg    be copied into a different kind of rtx, but it must specify the mode
    221  1.3  mrg    of that rtx if so.  */
    222  1.3  mrg 
    223  1.3  mrg static inline void
    224  1.3  mrg create_integer_operand (struct expand_operand *op, HOST_WIDE_INT intval)
    225  1.3  mrg {
    226  1.3  mrg   create_expand_operand (op, EXPAND_INTEGER, GEN_INT (intval), VOIDmode, false);
    227  1.3  mrg }
    228  1.3  mrg 
    229  1.3  mrg 
    230  1.5  mrg extern rtx convert_optab_libfunc (convert_optab optab, machine_mode mode1,
    231  1.5  mrg 			          machine_mode mode2);
    232  1.5  mrg extern rtx optab_libfunc (optab optab, machine_mode mode);
    233  1.5  mrg extern enum insn_code widening_optab_handler (optab, machine_mode,
    234  1.5  mrg 					      machine_mode);
    235  1.5  mrg /* Find a widening optab even if it doesn't widen as much as we want.  */
    236  1.5  mrg #define find_widening_optab_handler(A,B,C,D) \
    237  1.5  mrg   find_widening_optab_handler_and_mode (A, B, C, D, NULL)
    238  1.5  mrg extern enum insn_code find_widening_optab_handler_and_mode (optab,
    239  1.5  mrg 							    machine_mode,
    240  1.5  mrg 							    machine_mode,
    241  1.5  mrg 							    int,
    242  1.5  mrg 							    machine_mode *);
    243  1.5  mrg 
    244  1.5  mrg /* An extra flag to control optab_for_tree_code's behavior.  This is needed to
    245  1.5  mrg    distinguish between machines with a vector shift that takes a scalar for the
    246  1.5  mrg    shift amount vs. machines that take a vector for the shift amount.  */
    247  1.5  mrg enum optab_subtype
    248  1.5  mrg {
    249  1.5  mrg   optab_default,
    250  1.5  mrg   optab_scalar,
    251  1.5  mrg   optab_vector
    252  1.5  mrg };
    253  1.5  mrg 
    254  1.5  mrg /* Passed to expand_simple_binop and expand_binop to say which options
    255  1.5  mrg    to try to use if the requested operation can't be open-coded on the
    256  1.5  mrg    requisite mode.  Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using
    257  1.5  mrg    a library call.  Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try
    258  1.5  mrg    using a wider mode.  OPTAB_MUST_WIDEN says try widening and don't
    259  1.5  mrg    try anything else.  */
    260  1.5  mrg 
    261  1.5  mrg enum optab_methods
    262  1.5  mrg {
    263  1.5  mrg   OPTAB_DIRECT,
    264  1.5  mrg   OPTAB_LIB,
    265  1.5  mrg   OPTAB_WIDEN,
    266  1.5  mrg   OPTAB_LIB_WIDEN,
    267  1.5  mrg   OPTAB_MUST_WIDEN
    268  1.5  mrg };
    269  1.5  mrg 
    270  1.5  mrg /* Return the optab used for computing the given operation on the type given by
    271  1.5  mrg    the second argument.  The third argument distinguishes between the types of
    272  1.5  mrg    vector shifts and rotates */
    273  1.5  mrg extern optab optab_for_tree_code (enum tree_code, const_tree, enum optab_subtype);
    274  1.5  mrg 
    275  1.5  mrg /* Given an optab that reduces a vector to a scalar, find instead the old
    276  1.5  mrg    optab that produces a vector with the reduction result in one element,
    277  1.5  mrg    for a tree with the specified type.  */
    278  1.5  mrg extern optab scalar_reduc_to_vector (optab, const_tree type);
    279  1.5  mrg 
    280  1.5  mrg extern rtx expand_widen_pattern_expr (struct separate_ops *, rtx , rtx , rtx,
    281  1.5  mrg                                       rtx, int);
    282  1.5  mrg extern rtx expand_ternary_op (machine_mode mode, optab ternary_optab,
    283  1.5  mrg 			      rtx op0, rtx op1, rtx op2, rtx target,
    284  1.5  mrg 			      int unsignedp);
    285  1.5  mrg extern rtx simplify_expand_binop (machine_mode mode, optab binoptab,
    286  1.5  mrg 				  rtx op0, rtx op1, rtx target, int unsignedp,
    287  1.5  mrg 				  enum optab_methods methods);
    288  1.5  mrg extern bool force_expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
    289  1.5  mrg 				enum optab_methods);
    290  1.5  mrg 
    291  1.5  mrg /* Generate code for a simple binary or unary operation.  "Simple" in
    292  1.5  mrg    this case means "can be unambiguously described by a (mode, code)
    293  1.5  mrg    pair and mapped to a single optab."  */
    294  1.5  mrg extern rtx expand_simple_binop (machine_mode, enum rtx_code, rtx,
    295  1.5  mrg 				rtx, rtx, int, enum optab_methods);
    296  1.5  mrg 
    297  1.5  mrg /* Expand a binary operation given optab and rtx operands.  */
    298  1.5  mrg extern rtx expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
    299  1.5  mrg 			 enum optab_methods);
    300  1.5  mrg 
    301  1.5  mrg /* Expand a binary operation with both signed and unsigned forms.  */
    302  1.5  mrg extern rtx sign_expand_binop (machine_mode, optab, optab, rtx, rtx,
    303  1.5  mrg 			      rtx, int, enum optab_methods);
    304  1.5  mrg 
    305  1.5  mrg /* Generate code to perform an operation on one operand with two results.  */
    306  1.5  mrg extern int expand_twoval_unop (optab, rtx, rtx, rtx, int);
    307  1.5  mrg 
    308  1.5  mrg /* Generate code to perform an operation on two operands with two results.  */
    309  1.5  mrg extern int expand_twoval_binop (optab, rtx, rtx, rtx, rtx, int);
    310  1.5  mrg 
    311  1.5  mrg /* Generate code to perform an operation on two operands with two
    312  1.5  mrg    results, using a library function.  */
    313  1.5  mrg extern bool expand_twoval_binop_libfunc (optab, rtx, rtx, rtx, rtx,
    314  1.5  mrg 					 enum rtx_code);
    315  1.5  mrg extern rtx expand_simple_unop (machine_mode, enum rtx_code, rtx, rtx,
    316  1.5  mrg 			       int);
    317  1.5  mrg 
    318  1.5  mrg /* Expand a unary arithmetic operation given optab rtx operand.  */
    319  1.5  mrg extern rtx expand_unop (machine_mode, optab, rtx, rtx, int);
    320  1.5  mrg 
    321  1.5  mrg /* Expand the absolute value operation.  */
    322  1.5  mrg extern rtx expand_abs_nojump (machine_mode, rtx, rtx, int);
    323  1.5  mrg extern rtx expand_abs (machine_mode, rtx, rtx, int, int);
    324  1.5  mrg 
    325  1.5  mrg /* Expand the one's complement absolute value operation.  */
    326  1.5  mrg extern rtx expand_one_cmpl_abs_nojump (machine_mode, rtx, rtx);
    327  1.5  mrg 
    328  1.5  mrg /* Expand the copysign operation.  */
    329  1.5  mrg extern rtx expand_copysign (rtx, rtx, rtx);
    330  1.5  mrg /* Generate an instruction with a given INSN_CODE with an output and
    331  1.5  mrg    an input.  */
    332  1.5  mrg extern bool maybe_emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
    333  1.5  mrg extern void emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
    334  1.5  mrg 
    335  1.5  mrg /* Emit code to make a call to a constant function or a library call.  */
    336  1.5  mrg extern void emit_libcall_block (rtx, rtx, rtx, rtx);
    337  1.5  mrg 
    338  1.5  mrg /* The various uses that a comparison can have; used by can_compare_p:
    339  1.5  mrg    jumps, conditional moves, store flag operations.  */
    340  1.5  mrg enum can_compare_purpose
    341  1.5  mrg {
    342  1.5  mrg   ccp_jump,
    343  1.5  mrg   ccp_cmov,
    344  1.5  mrg   ccp_store_flag
    345  1.5  mrg };
    346  1.5  mrg 
    347  1.5  mrg /* Nonzero if a compare of mode MODE can be done straightforwardly
    348  1.5  mrg    (without splitting it into pieces).  */
    349  1.5  mrg extern int can_compare_p (enum rtx_code, machine_mode,
    350  1.5  mrg 			  enum can_compare_purpose);
    351  1.5  mrg extern rtx prepare_operand (enum insn_code, rtx, int, machine_mode,
    352  1.5  mrg 			    machine_mode, int);
    353  1.5  mrg /* Emit a pair of rtl insns to compare two rtx's and to jump
    354  1.5  mrg    to a label if the comparison is true.  */
    355  1.5  mrg extern void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx,
    356  1.5  mrg 				     machine_mode, int, rtx, int prob=-1);
    357  1.5  mrg 
    358  1.5  mrg /* Generate code to indirectly jump to a location given in the rtx LOC.  */
    359  1.5  mrg extern void emit_indirect_jump (rtx);
    360  1.5  mrg 
    361  1.5  mrg #include "insn-config.h"
    362  1.5  mrg 
    363  1.5  mrg #ifndef GCC_INSN_CONFIG_H
    364  1.5  mrg #error "insn-config.h must be included before optabs.h"
    365  1.5  mrg #endif
    366  1.5  mrg 
    367  1.5  mrg #ifdef HAVE_conditional_move
    368  1.5  mrg /* Emit a conditional move operation.  */
    369  1.5  mrg rtx emit_conditional_move (rtx, enum rtx_code, rtx, rtx, machine_mode,
    370  1.5  mrg 			   rtx, rtx, machine_mode, int);
    371  1.5  mrg 
    372  1.5  mrg /* Return nonzero if the conditional move is supported.  */
    373  1.5  mrg int can_conditionally_move_p (machine_mode mode);
    374  1.5  mrg 
    375  1.5  mrg #endif
    376  1.5  mrg rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, machine_mode,
    377  1.5  mrg 			  rtx, rtx, machine_mode, int);
    378  1.5  mrg 
    379  1.5  mrg /* Create but don't emit one rtl instruction to perform certain operations.
    380  1.5  mrg    Modes must match; operands must meet the operation's predicates.
    381  1.5  mrg    Likewise for subtraction and for just copying.  */
    382  1.5  mrg extern rtx gen_add2_insn (rtx, rtx);
    383  1.5  mrg extern rtx gen_add3_insn (rtx, rtx, rtx);
    384  1.5  mrg extern int have_add2_insn (rtx, rtx);
    385  1.5  mrg extern rtx gen_addptr3_insn (rtx, rtx, rtx);
    386  1.5  mrg extern int have_addptr3_insn (rtx, rtx, rtx);
    387  1.5  mrg extern rtx gen_sub2_insn (rtx, rtx);
    388  1.5  mrg extern rtx gen_sub3_insn (rtx, rtx, rtx);
    389  1.5  mrg extern int have_sub2_insn (rtx, rtx);
    390  1.5  mrg 
    391  1.5  mrg /* Return the INSN_CODE to use for an extend operation.  */
    392  1.5  mrg extern enum insn_code can_extend_p (machine_mode, machine_mode, int);
    393  1.5  mrg 
    394  1.5  mrg /* Generate the body of an insn to extend Y (with mode MFROM)
    395  1.5  mrg    into X (with mode MTO).  Do zero-extension if UNSIGNEDP is nonzero.  */
    396  1.5  mrg extern rtx gen_extend_insn (rtx, rtx, machine_mode,
    397  1.5  mrg 			    machine_mode, int);
    398  1.5  mrg 
    399  1.5  mrg /* Return the insn_code for a FLOAT_EXPR.  */
    400  1.5  mrg enum insn_code can_float_p (machine_mode, machine_mode, int);
    401  1.5  mrg 
    402  1.5  mrg /* Check whether an operation represented by the code CODE is a
    403  1.5  mrg    convert operation that is supported by the target platform in
    404  1.5  mrg    vector form */
    405  1.5  mrg bool supportable_convert_operation (enum tree_code, tree, tree, tree *,
    406  1.5  mrg                                     enum tree_code *);
    407  1.5  mrg 
    408  1.5  mrg /* Generate code for a FLOAT_EXPR.  */
    409  1.5  mrg extern void expand_float (rtx, rtx, int);
    410  1.5  mrg 
    411  1.5  mrg /* Generate code for a FIX_EXPR.  */
    412  1.5  mrg extern void expand_fix (rtx, rtx, int);
    413  1.5  mrg 
    414  1.5  mrg /* Generate code for a FIXED_CONVERT_EXPR.  */
    415  1.5  mrg extern void expand_fixed_convert (rtx, rtx, int, int);
    416  1.3  mrg 
    417  1.5  mrg /* Generate code for float to integral conversion.  */
    418  1.5  mrg extern bool expand_sfix_optab (rtx, rtx, convert_optab);
    419  1.3  mrg 
    420  1.5  mrg /* Report whether the machine description contains an insn which can
    421  1.5  mrg    perform the operation described by CODE and MODE.  */
    422  1.5  mrg extern int have_insn_for (enum rtx_code, machine_mode);
    423  1.5  mrg 
    424  1.5  mrg extern void gen_int_libfunc (optab, const char *, char, machine_mode);
    425  1.5  mrg extern void gen_fp_libfunc (optab, const char *, char, machine_mode);
    426  1.5  mrg extern void gen_fixed_libfunc (optab, const char *, char, machine_mode);
    427  1.3  mrg extern void gen_signed_fixed_libfunc (optab, const char *, char,
    428  1.5  mrg 				      machine_mode);
    429  1.3  mrg extern void gen_unsigned_fixed_libfunc (optab, const char *, char,
    430  1.5  mrg 					machine_mode);
    431  1.5  mrg extern void gen_int_fp_libfunc (optab, const char *, char, machine_mode);
    432  1.5  mrg extern void gen_intv_fp_libfunc (optab, const char *, char, machine_mode);
    433  1.3  mrg extern void gen_int_fp_fixed_libfunc (optab, const char *, char,
    434  1.5  mrg 				      machine_mode);
    435  1.3  mrg extern void gen_int_fp_signed_fixed_libfunc (optab, const char *, char,
    436  1.5  mrg 					     machine_mode);
    437  1.3  mrg extern void gen_int_fixed_libfunc (optab, const char *, char,
    438  1.5  mrg 				   machine_mode);
    439  1.3  mrg extern void gen_int_signed_fixed_libfunc (optab, const char *, char,
    440  1.5  mrg 					  machine_mode);
    441  1.3  mrg extern void gen_int_unsigned_fixed_libfunc (optab, const char *, char,
    442  1.5  mrg 					    machine_mode);
    443  1.3  mrg 
    444  1.3  mrg extern void gen_interclass_conv_libfunc (convert_optab, const char *,
    445  1.5  mrg 					 machine_mode, machine_mode);
    446  1.3  mrg extern void gen_int_to_fp_conv_libfunc (convert_optab, const char *,
    447  1.5  mrg 					machine_mode, machine_mode);
    448  1.3  mrg extern void gen_ufloat_conv_libfunc (convert_optab, const char *,
    449  1.5  mrg 				     machine_mode, machine_mode);
    450  1.3  mrg extern void gen_int_to_fp_nondecimal_conv_libfunc  (convert_optab,
    451  1.3  mrg 						    const char *,
    452  1.5  mrg 						    machine_mode,
    453  1.5  mrg 						    machine_mode);
    454  1.3  mrg extern void gen_fp_to_int_conv_libfunc (convert_optab, const char *,
    455  1.5  mrg 					machine_mode, machine_mode);
    456  1.3  mrg extern void gen_intraclass_conv_libfunc (convert_optab, const char *,
    457  1.5  mrg 					 machine_mode, machine_mode);
    458  1.3  mrg extern void gen_trunc_conv_libfunc (convert_optab, const char *,
    459  1.5  mrg 				    machine_mode, machine_mode);
    460  1.3  mrg extern void gen_extend_conv_libfunc (convert_optab, const char *,
    461  1.5  mrg 				     machine_mode, machine_mode);
    462  1.3  mrg extern void gen_fract_conv_libfunc (convert_optab, const char *,
    463  1.5  mrg 				    machine_mode, machine_mode);
    464  1.3  mrg extern void gen_fractuns_conv_libfunc (convert_optab, const char *,
    465  1.5  mrg 				       machine_mode, machine_mode);
    466  1.3  mrg extern void gen_satfract_conv_libfunc (convert_optab, const char *,
    467  1.5  mrg 				       machine_mode, machine_mode);
    468  1.3  mrg extern void gen_satfractuns_conv_libfunc (convert_optab, const char *,
    469  1.5  mrg 					  machine_mode,
    470  1.5  mrg 					  machine_mode);
    471  1.5  mrg 
    472  1.5  mrg /* Build a decl for a libfunc named NAME. */
    473  1.5  mrg extern tree build_libfunc_function (const char *);
    474  1.5  mrg 
    475  1.5  mrg /* Call this to initialize an optab function entry.  */
    476  1.5  mrg extern rtx init_one_libfunc (const char *);
    477  1.5  mrg extern rtx set_user_assembler_libfunc (const char *, const char *);
    478  1.5  mrg 
    479  1.5  mrg /* Call this to reset the function entry for one optab.  */
    480  1.5  mrg extern void set_optab_libfunc (optab, machine_mode, const char *);
    481  1.5  mrg extern void set_conv_libfunc (convert_optab, machine_mode,
    482  1.5  mrg 			      machine_mode, const char *);
    483  1.5  mrg 
    484  1.5  mrg /* Call this once to initialize the contents of the optabs
    485  1.5  mrg    appropriately for the current target machine.  */
    486  1.5  mrg extern void init_optabs (void);
    487  1.5  mrg extern void init_tree_optimization_optabs (tree);
    488  1.5  mrg 
    489  1.5  mrg /* Call this to install all of the __sync libcalls up to size MAX.  */
    490  1.5  mrg extern void init_sync_libfuncs (int max);
    491  1.5  mrg 
    492  1.5  mrg /* Generate a conditional trap instruction.  */
    493  1.5  mrg extern rtx gen_cond_trap (enum rtx_code, rtx, rtx, rtx);
    494  1.5  mrg 
    495  1.5  mrg /* Return true if target supports vector operations for VEC_PERM_EXPR.  */
    496  1.5  mrg extern bool can_vec_perm_p (machine_mode, bool, const unsigned char *);
    497  1.5  mrg 
    498  1.5  mrg /* Generate code for VEC_PERM_EXPR.  */
    499  1.5  mrg extern rtx expand_vec_perm (machine_mode, rtx, rtx, rtx, rtx);
    500  1.5  mrg 
    501  1.5  mrg /* Return tree if target supports vector operations for COND_EXPR.  */
    502  1.5  mrg bool expand_vec_cond_expr_p (tree, tree);
    503  1.5  mrg 
    504  1.5  mrg /* Generate code for VEC_COND_EXPR.  */
    505  1.5  mrg extern rtx expand_vec_cond_expr (tree, tree, tree, tree, rtx);
    506  1.5  mrg 
    507  1.5  mrg /* Return non-zero if target supports a given highpart multiplication.  */
    508  1.5  mrg extern int can_mult_highpart_p (machine_mode, bool);
    509  1.5  mrg 
    510  1.5  mrg /* Generate code for MULT_HIGHPART_EXPR.  */
    511  1.5  mrg extern rtx expand_mult_highpart (machine_mode, rtx, rtx, rtx, bool);
    512  1.5  mrg 
    513  1.5  mrg /* Return true if target supports vector masked load/store for mode.  */
    514  1.5  mrg extern bool can_vec_mask_load_store_p (machine_mode, bool);
    515  1.5  mrg 
    516  1.5  mrg /* Return true if there is an inline compare and swap pattern.  */
    517  1.5  mrg extern bool can_compare_and_swap_p (machine_mode, bool);
    518  1.5  mrg 
    519  1.5  mrg /* Return true if there is an inline atomic exchange pattern.  */
    520  1.5  mrg extern bool can_atomic_exchange_p (machine_mode, bool);
    521  1.5  mrg 
    522  1.5  mrg extern rtx expand_sync_lock_test_and_set (rtx, rtx, rtx);
    523  1.5  mrg extern rtx expand_atomic_test_and_set (rtx, rtx, enum memmodel);
    524  1.5  mrg extern rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel);
    525  1.5  mrg extern bool expand_atomic_compare_and_swap (rtx *, rtx *, rtx, rtx, rtx, bool,
    526  1.5  mrg 					    enum memmodel, enum memmodel);
    527  1.5  mrg /* Generate memory barriers.  */
    528  1.5  mrg extern void expand_mem_thread_fence (enum memmodel);
    529  1.5  mrg extern void expand_mem_signal_fence (enum memmodel);
    530  1.5  mrg 
    531  1.5  mrg rtx expand_atomic_load (rtx, rtx, enum memmodel);
    532  1.5  mrg rtx expand_atomic_store (rtx, rtx, enum memmodel, bool);
    533  1.5  mrg rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel,
    534  1.5  mrg 			      bool);
    535  1.5  mrg 
    536  1.5  mrg extern bool insn_operand_matches (enum insn_code icode, unsigned int opno,
    537  1.5  mrg 				  rtx operand);
    538  1.5  mrg extern bool valid_multiword_target_p (rtx);
    539  1.5  mrg extern void create_convert_operand_from_type (struct expand_operand *op,
    540  1.5  mrg 					      rtx value, tree type);
    541  1.5  mrg extern bool maybe_legitimize_operands (enum insn_code icode,
    542  1.5  mrg 				       unsigned int opno, unsigned int nops,
    543  1.5  mrg 				       struct expand_operand *ops);
    544  1.5  mrg extern rtx maybe_gen_insn (enum insn_code icode, unsigned int nops,
    545  1.5  mrg 			   struct expand_operand *ops);
    546  1.5  mrg extern bool maybe_expand_insn (enum insn_code icode, unsigned int nops,
    547  1.5  mrg 			       struct expand_operand *ops);
    548  1.5  mrg extern bool maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
    549  1.5  mrg 				    struct expand_operand *ops);
    550  1.5  mrg extern void expand_insn (enum insn_code icode, unsigned int nops,
    551  1.5  mrg 			 struct expand_operand *ops);
    552  1.5  mrg extern void expand_jump_insn (enum insn_code icode, unsigned int nops,
    553  1.5  mrg 			      struct expand_operand *ops);
    554  1.5  mrg 
    555  1.5  mrg /* Enumerates the possible extraction_insn operations.  */
    556  1.5  mrg enum extraction_pattern { EP_insv, EP_extv, EP_extzv };
    557  1.5  mrg 
    558  1.5  mrg extern bool get_best_reg_extraction_insn (extraction_insn *,
    559  1.5  mrg 					  enum extraction_pattern,
    560  1.5  mrg 					  unsigned HOST_WIDE_INT,
    561  1.5  mrg 					  machine_mode);
    562  1.5  mrg extern bool get_best_mem_extraction_insn (extraction_insn *,
    563  1.5  mrg 					  enum extraction_pattern,
    564  1.5  mrg 					  HOST_WIDE_INT, HOST_WIDE_INT,
    565  1.5  mrg 					  machine_mode);
    566  1.5  mrg 
    567  1.5  mrg extern bool lshift_cheap_p (bool);
    568  1.5  mrg 
    569  1.5  mrg extern enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp);
    570  1.3  mrg 
    571  1.1  mrg #endif /* GCC_OPTABS_H */
    572