1 1.1 mrg /* Define per-register tables for data flow info and register allocation. 2 1.12 mrg Copyright (C) 1987-2022 Free Software Foundation, Inc. 3 1.1 mrg 4 1.1 mrg This file is part of GCC. 5 1.1 mrg 6 1.1 mrg GCC is free software; you can redistribute it and/or modify it under 7 1.1 mrg the terms of the GNU General Public License as published by the Free 8 1.1 mrg Software Foundation; either version 3, or (at your option) any later 9 1.1 mrg version. 10 1.1 mrg 11 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12 1.1 mrg WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 1.1 mrg FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 1.1 mrg for more details. 15 1.1 mrg 16 1.1 mrg You should have received a copy of the GNU General Public License 17 1.1 mrg along with GCC; see the file COPYING3. If not see 18 1.1 mrg <http://www.gnu.org/licenses/>. */ 19 1.1 mrg 20 1.1 mrg #ifndef GCC_REGS_H 21 1.1 mrg #define GCC_REGS_H 22 1.1 mrg 23 1.1 mrg #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] 24 1.1 mrg 25 1.1 mrg /* When you only have the mode of a pseudo register before it has a hard 26 1.1 mrg register chosen for it, this reports the size of each hard register 27 1.1 mrg a pseudo in such a mode would get allocated to. A target may 28 1.1 mrg override this. */ 29 1.1 mrg 30 1.1 mrg #ifndef REGMODE_NATURAL_SIZE 31 1.1 mrg #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD 32 1.1 mrg #endif 33 1.1 mrg 34 1.1 mrg /* Maximum register number used in this function, plus one. */ 35 1.1 mrg 36 1.1 mrg extern int max_regno; 37 1.1 mrg 38 1.1 mrg /* REG_N_REFS and REG_N_SETS are initialized by a call to 39 1.1 mrg regstat_init_n_sets_and_refs from the current values of 40 1.1 mrg DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS 41 1.1 mrg should only be used if a pass need to change these values in some 42 1.3 mrg magical way or the pass needs to have accurate values for these 43 1.1 mrg and is not using incremental df scanning. 44 1.1 mrg 45 1.1 mrg At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call 46 1.1 mrg should be made to regstat_free_n_sets_and_refs. 47 1.1 mrg 48 1.1 mrg Local alloc seems to play pretty loose with these values. 49 1.1 mrg REG_N_REFS is set to 0 if the register is used in an asm. 50 1.1 mrg Furthermore, local_alloc calls regclass to hack both REG_N_REFS and 51 1.1 mrg REG_N_SETS for three address insns. Other passes seem to have 52 1.1 mrg other special values. */ 53 1.1 mrg 54 1.1 mrg 55 1.1 mrg 56 1.1 mrg /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */ 57 1.1 mrg 58 1.1 mrg struct regstat_n_sets_and_refs_t 59 1.1 mrg { 60 1.1 mrg int sets; /* # of times (REG n) is set */ 61 1.1 mrg int refs; /* # of times (REG n) is used or set */ 62 1.1 mrg }; 63 1.1 mrg 64 1.1 mrg extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs; 65 1.1 mrg 66 1.1 mrg /* Indexed by n, gives number of times (REG n) is used or set. */ 67 1.1 mrg static inline int 68 1.5 mrg REG_N_REFS (int regno) 69 1.1 mrg { 70 1.1 mrg return regstat_n_sets_and_refs[regno].refs; 71 1.1 mrg } 72 1.1 mrg 73 1.1 mrg /* Indexed by n, gives number of times (REG n) is used or set. */ 74 1.1 mrg #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V) 75 1.1 mrg #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V) 76 1.1 mrg 77 1.1 mrg /* Indexed by n, gives number of times (REG n) is set. */ 78 1.1 mrg static inline int 79 1.1 mrg REG_N_SETS (int regno) 80 1.1 mrg { 81 1.1 mrg return regstat_n_sets_and_refs[regno].sets; 82 1.1 mrg } 83 1.1 mrg 84 1.1 mrg /* Indexed by n, gives number of times (REG n) is set. */ 85 1.1 mrg #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V) 86 1.1 mrg #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V) 87 1.1 mrg 88 1.3 mrg /* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise. */ 89 1.3 mrg extern bool reg_is_parm_p (rtx); 90 1.1 mrg 91 1.12 mrg /* Functions defined in regstat.cc. */ 92 1.1 mrg extern void regstat_init_n_sets_and_refs (void); 93 1.1 mrg extern void regstat_free_n_sets_and_refs (void); 94 1.1 mrg extern void regstat_compute_ri (void); 95 1.1 mrg extern void regstat_free_ri (void); 96 1.1 mrg extern bitmap regstat_get_setjmp_crosses (void); 97 1.1 mrg extern void regstat_compute_calls_crossed (void); 98 1.1 mrg extern void regstat_free_calls_crossed (void); 99 1.3 mrg extern void dump_reg_info (FILE *); 100 1.1 mrg 101 1.1 mrg /* Register information indexed by register number. This structure is 102 1.1 mrg initialized by calling regstat_compute_ri and is destroyed by 103 1.1 mrg calling regstat_free_ri. */ 104 1.1 mrg struct reg_info_t 105 1.1 mrg { 106 1.1 mrg int freq; /* # estimated frequency (REG n) is used or set */ 107 1.1 mrg int deaths; /* # of times (REG n) dies */ 108 1.1 mrg int calls_crossed; /* # of calls (REG n) is live across */ 109 1.1 mrg int basic_block; /* # of basic blocks (REG n) is used in */ 110 1.1 mrg }; 111 1.1 mrg 112 1.1 mrg extern struct reg_info_t *reg_info_p; 113 1.1 mrg 114 1.1 mrg /* The number allocated elements of reg_info_p. */ 115 1.1 mrg extern size_t reg_info_p_size; 116 1.1 mrg 117 1.1 mrg /* Estimate frequency of references to register N. */ 118 1.1 mrg 119 1.1 mrg #define REG_FREQ(N) (reg_info_p[N].freq) 120 1.1 mrg 121 1.1 mrg /* The weights for each insn varies from 0 to REG_FREQ_BASE. 122 1.1 mrg This constant does not need to be high, as in infrequently executed 123 1.1 mrg regions we want to count instructions equivalently to optimize for 124 1.1 mrg size instead of speed. */ 125 1.1 mrg #define REG_FREQ_MAX 1000 126 1.1 mrg 127 1.1 mrg /* Compute register frequency from the BB frequency. When optimizing for size, 128 1.1 mrg or profile driven feedback is available and the function is never executed, 129 1.1 mrg frequency is always equivalent. Otherwise rescale the basic block 130 1.1 mrg frequency. */ 131 1.11 mrg #define REG_FREQ_FROM_BB(bb) ((optimize_function_for_size_p (cfun) \ 132 1.11 mrg || !cfun->cfg->count_max.initialized_p ()) \ 133 1.1 mrg ? REG_FREQ_MAX \ 134 1.9 mrg : ((bb)->count.to_frequency (cfun) \ 135 1.9 mrg * REG_FREQ_MAX / BB_FREQ_MAX) \ 136 1.9 mrg ? ((bb)->count.to_frequency (cfun) \ 137 1.9 mrg * REG_FREQ_MAX / BB_FREQ_MAX) \ 138 1.1 mrg : 1) 139 1.1 mrg 140 1.1 mrg /* Indexed by N, gives number of insns in which register N dies. 141 1.1 mrg Note that if register N is live around loops, it can die 142 1.1 mrg in transitions between basic blocks, and that is not counted here. 143 1.1 mrg So this is only a reliable indicator of how many regions of life there are 144 1.1 mrg for registers that are contained in one basic block. */ 145 1.1 mrg 146 1.1 mrg #define REG_N_DEATHS(N) (reg_info_p[N].deaths) 147 1.1 mrg 148 1.1 mrg /* Get the number of consecutive words required to hold pseudo-reg N. */ 149 1.1 mrg 150 1.1 mrg #define PSEUDO_REGNO_SIZE(N) \ 151 1.1 mrg ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ 152 1.1 mrg / UNITS_PER_WORD) 153 1.1 mrg 154 1.1 mrg /* Get the number of bytes required to hold pseudo-reg N. */ 155 1.1 mrg 156 1.1 mrg #define PSEUDO_REGNO_BYTES(N) \ 157 1.1 mrg GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) 158 1.1 mrg 159 1.1 mrg /* Get the machine mode of pseudo-reg N. */ 160 1.1 mrg 161 1.1 mrg #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) 162 1.1 mrg 163 1.1 mrg /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ 164 1.1 mrg 165 1.1 mrg #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed) 166 1.1 mrg 167 1.1 mrg /* Indexed by n, gives number of basic block that (REG n) is used in. 168 1.1 mrg If the value is REG_BLOCK_GLOBAL (-1), 169 1.1 mrg it means (REG n) is used in more than one basic block. 170 1.1 mrg REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know. 171 1.1 mrg This information remains valid for the rest of the compilation 172 1.1 mrg of the current function; it is used to control register allocation. */ 173 1.1 mrg 174 1.1 mrg #define REG_BLOCK_UNKNOWN 0 175 1.1 mrg #define REG_BLOCK_GLOBAL -1 176 1.1 mrg 177 1.1 mrg #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block) 178 1.1 mrg 179 1.1 mrg /* Vector of substitutions of register numbers, 180 1.1 mrg used to map pseudo regs into hardware regs. 181 1.1 mrg 182 1.1 mrg This can't be folded into reg_n_info without changing all of the 183 1.1 mrg machine dependent directories, since the reload functions 184 1.1 mrg in the machine dependent files access it. */ 185 1.1 mrg 186 1.1 mrg extern short *reg_renumber; 187 1.1 mrg 188 1.1 mrg /* Flag set by local-alloc or global-alloc if they decide to allocate 189 1.1 mrg something in a call-clobbered register. */ 190 1.1 mrg 191 1.1 mrg extern int caller_save_needed; 192 1.1 mrg 193 1.1 mrg /* Select a register mode required for caller save of hard regno REGNO. */ 194 1.1 mrg #ifndef HARD_REGNO_CALLER_SAVE_MODE 195 1.1 mrg #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 196 1.11 mrg choose_hard_reg_mode (REGNO, NREGS, NULL) 197 1.1 mrg #endif 198 1.1 mrg 199 1.3 mrg /* Target-dependent globals. */ 200 1.3 mrg struct target_regs { 201 1.3 mrg /* For each starting hard register, the number of consecutive hard 202 1.3 mrg registers that a given machine mode occupies. */ 203 1.3 mrg unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; 204 1.3 mrg 205 1.12 mrg /* The max value found in x_hard_regno_nregs. */ 206 1.12 mrg unsigned char x_hard_regno_max_nregs; 207 1.12 mrg 208 1.3 mrg /* For each hard register, the widest mode object that it can contain. 209 1.3 mrg This will be a MODE_INT mode if the register can hold integers. Otherwise 210 1.3 mrg it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the 211 1.3 mrg register. */ 212 1.5 mrg machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER]; 213 1.3 mrg 214 1.3 mrg /* Vector indexed by machine mode saying whether there are regs of 215 1.3 mrg that mode. */ 216 1.3 mrg bool x_have_regs_of_mode[MAX_MACHINE_MODE]; 217 1.3 mrg 218 1.3 mrg /* 1 if the corresponding class contains a register of the given mode. */ 219 1.3 mrg char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE]; 220 1.3 mrg 221 1.8 mrg /* 1 if the corresponding class contains a register of the given mode 222 1.8 mrg which is not global and can therefore be allocated. */ 223 1.8 mrg char x_contains_allocatable_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE]; 224 1.8 mrg 225 1.3 mrg /* Record for each mode whether we can move a register directly to or 226 1.3 mrg from an object of that mode in memory. If we can't, we won't try 227 1.3 mrg to use that mode directly when accessing a field of that mode. */ 228 1.3 mrg char x_direct_load[NUM_MACHINE_MODES]; 229 1.3 mrg char x_direct_store[NUM_MACHINE_MODES]; 230 1.3 mrg 231 1.3 mrg /* Record for each mode whether we can float-extend from memory. */ 232 1.3 mrg bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES]; 233 1.3 mrg }; 234 1.3 mrg 235 1.3 mrg extern struct target_regs default_target_regs; 236 1.3 mrg #if SWITCHABLE_TARGET 237 1.3 mrg extern struct target_regs *this_target_regs; 238 1.3 mrg #else 239 1.3 mrg #define this_target_regs (&default_target_regs) 240 1.3 mrg #endif 241 1.12 mrg #define hard_regno_max_nregs \ 242 1.12 mrg (this_target_regs->x_hard_regno_max_nregs) 243 1.3 mrg #define reg_raw_mode \ 244 1.3 mrg (this_target_regs->x_reg_raw_mode) 245 1.3 mrg #define have_regs_of_mode \ 246 1.3 mrg (this_target_regs->x_have_regs_of_mode) 247 1.3 mrg #define contains_reg_of_mode \ 248 1.3 mrg (this_target_regs->x_contains_reg_of_mode) 249 1.8 mrg #define contains_allocatable_reg_of_mode \ 250 1.8 mrg (this_target_regs->x_contains_allocatable_reg_of_mode) 251 1.3 mrg #define direct_load \ 252 1.3 mrg (this_target_regs->x_direct_load) 253 1.3 mrg #define direct_store \ 254 1.3 mrg (this_target_regs->x_direct_store) 255 1.3 mrg #define float_extend_from_mem \ 256 1.3 mrg (this_target_regs->x_float_extend_from_mem) 257 1.1 mrg 258 1.9 mrg /* Return the number of hard registers in (reg:MODE REGNO). */ 259 1.9 mrg 260 1.9 mrg ALWAYS_INLINE unsigned char 261 1.9 mrg hard_regno_nregs (unsigned int regno, machine_mode mode) 262 1.9 mrg { 263 1.9 mrg return this_target_regs->x_hard_regno_nregs[regno][mode]; 264 1.9 mrg } 265 1.9 mrg 266 1.1 mrg /* Return an exclusive upper bound on the registers occupied by hard 267 1.1 mrg register (reg:MODE REGNO). */ 268 1.1 mrg 269 1.1 mrg static inline unsigned int 270 1.5 mrg end_hard_regno (machine_mode mode, unsigned int regno) 271 1.1 mrg { 272 1.9 mrg return regno + hard_regno_nregs (regno, mode); 273 1.1 mrg } 274 1.1 mrg 275 1.1 mrg /* Add to REGS all the registers required to store a value of mode MODE 276 1.1 mrg in register REGNO. */ 277 1.1 mrg 278 1.1 mrg static inline void 279 1.5 mrg add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode, 280 1.1 mrg unsigned int regno) 281 1.1 mrg { 282 1.1 mrg unsigned int end_regno; 283 1.1 mrg 284 1.1 mrg end_regno = end_hard_regno (mode, regno); 285 1.1 mrg do 286 1.1 mrg SET_HARD_REG_BIT (*regs, regno); 287 1.1 mrg while (++regno < end_regno); 288 1.1 mrg } 289 1.1 mrg 290 1.1 mrg /* Likewise, but remove the registers. */ 291 1.1 mrg 292 1.1 mrg static inline void 293 1.5 mrg remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode, 294 1.1 mrg unsigned int regno) 295 1.1 mrg { 296 1.1 mrg unsigned int end_regno; 297 1.1 mrg 298 1.1 mrg end_regno = end_hard_regno (mode, regno); 299 1.1 mrg do 300 1.1 mrg CLEAR_HARD_REG_BIT (*regs, regno); 301 1.1 mrg while (++regno < end_regno); 302 1.1 mrg } 303 1.1 mrg 304 1.1 mrg /* Return true if REGS contains the whole of (reg:MODE REGNO). */ 305 1.1 mrg 306 1.1 mrg static inline bool 307 1.11 mrg in_hard_reg_set_p (const_hard_reg_set regs, machine_mode mode, 308 1.1 mrg unsigned int regno) 309 1.1 mrg { 310 1.1 mrg unsigned int end_regno; 311 1.1 mrg 312 1.3 mrg gcc_assert (HARD_REGISTER_NUM_P (regno)); 313 1.3 mrg 314 1.1 mrg if (!TEST_HARD_REG_BIT (regs, regno)) 315 1.1 mrg return false; 316 1.1 mrg 317 1.1 mrg end_regno = end_hard_regno (mode, regno); 318 1.3 mrg 319 1.3 mrg if (!HARD_REGISTER_NUM_P (end_regno - 1)) 320 1.3 mrg return false; 321 1.3 mrg 322 1.1 mrg while (++regno < end_regno) 323 1.1 mrg if (!TEST_HARD_REG_BIT (regs, regno)) 324 1.1 mrg return false; 325 1.1 mrg 326 1.1 mrg return true; 327 1.1 mrg } 328 1.1 mrg 329 1.1 mrg /* Return true if (reg:MODE REGNO) includes an element of REGS. */ 330 1.1 mrg 331 1.1 mrg static inline bool 332 1.11 mrg overlaps_hard_reg_set_p (const_hard_reg_set regs, machine_mode mode, 333 1.1 mrg unsigned int regno) 334 1.1 mrg { 335 1.1 mrg unsigned int end_regno; 336 1.1 mrg 337 1.1 mrg if (TEST_HARD_REG_BIT (regs, regno)) 338 1.1 mrg return true; 339 1.1 mrg 340 1.1 mrg end_regno = end_hard_regno (mode, regno); 341 1.1 mrg while (++regno < end_regno) 342 1.1 mrg if (TEST_HARD_REG_BIT (regs, regno)) 343 1.1 mrg return true; 344 1.1 mrg 345 1.1 mrg return false; 346 1.1 mrg } 347 1.1 mrg 348 1.3 mrg /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of 349 1.3 mrg REGNO and MODE. */ 350 1.3 mrg 351 1.3 mrg static inline void 352 1.3 mrg add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno, 353 1.3 mrg int nregs) 354 1.3 mrg { 355 1.3 mrg while (nregs-- > 0) 356 1.3 mrg SET_HARD_REG_BIT (*regs, regno + nregs); 357 1.3 mrg } 358 1.3 mrg 359 1.3 mrg /* Likewise, but remove the registers. */ 360 1.3 mrg 361 1.3 mrg static inline void 362 1.3 mrg remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno, 363 1.3 mrg int nregs) 364 1.3 mrg { 365 1.3 mrg while (nregs-- > 0) 366 1.3 mrg CLEAR_HARD_REG_BIT (*regs, regno + nregs); 367 1.3 mrg } 368 1.3 mrg 369 1.3 mrg /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of 370 1.3 mrg REGNO and MODE. */ 371 1.3 mrg static inline bool 372 1.11 mrg range_overlaps_hard_reg_set_p (const_hard_reg_set set, unsigned regno, 373 1.3 mrg int nregs) 374 1.3 mrg { 375 1.3 mrg while (nregs-- > 0) 376 1.3 mrg if (TEST_HARD_REG_BIT (set, regno + nregs)) 377 1.3 mrg return true; 378 1.3 mrg return false; 379 1.3 mrg } 380 1.3 mrg 381 1.3 mrg /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of 382 1.3 mrg REGNO and MODE. */ 383 1.3 mrg static inline bool 384 1.11 mrg range_in_hard_reg_set_p (const_hard_reg_set set, unsigned regno, int nregs) 385 1.3 mrg { 386 1.3 mrg while (nregs-- > 0) 387 1.3 mrg if (!TEST_HARD_REG_BIT (set, regno + nregs)) 388 1.3 mrg return false; 389 1.3 mrg return true; 390 1.3 mrg } 391 1.3 mrg 392 1.1 mrg #endif /* GCC_REGS_H */ 393