reload.h revision 1.12 1 1.12 mrg /* Communication between reload.cc, reload1.cc and the rest of compiler.
2 1.12 mrg Copyright (C) 1987-2022 Free Software Foundation, Inc.
3 1.1 mrg
4 1.1 mrg This file is part of GCC.
5 1.1 mrg
6 1.1 mrg GCC is free software; you can redistribute it and/or modify it under
7 1.1 mrg the terms of the GNU General Public License as published by the Free
8 1.1 mrg Software Foundation; either version 3, or (at your option) any later
9 1.1 mrg version.
10 1.1 mrg
11 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 1.1 mrg WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 1.1 mrg FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 1.1 mrg for more details.
15 1.1 mrg
16 1.1 mrg You should have received a copy of the GNU General Public License
17 1.1 mrg along with GCC; see the file COPYING3. If not see
18 1.1 mrg <http://www.gnu.org/licenses/>. */
19 1.1 mrg
20 1.5 mrg #ifndef GCC_RELOAD_H
21 1.5 mrg #define GCC_RELOAD_H
22 1.1 mrg
23 1.1 mrg /* If secondary reloads are the same for inputs and outputs, define those
24 1.1 mrg macros here. */
25 1.1 mrg
26 1.1 mrg #ifdef SECONDARY_RELOAD_CLASS
27 1.1 mrg #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
28 1.1 mrg SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
29 1.1 mrg #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
30 1.1 mrg SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
31 1.1 mrg #endif
32 1.1 mrg
33 1.5 mrg extern int register_move_cost (machine_mode, reg_class_t, reg_class_t);
34 1.5 mrg extern int memory_move_cost (machine_mode, reg_class_t, bool);
35 1.5 mrg extern int memory_move_secondary_cost (machine_mode, reg_class_t, bool);
36 1.1 mrg
37 1.1 mrg /* Maximum number of reloads we can need. */
38 1.1 mrg #define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
39 1.1 mrg
40 1.1 mrg /* Encode the usage of a reload. The following codes are supported:
41 1.1 mrg
42 1.1 mrg RELOAD_FOR_INPUT reload of an input operand
43 1.1 mrg RELOAD_FOR_OUTPUT likewise, for output
44 1.1 mrg RELOAD_FOR_INSN a reload that must not conflict with anything
45 1.1 mrg used in the insn, but may conflict with
46 1.1 mrg something used before or after the insn
47 1.1 mrg RELOAD_FOR_INPUT_ADDRESS reload for parts of the address of an object
48 1.1 mrg that is an input reload
49 1.1 mrg RELOAD_FOR_INPADDR_ADDRESS reload needed for RELOAD_FOR_INPUT_ADDRESS
50 1.1 mrg RELOAD_FOR_OUTPUT_ADDRESS like RELOAD_FOR INPUT_ADDRESS, for output
51 1.1 mrg RELOAD_FOR_OUTADDR_ADDRESS reload needed for RELOAD_FOR_OUTPUT_ADDRESS
52 1.1 mrg RELOAD_FOR_OPERAND_ADDRESS reload for the address of a non-reloaded
53 1.1 mrg operand; these don't conflict with
54 1.1 mrg any other addresses.
55 1.1 mrg RELOAD_FOR_OPADDR_ADDR reload needed for RELOAD_FOR_OPERAND_ADDRESS
56 1.1 mrg reloads; usually secondary reloads
57 1.1 mrg RELOAD_OTHER none of the above, usually multiple uses
58 1.1 mrg RELOAD_FOR_OTHER_ADDRESS reload for part of the address of an input
59 1.1 mrg that is marked RELOAD_OTHER.
60 1.1 mrg
61 1.1 mrg This used to be "enum reload_when_needed" but some debuggers have trouble
62 1.1 mrg with an enum tag and variable of the same name. */
63 1.1 mrg
64 1.1 mrg enum reload_type
65 1.1 mrg {
66 1.1 mrg RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
67 1.1 mrg RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
68 1.1 mrg RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
69 1.1 mrg RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
70 1.1 mrg RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
71 1.1 mrg };
72 1.1 mrg
73 1.1 mrg #ifdef GCC_INSN_CODES_H
74 1.1 mrg /* Each reload is recorded with a structure like this. */
75 1.1 mrg struct reload
76 1.1 mrg {
77 1.1 mrg /* The value to reload from */
78 1.1 mrg rtx in;
79 1.1 mrg /* Where to store reload-reg afterward if nec (often the same as
80 1.1 mrg reload_in) */
81 1.1 mrg rtx out;
82 1.1 mrg
83 1.1 mrg /* The class of registers to reload into. */
84 1.1 mrg enum reg_class rclass;
85 1.1 mrg
86 1.1 mrg /* The mode this operand should have when reloaded, on input. */
87 1.5 mrg machine_mode inmode;
88 1.1 mrg /* The mode this operand should have when reloaded, on output. */
89 1.5 mrg machine_mode outmode;
90 1.1 mrg
91 1.1 mrg /* The mode of the reload register. */
92 1.5 mrg machine_mode mode;
93 1.1 mrg
94 1.1 mrg /* the largest number of registers this reload will require. */
95 1.1 mrg unsigned int nregs;
96 1.1 mrg
97 1.1 mrg /* Positive amount to increment or decrement by if
98 1.1 mrg reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
99 1.1 mrg Ignored otherwise (don't assume it is zero). */
100 1.9 mrg poly_int64_pod inc;
101 1.1 mrg /* A reg for which reload_in is the equivalent.
102 1.1 mrg If reload_in is a symbol_ref which came from
103 1.1 mrg reg_equiv_constant, then this is the pseudo
104 1.1 mrg which has that symbol_ref as equivalent. */
105 1.1 mrg rtx in_reg;
106 1.1 mrg rtx out_reg;
107 1.1 mrg
108 1.1 mrg /* Used in find_reload_regs to record the allocated register. */
109 1.1 mrg int regno;
110 1.1 mrg /* This is the register to reload into. If it is zero when `find_reloads'
111 1.1 mrg returns, you must find a suitable register in the class specified by
112 1.1 mrg reload_reg_class, and store here an rtx for that register with mode from
113 1.1 mrg reload_inmode or reload_outmode. */
114 1.1 mrg rtx reg_rtx;
115 1.1 mrg /* The operand number being reloaded. This is used to group related reloads
116 1.1 mrg and need not always be equal to the actual operand number in the insn,
117 1.1 mrg though it current will be; for in-out operands, it is one of the two
118 1.1 mrg operand numbers. */
119 1.1 mrg int opnum;
120 1.1 mrg
121 1.1 mrg /* Gives the reload number of a secondary input reload, when needed;
122 1.1 mrg otherwise -1. */
123 1.1 mrg int secondary_in_reload;
124 1.1 mrg /* Gives the reload number of a secondary output reload, when needed;
125 1.1 mrg otherwise -1. */
126 1.1 mrg int secondary_out_reload;
127 1.1 mrg /* If a secondary input reload is required, gives the INSN_CODE that uses the
128 1.1 mrg secondary reload as a scratch register, or CODE_FOR_nothing if the
129 1.1 mrg secondary reload register is to be an intermediate register. */
130 1.1 mrg enum insn_code secondary_in_icode;
131 1.1 mrg /* Likewise, for a secondary output reload. */
132 1.1 mrg enum insn_code secondary_out_icode;
133 1.1 mrg
134 1.1 mrg /* Classifies reload as needed either for addressing an input reload,
135 1.1 mrg addressing an output, for addressing a non-reloaded mem ref, or for
136 1.1 mrg unspecified purposes (i.e., more than one of the above). */
137 1.1 mrg enum reload_type when_needed;
138 1.1 mrg
139 1.1 mrg /* Nonzero for an optional reload. Optional reloads are ignored unless the
140 1.1 mrg value is already sitting in a register. */
141 1.1 mrg unsigned int optional:1;
142 1.1 mrg /* nonzero if this reload shouldn't be combined with another reload. */
143 1.1 mrg unsigned int nocombine:1;
144 1.1 mrg /* Nonzero if this is a secondary register for one or more reloads. */
145 1.1 mrg unsigned int secondary_p:1;
146 1.1 mrg /* Nonzero if this reload must use a register not already allocated to a
147 1.1 mrg group. */
148 1.1 mrg unsigned int nongroup:1;
149 1.1 mrg };
150 1.1 mrg
151 1.1 mrg extern struct reload rld[MAX_RELOADS];
152 1.1 mrg extern int n_reloads;
153 1.1 mrg #endif
154 1.1 mrg
155 1.3 mrg /* Target-dependent globals. */
156 1.3 mrg struct target_reload {
157 1.3 mrg /* Nonzero if indirect addressing is supported when the innermost MEM is
158 1.3 mrg of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to
159 1.3 mrg which these are valid is the same as spill_indirect_levels, above. */
160 1.3 mrg bool x_indirect_symref_ok;
161 1.3 mrg
162 1.3 mrg /* Nonzero if indirect addressing is supported on the machine; this means
163 1.3 mrg that spilling (REG n) does not require reloading it into a register in
164 1.3 mrg order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The
165 1.3 mrg value indicates the level of indirect addressing supported, e.g., two
166 1.3 mrg means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
167 1.3 mrg a hard register. */
168 1.6 mrg unsigned char x_spill_indirect_levels;
169 1.3 mrg
170 1.3 mrg /* True if caller-save has been reinitialized. */
171 1.3 mrg bool x_caller_save_initialized_p;
172 1.3 mrg
173 1.3 mrg /* Modes for each hard register that we can save. The smallest mode is wide
174 1.3 mrg enough to save the entire contents of the register. When saving the
175 1.3 mrg register because it is live we first try to save in multi-register modes.
176 1.3 mrg If that is not possible the save is done one register at a time. */
177 1.5 mrg machine_mode (x_regno_save_mode
178 1.3 mrg [FIRST_PSEUDO_REGISTER]
179 1.3 mrg [MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
180 1.3 mrg
181 1.8 mrg /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid
182 1.8 mrg in the given mode. */
183 1.8 mrg bool x_double_reg_address_ok[MAX_MACHINE_MODE];
184 1.8 mrg
185 1.3 mrg /* We will only make a register eligible for caller-save if it can be
186 1.3 mrg saved in its widest mode with a simple SET insn as long as the memory
187 1.3 mrg address is valid. We record the INSN_CODE is those insns here since
188 1.3 mrg when we emit them, the addresses might not be valid, so they might not
189 1.3 mrg be recognized. */
190 1.3 mrg int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
191 1.3 mrg int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
192 1.3 mrg };
193 1.3 mrg
194 1.3 mrg extern struct target_reload default_target_reload;
195 1.3 mrg #if SWITCHABLE_TARGET
196 1.3 mrg extern struct target_reload *this_target_reload;
197 1.3 mrg #else
198 1.3 mrg #define this_target_reload (&default_target_reload)
199 1.3 mrg #endif
200 1.3 mrg
201 1.3 mrg #define indirect_symref_ok \
202 1.3 mrg (this_target_reload->x_indirect_symref_ok)
203 1.3 mrg #define double_reg_address_ok \
204 1.3 mrg (this_target_reload->x_double_reg_address_ok)
205 1.3 mrg #define caller_save_initialized_p \
206 1.3 mrg (this_target_reload->x_caller_save_initialized_p)
207 1.3 mrg
208 1.3 mrg /* Register equivalences. Indexed by register number. */
209 1.5 mrg struct reg_equivs_t
210 1.3 mrg {
211 1.3 mrg /* The constant value to which pseudo reg N is equivalent,
212 1.3 mrg or zero if pseudo reg N is not equivalent to a constant.
213 1.3 mrg find_reloads looks at this in order to replace pseudo reg N
214 1.3 mrg with the constant it stands for. */
215 1.3 mrg rtx constant;
216 1.3 mrg
217 1.3 mrg /* An invariant value to which pseudo reg N is equivalent.
218 1.3 mrg eliminate_regs_in_insn uses this to replace pseudos in particular
219 1.3 mrg contexts. */
220 1.3 mrg rtx invariant;
221 1.3 mrg
222 1.3 mrg /* A memory location to which pseudo reg N is equivalent,
223 1.3 mrg prior to any register elimination (such as frame pointer to stack
224 1.3 mrg pointer). Depending on whether or not it is a valid address, this value
225 1.3 mrg is transferred to either equiv_address or equiv_mem. */
226 1.3 mrg rtx memory_loc;
227 1.3 mrg
228 1.3 mrg /* The address of stack slot to which pseudo reg N is equivalent.
229 1.3 mrg This is used when the address is not valid as a memory address
230 1.3 mrg (because its displacement is too big for the machine.) */
231 1.3 mrg rtx address;
232 1.3 mrg
233 1.3 mrg /* The memory slot to which pseudo reg N is equivalent,
234 1.3 mrg or zero if pseudo reg N is not equivalent to a memory slot. */
235 1.3 mrg rtx mem;
236 1.3 mrg
237 1.3 mrg /* An EXPR_LIST of REG_EQUIVs containing MEMs with
238 1.3 mrg alternate representations of the location of pseudo reg N. */
239 1.5 mrg rtx_expr_list *alt_mem_list;
240 1.3 mrg
241 1.3 mrg /* The list of insns that initialized reg N from its equivalent
242 1.3 mrg constant or memory slot. */
243 1.6 mrg rtx_insn_list *init;
244 1.5 mrg };
245 1.3 mrg
246 1.3 mrg #define reg_equiv_constant(ELT) \
247 1.3 mrg (*reg_equivs)[(ELT)].constant
248 1.3 mrg #define reg_equiv_invariant(ELT) \
249 1.3 mrg (*reg_equivs)[(ELT)].invariant
250 1.3 mrg #define reg_equiv_memory_loc(ELT) \
251 1.3 mrg (*reg_equivs)[(ELT)].memory_loc
252 1.3 mrg #define reg_equiv_address(ELT) \
253 1.3 mrg (*reg_equivs)[(ELT)].address
254 1.3 mrg #define reg_equiv_mem(ELT) \
255 1.3 mrg (*reg_equivs)[(ELT)].mem
256 1.3 mrg #define reg_equiv_alt_mem_list(ELT) \
257 1.3 mrg (*reg_equivs)[(ELT)].alt_mem_list
258 1.3 mrg #define reg_equiv_init(ELT) \
259 1.3 mrg (*reg_equivs)[(ELT)].init
260 1.1 mrg
261 1.3 mrg extern vec<reg_equivs_t, va_gc> *reg_equivs;
262 1.1 mrg
263 1.1 mrg /* All the "earlyclobber" operands of the current insn
264 1.1 mrg are recorded here. */
265 1.1 mrg extern int n_earlyclobbers;
266 1.1 mrg extern rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
267 1.1 mrg
268 1.1 mrg /* Save the number of operands. */
269 1.1 mrg extern int reload_n_operands;
270 1.1 mrg
271 1.1 mrg /* First uid used by insns created by reload in this function.
272 1.1 mrg Used in find_equiv_reg. */
273 1.1 mrg extern int reload_first_uid;
274 1.1 mrg
275 1.1 mrg extern int num_not_at_initial_offset;
276 1.1 mrg
277 1.11 mrg #if defined HARD_CONST && defined CLEAR_REG_SET
278 1.1 mrg /* This structure describes instructions which are relevant for reload.
279 1.1 mrg Apart from all regular insns, this also includes CODE_LABELs, since they
280 1.1 mrg must be examined for register elimination. */
281 1.11 mrg class insn_chain
282 1.1 mrg {
283 1.11 mrg public:
284 1.1 mrg /* Links to the neighbor instructions. */
285 1.11 mrg class insn_chain *next, *prev;
286 1.1 mrg
287 1.1 mrg /* Link through a chains set up by calculate_needs_all_insns, containing
288 1.1 mrg all insns that need reloading. */
289 1.11 mrg class insn_chain *next_need_reload;
290 1.1 mrg
291 1.1 mrg /* The rtx of the insn. */
292 1.5 mrg rtx_insn *insn;
293 1.1 mrg
294 1.1 mrg /* The basic block this insn is in. */
295 1.1 mrg int block;
296 1.1 mrg
297 1.1 mrg /* Nonzero if find_reloads said the insn requires reloading. */
298 1.1 mrg unsigned int need_reload:1;
299 1.1 mrg /* Nonzero if find_reloads needs to be run during reload_as_needed to
300 1.1 mrg perform modifications on any operands. */
301 1.1 mrg unsigned int need_operand_change:1;
302 1.1 mrg /* Nonzero if eliminate_regs_in_insn said it requires eliminations. */
303 1.1 mrg unsigned int need_elim:1;
304 1.1 mrg /* Nonzero if this insn was inserted by perform_caller_saves. */
305 1.1 mrg unsigned int is_caller_save_insn:1;
306 1.1 mrg
307 1.1 mrg /* Register life information: record all live hard registers, and
308 1.1 mrg all live pseudos that have a hard register. This set also
309 1.1 mrg contains pseudos spilled by IRA. */
310 1.3 mrg bitmap_head live_throughout;
311 1.3 mrg bitmap_head dead_or_set;
312 1.1 mrg
313 1.1 mrg /* Copies of the global variables computed by find_reloads. */
314 1.1 mrg struct reload *rld;
315 1.1 mrg int n_reloads;
316 1.1 mrg
317 1.1 mrg /* Indicates which registers have already been used for spills. */
318 1.1 mrg HARD_REG_SET used_spill_regs;
319 1.1 mrg };
320 1.1 mrg
321 1.1 mrg /* A chain of insn_chain structures to describe all non-note insns in
322 1.1 mrg a function. */
323 1.11 mrg extern class insn_chain *reload_insn_chain;
324 1.1 mrg
325 1.1 mrg /* Allocate a new insn_chain structure. */
326 1.11 mrg extern class insn_chain *new_insn_chain (void);
327 1.3 mrg #endif
328 1.1 mrg
329 1.11 mrg #if defined HARD_CONST
330 1.3 mrg extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
331 1.1 mrg #endif
332 1.1 mrg
333 1.12 mrg /* Functions from reload.cc: */
334 1.1 mrg
335 1.3 mrg extern reg_class_t secondary_reload_class (bool, reg_class_t,
336 1.5 mrg machine_mode, rtx);
337 1.1 mrg
338 1.1 mrg #ifdef GCC_INSN_CODES_H
339 1.1 mrg extern enum reg_class scratch_reload_class (enum insn_code);
340 1.1 mrg #endif
341 1.1 mrg
342 1.1 mrg /* Return a memory location that will be used to copy X in mode MODE.
343 1.1 mrg If we haven't already made a location for this mode in this insn,
344 1.1 mrg call find_reloads_address on the location being returned. */
345 1.5 mrg extern rtx get_secondary_mem (rtx, machine_mode, int, enum reload_type);
346 1.1 mrg
347 1.1 mrg /* Clear any secondary memory locations we've made. */
348 1.1 mrg extern void clear_secondary_mem (void);
349 1.1 mrg
350 1.1 mrg /* Transfer all replacements that used to be in reload FROM to be in
351 1.1 mrg reload TO. */
352 1.1 mrg extern void transfer_replacements (int, int);
353 1.1 mrg
354 1.1 mrg /* IN_RTX is the value loaded by a reload that we now decided to inherit,
355 1.1 mrg or a subpart of it. If we have any replacements registered for IN_RTX,
356 1.1 mrg cancel the reloads that were supposed to load them.
357 1.1 mrg Return nonzero if we canceled any reloads. */
358 1.1 mrg extern int remove_address_replacements (rtx in_rtx);
359 1.1 mrg
360 1.1 mrg /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
361 1.1 mrg if they are the same hard reg, and has special hacks for
362 1.1 mrg autoincrement and autodecrement. */
363 1.1 mrg extern int operands_match_p (rtx, rtx);
364 1.1 mrg
365 1.1 mrg /* Return 1 if altering OP will not modify the value of CLOBBER. */
366 1.1 mrg extern int safe_from_earlyclobber (rtx, rtx);
367 1.1 mrg
368 1.1 mrg /* Search the body of INSN for values that need reloading and record them
369 1.1 mrg with push_reload. REPLACE nonzero means record also where the values occur
370 1.1 mrg so that subst_reloads can be used. */
371 1.5 mrg extern int find_reloads (rtx_insn *, int, int, int, short *);
372 1.1 mrg
373 1.1 mrg /* Compute the sum of X and Y, making canonicalizations assumed in an
374 1.1 mrg address, namely: sum constant integers, surround the sum of two
375 1.1 mrg constants with a CONST, put the constant as the second operand, and
376 1.1 mrg group the constant on the outermost sum. */
377 1.5 mrg extern rtx form_sum (machine_mode, rtx, rtx);
378 1.1 mrg
379 1.1 mrg /* Substitute into the current INSN the registers into which we have reloaded
380 1.1 mrg the things that need reloading. */
381 1.5 mrg extern void subst_reloads (rtx_insn *);
382 1.1 mrg
383 1.1 mrg /* Make a copy of any replacements being done into X and move those copies
384 1.1 mrg to locations in Y, a copy of X. We only look at the highest level of
385 1.1 mrg the RTL. */
386 1.1 mrg extern void copy_replacements (rtx, rtx);
387 1.1 mrg
388 1.1 mrg /* Change any replacements being done to *X to be done to *Y */
389 1.1 mrg extern void move_replacements (rtx *x, rtx *y);
390 1.1 mrg
391 1.1 mrg /* If LOC was scheduled to be replaced by something, return the replacement.
392 1.1 mrg Otherwise, return *LOC. */
393 1.1 mrg extern rtx find_replacement (rtx *);
394 1.1 mrg
395 1.1 mrg /* Nonzero if modifying X will affect IN. */
396 1.1 mrg extern int reg_overlap_mentioned_for_reload_p (rtx, rtx);
397 1.1 mrg
398 1.1 mrg /* Check the insns before INSN to see if there is a suitable register
399 1.1 mrg containing the same value as GOAL. */
400 1.5 mrg extern rtx find_equiv_reg (rtx, rtx_insn *, enum reg_class, int, short *,
401 1.5 mrg int, machine_mode);
402 1.1 mrg
403 1.1 mrg /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
404 1.5 mrg extern int regno_clobbered_p (unsigned int, rtx_insn *, machine_mode, int);
405 1.1 mrg
406 1.1 mrg /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
407 1.1 mrg extern int earlyclobber_operand_p (rtx);
408 1.1 mrg
409 1.1 mrg /* Record one reload that needs to be performed. */
410 1.1 mrg extern int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class,
411 1.5 mrg machine_mode, machine_mode,
412 1.1 mrg int, int, int, enum reload_type);
413 1.1 mrg
414 1.12 mrg /* Functions in reload1.cc: */
415 1.1 mrg
416 1.1 mrg /* Initialize the reload pass once per compilation. */
417 1.1 mrg extern void init_reload (void);
418 1.1 mrg
419 1.1 mrg /* The reload pass itself. */
420 1.5 mrg extern bool reload (rtx_insn *, int);
421 1.1 mrg
422 1.1 mrg /* Mark the slots in regs_ever_live for the hard regs
423 1.1 mrg used by pseudo-reg number REGNO. */
424 1.1 mrg extern void mark_home_live (int);
425 1.1 mrg
426 1.1 mrg /* Scan X and replace any eliminable registers (such as fp) with a
427 1.1 mrg replacement (such as sp), plus an offset. */
428 1.5 mrg extern rtx eliminate_regs (rtx, machine_mode, rtx);
429 1.1 mrg extern bool elimination_target_reg_p (rtx);
430 1.1 mrg
431 1.3 mrg /* Called from the register allocator to estimate costs of eliminating
432 1.3 mrg invariant registers. */
433 1.3 mrg extern void calculate_elim_costs_all_insns (void);
434 1.3 mrg
435 1.1 mrg /* Deallocate the reload register used by reload number R. */
436 1.1 mrg extern void deallocate_reload_reg (int r);
437 1.1 mrg
438 1.12 mrg /* Functions in caller-save.cc: */
439 1.1 mrg
440 1.1 mrg /* Initialize for caller-save. */
441 1.1 mrg extern void init_caller_save (void);
442 1.1 mrg
443 1.1 mrg /* Initialize save areas by showing that we haven't allocated any yet. */
444 1.1 mrg extern void init_save_areas (void);
445 1.1 mrg
446 1.1 mrg /* Allocate save areas for any hard registers that might need saving. */
447 1.1 mrg extern void setup_save_areas (void);
448 1.1 mrg
449 1.1 mrg /* Find the places where hard regs are live across calls and save them. */
450 1.1 mrg extern void save_call_clobbered_regs (void);
451 1.1 mrg
452 1.1 mrg /* Replace (subreg (reg)) with the appropriate (reg) for any operands. */
453 1.5 mrg extern void cleanup_subreg_operands (rtx_insn *);
454 1.1 mrg
455 1.1 mrg /* Debugging support. */
456 1.1 mrg extern void debug_reload_to_stream (FILE *);
457 1.1 mrg extern void debug_reload (void);
458 1.1 mrg
459 1.1 mrg /* Compute the actual register we should reload to, in case we're
460 1.1 mrg reloading to/from a register that is wider than a word. */
461 1.5 mrg extern rtx reload_adjust_reg_for_mode (rtx, machine_mode);
462 1.3 mrg
463 1.3 mrg /* Allocate or grow the reg_equiv tables, initializing new entries to 0. */
464 1.3 mrg extern void grow_reg_equivs (void);
465 1.5 mrg
466 1.5 mrg #endif /* GCC_RELOAD_H */
467