reload.h revision 1.3 1 1.1 mrg /* Communication between reload.c, reload1.c and the rest of compiler.
2 1.3 mrg Copyright (C) 1987-2013 Free Software Foundation, Inc.
3 1.1 mrg
4 1.1 mrg This file is part of GCC.
5 1.1 mrg
6 1.1 mrg GCC is free software; you can redistribute it and/or modify it under
7 1.1 mrg the terms of the GNU General Public License as published by the Free
8 1.1 mrg Software Foundation; either version 3, or (at your option) any later
9 1.1 mrg version.
10 1.1 mrg
11 1.1 mrg GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 1.1 mrg WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 1.1 mrg FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 1.1 mrg for more details.
15 1.1 mrg
16 1.1 mrg You should have received a copy of the GNU General Public License
17 1.1 mrg along with GCC; see the file COPYING3. If not see
18 1.1 mrg <http://www.gnu.org/licenses/>. */
19 1.1 mrg
20 1.1 mrg
21 1.1 mrg /* If secondary reloads are the same for inputs and outputs, define those
22 1.1 mrg macros here. */
23 1.1 mrg
24 1.1 mrg #ifdef SECONDARY_RELOAD_CLASS
25 1.1 mrg #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
26 1.1 mrg SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
27 1.1 mrg #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
28 1.1 mrg SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
29 1.1 mrg #endif
30 1.1 mrg
31 1.3 mrg extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
32 1.3 mrg extern int memory_move_cost (enum machine_mode, reg_class_t, bool);
33 1.3 mrg extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
34 1.1 mrg
35 1.1 mrg /* Maximum number of reloads we can need. */
36 1.1 mrg #define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
37 1.1 mrg
38 1.1 mrg /* Encode the usage of a reload. The following codes are supported:
39 1.1 mrg
40 1.1 mrg RELOAD_FOR_INPUT reload of an input operand
41 1.1 mrg RELOAD_FOR_OUTPUT likewise, for output
42 1.1 mrg RELOAD_FOR_INSN a reload that must not conflict with anything
43 1.1 mrg used in the insn, but may conflict with
44 1.1 mrg something used before or after the insn
45 1.1 mrg RELOAD_FOR_INPUT_ADDRESS reload for parts of the address of an object
46 1.1 mrg that is an input reload
47 1.1 mrg RELOAD_FOR_INPADDR_ADDRESS reload needed for RELOAD_FOR_INPUT_ADDRESS
48 1.1 mrg RELOAD_FOR_OUTPUT_ADDRESS like RELOAD_FOR INPUT_ADDRESS, for output
49 1.1 mrg RELOAD_FOR_OUTADDR_ADDRESS reload needed for RELOAD_FOR_OUTPUT_ADDRESS
50 1.1 mrg RELOAD_FOR_OPERAND_ADDRESS reload for the address of a non-reloaded
51 1.1 mrg operand; these don't conflict with
52 1.1 mrg any other addresses.
53 1.1 mrg RELOAD_FOR_OPADDR_ADDR reload needed for RELOAD_FOR_OPERAND_ADDRESS
54 1.1 mrg reloads; usually secondary reloads
55 1.1 mrg RELOAD_OTHER none of the above, usually multiple uses
56 1.1 mrg RELOAD_FOR_OTHER_ADDRESS reload for part of the address of an input
57 1.1 mrg that is marked RELOAD_OTHER.
58 1.1 mrg
59 1.1 mrg This used to be "enum reload_when_needed" but some debuggers have trouble
60 1.1 mrg with an enum tag and variable of the same name. */
61 1.1 mrg
62 1.1 mrg enum reload_type
63 1.1 mrg {
64 1.1 mrg RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
65 1.1 mrg RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
66 1.1 mrg RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
67 1.1 mrg RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
68 1.1 mrg RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
69 1.1 mrg };
70 1.1 mrg
71 1.1 mrg #ifdef GCC_INSN_CODES_H
72 1.1 mrg /* Each reload is recorded with a structure like this. */
73 1.1 mrg struct reload
74 1.1 mrg {
75 1.1 mrg /* The value to reload from */
76 1.1 mrg rtx in;
77 1.1 mrg /* Where to store reload-reg afterward if nec (often the same as
78 1.1 mrg reload_in) */
79 1.1 mrg rtx out;
80 1.1 mrg
81 1.1 mrg /* The class of registers to reload into. */
82 1.1 mrg enum reg_class rclass;
83 1.1 mrg
84 1.1 mrg /* The mode this operand should have when reloaded, on input. */
85 1.1 mrg enum machine_mode inmode;
86 1.1 mrg /* The mode this operand should have when reloaded, on output. */
87 1.1 mrg enum machine_mode outmode;
88 1.1 mrg
89 1.1 mrg /* The mode of the reload register. */
90 1.1 mrg enum machine_mode mode;
91 1.1 mrg
92 1.1 mrg /* the largest number of registers this reload will require. */
93 1.1 mrg unsigned int nregs;
94 1.1 mrg
95 1.1 mrg /* Positive amount to increment or decrement by if
96 1.1 mrg reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
97 1.1 mrg Ignored otherwise (don't assume it is zero). */
98 1.1 mrg int inc;
99 1.1 mrg /* A reg for which reload_in is the equivalent.
100 1.1 mrg If reload_in is a symbol_ref which came from
101 1.1 mrg reg_equiv_constant, then this is the pseudo
102 1.1 mrg which has that symbol_ref as equivalent. */
103 1.1 mrg rtx in_reg;
104 1.1 mrg rtx out_reg;
105 1.1 mrg
106 1.1 mrg /* Used in find_reload_regs to record the allocated register. */
107 1.1 mrg int regno;
108 1.1 mrg /* This is the register to reload into. If it is zero when `find_reloads'
109 1.1 mrg returns, you must find a suitable register in the class specified by
110 1.1 mrg reload_reg_class, and store here an rtx for that register with mode from
111 1.1 mrg reload_inmode or reload_outmode. */
112 1.1 mrg rtx reg_rtx;
113 1.1 mrg /* The operand number being reloaded. This is used to group related reloads
114 1.1 mrg and need not always be equal to the actual operand number in the insn,
115 1.1 mrg though it current will be; for in-out operands, it is one of the two
116 1.1 mrg operand numbers. */
117 1.1 mrg int opnum;
118 1.1 mrg
119 1.1 mrg /* Gives the reload number of a secondary input reload, when needed;
120 1.1 mrg otherwise -1. */
121 1.1 mrg int secondary_in_reload;
122 1.1 mrg /* Gives the reload number of a secondary output reload, when needed;
123 1.1 mrg otherwise -1. */
124 1.1 mrg int secondary_out_reload;
125 1.1 mrg /* If a secondary input reload is required, gives the INSN_CODE that uses the
126 1.1 mrg secondary reload as a scratch register, or CODE_FOR_nothing if the
127 1.1 mrg secondary reload register is to be an intermediate register. */
128 1.1 mrg enum insn_code secondary_in_icode;
129 1.1 mrg /* Likewise, for a secondary output reload. */
130 1.1 mrg enum insn_code secondary_out_icode;
131 1.1 mrg
132 1.1 mrg /* Classifies reload as needed either for addressing an input reload,
133 1.1 mrg addressing an output, for addressing a non-reloaded mem ref, or for
134 1.1 mrg unspecified purposes (i.e., more than one of the above). */
135 1.1 mrg enum reload_type when_needed;
136 1.1 mrg
137 1.1 mrg /* Nonzero for an optional reload. Optional reloads are ignored unless the
138 1.1 mrg value is already sitting in a register. */
139 1.1 mrg unsigned int optional:1;
140 1.1 mrg /* nonzero if this reload shouldn't be combined with another reload. */
141 1.1 mrg unsigned int nocombine:1;
142 1.1 mrg /* Nonzero if this is a secondary register for one or more reloads. */
143 1.1 mrg unsigned int secondary_p:1;
144 1.1 mrg /* Nonzero if this reload must use a register not already allocated to a
145 1.1 mrg group. */
146 1.1 mrg unsigned int nongroup:1;
147 1.1 mrg };
148 1.1 mrg
149 1.1 mrg extern struct reload rld[MAX_RELOADS];
150 1.1 mrg extern int n_reloads;
151 1.1 mrg #endif
152 1.1 mrg
153 1.3 mrg /* Target-dependent globals. */
154 1.3 mrg struct target_reload {
155 1.3 mrg /* Nonzero if indirect addressing is supported when the innermost MEM is
156 1.3 mrg of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to
157 1.3 mrg which these are valid is the same as spill_indirect_levels, above. */
158 1.3 mrg bool x_indirect_symref_ok;
159 1.3 mrg
160 1.3 mrg /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid. */
161 1.3 mrg bool x_double_reg_address_ok;
162 1.3 mrg
163 1.3 mrg /* Nonzero if indirect addressing is supported on the machine; this means
164 1.3 mrg that spilling (REG n) does not require reloading it into a register in
165 1.3 mrg order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The
166 1.3 mrg value indicates the level of indirect addressing supported, e.g., two
167 1.3 mrg means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
168 1.3 mrg a hard register. */
169 1.3 mrg bool x_spill_indirect_levels;
170 1.3 mrg
171 1.3 mrg /* True if caller-save has been reinitialized. */
172 1.3 mrg bool x_caller_save_initialized_p;
173 1.3 mrg
174 1.3 mrg /* Modes for each hard register that we can save. The smallest mode is wide
175 1.3 mrg enough to save the entire contents of the register. When saving the
176 1.3 mrg register because it is live we first try to save in multi-register modes.
177 1.3 mrg If that is not possible the save is done one register at a time. */
178 1.3 mrg enum machine_mode (x_regno_save_mode
179 1.3 mrg [FIRST_PSEUDO_REGISTER]
180 1.3 mrg [MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
181 1.3 mrg
182 1.3 mrg /* We will only make a register eligible for caller-save if it can be
183 1.3 mrg saved in its widest mode with a simple SET insn as long as the memory
184 1.3 mrg address is valid. We record the INSN_CODE is those insns here since
185 1.3 mrg when we emit them, the addresses might not be valid, so they might not
186 1.3 mrg be recognized. */
187 1.3 mrg int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
188 1.3 mrg int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
189 1.3 mrg };
190 1.3 mrg
191 1.3 mrg extern struct target_reload default_target_reload;
192 1.3 mrg #if SWITCHABLE_TARGET
193 1.3 mrg extern struct target_reload *this_target_reload;
194 1.3 mrg #else
195 1.3 mrg #define this_target_reload (&default_target_reload)
196 1.3 mrg #endif
197 1.3 mrg
198 1.3 mrg #define indirect_symref_ok \
199 1.3 mrg (this_target_reload->x_indirect_symref_ok)
200 1.3 mrg #define double_reg_address_ok \
201 1.3 mrg (this_target_reload->x_double_reg_address_ok)
202 1.3 mrg #define caller_save_initialized_p \
203 1.3 mrg (this_target_reload->x_caller_save_initialized_p)
204 1.3 mrg
205 1.3 mrg /* Register equivalences. Indexed by register number. */
206 1.3 mrg typedef struct reg_equivs
207 1.3 mrg {
208 1.3 mrg /* The constant value to which pseudo reg N is equivalent,
209 1.3 mrg or zero if pseudo reg N is not equivalent to a constant.
210 1.3 mrg find_reloads looks at this in order to replace pseudo reg N
211 1.3 mrg with the constant it stands for. */
212 1.3 mrg rtx constant;
213 1.3 mrg
214 1.3 mrg /* An invariant value to which pseudo reg N is equivalent.
215 1.3 mrg eliminate_regs_in_insn uses this to replace pseudos in particular
216 1.3 mrg contexts. */
217 1.3 mrg rtx invariant;
218 1.3 mrg
219 1.3 mrg /* A memory location to which pseudo reg N is equivalent,
220 1.3 mrg prior to any register elimination (such as frame pointer to stack
221 1.3 mrg pointer). Depending on whether or not it is a valid address, this value
222 1.3 mrg is transferred to either equiv_address or equiv_mem. */
223 1.3 mrg rtx memory_loc;
224 1.3 mrg
225 1.3 mrg /* The address of stack slot to which pseudo reg N is equivalent.
226 1.3 mrg This is used when the address is not valid as a memory address
227 1.3 mrg (because its displacement is too big for the machine.) */
228 1.3 mrg rtx address;
229 1.3 mrg
230 1.3 mrg /* The memory slot to which pseudo reg N is equivalent,
231 1.3 mrg or zero if pseudo reg N is not equivalent to a memory slot. */
232 1.3 mrg rtx mem;
233 1.3 mrg
234 1.3 mrg /* An EXPR_LIST of REG_EQUIVs containing MEMs with
235 1.3 mrg alternate representations of the location of pseudo reg N. */
236 1.3 mrg rtx alt_mem_list;
237 1.3 mrg
238 1.3 mrg /* The list of insns that initialized reg N from its equivalent
239 1.3 mrg constant or memory slot. */
240 1.3 mrg rtx init;
241 1.3 mrg } reg_equivs_t;
242 1.3 mrg
243 1.3 mrg #define reg_equiv_constant(ELT) \
244 1.3 mrg (*reg_equivs)[(ELT)].constant
245 1.3 mrg #define reg_equiv_invariant(ELT) \
246 1.3 mrg (*reg_equivs)[(ELT)].invariant
247 1.3 mrg #define reg_equiv_memory_loc(ELT) \
248 1.3 mrg (*reg_equivs)[(ELT)].memory_loc
249 1.3 mrg #define reg_equiv_address(ELT) \
250 1.3 mrg (*reg_equivs)[(ELT)].address
251 1.3 mrg #define reg_equiv_mem(ELT) \
252 1.3 mrg (*reg_equivs)[(ELT)].mem
253 1.3 mrg #define reg_equiv_alt_mem_list(ELT) \
254 1.3 mrg (*reg_equivs)[(ELT)].alt_mem_list
255 1.3 mrg #define reg_equiv_init(ELT) \
256 1.3 mrg (*reg_equivs)[(ELT)].init
257 1.1 mrg
258 1.3 mrg extern vec<reg_equivs_t, va_gc> *reg_equivs;
259 1.1 mrg
260 1.1 mrg /* All the "earlyclobber" operands of the current insn
261 1.1 mrg are recorded here. */
262 1.1 mrg extern int n_earlyclobbers;
263 1.1 mrg extern rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
264 1.1 mrg
265 1.1 mrg /* Save the number of operands. */
266 1.1 mrg extern int reload_n_operands;
267 1.1 mrg
268 1.1 mrg /* First uid used by insns created by reload in this function.
269 1.1 mrg Used in find_equiv_reg. */
270 1.1 mrg extern int reload_first_uid;
271 1.1 mrg
272 1.1 mrg extern int num_not_at_initial_offset;
273 1.1 mrg
274 1.1 mrg #if defined SET_HARD_REG_BIT && defined CLEAR_REG_SET
275 1.1 mrg /* This structure describes instructions which are relevant for reload.
276 1.1 mrg Apart from all regular insns, this also includes CODE_LABELs, since they
277 1.1 mrg must be examined for register elimination. */
278 1.1 mrg struct insn_chain
279 1.1 mrg {
280 1.1 mrg /* Links to the neighbor instructions. */
281 1.1 mrg struct insn_chain *next, *prev;
282 1.1 mrg
283 1.1 mrg /* Link through a chains set up by calculate_needs_all_insns, containing
284 1.1 mrg all insns that need reloading. */
285 1.1 mrg struct insn_chain *next_need_reload;
286 1.1 mrg
287 1.1 mrg /* The rtx of the insn. */
288 1.1 mrg rtx insn;
289 1.1 mrg
290 1.1 mrg /* The basic block this insn is in. */
291 1.1 mrg int block;
292 1.1 mrg
293 1.1 mrg /* Nonzero if find_reloads said the insn requires reloading. */
294 1.1 mrg unsigned int need_reload:1;
295 1.1 mrg /* Nonzero if find_reloads needs to be run during reload_as_needed to
296 1.1 mrg perform modifications on any operands. */
297 1.1 mrg unsigned int need_operand_change:1;
298 1.1 mrg /* Nonzero if eliminate_regs_in_insn said it requires eliminations. */
299 1.1 mrg unsigned int need_elim:1;
300 1.1 mrg /* Nonzero if this insn was inserted by perform_caller_saves. */
301 1.1 mrg unsigned int is_caller_save_insn:1;
302 1.1 mrg
303 1.1 mrg /* Register life information: record all live hard registers, and
304 1.1 mrg all live pseudos that have a hard register. This set also
305 1.1 mrg contains pseudos spilled by IRA. */
306 1.3 mrg bitmap_head live_throughout;
307 1.3 mrg bitmap_head dead_or_set;
308 1.1 mrg
309 1.1 mrg /* Copies of the global variables computed by find_reloads. */
310 1.1 mrg struct reload *rld;
311 1.1 mrg int n_reloads;
312 1.1 mrg
313 1.1 mrg /* Indicates which registers have already been used for spills. */
314 1.1 mrg HARD_REG_SET used_spill_regs;
315 1.1 mrg };
316 1.1 mrg
317 1.1 mrg /* A chain of insn_chain structures to describe all non-note insns in
318 1.1 mrg a function. */
319 1.1 mrg extern struct insn_chain *reload_insn_chain;
320 1.1 mrg
321 1.1 mrg /* Allocate a new insn_chain structure. */
322 1.1 mrg extern struct insn_chain *new_insn_chain (void);
323 1.3 mrg #endif
324 1.1 mrg
325 1.3 mrg #if defined SET_HARD_REG_BIT
326 1.3 mrg extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
327 1.1 mrg #endif
328 1.1 mrg
329 1.1 mrg /* Functions from reload.c: */
330 1.1 mrg
331 1.3 mrg extern reg_class_t secondary_reload_class (bool, reg_class_t,
332 1.3 mrg enum machine_mode, rtx);
333 1.1 mrg
334 1.1 mrg #ifdef GCC_INSN_CODES_H
335 1.1 mrg extern enum reg_class scratch_reload_class (enum insn_code);
336 1.1 mrg #endif
337 1.1 mrg
338 1.1 mrg /* Return a memory location that will be used to copy X in mode MODE.
339 1.1 mrg If we haven't already made a location for this mode in this insn,
340 1.1 mrg call find_reloads_address on the location being returned. */
341 1.1 mrg extern rtx get_secondary_mem (rtx, enum machine_mode, int, enum reload_type);
342 1.1 mrg
343 1.1 mrg /* Clear any secondary memory locations we've made. */
344 1.1 mrg extern void clear_secondary_mem (void);
345 1.1 mrg
346 1.1 mrg /* Transfer all replacements that used to be in reload FROM to be in
347 1.1 mrg reload TO. */
348 1.1 mrg extern void transfer_replacements (int, int);
349 1.1 mrg
350 1.1 mrg /* IN_RTX is the value loaded by a reload that we now decided to inherit,
351 1.1 mrg or a subpart of it. If we have any replacements registered for IN_RTX,
352 1.1 mrg cancel the reloads that were supposed to load them.
353 1.1 mrg Return nonzero if we canceled any reloads. */
354 1.1 mrg extern int remove_address_replacements (rtx in_rtx);
355 1.1 mrg
356 1.1 mrg /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
357 1.1 mrg if they are the same hard reg, and has special hacks for
358 1.1 mrg autoincrement and autodecrement. */
359 1.1 mrg extern int operands_match_p (rtx, rtx);
360 1.1 mrg
361 1.1 mrg /* Return 1 if altering OP will not modify the value of CLOBBER. */
362 1.1 mrg extern int safe_from_earlyclobber (rtx, rtx);
363 1.1 mrg
364 1.1 mrg /* Search the body of INSN for values that need reloading and record them
365 1.1 mrg with push_reload. REPLACE nonzero means record also where the values occur
366 1.1 mrg so that subst_reloads can be used. */
367 1.1 mrg extern int find_reloads (rtx, int, int, int, short *);
368 1.1 mrg
369 1.1 mrg /* Compute the sum of X and Y, making canonicalizations assumed in an
370 1.1 mrg address, namely: sum constant integers, surround the sum of two
371 1.1 mrg constants with a CONST, put the constant as the second operand, and
372 1.1 mrg group the constant on the outermost sum. */
373 1.1 mrg extern rtx form_sum (enum machine_mode, rtx, rtx);
374 1.1 mrg
375 1.1 mrg /* Substitute into the current INSN the registers into which we have reloaded
376 1.1 mrg the things that need reloading. */
377 1.1 mrg extern void subst_reloads (rtx);
378 1.1 mrg
379 1.1 mrg /* Make a copy of any replacements being done into X and move those copies
380 1.1 mrg to locations in Y, a copy of X. We only look at the highest level of
381 1.1 mrg the RTL. */
382 1.1 mrg extern void copy_replacements (rtx, rtx);
383 1.1 mrg
384 1.1 mrg /* Change any replacements being done to *X to be done to *Y */
385 1.1 mrg extern void move_replacements (rtx *x, rtx *y);
386 1.1 mrg
387 1.1 mrg /* If LOC was scheduled to be replaced by something, return the replacement.
388 1.1 mrg Otherwise, return *LOC. */
389 1.1 mrg extern rtx find_replacement (rtx *);
390 1.1 mrg
391 1.1 mrg /* Nonzero if modifying X will affect IN. */
392 1.1 mrg extern int reg_overlap_mentioned_for_reload_p (rtx, rtx);
393 1.1 mrg
394 1.1 mrg /* Check the insns before INSN to see if there is a suitable register
395 1.1 mrg containing the same value as GOAL. */
396 1.1 mrg extern rtx find_equiv_reg (rtx, rtx, enum reg_class, int, short *,
397 1.1 mrg int, enum machine_mode);
398 1.1 mrg
399 1.1 mrg /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
400 1.1 mrg extern int regno_clobbered_p (unsigned int, rtx, enum machine_mode, int);
401 1.1 mrg
402 1.1 mrg /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
403 1.1 mrg extern int earlyclobber_operand_p (rtx);
404 1.1 mrg
405 1.1 mrg /* Record one reload that needs to be performed. */
406 1.1 mrg extern int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class,
407 1.1 mrg enum machine_mode, enum machine_mode,
408 1.1 mrg int, int, int, enum reload_type);
409 1.1 mrg
410 1.1 mrg /* Functions in reload1.c: */
411 1.1 mrg
412 1.1 mrg /* Initialize the reload pass once per compilation. */
413 1.1 mrg extern void init_reload (void);
414 1.1 mrg
415 1.1 mrg /* The reload pass itself. */
416 1.3 mrg extern bool reload (rtx, int);
417 1.1 mrg
418 1.1 mrg /* Mark the slots in regs_ever_live for the hard regs
419 1.1 mrg used by pseudo-reg number REGNO. */
420 1.1 mrg extern void mark_home_live (int);
421 1.1 mrg
422 1.1 mrg /* Scan X and replace any eliminable registers (such as fp) with a
423 1.1 mrg replacement (such as sp), plus an offset. */
424 1.1 mrg extern rtx eliminate_regs (rtx, enum machine_mode, rtx);
425 1.1 mrg extern bool elimination_target_reg_p (rtx);
426 1.1 mrg
427 1.3 mrg /* Called from the register allocator to estimate costs of eliminating
428 1.3 mrg invariant registers. */
429 1.3 mrg extern void calculate_elim_costs_all_insns (void);
430 1.3 mrg
431 1.1 mrg /* Deallocate the reload register used by reload number R. */
432 1.1 mrg extern void deallocate_reload_reg (int r);
433 1.1 mrg
434 1.1 mrg /* Functions in caller-save.c: */
435 1.1 mrg
436 1.1 mrg /* Initialize for caller-save. */
437 1.1 mrg extern void init_caller_save (void);
438 1.1 mrg
439 1.1 mrg /* Initialize save areas by showing that we haven't allocated any yet. */
440 1.1 mrg extern void init_save_areas (void);
441 1.1 mrg
442 1.1 mrg /* Allocate save areas for any hard registers that might need saving. */
443 1.1 mrg extern void setup_save_areas (void);
444 1.1 mrg
445 1.1 mrg /* Find the places where hard regs are live across calls and save them. */
446 1.1 mrg extern void save_call_clobbered_regs (void);
447 1.1 mrg
448 1.1 mrg /* Replace (subreg (reg)) with the appropriate (reg) for any operands. */
449 1.1 mrg extern void cleanup_subreg_operands (rtx);
450 1.1 mrg
451 1.1 mrg /* Debugging support. */
452 1.1 mrg extern void debug_reload_to_stream (FILE *);
453 1.1 mrg extern void debug_reload (void);
454 1.1 mrg
455 1.1 mrg /* Compute the actual register we should reload to, in case we're
456 1.1 mrg reloading to/from a register that is wider than a word. */
457 1.1 mrg extern rtx reload_adjust_reg_for_mode (rtx, enum machine_mode);
458 1.3 mrg
459 1.3 mrg /* Allocate or grow the reg_equiv tables, initializing new entries to 0. */
460 1.3 mrg extern void grow_reg_equivs (void);
461