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reload.h revision 1.12
      1 /* Communication between reload.cc, reload1.cc and the rest of compiler.
      2    Copyright (C) 1987-2022 Free Software Foundation, Inc.
      3 
      4 This file is part of GCC.
      5 
      6 GCC is free software; you can redistribute it and/or modify it under
      7 the terms of the GNU General Public License as published by the Free
      8 Software Foundation; either version 3, or (at your option) any later
      9 version.
     10 
     11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
     12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
     13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
     14 for more details.
     15 
     16 You should have received a copy of the GNU General Public License
     17 along with GCC; see the file COPYING3.  If not see
     18 <http://www.gnu.org/licenses/>.  */
     19 
     20 #ifndef GCC_RELOAD_H
     21 #define GCC_RELOAD_H
     22 
     23 /* If secondary reloads are the same for inputs and outputs, define those
     24    macros here.  */
     25 
     26 #ifdef SECONDARY_RELOAD_CLASS
     27 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
     28   SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
     29 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
     30   SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
     31 #endif
     32 
     33 extern int register_move_cost (machine_mode, reg_class_t, reg_class_t);
     34 extern int memory_move_cost (machine_mode, reg_class_t, bool);
     35 extern int memory_move_secondary_cost (machine_mode, reg_class_t, bool);
     36 
     37 /* Maximum number of reloads we can need.  */
     38 #define MAX_RELOADS (2 * MAX_RECOG_OPERANDS * (MAX_REGS_PER_ADDRESS + 1))
     39 
     40 /* Encode the usage of a reload.  The following codes are supported:
     41 
     42    RELOAD_FOR_INPUT		reload of an input operand
     43    RELOAD_FOR_OUTPUT		likewise, for output
     44    RELOAD_FOR_INSN		a reload that must not conflict with anything
     45 				used in the insn, but may conflict with
     46 				something used before or after the insn
     47    RELOAD_FOR_INPUT_ADDRESS	reload for parts of the address of an object
     48 				that is an input reload
     49    RELOAD_FOR_INPADDR_ADDRESS	reload needed for RELOAD_FOR_INPUT_ADDRESS
     50    RELOAD_FOR_OUTPUT_ADDRESS	like RELOAD_FOR INPUT_ADDRESS, for output
     51    RELOAD_FOR_OUTADDR_ADDRESS	reload needed for RELOAD_FOR_OUTPUT_ADDRESS
     52    RELOAD_FOR_OPERAND_ADDRESS	reload for the address of a non-reloaded
     53 				operand; these don't conflict with
     54 				any other addresses.
     55    RELOAD_FOR_OPADDR_ADDR	reload needed for RELOAD_FOR_OPERAND_ADDRESS
     56                                 reloads; usually secondary reloads
     57    RELOAD_OTHER			none of the above, usually multiple uses
     58    RELOAD_FOR_OTHER_ADDRESS     reload for part of the address of an input
     59 				that is marked RELOAD_OTHER.
     60 
     61    This used to be "enum reload_when_needed" but some debuggers have trouble
     62    with an enum tag and variable of the same name.  */
     63 
     64 enum reload_type
     65 {
     66   RELOAD_FOR_INPUT, RELOAD_FOR_OUTPUT, RELOAD_FOR_INSN,
     67   RELOAD_FOR_INPUT_ADDRESS, RELOAD_FOR_INPADDR_ADDRESS,
     68   RELOAD_FOR_OUTPUT_ADDRESS, RELOAD_FOR_OUTADDR_ADDRESS,
     69   RELOAD_FOR_OPERAND_ADDRESS, RELOAD_FOR_OPADDR_ADDR,
     70   RELOAD_OTHER, RELOAD_FOR_OTHER_ADDRESS
     71 };
     72 
     73 #ifdef GCC_INSN_CODES_H
     74 /* Each reload is recorded with a structure like this.  */
     75 struct reload
     76 {
     77   /* The value to reload from */
     78   rtx in;
     79   /* Where to store reload-reg afterward if nec (often the same as
     80      reload_in)  */
     81   rtx out;
     82 
     83   /* The class of registers to reload into.  */
     84   enum reg_class rclass;
     85 
     86   /* The mode this operand should have when reloaded, on input.  */
     87   machine_mode inmode;
     88   /* The mode this operand should have when reloaded, on output.  */
     89   machine_mode outmode;
     90 
     91   /* The mode of the reload register.  */
     92   machine_mode mode;
     93 
     94   /* the largest number of registers this reload will require.  */
     95   unsigned int nregs;
     96 
     97   /* Positive amount to increment or decrement by if
     98      reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
     99      Ignored otherwise (don't assume it is zero).  */
    100   poly_int64_pod inc;
    101   /* A reg for which reload_in is the equivalent.
    102      If reload_in is a symbol_ref which came from
    103      reg_equiv_constant, then this is the pseudo
    104      which has that symbol_ref as equivalent.  */
    105   rtx in_reg;
    106   rtx out_reg;
    107 
    108   /* Used in find_reload_regs to record the allocated register.  */
    109   int regno;
    110   /* This is the register to reload into.  If it is zero when `find_reloads'
    111      returns, you must find a suitable register in the class specified by
    112      reload_reg_class, and store here an rtx for that register with mode from
    113      reload_inmode or reload_outmode.  */
    114   rtx reg_rtx;
    115   /* The operand number being reloaded.  This is used to group related reloads
    116      and need not always be equal to the actual operand number in the insn,
    117      though it current will be; for in-out operands, it is one of the two
    118      operand numbers.  */
    119   int opnum;
    120 
    121   /* Gives the reload number of a secondary input reload, when needed;
    122      otherwise -1.  */
    123   int secondary_in_reload;
    124   /* Gives the reload number of a secondary output reload, when needed;
    125      otherwise -1.  */
    126   int secondary_out_reload;
    127   /* If a secondary input reload is required, gives the INSN_CODE that uses the
    128      secondary reload as a scratch register, or CODE_FOR_nothing if the
    129      secondary reload register is to be an intermediate register.  */
    130   enum insn_code secondary_in_icode;
    131   /* Likewise, for a secondary output reload.  */
    132   enum insn_code secondary_out_icode;
    133 
    134   /* Classifies reload as needed either for addressing an input reload,
    135      addressing an output, for addressing a non-reloaded mem ref, or for
    136      unspecified purposes (i.e., more than one of the above).  */
    137   enum reload_type when_needed;
    138 
    139   /* Nonzero for an optional reload.  Optional reloads are ignored unless the
    140      value is already sitting in a register.  */
    141   unsigned int optional:1;
    142   /* nonzero if this reload shouldn't be combined with another reload.  */
    143   unsigned int nocombine:1;
    144   /* Nonzero if this is a secondary register for one or more reloads.  */
    145   unsigned int secondary_p:1;
    146   /* Nonzero if this reload must use a register not already allocated to a
    147      group.  */
    148   unsigned int nongroup:1;
    149 };
    150 
    151 extern struct reload rld[MAX_RELOADS];
    152 extern int n_reloads;
    153 #endif
    154 
    155 /* Target-dependent globals.  */
    156 struct target_reload {
    157   /* Nonzero if indirect addressing is supported when the innermost MEM is
    158      of the form (MEM (SYMBOL_REF sym)).  It is assumed that the level to
    159      which these are valid is the same as spill_indirect_levels, above.  */
    160   bool x_indirect_symref_ok;
    161 
    162   /* Nonzero if indirect addressing is supported on the machine; this means
    163      that spilling (REG n) does not require reloading it into a register in
    164      order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))).  The
    165      value indicates the level of indirect addressing supported, e.g., two
    166      means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
    167      a hard register.  */
    168   unsigned char x_spill_indirect_levels;
    169 
    170   /* True if caller-save has been reinitialized.  */
    171   bool x_caller_save_initialized_p;
    172 
    173   /* Modes for each hard register that we can save.  The smallest mode is wide
    174      enough to save the entire contents of the register.  When saving the
    175      register because it is live we first try to save in multi-register modes.
    176      If that is not possible the save is done one register at a time.  */
    177   machine_mode (x_regno_save_mode
    178 		     [FIRST_PSEUDO_REGISTER]
    179 		     [MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]);
    180 
    181   /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid
    182      in the given mode.  */
    183   bool x_double_reg_address_ok[MAX_MACHINE_MODE];
    184 
    185   /* We will only make a register eligible for caller-save if it can be
    186      saved in its widest mode with a simple SET insn as long as the memory
    187      address is valid.  We record the INSN_CODE is those insns here since
    188      when we emit them, the addresses might not be valid, so they might not
    189      be recognized.  */
    190   int x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
    191   int x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
    192 };
    193 
    194 extern struct target_reload default_target_reload;
    195 #if SWITCHABLE_TARGET
    196 extern struct target_reload *this_target_reload;
    197 #else
    198 #define this_target_reload (&default_target_reload)
    199 #endif
    200 
    201 #define indirect_symref_ok \
    202   (this_target_reload->x_indirect_symref_ok)
    203 #define double_reg_address_ok \
    204   (this_target_reload->x_double_reg_address_ok)
    205 #define caller_save_initialized_p \
    206   (this_target_reload->x_caller_save_initialized_p)
    207 
    208 /* Register equivalences.  Indexed by register number.  */
    209 struct reg_equivs_t
    210 {
    211   /* The constant value to which pseudo reg N is equivalent,
    212      or zero if pseudo reg N is not equivalent to a constant.
    213      find_reloads looks at this in order to replace pseudo reg N
    214      with the constant it stands for.  */
    215   rtx constant;
    216 
    217   /* An invariant value to which pseudo reg N is equivalent.
    218      eliminate_regs_in_insn uses this to replace pseudos in particular
    219      contexts.  */
    220   rtx invariant;
    221 
    222   /* A memory location to which pseudo reg N is equivalent,
    223      prior to any register elimination (such as frame pointer to stack
    224      pointer).  Depending on whether or not it is a valid address, this value
    225      is transferred to either equiv_address or equiv_mem.  */
    226   rtx memory_loc;
    227 
    228   /* The address of stack slot to which pseudo reg N is equivalent.
    229      This is used when the address is not valid as a memory address
    230      (because its displacement is too big for the machine.)  */
    231   rtx address;
    232 
    233   /* The memory slot to which pseudo reg N is equivalent,
    234      or zero if pseudo reg N is not equivalent to a memory slot.  */
    235   rtx mem;
    236 
    237   /* An EXPR_LIST of REG_EQUIVs containing MEMs with
    238      alternate representations of the location of pseudo reg N.  */
    239   rtx_expr_list *alt_mem_list;
    240 
    241   /* The list of insns that initialized reg N from its equivalent
    242      constant or memory slot.  */
    243   rtx_insn_list *init;
    244 };
    245 
    246 #define reg_equiv_constant(ELT) \
    247   (*reg_equivs)[(ELT)].constant
    248 #define reg_equiv_invariant(ELT) \
    249   (*reg_equivs)[(ELT)].invariant
    250 #define reg_equiv_memory_loc(ELT) \
    251   (*reg_equivs)[(ELT)].memory_loc
    252 #define reg_equiv_address(ELT) \
    253   (*reg_equivs)[(ELT)].address
    254 #define reg_equiv_mem(ELT) \
    255   (*reg_equivs)[(ELT)].mem
    256 #define reg_equiv_alt_mem_list(ELT) \
    257   (*reg_equivs)[(ELT)].alt_mem_list
    258 #define reg_equiv_init(ELT) \
    259   (*reg_equivs)[(ELT)].init
    260 
    261 extern vec<reg_equivs_t, va_gc> *reg_equivs;
    262 
    263 /* All the "earlyclobber" operands of the current insn
    264    are recorded here.  */
    265 extern int n_earlyclobbers;
    266 extern rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
    267 
    268 /* Save the number of operands.  */
    269 extern int reload_n_operands;
    270 
    271 /* First uid used by insns created by reload in this function.
    272    Used in find_equiv_reg.  */
    273 extern int reload_first_uid;
    274 
    275 extern int num_not_at_initial_offset;
    276 
    277 #if defined HARD_CONST && defined CLEAR_REG_SET
    278 /* This structure describes instructions which are relevant for reload.
    279    Apart from all regular insns, this also includes CODE_LABELs, since they
    280    must be examined for register elimination.  */
    281 class insn_chain
    282 {
    283 public:
    284   /* Links to the neighbor instructions.  */
    285   class insn_chain *next, *prev;
    286 
    287   /* Link through a chains set up by calculate_needs_all_insns, containing
    288      all insns that need reloading.  */
    289   class insn_chain *next_need_reload;
    290 
    291   /* The rtx of the insn.  */
    292   rtx_insn *insn;
    293 
    294   /* The basic block this insn is in.  */
    295   int block;
    296 
    297   /* Nonzero if find_reloads said the insn requires reloading.  */
    298   unsigned int need_reload:1;
    299   /* Nonzero if find_reloads needs to be run during reload_as_needed to
    300      perform modifications on any operands.  */
    301   unsigned int need_operand_change:1;
    302   /* Nonzero if eliminate_regs_in_insn said it requires eliminations.  */
    303   unsigned int need_elim:1;
    304   /* Nonzero if this insn was inserted by perform_caller_saves.  */
    305   unsigned int is_caller_save_insn:1;
    306 
    307   /* Register life information: record all live hard registers, and
    308      all live pseudos that have a hard register.  This set also
    309      contains pseudos spilled by IRA.  */
    310   bitmap_head live_throughout;
    311   bitmap_head dead_or_set;
    312 
    313   /* Copies of the global variables computed by find_reloads.  */
    314   struct reload *rld;
    315   int n_reloads;
    316 
    317   /* Indicates which registers have already been used for spills.  */
    318   HARD_REG_SET used_spill_regs;
    319 };
    320 
    321 /* A chain of insn_chain structures to describe all non-note insns in
    322    a function.  */
    323 extern class insn_chain *reload_insn_chain;
    324 
    325 /* Allocate a new insn_chain structure.  */
    326 extern class insn_chain *new_insn_chain (void);
    327 #endif
    328 
    329 #if defined HARD_CONST
    330 extern void compute_use_by_pseudos (HARD_REG_SET *, bitmap);
    331 #endif
    332 
    333 /* Functions from reload.cc:  */
    334 
    335 extern reg_class_t secondary_reload_class (bool, reg_class_t,
    336 					   machine_mode, rtx);
    337 
    338 #ifdef GCC_INSN_CODES_H
    339 extern enum reg_class scratch_reload_class (enum insn_code);
    340 #endif
    341 
    342 /* Return a memory location that will be used to copy X in mode MODE.
    343    If we haven't already made a location for this mode in this insn,
    344    call find_reloads_address on the location being returned.  */
    345 extern rtx get_secondary_mem (rtx, machine_mode, int, enum reload_type);
    346 
    347 /* Clear any secondary memory locations we've made.  */
    348 extern void clear_secondary_mem (void);
    349 
    350 /* Transfer all replacements that used to be in reload FROM to be in
    351    reload TO.  */
    352 extern void transfer_replacements (int, int);
    353 
    354 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
    355    or a subpart of it.  If we have any replacements registered for IN_RTX,
    356    cancel the reloads that were supposed to load them.
    357    Return nonzero if we canceled any reloads.  */
    358 extern int remove_address_replacements (rtx in_rtx);
    359 
    360 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
    361    if they are the same hard reg, and has special hacks for
    362    autoincrement and autodecrement.  */
    363 extern int operands_match_p (rtx, rtx);
    364 
    365 /* Return 1 if altering OP will not modify the value of CLOBBER.  */
    366 extern int safe_from_earlyclobber (rtx, rtx);
    367 
    368 /* Search the body of INSN for values that need reloading and record them
    369    with push_reload.  REPLACE nonzero means record also where the values occur
    370    so that subst_reloads can be used.  */
    371 extern int find_reloads (rtx_insn *, int, int, int, short *);
    372 
    373 /* Compute the sum of X and Y, making canonicalizations assumed in an
    374    address, namely: sum constant integers, surround the sum of two
    375    constants with a CONST, put the constant as the second operand, and
    376    group the constant on the outermost sum.  */
    377 extern rtx form_sum (machine_mode, rtx, rtx);
    378 
    379 /* Substitute into the current INSN the registers into which we have reloaded
    380    the things that need reloading.  */
    381 extern void subst_reloads (rtx_insn *);
    382 
    383 /* Make a copy of any replacements being done into X and move those copies
    384    to locations in Y, a copy of X.  We only look at the highest level of
    385    the RTL.  */
    386 extern void copy_replacements (rtx, rtx);
    387 
    388 /* Change any replacements being done to *X to be done to *Y */
    389 extern void move_replacements (rtx *x, rtx *y);
    390 
    391 /* If LOC was scheduled to be replaced by something, return the replacement.
    392    Otherwise, return *LOC.  */
    393 extern rtx find_replacement (rtx *);
    394 
    395 /* Nonzero if modifying X will affect IN.  */
    396 extern int reg_overlap_mentioned_for_reload_p (rtx, rtx);
    397 
    398 /* Check the insns before INSN to see if there is a suitable register
    399    containing the same value as GOAL.  */
    400 extern rtx find_equiv_reg (rtx, rtx_insn *, enum reg_class, int, short *,
    401 			   int, machine_mode);
    402 
    403 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.  */
    404 extern int regno_clobbered_p (unsigned int, rtx_insn *, machine_mode, int);
    405 
    406 /* Return 1 if X is an operand of an insn that is being earlyclobbered.  */
    407 extern int earlyclobber_operand_p (rtx);
    408 
    409 /* Record one reload that needs to be performed.  */
    410 extern int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class,
    411 			machine_mode, machine_mode,
    412 			int, int, int, enum reload_type);
    413 
    414 /* Functions in reload1.cc:  */
    415 
    416 /* Initialize the reload pass once per compilation.  */
    417 extern void init_reload (void);
    418 
    419 /* The reload pass itself.  */
    420 extern bool reload (rtx_insn *, int);
    421 
    422 /* Mark the slots in regs_ever_live for the hard regs
    423    used by pseudo-reg number REGNO.  */
    424 extern void mark_home_live (int);
    425 
    426 /* Scan X and replace any eliminable registers (such as fp) with a
    427    replacement (such as sp), plus an offset.  */
    428 extern rtx eliminate_regs (rtx, machine_mode, rtx);
    429 extern bool elimination_target_reg_p (rtx);
    430 
    431 /* Called from the register allocator to estimate costs of eliminating
    432    invariant registers.  */
    433 extern void calculate_elim_costs_all_insns (void);
    434 
    435 /* Deallocate the reload register used by reload number R.  */
    436 extern void deallocate_reload_reg (int r);
    437 
    438 /* Functions in caller-save.cc:  */
    439 
    440 /* Initialize for caller-save.  */
    441 extern void init_caller_save (void);
    442 
    443 /* Initialize save areas by showing that we haven't allocated any yet.  */
    444 extern void init_save_areas (void);
    445 
    446 /* Allocate save areas for any hard registers that might need saving.  */
    447 extern void setup_save_areas (void);
    448 
    449 /* Find the places where hard regs are live across calls and save them.  */
    450 extern void save_call_clobbered_regs (void);
    451 
    452 /* Replace (subreg (reg)) with the appropriate (reg) for any operands.  */
    453 extern void cleanup_subreg_operands (rtx_insn *);
    454 
    455 /* Debugging support.  */
    456 extern void debug_reload_to_stream (FILE *);
    457 extern void debug_reload (void);
    458 
    459 /* Compute the actual register we should reload to, in case we're
    460    reloading to/from a register that is wider than a word.  */
    461 extern rtx reload_adjust_reg_for_mode (rtx, machine_mode);
    462 
    463 /* Allocate or grow the reg_equiv tables, initializing new entries to 0.  */
    464 extern void grow_reg_equivs (void);
    465 
    466 #endif /* GCC_RELOAD_H */
    467