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resource.cc revision 1.1
      1 /* Definitions for computing resource usage of specific insns.
      2    Copyright (C) 1999-2022 Free Software Foundation, Inc.
      3 
      4 This file is part of GCC.
      5 
      6 GCC is free software; you can redistribute it and/or modify it under
      7 the terms of the GNU General Public License as published by the Free
      8 Software Foundation; either version 3, or (at your option) any later
      9 version.
     10 
     11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
     12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
     13 FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
     14 for more details.
     15 
     16 You should have received a copy of the GNU General Public License
     17 along with GCC; see the file COPYING3.  If not see
     18 <http://www.gnu.org/licenses/>.  */
     19 
     20 #include "config.h"
     21 #include "system.h"
     22 #include "coretypes.h"
     23 #include "backend.h"
     24 #include "target.h"
     25 #include "rtl.h"
     26 #include "df.h"
     27 #include "memmodel.h"
     28 #include "tm_p.h"
     29 #include "regs.h"
     30 #include "emit-rtl.h"
     31 #include "resource.h"
     32 #include "insn-attr.h"
     33 #include "function-abi.h"
     34 
     35 /* This structure is used to record liveness information at the targets or
     36    fallthrough insns of branches.  We will most likely need the information
     37    at targets again, so save them in a hash table rather than recomputing them
     38    each time.  */
     39 
     40 struct target_info
     41 {
     42   int uid;			/* INSN_UID of target.  */
     43   struct target_info *next;	/* Next info for same hash bucket.  */
     44   HARD_REG_SET live_regs;	/* Registers live at target.  */
     45   int block;			/* Basic block number containing target.  */
     46   int bb_tick;			/* Generation count of basic block info.  */
     47 };
     48 
     49 #define TARGET_HASH_PRIME 257
     50 
     51 /* Indicates what resources are required at the beginning of the epilogue.  */
     52 static struct resources start_of_epilogue_needs;
     53 
     54 /* Indicates what resources are required at function end.  */
     55 static struct resources end_of_function_needs;
     56 
     57 /* Define the hash table itself.  */
     58 static struct target_info **target_hash_table = NULL;
     59 
     60 /* For each basic block, we maintain a generation number of its basic
     61    block info, which is updated each time we move an insn from the
     62    target of a jump.  This is the generation number indexed by block
     63    number.  */
     64 
     65 static int *bb_ticks;
     66 
     67 /* Marks registers possibly live at the current place being scanned by
     68    mark_target_live_regs.  Also used by update_live_status.  */
     69 
     70 static HARD_REG_SET current_live_regs;
     71 
     72 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
     73    Also only used by the next two functions.  */
     74 
     75 static HARD_REG_SET pending_dead_regs;
     76 
     77 static void update_live_status (rtx, const_rtx, void *);
     79 static int find_basic_block (rtx_insn *, int);
     80 static rtx_insn *next_insn_no_annul (rtx_insn *);
     81 static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*,
     82 					     rtx *, int, struct resources,
     83 					     struct resources);
     84 
     85 /* Utility function called from mark_target_live_regs via note_stores.
     87    It deadens any CLOBBERed registers and livens any SET registers.  */
     88 
     89 static void
     90 update_live_status (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
     91 {
     92   int first_regno, last_regno;
     93   int i;
     94 
     95   if (!REG_P (dest)
     96       && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest))))
     97     return;
     98 
     99   if (GET_CODE (dest) == SUBREG)
    100     {
    101       first_regno = subreg_regno (dest);
    102       last_regno = first_regno + subreg_nregs (dest);
    103 
    104     }
    105   else
    106     {
    107       first_regno = REGNO (dest);
    108       last_regno = END_REGNO (dest);
    109     }
    110 
    111   if (GET_CODE (x) == CLOBBER)
    112     for (i = first_regno; i < last_regno; i++)
    113       CLEAR_HARD_REG_BIT (current_live_regs, i);
    114   else
    115     for (i = first_regno; i < last_regno; i++)
    116       {
    117 	SET_HARD_REG_BIT (current_live_regs, i);
    118 	CLEAR_HARD_REG_BIT (pending_dead_regs, i);
    119       }
    120 }
    121 
    122 /* Find the number of the basic block with correct live register
    123    information that starts closest to INSN.  Return -1 if we couldn't
    124    find such a basic block or the beginning is more than
    125    SEARCH_LIMIT instructions before INSN.  Use SEARCH_LIMIT = -1 for
    126    an unlimited search.
    127 
    128    The delay slot filling code destroys the control-flow graph so,
    129    instead of finding the basic block containing INSN, we search
    130    backwards toward a BARRIER where the live register information is
    131    correct.  */
    132 
    133 static int
    134 find_basic_block (rtx_insn *insn, int search_limit)
    135 {
    136   /* Scan backwards to the previous BARRIER.  Then see if we can find a
    137      label that starts a basic block.  Return the basic block number.  */
    138   for (insn = prev_nonnote_insn (insn);
    139        insn && !BARRIER_P (insn) && search_limit != 0;
    140        insn = prev_nonnote_insn (insn), --search_limit)
    141     ;
    142 
    143   /* The closest BARRIER is too far away.  */
    144   if (search_limit == 0)
    145     return -1;
    146 
    147   /* The start of the function.  */
    148   else if (insn == 0)
    149     return ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index;
    150 
    151   /* See if any of the upcoming CODE_LABELs start a basic block.  If we reach
    152      anything other than a CODE_LABEL or note, we can't find this code.  */
    153   for (insn = next_nonnote_insn (insn);
    154        insn && LABEL_P (insn);
    155        insn = next_nonnote_insn (insn))
    156     if (BLOCK_FOR_INSN (insn))
    157       return BLOCK_FOR_INSN (insn)->index;
    158 
    159   return -1;
    160 }
    161 
    162 /* Similar to next_insn, but ignores insns in the delay slots of
    164    an annulled branch.  */
    165 
    166 static rtx_insn *
    167 next_insn_no_annul (rtx_insn *insn)
    168 {
    169   if (insn)
    170     {
    171       /* If INSN is an annulled branch, skip any insns from the target
    172 	 of the branch.  */
    173       if (JUMP_P (insn)
    174 	  && INSN_ANNULLED_BRANCH_P (insn)
    175 	  && NEXT_INSN (PREV_INSN (insn)) != insn)
    176 	{
    177 	  rtx_insn *next = NEXT_INSN (insn);
    178 
    179 	  while ((NONJUMP_INSN_P (next) || JUMP_P (next) || CALL_P (next))
    180 		 && INSN_FROM_TARGET_P (next))
    181 	    {
    182 	      insn = next;
    183 	      next = NEXT_INSN (insn);
    184 	    }
    185 	}
    186 
    187       insn = NEXT_INSN (insn);
    188       if (insn && NONJUMP_INSN_P (insn)
    189 	  && GET_CODE (PATTERN (insn)) == SEQUENCE)
    190 	insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
    191     }
    192 
    193   return insn;
    194 }
    195 
    196 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
    198    which resources are referenced by the insn.  If INCLUDE_DELAYED_EFFECTS
    199    is TRUE, resources used by the called routine will be included for
    200    CALL_INSNs.  */
    201 
    202 void
    203 mark_referenced_resources (rtx x, struct resources *res,
    204 			   bool include_delayed_effects)
    205 {
    206   enum rtx_code code = GET_CODE (x);
    207   int i, j;
    208   unsigned int r;
    209   const char *format_ptr;
    210 
    211   /* Handle leaf items for which we set resource flags.  Also, special-case
    212      CALL, SET and CLOBBER operators.  */
    213   switch (code)
    214     {
    215     case CONST:
    216     CASE_CONST_ANY:
    217     case PC:
    218     case SYMBOL_REF:
    219     case LABEL_REF:
    220     case DEBUG_INSN:
    221       return;
    222 
    223     case SUBREG:
    224       if (!REG_P (SUBREG_REG (x)))
    225 	mark_referenced_resources (SUBREG_REG (x), res, false);
    226       else
    227 	{
    228 	  unsigned int regno = subreg_regno (x);
    229 	  unsigned int last_regno = regno + subreg_nregs (x);
    230 
    231 	  gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
    232 	  for (r = regno; r < last_regno; r++)
    233 	    SET_HARD_REG_BIT (res->regs, r);
    234 	}
    235       return;
    236 
    237     case REG:
    238       gcc_assert (HARD_REGISTER_P (x));
    239       add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
    240       return;
    241 
    242     case MEM:
    243       /* If this memory shouldn't change, it really isn't referencing
    244 	 memory.  */
    245       if (! MEM_READONLY_P (x))
    246 	res->memory = 1;
    247       res->volatil |= MEM_VOLATILE_P (x);
    248 
    249       /* Mark registers used to access memory.  */
    250       mark_referenced_resources (XEXP (x, 0), res, false);
    251       return;
    252 
    253     case UNSPEC_VOLATILE:
    254     case TRAP_IF:
    255     case ASM_INPUT:
    256       /* Traditional asm's are always volatile.  */
    257       res->volatil = 1;
    258       break;
    259 
    260     case ASM_OPERANDS:
    261       res->volatil |= MEM_VOLATILE_P (x);
    262 
    263       /* For all ASM_OPERANDS, we must traverse the vector of input operands.
    264 	 We cannot just fall through here since then we would be confused
    265 	 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
    266 	 traditional asms unlike their normal usage.  */
    267 
    268       for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
    269 	mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, false);
    270       return;
    271 
    272     case CALL:
    273       /* The first operand will be a (MEM (xxx)) but doesn't really reference
    274 	 memory.  The second operand may be referenced, though.  */
    275       mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, false);
    276       mark_referenced_resources (XEXP (x, 1), res, false);
    277       return;
    278 
    279     case SET:
    280       /* Usually, the first operand of SET is set, not referenced.  But
    281 	 registers used to access memory are referenced.  SET_DEST is
    282 	 also referenced if it is a ZERO_EXTRACT.  */
    283 
    284       mark_referenced_resources (SET_SRC (x), res, false);
    285 
    286       x = SET_DEST (x);
    287       if (GET_CODE (x) == ZERO_EXTRACT
    288 	  || GET_CODE (x) == STRICT_LOW_PART)
    289 	mark_referenced_resources (x, res, false);
    290       else if (GET_CODE (x) == SUBREG)
    291 	x = SUBREG_REG (x);
    292       if (MEM_P (x))
    293 	mark_referenced_resources (XEXP (x, 0), res, false);
    294       return;
    295 
    296     case CLOBBER:
    297       return;
    298 
    299     case CALL_INSN:
    300       if (include_delayed_effects)
    301 	{
    302 	  /* A CALL references memory, the frame pointer if it exists, the
    303 	     stack pointer, any global registers and any registers given in
    304 	     USE insns immediately in front of the CALL.
    305 
    306 	     However, we may have moved some of the parameter loading insns
    307 	     into the delay slot of this CALL.  If so, the USE's for them
    308 	     don't count and should be skipped.  */
    309 	  rtx_insn *insn = PREV_INSN (as_a <rtx_insn *> (x));
    310 	  rtx_sequence *sequence = 0;
    311 	  int seq_size = 0;
    312 	  int i;
    313 
    314 	  /* If we are part of a delay slot sequence, point at the SEQUENCE.  */
    315 	  if (NEXT_INSN (insn) != x)
    316 	    {
    317 	      sequence = as_a <rtx_sequence *> (PATTERN (NEXT_INSN (insn)));
    318 	      seq_size = sequence->len ();
    319 	      gcc_assert (GET_CODE (sequence) == SEQUENCE);
    320 	    }
    321 
    322 	  res->memory = 1;
    323 	  SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
    324 	  if (frame_pointer_needed)
    325 	    {
    326 	      SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
    327 	      if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)
    328 		SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
    329 	    }
    330 
    331 	  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    332 	    if (global_regs[i])
    333 	      SET_HARD_REG_BIT (res->regs, i);
    334 
    335 	  /* Check for a REG_SETJMP.  If it exists, then we must
    336 	     assume that this call can need any register.
    337 
    338 	     This is done to be more conservative about how we handle setjmp.
    339 	     We assume that they both use and set all registers.  Using all
    340 	     registers ensures that a register will not be considered dead
    341 	     just because it crosses a setjmp call.  A register should be
    342 	     considered dead only if the setjmp call returns nonzero.  */
    343 	  if (find_reg_note (x, REG_SETJMP, NULL))
    344 	    SET_HARD_REG_SET (res->regs);
    345 
    346 	  {
    347 	    rtx link;
    348 
    349 	    for (link = CALL_INSN_FUNCTION_USAGE (x);
    350 		 link;
    351 		 link = XEXP (link, 1))
    352 	      if (GET_CODE (XEXP (link, 0)) == USE)
    353 		{
    354 		  for (i = 1; i < seq_size; i++)
    355 		    {
    356 		      rtx slot_pat = PATTERN (sequence->element (i));
    357 		      if (GET_CODE (slot_pat) == SET
    358 			  && rtx_equal_p (SET_DEST (slot_pat),
    359 					  XEXP (XEXP (link, 0), 0)))
    360 			break;
    361 		    }
    362 		  if (i >= seq_size)
    363 		    mark_referenced_resources (XEXP (XEXP (link, 0), 0),
    364 					       res, false);
    365 		}
    366 	  }
    367 	}
    368 
    369       /* ... fall through to other INSN processing ...  */
    370       gcc_fallthrough ();
    371 
    372     case INSN:
    373     case JUMP_INSN:
    374 
    375       if (GET_CODE (PATTERN (x)) == COND_EXEC)
    376       /* In addition to the usual references, also consider all outputs
    377 	 as referenced, to compensate for mark_set_resources treating
    378 	 them as killed.  This is similar to ZERO_EXTRACT / STRICT_LOW_PART
    379 	 handling, execpt that we got a partial incidence instead of a partial
    380 	 width.  */
    381       mark_set_resources (x, res, 0,
    382 			  include_delayed_effects
    383 			  ? MARK_SRC_DEST_CALL : MARK_SRC_DEST);
    384 
    385       if (! include_delayed_effects
    386 	  && INSN_REFERENCES_ARE_DELAYED (as_a <rtx_insn *> (x)))
    387 	return;
    388 
    389       /* No special processing, just speed up.  */
    390       mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
    391       return;
    392 
    393     default:
    394       break;
    395     }
    396 
    397   /* Process each sub-expression and flag what it needs.  */
    398   format_ptr = GET_RTX_FORMAT (code);
    399   for (i = 0; i < GET_RTX_LENGTH (code); i++)
    400     switch (*format_ptr++)
    401       {
    402       case 'e':
    403 	mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
    404 	break;
    405 
    406       case 'E':
    407 	for (j = 0; j < XVECLEN (x, i); j++)
    408 	  mark_referenced_resources (XVECEXP (x, i, j), res,
    409 				     include_delayed_effects);
    410 	break;
    411       }
    412 }
    413 
    414 /* A subroutine of mark_target_live_regs.  Search forward from TARGET
    416    looking for registers that are set before they are used.  These are dead.
    417    Stop after passing a few conditional jumps, and/or a small
    418    number of unconditional branches.  */
    419 
    420 static rtx_insn *
    421 find_dead_or_set_registers (rtx_insn *target, struct resources *res,
    422 			    rtx *jump_target, int jump_count,
    423 			    struct resources set, struct resources needed)
    424 {
    425   HARD_REG_SET scratch;
    426   rtx_insn *insn;
    427   rtx_insn *next_insn;
    428   rtx_insn *jump_insn = 0;
    429   int i;
    430 
    431   for (insn = target; insn; insn = next_insn)
    432     {
    433       rtx_insn *this_insn = insn;
    434 
    435       next_insn = NEXT_INSN (insn);
    436 
    437       /* If this instruction can throw an exception, then we don't
    438 	 know where we might end up next.  That means that we have to
    439 	 assume that whatever we have already marked as live really is
    440 	 live.  */
    441       if (can_throw_internal (insn))
    442 	break;
    443 
    444       switch (GET_CODE (insn))
    445 	{
    446 	case CODE_LABEL:
    447 	  /* After a label, any pending dead registers that weren't yet
    448 	     used can be made dead.  */
    449 	  pending_dead_regs &= ~needed.regs;
    450 	  res->regs &= ~pending_dead_regs;
    451 	  CLEAR_HARD_REG_SET (pending_dead_regs);
    452 
    453 	  continue;
    454 
    455 	case BARRIER:
    456 	case NOTE:
    457 	case DEBUG_INSN:
    458 	  continue;
    459 
    460 	case INSN:
    461 	  if (GET_CODE (PATTERN (insn)) == USE)
    462 	    {
    463 	      /* If INSN is a USE made by update_block, we care about the
    464 		 underlying insn.  Any registers set by the underlying insn
    465 		 are live since the insn is being done somewhere else.  */
    466 	      if (INSN_P (XEXP (PATTERN (insn), 0)))
    467 		mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
    468 				    MARK_SRC_DEST_CALL);
    469 
    470 	      /* All other USE insns are to be ignored.  */
    471 	      continue;
    472 	    }
    473 	  else if (GET_CODE (PATTERN (insn)) == CLOBBER)
    474 	    continue;
    475 	  else if (rtx_sequence *seq =
    476 		     dyn_cast <rtx_sequence *> (PATTERN (insn)))
    477 	    {
    478 	      /* An unconditional jump can be used to fill the delay slot
    479 		 of a call, so search for a JUMP_INSN in any position.  */
    480 	      for (i = 0; i < seq->len (); i++)
    481 		{
    482 		  this_insn = seq->insn (i);
    483 		  if (JUMP_P (this_insn))
    484 		    break;
    485 		}
    486 	    }
    487 
    488 	default:
    489 	  break;
    490 	}
    491 
    492       if (rtx_jump_insn *this_jump_insn =
    493 	    dyn_cast <rtx_jump_insn *> (this_insn))
    494 	{
    495 	  if (jump_count++ < 10)
    496 	    {
    497 	      if (any_uncondjump_p (this_jump_insn)
    498 		  || ANY_RETURN_P (PATTERN (this_jump_insn)))
    499 		{
    500 		  rtx lab_or_return = this_jump_insn->jump_label ();
    501 		  if (ANY_RETURN_P (lab_or_return))
    502 		    next_insn = NULL;
    503 		  else
    504 		    next_insn = as_a <rtx_insn *> (lab_or_return);
    505 		  if (jump_insn == 0)
    506 		    {
    507 		      jump_insn = insn;
    508 		      if (jump_target)
    509 			*jump_target = JUMP_LABEL (this_jump_insn);
    510 		    }
    511 		}
    512 	      else if (any_condjump_p (this_jump_insn))
    513 		{
    514 		  struct resources target_set, target_res;
    515 		  struct resources fallthrough_res;
    516 
    517 		  /* We can handle conditional branches here by following
    518 		     both paths, and then IOR the results of the two paths
    519 		     together, which will give us registers that are dead
    520 		     on both paths.  Since this is expensive, we give it
    521 		     a much higher cost than unconditional branches.  The
    522 		     cost was chosen so that we will follow at most 1
    523 		     conditional branch.  */
    524 
    525 		  jump_count += 4;
    526 		  if (jump_count >= 10)
    527 		    break;
    528 
    529 		  mark_referenced_resources (insn, &needed, true);
    530 
    531 		  /* For an annulled branch, mark_set_resources ignores slots
    532 		     filled by instructions from the target.  This is correct
    533 		     if the branch is not taken.  Since we are following both
    534 		     paths from the branch, we must also compute correct info
    535 		     if the branch is taken.  We do this by inverting all of
    536 		     the INSN_FROM_TARGET_P bits, calling mark_set_resources,
    537 		     and then inverting the INSN_FROM_TARGET_P bits again.  */
    538 
    539 		  if (GET_CODE (PATTERN (insn)) == SEQUENCE
    540 		      && INSN_ANNULLED_BRANCH_P (this_jump_insn))
    541 		    {
    542 		      rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn));
    543 		      for (i = 1; i < seq->len (); i++)
    544 			INSN_FROM_TARGET_P (seq->element (i))
    545 			  = ! INSN_FROM_TARGET_P (seq->element (i));
    546 
    547 		      target_set = set;
    548 		      mark_set_resources (insn, &target_set, 0,
    549 					  MARK_SRC_DEST_CALL);
    550 
    551 		      for (i = 1; i < seq->len (); i++)
    552 			INSN_FROM_TARGET_P (seq->element (i))
    553 			  = ! INSN_FROM_TARGET_P (seq->element (i));
    554 
    555 		      mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
    556 		    }
    557 		  else
    558 		    {
    559 		      mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
    560 		      target_set = set;
    561 		    }
    562 
    563 		  target_res = *res;
    564 		  scratch = target_set.regs & ~needed.regs;
    565 		  target_res.regs &= ~scratch;
    566 
    567 		  fallthrough_res = *res;
    568 		  scratch = set.regs & ~needed.regs;
    569 		  fallthrough_res.regs &= ~scratch;
    570 
    571 		  if (!ANY_RETURN_P (this_jump_insn->jump_label ()))
    572 		    find_dead_or_set_registers
    573 			  (this_jump_insn->jump_target (),
    574 			   &target_res, 0, jump_count, target_set, needed);
    575 		  find_dead_or_set_registers (next_insn,
    576 					      &fallthrough_res, 0, jump_count,
    577 					      set, needed);
    578 		  fallthrough_res.regs |= target_res.regs;
    579 		  res->regs &= fallthrough_res.regs;
    580 		  break;
    581 		}
    582 	      else
    583 		break;
    584 	    }
    585 	  else
    586 	    {
    587 	      /* Don't try this optimization if we expired our jump count
    588 		 above, since that would mean there may be an infinite loop
    589 		 in the function being compiled.  */
    590 	      jump_insn = 0;
    591 	      break;
    592 	    }
    593 	}
    594 
    595       mark_referenced_resources (insn, &needed, true);
    596       mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
    597 
    598       scratch = set.regs & ~needed.regs;
    599       res->regs &= ~scratch;
    600     }
    601 
    602   return jump_insn;
    603 }
    604 
    605 /* Given X, a part of an insn, and a pointer to a `struct resource',
    607    RES, indicate which resources are modified by the insn. If
    608    MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
    609    set by the called routine.
    610 
    611    If IN_DEST is nonzero, it means we are inside a SET.  Otherwise,
    612    objects are being referenced instead of set.  */
    613 
    614 void
    615 mark_set_resources (rtx x, struct resources *res, int in_dest,
    616 		    enum mark_resource_type mark_type)
    617 {
    618   enum rtx_code code;
    619   int i, j;
    620   unsigned int r;
    621   const char *format_ptr;
    622 
    623  restart:
    624 
    625   code = GET_CODE (x);
    626 
    627   switch (code)
    628     {
    629     case NOTE:
    630     case BARRIER:
    631     case CODE_LABEL:
    632     case USE:
    633     CASE_CONST_ANY:
    634     case LABEL_REF:
    635     case SYMBOL_REF:
    636     case CONST:
    637     case PC:
    638     case DEBUG_INSN:
    639       /* These don't set any resources.  */
    640       return;
    641 
    642     case CALL_INSN:
    643       /* Called routine modifies the condition code, memory, any registers
    644 	 that aren't saved across calls, global registers and anything
    645 	 explicitly CLOBBERed immediately after the CALL_INSN.  */
    646 
    647       if (mark_type == MARK_SRC_DEST_CALL)
    648 	{
    649 	  rtx_call_insn *call_insn = as_a <rtx_call_insn *> (x);
    650 	  rtx link;
    651 
    652 	  res->cc = res->memory = 1;
    653 
    654 	  res->regs |= insn_callee_abi (call_insn).full_reg_clobbers ();
    655 
    656 	  for (link = CALL_INSN_FUNCTION_USAGE (call_insn);
    657 	       link; link = XEXP (link, 1))
    658 	    if (GET_CODE (XEXP (link, 0)) == CLOBBER)
    659 	      mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
    660 				  MARK_SRC_DEST);
    661 
    662 	  /* Check for a REG_SETJMP.  If it exists, then we must
    663 	     assume that this call can clobber any register.  */
    664 	  if (find_reg_note (call_insn, REG_SETJMP, NULL))
    665 	    SET_HARD_REG_SET (res->regs);
    666 	}
    667 
    668       /* ... and also what its RTL says it modifies, if anything.  */
    669       gcc_fallthrough ();
    670 
    671     case JUMP_INSN:
    672     case INSN:
    673 
    674 	/* An insn consisting of just a CLOBBER (or USE) is just for flow
    675 	   and doesn't actually do anything, so we ignore it.  */
    676 
    677       if (mark_type != MARK_SRC_DEST_CALL
    678 	  && INSN_SETS_ARE_DELAYED (as_a <rtx_insn *> (x)))
    679 	return;
    680 
    681       x = PATTERN (x);
    682       if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
    683 	goto restart;
    684       return;
    685 
    686     case SET:
    687       /* If the source of a SET is a CALL, this is actually done by
    688 	 the called routine.  So only include it if we are to include the
    689 	 effects of the calling routine.  */
    690 
    691       mark_set_resources (SET_DEST (x), res,
    692 			  (mark_type == MARK_SRC_DEST_CALL
    693 			   || GET_CODE (SET_SRC (x)) != CALL),
    694 			  mark_type);
    695 
    696       mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
    697       return;
    698 
    699     case CLOBBER:
    700       mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
    701       return;
    702 
    703     case SEQUENCE:
    704       {
    705         rtx_sequence *seq = as_a <rtx_sequence *> (x);
    706         rtx control = seq->element (0);
    707         bool annul_p = JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control);
    708 
    709         mark_set_resources (control, res, 0, mark_type);
    710         for (i = seq->len () - 1; i >= 0; --i)
    711 	  {
    712 	    rtx elt = seq->element (i);
    713 	    if (!annul_p && INSN_FROM_TARGET_P (elt))
    714 	      mark_set_resources (elt, res, 0, mark_type);
    715 	  }
    716       }
    717       return;
    718 
    719     case POST_INC:
    720     case PRE_INC:
    721     case POST_DEC:
    722     case PRE_DEC:
    723       mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
    724       return;
    725 
    726     case PRE_MODIFY:
    727     case POST_MODIFY:
    728       mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
    729       mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
    730       mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
    731       return;
    732 
    733     case SIGN_EXTRACT:
    734     case ZERO_EXTRACT:
    735       mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
    736       mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
    737       mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
    738       return;
    739 
    740     case MEM:
    741       if (in_dest)
    742 	{
    743 	  res->memory = 1;
    744 	  res->volatil |= MEM_VOLATILE_P (x);
    745 	}
    746 
    747       mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
    748       return;
    749 
    750     case SUBREG:
    751       if (in_dest)
    752 	{
    753 	  if (!REG_P (SUBREG_REG (x)))
    754 	    mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
    755 	  else
    756 	    {
    757 	      unsigned int regno = subreg_regno (x);
    758 	      unsigned int last_regno = regno + subreg_nregs (x);
    759 
    760 	      gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
    761 	      for (r = regno; r < last_regno; r++)
    762 		SET_HARD_REG_BIT (res->regs, r);
    763 	    }
    764 	}
    765       return;
    766 
    767     case REG:
    768       if (in_dest)
    769 	{
    770 	  gcc_assert (HARD_REGISTER_P (x));
    771 	  add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
    772 	}
    773       return;
    774 
    775     case UNSPEC_VOLATILE:
    776     case ASM_INPUT:
    777       /* Traditional asm's are always volatile.  */
    778       res->volatil = 1;
    779       return;
    780 
    781     case TRAP_IF:
    782       res->volatil = 1;
    783       break;
    784 
    785     case ASM_OPERANDS:
    786       res->volatil |= MEM_VOLATILE_P (x);
    787 
    788       /* For all ASM_OPERANDS, we must traverse the vector of input operands.
    789 	 We cannot just fall through here since then we would be confused
    790 	 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
    791 	 traditional asms unlike their normal usage.  */
    792 
    793       for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
    794 	mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
    795 			    MARK_SRC_DEST);
    796       return;
    797 
    798     default:
    799       break;
    800     }
    801 
    802   /* Process each sub-expression and flag what it needs.  */
    803   format_ptr = GET_RTX_FORMAT (code);
    804   for (i = 0; i < GET_RTX_LENGTH (code); i++)
    805     switch (*format_ptr++)
    806       {
    807       case 'e':
    808 	mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
    809 	break;
    810 
    811       case 'E':
    812 	for (j = 0; j < XVECLEN (x, i); j++)
    813 	  mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
    814 	break;
    815       }
    816 }
    817 
    818 /* Return TRUE if INSN is a return, possibly with a filled delay slot.  */
    820 
    821 static bool
    822 return_insn_p (const_rtx insn)
    823 {
    824   if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
    825     return true;
    826 
    827   if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
    828     return return_insn_p (XVECEXP (PATTERN (insn), 0, 0));
    829 
    830   return false;
    831 }
    832 
    833 /* Set the resources that are live at TARGET.
    834 
    835    If TARGET is zero, we refer to the end of the current function and can
    836    return our precomputed value.
    837 
    838    Otherwise, we try to find out what is live by consulting the basic block
    839    information.  This is tricky, because we must consider the actions of
    840    reload and jump optimization, which occur after the basic block information
    841    has been computed.
    842 
    843    Accordingly, we proceed as follows::
    844 
    845    We find the previous BARRIER and look at all immediately following labels
    846    (with no intervening active insns) to see if any of them start a basic
    847    block.  If we hit the start of the function first, we use block 0.
    848 
    849    Once we have found a basic block and a corresponding first insn, we can
    850    accurately compute the live status (by starting at a label following a
    851    BARRIER, we are immune to actions taken by reload and jump.)  Then we
    852    scan all insns between that point and our target.  For each CLOBBER (or
    853    for call-clobbered regs when we pass a CALL_INSN), mark the appropriate
    854    registers are dead.  For a SET, mark them as live.
    855 
    856    We have to be careful when using REG_DEAD notes because they are not
    857    updated by such things as find_equiv_reg.  So keep track of registers
    858    marked as dead that haven't been assigned to, and mark them dead at the
    859    next CODE_LABEL since reload and jump won't propagate values across labels.
    860 
    861    If we cannot find the start of a basic block (should be a very rare
    862    case, if it can happen at all), mark everything as potentially live.
    863 
    864    Next, scan forward from TARGET looking for things set or clobbered
    865    before they are used.  These are not live.
    866 
    867    Because we can be called many times on the same target, save our results
    868    in a hash table indexed by INSN_UID.  This is only done if the function
    869    init_resource_info () was invoked before we are called.  */
    870 
    871 void
    872 mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resources *res)
    873 {
    874   int b = -1;
    875   unsigned int i;
    876   struct target_info *tinfo = NULL;
    877   rtx_insn *insn;
    878   rtx jump_target;
    879   HARD_REG_SET scratch;
    880   struct resources set, needed;
    881 
    882   /* Handle end of function.  */
    883   if (target_maybe_return == 0 || ANY_RETURN_P (target_maybe_return))
    884     {
    885       *res = end_of_function_needs;
    886       return;
    887     }
    888 
    889   /* We've handled the case of RETURN/SIMPLE_RETURN; we should now have an
    890      instruction.  */
    891   rtx_insn *target = as_a <rtx_insn *> (target_maybe_return);
    892 
    893   /* Handle return insn.  */
    894   if (return_insn_p (target))
    895     {
    896       *res = end_of_function_needs;
    897       mark_referenced_resources (target, res, false);
    898       return;
    899     }
    900 
    901   /* We have to assume memory is needed, but the CC isn't.  */
    902   res->memory = 1;
    903   res->volatil = 0;
    904   res->cc = 0;
    905 
    906   /* See if we have computed this value already.  */
    907   if (target_hash_table != NULL)
    908     {
    909       for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
    910 	   tinfo; tinfo = tinfo->next)
    911 	if (tinfo->uid == INSN_UID (target))
    912 	  break;
    913 
    914       /* Start by getting the basic block number.  If we have saved
    915 	 information, we can get it from there unless the insn at the
    916 	 start of the basic block has been deleted.  */
    917       if (tinfo && tinfo->block != -1
    918 	  && ! BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, tinfo->block))->deleted ())
    919 	b = tinfo->block;
    920     }
    921 
    922   if (b == -1)
    923     b = find_basic_block (target, param_max_delay_slot_live_search);
    924 
    925   if (target_hash_table != NULL)
    926     {
    927       if (tinfo)
    928 	{
    929 	  /* If the information is up-to-date, use it.  Otherwise, we will
    930 	     update it below.  */
    931 	  if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
    932 	    {
    933 	      res->regs = tinfo->live_regs;
    934 	      return;
    935 	    }
    936 	}
    937       else
    938 	{
    939 	  /* Allocate a place to put our results and chain it into the
    940 	     hash table.  */
    941 	  tinfo = XNEW (struct target_info);
    942 	  tinfo->uid = INSN_UID (target);
    943 	  tinfo->block = b;
    944 	  tinfo->next
    945 	    = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
    946 	  target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
    947 	}
    948     }
    949 
    950   CLEAR_HARD_REG_SET (pending_dead_regs);
    951 
    952   /* If we found a basic block, get the live registers from it and update
    953      them with anything set or killed between its start and the insn before
    954      TARGET; this custom life analysis is really about registers so we need
    955      to use the LR problem.  Otherwise, we must assume everything is live.  */
    956   if (b != -1)
    957     {
    958       regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b));
    959       rtx_insn *start_insn, *stop_insn;
    960       df_ref def;
    961 
    962       /* Compute hard regs live at start of block.  */
    963       REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
    964       FOR_EACH_ARTIFICIAL_DEF (def, b)
    965 	if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
    966 	  SET_HARD_REG_BIT (current_live_regs, DF_REF_REGNO (def));
    967 
    968       /* Get starting and ending insn, handling the case where each might
    969 	 be a SEQUENCE.  */
    970       start_insn = (b == ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index ?
    971 		    insns : BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, b)));
    972       stop_insn = target;
    973 
    974       if (NONJUMP_INSN_P (start_insn)
    975 	  && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
    976 	start_insn = as_a <rtx_sequence *> (PATTERN (start_insn))->insn (0);
    977 
    978       if (NONJUMP_INSN_P (stop_insn)
    979 	  && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
    980 	stop_insn = next_insn (PREV_INSN (stop_insn));
    981 
    982       for (insn = start_insn; insn != stop_insn;
    983 	   insn = next_insn_no_annul (insn))
    984 	{
    985 	  rtx link;
    986 	  rtx_insn *real_insn = insn;
    987 	  enum rtx_code code = GET_CODE (insn);
    988 
    989 	  if (DEBUG_INSN_P (insn))
    990 	    continue;
    991 
    992 	  /* If this insn is from the target of a branch, it isn't going to
    993 	     be used in the sequel.  If it is used in both cases, this
    994 	     test will not be true.  */
    995 	  if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
    996 	      && INSN_FROM_TARGET_P (insn))
    997 	    continue;
    998 
    999 	  /* If this insn is a USE made by update_block, we care about the
   1000 	     underlying insn.  */
   1001 	  if (code == INSN
   1002 	      && GET_CODE (PATTERN (insn)) == USE
   1003 	      && INSN_P (XEXP (PATTERN (insn), 0)))
   1004 	    real_insn = as_a <rtx_insn *> (XEXP (PATTERN (insn), 0));
   1005 
   1006 	  if (CALL_P (real_insn))
   1007 	    {
   1008 	      /* Values in call-clobbered registers survive a COND_EXEC CALL
   1009 		 if that is not executed; this matters for resoure use because
   1010 		 they may be used by a complementarily (or more strictly)
   1011 		 predicated instruction, or if the CALL is NORETURN.  */
   1012 	      if (GET_CODE (PATTERN (real_insn)) != COND_EXEC)
   1013 		{
   1014 		  HARD_REG_SET regs_invalidated_by_this_call
   1015 		    = insn_callee_abi (real_insn).full_reg_clobbers ();
   1016 		  /* CALL clobbers all call-used regs that aren't fixed except
   1017 		     sp, ap, and fp.  Do this before setting the result of the
   1018 		     call live.  */
   1019 		  current_live_regs &= ~regs_invalidated_by_this_call;
   1020 		}
   1021 
   1022 	      /* A CALL_INSN sets any global register live, since it may
   1023 		 have been modified by the call.  */
   1024 	      for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
   1025 		if (global_regs[i])
   1026 		  SET_HARD_REG_BIT (current_live_regs, i);
   1027 	    }
   1028 
   1029 	  /* Mark anything killed in an insn to be deadened at the next
   1030 	     label.  Ignore USE insns; the only REG_DEAD notes will be for
   1031 	     parameters.  But they might be early.  A CALL_INSN will usually
   1032 	     clobber registers used for parameters.  It isn't worth bothering
   1033 	     with the unlikely case when it won't.  */
   1034 	  if ((NONJUMP_INSN_P (real_insn)
   1035 	       && GET_CODE (PATTERN (real_insn)) != USE
   1036 	       && GET_CODE (PATTERN (real_insn)) != CLOBBER)
   1037 	      || JUMP_P (real_insn)
   1038 	      || CALL_P (real_insn))
   1039 	    {
   1040 	      for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
   1041 		if (REG_NOTE_KIND (link) == REG_DEAD
   1042 		    && REG_P (XEXP (link, 0))
   1043 		    && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
   1044 		  add_to_hard_reg_set (&pending_dead_regs,
   1045 				      GET_MODE (XEXP (link, 0)),
   1046 				      REGNO (XEXP (link, 0)));
   1047 
   1048 	      note_stores (real_insn, update_live_status, NULL);
   1049 
   1050 	      /* If any registers were unused after this insn, kill them.
   1051 		 These notes will always be accurate.  */
   1052 	      for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
   1053 		if (REG_NOTE_KIND (link) == REG_UNUSED
   1054 		    && REG_P (XEXP (link, 0))
   1055 		    && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
   1056 		  remove_from_hard_reg_set (&current_live_regs,
   1057 					   GET_MODE (XEXP (link, 0)),
   1058 					   REGNO (XEXP (link, 0)));
   1059 	    }
   1060 
   1061 	  else if (LABEL_P (real_insn))
   1062 	    {
   1063 	      basic_block bb;
   1064 
   1065 	      /* A label clobbers the pending dead registers since neither
   1066 		 reload nor jump will propagate a value across a label.  */
   1067 	      current_live_regs &= ~pending_dead_regs;
   1068 	      CLEAR_HARD_REG_SET (pending_dead_regs);
   1069 
   1070 	      /* We must conservatively assume that all registers that used
   1071 		 to be live here still are.  The fallthrough edge may have
   1072 		 left a live register uninitialized.  */
   1073 	      bb = BLOCK_FOR_INSN (real_insn);
   1074 	      if (bb)
   1075 		{
   1076 		  HARD_REG_SET extra_live;
   1077 
   1078 		  REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb));
   1079 		  current_live_regs |= extra_live;
   1080 		}
   1081 	    }
   1082 
   1083 	  /* The beginning of the epilogue corresponds to the end of the
   1084 	     RTL chain when there are no epilogue insns.  Certain resources
   1085 	     are implicitly required at that point.  */
   1086 	  else if (NOTE_P (real_insn)
   1087 		   && NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG)
   1088 	    current_live_regs |= start_of_epilogue_needs.regs;
   1089 	}
   1090 
   1091       res->regs = current_live_regs;
   1092       if (tinfo != NULL)
   1093 	{
   1094 	  tinfo->block = b;
   1095 	  tinfo->bb_tick = bb_ticks[b];
   1096 	}
   1097     }
   1098   else
   1099     /* We didn't find the start of a basic block.  Assume everything
   1100        in use.  This should happen only extremely rarely.  */
   1101     SET_HARD_REG_SET (res->regs);
   1102 
   1103   CLEAR_RESOURCE (&set);
   1104   CLEAR_RESOURCE (&needed);
   1105 
   1106   rtx_insn *jump_insn = find_dead_or_set_registers (target, res, &jump_target,
   1107 						    0, set, needed);
   1108 
   1109   /* If we hit an unconditional branch, we have another way of finding out
   1110      what is live: we can see what is live at the branch target and include
   1111      anything used but not set before the branch.  We add the live
   1112      resources found using the test below to those found until now.  */
   1113 
   1114   if (jump_insn)
   1115     {
   1116       struct resources new_resources;
   1117       rtx_insn *stop_insn = next_active_insn (jump_insn);
   1118 
   1119       if (!ANY_RETURN_P (jump_target))
   1120 	jump_target = next_active_insn (as_a<rtx_insn *> (jump_target));
   1121       mark_target_live_regs (insns, jump_target, &new_resources);
   1122       CLEAR_RESOURCE (&set);
   1123       CLEAR_RESOURCE (&needed);
   1124 
   1125       /* Include JUMP_INSN in the needed registers.  */
   1126       for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
   1127 	{
   1128 	  mark_referenced_resources (insn, &needed, true);
   1129 
   1130 	  scratch = needed.regs & ~set.regs;
   1131 	  new_resources.regs |= scratch;
   1132 
   1133 	  mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
   1134 	}
   1135 
   1136       res->regs |= new_resources.regs;
   1137     }
   1138 
   1139   if (tinfo != NULL)
   1140     tinfo->live_regs = res->regs;
   1141 }
   1142 
   1143 /* Initialize the resources required by mark_target_live_regs ().
   1145    This should be invoked before the first call to mark_target_live_regs.  */
   1146 
   1147 void
   1148 init_resource_info (rtx_insn *epilogue_insn)
   1149 {
   1150   int i;
   1151   basic_block bb;
   1152 
   1153   /* Indicate what resources are required to be valid at the end of the current
   1154      function.  The condition code never is and memory always is.
   1155      The stack pointer is needed unless EXIT_IGNORE_STACK is true
   1156      and there is an epilogue that restores the original stack pointer
   1157      from the frame pointer.  Registers used to return the function value
   1158      are needed.  Registers holding global variables are needed.  */
   1159 
   1160   end_of_function_needs.cc = 0;
   1161   end_of_function_needs.memory = 1;
   1162   CLEAR_HARD_REG_SET (end_of_function_needs.regs);
   1163 
   1164   if (frame_pointer_needed)
   1165     {
   1166       SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
   1167       if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)
   1168 	SET_HARD_REG_BIT (end_of_function_needs.regs,
   1169 			  HARD_FRAME_POINTER_REGNUM);
   1170     }
   1171   if (!(frame_pointer_needed
   1172 	&& EXIT_IGNORE_STACK
   1173 	&& epilogue_insn
   1174 	&& !crtl->sp_is_unchanging))
   1175     SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
   1176 
   1177   if (crtl->return_rtx != 0)
   1178     mark_referenced_resources (crtl->return_rtx,
   1179 			       &end_of_function_needs, true);
   1180 
   1181   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
   1182     if (global_regs[i] || df_epilogue_uses_p (i))
   1183       SET_HARD_REG_BIT (end_of_function_needs.regs, i);
   1184 
   1185   /* The registers required to be live at the end of the function are
   1186      represented in the flow information as being dead just prior to
   1187      reaching the end of the function.  For example, the return of a value
   1188      might be represented by a USE of the return register immediately
   1189      followed by an unconditional jump to the return label where the
   1190      return label is the end of the RTL chain.  The end of the RTL chain
   1191      is then taken to mean that the return register is live.
   1192 
   1193      This sequence is no longer maintained when epilogue instructions are
   1194      added to the RTL chain.  To reconstruct the original meaning, the
   1195      start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
   1196      point where these registers become live (start_of_epilogue_needs).
   1197      If epilogue instructions are present, the registers set by those
   1198      instructions won't have been processed by flow.  Thus, those
   1199      registers are additionally required at the end of the RTL chain
   1200      (end_of_function_needs).  */
   1201 
   1202   start_of_epilogue_needs = end_of_function_needs;
   1203 
   1204   while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
   1205     {
   1206       mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
   1207 			  MARK_SRC_DEST_CALL);
   1208       if (return_insn_p (epilogue_insn))
   1209 	break;
   1210     }
   1211 
   1212   /* Filter-out the flags register from those additionally required
   1213      registers. */
   1214   if (targetm.flags_regnum != INVALID_REGNUM)
   1215     CLEAR_HARD_REG_BIT (end_of_function_needs.regs, targetm.flags_regnum);
   1216 
   1217   /* Allocate and initialize the tables used by mark_target_live_regs.  */
   1218   target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME);
   1219   bb_ticks = XCNEWVEC (int, last_basic_block_for_fn (cfun));
   1220 
   1221   /* Set the BLOCK_FOR_INSN of each label that starts a basic block.  */
   1222   FOR_EACH_BB_FN (bb, cfun)
   1223     if (LABEL_P (BB_HEAD (bb)))
   1224       BLOCK_FOR_INSN (BB_HEAD (bb)) = bb;
   1225 }
   1226 
   1227 /* Free up the resources allocated to mark_target_live_regs ().  This
   1229    should be invoked after the last call to mark_target_live_regs ().  */
   1230 
   1231 void
   1232 free_resource_info (void)
   1233 {
   1234   basic_block bb;
   1235 
   1236   if (target_hash_table != NULL)
   1237     {
   1238       int i;
   1239 
   1240       for (i = 0; i < TARGET_HASH_PRIME; ++i)
   1241 	{
   1242 	  struct target_info *ti = target_hash_table[i];
   1243 
   1244 	  while (ti)
   1245 	    {
   1246 	      struct target_info *next = ti->next;
   1247 	      free (ti);
   1248 	      ti = next;
   1249 	    }
   1250 	}
   1251 
   1252       free (target_hash_table);
   1253       target_hash_table = NULL;
   1254     }
   1255 
   1256   if (bb_ticks != NULL)
   1257     {
   1258       free (bb_ticks);
   1259       bb_ticks = NULL;
   1260     }
   1261 
   1262   FOR_EACH_BB_FN (bb, cfun)
   1263     if (LABEL_P (BB_HEAD (bb)))
   1264       BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL;
   1265 }
   1266 
   1267 /* Clear any hashed information that we have stored for INSN.  */
   1269 
   1270 void
   1271 clear_hashed_info_for_insn (rtx_insn *insn)
   1272 {
   1273   struct target_info *tinfo;
   1274 
   1275   if (target_hash_table != NULL)
   1276     {
   1277       for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
   1278 	   tinfo; tinfo = tinfo->next)
   1279 	if (tinfo->uid == INSN_UID (insn))
   1280 	  break;
   1281 
   1282       if (tinfo)
   1283 	tinfo->block = -1;
   1284     }
   1285 }
   1286 
   1287 /* Clear any hashed information that we have stored for instructions
   1288    between INSN and the next BARRIER that follow a JUMP or a LABEL.  */
   1289 
   1290 void
   1291 clear_hashed_info_until_next_barrier (rtx_insn *insn)
   1292 {
   1293   while (insn && !BARRIER_P (insn))
   1294     {
   1295       if (JUMP_P (insn) || LABEL_P (insn))
   1296 	{
   1297 	  rtx_insn *next = next_active_insn (insn);
   1298 	  if (next)
   1299 	    clear_hashed_info_for_insn (next);
   1300 	}
   1301 
   1302       insn = next_nonnote_insn (insn);
   1303     }
   1304 }
   1305 
   1306 /* Increment the tick count for the basic block that contains INSN.  */
   1307 
   1308 void
   1309 incr_ticks_for_insn (rtx_insn *insn)
   1310 {
   1311   int b = find_basic_block (insn, param_max_delay_slot_live_search);
   1312 
   1313   if (b != -1)
   1314     bb_ticks[b]++;
   1315 }
   1316 
   1317 /* Add TRIAL to the set of resources used at the end of the current
   1319    function.  */
   1320 void
   1321 mark_end_of_function_resources (rtx trial, bool include_delayed_effects)
   1322 {
   1323   mark_referenced_resources (trial, &end_of_function_needs,
   1324 			     include_delayed_effects);
   1325 }
   1326