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lib1funcs.S revision 1.1.1.10
      1       1.1  mrg ; libgcc1 routines for Synopsys DesignWare ARC cpu.
      2       1.1  mrg 
      3  1.1.1.10  mrg /* Copyright (C) 1995-2024 Free Software Foundation, Inc.
      4       1.1  mrg    Contributor: Joern Rennecke <joern.rennecke (at) embecosm.com>
      5       1.1  mrg 		on behalf of Synopsys Inc.
      6       1.1  mrg 
      7       1.1  mrg This file is part of GCC.
      8       1.1  mrg 
      9       1.1  mrg GCC is free software; you can redistribute it and/or modify it under
     10       1.1  mrg the terms of the GNU General Public License as published by the Free
     11       1.1  mrg Software Foundation; either version 3, or (at your option) any later
     12       1.1  mrg version.
     13       1.1  mrg 
     14       1.1  mrg GCC is distributed in the hope that it will be useful, but WITHOUT ANY
     15       1.1  mrg WARRANTY; without even the implied warranty of MERCHANTABILITY or
     16       1.1  mrg FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
     17       1.1  mrg for more details.
     18       1.1  mrg 
     19       1.1  mrg Under Section 7 of GPL version 3, you are granted additional
     20       1.1  mrg permissions described in the GCC Runtime Library Exception, version
     21       1.1  mrg 3.1, as published by the Free Software Foundation.
     22       1.1  mrg 
     23       1.1  mrg You should have received a copy of the GNU General Public License and
     24       1.1  mrg a copy of the GCC Runtime Library Exception along with this program;
     25       1.1  mrg see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
     26       1.1  mrg <http://www.gnu.org/licenses/>.  */
     27       1.1  mrg 
     28       1.1  mrg /* As a special exception, if you link this library with other files,
     29       1.1  mrg    some of which are compiled with GCC, to produce an executable,
     30       1.1  mrg    this library does not by itself cause the resulting executable
     31       1.1  mrg    to be covered by the GNU General Public License.
     32       1.1  mrg    This exception does not however invalidate any other reasons why
     33       1.1  mrg    the executable file might be covered by the GNU General Public License.  */
     34       1.1  mrg 
     35   1.1.1.3  mrg 
     36       1.1  mrg  /* ANSI concatenation macros.  */
     37   1.1.1.3  mrg 
     38       1.1  mrg  #define CONCAT1(a, b) CONCAT2(a, b)
     39       1.1  mrg  #define CONCAT2(a, b) a ## b
     40   1.1.1.3  mrg 
     41       1.1  mrg  /* Use the right prefix for global labels.  */
     42   1.1.1.3  mrg 
     43       1.1  mrg  #define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
     44   1.1.1.3  mrg 
     45       1.1  mrg #ifndef WORKING_ASSEMBLER
     46       1.1  mrg #define abs_l abs
     47       1.1  mrg #define asl_l asl
     48       1.1  mrg #define mov_l mov
     49       1.1  mrg #endif
     50   1.1.1.3  mrg 
     51       1.1  mrg #define FUNC(X)         .type SYM(X),@function
     52       1.1  mrg #define HIDDEN_FUNC(X)	FUNC(X)` .hidden X
     53       1.1  mrg #define ENDFUNC0(X)     .Lfe_##X: .size X,.Lfe_##X-X
     54       1.1  mrg #define ENDFUNC(X)      ENDFUNC0(X)
     55       1.1  mrg 
     56   1.1.1.8  mrg #ifdef __ARC_RF16__
     57   1.1.1.8  mrg 	/* Use object attributes to inform other tools this file is
     58   1.1.1.8  mrg 	safe for RF16 configuration.  */
     59   1.1.1.8  mrg 	.arc_attribute Tag_ARC_ABI_rf16, 1
     60   1.1.1.8  mrg #endif
     61   1.1.1.3  mrg 
     62       1.1  mrg #ifdef  L_mulsi3
     63       1.1  mrg 	.section .text
     64       1.1  mrg 	.align 4
     65       1.1  mrg 
     66       1.1  mrg 	.global SYM(__mulsi3)
     67       1.1  mrg SYM(__mulsi3):
     68       1.1  mrg 
     69       1.1  mrg /* This the simple version.
     70       1.1  mrg 
     71   1.1.1.3  mrg   while (a)
     72       1.1  mrg     {
     73       1.1  mrg       if (a & 1)
     74   1.1.1.3  mrg 	r += b;
     75       1.1  mrg       a >>= 1;
     76       1.1  mrg       b <<= 1;
     77       1.1  mrg     }
     78       1.1  mrg */
     79       1.1  mrg 
     80       1.1  mrg #if defined (__ARC_MUL64__)
     81       1.1  mrg 	FUNC(__mulsi3)
     82       1.1  mrg 	mulu64 r0,r1
     83       1.1  mrg 	j_s.d [blink]
     84       1.1  mrg 	mov_s r0,mlo
     85       1.1  mrg 	ENDFUNC(__mulsi3)
     86   1.1.1.3  mrg #elif defined (__ARC_MPY__)
     87       1.1  mrg 	HIDDEN_FUNC(__mulsi3)
     88       1.1  mrg 	mpyu	r0,r0,r1
     89       1.1  mrg 	nop_s
     90       1.1  mrg 	j_s	[blink]
     91       1.1  mrg 	ENDFUNC(__mulsi3)
     92       1.1  mrg #elif defined (__ARC_NORM__)
     93       1.1  mrg 	FUNC(__mulsi3)
     94       1.1  mrg 	norm.f	r2,r0
     95       1.1  mrg 	rsub	lp_count,r2,31
     96       1.1  mrg 	mov.mi	lp_count,32
     97       1.1  mrg 	mov_s	r2,r0
     98       1.1  mrg 	mov_s	r0,0
     99       1.1  mrg 	lpnz	@.Lend		; loop is aligned
    100       1.1  mrg 	lsr.f	r2,r2
    101       1.1  mrg 	add.cs	r0,r0,r1
    102       1.1  mrg 	add_s	r1,r1,r1
    103       1.1  mrg .Lend:	j_s [blink]
    104       1.1  mrg 	ENDFUNC(__mulsi3)
    105   1.1.1.3  mrg #elif !defined (__OPTIMIZE_SIZE__) && defined (__ARC_BARREL_SHIFTER__)
    106       1.1  mrg 	/* Up to 3.5 times faster than the simpler code below, but larger.  */
    107       1.1  mrg 	FUNC(__mulsi3)
    108       1.1  mrg 	ror.f	r2,r0,4
    109       1.1  mrg 	mov_s	r0,0
    110       1.1  mrg 	add3.mi	r0,r0,r1
    111       1.1  mrg 	asl.f	r2,r2,2
    112       1.1  mrg 	add2.cs	r0,r0,r1
    113       1.1  mrg 	jeq_s	[blink]
    114       1.1  mrg .Loop:
    115       1.1  mrg 	add1.mi	r0,r0,r1
    116       1.1  mrg 	asl.f	r2,r2,2
    117       1.1  mrg 	add.cs	r0,r0,r1
    118       1.1  mrg 	asl_s	r1,r1,4
    119       1.1  mrg 	ror.f	r2,r2,8
    120       1.1  mrg 	add3.mi	r0,r0,r1
    121       1.1  mrg 	asl.f	r2,r2,2
    122       1.1  mrg 	bne.d	.Loop
    123       1.1  mrg 	add2.cs	r0,r0,r1
    124       1.1  mrg 	j_s	[blink]
    125       1.1  mrg 	ENDFUNC(__mulsi3)
    126       1.1  mrg #elif !defined (__OPTIMIZE_SIZE__) /* __ARC601__ */
    127       1.1  mrg 	FUNC(__mulsi3)
    128       1.1  mrg 	lsr.f r2,r0
    129       1.1  mrg 	mov_s r0,0
    130       1.1  mrg 	mov_s r3,0
    131       1.1  mrg 	add.cs r0,r0,r1
    132       1.1  mrg .Loop:
    133       1.1  mrg 	lsr.f r2,r2
    134       1.1  mrg 	add1.cs r0,r0,r1
    135       1.1  mrg 	lsr.f r2,r2
    136       1.1  mrg 	add2.cs r0,r0,r1
    137       1.1  mrg 	lsr.f r2,r2
    138       1.1  mrg 	add3.cs r0,r0,r1
    139   1.1.1.3  mrg 	bne.d .Loop
    140       1.1  mrg 	add3 r1,r3,r1
    141       1.1  mrg 	j_s	[blink]
    142       1.1  mrg 	ENDFUNC(__mulsi3)
    143       1.1  mrg #else
    144       1.1  mrg /********************************************************/
    145       1.1  mrg 	FUNC(__mulsi3)
    146       1.1  mrg 	mov_s r2,0		; Accumulate result here.
    147       1.1  mrg .Lloop:
    148       1.1  mrg 	bbit0 r0,0,@.Ly
    149       1.1  mrg 	add_s r2,r2,r1		; r += b
    150   1.1.1.3  mrg .Ly:
    151       1.1  mrg 	lsr_s r0,r0		; a >>= 1
    152   1.1.1.3  mrg 	asl_s r1,r1		; b <<= 1
    153   1.1.1.3  mrg 	brne_s r0,0,@.Lloop
    154       1.1  mrg .Ldone:
    155       1.1  mrg 	j_s.d [blink]
    156       1.1  mrg 	mov_s r0,r2
    157       1.1  mrg 	ENDFUNC(__mulsi3)
    158       1.1  mrg /********************************************************/
    159       1.1  mrg #endif
    160   1.1.1.3  mrg 
    161       1.1  mrg #endif /* L_mulsi3 */
    162       1.1  mrg 
    163       1.1  mrg #ifdef  L_umulsidi3
    164       1.1  mrg 	.section .text
    165       1.1  mrg 	.align 4
    166       1.1  mrg 
    167       1.1  mrg 	.global SYM(__umulsidi3)
    168       1.1  mrg SYM(__umulsidi3):
    169       1.1  mrg 	HIDDEN_FUNC(__umulsidi3)
    170       1.1  mrg /* We need ARC700 /ARC_MUL64 definitions of __umulsidi3 / __umulsi3_highpart
    171       1.1  mrg    in case some code has been compiled without multiply support enabled,
    172       1.1  mrg    but linked with the multiply-support enabled libraries.
    173       1.1  mrg    For ARC601 (i.e. without a barrel shifter), we also use umuldisi3 as our
    174       1.1  mrg    umulsi3_highpart implementation; the use of the latter label doesn't
    175       1.1  mrg    actually benefit ARC601 platforms, but is useful when ARC601 code is linked
    176       1.1  mrg    against other libraries.  */
    177   1.1.1.3  mrg #if defined (__ARC_MPY__) || defined (__ARC_MUL64__) \
    178   1.1.1.3  mrg 	|| !defined (__ARC_BARREL_SHIFTER__)
    179       1.1  mrg 	.global SYM(__umulsi3_highpart)
    180       1.1  mrg SYM(__umulsi3_highpart):
    181       1.1  mrg 	HIDDEN_FUNC(__umulsi3_highpart)
    182       1.1  mrg #endif
    183       1.1  mrg 
    184       1.1  mrg /* This the simple version.
    185       1.1  mrg 
    186   1.1.1.3  mrg   while (a)
    187       1.1  mrg     {
    188       1.1  mrg       if (a & 1)
    189   1.1.1.3  mrg 	r += b;
    190       1.1  mrg       a >>= 1;
    191       1.1  mrg       b <<= 1;
    192       1.1  mrg     }
    193       1.1  mrg */
    194       1.1  mrg #include "ieee-754/arc-ieee-754.h"
    195       1.1  mrg 
    196   1.1.1.3  mrg #ifdef __ARC_MPY__
    197       1.1  mrg 	mov_s	r12,DBL0L
    198       1.1  mrg 	mpyu	DBL0L,r12,DBL0H
    199       1.1  mrg 	j_s.d	[blink]
    200   1.1.1.3  mrg 	MPYHU	DBL0H,r12,DBL0H
    201       1.1  mrg #elif defined (__ARC_MUL64__)
    202       1.1  mrg /* Likewise for __ARC_MUL64__ */
    203       1.1  mrg 	mulu64 r0,r1
    204       1.1  mrg 	mov_s DBL0L,mlo
    205       1.1  mrg 	j_s.d [blink]
    206       1.1  mrg 	mov_s DBL0H,mhi
    207   1.1.1.3  mrg #else /* !__ARC_MPY__ && !__ARC_MUL64__ */
    208       1.1  mrg /* Although it might look tempting to extend this to handle muldi3,
    209       1.1  mrg    using mulsi3 twice with 2.25 cycles per 32 bit add is faster
    210       1.1  mrg    than one loop with 3 or four cycles per 32 bit add.  */
    211       1.1  mrg 	asl.f r12,0		; Top part of b.
    212       1.1  mrg 	mov_s r2,0		; Accumulate result here.
    213       1.1  mrg 	bbit1.d r0,0,@.Ladd
    214       1.1  mrg 	mov_s r3,0
    215       1.1  mrg .Llooptst:
    216       1.1  mrg 	rlc r12,r12
    217       1.1  mrg 	breq r0,0,@.Ldone	; while (a)
    218       1.1  mrg .Lloop:
    219       1.1  mrg 	asl.f r1,r1		; b <<= 1
    220       1.1  mrg 	bbit0.d r0,1,@.Llooptst
    221       1.1  mrg 	lsr r0,r0		; a >>= 1
    222       1.1  mrg 	rlc r12,r12
    223       1.1  mrg .Ladd:
    224       1.1  mrg 	add.f r3,r3,r1	; r += b
    225       1.1  mrg 	brne.d r0,0,@.Lloop	; while (a);
    226       1.1  mrg 	adc   r2,r2,r12
    227       1.1  mrg .Ldone:
    228       1.1  mrg 	mov_s DBL0L,r3
    229       1.1  mrg 	j_s.d [blink]
    230       1.1  mrg 	mov DBL0H,r2
    231   1.1.1.3  mrg #endif /* !__ARC_MPY__*/
    232       1.1  mrg 	ENDFUNC(__umulsidi3)
    233   1.1.1.3  mrg #if defined (__ARC_MPY__) || defined (__ARC_MUL64__) \
    234   1.1.1.3  mrg 	|| !defined (__ARC_BARREL_SHIFTER__)
    235       1.1  mrg 	ENDFUNC(__umulsi3_highpart)
    236       1.1  mrg #endif
    237       1.1  mrg #endif /* L_umulsidi3 */
    238       1.1  mrg 
    239   1.1.1.8  mrg #ifndef __ARC_RF16__
    240   1.1.1.7  mrg #ifdef L_muldi3
    241   1.1.1.7  mrg 	.section .text
    242   1.1.1.7  mrg 	.align 4
    243   1.1.1.7  mrg 	.global SYM(__muldi3)
    244   1.1.1.7  mrg SYM(__muldi3):
    245   1.1.1.7  mrg #ifdef __LITTLE_ENDIAN__
    246   1.1.1.7  mrg         push_s blink
    247   1.1.1.7  mrg         mov_s r4,r3     ;4
    248   1.1.1.7  mrg         mov_s r5,r2     ;4
    249   1.1.1.7  mrg         mov_s r9,r0     ;4
    250   1.1.1.7  mrg         mov_s r8,r1     ;4
    251   1.1.1.7  mrg         bl.d @__umulsidi3
    252   1.1.1.7  mrg         mov_s r1,r2     ;4
    253   1.1.1.7  mrg         mov_s r6,r0     ;4
    254   1.1.1.7  mrg         mov_s r7,r1     ;4
    255   1.1.1.7  mrg         mov_s r0,r9     ;4
    256   1.1.1.7  mrg         bl.d @__mulsi3
    257   1.1.1.7  mrg         mov_s r1,r4     ;4
    258   1.1.1.7  mrg         mov_s r4,r0     ;4
    259   1.1.1.7  mrg         mov_s r1,r8     ;4
    260   1.1.1.7  mrg         bl.d @__mulsi3
    261   1.1.1.7  mrg         mov_s r0,r5     ;4
    262   1.1.1.7  mrg         pop_s blink
    263   1.1.1.7  mrg         add_s r0,r0,r4 ;2
    264   1.1.1.7  mrg         add r1,r0,r7
    265   1.1.1.7  mrg         j_s.d [blink]
    266   1.1.1.7  mrg         mov_s r0,r6     ;4
    267   1.1.1.7  mrg #else
    268   1.1.1.7  mrg 	push_s  blink
    269   1.1.1.7  mrg 	mov_s   r5,r3
    270   1.1.1.7  mrg 	mov_s   r9,r2
    271   1.1.1.7  mrg 	mov_s   r4,r1
    272   1.1.1.7  mrg 	mov_s   r8,r0
    273   1.1.1.7  mrg 	mov_s   r0,r1
    274   1.1.1.7  mrg 	bl.d 	@__umulsidi3
    275   1.1.1.7  mrg 	mov_s   r1,r3
    276   1.1.1.7  mrg 	mov_s   r7,r0
    277   1.1.1.7  mrg 	mov_s   r6,r1
    278   1.1.1.7  mrg 	mov_s   r0,r4
    279   1.1.1.7  mrg 	bl.d    @__mulsi3
    280   1.1.1.7  mrg 	mov_s   r1,r9
    281   1.1.1.7  mrg 	mov_s   r4,r0
    282   1.1.1.7  mrg 	mov_s   r1,r8
    283   1.1.1.7  mrg 	bl.d    @__mulsi3
    284   1.1.1.7  mrg 	mov_s   r0,r5
    285   1.1.1.7  mrg 	pop_s   blink
    286   1.1.1.7  mrg 	add_s   r0,r0,r4
    287   1.1.1.7  mrg 	add_s   r0,r0,r7
    288   1.1.1.7  mrg 	j_s.d   [blink]
    289   1.1.1.7  mrg 	mov_s   r1,r6
    290   1.1.1.7  mrg #endif /* __LITTLE_ENDIAN__ */
    291   1.1.1.7  mrg ENDFUNC(__muldi3)
    292   1.1.1.7  mrg #endif /* L_muldi3 */
    293   1.1.1.8  mrg #endif /* !__ARC_RF16__ */
    294   1.1.1.7  mrg 
    295       1.1  mrg #ifdef  L_umulsi3_highpart
    296       1.1  mrg #include "ieee-754/arc-ieee-754.h"
    297       1.1  mrg /* For use without a barrel shifter, and for ARC700 / ARC_MUL64, the
    298       1.1  mrg    mulsidi3 algorithms above look better, so for these, there is an
    299       1.1  mrg    extra label up there.  */
    300   1.1.1.3  mrg #if !defined (__ARC_MPY__) && !defined (__ARC_MUL64__) \
    301   1.1.1.3  mrg 	&& defined (__ARC_BARREL_SHIFTER__)
    302       1.1  mrg 	.global SYM(__umulsi3_highpart)
    303       1.1  mrg SYM(__umulsi3_highpart):
    304       1.1  mrg 	HIDDEN_FUNC(__umulsi3_highpart)
    305       1.1  mrg 	mov_s r2,0
    306       1.1  mrg 	mov_s r3,32
    307       1.1  mrg .Loop:
    308       1.1  mrg 	lsr.f r0,r0
    309       1.1  mrg 	add.cs.f r2,r2,r1
    310       1.1  mrg 	sub_s r3,r3,1
    311       1.1  mrg 	brne.d r0,0,.Loop
    312       1.1  mrg 	rrc r2,r2
    313       1.1  mrg 	j_s.d	[blink]
    314       1.1  mrg /* Make the result register peephole-compatible with mulsidi3.  */
    315       1.1  mrg 	lsr DBL0H,r2,r3
    316       1.1  mrg 	ENDFUNC(__umulsi3_highpart)
    317   1.1.1.3  mrg #endif /* !__ARC_MPY__  && __ARC_BARREL_SHIFTER__ */
    318       1.1  mrg #endif /* L_umulsi3_highpart */
    319       1.1  mrg 
    320       1.1  mrg #ifdef L_divmod_tools
    321       1.1  mrg 
    322       1.1  mrg ; Utilities used by all routines.
    323       1.1  mrg 
    324       1.1  mrg 	.section .text
    325       1.1  mrg 
    326       1.1  mrg /*
    327       1.1  mrg unsigned long
    328       1.1  mrg udivmodsi4(int modwanted, unsigned long num, unsigned long den)
    329       1.1  mrg {
    330       1.1  mrg   unsigned long bit = 1;
    331       1.1  mrg   unsigned long res = 0;
    332       1.1  mrg 
    333       1.1  mrg   while (den < num && bit && !(den & (1L<<31)))
    334       1.1  mrg     {
    335       1.1  mrg       den <<=1;
    336       1.1  mrg       bit <<=1;
    337       1.1  mrg     }
    338       1.1  mrg   while (bit)
    339       1.1  mrg     {
    340       1.1  mrg       if (num >= den)
    341       1.1  mrg 	{
    342       1.1  mrg 	  num -= den;
    343       1.1  mrg 	  res |= bit;
    344       1.1  mrg 	}
    345       1.1  mrg       bit >>=1;
    346       1.1  mrg       den >>=1;
    347       1.1  mrg     }
    348       1.1  mrg   if (modwanted) return num;
    349       1.1  mrg   return res;
    350       1.1  mrg }
    351       1.1  mrg */
    352       1.1  mrg 
    353       1.1  mrg ; inputs: r0 = numerator, r1 = denominator
    354       1.1  mrg ; outputs: r0 = quotient, r1 = remainder, r2/r3 trashed
    355       1.1  mrg 
    356       1.1  mrg 	.balign 4
    357       1.1  mrg 	.global SYM(__udivmodsi4)
    358       1.1  mrg 	FUNC(__udivmodsi4)
    359       1.1  mrg SYM(__udivmodsi4):
    360       1.1  mrg 
    361   1.1.1.3  mrg #if defined (__ARC_EA__)
    362       1.1  mrg /* Normalize divisor and divident, and then use the appropriate number of
    363       1.1  mrg    divaw (the number of result bits, or one more) to produce the result.
    364       1.1  mrg    There are some special conditions that need to be tested:
    365       1.1  mrg    - We can only directly normalize unsigned numbers that fit in 31 bit.  For
    366       1.1  mrg      the divisor, we test early on that it is not 'negative'.
    367       1.1  mrg    - divaw can't corrrectly process a divident that is larger than the divisor.
    368       1.1  mrg      We handle this be checking that the divident prior to normalization is
    369       1.1  mrg      not larger than the normalized divisor.  As we then already know then
    370       1.1  mrg      that the divisor fits 31 bit, this check also makes sure that the
    371       1.1  mrg      divident fits.
    372       1.1  mrg    - ordinary normalization of the divident could make it larger than the
    373       1.1  mrg      normalized divisor, which again would be unsuitable for divaw.
    374       1.1  mrg      Thus, we want to shift left the divident by one less, except that we
    375       1.1  mrg      want to leave it alone if it is already 31 bit.  To this end, we
    376       1.1  mrg      double the input to norm with adds.
    377       1.1  mrg    - If the divident has less bits than the divisor, that would leave us
    378       1.1  mrg      with a negative number of divaw to execute.  Although we could use a
    379       1.1  mrg      conditional loop to avoid excess divaw, and then the quotient could
    380       1.1  mrg      be extracted correctly as there'd be more than enough zero bits, the
    381       1.1  mrg      remainder would be shifted left too far, requiring a conditional shift
    382       1.1  mrg      right.  The cost of that shift and the possible mispredict on the
    383       1.1  mrg      conditional loop cost as much as putting in an early check for a zero
    384       1.1  mrg      result.  */
    385       1.1  mrg 	bmsk	r3,r0,29
    386       1.1  mrg 	brne.d	r3,r0,.Large_dividend
    387       1.1  mrg 	norm.f	r2,r1
    388       1.1  mrg 	brlo	r0,r1,.Lret0
    389       1.1  mrg 	norm	r3,r0
    390       1.1  mrg 	asl_s	r1,r1,r2
    391       1.1  mrg 	sub_s	r3,r3,1
    392       1.1  mrg 	asl_l	r0,r0,r3	; not short to keep loop aligned
    393       1.1  mrg 	sub	lp_count,r2,r3
    394       1.1  mrg 	lp	.Ldiv_end
    395       1.1  mrg 	divaw	r0,r0,r1
    396       1.1  mrg .Ldiv_end:sub_s	r3,r2,1
    397       1.1  mrg 	lsr	r1,r0,r2
    398       1.1  mrg 	j_s.d	[blink]
    399       1.1  mrg 	bmsk	r0,r0,r3
    400       1.1  mrg 
    401       1.1  mrg 	.balign 4
    402       1.1  mrg .Large_dividend:
    403       1.1  mrg 	bmi	.Ltrivial
    404       1.1  mrg 	asl_s	r1,r1,r2
    405       1.1  mrg 	mov_s	r3,0
    406       1.1  mrg 	sub1.f	r4,r0,r1
    407       1.1  mrg 	mov.lo	r4,r0
    408       1.1  mrg 	mov.hs	r3,2
    409       1.1  mrg 	cmp	r4,r1
    410       1.1  mrg 	sub.hs	r4,r4,r1
    411       1.1  mrg 	add.hs	r3,r3,1
    412       1.1  mrg 	mov.f	lp_count,r2
    413       1.1  mrg 	lpne	.Ldiv_end2
    414       1.1  mrg 	divaw	r4,r4,r1
    415       1.1  mrg .Ldiv_end2:asl	r0,r3,r2
    416       1.1  mrg 	lsr	r1,r4,r2
    417       1.1  mrg 	sub_s	r2,r2,1
    418       1.1  mrg 	bmsk	r4,r4,r2
    419       1.1  mrg 	j_s.d	[blink]
    420       1.1  mrg 	or.ne	r0,r0,r4
    421       1.1  mrg 
    422       1.1  mrg .Lret0:
    423       1.1  mrg 	mov_s	r1,r0
    424       1.1  mrg 	j_s.d	[blink]
    425       1.1  mrg 	mov_l	r0,0
    426       1.1  mrg 	.balign	4
    427       1.1  mrg .Ltrivial:
    428       1.1  mrg 	sub.f	r1,r0,r1
    429       1.1  mrg 	mov.c	r1,r0
    430       1.1  mrg 	mov_s	r0,1
    431       1.1  mrg 	j_s.d	[blink]
    432       1.1  mrg 	mov.c	r0,0
    433   1.1.1.6  mrg #elif !defined (__OPTIMIZE_SIZE__) && !defined (__ARC_RF16__)
    434   1.1.1.3  mrg #if defined (__ARC_NORM__) && defined (__ARC_BARREL_SHIFTER__)
    435       1.1  mrg 	lsr_s r2,r0
    436       1.1  mrg 	brhs.d r1,r2,.Lret0_3
    437       1.1  mrg 	norm r2,r2
    438       1.1  mrg 	norm r3,r1
    439       1.1  mrg 	sub_s r3,r3,r2
    440       1.1  mrg 	asl_s r1,r1,r3
    441       1.1  mrg 	sub1.f 0,r0,r1
    442       1.1  mrg 	lsr.cs r1,r1,1
    443       1.1  mrg 	sbc r2,r3,0
    444       1.1  mrg 	sub1 r0,r0,r1
    445       1.1  mrg 	cmp_s r0,r1
    446       1.1  mrg 	mov.f lp_count,r2
    447       1.1  mrg #else /* ! __ARC_NORM__ */
    448       1.1  mrg 	lsr_s r2,r0
    449       1.1  mrg 	brhs.d r1,r2,.Lret0_3
    450       1.1  mrg 	mov lp_count,32
    451       1.1  mrg .Lloop1:
    452       1.1  mrg 	asl_s r1,r1		; den <<= 1
    453       1.1  mrg 	brls.d r1,r2,@.Lloop1
    454       1.1  mrg 	sub lp_count,lp_count,1
    455       1.1  mrg 	sub_s r0,r0,r1
    456       1.1  mrg 	lsr_s r1,r1
    457       1.1  mrg 	cmp_s r0,r1
    458       1.1  mrg 	xor.f r2,lp_count,31
    459   1.1.1.3  mrg #if !defined (__ARCEM__) && !defined (__ARCHS__)
    460       1.1  mrg 	mov_s lp_count,r2
    461   1.1.1.2  mrg #else
    462   1.1.1.2  mrg 	mov lp_count,r2
    463   1.1.1.2  mrg 	nop_s
    464   1.1.1.3  mrg #endif /* !__ARCEM__ && !__ARCHS__ */
    465       1.1  mrg #endif /* !__ARC_NORM__ */
    466       1.1  mrg 	sub.cc r0,r0,r1
    467       1.1  mrg 	mov_s r3,3
    468       1.1  mrg 	sbc r3,r3,0
    469   1.1.1.3  mrg #if defined (__ARC_BARREL_SHIFTER__)
    470       1.1  mrg 	asl_s r3,r3,r2
    471       1.1  mrg 	rsub r1,r1,1
    472       1.1  mrg 	lpne @.Lloop2_end
    473       1.1  mrg 	add1.f r0,r1,r0
    474       1.1  mrg 	sub.cc r0,r0,r1
    475       1.1  mrg .Lloop2_end:
    476       1.1  mrg 	lsr r1,r0,r2
    477       1.1  mrg #else
    478       1.1  mrg 	rsub r1,r1,1
    479       1.1  mrg 	lpne @.Lloop2_end
    480       1.1  mrg 	asl_s r3,r3
    481       1.1  mrg 	add1.f r0,r1,r0
    482       1.1  mrg 	sub.cc r0,r0,r1
    483       1.1  mrg .Lloop2_end:
    484       1.1  mrg 	lsr_s r1,r0
    485       1.1  mrg 	lsr.f lp_count,r2
    486       1.1  mrg 	mov.cc r1,r0
    487       1.1  mrg 	lpnz 1f
    488       1.1  mrg 	lsr_s r1,r1
    489       1.1  mrg 	lsr_s r1,r1
    490       1.1  mrg 1:
    491       1.1  mrg #endif
    492       1.1  mrg 	bmsk r0,r0,r2
    493       1.1  mrg 	bclr r0,r0,r2
    494       1.1  mrg 	j_s.d [blink]
    495       1.1  mrg 	or_s r0,r0,r3
    496       1.1  mrg .Lret0_3:
    497       1.1  mrg #if 0 /* Slightly shorter, but slower.  */
    498       1.1  mrg 	lp .Loop3_end
    499       1.1  mrg 	brhi.d r1,r0,.Loop3_end
    500       1.1  mrg 	sub_s r0,r0,r1
    501       1.1  mrg .Loop3_end
    502       1.1  mrg 	add_s r1,r1,r0
    503       1.1  mrg 	j_s.d [blink]
    504       1.1  mrg 	rsub r0,lp_count,32-1
    505       1.1  mrg #else
    506       1.1  mrg 	mov_s r4,r1
    507       1.1  mrg 	sub.f r1,r0,r1
    508       1.1  mrg 	sbc r0,r0,r0
    509       1.1  mrg 	sub.cc.f r1,r1,r4
    510       1.1  mrg 	sbc r0,r0,0
    511       1.1  mrg 	sub.cc.f r1,r1,r4
    512       1.1  mrg 	sbc r0,r0,-3
    513       1.1  mrg 	j_s.d [blink]
    514       1.1  mrg 	add.cs r1,r1,r4
    515       1.1  mrg #endif
    516       1.1  mrg #else /* Arctangent-A5 */
    517       1.1  mrg 	breq_s r1,0,@.Ldivmodend
    518       1.1  mrg 	mov_s r2,1		; bit = 1
    519       1.1  mrg 	mov_s r3,0		; res = 0
    520       1.1  mrg .Lloop1:
    521   1.1.1.3  mrg 	brhs r1,r0,@.Lloop2
    522       1.1  mrg 	bbit1 r1,31,@.Lloop2
    523       1.1  mrg 	asl_s r1,r1		; den <<= 1
    524       1.1  mrg 	b.d @.Lloop1
    525       1.1  mrg 	asl_s r2,r2		; bit <<= 1
    526       1.1  mrg .Lloop2:
    527   1.1.1.3  mrg 	brlo r0,r1,@.Lshiftdown
    528       1.1  mrg 	sub_s r0,r0,r1		; num -= den
    529       1.1  mrg 	or_s r3,r3,r2		; res |= bit
    530       1.1  mrg .Lshiftdown:
    531       1.1  mrg 	lsr_s r2,r2		; bit >>= 1
    532   1.1.1.3  mrg 	lsr_s r1,r1		; den >>= 1
    533       1.1  mrg 	brne_s r2,0,@.Lloop2
    534       1.1  mrg .Ldivmodend:
    535       1.1  mrg 	mov_s r1,r0		; r1 = mod
    536       1.1  mrg 	j.d [blink]
    537       1.1  mrg 	mov_s r0,r3		; r0 = res
    538       1.1  mrg /******************************************************/
    539       1.1  mrg #endif
    540       1.1  mrg 	ENDFUNC(__udivmodsi4)
    541       1.1  mrg 
    542       1.1  mrg #endif
    543       1.1  mrg 
    544       1.1  mrg #ifdef  L_udivsi3
    545       1.1  mrg 	.section .text
    546       1.1  mrg 	.align 4
    547       1.1  mrg 
    548       1.1  mrg 	.global SYM(__udivsi3)
    549       1.1  mrg 	FUNC(__udivsi3)
    550       1.1  mrg SYM(__udivsi3):
    551       1.1  mrg 	b @SYM(__udivmodsi4)
    552       1.1  mrg 	ENDFUNC(__udivsi3)
    553       1.1  mrg 
    554       1.1  mrg #endif /* L_udivsi3 */
    555       1.1  mrg 
    556       1.1  mrg #ifdef  L_divsi3
    557       1.1  mrg 	.section .text
    558       1.1  mrg 	.align 4
    559       1.1  mrg 
    560       1.1  mrg 	.global SYM(__divsi3)
    561       1.1  mrg 	FUNC(__divsi3)
    562       1.1  mrg 
    563   1.1.1.3  mrg #ifndef __ARC_EA__
    564       1.1  mrg SYM(__divsi3):
    565       1.1  mrg 	/* A5 / ARC60? */
    566   1.1.1.6  mrg 	mov r12,blink
    567   1.1.1.6  mrg 	xor r11,r0,r1
    568       1.1  mrg 	abs_s r0,r0
    569       1.1  mrg 	bl.d @SYM(__udivmodsi4)
    570   1.1.1.6  mrg 	abs_s r1,r1
    571   1.1.1.6  mrg 	tst r11,r11
    572   1.1.1.6  mrg 	j.d [r12]
    573   1.1.1.6  mrg 	neg.mi r0,r0
    574   1.1.1.3  mrg #else 	/* !ifndef __ARC_EA__ */
    575       1.1  mrg 	;; We can use the abs, norm, divaw and mpy instructions for ARC700
    576       1.1  mrg #define MULDIV
    577       1.1  mrg #ifdef MULDIV
    578       1.1  mrg /* This table has been generated by divtab-arc700.c.  */
    579       1.1  mrg /* 1/512 .. 1/256, normalized.  There is a leading 1 in bit 31.
    580       1.1  mrg    For powers of two, we list unnormalized numbers instead.  The values
    581       1.1  mrg    for powers of 2 are loaded, but not used.  The value for 1 is actually
    582       1.1  mrg    the first instruction after .Lmuldiv.  */
    583       1.1  mrg 	.balign 4
    584       1.1  mrg .Ldivtab:
    585       1.1  mrg 
    586       1.1  mrg 	.long	0x1000000
    587       1.1  mrg 	.long	0x80808081
    588       1.1  mrg 	.long	0x81020409
    589       1.1  mrg 	.long	0x81848DA9
    590       1.1  mrg 	.long	0x82082083
    591       1.1  mrg 	.long	0x828CBFBF
    592       1.1  mrg 	.long	0x83126E98
    593       1.1  mrg 	.long	0x83993053
    594       1.1  mrg 	.long	0x84210843
    595       1.1  mrg 	.long	0x84A9F9C9
    596       1.1  mrg 	.long	0x85340854
    597       1.1  mrg 	.long	0x85BF3762
    598       1.1  mrg 	.long	0x864B8A7E
    599       1.1  mrg 	.long	0x86D90545
    600       1.1  mrg 	.long	0x8767AB60
    601       1.1  mrg 	.long	0x87F78088
    602       1.1  mrg 	.long	0x88888889
    603       1.1  mrg 	.long	0x891AC73B
    604       1.1  mrg 	.long	0x89AE408A
    605       1.1  mrg 	.long	0x8A42F871
    606       1.1  mrg 	.long	0x8AD8F2FC
    607       1.1  mrg 	.long	0x8B70344B
    608       1.1  mrg 	.long	0x8C08C08D
    609       1.1  mrg 	.long	0x8CA29C05
    610       1.1  mrg 	.long	0x8D3DCB09
    611       1.1  mrg 	.long	0x8DDA5203
    612       1.1  mrg 	.long	0x8E78356E
    613       1.1  mrg 	.long	0x8F1779DA
    614       1.1  mrg 	.long	0x8FB823EF
    615       1.1  mrg 	.long	0x905A3864
    616       1.1  mrg 	.long	0x90FDBC0A
    617       1.1  mrg 	.long	0x91A2B3C5
    618       1.1  mrg 	.long	0x92492493
    619       1.1  mrg 	.long	0x92F11385
    620       1.1  mrg 	.long	0x939A85C5
    621       1.1  mrg 	.long	0x94458095
    622       1.1  mrg 	.long	0x94F20950
    623       1.1  mrg 	.long	0x95A02569
    624       1.1  mrg 	.long	0x964FDA6D
    625       1.1  mrg 	.long	0x97012E03
    626       1.1  mrg 	.long	0x97B425EE
    627       1.1  mrg 	.long	0x9868C80A
    628       1.1  mrg 	.long	0x991F1A52
    629       1.1  mrg 	.long	0x99D722DB
    630       1.1  mrg 	.long	0x9A90E7DA
    631       1.1  mrg 	.long	0x9B4C6F9F
    632       1.1  mrg 	.long	0x9C09C09D
    633       1.1  mrg 	.long	0x9CC8E161
    634       1.1  mrg 	.long	0x9D89D89E
    635       1.1  mrg 	.long	0x9E4CAD24
    636       1.1  mrg 	.long	0x9F1165E8
    637       1.1  mrg 	.long	0x9FD809FE
    638       1.1  mrg 	.long	0xA0A0A0A1
    639       1.1  mrg 	.long	0xA16B312F
    640       1.1  mrg 	.long	0xA237C32C
    641       1.1  mrg 	.long	0xA3065E40
    642       1.1  mrg 	.long	0xA3D70A3E
    643       1.1  mrg 	.long	0xA4A9CF1E
    644       1.1  mrg 	.long	0xA57EB503
    645       1.1  mrg 	.long	0xA655C43A
    646       1.1  mrg 	.long	0xA72F053A
    647       1.1  mrg 	.long	0xA80A80A9
    648       1.1  mrg 	.long	0xA8E83F58
    649       1.1  mrg 	.long	0xA9C84A48
    650       1.1  mrg 	.long	0xAAAAAAAB
    651       1.1  mrg 	.long	0xAB8F69E3
    652       1.1  mrg 	.long	0xAC769185
    653       1.1  mrg 	.long	0xAD602B59
    654       1.1  mrg 	.long	0xAE4C415D
    655       1.1  mrg 	.long	0xAF3ADDC7
    656       1.1  mrg 	.long	0xB02C0B03
    657       1.1  mrg 	.long	0xB11FD3B9
    658       1.1  mrg 	.long	0xB21642C9
    659       1.1  mrg 	.long	0xB30F6353
    660       1.1  mrg 	.long	0xB40B40B5
    661       1.1  mrg 	.long	0xB509E68B
    662       1.1  mrg 	.long	0xB60B60B7
    663       1.1  mrg 	.long	0xB70FBB5B
    664       1.1  mrg 	.long	0xB81702E1
    665       1.1  mrg 	.long	0xB92143FB
    666       1.1  mrg 	.long	0xBA2E8BA3
    667       1.1  mrg 	.long	0xBB3EE722
    668       1.1  mrg 	.long	0xBC52640C
    669       1.1  mrg 	.long	0xBD691048
    670       1.1  mrg 	.long	0xBE82FA0C
    671       1.1  mrg 	.long	0xBFA02FE9
    672       1.1  mrg 	.long	0xC0C0C0C1
    673       1.1  mrg 	.long	0xC1E4BBD6
    674       1.1  mrg 	.long	0xC30C30C4
    675       1.1  mrg 	.long	0xC4372F86
    676       1.1  mrg 	.long	0xC565C87C
    677       1.1  mrg 	.long	0xC6980C6A
    678       1.1  mrg 	.long	0xC7CE0C7D
    679       1.1  mrg 	.long	0xC907DA4F
    680       1.1  mrg 	.long	0xCA4587E7
    681       1.1  mrg 	.long	0xCB8727C1
    682       1.1  mrg 	.long	0xCCCCCCCD
    683       1.1  mrg 	.long	0xCE168A78
    684       1.1  mrg 	.long	0xCF6474A9
    685       1.1  mrg 	.long	0xD0B69FCC
    686       1.1  mrg 	.long	0xD20D20D3
    687       1.1  mrg 	.long	0xD3680D37
    688       1.1  mrg 	.long	0xD4C77B04
    689       1.1  mrg 	.long	0xD62B80D7
    690       1.1  mrg 	.long	0xD79435E6
    691       1.1  mrg 	.long	0xD901B204
    692       1.1  mrg 	.long	0xDA740DA8
    693       1.1  mrg 	.long	0xDBEB61EF
    694       1.1  mrg 	.long	0xDD67C8A7
    695       1.1  mrg 	.long	0xDEE95C4D
    696       1.1  mrg 	.long	0xE070381D
    697       1.1  mrg 	.long	0xE1FC780F
    698       1.1  mrg 	.long	0xE38E38E4
    699       1.1  mrg 	.long	0xE525982B
    700       1.1  mrg 	.long	0xE6C2B449
    701       1.1  mrg 	.long	0xE865AC7C
    702       1.1  mrg 	.long	0xEA0EA0EB
    703       1.1  mrg 	.long	0xEBBDB2A6
    704       1.1  mrg 	.long	0xED7303B6
    705       1.1  mrg 	.long	0xEF2EB720
    706       1.1  mrg 	.long	0xF0F0F0F1
    707       1.1  mrg 	.long	0xF2B9D649
    708       1.1  mrg 	.long	0xF4898D60
    709       1.1  mrg 	.long	0xF6603D99
    710       1.1  mrg 	.long	0xF83E0F84
    711       1.1  mrg 	.long	0xFA232CF3
    712       1.1  mrg 	.long	0xFC0FC0FD
    713       1.1  mrg 	.long	0xFE03F810
    714       1.1  mrg 	.long	0x2000000
    715       1.1  mrg 	.long	0x81020409
    716       1.1  mrg 	.long	0x82082083
    717       1.1  mrg 	.long	0x83126E98
    718       1.1  mrg 	.long	0x84210843
    719       1.1  mrg 	.long	0x85340854
    720       1.1  mrg 	.long	0x864B8A7E
    721       1.1  mrg 	.long	0x8767AB60
    722       1.1  mrg 	.long	0x88888889
    723       1.1  mrg 	.long	0x89AE408A
    724       1.1  mrg 	.long	0x8AD8F2FC
    725       1.1  mrg 	.long	0x8C08C08D
    726       1.1  mrg 	.long	0x8D3DCB09
    727       1.1  mrg 	.long	0x8E78356E
    728       1.1  mrg 	.long	0x8FB823EF
    729       1.1  mrg 	.long	0x90FDBC0A
    730       1.1  mrg 	.long	0x92492493
    731       1.1  mrg 	.long	0x939A85C5
    732       1.1  mrg 	.long	0x94F20950
    733       1.1  mrg 	.long	0x964FDA6D
    734       1.1  mrg 	.long	0x97B425EE
    735       1.1  mrg 	.long	0x991F1A52
    736       1.1  mrg 	.long	0x9A90E7DA
    737       1.1  mrg 	.long	0x9C09C09D
    738       1.1  mrg 	.long	0x9D89D89E
    739       1.1  mrg 	.long	0x9F1165E8
    740       1.1  mrg 	.long	0xA0A0A0A1
    741       1.1  mrg 	.long	0xA237C32C
    742       1.1  mrg 	.long	0xA3D70A3E
    743       1.1  mrg 	.long	0xA57EB503
    744       1.1  mrg 	.long	0xA72F053A
    745       1.1  mrg 	.long	0xA8E83F58
    746       1.1  mrg 	.long	0xAAAAAAAB
    747       1.1  mrg 	.long	0xAC769185
    748       1.1  mrg 	.long	0xAE4C415D
    749       1.1  mrg 	.long	0xB02C0B03
    750       1.1  mrg 	.long	0xB21642C9
    751       1.1  mrg 	.long	0xB40B40B5
    752       1.1  mrg 	.long	0xB60B60B7
    753       1.1  mrg 	.long	0xB81702E1
    754       1.1  mrg 	.long	0xBA2E8BA3
    755       1.1  mrg 	.long	0xBC52640C
    756       1.1  mrg 	.long	0xBE82FA0C
    757       1.1  mrg 	.long	0xC0C0C0C1
    758       1.1  mrg 	.long	0xC30C30C4
    759       1.1  mrg 	.long	0xC565C87C
    760       1.1  mrg 	.long	0xC7CE0C7D
    761       1.1  mrg 	.long	0xCA4587E7
    762       1.1  mrg 	.long	0xCCCCCCCD
    763       1.1  mrg 	.long	0xCF6474A9
    764       1.1  mrg 	.long	0xD20D20D3
    765       1.1  mrg 	.long	0xD4C77B04
    766       1.1  mrg 	.long	0xD79435E6
    767       1.1  mrg 	.long	0xDA740DA8
    768       1.1  mrg 	.long	0xDD67C8A7
    769       1.1  mrg 	.long	0xE070381D
    770       1.1  mrg 	.long	0xE38E38E4
    771       1.1  mrg 	.long	0xE6C2B449
    772       1.1  mrg 	.long	0xEA0EA0EB
    773       1.1  mrg 	.long	0xED7303B6
    774       1.1  mrg 	.long	0xF0F0F0F1
    775       1.1  mrg 	.long	0xF4898D60
    776       1.1  mrg 	.long	0xF83E0F84
    777       1.1  mrg 	.long	0xFC0FC0FD
    778       1.1  mrg 	.long	0x4000000
    779       1.1  mrg 	.long	0x82082083
    780       1.1  mrg 	.long	0x84210843
    781       1.1  mrg 	.long	0x864B8A7E
    782       1.1  mrg 	.long	0x88888889
    783       1.1  mrg 	.long	0x8AD8F2FC
    784       1.1  mrg 	.long	0x8D3DCB09
    785       1.1  mrg 	.long	0x8FB823EF
    786       1.1  mrg 	.long	0x92492493
    787       1.1  mrg 	.long	0x94F20950
    788       1.1  mrg 	.long	0x97B425EE
    789       1.1  mrg 	.long	0x9A90E7DA
    790       1.1  mrg 	.long	0x9D89D89E
    791       1.1  mrg 	.long	0xA0A0A0A1
    792       1.1  mrg 	.long	0xA3D70A3E
    793       1.1  mrg 	.long	0xA72F053A
    794       1.1  mrg 	.long	0xAAAAAAAB
    795       1.1  mrg 	.long	0xAE4C415D
    796       1.1  mrg 	.long	0xB21642C9
    797       1.1  mrg 	.long	0xB60B60B7
    798       1.1  mrg 	.long	0xBA2E8BA3
    799       1.1  mrg 	.long	0xBE82FA0C
    800       1.1  mrg 	.long	0xC30C30C4
    801       1.1  mrg 	.long	0xC7CE0C7D
    802       1.1  mrg 	.long	0xCCCCCCCD
    803       1.1  mrg 	.long	0xD20D20D3
    804       1.1  mrg 	.long	0xD79435E6
    805       1.1  mrg 	.long	0xDD67C8A7
    806       1.1  mrg 	.long	0xE38E38E4
    807       1.1  mrg 	.long	0xEA0EA0EB
    808       1.1  mrg 	.long	0xF0F0F0F1
    809       1.1  mrg 	.long	0xF83E0F84
    810       1.1  mrg 	.long	0x8000000
    811       1.1  mrg 	.long	0x84210843
    812       1.1  mrg 	.long	0x88888889
    813       1.1  mrg 	.long	0x8D3DCB09
    814       1.1  mrg 	.long	0x92492493
    815       1.1  mrg 	.long	0x97B425EE
    816       1.1  mrg 	.long	0x9D89D89E
    817       1.1  mrg 	.long	0xA3D70A3E
    818       1.1  mrg 	.long	0xAAAAAAAB
    819       1.1  mrg 	.long	0xB21642C9
    820       1.1  mrg 	.long	0xBA2E8BA3
    821       1.1  mrg 	.long	0xC30C30C4
    822       1.1  mrg 	.long	0xCCCCCCCD
    823       1.1  mrg 	.long	0xD79435E6
    824       1.1  mrg 	.long	0xE38E38E4
    825       1.1  mrg 	.long	0xF0F0F0F1
    826       1.1  mrg 	.long	0x10000000
    827       1.1  mrg 	.long	0x88888889
    828       1.1  mrg 	.long	0x92492493
    829       1.1  mrg 	.long	0x9D89D89E
    830       1.1  mrg 	.long	0xAAAAAAAB
    831       1.1  mrg 	.long	0xBA2E8BA3
    832       1.1  mrg 	.long	0xCCCCCCCD
    833       1.1  mrg 	.long	0xE38E38E4
    834       1.1  mrg 	.long	0x20000000
    835       1.1  mrg 	.long	0x92492493
    836       1.1  mrg 	.long	0xAAAAAAAB
    837       1.1  mrg 	.long	0xCCCCCCCD
    838       1.1  mrg 	.long	0x40000000
    839       1.1  mrg 	.long	0xAAAAAAAB
    840       1.1  mrg 	.long	0x80000000
    841       1.1  mrg __muldiv:
    842       1.1  mrg 	neg	r4,r2
    843       1.1  mrg 	ld.as	r5,[pcl,r4]
    844       1.1  mrg 	abs_s	r12,r0
    845   1.1.1.3  mrg 	bic.f	0,r2,r4
    846   1.1.1.3  mrg 	mpyhu.ne r12,r12,r5
    847       1.1  mrg 	norm	r3,r2
    848       1.1  mrg 	xor.f	0,r0,r1
    849   1.1.1.3  mrg 	; write port allocation stall
    850   1.1.1.3  mrg 	rsub	r3,r3,30
    851   1.1.1.3  mrg 	lsr	r0,r12,r3
    852   1.1.1.3  mrg 	j_s.d	[blink]
    853   1.1.1.3  mrg 	neg.mi	r0,r0
    854       1.1  mrg 
    855       1.1  mrg 	.balign	4
    856       1.1  mrg SYM(__divsi3):
    857       1.1  mrg 	norm	r3,r1
    858       1.1  mrg 	abs_s	r2,r1
    859       1.1  mrg 	brhs	r3,23,__muldiv
    860       1.1  mrg 	norm	r4,r0
    861       1.1  mrg 	abs_l	r12,r0
    862       1.1  mrg 	brhs	r4,r3,.Lonebit
    863       1.1  mrg 	asl_s	r2,r2,r3
    864       1.1  mrg 	asl	r12,r12,r4
    865       1.1  mrg 	sub	lp_count,r3,r4
    866       1.1  mrg 	sub.f	r12,r12,r2
    867       1.1  mrg 	brge.d	r12,r2,.Lsbit
    868       1.1  mrg 	sub	r4,r3,r4
    869       1.1  mrg 	add.lo	r12,r12,r2
    870       1.1  mrg 	lp	.Ldivend
    871       1.1  mrg .Ldivstart:divaw r12,r12,r2
    872       1.1  mrg .Ldivend:xor_s	r1,r1,r0
    873       1.1  mrg 	sub	r0,r4,1
    874       1.1  mrg 	bmsk	r0,r12,r0
    875       1.1  mrg 	bset.hs	r0,r0,r4
    876       1.1  mrg 	tst_s	r1,r1
    877       1.1  mrg 	j_s.d	[blink]
    878       1.1  mrg 	neg.mi	r0,r0
    879       1.1  mrg .Lonebit:
    880       1.1  mrg 	xor_s	r1,r1,r0
    881       1.1  mrg 	asr_s	r1,r1,31
    882       1.1  mrg 	sub1.f	0,r12,r2	; special case:	-2**(n+1) / 2**n
    883       1.1  mrg 	or	r0,r1,1
    884       1.1  mrg 	add.eq	r0,r0,r0
    885       1.1  mrg 	cmp_s	r12,r2
    886       1.1  mrg 	j_s.d	[blink]
    887       1.1  mrg 	mov.lo	r0,0
    888       1.1  mrg .Lsbit:
    889       1.1  mrg 	; Need to handle special cases involving negative powers of two:
    890       1.1  mrg 	; r12,r2 are normalized dividend / divisor;
    891       1.1  mrg 	; divide anything by 0x80000000, or divide 0x80000000 by 0x40000000
    892       1.1  mrg 	add_s	r12,r12,r2
    893       1.1  mrg 	xor_s	r1,r1,r0
    894       1.1  mrg 	rsub	r4,r4,-1
    895       1.1  mrg 	ror	r0,r12,r4
    896       1.1  mrg 	tst_s	r2,r2
    897       1.1  mrg 	bmsk	r0,r0,r3
    898       1.1  mrg 	add.pl	r0,r0,r0
    899       1.1  mrg 	tst_s	r1,r1
    900       1.1  mrg 	j_s.d	[blink]
    901       1.1  mrg 	neg.mi	r0,r0
    902       1.1  mrg #else /* !MULDIV */
    903       1.1  mrg /* This version requires that divaw works with a divisor of 0x80000000U  */
    904       1.1  mrg 	abs_s	r2,r1
    905       1.1  mrg 	norm	r4,r0
    906       1.1  mrg 	neg_s	r3,r2
    907       1.1  mrg 	norm	r3,r3
    908       1.1  mrg 	abs_s	r12,r0
    909       1.1  mrg 	brhs	r4,r3,.Lonebit
    910       1.1  mrg 	asl_s	r2,r2,r3
    911       1.1  mrg 	asl	r12,r12,r4
    912       1.1  mrg 	sub	lp_count,r3,r4
    913       1.1  mrg 	cmp_s	r12,r2
    914       1.1  mrg 	sub.hs	r12,r12,r2
    915       1.1  mrg 	lp	.Ldivend
    916       1.1  mrg .Ldivstart:divaw r12,r12,r2
    917       1.1  mrg .Ldivend:xor_s	r1,r1,r0
    918       1.1  mrg 	sub_s	r0,r3,1
    919       1.1  mrg 	bmsk	r0,r12,r0
    920       1.1  mrg 	bset.hs	r0,r0,r3
    921       1.1  mrg 	tst_s	r1,r1
    922       1.1  mrg 	j_s.d	[blink]
    923       1.1  mrg 	negmi	r0,r0
    924       1.1  mrg .Lonebit:
    925       1.1  mrg 	xor_s	r1,r1,r0
    926       1.1  mrg 	asr_s	r1,r1,31
    927       1.1  mrg 	cmp_s	r12,r2
    928       1.1  mrg 	mov_s	r0,0
    929       1.1  mrg 	j_s.d	[blink]
    930       1.1  mrg 	orhs	r0,r1,1
    931       1.1  mrg #endif /* MULDIV */
    932       1.1  mrg 
    933       1.1  mrg #endif	/* ifndef __ARC700__ */
    934       1.1  mrg 	ENDFUNC(__divsi3)
    935       1.1  mrg 
    936   1.1.1.3  mrg 
    937       1.1  mrg #endif /* L_divsi3 */
    938       1.1  mrg 
    939  1.1.1.10  mrg #ifndef __ARC_RF16__
    940       1.1  mrg #ifdef  L_umodsi3
    941       1.1  mrg 	.section .text
    942       1.1  mrg 	.align 4
    943       1.1  mrg 
    944       1.1  mrg 	.global SYM(__umodsi3)
    945       1.1  mrg 	FUNC(__umodsi3)
    946       1.1  mrg SYM(__umodsi3):
    947       1.1  mrg 	mov r7,blink
    948       1.1  mrg 	bl.nd @SYM(__udivmodsi4)
    949       1.1  mrg 	j.d [r7]
    950       1.1  mrg 	mov r0,r1
    951       1.1  mrg 	ENDFUNC(__umodsi3)
    952       1.1  mrg 
    953       1.1  mrg #endif /* L_umodsi3 */
    954  1.1.1.10  mrg #endif /* !__ARC_RF16__ */
    955       1.1  mrg 
    956       1.1  mrg #ifdef  L_modsi3
    957       1.1  mrg 	.section .text
    958       1.1  mrg 	.align 4
    959       1.1  mrg 
    960       1.1  mrg 	.global SYM (__modsi3)
    961       1.1  mrg 	FUNC(__modsi3)
    962       1.1  mrg SYM(__modsi3):
    963   1.1.1.3  mrg #ifndef __ARC_EA__
    964       1.1  mrg 	/* A5 / ARC60? */
    965       1.1  mrg 	mov_s r12,blink
    966   1.1.1.6  mrg 	mov_s r11,r0
    967       1.1  mrg 	abs_s r0,r0
    968       1.1  mrg 	bl.d @SYM(__udivmodsi4)
    969   1.1.1.6  mrg 	abs_s r1,r1
    970   1.1.1.6  mrg 	tst r11,r11
    971       1.1  mrg 	neg_s r0,r1
    972       1.1  mrg 	j_s.d [r12]
    973   1.1.1.6  mrg 	mov.pl r0,r1
    974   1.1.1.3  mrg #else /* __ARC_EA__ */
    975       1.1  mrg 	abs_s	r2,r1
    976       1.1  mrg 	norm.f	r4,r0
    977       1.1  mrg 	neg	r5,r2
    978       1.1  mrg 	norm	r3,r5
    979       1.1  mrg 	abs_l	r12,r0
    980       1.1  mrg 	brhs	r4,r3,.Lonebit
    981       1.1  mrg 	asl_s	r2,r2,r3
    982       1.1  mrg 	asl	r12,r12,r4
    983       1.1  mrg 	sub	lp_count,r3,r4
    984       1.1  mrg 	cmp_s	r12,r2
    985       1.1  mrg 	sub.hs	r12,r12,r2
    986       1.1  mrg 	tst_s	r0,r0
    987       1.1  mrg 	lp	.Ldivend
    988       1.1  mrg .Ldivstart:divaw r12,r12,r2
    989       1.1  mrg .Ldivend:
    990       1.1  mrg 	lsr	r0,r12,r3
    991       1.1  mrg 	j_s.d	[blink]
    992       1.1  mrg 	neg.mi	r0,r0
    993       1.1  mrg 	.balign	4
    994       1.1  mrg .Lonebit:neg.pl	r5,r5
    995       1.1  mrg 	cmp_s	r12,r2
    996       1.1  mrg 	j_s.d	[blink]
    997       1.1  mrg 	sub.hs	r0,r0,r5
    998   1.1.1.3  mrg #endif /* !__ARC_EA__ */
    999       1.1  mrg 	ENDFUNC(__modsi3)
   1000       1.1  mrg 
   1001       1.1  mrg #endif /* L_modsi3 */
   1002       1.1  mrg 
   1003       1.1  mrg #ifdef L_clzsi2
   1004       1.1  mrg        .section .text
   1005       1.1  mrg        .align 4
   1006       1.1  mrg        .global SYM (__clzsi2)
   1007   1.1.1.3  mrg SYM(__clzsi2):
   1008       1.1  mrg #ifdef __ARC_NORM__
   1009       1.1  mrg 	HIDDEN_FUNC(__clzsi2)
   1010       1.1  mrg 	norm.f	r0,r0
   1011       1.1  mrg 	mov.n	r0,0
   1012       1.1  mrg 	j_s.d	[blink]
   1013       1.1  mrg 	add.pl	r0,r0,1
   1014       1.1  mrg 	ENDFUNC(__clzsi2)
   1015   1.1.1.3  mrg #elif !defined (__ARC_BARREL_SHIFTER__)
   1016       1.1  mrg 	FUNC(__clzsi2)
   1017       1.1  mrg 	mov lp_count,10
   1018       1.1  mrg 	mov_l r1,0
   1019       1.1  mrg 	bset r2,r1,29
   1020       1.1  mrg 	lp .Loop_end
   1021       1.1  mrg 	brhs r0,r2,.Loop_end
   1022       1.1  mrg 	add3 r0,r1,r0
   1023       1.1  mrg .Loop_end:
   1024       1.1  mrg 	asl.f 0,r0
   1025       1.1  mrg 	sub2 r0,lp_count,lp_count
   1026       1.1  mrg 	sub.cs.f r0,r0,1
   1027       1.1  mrg 	add r0,r0,31
   1028       1.1  mrg 	j_s.d [blink]
   1029       1.1  mrg 	add.pl r0,r0,1
   1030       1.1  mrg 	ENDFUNC(__clzsi2)
   1031       1.1  mrg #else
   1032       1.1  mrg 	FUNC(__clzsi2)
   1033       1.1  mrg 	asl.f 0,r0,2
   1034       1.1  mrg 	mov r1,-1
   1035       1.1  mrg .Lcheck:
   1036       1.1  mrg 	bbit1.d r0,31,.Ldone
   1037       1.1  mrg 	asl.pl r0,r0,3
   1038       1.1  mrg 	bcs.d .Ldone_1
   1039       1.1  mrg 	add_s r1,r1,3
   1040       1.1  mrg 	bpnz.d .Lcheck
   1041       1.1  mrg 	asl.f 0,r0,2
   1042       1.1  mrg 	mov_s r0,32
   1043       1.1  mrg 	j_s.d [blink]
   1044       1.1  mrg 	mov.ne r0,r1
   1045       1.1  mrg .Ldone:
   1046       1.1  mrg 	j_s.d [blink]
   1047       1.1  mrg 	add_s r0,r1,1
   1048       1.1  mrg .Ldone_1:
   1049       1.1  mrg 	j_s.d [blink]
   1050       1.1  mrg 	sub_s r0,r1,1
   1051       1.1  mrg 	ENDFUNC(__clzsi2)
   1052       1.1  mrg #endif
   1053       1.1  mrg #endif /* L_clzsi2 */
   1054       1.1  mrg        .section .text
   1055       1.1  mrg 
   1056       1.1  mrg 
   1057       1.1  mrg ;;; MILLICODE THUNK LIB ;***************
   1058   1.1.1.3  mrg 
   1059       1.1  mrg ;;; 	.macro push_regs from, to, offset
   1060       1.1  mrg ;;; 		st_s "\from", [sp, \offset]
   1061       1.1  mrg ;;; 		.if \to-\from
   1062       1.1  mrg ;;; 			push_regs "(\from+1)", \to, "(\offset+4)"
   1063       1.1  mrg ;;; 		.endif
   1064       1.1  mrg ;;; 	.endm
   1065       1.1  mrg ;;; 	push_regs 13, 18, 0
   1066       1.1  mrg ;;;
   1067       1.1  mrg 
   1068       1.1  mrg ;;;;   	.macro sum from, to, three
   1069       1.1  mrg ;;;;   		.long \from
   1070       1.1  mrg ;;;;   		.long \three
   1071       1.1  mrg ;;;;   		.local regno
   1072       1.1  mrg ;;;;   		.set regno, \from+1
   1073       1.1  mrg ;;;;   		.set shift, 32
   1074       1.1  mrg ;;;;   		.set shift, shift - 1
   1075   1.1.1.3  mrg ;;;;   #		st_s %shift @3 lsl #shift
   1076       1.1  mrg ;;;;   		.if \to-\from
   1077       1.1  mrg ;;;;   		sum "(\from+1)", \to, "(\three)"
   1078   1.1.1.3  mrg ;;;;   		.endif
   1079       1.1  mrg ;;;;   	.endm
   1080   1.1.1.3  mrg ;;;;
   1081       1.1  mrg ;;;;   	SUM 0,5, 9
   1082   1.1.1.3  mrg ;;;;
   1083   1.1.1.3  mrg ;	.altmacro
   1084       1.1  mrg ;;  	.macro push_regs from=0, to=3, offset
   1085       1.1  mrg ;;  		st_s r\from, [sp, \offset]
   1086       1.1  mrg ;;  		.if \to-\from
   1087       1.1  mrg ;;  			push_regs "\from+1 ",\to,"(\offset+4)"
   1088       1.1  mrg ;;  		.endif
   1089       1.1  mrg ;;  	.endm
   1090   1.1.1.3  mrg ;;
   1091       1.1  mrg ;;  	.macro expand_to_push from=13, to
   1092       1.1  mrg ;;  ;		.section .text
   1093       1.1  mrg ;;  ;		.align 4
   1094       1.1  mrg ;;  ;		.global st_
   1095       1.1  mrg ;;  ;		.type foo,
   1096       1.1  mrg ;;  	st_13_to_25:
   1097       1.1  mrg ;;  ;		push_regs \from, \to, 0
   1098   1.1.1.3  mrg ;;  	push_regs 0,3		;
   1099       1.1  mrg ;;  	.endm
   1100   1.1.1.3  mrg ;;
   1101       1.1  mrg ;;  	expand_to_push 13,18
   1102   1.1.1.3  mrg ;;
   1103       1.1  mrg ;#endif
   1104       1.1  mrg 
   1105   1.1.1.8  mrg #ifndef __ARC_RF16__
   1106       1.1  mrg #ifdef L_millicodethunk_st
   1107       1.1  mrg 	.section .text
   1108       1.1  mrg 	.align 4
   1109       1.1  mrg 	.global SYM(__st_r13_to_r15)
   1110       1.1  mrg 	.global SYM(__st_r13_to_r16)
   1111       1.1  mrg 	.global SYM(__st_r13_to_r17)
   1112       1.1  mrg 	.global SYM(__st_r13_to_r18)
   1113       1.1  mrg 	.global SYM(__st_r13_to_r19)
   1114       1.1  mrg 	.global SYM(__st_r13_to_r20)
   1115       1.1  mrg 	.global SYM(__st_r13_to_r21)
   1116       1.1  mrg 	.global SYM(__st_r13_to_r22)
   1117       1.1  mrg 	.global SYM(__st_r13_to_r23)
   1118       1.1  mrg 	.global SYM(__st_r13_to_r24)
   1119       1.1  mrg 	.global SYM(__st_r13_to_r25)
   1120       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r15)
   1121       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r16)
   1122       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r17)
   1123       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r18)
   1124       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r19)
   1125       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r20)
   1126       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r21)
   1127       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r22)
   1128       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r23)
   1129       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r24)
   1130       1.1  mrg 	HIDDEN_FUNC(__st_r13_to_r25)
   1131       1.1  mrg 	.align 4
   1132       1.1  mrg SYM(__st_r13_to_r25):
   1133       1.1  mrg 	st r25, [sp,48]
   1134   1.1.1.3  mrg SYM(__st_r13_to_r24):
   1135       1.1  mrg 	st r24, [sp,44]
   1136   1.1.1.3  mrg SYM(__st_r13_to_r23):
   1137       1.1  mrg 	st r23, [sp,40]
   1138   1.1.1.3  mrg SYM(__st_r13_to_r22):
   1139       1.1  mrg 	st r22, [sp,36]
   1140   1.1.1.3  mrg SYM(__st_r13_to_r21):
   1141       1.1  mrg 	st r21, [sp,32]
   1142   1.1.1.3  mrg SYM(__st_r13_to_r20):
   1143   1.1.1.3  mrg 	st r20, [sp,28]
   1144   1.1.1.3  mrg SYM(__st_r13_to_r19):
   1145       1.1  mrg 	st r19, [sp,24]
   1146   1.1.1.3  mrg SYM(__st_r13_to_r18):
   1147       1.1  mrg 	st r18, [sp,20]
   1148   1.1.1.3  mrg SYM(__st_r13_to_r17):
   1149       1.1  mrg 	st r17, [sp,16]
   1150   1.1.1.3  mrg SYM(__st_r13_to_r16):
   1151       1.1  mrg 	st r16, [sp,12]
   1152   1.1.1.3  mrg SYM(__st_r13_to_r15):
   1153       1.1  mrg #ifdef __ARC700__
   1154       1.1  mrg 	st r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
   1155       1.1  mrg #else
   1156       1.1  mrg 	st_s r15, [sp,8]
   1157       1.1  mrg #endif
   1158       1.1  mrg 	st_s r14, [sp,4]
   1159       1.1  mrg 	j_s.d [%blink]
   1160   1.1.1.3  mrg 	st_s r13, [sp,0]
   1161       1.1  mrg 	ENDFUNC(__st_r13_to_r15)
   1162       1.1  mrg 	ENDFUNC(__st_r13_to_r16)
   1163       1.1  mrg 	ENDFUNC(__st_r13_to_r17)
   1164       1.1  mrg 	ENDFUNC(__st_r13_to_r18)
   1165       1.1  mrg 	ENDFUNC(__st_r13_to_r19)
   1166       1.1  mrg 	ENDFUNC(__st_r13_to_r20)
   1167       1.1  mrg 	ENDFUNC(__st_r13_to_r21)
   1168       1.1  mrg 	ENDFUNC(__st_r13_to_r22)
   1169       1.1  mrg 	ENDFUNC(__st_r13_to_r23)
   1170       1.1  mrg 	ENDFUNC(__st_r13_to_r24)
   1171       1.1  mrg 	ENDFUNC(__st_r13_to_r25)
   1172       1.1  mrg #endif  /* L_millicodethunk_st */
   1173       1.1  mrg 
   1174       1.1  mrg 
   1175       1.1  mrg #ifdef L_millicodethunk_ld
   1176       1.1  mrg 	.section .text
   1177       1.1  mrg 	.align 4
   1178   1.1.1.3  mrg ;	==================================
   1179       1.1  mrg ;	the loads
   1180       1.1  mrg 
   1181       1.1  mrg 	.global SYM(__ld_r13_to_r15)
   1182       1.1  mrg 	.global SYM(__ld_r13_to_r16)
   1183       1.1  mrg 	.global SYM(__ld_r13_to_r17)
   1184       1.1  mrg 	.global SYM(__ld_r13_to_r18)
   1185       1.1  mrg 	.global SYM(__ld_r13_to_r19)
   1186       1.1  mrg 	.global SYM(__ld_r13_to_r20)
   1187       1.1  mrg 	.global SYM(__ld_r13_to_r21)
   1188       1.1  mrg 	.global SYM(__ld_r13_to_r22)
   1189       1.1  mrg 	.global SYM(__ld_r13_to_r23)
   1190       1.1  mrg 	.global SYM(__ld_r13_to_r24)
   1191       1.1  mrg 	.global SYM(__ld_r13_to_r25)
   1192       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r15)
   1193       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r16)
   1194       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r17)
   1195       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r18)
   1196       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r19)
   1197       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r20)
   1198       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r21)
   1199       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r22)
   1200       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r23)
   1201       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r24)
   1202       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r25)
   1203       1.1  mrg SYM(__ld_r13_to_r25):
   1204       1.1  mrg 	ld r25, [sp,48]
   1205       1.1  mrg SYM(__ld_r13_to_r24):
   1206       1.1  mrg 	ld r24, [sp,44]
   1207       1.1  mrg SYM(__ld_r13_to_r23):
   1208       1.1  mrg 	ld r23, [sp,40]
   1209       1.1  mrg SYM(__ld_r13_to_r22):
   1210       1.1  mrg 	ld r22, [sp,36]
   1211       1.1  mrg SYM(__ld_r13_to_r21):
   1212       1.1  mrg 	ld r21, [sp,32]
   1213       1.1  mrg SYM(__ld_r13_to_r20):
   1214   1.1.1.3  mrg 	ld r20, [sp,28]
   1215       1.1  mrg SYM(__ld_r13_to_r19):
   1216       1.1  mrg 	ld r19, [sp,24]
   1217       1.1  mrg SYM(__ld_r13_to_r18):
   1218       1.1  mrg 	ld r18, [sp,20]
   1219       1.1  mrg SYM(__ld_r13_to_r17):
   1220       1.1  mrg 	ld r17, [sp,16]
   1221       1.1  mrg SYM(__ld_r13_to_r16):
   1222       1.1  mrg 	ld r16, [sp,12]
   1223       1.1  mrg SYM(__ld_r13_to_r15):
   1224       1.1  mrg #ifdef __ARC700__
   1225       1.1  mrg 	ld r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
   1226       1.1  mrg #else
   1227       1.1  mrg 	ld_s r15, [sp,8]
   1228       1.1  mrg #endif
   1229       1.1  mrg 	ld_s r14, [sp,4]
   1230       1.1  mrg 	j_s.d [%blink]
   1231       1.1  mrg 	ld_s r13, [sp,0]
   1232       1.1  mrg 	ENDFUNC(__ld_r13_to_r15)
   1233       1.1  mrg 	ENDFUNC(__ld_r13_to_r16)
   1234       1.1  mrg 	ENDFUNC(__ld_r13_to_r17)
   1235       1.1  mrg 	ENDFUNC(__ld_r13_to_r18)
   1236       1.1  mrg 	ENDFUNC(__ld_r13_to_r19)
   1237       1.1  mrg 	ENDFUNC(__ld_r13_to_r20)
   1238       1.1  mrg 	ENDFUNC(__ld_r13_to_r21)
   1239       1.1  mrg 	ENDFUNC(__ld_r13_to_r22)
   1240       1.1  mrg 	ENDFUNC(__ld_r13_to_r23)
   1241       1.1  mrg 	ENDFUNC(__ld_r13_to_r24)
   1242       1.1  mrg 	ENDFUNC(__ld_r13_to_r25)
   1243       1.1  mrg 
   1244       1.1  mrg #endif /* L_millicodethunk_ld */
   1245       1.1  mrg #ifdef L_millicodethunk_ret
   1246       1.1  mrg 	.global SYM(__ld_r13_to_r14_ret)
   1247       1.1  mrg 	.global SYM(__ld_r13_to_r15_ret)
   1248       1.1  mrg 	.global SYM(__ld_r13_to_r16_ret)
   1249       1.1  mrg 	.global SYM(__ld_r13_to_r17_ret)
   1250       1.1  mrg 	.global SYM(__ld_r13_to_r18_ret)
   1251       1.1  mrg 	.global SYM(__ld_r13_to_r19_ret)
   1252       1.1  mrg 	.global SYM(__ld_r13_to_r20_ret)
   1253       1.1  mrg 	.global SYM(__ld_r13_to_r21_ret)
   1254       1.1  mrg 	.global SYM(__ld_r13_to_r22_ret)
   1255       1.1  mrg 	.global SYM(__ld_r13_to_r23_ret)
   1256       1.1  mrg 	.global SYM(__ld_r13_to_r24_ret)
   1257       1.1  mrg 	.global SYM(__ld_r13_to_r25_ret)
   1258       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r14_ret)
   1259       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r15_ret)
   1260       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r16_ret)
   1261       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r17_ret)
   1262       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r18_ret)
   1263       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r19_ret)
   1264       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r20_ret)
   1265       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r21_ret)
   1266       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r22_ret)
   1267       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r23_ret)
   1268       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r24_ret)
   1269       1.1  mrg 	HIDDEN_FUNC(__ld_r13_to_r25_ret)
   1270       1.1  mrg 	.section .text
   1271       1.1  mrg 	.align 4
   1272       1.1  mrg SYM(__ld_r13_to_r25_ret):
   1273       1.1  mrg 	ld r25, [sp,48]
   1274       1.1  mrg SYM(__ld_r13_to_r24_ret):
   1275       1.1  mrg 	ld r24, [sp,44]
   1276       1.1  mrg SYM(__ld_r13_to_r23_ret):
   1277       1.1  mrg 	ld r23, [sp,40]
   1278       1.1  mrg SYM(__ld_r13_to_r22_ret):
   1279       1.1  mrg 	ld r22, [sp,36]
   1280       1.1  mrg SYM(__ld_r13_to_r21_ret):
   1281       1.1  mrg 	ld r21, [sp,32]
   1282       1.1  mrg SYM(__ld_r13_to_r20_ret):
   1283   1.1.1.3  mrg 	ld r20, [sp,28]
   1284       1.1  mrg SYM(__ld_r13_to_r19_ret):
   1285       1.1  mrg 	ld r19, [sp,24]
   1286       1.1  mrg SYM(__ld_r13_to_r18_ret):
   1287       1.1  mrg 	ld r18, [sp,20]
   1288       1.1  mrg SYM(__ld_r13_to_r17_ret):
   1289       1.1  mrg 	ld r17, [sp,16]
   1290       1.1  mrg SYM(__ld_r13_to_r16_ret):
   1291       1.1  mrg 	ld r16, [sp,12]
   1292       1.1  mrg SYM(__ld_r13_to_r15_ret):
   1293       1.1  mrg 	ld r15, [sp,8]
   1294       1.1  mrg SYM(__ld_r13_to_r14_ret):
   1295       1.1  mrg 	ld blink,[sp,r12]
   1296       1.1  mrg 	ld_s r14, [sp,4]
   1297       1.1  mrg 	ld.ab r13, [sp,r12]
   1298       1.1  mrg 	j_s.d [%blink]
   1299       1.1  mrg 	add_s sp,sp,4
   1300       1.1  mrg 	ENDFUNC(__ld_r13_to_r14_ret)
   1301       1.1  mrg 	ENDFUNC(__ld_r13_to_r15_ret)
   1302       1.1  mrg 	ENDFUNC(__ld_r13_to_r16_ret)
   1303       1.1  mrg 	ENDFUNC(__ld_r13_to_r17_ret)
   1304       1.1  mrg 	ENDFUNC(__ld_r13_to_r18_ret)
   1305       1.1  mrg 	ENDFUNC(__ld_r13_to_r19_ret)
   1306       1.1  mrg 	ENDFUNC(__ld_r13_to_r20_ret)
   1307       1.1  mrg 	ENDFUNC(__ld_r13_to_r21_ret)
   1308       1.1  mrg 	ENDFUNC(__ld_r13_to_r22_ret)
   1309       1.1  mrg 	ENDFUNC(__ld_r13_to_r23_ret)
   1310       1.1  mrg 	ENDFUNC(__ld_r13_to_r24_ret)
   1311       1.1  mrg 	ENDFUNC(__ld_r13_to_r25_ret)
   1312       1.1  mrg 
   1313       1.1  mrg #endif /* L_millicodethunk_ret */
   1314       1.1  mrg 
   1315   1.1.1.8  mrg #if defined (__ARC700__) || defined (__ARC_FPX_QUARK__)
   1316       1.1  mrg #ifdef  L_adddf3
   1317       1.1  mrg #ifdef __ARC_NORM__
   1318       1.1  mrg #include "ieee-754/adddf3.S"
   1319       1.1  mrg #endif
   1320       1.1  mrg #endif
   1321       1.1  mrg 
   1322       1.1  mrg #ifdef  L_muldf3
   1323   1.1.1.3  mrg #ifdef __ARC_MPY__
   1324       1.1  mrg #include "ieee-754/muldf3.S"
   1325       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
   1326       1.1  mrg #include "ieee-754/arc600-mul64/muldf3.S"
   1327       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
   1328       1.1  mrg #include "ieee-754/arc600-dsp/muldf3.S"
   1329       1.1  mrg #endif
   1330       1.1  mrg #endif
   1331       1.1  mrg 
   1332       1.1  mrg #ifdef  L_addsf3
   1333       1.1  mrg #ifdef __ARC_NORM__
   1334       1.1  mrg #include "ieee-754/addsf3.S"
   1335       1.1  mrg #endif
   1336       1.1  mrg #endif
   1337       1.1  mrg 
   1338       1.1  mrg #ifdef  L_mulsf3
   1339   1.1.1.3  mrg #ifdef  __ARC_MPY__
   1340       1.1  mrg #include "ieee-754/mulsf3.S"
   1341       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
   1342       1.1  mrg #include "ieee-754/arc600-mul64/mulsf3.S"
   1343       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
   1344       1.1  mrg #include "ieee-754/arc600-dsp/mulsf3.S"
   1345       1.1  mrg #elif defined (__ARC_NORM__)
   1346       1.1  mrg #include "ieee-754/arc600/mulsf3.S"
   1347       1.1  mrg #endif
   1348       1.1  mrg #endif
   1349       1.1  mrg 
   1350       1.1  mrg #ifdef  L_divdf3
   1351   1.1.1.3  mrg #ifdef  __ARC_MPY__
   1352       1.1  mrg #include "ieee-754/divdf3.S"
   1353       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
   1354       1.1  mrg #include "ieee-754/arc600-mul64/divdf3.S"
   1355       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
   1356       1.1  mrg #include "ieee-754/arc600-dsp/divdf3.S"
   1357       1.1  mrg #endif
   1358       1.1  mrg #endif
   1359       1.1  mrg 
   1360       1.1  mrg #ifdef  L_divsf3
   1361   1.1.1.3  mrg #ifdef  __ARC_MPY__
   1362       1.1  mrg #include "ieee-754/divsf3-stdmul.S"
   1363       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
   1364       1.1  mrg #include "ieee-754/arc600-mul64/divsf3.S"
   1365       1.1  mrg #elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
   1366       1.1  mrg #include "ieee-754/arc600-dsp/divsf3.S"
   1367       1.1  mrg #elif defined (__ARC_NORM__)
   1368       1.1  mrg #include "ieee-754/arc600/divsf3.S"
   1369       1.1  mrg #endif
   1370       1.1  mrg #endif
   1371       1.1  mrg 
   1372       1.1  mrg #ifdef L_extendsfdf2
   1373       1.1  mrg #ifdef __ARC_NORM__
   1374       1.1  mrg #include "ieee-754/extendsfdf2.S"
   1375       1.1  mrg #endif
   1376       1.1  mrg #endif
   1377       1.1  mrg 
   1378       1.1  mrg #ifdef L_truncdfsf2
   1379       1.1  mrg #ifdef __ARC_NORM__
   1380       1.1  mrg #include "ieee-754/truncdfsf2.S"
   1381       1.1  mrg #endif
   1382       1.1  mrg #endif
   1383       1.1  mrg 
   1384       1.1  mrg #ifdef L_floatsidf
   1385       1.1  mrg #ifdef __ARC_NORM__
   1386       1.1  mrg #include "ieee-754/floatsidf.S"
   1387       1.1  mrg #endif
   1388       1.1  mrg #endif
   1389       1.1  mrg 
   1390       1.1  mrg #ifdef L_floatsisf
   1391       1.1  mrg #ifdef __ARC_NORM__
   1392       1.1  mrg #include "ieee-754/floatsisf.S"
   1393       1.1  mrg #endif
   1394       1.1  mrg #endif
   1395       1.1  mrg 
   1396       1.1  mrg #ifdef L_floatunsidf
   1397       1.1  mrg #ifdef __ARC_NORM__
   1398       1.1  mrg #include "ieee-754/floatunsidf.S"
   1399       1.1  mrg #endif
   1400       1.1  mrg #endif
   1401       1.1  mrg 
   1402       1.1  mrg #ifdef L_fixdfsi
   1403       1.1  mrg #ifdef __ARC_NORM__
   1404       1.1  mrg #include "ieee-754/fixdfsi.S"
   1405       1.1  mrg #endif
   1406       1.1  mrg #endif
   1407       1.1  mrg 
   1408       1.1  mrg #ifdef L_fixsfsi
   1409       1.1  mrg #ifdef __ARC_NORM__
   1410       1.1  mrg #include "ieee-754/fixsfsi.S"
   1411       1.1  mrg #endif
   1412       1.1  mrg #endif
   1413       1.1  mrg 
   1414       1.1  mrg #ifdef L_fixunsdfsi
   1415       1.1  mrg #ifdef __ARC_NORM__
   1416       1.1  mrg #include "ieee-754/fixunsdfsi.S"
   1417       1.1  mrg #endif
   1418       1.1  mrg #endif
   1419       1.1  mrg 
   1420       1.1  mrg #ifdef L_eqdf2
   1421       1.1  mrg #ifdef __ARC_NORM__
   1422       1.1  mrg #include "ieee-754/eqdf2.S"
   1423       1.1  mrg #endif
   1424       1.1  mrg #endif
   1425       1.1  mrg 
   1426       1.1  mrg #ifdef L_eqsf2
   1427       1.1  mrg #ifdef __ARC_NORM__
   1428       1.1  mrg #include "ieee-754/eqsf2.S"
   1429       1.1  mrg #endif
   1430       1.1  mrg #endif
   1431       1.1  mrg 
   1432       1.1  mrg #ifdef L_gtdf2
   1433       1.1  mrg #ifdef __ARC_NORM__
   1434       1.1  mrg #include "ieee-754/gtdf2.S"
   1435       1.1  mrg #endif
   1436       1.1  mrg #endif
   1437       1.1  mrg 
   1438       1.1  mrg #ifdef L_gtsf2
   1439       1.1  mrg #ifdef __ARC_NORM__
   1440       1.1  mrg #include "ieee-754/gtsf2.S"
   1441       1.1  mrg #endif
   1442       1.1  mrg #endif
   1443       1.1  mrg 
   1444       1.1  mrg #ifdef L_gedf2
   1445       1.1  mrg #ifdef __ARC_NORM__
   1446       1.1  mrg #include "ieee-754/gedf2.S"
   1447       1.1  mrg #endif
   1448       1.1  mrg #endif
   1449       1.1  mrg 
   1450       1.1  mrg #ifdef L_gesf2
   1451       1.1  mrg #ifdef __ARC_NORM__
   1452       1.1  mrg #include "ieee-754/gesf2.S"
   1453       1.1  mrg #endif
   1454       1.1  mrg #endif
   1455       1.1  mrg 
   1456       1.1  mrg #ifdef L_uneqdf2
   1457       1.1  mrg #ifdef __ARC_NORM__
   1458       1.1  mrg #include "ieee-754/uneqdf2.S"
   1459       1.1  mrg #endif
   1460       1.1  mrg #endif
   1461       1.1  mrg 
   1462       1.1  mrg #ifdef L_uneqsf2
   1463       1.1  mrg #ifdef __ARC_NORM__
   1464       1.1  mrg #include "ieee-754/uneqsf2.S"
   1465       1.1  mrg #endif
   1466       1.1  mrg #endif
   1467       1.1  mrg 
   1468       1.1  mrg #ifdef L_orddf2
   1469       1.1  mrg #ifdef __ARC_NORM__
   1470       1.1  mrg #include "ieee-754/orddf2.S"
   1471       1.1  mrg #endif
   1472       1.1  mrg #endif
   1473       1.1  mrg 
   1474       1.1  mrg #ifdef L_ordsf2
   1475       1.1  mrg #ifdef __ARC_NORM__
   1476       1.1  mrg #include "ieee-754/ordsf2.S"
   1477       1.1  mrg #endif
   1478       1.1  mrg #endif
   1479   1.1.1.3  mrg #endif /* ARC_OPTFPE */
   1480   1.1.1.8  mrg 
   1481   1.1.1.8  mrg #endif /* !__ARC_RF16__ */
   1482